From be3caa5bac428958c83a449bbdada64d27fc745f Mon Sep 17 00:00:00 2001 From: Anton Mukhin Date: Sat, 28 Jan 2023 08:33:00 +0300 Subject: [PATCH] Firmware: added some pins and regenerated the code --- firmware/PCB-Heater/.mxproject | 24 +- .../.settings/stm32cubeide.project.prefs | 4 +- firmware/PCB-Heater/Core/Inc/main.h | 4 + .../PCB-Heater/Core/Inc/stm32g0xx_hal_conf.h | 2 +- firmware/PCB-Heater/Core/Inc/tim.h | 3 + firmware/PCB-Heater/Core/Inc/usart.h | 52 + firmware/PCB-Heater/Core/Src/adc.c | 6 +- firmware/PCB-Heater/Core/Src/gpio.c | 2 +- firmware/PCB-Heater/Core/Src/main.c | 3 + firmware/PCB-Heater/Core/Src/tim.c | 85 + firmware/PCB-Heater/Core/Src/usart.c | 140 + firmware/PCB-Heater/Debug/Core/Src/subdir.mk | 11 +- .../STM32G0xx_HAL_Driver/Src/subdir.mk | 8 +- firmware/PCB-Heater/Debug/PCB-Heater.list | 46734 ++++++++-------- firmware/PCB-Heater/Debug/objects.list | 3 + .../Inc/stm32g0xx_hal_uart.h | 1745 + .../Inc/stm32g0xx_hal_uart_ex.h | 771 + .../Inc/stm32g0xx_ll_lpuart.h | 2651 + .../Inc/stm32g0xx_ll_usart.h | 4401 ++ .../Src/stm32g0xx_hal_uart.c | 4700 ++ .../Src/stm32g0xx_hal_uart_ex.c | 1092 + firmware/PCB-Heater/PCB-Heater.ioc | 117 +- firmware/PCB-Heater/STM32G070RBTX_FLASH.ld | 4 +- 23 files changed, 40213 insertions(+), 22349 deletions(-) create mode 100644 firmware/PCB-Heater/Core/Inc/usart.h create mode 100644 firmware/PCB-Heater/Core/Src/usart.c create mode 100644 firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h create mode 100644 firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h create mode 100644 firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_lpuart.h create mode 100644 firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_usart.h create mode 100644 firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c create mode 100644 firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c diff --git a/firmware/PCB-Heater/.mxproject b/firmware/PCB-Heater/.mxproject index 289de6c..99d6a4c 100644 --- a/firmware/PCB-Heater/.mxproject +++ b/firmware/PCB-Heater/.mxproject @@ -1,35 +1,37 @@ [PreviousLibFiles] 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HeaderPath=Drivers\STM32G0xx_HAL_Driver\Inc;Drivers\STM32G0xx_HAL_Driver\Inc\Legacy;Middlewares\Third_Party\FreeRTOS\Source\include;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS_V2;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM0;Drivers\CMSIS\Device\ST\STM32G0xx\Include;Drivers\CMSIS\Include;Core\Inc; CDefines=CMSIS_device_header:;USE_HAL_DRIVER;STM32G070xx;USE_HAL_DRIVER;USE_HAL_DRIVER; [PreviousGenFiles] AdvancedFolderStructure=true -HeaderFileListSize=8 +HeaderFileListSize=9 HeaderFiles#0=..\Core\Inc\gpio.h HeaderFiles#1=..\Core\Inc\FreeRTOSConfig.h HeaderFiles#2=..\Core\Inc\adc.h HeaderFiles#3=..\Core\Inc\spi.h HeaderFiles#4=..\Core\Inc\tim.h -HeaderFiles#5=..\Core\Inc\stm32g0xx_it.h -HeaderFiles#6=..\Core\Inc\stm32g0xx_hal_conf.h -HeaderFiles#7=..\Core\Inc\main.h +HeaderFiles#5=..\Core\Inc\usart.h +HeaderFiles#6=..\Core\Inc\stm32g0xx_it.h +HeaderFiles#7=..\Core\Inc\stm32g0xx_hal_conf.h +HeaderFiles#8=..\Core\Inc\main.h HeaderFolderListSize=1 HeaderPath#0=..\Core\Inc HeaderFiles=; -SourceFileListSize=9 +SourceFileListSize=10 SourceFiles#0=..\Core\Src\gpio.c SourceFiles#1=..\Core\Src\app_freertos.c SourceFiles#2=..\Core\Src\adc.c SourceFiles#3=..\Core\Src\spi.c SourceFiles#4=..\Core\Src\tim.c -SourceFiles#5=..\Core\Src\stm32g0xx_it.c -SourceFiles#6=..\Core\Src\stm32g0xx_hal_msp.c -SourceFiles#7=..\Core\Src\stm32g0xx_hal_timebase_tim.c -SourceFiles#8=..\Core\Src\main.c +SourceFiles#5=..\Core\Src\usart.c +SourceFiles#6=..\Core\Src\stm32g0xx_it.c +SourceFiles#7=..\Core\Src\stm32g0xx_hal_msp.c +SourceFiles#8=..\Core\Src\stm32g0xx_hal_timebase_tim.c +SourceFiles#9=..\Core\Src\main.c SourceFolderListSize=1 SourcePath#0=..\Core\Src SourceFiles=; diff --git a/firmware/PCB-Heater/.settings/stm32cubeide.project.prefs b/firmware/PCB-Heater/.settings/stm32cubeide.project.prefs index ada5251..4e2d197 100644 --- a/firmware/PCB-Heater/.settings/stm32cubeide.project.prefs +++ b/firmware/PCB-Heater/.settings/stm32cubeide.project.prefs @@ -1,3 +1,3 @@ -8DF89ED150041C4CBC7CB9A9CAA90856=EDA52AC5F38E700E3B7C1D02E2738422 -DC22A860405A8BF2F2C095E5B6529F12=EDA52AC5F38E700E3B7C1D02E2738422 +8DF89ED150041C4CBC7CB9A9CAA90856=D5C17FA6F4938023A9EBA64C627C34C9 +DC22A860405A8BF2F2C095E5B6529F12=D5C17FA6F4938023A9EBA64C627C34C9 eclipse.preferences.version=1 diff --git a/firmware/PCB-Heater/Core/Inc/main.h b/firmware/PCB-Heater/Core/Inc/main.h index 0527b48..5e9fe88 100644 --- a/firmware/PCB-Heater/Core/Inc/main.h +++ b/firmware/PCB-Heater/Core/Inc/main.h @@ -57,6 +57,8 @@ void Error_Handler(void); /* USER CODE END EFP */ /* Private defines -----------------------------------------------------------*/ +#define FAN_PWM_Pin GPIO_PIN_12 +#define FAN_PWM_GPIO_Port GPIOC #define LCD_LED_Pin GPIO_PIN_1 #define LCD_LED_GPIO_Port GPIOC #define LED_Status_Pin GPIO_PIN_2 @@ -87,6 +89,8 @@ void Error_Handler(void); #define LCD_RS_GPIO_Port GPIOB #define LCD_WR_Pin GPIO_PIN_1 #define LCD_WR_GPIO_Port GPIOB +#define THERMISTOR_Pin GPIO_PIN_10 +#define THERMISTOR_GPIO_Port GPIOB #define MAX_SCK_Pin GPIO_PIN_13 #define MAX_SCK_GPIO_Port GPIOB #define MAX_MISO_Pin GPIO_PIN_14 diff --git a/firmware/PCB-Heater/Core/Inc/stm32g0xx_hal_conf.h b/firmware/PCB-Heater/Core/Inc/stm32g0xx_hal_conf.h index e656776..2362b0b 100644 --- a/firmware/PCB-Heater/Core/Inc/stm32g0xx_hal_conf.h +++ b/firmware/PCB-Heater/Core/Inc/stm32g0xx_hal_conf.h @@ -55,7 +55,7 @@ extern "C" { /* #define HAL_SMBUS_MODULE_ENABLED */ #define HAL_SPI_MODULE_ENABLED #define HAL_TIM_MODULE_ENABLED -/* #define HAL_UART_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED diff --git a/firmware/PCB-Heater/Core/Inc/tim.h b/firmware/PCB-Heater/Core/Inc/tim.h index 78fdb0e..7b5b85e 100644 --- a/firmware/PCB-Heater/Core/Inc/tim.h +++ b/firmware/PCB-Heater/Core/Inc/tim.h @@ -34,6 +34,8 @@ extern "C" { extern TIM_HandleTypeDef htim1; +extern TIM_HandleTypeDef htim14; + extern TIM_HandleTypeDef htim15; extern TIM_HandleTypeDef htim17; @@ -43,6 +45,7 @@ extern TIM_HandleTypeDef htim17; /* USER CODE END Private defines */ void MX_TIM1_Init(void); +void MX_TIM14_Init(void); void MX_TIM15_Init(void); void MX_TIM17_Init(void); diff --git a/firmware/PCB-Heater/Core/Inc/usart.h b/firmware/PCB-Heater/Core/Inc/usart.h new file mode 100644 index 0000000..b86eff0 --- /dev/null +++ b/firmware/PCB-Heater/Core/Inc/usart.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file usart.h + * @brief This file contains all the function prototypes for + * the usart.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USART_H__ +#define __USART_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern UART_HandleTypeDef huart1; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_USART1_UART_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USART_H__ */ + diff --git a/firmware/PCB-Heater/Core/Src/adc.c b/firmware/PCB-Heater/Core/Src/adc.c index 58dc2ed..0076c2c 100644 --- a/firmware/PCB-Heater/Core/Src/adc.c +++ b/firmware/PCB-Heater/Core/Src/adc.c @@ -107,8 +107,9 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) __HAL_RCC_GPIOB_CLK_ENABLE(); /**ADC1 GPIO Configuration PB2 ------> ADC1_IN10 + PB10 ------> ADC1_IN11 */ - GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Pin = GPIO_PIN_2|THERMISTOR_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); @@ -132,8 +133,9 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle) /**ADC1 GPIO Configuration PB2 ------> ADC1_IN10 + PB10 ------> ADC1_IN11 */ - HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2); + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2|THERMISTOR_Pin); /* USER CODE BEGIN ADC1_MspDeInit 1 */ diff --git a/firmware/PCB-Heater/Core/Src/gpio.c b/firmware/PCB-Heater/Core/Src/gpio.c index 77c5668..a25f3d7 100644 --- a/firmware/PCB-Heater/Core/Src/gpio.c +++ b/firmware/PCB-Heater/Core/Src/gpio.c @@ -45,8 +45,8 @@ void MX_GPIO_Init(void) GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOF_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE(); diff --git a/firmware/PCB-Heater/Core/Src/main.c b/firmware/PCB-Heater/Core/Src/main.c index 2efdbb2..037b6ae 100644 --- a/firmware/PCB-Heater/Core/Src/main.c +++ b/firmware/PCB-Heater/Core/Src/main.c @@ -22,6 +22,7 @@ #include "adc.h" #include "spi.h" #include "tim.h" +#include "usart.h" #include "gpio.h" /* Private includes ----------------------------------------------------------*/ @@ -95,6 +96,8 @@ int main(void) MX_SPI2_Init(); MX_TIM17_Init(); MX_TIM15_Init(); + MX_TIM14_Init(); + MX_USART1_UART_Init(); /* USER CODE BEGIN 2 */ __HAL_TIM_CLEAR_FLAG(&htim17, TIM_SR_UIF); //clear the update flag so it wont trigger right away; if (ST7793_Init() != 0) { diff --git a/firmware/PCB-Heater/Core/Src/tim.c b/firmware/PCB-Heater/Core/Src/tim.c index 82a510c..bf6b20c 100644 --- a/firmware/PCB-Heater/Core/Src/tim.c +++ b/firmware/PCB-Heater/Core/Src/tim.c @@ -25,6 +25,7 @@ /* USER CODE END 0 */ TIM_HandleTypeDef htim1; +TIM_HandleTypeDef htim14; TIM_HandleTypeDef htim15; TIM_HandleTypeDef htim17; @@ -131,6 +132,47 @@ void MX_TIM1_Init(void) /* USER CODE END TIM1_Init 2 */ HAL_TIM_MspPostInit(&htim1); +} +/* TIM14 init function */ +void MX_TIM14_Init(void) +{ + + /* USER CODE BEGIN TIM14_Init 0 */ + + /* USER CODE END TIM14_Init 0 */ + + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM14_Init 1 */ + + /* USER CODE END TIM14_Init 1 */ + htim14.Instance = TIM14; + htim14.Init.Prescaler = 0; + htim14.Init.CounterMode = TIM_COUNTERMODE_UP; + htim14.Init.Period = 65535; + htim14.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim14.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim14) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim14) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim14, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM14_Init 2 */ + + /* USER CODE END TIM14_Init 2 */ + HAL_TIM_MspPostInit(&htim14); + } /* TIM15 init function */ void MX_TIM15_Init(void) @@ -262,6 +304,17 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) /* USER CODE END TIM1_MspInit 1 */ } + else if(tim_baseHandle->Instance==TIM14) + { + /* USER CODE BEGIN TIM14_MspInit 0 */ + + /* USER CODE END TIM14_MspInit 0 */ + /* TIM14 clock enable */ + __HAL_RCC_TIM14_CLK_ENABLE(); + /* USER CODE BEGIN TIM14_MspInit 1 */ + + /* USER CODE END TIM14_MspInit 1 */ + } else if(tim_baseHandle->Instance==TIM15) { /* USER CODE BEGIN TIM15_MspInit 0 */ @@ -313,6 +366,27 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) /* USER CODE END TIM1_MspPostInit 1 */ } + else if(timHandle->Instance==TIM14) + { + /* USER CODE BEGIN TIM14_MspPostInit 0 */ + + /* USER CODE END TIM14_MspPostInit 0 */ + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**TIM14 GPIO Configuration + PC12 ------> TIM14_CH1 + */ + GPIO_InitStruct.Pin = FAN_PWM_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF2_TIM14; + HAL_GPIO_Init(FAN_PWM_GPIO_Port, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM14_MspPostInit 1 */ + + /* USER CODE END TIM14_MspPostInit 1 */ + } else if(timHandle->Instance==TIM15) { /* USER CODE BEGIN TIM15_MspPostInit 0 */ @@ -358,6 +432,17 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle) /* USER CODE END TIM1_MspDeInit 1 */ } + else if(tim_baseHandle->Instance==TIM14) + { + /* USER CODE BEGIN TIM14_MspDeInit 0 */ + + /* USER CODE END TIM14_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM14_CLK_DISABLE(); + /* USER CODE BEGIN TIM14_MspDeInit 1 */ + + /* USER CODE END TIM14_MspDeInit 1 */ + } else if(tim_baseHandle->Instance==TIM15) { /* USER CODE BEGIN TIM15_MspDeInit 0 */ diff --git a/firmware/PCB-Heater/Core/Src/usart.c b/firmware/PCB-Heater/Core/Src/usart.c new file mode 100644 index 0000000..f000d34 --- /dev/null +++ b/firmware/PCB-Heater/Core/Src/usart.c @@ -0,0 +1,140 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file usart.c + * @brief This file provides code for the configuration + * of the USART instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "usart.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +UART_HandleTypeDef huart1; + +/* USART1 init function */ + +void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ + +} + +void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + if(uartHandle->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + + /** Initializes the peripherals clocks + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + + /* USART1 clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + __HAL_RCC_GPIOB_CLK_ENABLE(); + /**USART1 GPIO Configuration + PB6 ------> USART1_TX + PB7 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF0_USART1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } +} + +void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) +{ + + if(uartHandle->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PB6 ------> USART1_TX + PB7 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/firmware/PCB-Heater/Debug/Core/Src/subdir.mk b/firmware/PCB-Heater/Debug/Core/Src/subdir.mk index 0dfc0a5..d7b6f5a 100644 --- a/firmware/PCB-Heater/Debug/Core/Src/subdir.mk +++ b/firmware/PCB-Heater/Debug/Core/Src/subdir.mk @@ -19,7 +19,8 @@ C_SRCS += \ ../Core/Src/syscalls.c \ ../Core/Src/sysmem.c \ ../Core/Src/system_stm32g0xx.c \ -../Core/Src/tim.c +../Core/Src/tim.c \ +../Core/Src/usart.c OBJS += \ ./Core/Src/adc.o \ @@ -36,7 +37,8 @@ OBJS += \ ./Core/Src/syscalls.o \ ./Core/Src/sysmem.o \ ./Core/Src/system_stm32g0xx.o \ -./Core/Src/tim.o +./Core/Src/tim.o \ +./Core/Src/usart.o C_DEPS += \ ./Core/Src/adc.d \ @@ -53,7 +55,8 @@ C_DEPS += \ ./Core/Src/syscalls.d \ ./Core/Src/sysmem.d \ ./Core/Src/system_stm32g0xx.d \ -./Core/Src/tim.d +./Core/Src/tim.d \ +./Core/Src/usart.d # Each subdirectory must supply rules for building sources it contributes @@ -63,7 +66,7 @@ Core/Src/%.o Core/Src/%.su: ../Core/Src/%.c Core/Src/subdir.mk clean: clean-Core-2f-Src clean-Core-2f-Src: - -$(RM) ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/app_freertos.d ./Core/Src/app_freertos.o ./Core/Src/app_freertos.su ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/max6675.d ./Core/Src/max6675.o ./Core/Src/max6675.su ./Core/Src/pid.d ./Core/Src/pid.o ./Core/Src/pid.su ./Core/Src/spi.d ./Core/Src/spi.o ./Core/Src/spi.su ./Core/Src/st7793_8bit.d ./Core/Src/st7793_8bit.o ./Core/Src/st7793_8bit.su ./Core/Src/stm32g0xx_hal_msp.d ./Core/Src/stm32g0xx_hal_msp.o ./Core/Src/stm32g0xx_hal_msp.su ./Core/Src/stm32g0xx_hal_timebase_tim.d ./Core/Src/stm32g0xx_hal_timebase_tim.o ./Core/Src/stm32g0xx_hal_timebase_tim.su ./Core/Src/stm32g0xx_it.d ./Core/Src/stm32g0xx_it.o ./Core/Src/stm32g0xx_it.su ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32g0xx.d ./Core/Src/system_stm32g0xx.o ./Core/Src/system_stm32g0xx.su ./Core/Src/tim.d ./Core/Src/tim.o ./Core/Src/tim.su + -$(RM) ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/app_freertos.d ./Core/Src/app_freertos.o ./Core/Src/app_freertos.su ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/max6675.d ./Core/Src/max6675.o ./Core/Src/max6675.su ./Core/Src/pid.d ./Core/Src/pid.o ./Core/Src/pid.su ./Core/Src/spi.d ./Core/Src/spi.o ./Core/Src/spi.su ./Core/Src/st7793_8bit.d ./Core/Src/st7793_8bit.o ./Core/Src/st7793_8bit.su ./Core/Src/stm32g0xx_hal_msp.d ./Core/Src/stm32g0xx_hal_msp.o ./Core/Src/stm32g0xx_hal_msp.su ./Core/Src/stm32g0xx_hal_timebase_tim.d ./Core/Src/stm32g0xx_hal_timebase_tim.o ./Core/Src/stm32g0xx_hal_timebase_tim.su ./Core/Src/stm32g0xx_it.d ./Core/Src/stm32g0xx_it.o ./Core/Src/stm32g0xx_it.su ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32g0xx.d ./Core/Src/system_stm32g0xx.o ./Core/Src/system_stm32g0xx.su ./Core/Src/tim.d ./Core/Src/tim.o ./Core/Src/tim.su ./Core/Src/usart.d ./Core/Src/usart.o ./Core/Src/usart.su .PHONY: clean-Core-2f-Src diff --git a/firmware/PCB-Heater/Debug/Drivers/STM32G0xx_HAL_Driver/Src/subdir.mk b/firmware/PCB-Heater/Debug/Drivers/STM32G0xx_HAL_Driver/Src/subdir.mk index aac3c83..4ac8ee9 100644 --- a/firmware/PCB-Heater/Debug/Drivers/STM32G0xx_HAL_Driver/Src/subdir.mk +++ b/firmware/PCB-Heater/Debug/Drivers/STM32G0xx_HAL_Driver/Src/subdir.mk @@ -23,6 +23,8 @@ C_SRCS += \ ../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c \ ../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c \ ../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c \ +../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c \ +../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \ ../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.c \ ../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.c \ ../Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c @@ -46,6 +48,8 @@ OBJS += \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.o \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.o \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.o \ +./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.o \ +./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.o \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.o \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.o \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.o @@ -69,6 +73,8 @@ C_DEPS += \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.d \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.d \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.d \ +./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.d \ +./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.d \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.d \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.d \ ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.d @@ -81,7 +87,7 @@ Drivers/STM32G0xx_HAL_Driver/Src/%.o Drivers/STM32G0xx_HAL_Driver/Src/%.su: ../D clean: clean-Drivers-2f-STM32G0xx_HAL_Driver-2f-Src clean-Drivers-2f-STM32G0xx_HAL_Driver-2f-Src: - -$(RM) ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.su + -$(RM) ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.su ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.d ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.o ./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.su .PHONY: clean-Drivers-2f-STM32G0xx_HAL_Driver-2f-Src diff --git a/firmware/PCB-Heater/Debug/PCB-Heater.list b/firmware/PCB-Heater/Debug/PCB-Heater.list index 5cf0249..5f3473c 100644 --- a/firmware/PCB-Heater/Debug/PCB-Heater.list +++ b/firmware/PCB-Heater/Debug/PCB-Heater.list @@ -5,45 +5,45 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000b8 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 0000e904 080000c0 080000c0 000100c0 2**4 + 1 .text 0000f544 080000c0 080000c0 000100c0 2**4 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 000019ec 0800e9c4 0800e9c4 0001e9c4 2**2 + 2 .rodata 00001a14 0800f604 0800f604 0001f604 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 080103b0 080103b0 000300b4 2**0 + 3 .ARM.extab 00000000 08011018 08011018 000300b4 2**0 CONTENTS - 4 .ARM 00000000 080103b0 080103b0 000300b4 2**0 + 4 .ARM 00000000 08011018 08011018 000300b4 2**0 CONTENTS - 5 .preinit_array 00000000 080103b0 080103b0 000300b4 2**0 + 5 .preinit_array 00000000 08011018 08011018 000300b4 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 080103b0 080103b0 000203b0 2**2 + 6 .init_array 00000004 08011018 08011018 00021018 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 080103b4 080103b4 000203b4 2**2 + 7 .fini_array 00000004 0801101c 0801101c 0002101c 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 000000b4 20000000 080103b8 00030000 2**2 + 8 .data 000000b4 20000000 08011020 00030000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 000028ac 200000b4 0801046c 000300b4 2**2 + 9 .bss 0000298c 200000b4 080110d4 000300b4 2**2 ALLOC - 10 ._user_heap_stack 00000600 20002960 0801046c 00032960 2**0 + 10 ._user_heap_stack 00000600 20002a40 080110d4 00032a40 2**0 ALLOC 11 .ARM.attributes 00000028 00000000 00000000 000300b4 2**0 CONTENTS, READONLY - 12 .debug_info 0001e603 00000000 00000000 000300dc 2**0 + 12 .debug_info 00024ce6 00000000 00000000 000300dc 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 000045eb 00000000 00000000 0004e6df 2**0 + 13 .debug_abbrev 00004dbd 00000000 00000000 00054dc2 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00001978 00000000 00000000 00052cd0 2**3 + 14 .debug_aranges 00001ca0 00000000 00000000 00059b80 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_ranges 00001770 00000000 00000000 00054648 2**3 + 15 .debug_ranges 00001a98 00000000 00000000 0005b820 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0001b41d 00000000 00000000 00055db8 2**0 + 16 .debug_macro 0001c402 00000000 00000000 0005d2b8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 0001d33a 00000000 00000000 000711d5 2**0 + 17 .debug_line 000223ae 00000000 00000000 000796ba 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 000a0e72 00000000 00000000 0008e50f 2**0 + 18 .debug_str 000a6bc2 00000000 00000000 0009ba68 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000050 00000000 00000000 0012f381 2**0 + 19 .comment 00000050 00000000 00000000 0014262a 2**0 CONTENTS, READONLY - 20 .debug_frame 000062e8 00000000 00000000 0012f3d4 2**2 + 20 .debug_frame 00006ea4 00000000 00000000 0014267c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -65,7 +65,7 @@ Disassembly of section .text: 80000da: bd10 pop {r4, pc} 80000dc: 200000b4 .word 0x200000b4 80000e0: 00000000 .word 0x00000000 - 80000e4: 0800e9ac .word 0x0800e9ac + 80000e4: 0800f5ec .word 0x0800f5ec 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc ) @@ -80,7 +80,7 @@ Disassembly of section .text: 80000fa: 46c0 nop ; (mov r8, r8) 80000fc: 00000000 .word 0x00000000 8000100: 200000b8 .word 0x200000b8 - 8000104: 0800e9ac .word 0x0800e9ac + 8000104: 0800f5ec .word 0x0800f5ec 08000108 : 8000108: 2300 movs r3, #0 @@ -1260,9 +1260,9 @@ Disassembly of section .text: 8000a16: 0a6d lsrs r5, r5, #9 8000a18: e74f b.n 80008ba <__aeabi_fdiv+0xc2> 8000a1a: 46c0 nop ; (mov r8, r8) - 8000a1c: 0800eb6c .word 0x0800eb6c + 8000a1c: 0800f7ac .word 0x0800f7ac 8000a20: f7ffffff .word 0xf7ffffff - 8000a24: 0800ebac .word 0x0800ebac + 8000a24: 0800f7ec .word 0x0800f7ec 08000a28 <__eqsf2>: 8000a28: b570 push {r4, r5, r6, lr} @@ -1735,7 +1735,7 @@ Disassembly of section .text: 8000dc6: 0a64 lsrs r4, r4, #9 8000dc8: e724 b.n 8000c14 <__aeabi_fmul+0x8c> 8000dca: 46c0 nop ; (mov r8, r8) - 8000dcc: 0800ebec .word 0x0800ebec + 8000dcc: 0800f82c .word 0x0800f82c 8000dd0: f7ffffff .word 0xf7ffffff 08000dd4 <__aeabi_fsub>: @@ -2799,7 +2799,7 @@ Disassembly of section .text: 800161a: 46c0 nop ; (mov r8, r8) 800161c: 000007ff .word 0x000007ff 8001620: fffffc01 .word 0xfffffc01 - 8001624: 0800ec2c .word 0x0800ec2c + 8001624: 0800f86c .word 0x0800f86c 8001628: 000003ff .word 0x000003ff 800162c: feffffff .word 0xfeffffff 8001630: 000007fe .word 0x000007fe @@ -3182,7 +3182,7 @@ void MX_ADC1_Init(void) 800191e: 230c movs r3, #12 8001920: 001a movs r2, r3 8001922: 2100 movs r1, #0 - 8001924: f00c fb53 bl 800dfce + 8001924: f00d f973 bl 800ec0e /* USER CODE END ADC1_Init 1 */ @@ -3271,12 +3271,12 @@ void MX_ADC1_Init(void) if (HAL_ADC_Init(&hadc1) != HAL_OK) 80019a2: 4b0f ldr r3, [pc, #60] ; (80019e0 ) 80019a4: 0018 movs r0, r3 - 80019a6: f004 fcc5 bl 8006334 + 80019a6: f004 fe09 bl 80065bc 80019aa: 1e03 subs r3, r0, #0 80019ac: d001 beq.n 80019b2 { Error_Handler(); - 80019ae: f001 fee3 bl 8003778 + 80019ae: f001 fee7 bl 8003780 } /** Configure Regular Channel @@ -3298,12 +3298,12 @@ void MX_ADC1_Init(void) 80019c6: 4b06 ldr r3, [pc, #24] ; (80019e0 ) 80019c8: 0011 movs r1, r2 80019ca: 0018 movs r0, r3 - 80019cc: f004 ff84 bl 80068d8 + 80019cc: f005 f8c8 bl 8006b60 80019d0: 1e03 subs r3, r0, #0 80019d2: d001 beq.n 80019d8 { Error_Handler(); - 80019d4: f001 fed0 bl 8003778 + 80019d4: f001 fed4 bl 8003780 } /* USER CODE BEGIN ADC1_Init 2 */ @@ -3334,7 +3334,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) 80019fa: 2314 movs r3, #20 80019fc: 001a movs r2, r3 80019fe: 2100 movs r1, #0 - 8001a00: f00c fae5 bl 800dfce + 8001a00: f00d f905 bl 800ec0e RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8001a04: 2410 movs r4, #16 8001a06: 193b adds r3, r7, r4 @@ -3342,7 +3342,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) 8001a0a: 231c movs r3, #28 8001a0c: 001a movs r2, r3 8001a0e: 2100 movs r1, #0 - 8001a10: f00c fadd bl 800dfce + 8001a10: f00d f8fd bl 800ec0e if(adcHandle->Instance==ADC1) 8001a14: 687b ldr r3, [r7, #4] 8001a16: 681b ldr r3, [r3, #0] @@ -3366,12 +3366,12 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8001a2c: 193b adds r3, r7, r4 8001a2e: 0018 movs r0, r3 - 8001a30: f006 fb04 bl 800803c + 8001a30: f006 fc48 bl 80082c4 8001a34: 1e03 subs r3, r0, #0 8001a36: d001 beq.n 8001a3c { Error_Handler(); - 8001a38: f001 fe9e bl 8003778 + 8001a38: f001 fea2 bl 8003780 } /* ADC1 clock enable */ @@ -3425,7 +3425,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) 8001a86: 4a06 ldr r2, [pc, #24] ; (8001aa0 ) 8001a88: 0019 movs r1, r3 8001a8a: 0010 movs r0, r2 - 8001a8c: f005 fc26 bl 80072dc + 8001a8c: f005 fd6a bl 8007564 /* USER CODE BEGIN ADC1_MspInit 1 */ @@ -3457,7 +3457,7 @@ void MX_FREERTOS_Init(void) { mutScreenHandle = osMutexNew(&mutScreen_attributes); 8001aa8: 4b1f ldr r3, [pc, #124] ; (8001b28 ) 8001aaa: 0018 movs r0, r3 - 8001aac: f009 fa69 bl 800af82 + 8001aac: f00a f88b bl 800bbc6 8001ab0: 0002 movs r2, r0 8001ab2: 4b1e ldr r3, [pc, #120] ; (8001b2c ) 8001ab4: 601a str r2, [r3, #0] @@ -3471,7 +3471,7 @@ void MX_FREERTOS_Init(void) { 8001ab8: 481e ldr r0, [pc, #120] ; (8001b34 ) 8001aba: 2200 movs r2, #0 8001abc: 2101 movs r1, #1 - 8001abe: f009 f975 bl 800adac + 8001abe: f009 ff97 bl 800b9f0 8001ac2: 0002 movs r2, r0 8001ac4: 4b1c ldr r3, [pc, #112] ; (8001b38 ) 8001ac6: 601a str r2, [r3, #0] @@ -3485,7 +3485,7 @@ void MX_FREERTOS_Init(void) { 8001aca: 001a movs r2, r3 8001acc: 2104 movs r1, #4 8001ace: 2008 movs r0, #8 - 8001ad0: f009 fb70 bl 800b1b4 + 8001ad0: f00a f992 bl 800bdf8 8001ad4: 0002 movs r2, r0 8001ad6: 4b1a ldr r3, [pc, #104] ; (8001b40 ) 8001ad8: 601a str r2, [r3, #0] @@ -3496,7 +3496,7 @@ void MX_FREERTOS_Init(void) { 8001adc: 001a movs r2, r3 8001ade: 2106 movs r1, #6 8001ae0: 2008 movs r0, #8 - 8001ae2: f009 fb67 bl 800b1b4 + 8001ae2: f00a f989 bl 800bdf8 8001ae6: 0002 movs r2, r0 8001ae8: 4b17 ldr r3, [pc, #92] ; (8001b48 ) 8001aea: 601a str r2, [r3, #0] @@ -3510,7 +3510,7 @@ void MX_FREERTOS_Init(void) { 8001aee: 4b18 ldr r3, [pc, #96] ; (8001b50 ) 8001af0: 2100 movs r1, #0 8001af2: 0018 movs r0, r3 - 8001af4: f009 f890 bl 800ac18 + 8001af4: f009 feb2 bl 800b85c 8001af8: 0002 movs r2, r0 8001afa: 4b16 ldr r3, [pc, #88] ; (8001b54 ) 8001afc: 601a str r2, [r3, #0] @@ -3521,7 +3521,7 @@ void MX_FREERTOS_Init(void) { 8001b00: 4b16 ldr r3, [pc, #88] ; (8001b5c ) 8001b02: 2100 movs r1, #0 8001b04: 0018 movs r0, r3 - 8001b06: f009 f887 bl 800ac18 + 8001b06: f009 fea9 bl 800b85c 8001b0a: 0002 movs r2, r0 8001b0c: 4b14 ldr r3, [pc, #80] ; (8001b60 ) 8001b0e: 601a str r2, [r3, #0] @@ -3532,7 +3532,7 @@ void MX_FREERTOS_Init(void) { 8001b12: 4b15 ldr r3, [pc, #84] ; (8001b68 ) 8001b14: 2100 movs r1, #0 8001b16: 0018 movs r0, r3 - 8001b18: f009 f87e bl 800ac18 + 8001b18: f009 fea0 bl 800b85c 8001b1c: 0002 movs r2, r0 8001b1e: 4b13 ldr r3, [pc, #76] ; (8001b6c ) 8001b20: 601a str r2, [r3, #0] @@ -3545,22 +3545,22 @@ void MX_FREERTOS_Init(void) { 8001b22: 46c0 nop ; (mov r8, r8) 8001b24: 46bd mov sp, r7 8001b26: bd80 pop {r7, pc} - 8001b28: 0800f3a8 .word 0x0800f3a8 + 8001b28: 0800ffe8 .word 0x0800ffe8 8001b2c: 20000168 .word 0x20000168 - 8001b30: 0800f398 .word 0x0800f398 + 8001b30: 0800ffd8 .word 0x0800ffd8 8001b34: 08002129 .word 0x08002129 8001b38: 20000164 .word 0x20000164 - 8001b3c: 0800f368 .word 0x0800f368 + 8001b3c: 0800ffa8 .word 0x0800ffa8 8001b40: 2000015c .word 0x2000015c - 8001b44: 0800f380 .word 0x0800f380 + 8001b44: 0800ffc0 .word 0x0800ffc0 8001b48: 20000160 .word 0x20000160 - 8001b4c: 0800f2fc .word 0x0800f2fc + 8001b4c: 0800ff3c .word 0x0800ff3c 8001b50: 08001b71 .word 0x08001b71 8001b54: 20000150 .word 0x20000150 - 8001b58: 0800f320 .word 0x0800f320 + 8001b58: 0800ff60 .word 0x0800ff60 8001b5c: 08001eb9 .word 0x08001eb9 8001b60: 20000154 .word 0x20000154 - 8001b64: 0800f344 .word 0x0800f344 + 8001b64: 0800ff84 .word 0x0800ff84 8001b68: 08002089 .word 0x08002089 8001b6c: 20000158 .word 0x20000158 @@ -3591,7 +3591,7 @@ void svc_display(void *argument) 8001b84: 23fa movs r3, #250 ; 0xfa 8001b86: 011b lsls r3, r3, #4 8001b88: 0018 movs r0, r3 - 8001b8a: f009 f8db bl 800ad44 + 8001b8a: f009 fefd bl 800b988 } drawMainScreen(); @@ -3626,7 +3626,7 @@ void svc_display(void *argument) 8001bb8: 4252 negs r2, r2 8001bba: 0011 movs r1, r2 8001bbc: 0018 movs r0, r3 - 8001bbe: f009 fa6c bl 800b09a + 8001bbe: f00a f88e bl 800bcde drawButton(lastPressed, 0); 8001bc2: 4bab ldr r3, [pc, #684] ; (8001e70 ) 8001bc4: 781b ldrb r3, [r3, #0] @@ -3637,7 +3637,7 @@ void svc_display(void *argument) 8001bce: 4bab ldr r3, [pc, #684] ; (8001e7c ) 8001bd0: 681b ldr r3, [r3, #0] 8001bd2: 0018 movs r0, r3 - 8001bd4: f009 fab0 bl 800b138 + 8001bd4: f00a f8d2 bl 800bd7c } lpcnt = 0; 8001bd8: 4ba6 ldr r3, [pc, #664] ; (8001e74 ) @@ -3661,7 +3661,7 @@ void svc_display(void *argument) 8001bf2: 4ba3 ldr r3, [pc, #652] ; (8001e80 ) 8001bf4: 681b ldr r3, [r3, #0] 8001bf6: 0018 movs r0, r3 - 8001bf8: f009 fc0c bl 800b414 + 8001bf8: f00a fa2e bl 800c058 8001bfc: 1e03 subs r3, r0, #0 8001bfe: d100 bne.n 8001c02 8001c00: e0cf b.n 8001da2 @@ -3672,7 +3672,7 @@ void svc_display(void *argument) 8001c08: 18f9 adds r1, r7, r3 8001c0a: 2364 movs r3, #100 ; 0x64 8001c0c: 2200 movs r2, #0 - 8001c0e: f009 fba7 bl 800b360 + 8001c0e: f00a f9c9 bl 800bfa4 ST7793_DrawString(Black, Lightgray, str, 205, 75); osMutexRelease(mutScreenHandle); */ @@ -3756,7 +3756,7 @@ void svc_display(void *argument) 8001c9e: 9300 str r3, [sp, #0] 8001ca0: 002b movs r3, r5 8001ca2: 0022 movs r2, r4 - 8001ca4: f003 fcf6 bl 8005694 + 8001ca4: f003 fcfa bl 800569c 8001ca8: 1e03 subs r3, r0, #0 (scr_buttons[Screen] >> id) & 1 && 8001caa: d06f beq.n 8001d8c @@ -3778,7 +3778,7 @@ void svc_display(void *argument) 8001cc0: 4252 negs r2, r2 8001cc2: 0011 movs r1, r2 8001cc4: 0018 movs r0, r3 - 8001cc6: f009 f9e8 bl 800b09a + 8001cc6: f00a f80a bl 800bcde if (id < 4) { 8001cca: 4b6e ldr r3, [pc, #440] ; (8001e84 ) 8001ccc: 781b ldrb r3, [r3, #0] @@ -3797,7 +3797,7 @@ void svc_display(void *argument) 8001ce4: 330e adds r3, #14 8001ce6: 781b ldrb r3, [r3, #0] 8001ce8: 0018 movs r0, r3 - 8001cea: f002 fbe9 bl 80044c0 + 8001cea: f002 fbed bl 80044c8 drawButton(Preset, 0); 8001cee: 4b68 ldr r3, [pc, #416] ; (8001e90 ) 8001cf0: 781b ldrb r3, [r3, #0] @@ -3812,7 +3812,7 @@ void svc_display(void *argument) 8001d00: 701a strb r2, [r3, #0] ST7793_SetFontSize(1); 8001d02: 2001 movs r0, #1 - 8001d04: f002 fbdc bl 80044c0 + 8001d04: f002 fbe0 bl 80044c8 ST7793_FillRect(Darkergray, 10, 18, 190, 34); 8001d08: 4862 ldr r0, [pc, #392] ; (8001e94 ) 8001d0a: 2322 movs r3, #34 ; 0x22 @@ -3820,7 +3820,7 @@ void svc_display(void *argument) 8001d0e: 23be movs r3, #190 ; 0xbe 8001d10: 2212 movs r2, #18 8001d12: 210a movs r1, #10 - 8001d14: f002 f9f4 bl 8004100 + 8001d14: f002 f9f8 bl 8004108 ST7793_DrawStringC(White, Darkergray, presets[Preset].name, 10, 18); 8001d18: 4b5d ldr r3, [pc, #372] ; (8001e90 ) 8001d1a: 781b ldrb r3, [r3, #0] @@ -3839,7 +3839,7 @@ void svc_display(void *argument) 8001d34: 2312 movs r3, #18 8001d36: 9300 str r3, [sp, #0] 8001d38: 230a movs r3, #10 - 8001d3a: f002 fe33 bl 80049a4 + 8001d3a: f002 fe37 bl 80049ac } ST7793_SetFontSize(buttons[id].fontsize); 8001d3e: 4b51 ldr r3, [pc, #324] ; (8001e84 ) @@ -3854,7 +3854,7 @@ void svc_display(void *argument) 8001d50: 330e adds r3, #14 8001d52: 781b ldrb r3, [r3, #0] 8001d54: 0018 movs r0, r3 - 8001d56: f002 fbb3 bl 80044c0 + 8001d56: f002 fbb7 bl 80044c8 drawButton(id, 1); 8001d5a: 4b4a ldr r3, [pc, #296] ; (8001e84 ) 8001d5c: 781b ldrb r3, [r3, #0] @@ -3875,7 +3875,7 @@ void svc_display(void *argument) 8001d78: 4b40 ldr r3, [pc, #256] ; (8001e7c ) 8001d7a: 681b ldr r3, [r3, #0] 8001d7c: 0018 movs r0, r3 - 8001d7e: f009 f9db bl 800b138 + 8001d7e: f009 fffd bl 800bd7c btnPressed(id); 8001d82: 4b40 ldr r3, [pc, #256] ; (8001e84 ) @@ -3903,7 +3903,7 @@ void svc_display(void *argument) 8001da2: 4b3f ldr r3, [pc, #252] ; (8001ea0 ) 8001da4: 681b ldr r3, [r3, #0] 8001da6: 0018 movs r0, r3 - 8001da8: f009 fb34 bl 800b414 + 8001da8: f00a f956 bl 800c058 8001dac: 1e03 subs r3, r0, #0 8001dae: d059 beq.n 8001e64 osMessageQueueGet(tempUpdateHandle, &temp, NULL, 100); @@ -3913,7 +3913,7 @@ void svc_display(void *argument) 8001db6: 18f9 adds r1, r7, r3 8001db8: 2364 movs r3, #100 ; 0x64 8001dba: 2200 movs r2, #0 - 8001dbc: f009 fad0 bl 800b360 + 8001dbc: f00a f8f2 bl 800bfa4 if (Screen == SCR_MAIN || Screen == SCR_RUNNING) { 8001dc0: 4b2d ldr r3, [pc, #180] ; (8001e78 ) 8001dc2: 781b ldrb r3, [r3, #0] @@ -3943,7 +3943,7 @@ void svc_display(void *argument) 8001dec: 4a2d ldr r2, [pc, #180] ; (8001ea4 ) 8001dee: 482e ldr r0, [pc, #184] ; (8001ea8 ) 8001df0: 2109 movs r1, #9 - 8001df2: f00c fa13 bl 800e21c + 8001df2: f00d f833 bl 800ee5c 8001df6: e01a b.n 8001e2e } else { if (temp == -2.0f) snprintf(str, 3, "NC"); @@ -3958,7 +3958,7 @@ void svc_display(void *argument) 8001e0a: 4b27 ldr r3, [pc, #156] ; (8001ea8 ) 8001e0c: 2103 movs r1, #3 8001e0e: 0018 movs r0, r3 - 8001e10: f00c fa04 bl 800e21c + 8001e10: f00d f824 bl 800ee5c if (temp == -1.0f) snprintf(str, 4, "SPI"); 8001e14: 68bb ldr r3, [r7, #8] 8001e16: 4926 ldr r1, [pc, #152] ; (8001eb0 ) @@ -3970,7 +3970,7 @@ void svc_display(void *argument) 8001e24: 4b20 ldr r3, [pc, #128] ; (8001ea8 ) 8001e26: 2104 movs r1, #4 8001e28: 0018 movs r0, r3 - 8001e2a: f00c f9f7 bl 800e21c + 8001e2a: f00d f817 bl 800ee5c } osMutexAcquire(mutScreenHandle, osWaitForever); @@ -3980,10 +3980,10 @@ void svc_display(void *argument) 8001e34: 4252 negs r2, r2 8001e36: 0011 movs r1, r2 8001e38: 0018 movs r0, r3 - 8001e3a: f009 f92e bl 800b09a + 8001e3a: f009 ff50 bl 800bcde ST7793_SetFontSize(2); 8001e3e: 2002 movs r0, #2 - 8001e40: f002 fb3e bl 80044c0 + 8001e40: f002 fb42 bl 80044c8 //ST7793_FillRect(Darkergray, 374, 208, 390, 235); ST7793_DrawString(Red, Darkergray, str, 310, 208); 8001e44: 239b movs r3, #155 ; 0x9b @@ -3995,19 +3995,19 @@ void svc_display(void *argument) 8001e50: 21d0 movs r1, #208 ; 0xd0 8001e52: 9100 str r1, [sp, #0] 8001e54: 0021 movs r1, r4 - 8001e56: f002 fd55 bl 8004904 + 8001e56: f002 fd59 bl 800490c osMutexRelease(mutScreenHandle); 8001e5a: 4b08 ldr r3, [pc, #32] ; (8001e7c ) 8001e5c: 681b ldr r3, [r3, #0] 8001e5e: 0018 movs r0, r3 - 8001e60: f009 f96a bl 800b138 + 8001e60: f009 ff8c bl 800bd7c } } osDelay(50); 8001e64: 2032 movs r0, #50 ; 0x32 - 8001e66: f008 ff6d bl 800ad44 + 8001e66: f009 fd8f bl 800b988 if (lastPressed != 0xFF) { 8001e6a: e692 b.n 8001b92 8001e6c: 20000004 .word 0x20000004 @@ -4017,18 +4017,18 @@ void svc_display(void *argument) 8001e7c: 20000168 .word 0x20000168 8001e80: 20000160 .word 0x20000160 8001e84: 20000177 .word 0x20000177 - 8001e88: 0800f224 .word 0x0800f224 - 8001e8c: 0800f094 .word 0x0800f094 + 8001e88: 0800fe64 .word 0x0800fe64 + 8001e8c: 0800fcd4 .word 0x0800fcd4 8001e90: 20000134 .word 0x20000134 8001e94: 000039c7 .word 0x000039c7 - 8001e98: 0800f25c .word 0x0800f25c + 8001e98: 0800fe9c .word 0x0800fe9c 8001e9c: 0000ffff .word 0x0000ffff 8001ea0: 2000015c .word 0x2000015c - 8001ea4: 0800ea78 .word 0x0800ea78 + 8001ea4: 0800f6b8 .word 0x0800f6b8 8001ea8: 20000178 .word 0x20000178 - 8001eac: 0800ea80 .word 0x0800ea80 + 8001eac: 0800f6c0 .word 0x0800f6c0 8001eb0: bf800000 .word 0xbf800000 - 8001eb4: 0800ea84 .word 0x0800ea84 + 8001eb4: 0800f6c4 .word 0x0800f6c4 08001eb8 : * @param argument: Not used @@ -4049,7 +4049,7 @@ void svc_sensor(void *argument) PID_Init(&pid); 8001ec0: 4b64 ldr r3, [pc, #400] ; (8002054 ) 8001ec2: 0018 movs r0, r3 - 8001ec4: f001 fcb2 bl 800382c + 8001ec4: f001 fcb6 bl 8003834 for(;;) { @@ -4063,7 +4063,7 @@ void svc_sensor(void *argument) 8001ed2: 701a strb r2, [r3, #0] 8001ed4: e016 b.n 8001f04 temp = MAX6675_GetTemp(); - 8001ed6: f001 fc55 bl 8003784 + 8001ed6: f001 fc59 bl 800378c 8001eda: 1c03 adds r3, r0, #0 8001edc: 61fb str r3, [r7, #28] if (temp < 0.0f) break; //if there is an error - break out @@ -4119,7 +4119,7 @@ void svc_sensor(void *argument) 8001f36: 494a ldr r1, [pc, #296] ; (8002060 ) 8001f38: 4b46 ldr r3, [pc, #280] ; (8002054 ) 8001f3a: 0018 movs r0, r3 - 8001f3c: f001 fc8d bl 800385a + 8001f3c: f001 fc91 bl 8003862 pulse = (uint16_t)(pid.limMax - pid.out)+20; 8001f40: 4b44 ldr r3, [pc, #272] ; (8002054 ) 8001f42: 695a ldr r2, [r3, #20] @@ -4158,7 +4158,7 @@ void svc_sensor(void *argument) PID_Init(&pid); 8001f7e: 4b35 ldr r3, [pc, #212] ; (8002054 ) 8001f80: 0018 movs r0, r3 - 8001f82: f001 fc53 bl 800382c + 8001f82: f001 fc57 bl 8003834 TIM1->CCR2 = 1020; 8001f86: 4b37 ldr r3, [pc, #220] ; (8002064 ) 8001f88: 22ff movs r2, #255 ; 0xff @@ -4186,7 +4186,7 @@ void svc_sensor(void *argument) 8001fac: 18f9 adds r1, r7, r3 8001fae: 2332 movs r3, #50 ; 0x32 8001fb0: 2200 movs r2, #0 - 8001fb2: f009 f979 bl 800b2a8 + 8001fb2: f009 ff9b bl 800beec } //Draw PID value @@ -4228,7 +4228,7 @@ void svc_sensor(void *argument) 8001ffe: 9300 str r3, [sp, #0] 8002000: 000b movs r3, r1 8002002: 2107 movs r1, #7 - 8002004: f00c f90a bl 800e21c + 8002004: f00c ff2a bl 800ee5c osMutexAcquire(mutScreenHandle, osWaitForever); 8002008: 4b1d ldr r3, [pc, #116] ; (8002080 ) 800200a: 681b ldr r3, [r3, #0] @@ -4236,10 +4236,10 @@ void svc_sensor(void *argument) 800200e: 4252 negs r2, r2 8002010: 0011 movs r1, r2 8002012: 0018 movs r0, r3 - 8002014: f009 f841 bl 800b09a + 8002014: f009 fe63 bl 800bcde ST7793_SetFontSize(1); 8002018: 2001 movs r0, #1 - 800201a: f002 fa51 bl 80044c0 + 800201a: f002 fa55 bl 80044c8 ST7793_FillRect(Darkergray, 11, 180, 27, 192); 800201e: 4819 ldr r0, [pc, #100] ; (8002084 ) 8002020: 23c0 movs r3, #192 ; 0xc0 @@ -4247,7 +4247,7 @@ void svc_sensor(void *argument) 8002024: 231b movs r3, #27 8002026: 22b4 movs r2, #180 ; 0xb4 8002028: 210b movs r1, #11 - 800202a: f002 f869 bl 8004100 + 800202a: f002 f86d bl 8004108 ST7793_DrawString(Black, Darkergray, str, 11, 180); 800202e: 4a13 ldr r2, [pc, #76] ; (800207c ) 8002030: 4914 ldr r1, [pc, #80] ; (8002084 ) @@ -4255,19 +4255,19 @@ void svc_sensor(void *argument) 8002034: 9300 str r3, [sp, #0] 8002036: 230b movs r3, #11 8002038: 2000 movs r0, #0 - 800203a: f002 fc63 bl 8004904 + 800203a: f002 fc67 bl 800490c osMutexRelease(mutScreenHandle); 800203e: 4b10 ldr r3, [pc, #64] ; (8002080 ) 8002040: 681b ldr r3, [r3, #0] 8002042: 0018 movs r0, r3 - 8002044: f009 f878 bl 800b138 + 8002044: f009 fe9a bl 800bd7c } osDelay(500); 8002048: 23fa movs r3, #250 ; 0xfa 800204a: 005b lsls r3, r3, #1 800204c: 0018 movs r0, r3 - 800204e: f008 fe79 bl 800ad44 + 800204e: f009 fc9b bl 800b988 res = 0; 8002052: e739 b.n 8001ec8 8002054: 2000000c .word 0x2000000c @@ -4279,7 +4279,7 @@ void svc_sensor(void *argument) 800206c: 2000015c .word 0x2000015c 8002070: 20000000 .word 0x20000000 8002074: 42c80000 .word 0x42c80000 - 8002078: 0800ea88 .word 0x0800ea88 + 8002078: 0800f6c8 .word 0x0800f6c8 800207c: 20000184 .word 0x20000184 8002080: 20000168 .word 0x20000168 8002084: 000039c7 .word 0x000039c7 @@ -4316,25 +4316,25 @@ void svc_touch(void *argument) 80020a6: 4252 negs r2, r2 80020a8: 0011 movs r1, r2 80020aa: 0018 movs r0, r3 - 80020ac: f008 fff5 bl 800b09a + 80020ac: f009 fe17 bl 800bcde //Protected Screen access code t = ST7793_CheckTouch(); 80020b0: 2514 movs r5, #20 80020b2: 197c adds r4, r7, r5 80020b4: 003b movs r3, r7 80020b6: 0018 movs r0, r3 - 80020b8: f003 fa76 bl 80055a8 + 80020b8: f003 fa7a bl 80055b0 80020bc: 003b movs r3, r7 80020be: 0020 movs r0, r4 80020c0: 0019 movs r1, r3 80020c2: 2306 movs r3, #6 80020c4: 001a movs r2, r3 - 80020c6: f00b ff79 bl 800dfbc + 80020c6: f00c fd99 bl 800ebfc osMutexRelease(mutScreenHandle); 80020ca: 4b15 ldr r3, [pc, #84] ; (8002120 ) 80020cc: 681b ldr r3, [r3, #0] 80020ce: 0018 movs r0, r3 - 80020d0: f009 f832 bl 800b138 + 80020d0: f009 fe54 bl 800bd7c if (t.z > ST7793_Z_THRESHOLD) { 80020d4: 0029 movs r1, r5 @@ -4373,13 +4373,13 @@ void svc_touch(void *argument) 800210e: 1879 adds r1, r7, r1 8002110: 2332 movs r3, #50 ; 0x32 8002112: 2200 movs r2, #0 - 8002114: f009 f8c8 bl 800b2a8 + 8002114: f009 feea bl 800beec } } osDelay(80); 8002118: 2050 movs r0, #80 ; 0x50 - 800211a: f008 fe13 bl 800ad44 + 800211a: f009 fc35 bl 800b988 osMutexAcquire(mutScreenHandle, osWaitForever); 800211e: e7bf b.n 80020a0 8002120: 20000168 .word 0x20000168 @@ -4413,7 +4413,7 @@ void clockTick(void *argument) 8002140: 4b40 ldr r3, [pc, #256] ; (8002244 ) 8002142: 681b ldr r3, [r3, #0] 8002144: 0018 movs r0, r3 - 8002146: f008 fee5 bl 800af14 + 8002146: f009 fd07 bl 800bb58 return; 800214a: e1ed b.n 8002528 } @@ -4496,7 +4496,7 @@ void clockTick(void *argument) 80021d8: 4252 negs r2, r2 80021da: 0011 movs r1, r2 80021dc: 0018 movs r0, r3 - 80021de: f008 ff5c bl 800b09a + 80021de: f009 fd7e bl 800bcde if (Timer >= presets[Preset].time[4]) { 80021e2: 4b1c ldr r3, [pc, #112] ; (8002254 ) @@ -4523,10 +4523,10 @@ void clockTick(void *argument) 800220a: 221e movs r2, #30 800220c: 9200 str r2, [sp, #0] 800220e: 2205 movs r2, #5 - 8002210: f001 ff76 bl 8004100 + 8002210: f001 ff7a bl 8004108 ST7793_SetFontSize(2); 8002214: 2002 movs r0, #2 - 8002216: f002 f953 bl 80044c0 + 8002216: f002 f957 bl 80044c8 ST7793_DrawStringC(Yellow, Darkergray, "Done!", 210, 5); 800221a: 4a14 ldr r2, [pc, #80] ; (800226c ) 800221c: 4912 ldr r1, [pc, #72] ; (8002268 ) @@ -4534,17 +4534,17 @@ void clockTick(void *argument) 8002220: 2305 movs r3, #5 8002222: 9300 str r3, [sp, #0] 8002224: 23d2 movs r3, #210 ; 0xd2 - 8002226: f002 fbbd bl 80049a4 + 8002226: f002 fbc1 bl 80049ac osMutexRelease(mutScreenHandle); 800222a: 4b0e ldr r3, [pc, #56] ; (8002264 ) 800222c: 681b ldr r3, [r3, #0] 800222e: 0018 movs r0, r3 - 8002230: f008 ff82 bl 800b138 + 8002230: f009 fda4 bl 800bd7c osTimerStop(secTimerHandle); 8002234: 4b03 ldr r3, [pc, #12] ; (8002244 ) 8002236: 681b ldr r3, [r3, #0] 8002238: 0018 movs r0, r3 - 800223a: f008 fe6b bl 800af14 + 800223a: f009 fc8d bl 800bb58 return; 800223e: e173 b.n 8002528 8002240: 20000138 .word 0x20000138 @@ -4554,11 +4554,11 @@ void clockTick(void *argument) 8002250: 20000192 .word 0x20000192 8002254: 20000134 .word 0x20000134 8002258: 20000140 .word 0x20000140 - 800225c: 0800f25c .word 0x0800f25c + 800225c: 0800fe9c .word 0x0800fe9c 8002260: 20000194 .word 0x20000194 8002264: 20000168 .word 0x20000168 8002268: 000039c7 .word 0x000039c7 - 800226c: 0800ea94 .word 0x0800ea94 + 800226c: 0800f6d4 .word 0x0800f6d4 8002270: 0000ffe0 .word 0x0000ffe0 } @@ -4584,10 +4584,10 @@ void clockTick(void *argument) 800229c: 9300 str r3, [sp, #0] 800229e: 0023 movs r3, r4 80022a0: 2106 movs r1, #6 - 80022a2: f00b ffbb bl 800e21c + 80022a2: f00c fddb bl 800ee5c ST7793_SetFontSize(2); 80022a6: 2002 movs r0, #2 - 80022a8: f002 f90a bl 80044c0 + 80022a8: f002 f90e bl 80044c8 ST7793_DrawString(Cyan, Darkergray, str, 106, 208); 80022ac: 197a adds r2, r7, r5 80022ae: 49a2 ldr r1, [pc, #648] ; (8002538 ) @@ -4595,7 +4595,7 @@ void clockTick(void *argument) 80022b2: 23d0 movs r3, #208 ; 0xd0 80022b4: 9300 str r3, [sp, #0] 80022b6: 236a movs r3, #106 ; 0x6a - 80022b8: f002 fb24 bl 8004904 + 80022b8: f002 fb28 bl 800490c //Draw a dot only if temperature is higher than the bottom of the graph if (Temperature >= 20.0f) { 80022bc: 4ba0 ldr r3, [pc, #640] ; (8002540 ) @@ -4670,7 +4670,7 @@ void clockTick(void *argument) 8002352: 9300 str r3, [sp, #0] 8002354: 002b movs r3, r5 8002356: 0022 movs r2, r4 - 8002358: f001 fed2 bl 8004100 + 8002358: f001 fed6 bl 8004108 } //Check if we have a new stage started @@ -4712,10 +4712,10 @@ void clockTick(void *argument) 800239c: 221e movs r2, #30 800239e: 9200 str r2, [sp, #0] 80023a0: 2205 movs r2, #5 - 80023a2: f001 fead bl 8004100 + 80023a2: f001 feb1 bl 8004108 ST7793_SetFontSize(2); 80023a6: 2002 movs r0, #2 - 80023a8: f002 f88a bl 80044c0 + 80023a8: f002 f88e bl 80044c8 ST7793_DrawStringC(Yellow, Darkergray, stageNames[Stage], 210, 5); 80023ac: 4b6b ldr r3, [pc, #428] ; (800255c ) 80023ae: 781b ldrb r3, [r3, #0] @@ -4727,7 +4727,7 @@ void clockTick(void *argument) 80023ba: 2305 movs r3, #5 80023bc: 9300 str r3, [sp, #0] 80023be: 23d2 movs r3, #210 ; 0xd2 - 80023c0: f002 faf0 bl 80049a4 + 80023c0: f002 faf4 bl 80049ac stime = presets[Preset].time[Stage-1]; 80023c4: 4b64 ldr r3, [pc, #400] ; (8002558 ) 80023c6: 781b ldrb r3, [r3, #0] @@ -4883,10 +4883,10 @@ void clockTick(void *argument) 80024fe: 9300 str r3, [sp, #0] 8002500: 002b movs r3, r5 8002502: 2108 movs r1, #8 - 8002504: f00b fe8a bl 800e21c + 8002504: f00c fcaa bl 800ee5c ST7793_SetFontSize(1); 8002508: 2001 movs r0, #1 - 800250a: f001 ffd9 bl 80044c0 + 800250a: f001 ffdd bl 80044c8 ST7793_DrawString(Black, Darkergray, str, 10, 140); 800250e: 193a adds r2, r7, r4 8002510: 4909 ldr r1, [pc, #36] ; (8002538 ) @@ -4894,13 +4894,13 @@ void clockTick(void *argument) 8002514: 9300 str r3, [sp, #0] 8002516: 230a movs r3, #10 8002518: 2000 movs r0, #0 - 800251a: f002 f9f3 bl 8004904 + 800251a: f002 f9f7 bl 800490c osMutexRelease(mutScreenHandle); 800251e: 4b19 ldr r3, [pc, #100] ; (8002584 ) 8002520: 681b ldr r3, [r3, #0] 8002522: 0018 movs r0, r3 - 8002524: f008 fe08 bl 800b138 + 8002524: f009 fc2a bl 800bd7c /* USER CODE END clockTick */ } 8002528: 46bd mov sp, r7 @@ -4908,7 +4908,7 @@ void clockTick(void *argument) 800252c: bdf0 pop {r4, r5, r6, r7, pc} 800252e: 46c0 nop ; (mov r8, r8) 8002530: 2000014c .word 0x2000014c - 8002534: 0800ea9c .word 0x0800ea9c + 8002534: 0800f6dc .word 0x0800f6dc 8002538: 000039c7 .word 0x000039c7 800253c: 000007ff .word 0x000007ff 8002540: 20000138 .word 0x20000138 @@ -4919,15 +4919,15 @@ void clockTick(void *argument) 8002554: 43480000 .word 0x43480000 8002558: 20000134 .word 0x20000134 800255c: 20000140 .word 0x20000140 - 8002560: 0800f25c .word 0x0800f25c - 8002564: 0800f234 .word 0x0800f234 + 8002560: 0800fe9c .word 0x0800fe9c + 8002564: 0800fe74 .word 0x0800fe74 8002568: 0000ffe0 .word 0x0000ffe0 800256c: 20000190 .word 0x20000190 8002570: 20000192 .word 0x20000192 8002574: 20000194 .word 0x20000194 8002578: 2000013c .word 0x2000013c 800257c: 42c80000 .word 0x42c80000 - 8002580: 0800ea88 .word 0x0800ea88 + 8002580: 0800f6c8 .word 0x0800f6c8 8002584: 20000168 .word 0x20000168 08002588 : @@ -4959,7 +4959,7 @@ void btnPressed(uint8_t id) { PID_Init(&pid); 80025a8: 4b39 ldr r3, [pc, #228] ; (8002690 ) 80025aa: 0018 movs r0, r3 - 80025ac: f001 f93e bl 800382c + 80025ac: f001 f942 bl 8003834 TIM1->CCR2 = 1020; 80025b0: 4b38 ldr r3, [pc, #224] ; (8002694 ) 80025b2: 22ff movs r2, #255 ; 0xff @@ -4967,7 +4967,7 @@ void btnPressed(uint8_t id) { 80025b6: 639a str r2, [r3, #56] ; 0x38 ST7793_Brightness(99); 80025b8: 2063 movs r0, #99 ; 0x63 - 80025ba: f001 fd1f bl 8003ffc + 80025ba: f001 fd23 bl 8004004 break; 80025be: e061 b.n 8002684 case BTN_PRE2: // PRE2 @@ -5004,18 +5004,18 @@ void btnPressed(uint8_t id) { 80025ee: f000 f85f bl 80026b0 ST7793_Brightness(75); 80025f2: 204b movs r0, #75 ; 0x4b - 80025f4: f001 fd02 bl 8003ffc + 80025f4: f001 fd06 bl 8004004 break; 80025f8: e044 b.n 8002684 case BTN_PRE3: // PRE3 PID_Init(&pid); 80025fa: 4b25 ldr r3, [pc, #148] ; (8002690 ) 80025fc: 0018 movs r0, r3 - 80025fe: f001 f915 bl 800382c + 80025fe: f001 f919 bl 8003834 ST7793_Brightness(50); 8002602: 2032 movs r0, #50 ; 0x32 - 8002604: f001 fcfa bl 8003ffc + 8002604: f001 fcfe bl 8004004 break; 8002608: e03c b.n 8002684 case BTN_PRE4: // PRE4 @@ -5051,7 +5051,7 @@ void btnPressed(uint8_t id) { 800263a: f000 f839 bl 80026b0 ST7793_Brightness(25); 800263e: 2019 movs r0, #25 - 8002640: f001 fcdc bl 8003ffc + 8002640: f001 fce0 bl 8004004 break; 8002644: e01e b.n 8002684 case BTN_START: // START @@ -5072,7 +5072,7 @@ void btnPressed(uint8_t id) { 800265c: 0092 lsls r2, r2, #2 800265e: 0011 movs r1, r2 8002660: 0018 movs r0, r3 - 8002662: f008 fc29 bl 800aeb8 + 8002662: f009 fa4b bl 800bafc break; 8002666: e00d b.n 8002684 case BTN_COG: // COG (Settings) @@ -5088,7 +5088,7 @@ void btnPressed(uint8_t id) { 800266e: 4b0f ldr r3, [pc, #60] ; (80026ac ) 8002670: 681b ldr r3, [r3, #0] 8002672: 0018 movs r0, r3 - 8002674: f008 fc4e bl 800af14 + 8002674: f009 fa70 bl 800bb58 drawMainScreen(); 8002678: f000 f8b8 bl 80027ec break; @@ -5104,7 +5104,7 @@ void btnPressed(uint8_t id) { 8002686: 46bd mov sp, r7 8002688: b002 add sp, #8 800268a: bd80 pop {r7, pc} - 800268c: 0800f3b8 .word 0x0800f3b8 + 800268c: 0800fff8 .word 0x0800fff8 8002690: 2000000c .word 0x2000000c 8002694: 40012c00 .word 0x40012c00 8002698: 2000003c .word 0x2000003c @@ -5127,17 +5127,17 @@ void updateTInfo(void) { 80026bc: 4252 negs r2, r2 80026be: 0011 movs r1, r2 80026c0: 0018 movs r0, r3 - 80026c2: f008 fcea bl 800b09a + 80026c2: f009 fb0c bl 800bcde ST7793_SetFontSize(1); 80026c6: 2001 movs r0, #1 - 80026c8: f001 fefa bl 80044c0 + 80026c8: f001 fefe bl 80044c8 snprintf(str, 8, "T:%d", lvl); 80026cc: 4b10 ldr r3, [pc, #64] ; (8002710 ) 80026ce: 881b ldrh r3, [r3, #0] 80026d0: 4a10 ldr r2, [pc, #64] ; (8002714 ) 80026d2: 4811 ldr r0, [pc, #68] ; (8002718 ) 80026d4: 2108 movs r1, #8 - 80026d6: f00b fda1 bl 800e21c + 80026d6: f00c fbc1 bl 800ee5c ST7793_FillRect(Lightgray, 205, 40, 270, 55); 80026da: 2387 movs r3, #135 ; 0x87 80026dc: 005b lsls r3, r3, #1 @@ -5146,7 +5146,7 @@ void updateTInfo(void) { 80026e2: 9200 str r2, [sp, #0] 80026e4: 2228 movs r2, #40 ; 0x28 80026e6: 21cd movs r1, #205 ; 0xcd - 80026e8: f001 fd0a bl 8004100 + 80026e8: f001 fd0e bl 8004108 ST7793_DrawString(Black, Lightgray, str, 205, 40); 80026ec: 4a0a ldr r2, [pc, #40] ; (8002718 ) 80026ee: 490b ldr r1, [pc, #44] ; (800271c ) @@ -5154,19 +5154,19 @@ void updateTInfo(void) { 80026f2: 9300 str r3, [sp, #0] 80026f4: 23cd movs r3, #205 ; 0xcd 80026f6: 2000 movs r0, #0 - 80026f8: f002 f904 bl 8004904 + 80026f8: f002 f908 bl 800490c osMutexRelease(mutScreenHandle); 80026fc: 4b03 ldr r3, [pc, #12] ; (800270c ) 80026fe: 681b ldr r3, [r3, #0] 8002700: 0018 movs r0, r3 - 8002702: f008 fd19 bl 800b138 + 8002702: f009 fb3b bl 800bd7c } 8002706: 46c0 nop ; (mov r8, r8) 8002708: 46bd mov sp, r7 800270a: bd80 pop {r7, pc} 800270c: 20000168 .word 0x20000168 8002710: 2000003c .word 0x2000003c - 8002714: 0800eaa8 .word 0x0800eaa8 + 8002714: 0800f6e8 .word 0x0800f6e8 8002718: 2000016c .word 0x2000016c 800271c: 0000d69a .word 0x0000d69a @@ -5188,10 +5188,10 @@ void drawBootScreen(void) { 8002732: 4252 negs r2, r2 8002734: 0011 movs r1, r2 8002736: 0018 movs r0, r3 - 8002738: f008 fcaf bl 800b09a + 8002738: f009 fad1 bl 800bcde ST7793_FillScreen(Black); 800273c: 2000 movs r0, #0 - 800273e: f001 fc6d bl 800401c + 800273e: f001 fc71 bl 8004024 ST7793_Draw1bBitmap(White, Black, 152, 91, logo_96x58); 8002742: 4823 ldr r0, [pc, #140] ; (80027d0 ) 8002744: 4b23 ldr r3, [pc, #140] ; (80027d4 ) @@ -5199,10 +5199,10 @@ void drawBootScreen(void) { 8002748: 235b movs r3, #91 ; 0x5b 800274a: 2298 movs r2, #152 ; 0x98 800274c: 2100 movs r1, #0 - 800274e: f002 fcbf bl 80050d0 + 800274e: f002 fcc3 bl 80050d8 ST7793_SetFontSize(2); 8002752: 2002 movs r0, #2 - 8002754: f001 feb4 bl 80044c0 + 8002754: f001 feb8 bl 80044c8 ST7793_DrawString(White, Black, "PCB Heater", 120, 60); 8002758: 4a1f ldr r2, [pc, #124] ; (80027d8 ) 800275a: 481d ldr r0, [pc, #116] ; (80027d0 ) @@ -5210,7 +5210,7 @@ void drawBootScreen(void) { 800275e: 9300 str r3, [sp, #0] 8002760: 2378 movs r3, #120 ; 0x78 8002762: 2100 movs r1, #0 - 8002764: f002 f8ce bl 8004904 + 8002764: f002 f8d2 bl 800490c ST7793_DrawString(White, Black, "Reflow station", 88, 155); 8002768: 4a1c ldr r2, [pc, #112] ; (80027dc ) 800276a: 4819 ldr r0, [pc, #100] ; (80027d0 ) @@ -5218,10 +5218,10 @@ void drawBootScreen(void) { 800276e: 9300 str r3, [sp, #0] 8002770: 2358 movs r3, #88 ; 0x58 8002772: 2100 movs r1, #0 - 8002774: f002 f8c6 bl 8004904 + 8002774: f002 f8ca bl 800490c ST7793_SetFontSize(1); 8002778: 2001 movs r0, #1 - 800277a: f001 fea1 bl 80044c0 + 800277a: f001 fea5 bl 80044c8 ST7793_DrawString(Green1, Black, "Firmware", 10, 220); 800277e: 4a18 ldr r2, [pc, #96] ; (80027e0 ) 8002780: 23e0 movs r3, #224 ; 0xe0 @@ -5230,7 +5230,7 @@ void drawBootScreen(void) { 8002786: 9300 str r3, [sp, #0] 8002788: 230a movs r3, #10 800278a: 2100 movs r1, #0 - 800278c: f002 f8ba bl 8004904 + 800278c: f002 f8be bl 800490c ST7793_DrawStringC(Green1, Black, Version, 82, 220); 8002790: 4a14 ldr r2, [pc, #80] ; (80027e4 ) 8002792: 23e0 movs r3, #224 ; 0xe0 @@ -5239,7 +5239,7 @@ void drawBootScreen(void) { 8002798: 9300 str r3, [sp, #0] 800279a: 2352 movs r3, #82 ; 0x52 800279c: 2100 movs r1, #0 - 800279e: f002 f901 bl 80049a4 + 800279e: f002 f905 bl 80049ac ST7793_DrawString(Green1, Black, "\xA9 Anton Mukhin", 280, 220); 80027a2: 238c movs r3, #140 ; 0x8c 80027a4: 005b lsls r3, r3, #1 @@ -5249,12 +5249,12 @@ void drawBootScreen(void) { 80027ac: 21dc movs r1, #220 ; 0xdc 80027ae: 9100 str r1, [sp, #0] 80027b0: 2100 movs r1, #0 - 80027b2: f002 f8a7 bl 8004904 + 80027b2: f002 f8ab bl 800490c osMutexRelease(mutScreenHandle); 80027b6: 4b05 ldr r3, [pc, #20] ; (80027cc ) 80027b8: 681b ldr r3, [r3, #0] 80027ba: 0018 movs r0, r3 - 80027bc: f008 fcbc bl 800b138 + 80027bc: f009 fade bl 800bd7c } 80027c0: 46c0 nop ; (mov r8, r8) 80027c2: 46bd mov sp, r7 @@ -5263,12 +5263,12 @@ void drawBootScreen(void) { 80027c8: 20000000 .word 0x20000000 80027cc: 20000168 .word 0x20000168 80027d0: 0000ffff .word 0x0000ffff - 80027d4: 0800edac .word 0x0800edac - 80027d8: 0800eab0 .word 0x0800eab0 - 80027dc: 0800eabc .word 0x0800eabc - 80027e0: 0800eacc .word 0x0800eacc - 80027e4: 0800f08c .word 0x0800f08c - 80027e8: 0800ead8 .word 0x0800ead8 + 80027d4: 0800f9ec .word 0x0800f9ec + 80027d8: 0800f6f0 .word 0x0800f6f0 + 80027dc: 0800f6fc .word 0x0800f6fc + 80027e0: 0800f70c .word 0x0800f70c + 80027e4: 0800fccc .word 0x0800fccc + 80027e8: 0800f718 .word 0x0800f718 080027ec : @@ -5290,11 +5290,11 @@ void drawMainScreen(void) { 80027fe: 4252 negs r2, r2 8002800: 0011 movs r1, r2 8002802: 0018 movs r0, r3 - 8002804: f008 fc49 bl 800b09a + 8002804: f009 fa6b bl 800bcde ST7793_FillScreen(Darkergray); 8002808: 4b50 ldr r3, [pc, #320] ; (800294c ) 800280a: 0018 movs r0, r3 - 800280c: f001 fc06 bl 800401c + 800280c: f001 fc0a bl 8004024 for (in=0; in<=5; in++) { 8002810: 4b4f ldr r3, [pc, #316] ; (8002950 ) 8002812: 2200 movs r2, #0 @@ -5313,7 +5313,7 @@ void drawMainScreen(void) { 800282a: 330e adds r3, #14 800282c: 781b ldrb r3, [r3, #0] 800282e: 0018 movs r0, r3 - 8002830: f001 fe46 bl 80044c0 + 8002830: f001 fe4a bl 80044c8 drawButton(in, (in == Preset)); 8002834: 4b46 ldr r3, [pc, #280] ; (8002950 ) 8002836: 7818 ldrb r0, [r3, #0] @@ -5341,7 +5341,7 @@ void drawMainScreen(void) { } ST7793_SetFontSize(2); 8002862: 2002 movs r0, #2 - 8002864: f001 fe2c bl 80044c0 + 8002864: f001 fe30 bl 80044c8 ST7793_DrawStringC(Cyan, Darkergray, "Time: 00:00", 10, 208); 8002868: 4a3c ldr r2, [pc, #240] ; (800295c ) 800286a: 4938 ldr r1, [pc, #224] ; (800294c ) @@ -5349,7 +5349,7 @@ void drawMainScreen(void) { 800286e: 23d0 movs r3, #208 ; 0xd0 8002870: 9300 str r3, [sp, #0] 8002872: 230a movs r3, #10 - 8002874: f002 f896 bl 80049a4 + 8002874: f002 f89a bl 80049ac ST7793_DrawStringC(Yellow, Darkergray, "Temperature", 210, 5); 8002878: 4a3a ldr r2, [pc, #232] ; (8002964 ) @@ -5358,10 +5358,10 @@ void drawMainScreen(void) { 800287e: 2305 movs r3, #5 8002880: 9300 str r3, [sp, #0] 8002882: 23d2 movs r3, #210 ; 0xd2 - 8002884: f002 f88e bl 80049a4 + 8002884: f002 f892 bl 80049ac ST7793_SetFontSize(1); 8002888: 2001 movs r0, #1 - 800288a: f001 fe19 bl 80044c0 + 800288a: f001 fe1d bl 80044c8 ST7793_DrawStringC(White, Darkergray, "Profile name:", 10, 2); 800288e: 4a37 ldr r2, [pc, #220] ; (800296c ) 8002890: 492e ldr r1, [pc, #184] ; (800294c ) @@ -5369,7 +5369,7 @@ void drawMainScreen(void) { 8002894: 2302 movs r3, #2 8002896: 9300 str r3, [sp, #0] 8002898: 230a movs r3, #10 - 800289a: f002 f883 bl 80049a4 + 800289a: f002 f887 bl 80049ac ST7793_DrawStringC(White, Darkergray, presets[Preset].name, 10, 18); 800289e: 4b2e ldr r3, [pc, #184] ; (8002958 ) 80028a0: 781b ldrb r3, [r3, #0] @@ -5388,7 +5388,7 @@ void drawMainScreen(void) { 80028ba: 2312 movs r3, #18 80028bc: 9300 str r3, [sp, #0] 80028be: 230a movs r3, #10 - 80028c0: f002 f870 bl 80049a4 + 80028c0: f002 f874 bl 80049ac ST7793_DrawStringC(Navy, Darkergray, "Planned", 225, 205); 80028c4: 4a2c ldr r2, [pc, #176] ; (8002978 ) 80028c6: 4921 ldr r1, [pc, #132] ; (800294c ) @@ -5396,7 +5396,7 @@ void drawMainScreen(void) { 80028ca: 9300 str r3, [sp, #0] 80028cc: 23e1 movs r3, #225 ; 0xe1 80028ce: 2010 movs r0, #16 - 80028d0: f002 f868 bl 80049a4 + 80028d0: f002 f86c bl 80049ac ST7793_DrawStringC(Red, Darkergray, "Realtime", 225, 220); 80028d4: 4a29 ldr r2, [pc, #164] ; (800297c ) 80028d6: 491d ldr r1, [pc, #116] ; (800294c ) @@ -5405,7 +5405,7 @@ void drawMainScreen(void) { 80028dc: 23dc movs r3, #220 ; 0xdc 80028de: 9300 str r3, [sp, #0] 80028e0: 23e1 movs r3, #225 ; 0xe1 - 80028e2: f002 f85f bl 80049a4 + 80028e2: f002 f863 bl 80049ac ST7793_DrawLine(Navy, 200, 211, 220, 211); 80028e6: 23d3 movs r3, #211 ; 0xd3 80028e8: 9300 str r3, [sp, #0] @@ -5413,7 +5413,7 @@ void drawMainScreen(void) { 80028ec: 22d3 movs r2, #211 ; 0xd3 80028ee: 21c8 movs r1, #200 ; 0xc8 80028f0: 2010 movs r0, #16 - 80028f2: f001 fd07 bl 8004304 + 80028f2: f001 fd0b bl 800430c ST7793_DrawLine(Navy, 200, 212, 220, 212); 80028f6: 23d4 movs r3, #212 ; 0xd4 80028f8: 9300 str r3, [sp, #0] @@ -5421,7 +5421,7 @@ void drawMainScreen(void) { 80028fc: 22d4 movs r2, #212 ; 0xd4 80028fe: 21c8 movs r1, #200 ; 0xc8 8002900: 2010 movs r0, #16 - 8002902: f001 fcff bl 8004304 + 8002902: f001 fd03 bl 800430c ST7793_DrawLine(Red, 200, 226, 220, 226); 8002906: 23f8 movs r3, #248 ; 0xf8 8002908: 0218 lsls r0, r3, #8 @@ -5430,7 +5430,7 @@ void drawMainScreen(void) { 800290e: 23dc movs r3, #220 ; 0xdc 8002910: 22e2 movs r2, #226 ; 0xe2 8002912: 21c8 movs r1, #200 ; 0xc8 - 8002914: f001 fcf6 bl 8004304 + 8002914: f001 fcfa bl 800430c ST7793_DrawLine(Red, 200, 227, 220, 227); 8002918: 23f8 movs r3, #248 ; 0xf8 800291a: 0218 lsls r0, r3, #8 @@ -5439,7 +5439,7 @@ void drawMainScreen(void) { 8002920: 23dc movs r3, #220 ; 0xdc 8002922: 22e3 movs r2, #227 ; 0xe3 8002924: 21c8 movs r1, #200 ; 0xc8 - 8002926: f001 fced bl 8004304 + 8002926: f001 fcf1 bl 800430c drawPlan(0, 1, 0); 800292a: 2200 movs r2, #0 @@ -5450,7 +5450,7 @@ void drawMainScreen(void) { 8002934: 4b04 ldr r3, [pc, #16] ; (8002948 ) 8002936: 681b ldr r3, [r3, #0] 8002938: 0018 movs r0, r3 - 800293a: f008 fbfd bl 800b138 + 800293a: f009 fa1f bl 800bd7c } 800293e: 46c0 nop ; (mov r8, r8) 8002940: 46bd mov sp, r7 @@ -5459,17 +5459,17 @@ void drawMainScreen(void) { 8002948: 20000168 .word 0x20000168 800294c: 000039c7 .word 0x000039c7 8002950: 20000198 .word 0x20000198 - 8002954: 0800f094 .word 0x0800f094 + 8002954: 0800fcd4 .word 0x0800fcd4 8002958: 20000134 .word 0x20000134 - 800295c: 0800eae8 .word 0x0800eae8 + 800295c: 0800f728 .word 0x0800f728 8002960: 000007ff .word 0x000007ff - 8002964: 0800eaf4 .word 0x0800eaf4 + 8002964: 0800f734 .word 0x0800f734 8002968: 0000ffe0 .word 0x0000ffe0 - 800296c: 0800eb00 .word 0x0800eb00 + 800296c: 0800f740 .word 0x0800f740 8002970: 0000ffff .word 0x0000ffff - 8002974: 0800f25c .word 0x0800f25c - 8002978: 0800eb10 .word 0x0800eb10 - 800297c: 0800eb18 .word 0x0800eb18 + 8002974: 0800fe9c .word 0x0800fe9c + 8002978: 0800f750 .word 0x0800f750 + 800297c: 0800f758 .word 0x0800f758 08002980 : @@ -5489,7 +5489,7 @@ void drawRunningScreen(void) { 8002992: 4252 negs r2, r2 8002994: 0011 movs r1, r2 8002996: 0018 movs r0, r3 - 8002998: f008 fb7f bl 800b09a + 8002998: f009 f9a1 bl 800bcde drawPlan(0, 0, 1); 800299c: 2201 movs r2, #1 800299e: 2100 movs r1, #0 @@ -5502,7 +5502,7 @@ void drawRunningScreen(void) { 80029ac: 23c9 movs r3, #201 ; 0xc9 80029ae: 9300 str r3, [sp, #0] 80029b0: 2344 movs r3, #68 ; 0x44 - 80029b2: f001 fba5 bl 8004100 + 80029b2: f001 fba9 bl 8004108 drawButton(BTN_STOP, 0); 80029b6: 2100 movs r1, #0 80029b8: 2006 movs r0, #6 @@ -5515,7 +5515,7 @@ void drawRunningScreen(void) { 80029c6: 9200 str r2, [sp, #0] 80029c8: 2205 movs r2, #5 80029ca: 21d2 movs r1, #210 ; 0xd2 - 80029cc: f001 fb98 bl 8004100 + 80029cc: f001 fb9c bl 8004108 ST7793_DrawStringC(Yellow, Darkergray, stageNames[Stage], 210, 5); 80029d0: 4b12 ldr r3, [pc, #72] ; (8002a1c ) 80029d2: 781b ldrb r3, [r3, #0] @@ -5527,10 +5527,10 @@ void drawRunningScreen(void) { 80029de: 2305 movs r3, #5 80029e0: 9300 str r3, [sp, #0] 80029e2: 23d2 movs r3, #210 ; 0xd2 - 80029e4: f001 ffde bl 80049a4 + 80029e4: f001 ffe2 bl 80049ac ST7793_SetFontSize(1); 80029e8: 2001 movs r0, #1 - 80029ea: f001 fd69 bl 80044c0 + 80029ea: f001 fd6d bl 80044c8 ST7793_DrawString(Black, Darkergray, "PID", 24, 160); 80029ee: 4a0e ldr r2, [pc, #56] ; (8002a28 ) 80029f0: 4909 ldr r1, [pc, #36] ; (8002a18 ) @@ -5538,13 +5538,13 @@ void drawRunningScreen(void) { 80029f4: 9300 str r3, [sp, #0] 80029f6: 2318 movs r3, #24 80029f8: 2000 movs r0, #0 - 80029fa: f001 ff83 bl 8004904 + 80029fa: f001 ff87 bl 800490c osMutexRelease(mutScreenHandle); 80029fe: 4b05 ldr r3, [pc, #20] ; (8002a14 ) 8002a00: 681b ldr r3, [r3, #0] 8002a02: 0018 movs r0, r3 - 8002a04: f008 fb98 bl 800b138 + 8002a04: f009 f9ba bl 800bd7c } 8002a08: 46c0 nop ; (mov r8, r8) 8002a0a: 46bd mov sp, r7 @@ -5554,9 +5554,9 @@ void drawRunningScreen(void) { 8002a14: 20000168 .word 0x20000168 8002a18: 000039c7 .word 0x000039c7 8002a1c: 20000140 .word 0x20000140 - 8002a20: 0800f234 .word 0x0800f234 + 8002a20: 0800fe74 .word 0x0800fe74 8002a24: 0000ffe0 .word 0x0000ffe0 - 8002a28: 0800eb24 .word 0x0800eb24 + 8002a28: 0800f764 .word 0x0800f764 08002a2c : @@ -5578,11 +5578,11 @@ void drawSettingsScreen(void) { 8002a3e: 4252 negs r2, r2 8002a40: 0011 movs r1, r2 8002a42: 0018 movs r0, r3 - 8002a44: f008 fb29 bl 800b09a + 8002a44: f009 f94b bl 800bcde ST7793_FillScreen(Darkergray); 8002a48: 4b31 ldr r3, [pc, #196] ; (8002b10 ) 8002a4a: 0018 movs r0, r3 - 8002a4c: f001 fae6 bl 800401c + 8002a4c: f001 faea bl 8004024 //Draw buttins for (i=0; i + 8002a92: f001 fd19 bl 80044c8 ST7793_DrawRect(Black, 10, 20, 27, 37); 8002a96: 2325 movs r3, #37 ; 0x25 8002a98: 9300 str r3, [sp, #0] @@ -5634,7 +5634,7 @@ void drawSettingsScreen(void) { 8002a9c: 2214 movs r2, #20 8002a9e: 210a movs r1, #10 8002aa0: 2000 movs r0, #0 - 8002aa2: f001 fcbc bl 800441e + 8002aa2: f001 fcc0 bl 8004426 ST7793_Draw1bBitmap(Black, Lightgray, 11, 21, check_16x16); 8002aa6: 491c ldr r1, [pc, #112] ; (8002b18 ) 8002aa8: 4b1c ldr r3, [pc, #112] ; (8002b1c ) @@ -5642,7 +5642,7 @@ void drawSettingsScreen(void) { 8002aac: 2315 movs r3, #21 8002aae: 220b movs r2, #11 8002ab0: 2000 movs r0, #0 - 8002ab2: f002 fb0d bl 80050d0 + 8002ab2: f002 fb11 bl 80050d8 ST7793_DrawString(Black, Darkergray, "Boot screen", 36, 23); 8002ab6: 4a1a ldr r2, [pc, #104] ; (8002b20 ) 8002ab8: 4915 ldr r1, [pc, #84] ; (8002b10 ) @@ -5650,7 +5650,7 @@ void drawSettingsScreen(void) { 8002abc: 9300 str r3, [sp, #0] 8002abe: 2324 movs r3, #36 ; 0x24 8002ac0: 2000 movs r0, #0 - 8002ac2: f001 ff1f bl 8004904 + 8002ac2: f001 ff23 bl 800490c ST7793_DrawRect(Black, 10, 50, 27, 67); 8002ac6: 2343 movs r3, #67 ; 0x43 @@ -5659,7 +5659,7 @@ void drawSettingsScreen(void) { 8002acc: 2232 movs r2, #50 ; 0x32 8002ace: 210a movs r1, #10 8002ad0: 2000 movs r0, #0 - 8002ad2: f001 fca4 bl 800441e + 8002ad2: f001 fca8 bl 8004426 ST7793_FillRect(Lightgray, 11, 51, 26, 66); 8002ad6: 4810 ldr r0, [pc, #64] ; (8002b18 ) 8002ad8: 2342 movs r3, #66 ; 0x42 @@ -5667,7 +5667,7 @@ void drawSettingsScreen(void) { 8002adc: 231a movs r3, #26 8002ade: 2233 movs r2, #51 ; 0x33 8002ae0: 210b movs r1, #11 - 8002ae2: f001 fb0d bl 8004100 + 8002ae2: f001 fb11 bl 8004108 ST7793_DrawString(Black, Darkergray, "Button sounds", 36, 53); 8002ae6: 4a0f ldr r2, [pc, #60] ; (8002b24 ) 8002ae8: 4909 ldr r1, [pc, #36] ; (8002b10 ) @@ -5675,14 +5675,14 @@ void drawSettingsScreen(void) { 8002aec: 9300 str r3, [sp, #0] 8002aee: 2324 movs r3, #36 ; 0x24 8002af0: 2000 movs r0, #0 - 8002af2: f001 ff07 bl 8004904 + 8002af2: f001 ff0b bl 800490c osMutexRelease(mutScreenHandle); 8002af6: 4b05 ldr r3, [pc, #20] ; (8002b0c ) 8002af8: 681b ldr r3, [r3, #0] 8002afa: 0018 movs r0, r3 - 8002afc: f008 fb1c bl 800b138 + 8002afc: f009 f93e bl 800bd7c } 8002b00: 46c0 nop ; (mov r8, r8) 8002b02: 46bd mov sp, r7 @@ -5691,11 +5691,11 @@ void drawSettingsScreen(void) { 8002b08: 20000000 .word 0x20000000 8002b0c: 20000168 .word 0x20000168 8002b10: 000039c7 .word 0x000039c7 - 8002b14: 0800f224 .word 0x0800f224 + 8002b14: 0800fe64 .word 0x0800fe64 8002b18: 0000d69a .word 0x0000d69a - 8002b1c: 0800f068 .word 0x0800f068 - 8002b20: 0800eb28 .word 0x0800eb28 - 8002b24: 0800eb34 .word 0x0800eb34 + 8002b1c: 0800fca8 .word 0x0800fca8 + 8002b20: 0800f768 .word 0x0800f768 + 8002b24: 0800f774 .word 0x0800f774 08002b28 : @@ -5856,7 +5856,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8002c3e: 4252 negs r2, r2 8002c40: 0011 movs r1, r2 8002c42: 0018 movs r0, r3 - 8002c44: f008 fa29 bl 800b09a + 8002c44: f009 f84b bl 800bcde //Clear the graph area ST7793_DrawRect(Black, g_x-1, GRAPH_Y-1, g_x+g_w+1, GRAPH_Y+GRAPH_H+1); 8002c48: 4b62 ldr r3, [pc, #392] ; (8002dd4 ) @@ -5875,7 +5875,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8002c62: 9200 str r2, [sp, #0] 8002c64: 2222 movs r2, #34 ; 0x22 8002c66: 2000 movs r0, #0 - 8002c68: f001 fbd9 bl 800441e + 8002c68: f001 fbdd bl 8004426 ST7793_FillRect(Lightgray, g_x, GRAPH_Y, g_x+g_w, GRAPH_Y+GRAPH_H); 8002c6c: 4b59 ldr r3, [pc, #356] ; (8002dd4 ) 8002c6e: 8819 ldrh r1, [r3, #0] @@ -5889,7 +5889,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8002c7e: 22c8 movs r2, #200 ; 0xc8 8002c80: 9200 str r2, [sp, #0] 8002c82: 2223 movs r2, #35 ; 0x23 - 8002c84: f001 fa3c bl 8004100 + 8002c84: f001 fa40 bl 8004108 // draw time axis marks y = GRAPH_Y+GRAPH_H; 8002c88: 4b5c ldr r3, [pc, #368] ; (8002dfc ) @@ -5968,7 +5968,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8002d1a: 9300 str r3, [sp, #0] 8002d1c: 0003 movs r3, r0 8002d1e: 2000 movs r0, #0 - 8002d20: f001 faf0 bl 8004304 + 8002d20: f001 faf4 bl 800430c for (i=1; i*30/spp) 8002d26: 781b ldrb r3, [r3, #0] @@ -6059,7 +6059,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8002dd4: 2000019a .word 0x2000019a 8002dd8: 2000019c .word 0x2000019c 8002ddc: 20000134 .word 0x20000134 - 8002de0: 0800f25c .word 0x0800f25c + 8002de0: 0800fe9c .word 0x0800fe9c 8002de4: 20000144 .word 0x20000144 8002de8: 2000019e .word 0x2000019e 8002dec: 43050000 .word 0x43050000 @@ -6097,7 +6097,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8002e3a: 0200 lsls r0, r0, #8 8002e3c: 9300 str r3, [sp, #0] 8002e3e: 0023 movs r3, r4 - 8002e40: f001 fa60 bl 8004304 + 8002e40: f001 fa64 bl 800430c for (i=1; (i*25 - 20)/dpp) 8002e46: 781b ldrb r3, [r3, #0] @@ -6219,7 +6219,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8002f36: 9300 str r3, [sp, #0] 8002f38: 0003 movs r3, r0 8002f3a: 2010 movs r0, #16 - 8002f3c: f001 f9e2 bl 8004304 + 8002f3c: f001 f9e6 bl 800430c ST7793_DrawLine(Navy, x+1, y, x1+1, y1); 8002f40: 4b67 ldr r3, [pc, #412] ; (80030e0 ) 8002f42: 881b ldrh r3, [r3, #0] @@ -6236,7 +6236,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8002f58: 9300 str r3, [sp, #0] 8002f5a: 0003 movs r3, r0 8002f5c: 2010 movs r0, #16 - 8002f5e: f001 f9d1 bl 8004304 + 8002f5e: f001 f9d5 bl 800430c // draw stages 2, 3, 4, 5 for (i=1; i<5; i++) { @@ -6424,7 +6424,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 80030ec: 20000148 .word 0x20000148 80030f0: 43250000 .word 0x43250000 80030f4: 20000134 .word 0x20000134 - 80030f8: 0800f25c .word 0x0800f25c + 80030f8: 0800fe9c .word 0x0800fe9c 80030fc: 20000144 .word 0x20000144 8003100: 43480000 .word 0x43480000 8003104: 200001a6 .word 0x200001a6 @@ -6453,7 +6453,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8003130: 2508 movs r5, #8 8003132: 1978 adds r0, r7, r5 8003134: 2105 movs r1, #5 - 8003136: f00b f871 bl 800e21c + 8003136: f00b fe91 bl 800ee5c ST7793_DrawTNString(Darkred, Lightgray, str, x5, y - 16); 800313a: 4b3f ldr r3, [pc, #252] ; (8003238 ) 800313c: 8819 ldrh r1, [r3, #0] @@ -6468,7 +6468,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 800314e: 9300 str r3, [sp, #0] 8003150: 000b movs r3, r1 8003152: 0021 movs r1, r4 - 8003154: f001 fc76 bl 8004a44 + 8003154: f001 fc7a bl 8004a4c //Print time snprintf(str, 5, "%3ds", presets[Preset].time[i-1]); 8003158: 4b38 ldr r3, [pc, #224] ; (800323c ) @@ -6491,7 +6491,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 800317a: 4a36 ldr r2, [pc, #216] ; (8003254 ) 800317c: 1978 adds r0, r7, r5 800317e: 2105 movs r1, #5 - 8003180: f00b f84c bl 800e21c + 8003180: f00b fe6c bl 800ee5c ST7793_DrawTNString(Black, Lightgray, str, x5, y - 8); 8003184: 4b2c ldr r3, [pc, #176] ; (8003238 ) 8003186: 8819 ldrh r1, [r3, #0] @@ -6505,7 +6505,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8003196: 000b movs r3, r1 8003198: 0001 movs r1, r0 800319a: 2000 movs r0, #0 - 800319c: f001 fc52 bl 8004a44 + 800319c: f001 fc56 bl 8004a4c } //Draw graph line (two for a bolder line) ST7793_DrawLine(Navy, x, y, x1, y1); @@ -6520,7 +6520,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 80031b0: 9300 str r3, [sp, #0] 80031b2: 0003 movs r3, r0 80031b4: 2010 movs r0, #16 - 80031b6: f001 f8a5 bl 8004304 + 80031b6: f001 f8a9 bl 800430c if (i < 4) ST7793_DrawLine(Navy, x, y+1, x1, y1+1); 80031ba: 4b21 ldr r3, [pc, #132] ; (8003240 ) 80031bc: 781b ldrb r3, [r3, #0] @@ -6541,7 +6541,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 80031da: 9300 str r3, [sp, #0] 80031dc: 0003 movs r3, r0 80031de: 2010 movs r0, #16 - 80031e0: f001 f890 bl 8004304 + 80031e0: f001 f894 bl 800430c 80031e4: e010 b.n 8003208 else ST7793_DrawLine(Navy, x-1, y, x1-1, y1); 80031e6: 4b1c ldr r3, [pc, #112] ; (8003258 ) @@ -6559,7 +6559,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 80031fe: 9300 str r3, [sp, #0] 8003200: 0003 movs r3, r0 8003202: 2010 movs r0, #16 - 8003204: f001 f87e bl 8004304 + 8003204: f001 f882 bl 800430c for (i=1; i<5; i++) { 8003208: 4b0d ldr r3, [pc, #52] ; (8003240 ) 800320a: 781b ldrb r3, [r3, #0] @@ -6582,7 +6582,7 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8003226: 4b0f ldr r3, [pc, #60] ; (8003264 ) 8003228: 681b ldr r3, [r3, #0] 800322a: 0018 movs r0, r3 - 800322c: f007 ff84 bl 800b138 + 800322c: f008 fda6 bl 800bd7c } 8003230: 46c0 nop ; (mov r8, r8) 8003232: 46bd mov sp, r7 @@ -6591,11 +6591,11 @@ void drawPlan(uint8_t use_mutex, uint8_t numbers, uint8_t wide) { 8003238: 200001aa .word 0x200001aa 800323c: 20000134 .word 0x20000134 8003240: 2000019e .word 0x2000019e - 8003244: 0800f25c .word 0x0800f25c - 8003248: 0800eb44 .word 0x0800eb44 + 8003244: 0800fe9c .word 0x0800fe9c + 8003248: 0800f784 .word 0x0800f784 800324c: 200001a0 .word 0x200001a0 8003250: 0000d69a .word 0x0000d69a - 8003254: 0800eb4c .word 0x0800eb4c + 8003254: 0800f78c .word 0x0800f78c 8003258: 200001a2 .word 0x200001a2 800325c: 200001a8 .word 0x200001a8 8003260: 200001a6 .word 0x200001a6 @@ -6685,11 +6685,11 @@ void playSound(uint8_t sound) { 80032da: 4808 ldr r0, [pc, #32] ; (80032fc ) 80032dc: 2201 movs r2, #1 80032de: 0019 movs r1, r3 - 80032e0: f004 f960 bl 80075a4 + 80032e0: f004 faa4 bl 800782c HAL_TIM_Base_Start_IT(&htim17); 80032e4: 4b06 ldr r3, [pc, #24] ; (8003300 ) 80032e6: 0018 movs r0, r3 - 80032e8: f005 fdde bl 8008ea8 + 80032e8: f005 ff22 bl 8009130 } } @@ -6700,7 +6700,7 @@ void playSound(uint8_t sound) { 80032f4: 20000004 .word 0x20000004 80032f8: 40014800 .word 0x40014800 80032fc: 50000400 .word 0x50000400 - 8003300: 200002f8 .word 0x200002f8 + 8003300: 20000344 .word 0x20000344 08003304 : @@ -6730,7 +6730,7 @@ void drawButton(uint8_t id, uint8_t func) { 800332c: 330e adds r3, #14 800332e: 781b ldrb r3, [r3, #0] 8003330: 0018 movs r0, r3 - 8003332: f001 f8c5 bl 80044c0 + 8003332: f001 f8c9 bl 80044c8 ST7793_DrawButton( 8003336: 1dfb adds r3, r7, #7 8003338: 781a ldrb r2, [r3, #0] @@ -6824,7 +6824,7 @@ void drawButton(uint8_t id, uint8_t func) { 80033e8: 4642 mov r2, r8 80033ea: 4661 mov r1, ip 80033ec: 0030 movs r0, r6 - 80033ee: f001 fb75 bl 8004adc + 80033ee: f001 fb79 bl 8004ae4 buttons[id].x2, buttons[id].y2, buttons[id].data, @@ -6838,7 +6838,7 @@ void drawButton(uint8_t id, uint8_t func) { 80033fa: 46b9 mov r9, r7 80033fc: 46b0 mov r8, r6 80033fe: bdf0 pop {r4, r5, r6, r7, pc} - 8003400: 0800f094 .word 0x0800f094 + 8003400: 0800fcd4 .word 0x0800fcd4 08003404 : * Output @@ -6858,32 +6858,32 @@ void MX_GPIO_Init(void) 8003410: 2314 movs r3, #20 8003412: 001a movs r2, r3 8003414: 2100 movs r1, #0 - 8003416: f00a fdda bl 800dfce + 8003416: f00b fbfa bl 800ec0e /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); 800341a: 4b70 ldr r3, [pc, #448] ; (80035dc ) 800341c: 6b5a ldr r2, [r3, #52] ; 0x34 800341e: 4b6f ldr r3, [pc, #444] ; (80035dc ) - 8003420: 2120 movs r1, #32 + 8003420: 2104 movs r1, #4 8003422: 430a orrs r2, r1 8003424: 635a str r2, [r3, #52] ; 0x34 8003426: 4b6d ldr r3, [pc, #436] ; (80035dc ) 8003428: 6b5b ldr r3, [r3, #52] ; 0x34 - 800342a: 2220 movs r2, #32 + 800342a: 2204 movs r2, #4 800342c: 4013 ands r3, r2 800342e: 613b str r3, [r7, #16] 8003430: 693b ldr r3, [r7, #16] - __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); 8003432: 4b6a ldr r3, [pc, #424] ; (80035dc ) 8003434: 6b5a ldr r2, [r3, #52] ; 0x34 8003436: 4b69 ldr r3, [pc, #420] ; (80035dc ) - 8003438: 2104 movs r1, #4 + 8003438: 2120 movs r1, #32 800343a: 430a orrs r2, r1 800343c: 635a str r2, [r3, #52] ; 0x34 800343e: 4b67 ldr r3, [pc, #412] ; (80035dc ) 8003440: 6b5b ldr r3, [r3, #52] ; 0x34 - 8003442: 2204 movs r2, #4 + 8003442: 2220 movs r2, #32 8003444: 4013 ands r3, r2 8003446: 60fb str r3, [r7, #12] 8003448: 68fb ldr r3, [r7, #12] @@ -6933,7 +6933,7 @@ void MX_GPIO_Init(void) 8003494: 2200 movs r2, #0 8003496: 2134 movs r1, #52 ; 0x34 8003498: 0018 movs r0, r3 - 800349a: f004 f883 bl 80075a4 + 800349a: f004 f9c7 bl 800782c /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, LCD_D0_Pin|LCD_D1_Pin|LCD_D2_Pin|LCD_D3_Pin @@ -6942,7 +6942,7 @@ void MX_GPIO_Init(void) 80034a2: 2200 movs r2, #0 80034a4: 21ff movs r1, #255 ; 0xff 80034a6: 0018 movs r0, r3 - 80034a8: f004 f87c bl 80075a4 + 80034a8: f004 f9c0 bl 800782c |LCD_D4_Pin|LCD_D5_Pin|LCD_D6_Pin|LCD_D7_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ @@ -6951,7 +6951,7 @@ void MX_GPIO_Init(void) 80034ae: 4b4e ldr r3, [pc, #312] ; (80035e8 ) 80034b0: 2200 movs r2, #0 80034b2: 0018 movs r0, r3 - 80034b4: f004 f876 bl 80075a4 + 80034b4: f004 f9ba bl 800782c /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(MAX_CS_GPIO_Port, MAX_CS_Pin, GPIO_PIN_SET); @@ -6960,7 +6960,7 @@ void MX_GPIO_Init(void) 80034bc: 484a ldr r0, [pc, #296] ; (80035e8 ) 80034be: 2201 movs r2, #1 80034c0: 0019 movs r1, r3 - 80034c2: f004 f86f bl 80075a4 + 80034c2: f004 f9b3 bl 800782c /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LCD_CS_GPIO_Port, LCD_CS_Pin, GPIO_PIN_RESET); @@ -6968,7 +6968,7 @@ void MX_GPIO_Init(void) 80034c8: 2200 movs r2, #0 80034ca: 2110 movs r1, #16 80034cc: 0018 movs r0, r3 - 80034ce: f004 f869 bl 80075a4 + 80034ce: f004 f9ad bl 800782c /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = LED_Status_Pin; @@ -6992,7 +6992,7 @@ void MX_GPIO_Init(void) 80034ec: 4a3c ldr r2, [pc, #240] ; (80035e0 ) 80034ee: 0019 movs r1, r3 80034f0: 0010 movs r0, r2 - 80034f2: f003 fef3 bl 80072dc + 80034f2: f004 f837 bl 8007564 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = btnSTOP_Pin; @@ -7012,7 +7012,7 @@ void MX_GPIO_Init(void) 800350a: 4a35 ldr r2, [pc, #212] ; (80035e0 ) 800350c: 0019 movs r1, r3 800350e: 0010 movs r0, r2 - 8003510: f003 fee4 bl 80072dc + 8003510: f004 f828 bl 8007564 /*Configure GPIO pins : PAPin PAPin PAPin PAPin PAPin PAPin PAPin PAPin */ @@ -7039,7 +7039,7 @@ void MX_GPIO_Init(void) 8003530: 05db lsls r3, r3, #23 8003532: 0011 movs r1, r2 8003534: 0018 movs r0, r3 - 8003536: f003 fed1 bl 80072dc + 8003536: f004 f815 bl 8007564 /*Configure GPIO pins : PCPin PCPin */ GPIO_InitStruct.Pin = LCD_RD_Pin|LCD_RST_Pin; @@ -7063,7 +7063,7 @@ void MX_GPIO_Init(void) 8003554: 4a22 ldr r2, [pc, #136] ; (80035e0 ) 8003556: 0019 movs r1, r3 8003558: 0010 movs r0, r2 - 800355a: f003 febf bl 80072dc + 800355a: f004 f803 bl 8007564 /*Configure GPIO pins : PBPin PBPin */ GPIO_InitStruct.Pin = LCD_RS_Pin|LCD_WR_Pin; @@ -7087,7 +7087,7 @@ void MX_GPIO_Init(void) 8003578: 4a1b ldr r2, [pc, #108] ; (80035e8 ) 800357a: 0019 movs r1, r3 800357c: 0010 movs r0, r2 - 800357e: f003 fead bl 80072dc + 800357e: f003 fff1 bl 8007564 /*Configure GPIO pins : PBPin PBPin */ GPIO_InitStruct.Pin = MAX_CS_Pin|BUZZER_Pin; @@ -7114,7 +7114,7 @@ void MX_GPIO_Init(void) 80035a2: 4a11 ldr r2, [pc, #68] ; (80035e8 ) 80035a4: 0019 movs r1, r3 80035a6: 0010 movs r0, r2 - 80035a8: f003 fe98 bl 80072dc + 80035a8: f003 ffdc bl 8007564 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = LCD_CS_Pin; @@ -7139,7 +7139,7 @@ void MX_GPIO_Init(void) 80035c8: 4a08 ldr r2, [pc, #32] ; (80035ec ) 80035ca: 0019 movs r1, r3 80035cc: 0010 movs r0, r2 - 80035ce: f003 fe85 bl 80072dc + 80035ce: f003 ffc9 bl 8007564 } 80035d2: 46c0 nop ; (mov r8, r8) @@ -7168,14 +7168,14 @@ int main(void) /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 80035f4: f002 fcbe bl 8005f74 + 80035f4: f002 fe02 bl 80061fc /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 80035f8: f000 f83c bl 8003674 + 80035f8: f000 f840 bl 800367c /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ @@ -7184,15876 +7184,15883 @@ int main(void) MX_GPIO_Init(); 80035fc: f7ff ff02 bl 8003404 MX_TIM1_Init(); - 8003600: f002 f990 bl 8005924 + 8003600: f002 f994 bl 800592c MX_ADC1_Init(); 8003604: f7fe f986 bl 8001914 MX_SPI2_Init(); - 8003608: f000 fa24 bl 8003a54 + 8003608: f000 fa28 bl 8003a5c MX_TIM17_Init(); - 800360c: f002 fb6a bl 8005ce4 + 800360c: f002 fbbe bl 8005d8c MX_TIM15_Init(); - 8003610: f002 fab0 bl 8005b74 + 8003610: f002 fb04 bl 8005c1c + MX_TIM14_Init(); + 8003614: f002 fab2 bl 8005b7c + MX_USART1_UART_Init(); + 8003618: f002 fd16 bl 8006048 /* USER CODE BEGIN 2 */ __HAL_TIM_CLEAR_FLAG(&htim17, TIM_SR_UIF); //clear the update flag so it wont trigger right away; - 8003614: 4b12 ldr r3, [pc, #72] ; (8003660 ) - 8003616: 681b ldr r3, [r3, #0] - 8003618: 2202 movs r2, #2 - 800361a: 4252 negs r2, r2 - 800361c: 611a str r2, [r3, #16] + 800361c: 4b12 ldr r3, [pc, #72] ; (8003668 ) + 800361e: 681b ldr r3, [r3, #0] + 8003620: 2202 movs r2, #2 + 8003622: 4252 negs r2, r2 + 8003624: 611a str r2, [r3, #16] if (ST7793_Init() != 0) { - 800361e: f000 fc0f bl 8003e40 - 8003622: 1e03 subs r3, r0, #0 - 8003624: d006 beq.n 8003634 + 8003626: f000 fc0f bl 8003e48 + 800362a: 1e03 subs r3, r0, #0 + 800362c: d006 beq.n 800363c HAL_GPIO_WritePin(LED_Status_GPIO_Port, LED_Status_Pin, GPIO_PIN_SET); - 8003626: 4b0f ldr r3, [pc, #60] ; (8003664 ) - 8003628: 2201 movs r2, #1 - 800362a: 2104 movs r1, #4 - 800362c: 0018 movs r0, r3 - 800362e: f003 ffb9 bl 80075a4 + 800362e: 4b0f ldr r3, [pc, #60] ; (800366c ) + 8003630: 2201 movs r2, #1 + 8003632: 2104 movs r1, #4 + 8003634: 0018 movs r0, r3 + 8003636: f004 f8f9 bl 800782c while (1) {;} - 8003632: e7fe b.n 8003632 + 800363a: e7fe b.n 800363a } //draw_main_menu(); HAL_ADCEx_Calibration_Start(&hadc1); - 8003634: 4b0c ldr r3, [pc, #48] ; (8003668 ) - 8003636: 0018 movs r0, r3 - 8003638: f003 fccc bl 8006fd4 + 800363c: 4b0c ldr r3, [pc, #48] ; (8003670 ) + 800363e: 0018 movs r0, r3 + 8003640: f003 fe0c bl 800725c HAL_TIM_OnePulse_Start(&htim1, 2); - 800363c: 4b0b ldr r3, [pc, #44] ; (800366c ) - 800363e: 2102 movs r1, #2 - 8003640: 0018 movs r0, r3 - 8003642: f005 feb3 bl 80093ac + 8003644: 4b0b ldr r3, [pc, #44] ; (8003674 ) + 8003646: 2102 movs r1, #2 + 8003648: 0018 movs r0, r3 + 800364a: f005 fff3 bl 8009634 //TIM1->CR1 |= TIM_CR1_CEN; HAL_TIM_PWM_Start(&htim15, TIM_CHANNEL_1); - 8003646: 4b0a ldr r3, [pc, #40] ; (8003670 ) - 8003648: 2100 movs r1, #0 - 800364a: 0018 movs r0, r3 - 800364c: f005 fd10 bl 8009070 + 800364e: 4b0a ldr r3, [pc, #40] ; (8003678 ) + 8003650: 2100 movs r1, #0 + 8003652: 0018 movs r0, r3 + 8003654: f005 fe50 bl 80092f8 /* USER CODE END 2 */ /* Init scheduler */ osKernelInitialize(); /* Call init function for freertos objects (in freertos.c) */ - 8003650: f007 fa9a bl 800ab88 + 8003658: f008 f8b8 bl 800b7cc MX_FREERTOS_Init(); - 8003654: f7fe fa26 bl 8001aa4 + 800365c: f7fe fa22 bl 8001aa4 /* Start scheduler */ osKernelStart(); - 8003658: f007 fab8 bl 800abcc + 8003660: f008 f8d6 bl 800b810 /* We should never get here as control is now taken by the scheduler */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) - 800365c: e7fe b.n 800365c - 800365e: 46c0 nop ; (mov r8, r8) - 8003660: 200002f8 .word 0x200002f8 - 8003664: 50000800 .word 0x50000800 - 8003668: 200000d0 .word 0x200000d0 - 800366c: 20000260 .word 0x20000260 - 8003670: 200002ac .word 0x200002ac + 8003664: e7fe b.n 8003664 + 8003666: 46c0 nop ; (mov r8, r8) + 8003668: 20000344 .word 0x20000344 + 800366c: 50000800 .word 0x50000800 + 8003670: 200000d0 .word 0x200000d0 + 8003674: 20000260 .word 0x20000260 + 8003678: 200002f8 .word 0x200002f8 -08003674 : +0800367c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8003674: b590 push {r4, r7, lr} - 8003676: b093 sub sp, #76 ; 0x4c - 8003678: af00 add r7, sp, #0 + 800367c: b590 push {r4, r7, lr} + 800367e: b093 sub sp, #76 ; 0x4c + 8003680: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 800367a: 2414 movs r4, #20 - 800367c: 193b adds r3, r7, r4 - 800367e: 0018 movs r0, r3 - 8003680: 2334 movs r3, #52 ; 0x34 - 8003682: 001a movs r2, r3 - 8003684: 2100 movs r1, #0 - 8003686: f00a fca2 bl 800dfce + 8003682: 2414 movs r4, #20 + 8003684: 193b adds r3, r7, r4 + 8003686: 0018 movs r0, r3 + 8003688: 2334 movs r3, #52 ; 0x34 + 800368a: 001a movs r2, r3 + 800368c: 2100 movs r1, #0 + 800368e: f00b fabe bl 800ec0e RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 800368a: 1d3b adds r3, r7, #4 - 800368c: 0018 movs r0, r3 - 800368e: 2310 movs r3, #16 - 8003690: 001a movs r2, r3 - 8003692: 2100 movs r1, #0 - 8003694: f00a fc9b bl 800dfce + 8003692: 1d3b adds r3, r7, #4 + 8003694: 0018 movs r0, r3 + 8003696: 2310 movs r3, #16 + 8003698: 001a movs r2, r3 + 800369a: 2100 movs r1, #0 + 800369c: f00b fab7 bl 800ec0e /** Configure the main internal regulator output voltage */ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); - 8003698: 2380 movs r3, #128 ; 0x80 - 800369a: 009b lsls r3, r3, #2 - 800369c: 0018 movs r0, r3 - 800369e: f003 ff9f bl 80075e0 + 80036a0: 2380 movs r3, #128 ; 0x80 + 80036a2: 009b lsls r3, r3, #2 + 80036a4: 0018 movs r0, r3 + 80036a6: f004 f8df bl 8007868 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 80036a2: 193b adds r3, r7, r4 - 80036a4: 2202 movs r2, #2 - 80036a6: 601a str r2, [r3, #0] + 80036aa: 193b adds r3, r7, r4 + 80036ac: 2202 movs r2, #2 + 80036ae: 601a str r2, [r3, #0] RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 80036a8: 193b adds r3, r7, r4 - 80036aa: 2280 movs r2, #128 ; 0x80 - 80036ac: 0052 lsls r2, r2, #1 - 80036ae: 60da str r2, [r3, #12] + 80036b0: 193b adds r3, r7, r4 + 80036b2: 2280 movs r2, #128 ; 0x80 + 80036b4: 0052 lsls r2, r2, #1 + 80036b6: 60da str r2, [r3, #12] RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; - 80036b0: 0021 movs r1, r4 - 80036b2: 187b adds r3, r7, r1 - 80036b4: 2200 movs r2, #0 - 80036b6: 611a str r2, [r3, #16] + 80036b8: 0021 movs r1, r4 + 80036ba: 187b adds r3, r7, r1 + 80036bc: 2200 movs r2, #0 + 80036be: 611a str r2, [r3, #16] RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 80036b8: 187b adds r3, r7, r1 - 80036ba: 2240 movs r2, #64 ; 0x40 - 80036bc: 615a str r2, [r3, #20] + 80036c0: 187b adds r3, r7, r1 + 80036c2: 2240 movs r2, #64 ; 0x40 + 80036c4: 615a str r2, [r3, #20] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 80036be: 187b adds r3, r7, r1 - 80036c0: 2202 movs r2, #2 - 80036c2: 61da str r2, [r3, #28] + 80036c6: 187b adds r3, r7, r1 + 80036c8: 2202 movs r2, #2 + 80036ca: 61da str r2, [r3, #28] RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 80036c4: 187b adds r3, r7, r1 - 80036c6: 2202 movs r2, #2 - 80036c8: 621a str r2, [r3, #32] + 80036cc: 187b adds r3, r7, r1 + 80036ce: 2202 movs r2, #2 + 80036d0: 621a str r2, [r3, #32] RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; - 80036ca: 187b adds r3, r7, r1 - 80036cc: 2200 movs r2, #0 - 80036ce: 625a str r2, [r3, #36] ; 0x24 + 80036d2: 187b adds r3, r7, r1 + 80036d4: 2200 movs r2, #0 + 80036d6: 625a str r2, [r3, #36] ; 0x24 RCC_OscInitStruct.PLL.PLLN = 8; - 80036d0: 187b adds r3, r7, r1 - 80036d2: 2208 movs r2, #8 - 80036d4: 629a str r2, [r3, #40] ; 0x28 + 80036d8: 187b adds r3, r7, r1 + 80036da: 2208 movs r2, #8 + 80036dc: 629a str r2, [r3, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 80036d6: 187b adds r3, r7, r1 - 80036d8: 2280 movs r2, #128 ; 0x80 - 80036da: 0292 lsls r2, r2, #10 - 80036dc: 62da str r2, [r3, #44] ; 0x2c - RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; 80036de: 187b adds r3, r7, r1 80036e0: 2280 movs r2, #128 ; 0x80 - 80036e2: 0592 lsls r2, r2, #22 - 80036e4: 631a str r2, [r3, #48] ; 0x30 - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 80036e2: 0292 lsls r2, r2, #10 + 80036e4: 62da str r2, [r3, #44] ; 0x2c + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; 80036e6: 187b adds r3, r7, r1 - 80036e8: 0018 movs r0, r3 - 80036ea: f003 ffc5 bl 8007678 - 80036ee: 1e03 subs r3, r0, #0 - 80036f0: d001 beq.n 80036f6 + 80036e8: 2280 movs r2, #128 ; 0x80 + 80036ea: 0592 lsls r2, r2, #22 + 80036ec: 631a str r2, [r3, #48] ; 0x30 + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 80036ee: 187b adds r3, r7, r1 + 80036f0: 0018 movs r0, r3 + 80036f2: f004 f905 bl 8007900 + 80036f6: 1e03 subs r3, r0, #0 + 80036f8: d001 beq.n 80036fe { Error_Handler(); - 80036f2: f000 f841 bl 8003778 + 80036fa: f000 f841 bl 8003780 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 80036f6: 1d3b adds r3, r7, #4 - 80036f8: 2207 movs r2, #7 - 80036fa: 601a str r2, [r3, #0] + 80036fe: 1d3b adds r3, r7, #4 + 8003700: 2207 movs r2, #7 + 8003702: 601a str r2, [r3, #0] |RCC_CLOCKTYPE_PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 80036fc: 1d3b adds r3, r7, #4 - 80036fe: 2202 movs r2, #2 - 8003700: 605a str r2, [r3, #4] + 8003704: 1d3b adds r3, r7, #4 + 8003706: 2202 movs r2, #2 + 8003708: 605a str r2, [r3, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8003702: 1d3b adds r3, r7, #4 - 8003704: 2200 movs r2, #0 - 8003706: 609a str r2, [r3, #8] + 800370a: 1d3b adds r3, r7, #4 + 800370c: 2200 movs r2, #0 + 800370e: 609a str r2, [r3, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 8003708: 1d3b adds r3, r7, #4 - 800370a: 2200 movs r2, #0 - 800370c: 60da str r2, [r3, #12] + 8003710: 1d3b adds r3, r7, #4 + 8003712: 2200 movs r2, #0 + 8003714: 60da str r2, [r3, #12] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) - 800370e: 1d3b adds r3, r7, #4 - 8003710: 2102 movs r1, #2 - 8003712: 0018 movs r0, r3 - 8003714: f004 fac0 bl 8007c98 - 8003718: 1e03 subs r3, r0, #0 - 800371a: d001 beq.n 8003720 + 8003716: 1d3b adds r3, r7, #4 + 8003718: 2102 movs r1, #2 + 800371a: 0018 movs r0, r3 + 800371c: f004 fc00 bl 8007f20 + 8003720: 1e03 subs r3, r0, #0 + 8003722: d001 beq.n 8003728 { Error_Handler(); - 800371c: f000 f82c bl 8003778 + 8003724: f000 f82c bl 8003780 } } - 8003720: 46c0 nop ; (mov r8, r8) - 8003722: 46bd mov sp, r7 - 8003724: b013 add sp, #76 ; 0x4c - 8003726: bd90 pop {r4, r7, pc} + 8003728: 46c0 nop ; (mov r8, r8) + 800372a: 46bd mov sp, r7 + 800372c: b013 add sp, #76 ; 0x4c + 800372e: bd90 pop {r4, r7, pc} -08003728 : +08003730 : * a global variable "uwTick" used as application time base. * @param htim : TIM handle * @retval None */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - 8003728: b580 push {r7, lr} - 800372a: b082 sub sp, #8 - 800372c: af00 add r7, sp, #0 - 800372e: 6078 str r0, [r7, #4] + 8003730: b580 push {r7, lr} + 8003732: b082 sub sp, #8 + 8003734: af00 add r7, sp, #0 + 8003736: 6078 str r0, [r7, #4] /* USER CODE BEGIN Callback 0 */ /* USER CODE END Callback 0 */ if (htim->Instance == TIM6) { - 8003730: 687b ldr r3, [r7, #4] - 8003732: 681b ldr r3, [r3, #0] - 8003734: 4a0c ldr r2, [pc, #48] ; (8003768 ) - 8003736: 4293 cmp r3, r2 - 8003738: d101 bne.n 800373e + 8003738: 687b ldr r3, [r7, #4] + 800373a: 681b ldr r3, [r3, #0] + 800373c: 4a0c ldr r2, [pc, #48] ; (8003770 ) + 800373e: 4293 cmp r3, r2 + 8003740: d101 bne.n 8003746 HAL_IncTick(); - 800373a: f002 fc3b bl 8005fb4 + 8003742: f002 fd7b bl 800623c } /* USER CODE BEGIN Callback 1 */ if (htim->Instance == TIM17) { - 800373e: 687b ldr r3, [r7, #4] - 8003740: 681b ldr r3, [r3, #0] - 8003742: 4a0a ldr r2, [pc, #40] ; (800376c ) - 8003744: 4293 cmp r3, r2 - 8003746: d10a bne.n 800375e + 8003746: 687b ldr r3, [r7, #4] + 8003748: 681b ldr r3, [r3, #0] + 800374a: 4a0a ldr r2, [pc, #40] ; (8003774 ) + 800374c: 4293 cmp r3, r2 + 800374e: d10a bne.n 8003766 HAL_TIM_Base_Stop_IT(&htim17); - 8003748: 4b09 ldr r3, [pc, #36] ; (8003770 ) - 800374a: 0018 movs r0, r3 - 800374c: f005 fc02 bl 8008f54 + 8003750: 4b09 ldr r3, [pc, #36] ; (8003778 ) + 8003752: 0018 movs r0, r3 + 8003754: f005 fd42 bl 80091dc HAL_GPIO_WritePin(BUZZER_GPIO_Port, BUZZER_Pin, GPIO_PIN_RESET); - 8003750: 2380 movs r3, #128 ; 0x80 - 8003752: 009b lsls r3, r3, #2 - 8003754: 4807 ldr r0, [pc, #28] ; (8003774 ) - 8003756: 2200 movs r2, #0 - 8003758: 0019 movs r1, r3 - 800375a: f003 ff23 bl 80075a4 + 8003758: 2380 movs r3, #128 ; 0x80 + 800375a: 009b lsls r3, r3, #2 + 800375c: 4807 ldr r0, [pc, #28] ; (800377c ) + 800375e: 2200 movs r2, #0 + 8003760: 0019 movs r1, r3 + 8003762: f004 f863 bl 800782c } /* USER CODE END Callback 1 */ } - 800375e: 46c0 nop ; (mov r8, r8) - 8003760: 46bd mov sp, r7 - 8003762: b002 add sp, #8 - 8003764: bd80 pop {r7, pc} 8003766: 46c0 nop ; (mov r8, r8) - 8003768: 40001000 .word 0x40001000 - 800376c: 40014800 .word 0x40014800 - 8003770: 200002f8 .word 0x200002f8 - 8003774: 50000400 .word 0x50000400 + 8003768: 46bd mov sp, r7 + 800376a: b002 add sp, #8 + 800376c: bd80 pop {r7, pc} + 800376e: 46c0 nop ; (mov r8, r8) + 8003770: 40001000 .word 0x40001000 + 8003774: 40014800 .word 0x40014800 + 8003778: 20000344 .word 0x20000344 + 800377c: 50000400 .word 0x50000400 -08003778 : +08003780 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8003778: b580 push {r7, lr} - 800377a: af00 add r7, sp, #0 + 8003780: b580 push {r7, lr} + 8003782: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 800377c: b672 cpsid i + 8003784: b672 cpsid i } - 800377e: 46c0 nop ; (mov r8, r8) + 8003786: 46c0 nop ; (mov r8, r8) /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8003780: e7fe b.n 8003780 + 8003788: e7fe b.n 8003788 ... -08003784 : +0800378c : * Author: mcfly */ #include "max6675.h" //Read the temperature. -1.0: SPI error; -2.0: Sensor is not connected float MAX6675_GetTemp() { - 8003784: b580 push {r7, lr} - 8003786: b082 sub sp, #8 - 8003788: af00 add r7, sp, #0 + 800378c: b580 push {r7, lr} + 800378e: b082 sub sp, #8 + 8003790: af00 add r7, sp, #0 uint8_t buf[2] = {0}; //Buffer - 800378a: 003b movs r3, r7 - 800378c: 2200 movs r2, #0 - 800378e: 801a strh r2, [r3, #0] + 8003792: 003b movs r3, r7 + 8003794: 2200 movs r2, #0 + 8003796: 801a strh r2, [r3, #0] uint16_t reg; //temp data var float res; MAX6675_CS_ON(); - 8003790: 2380 movs r3, #128 ; 0x80 - 8003792: 021b lsls r3, r3, #8 - 8003794: 4821 ldr r0, [pc, #132] ; (800381c ) - 8003796: 2200 movs r2, #0 - 8003798: 0019 movs r1, r3 - 800379a: f003 ff03 bl 80075a4 + 8003798: 2380 movs r3, #128 ; 0x80 + 800379a: 021b lsls r3, r3, #8 + 800379c: 4821 ldr r0, [pc, #132] ; (8003824 ) + 800379e: 2200 movs r2, #0 + 80037a0: 0019 movs r1, r3 + 80037a2: f004 f843 bl 800782c if (HAL_SPI_Receive(MAX6675_SPI, buf, 2, 50) == HAL_OK) { //Read 2 bytes from SPI - 800379e: 0039 movs r1, r7 - 80037a0: 481f ldr r0, [pc, #124] ; (8003820 ) - 80037a2: 2332 movs r3, #50 ; 0x32 - 80037a4: 2202 movs r2, #2 - 80037a6: f004 fe35 bl 8008414 - 80037aa: 1e03 subs r3, r0, #0 - 80037ac: d128 bne.n 8003800 + 80037a6: 0039 movs r1, r7 + 80037a8: 481f ldr r0, [pc, #124] ; (8003828 ) + 80037aa: 2332 movs r3, #50 ; 0x32 + 80037ac: 2202 movs r2, #2 + 80037ae: f004 ff75 bl 800869c + 80037b2: 1e03 subs r3, r0, #0 + 80037b4: d128 bne.n 8003808 if (buf[1] & 0b00000100) { //Check the thermocouple "connected" bit - 80037ae: 003b movs r3, r7 - 80037b0: 785b ldrb r3, [r3, #1] - 80037b2: 001a movs r2, r3 - 80037b4: 2304 movs r3, #4 - 80037b6: 4013 ands r3, r2 - 80037b8: d003 beq.n 80037c2 + 80037b6: 003b movs r3, r7 + 80037b8: 785b ldrb r3, [r3, #1] + 80037ba: 001a movs r2, r3 + 80037bc: 2304 movs r3, #4 + 80037be: 4013 ands r3, r2 + 80037c0: d003 beq.n 80037ca res = -2.0f; //-2.0 for disconnected sensor - 80037ba: 23c0 movs r3, #192 ; 0xc0 - 80037bc: 061b lsls r3, r3, #24 - 80037be: 607b str r3, [r7, #4] - 80037c0: e020 b.n 8003804 + 80037c2: 23c0 movs r3, #192 ; 0xc0 + 80037c4: 061b lsls r3, r3, #24 + 80037c6: 607b str r3, [r7, #4] + 80037c8: e020 b.n 800380c } else { reg = (buf[1] >> 3) | ((uint16_t)(buf[0] << 5)); //combine the rest of the data - 80037c2: 003b movs r3, r7 - 80037c4: 785b ldrb r3, [r3, #1] - 80037c6: 08db lsrs r3, r3, #3 - 80037c8: b2db uxtb r3, r3 - 80037ca: b299 uxth r1, r3 - 80037cc: 003b movs r3, r7 - 80037ce: 781b ldrb r3, [r3, #0] - 80037d0: b29b uxth r3, r3 - 80037d2: 015b lsls r3, r3, #5 - 80037d4: b29a uxth r2, r3 - 80037d6: 1cbb adds r3, r7, #2 - 80037d8: 430a orrs r2, r1 - 80037da: 801a strh r2, [r3, #0] + 80037ca: 003b movs r3, r7 + 80037cc: 785b ldrb r3, [r3, #1] + 80037ce: 08db lsrs r3, r3, #3 + 80037d0: b2db uxtb r3, r3 + 80037d2: b299 uxth r1, r3 + 80037d4: 003b movs r3, r7 + 80037d6: 781b ldrb r3, [r3, #0] + 80037d8: b29b uxth r3, r3 + 80037da: 015b lsls r3, r3, #5 + 80037dc: b29a uxth r2, r3 + 80037de: 1cbb adds r3, r7, #2 + 80037e0: 430a orrs r2, r1 + 80037e2: 801a strh r2, [r3, #0] res = reg * 0.25; //convert to Celsius - 80037dc: 1cbb adds r3, r7, #2 - 80037de: 881b ldrh r3, [r3, #0] - 80037e0: 0018 movs r0, r3 - 80037e2: f7fd ffc1 bl 8001768 <__aeabi_i2d> - 80037e6: 2200 movs r2, #0 - 80037e8: 4b0e ldr r3, [pc, #56] ; (8003824 ) - 80037ea: f7fd fd51 bl 8001290 <__aeabi_dmul> - 80037ee: 0002 movs r2, r0 - 80037f0: 000b movs r3, r1 - 80037f2: 0010 movs r0, r2 - 80037f4: 0019 movs r1, r3 - 80037f6: f7fd ffe7 bl 80017c8 <__aeabi_d2f> - 80037fa: 1c03 adds r3, r0, #0 - 80037fc: 607b str r3, [r7, #4] - 80037fe: e001 b.n 8003804 + 80037e4: 1cbb adds r3, r7, #2 + 80037e6: 881b ldrh r3, [r3, #0] + 80037e8: 0018 movs r0, r3 + 80037ea: f7fd ffbd bl 8001768 <__aeabi_i2d> + 80037ee: 2200 movs r2, #0 + 80037f0: 4b0e ldr r3, [pc, #56] ; (800382c ) + 80037f2: f7fd fd4d bl 8001290 <__aeabi_dmul> + 80037f6: 0002 movs r2, r0 + 80037f8: 000b movs r3, r1 + 80037fa: 0010 movs r0, r2 + 80037fc: 0019 movs r1, r3 + 80037fe: f7fd ffe3 bl 80017c8 <__aeabi_d2f> + 8003802: 1c03 adds r3, r0, #0 + 8003804: 607b str r3, [r7, #4] + 8003806: e001 b.n 800380c } } else { res = -1.0f; //-1.0 for SPI receive error - 8003800: 4b09 ldr r3, [pc, #36] ; (8003828 ) - 8003802: 607b str r3, [r7, #4] + 8003808: 4b09 ldr r3, [pc, #36] ; (8003830 ) + 800380a: 607b str r3, [r7, #4] } MAX6675_CS_OFF(); - 8003804: 2380 movs r3, #128 ; 0x80 - 8003806: 021b lsls r3, r3, #8 - 8003808: 4804 ldr r0, [pc, #16] ; (800381c ) - 800380a: 2201 movs r2, #1 - 800380c: 0019 movs r1, r3 - 800380e: f003 fec9 bl 80075a4 + 800380c: 2380 movs r3, #128 ; 0x80 + 800380e: 021b lsls r3, r3, #8 + 8003810: 4804 ldr r0, [pc, #16] ; (8003824 ) + 8003812: 2201 movs r2, #1 + 8003814: 0019 movs r1, r3 + 8003816: f004 f809 bl 800782c return res; - 8003812: 687b ldr r3, [r7, #4] + 800381a: 687b ldr r3, [r7, #4] } - 8003814: 1c18 adds r0, r3, #0 - 8003816: 46bd mov sp, r7 - 8003818: b002 add sp, #8 - 800381a: bd80 pop {r7, pc} - 800381c: 50000400 .word 0x50000400 - 8003820: 200001ac .word 0x200001ac - 8003824: 3fd00000 .word 0x3fd00000 - 8003828: bf800000 .word 0xbf800000 + 800381c: 1c18 adds r0, r3, #0 + 800381e: 46bd mov sp, r7 + 8003820: b002 add sp, #8 + 8003822: bd80 pop {r7, pc} + 8003824: 50000400 .word 0x50000400 + 8003828: 200001ac .word 0x200001ac + 800382c: 3fd00000 .word 0x3fd00000 + 8003830: bf800000 .word 0xbf800000 -0800382c : +08003834 : * Author: mcfly */ #include "pid.h" void PID_Init(PIDController *pid) { - 800382c: b580 push {r7, lr} - 800382e: b082 sub sp, #8 - 8003830: af00 add r7, sp, #0 - 8003832: 6078 str r0, [r7, #4] + 8003834: b580 push {r7, lr} + 8003836: b082 sub sp, #8 + 8003838: af00 add r7, sp, #0 + 800383a: 6078 str r0, [r7, #4] //Clear controller values pid->integrator = 0.0f; - 8003834: 687b ldr r3, [r7, #4] - 8003836: 2200 movs r2, #0 - 8003838: 61da str r2, [r3, #28] + 800383c: 687b ldr r3, [r7, #4] + 800383e: 2200 movs r2, #0 + 8003840: 61da str r2, [r3, #28] pid->prevError = 0.0f; - 800383a: 687b ldr r3, [r7, #4] - 800383c: 2200 movs r2, #0 - 800383e: 621a str r2, [r3, #32] + 8003842: 687b ldr r3, [r7, #4] + 8003844: 2200 movs r2, #0 + 8003846: 621a str r2, [r3, #32] pid->differentiator = 0.0f; - 8003840: 687b ldr r3, [r7, #4] - 8003842: 2200 movs r2, #0 - 8003844: 625a str r2, [r3, #36] ; 0x24 + 8003848: 687b ldr r3, [r7, #4] + 800384a: 2200 movs r2, #0 + 800384c: 625a str r2, [r3, #36] ; 0x24 pid->prevMeasurement = 0.0f; - 8003846: 687b ldr r3, [r7, #4] - 8003848: 2200 movs r2, #0 - 800384a: 629a str r2, [r3, #40] ; 0x28 + 800384e: 687b ldr r3, [r7, #4] + 8003850: 2200 movs r2, #0 + 8003852: 629a str r2, [r3, #40] ; 0x28 pid->out = 0.0f; - 800384c: 687b ldr r3, [r7, #4] - 800384e: 2200 movs r2, #0 - 8003850: 62da str r2, [r3, #44] ; 0x2c + 8003854: 687b ldr r3, [r7, #4] + 8003856: 2200 movs r2, #0 + 8003858: 62da str r2, [r3, #44] ; 0x2c } - 8003852: 46c0 nop ; (mov r8, r8) - 8003854: 46bd mov sp, r7 - 8003856: b002 add sp, #8 - 8003858: bd80 pop {r7, pc} + 800385a: 46c0 nop ; (mov r8, r8) + 800385c: 46bd mov sp, r7 + 800385e: b002 add sp, #8 + 8003860: bd80 pop {r7, pc} -0800385a : +08003862 : float PID_Update(PIDController *pid, float setpoint, float measurement) { - 800385a: b5b0 push {r4, r5, r7, lr} - 800385c: b088 sub sp, #32 - 800385e: af00 add r7, sp, #0 - 8003860: 60f8 str r0, [r7, #12] - 8003862: 60b9 str r1, [r7, #8] - 8003864: 607a str r2, [r7, #4] + 8003862: b5b0 push {r4, r5, r7, lr} + 8003864: b088 sub sp, #32 + 8003866: af00 add r7, sp, #0 + 8003868: 60f8 str r0, [r7, #12] + 800386a: 60b9 str r1, [r7, #8] + 800386c: 607a str r2, [r7, #4] // d[n] = 2*Kd/(2*tau+T) * (e[n]-e[n-1]) + (2*tau-T)/(2*tau+T) * d[n-1] // PID = p[n]+i[n]+d[n] //Error signal float error = setpoint - measurement; - 8003866: 6879 ldr r1, [r7, #4] - 8003868: 68b8 ldr r0, [r7, #8] - 800386a: f7fd fab3 bl 8000dd4 <__aeabi_fsub> - 800386e: 1c03 adds r3, r0, #0 - 8003870: 617b str r3, [r7, #20] + 800386e: 6879 ldr r1, [r7, #4] + 8003870: 68b8 ldr r0, [r7, #8] + 8003872: f7fd faaf bl 8000dd4 <__aeabi_fsub> + 8003876: 1c03 adds r3, r0, #0 + 8003878: 617b str r3, [r7, #20] //Proportional float proportional = pid->Kp * error; - 8003872: 68fb ldr r3, [r7, #12] - 8003874: 681b ldr r3, [r3, #0] - 8003876: 1c19 adds r1, r3, #0 - 8003878: 6978 ldr r0, [r7, #20] - 800387a: f7fd f985 bl 8000b88 <__aeabi_fmul> - 800387e: 1c03 adds r3, r0, #0 - 8003880: 613b str r3, [r7, #16] + 800387a: 68fb ldr r3, [r7, #12] + 800387c: 681b ldr r3, [r3, #0] + 800387e: 1c19 adds r1, r3, #0 + 8003880: 6978 ldr r0, [r7, #20] + 8003882: f7fd f981 bl 8000b88 <__aeabi_fmul> + 8003886: 1c03 adds r3, r0, #0 + 8003888: 613b str r3, [r7, #16] //Integral pid->integrator += 0.5f * pid->Ki * pid->T * (error + pid->prevError); - 8003882: 68fb ldr r3, [r7, #12] - 8003884: 69dc ldr r4, [r3, #28] - 8003886: 68fb ldr r3, [r7, #12] - 8003888: 685b ldr r3, [r3, #4] - 800388a: 21fc movs r1, #252 ; 0xfc - 800388c: 0589 lsls r1, r1, #22 - 800388e: 1c18 adds r0, r3, #0 - 8003890: f7fd f97a bl 8000b88 <__aeabi_fmul> - 8003894: 1c03 adds r3, r0, #0 - 8003896: 1c1a adds r2, r3, #0 - 8003898: 68fb ldr r3, [r7, #12] - 800389a: 699b ldr r3, [r3, #24] - 800389c: 1c19 adds r1, r3, #0 - 800389e: 1c10 adds r0, r2, #0 - 80038a0: f7fd f972 bl 8000b88 <__aeabi_fmul> - 80038a4: 1c03 adds r3, r0, #0 - 80038a6: 1c1d adds r5, r3, #0 - 80038a8: 68fb ldr r3, [r7, #12] - 80038aa: 6a1b ldr r3, [r3, #32] - 80038ac: 6979 ldr r1, [r7, #20] - 80038ae: 1c18 adds r0, r3, #0 - 80038b0: f7fc fe04 bl 80004bc <__aeabi_fadd> - 80038b4: 1c03 adds r3, r0, #0 - 80038b6: 1c19 adds r1, r3, #0 - 80038b8: 1c28 adds r0, r5, #0 - 80038ba: f7fd f965 bl 8000b88 <__aeabi_fmul> - 80038be: 1c03 adds r3, r0, #0 - 80038c0: 1c19 adds r1, r3, #0 - 80038c2: 1c20 adds r0, r4, #0 - 80038c4: f7fc fdfa bl 80004bc <__aeabi_fadd> - 80038c8: 1c03 adds r3, r0, #0 - 80038ca: 1c1a adds r2, r3, #0 - 80038cc: 68fb ldr r3, [r7, #12] - 80038ce: 61da str r2, [r3, #28] + 800388a: 68fb ldr r3, [r7, #12] + 800388c: 69dc ldr r4, [r3, #28] + 800388e: 68fb ldr r3, [r7, #12] + 8003890: 685b ldr r3, [r3, #4] + 8003892: 21fc movs r1, #252 ; 0xfc + 8003894: 0589 lsls r1, r1, #22 + 8003896: 1c18 adds r0, r3, #0 + 8003898: f7fd f976 bl 8000b88 <__aeabi_fmul> + 800389c: 1c03 adds r3, r0, #0 + 800389e: 1c1a adds r2, r3, #0 + 80038a0: 68fb ldr r3, [r7, #12] + 80038a2: 699b ldr r3, [r3, #24] + 80038a4: 1c19 adds r1, r3, #0 + 80038a6: 1c10 adds r0, r2, #0 + 80038a8: f7fd f96e bl 8000b88 <__aeabi_fmul> + 80038ac: 1c03 adds r3, r0, #0 + 80038ae: 1c1d adds r5, r3, #0 + 80038b0: 68fb ldr r3, [r7, #12] + 80038b2: 6a1b ldr r3, [r3, #32] + 80038b4: 6979 ldr r1, [r7, #20] + 80038b6: 1c18 adds r0, r3, #0 + 80038b8: f7fc fe00 bl 80004bc <__aeabi_fadd> + 80038bc: 1c03 adds r3, r0, #0 + 80038be: 1c19 adds r1, r3, #0 + 80038c0: 1c28 adds r0, r5, #0 + 80038c2: f7fd f961 bl 8000b88 <__aeabi_fmul> + 80038c6: 1c03 adds r3, r0, #0 + 80038c8: 1c19 adds r1, r3, #0 + 80038ca: 1c20 adds r0, r4, #0 + 80038cc: f7fc fdf6 bl 80004bc <__aeabi_fadd> + 80038d0: 1c03 adds r3, r0, #0 + 80038d2: 1c1a adds r2, r3, #0 + 80038d4: 68fb ldr r3, [r7, #12] + 80038d6: 61da str r2, [r3, #28] //Anti-wind-up via dynamic integrator clamping float limMinInt, limMaxInt; //Compute integrator limits if (pid->limMax > proportional) { - 80038d0: 68fb ldr r3, [r7, #12] - 80038d2: 695b ldr r3, [r3, #20] - 80038d4: 1c19 adds r1, r3, #0 - 80038d6: 6938 ldr r0, [r7, #16] - 80038d8: f7fc fdb0 bl 800043c <__aeabi_fcmplt> - 80038dc: 1e03 subs r3, r0, #0 - 80038de: d008 beq.n 80038f2 + 80038d8: 68fb ldr r3, [r7, #12] + 80038da: 695b ldr r3, [r3, #20] + 80038dc: 1c19 adds r1, r3, #0 + 80038de: 6938 ldr r0, [r7, #16] + 80038e0: f7fc fdac bl 800043c <__aeabi_fcmplt> + 80038e4: 1e03 subs r3, r0, #0 + 80038e6: d008 beq.n 80038fa limMaxInt = pid->limMax - proportional; - 80038e0: 68fb ldr r3, [r7, #12] - 80038e2: 695b ldr r3, [r3, #20] - 80038e4: 6939 ldr r1, [r7, #16] - 80038e6: 1c18 adds r0, r3, #0 - 80038e8: f7fd fa74 bl 8000dd4 <__aeabi_fsub> - 80038ec: 1c03 adds r3, r0, #0 - 80038ee: 61bb str r3, [r7, #24] - 80038f0: e001 b.n 80038f6 + 80038e8: 68fb ldr r3, [r7, #12] + 80038ea: 695b ldr r3, [r3, #20] + 80038ec: 6939 ldr r1, [r7, #16] + 80038ee: 1c18 adds r0, r3, #0 + 80038f0: f7fd fa70 bl 8000dd4 <__aeabi_fsub> + 80038f4: 1c03 adds r3, r0, #0 + 80038f6: 61bb str r3, [r7, #24] + 80038f8: e001 b.n 80038fe } else { limMaxInt = 0.0f; - 80038f2: 2300 movs r3, #0 - 80038f4: 61bb str r3, [r7, #24] + 80038fa: 2300 movs r3, #0 + 80038fc: 61bb str r3, [r7, #24] } if (pid->limMin < proportional) { - 80038f6: 68fb ldr r3, [r7, #12] - 80038f8: 691b ldr r3, [r3, #16] - 80038fa: 1c19 adds r1, r3, #0 - 80038fc: 6938 ldr r0, [r7, #16] - 80038fe: f7fc fdb1 bl 8000464 <__aeabi_fcmpgt> - 8003902: 1e03 subs r3, r0, #0 - 8003904: d008 beq.n 8003918 + 80038fe: 68fb ldr r3, [r7, #12] + 8003900: 691b ldr r3, [r3, #16] + 8003902: 1c19 adds r1, r3, #0 + 8003904: 6938 ldr r0, [r7, #16] + 8003906: f7fc fdad bl 8000464 <__aeabi_fcmpgt> + 800390a: 1e03 subs r3, r0, #0 + 800390c: d008 beq.n 8003920 limMinInt = pid->limMin - proportional; - 8003906: 68fb ldr r3, [r7, #12] - 8003908: 691b ldr r3, [r3, #16] - 800390a: 6939 ldr r1, [r7, #16] - 800390c: 1c18 adds r0, r3, #0 - 800390e: f7fd fa61 bl 8000dd4 <__aeabi_fsub> - 8003912: 1c03 adds r3, r0, #0 - 8003914: 61fb str r3, [r7, #28] - 8003916: e001 b.n 800391c + 800390e: 68fb ldr r3, [r7, #12] + 8003910: 691b ldr r3, [r3, #16] + 8003912: 6939 ldr r1, [r7, #16] + 8003914: 1c18 adds r0, r3, #0 + 8003916: f7fd fa5d bl 8000dd4 <__aeabi_fsub> + 800391a: 1c03 adds r3, r0, #0 + 800391c: 61fb str r3, [r7, #28] + 800391e: e001 b.n 8003924 } else { limMinInt = 0.0f; - 8003918: 2300 movs r3, #0 - 800391a: 61fb str r3, [r7, #28] + 8003920: 2300 movs r3, #0 + 8003922: 61fb str r3, [r7, #28] } //Clamp integrator if (pid->integrator > limMaxInt) { - 800391c: 68fb ldr r3, [r7, #12] - 800391e: 69db ldr r3, [r3, #28] - 8003920: 1c19 adds r1, r3, #0 - 8003922: 69b8 ldr r0, [r7, #24] - 8003924: f7fc fd8a bl 800043c <__aeabi_fcmplt> - 8003928: 1e03 subs r3, r0, #0 - 800392a: d003 beq.n 8003934 + 8003924: 68fb ldr r3, [r7, #12] + 8003926: 69db ldr r3, [r3, #28] + 8003928: 1c19 adds r1, r3, #0 + 800392a: 69b8 ldr r0, [r7, #24] + 800392c: f7fc fd86 bl 800043c <__aeabi_fcmplt> + 8003930: 1e03 subs r3, r0, #0 + 8003932: d003 beq.n 800393c pid->integrator = limMaxInt; - 800392c: 68fb ldr r3, [r7, #12] - 800392e: 69ba ldr r2, [r7, #24] - 8003930: 61da str r2, [r3, #28] - 8003932: e00a b.n 800394a - } else if (pid->integrator < limMinInt) { 8003934: 68fb ldr r3, [r7, #12] - 8003936: 69db ldr r3, [r3, #28] - 8003938: 1c19 adds r1, r3, #0 - 800393a: 69f8 ldr r0, [r7, #28] - 800393c: f7fc fd92 bl 8000464 <__aeabi_fcmpgt> - 8003940: 1e03 subs r3, r0, #0 - 8003942: d002 beq.n 800394a + 8003936: 69ba ldr r2, [r7, #24] + 8003938: 61da str r2, [r3, #28] + 800393a: e00a b.n 8003952 + } else if (pid->integrator < limMinInt) { + 800393c: 68fb ldr r3, [r7, #12] + 800393e: 69db ldr r3, [r3, #28] + 8003940: 1c19 adds r1, r3, #0 + 8003942: 69f8 ldr r0, [r7, #28] + 8003944: f7fc fd8e bl 8000464 <__aeabi_fcmpgt> + 8003948: 1e03 subs r3, r0, #0 + 800394a: d002 beq.n 8003952 pid->integrator = limMinInt; - 8003944: 68fb ldr r3, [r7, #12] - 8003946: 69fa ldr r2, [r7, #28] - 8003948: 61da str r2, [r3, #28] + 800394c: 68fb ldr r3, [r7, #12] + 800394e: 69fa ldr r2, [r7, #28] + 8003950: 61da str r2, [r3, #28] } //Derivative (band-limited differentiator) pid->differentiator = (2.0f * pid->Kd * (measurement - pid->prevMeasurement) //Note: derivative on measurement - 800394a: 68fb ldr r3, [r7, #12] - 800394c: 689b ldr r3, [r3, #8] - 800394e: 1c19 adds r1, r3, #0 - 8003950: 1c18 adds r0, r3, #0 - 8003952: f7fc fdb3 bl 80004bc <__aeabi_fadd> - 8003956: 1c03 adds r3, r0, #0 - 8003958: 1c1c adds r4, r3, #0 - 800395a: 68fb ldr r3, [r7, #12] - 800395c: 6a9b ldr r3, [r3, #40] ; 0x28 - 800395e: 1c19 adds r1, r3, #0 - 8003960: 6878 ldr r0, [r7, #4] - 8003962: f7fd fa37 bl 8000dd4 <__aeabi_fsub> - 8003966: 1c03 adds r3, r0, #0 - 8003968: 1c19 adds r1, r3, #0 - 800396a: 1c20 adds r0, r4, #0 - 800396c: f7fd f90c bl 8000b88 <__aeabi_fmul> - 8003970: 1c03 adds r3, r0, #0 - 8003972: 1c1c adds r4, r3, #0 + 8003952: 68fb ldr r3, [r7, #12] + 8003954: 689b ldr r3, [r3, #8] + 8003956: 1c19 adds r1, r3, #0 + 8003958: 1c18 adds r0, r3, #0 + 800395a: f7fc fdaf bl 80004bc <__aeabi_fadd> + 800395e: 1c03 adds r3, r0, #0 + 8003960: 1c1c adds r4, r3, #0 + 8003962: 68fb ldr r3, [r7, #12] + 8003964: 6a9b ldr r3, [r3, #40] ; 0x28 + 8003966: 1c19 adds r1, r3, #0 + 8003968: 6878 ldr r0, [r7, #4] + 800396a: f7fd fa33 bl 8000dd4 <__aeabi_fsub> + 800396e: 1c03 adds r3, r0, #0 + 8003970: 1c19 adds r1, r3, #0 + 8003972: 1c20 adds r0, r4, #0 + 8003974: f7fd f908 bl 8000b88 <__aeabi_fmul> + 8003978: 1c03 adds r3, r0, #0 + 800397a: 1c1c adds r4, r3, #0 + (2.0f * pid->tau - pid->T) * pid->differentiator) - 8003974: 68fb ldr r3, [r7, #12] - 8003976: 68db ldr r3, [r3, #12] - 8003978: 1c19 adds r1, r3, #0 - 800397a: 1c18 adds r0, r3, #0 - 800397c: f7fc fd9e bl 80004bc <__aeabi_fadd> - 8003980: 1c03 adds r3, r0, #0 - 8003982: 1c1a adds r2, r3, #0 - 8003984: 68fb ldr r3, [r7, #12] - 8003986: 699b ldr r3, [r3, #24] - 8003988: 1c19 adds r1, r3, #0 - 800398a: 1c10 adds r0, r2, #0 - 800398c: f7fd fa22 bl 8000dd4 <__aeabi_fsub> - 8003990: 1c03 adds r3, r0, #0 - 8003992: 1c1a adds r2, r3, #0 - 8003994: 68fb ldr r3, [r7, #12] - 8003996: 6a5b ldr r3, [r3, #36] ; 0x24 - 8003998: 1c19 adds r1, r3, #0 - 800399a: 1c10 adds r0, r2, #0 - 800399c: f7fd f8f4 bl 8000b88 <__aeabi_fmul> - 80039a0: 1c03 adds r3, r0, #0 - 80039a2: 1c19 adds r1, r3, #0 - 80039a4: 1c20 adds r0, r4, #0 - 80039a6: f7fc fd89 bl 80004bc <__aeabi_fadd> - 80039aa: 1c03 adds r3, r0, #0 - 80039ac: 1c1c adds r4, r3, #0 + 800397c: 68fb ldr r3, [r7, #12] + 800397e: 68db ldr r3, [r3, #12] + 8003980: 1c19 adds r1, r3, #0 + 8003982: 1c18 adds r0, r3, #0 + 8003984: f7fc fd9a bl 80004bc <__aeabi_fadd> + 8003988: 1c03 adds r3, r0, #0 + 800398a: 1c1a adds r2, r3, #0 + 800398c: 68fb ldr r3, [r7, #12] + 800398e: 699b ldr r3, [r3, #24] + 8003990: 1c19 adds r1, r3, #0 + 8003992: 1c10 adds r0, r2, #0 + 8003994: f7fd fa1e bl 8000dd4 <__aeabi_fsub> + 8003998: 1c03 adds r3, r0, #0 + 800399a: 1c1a adds r2, r3, #0 + 800399c: 68fb ldr r3, [r7, #12] + 800399e: 6a5b ldr r3, [r3, #36] ; 0x24 + 80039a0: 1c19 adds r1, r3, #0 + 80039a2: 1c10 adds r0, r2, #0 + 80039a4: f7fd f8f0 bl 8000b88 <__aeabi_fmul> + 80039a8: 1c03 adds r3, r0, #0 + 80039aa: 1c19 adds r1, r3, #0 + 80039ac: 1c20 adds r0, r4, #0 + 80039ae: f7fc fd85 bl 80004bc <__aeabi_fadd> + 80039b2: 1c03 adds r3, r0, #0 + 80039b4: 1c1c adds r4, r3, #0 / (2.0f * pid->tau + pid->T); - 80039ae: 68fb ldr r3, [r7, #12] - 80039b0: 68db ldr r3, [r3, #12] - 80039b2: 1c19 adds r1, r3, #0 - 80039b4: 1c18 adds r0, r3, #0 - 80039b6: f7fc fd81 bl 80004bc <__aeabi_fadd> - 80039ba: 1c03 adds r3, r0, #0 - 80039bc: 1c1a adds r2, r3, #0 - 80039be: 68fb ldr r3, [r7, #12] - 80039c0: 699b ldr r3, [r3, #24] - 80039c2: 1c19 adds r1, r3, #0 - 80039c4: 1c10 adds r0, r2, #0 - 80039c6: f7fc fd79 bl 80004bc <__aeabi_fadd> - 80039ca: 1c03 adds r3, r0, #0 - 80039cc: 1c19 adds r1, r3, #0 - 80039ce: 1c20 adds r0, r4, #0 - 80039d0: f7fc ff12 bl 80007f8 <__aeabi_fdiv> - 80039d4: 1c03 adds r3, r0, #0 - 80039d6: 1c1a adds r2, r3, #0 + 80039b6: 68fb ldr r3, [r7, #12] + 80039b8: 68db ldr r3, [r3, #12] + 80039ba: 1c19 adds r1, r3, #0 + 80039bc: 1c18 adds r0, r3, #0 + 80039be: f7fc fd7d bl 80004bc <__aeabi_fadd> + 80039c2: 1c03 adds r3, r0, #0 + 80039c4: 1c1a adds r2, r3, #0 + 80039c6: 68fb ldr r3, [r7, #12] + 80039c8: 699b ldr r3, [r3, #24] + 80039ca: 1c19 adds r1, r3, #0 + 80039cc: 1c10 adds r0, r2, #0 + 80039ce: f7fc fd75 bl 80004bc <__aeabi_fadd> + 80039d2: 1c03 adds r3, r0, #0 + 80039d4: 1c19 adds r1, r3, #0 + 80039d6: 1c20 adds r0, r4, #0 + 80039d8: f7fc ff0e bl 80007f8 <__aeabi_fdiv> + 80039dc: 1c03 adds r3, r0, #0 + 80039de: 1c1a adds r2, r3, #0 pid->differentiator = (2.0f * pid->Kd * (measurement - pid->prevMeasurement) //Note: derivative on measurement - 80039d8: 68fb ldr r3, [r7, #12] - 80039da: 625a str r2, [r3, #36] ; 0x24 + 80039e0: 68fb ldr r3, [r7, #12] + 80039e2: 625a str r2, [r3, #36] ; 0x24 //Compute output and apply limits pid->out = proportional + pid->integrator + pid->differentiator; - 80039dc: 68fb ldr r3, [r7, #12] - 80039de: 69db ldr r3, [r3, #28] - 80039e0: 6939 ldr r1, [r7, #16] - 80039e2: 1c18 adds r0, r3, #0 - 80039e4: f7fc fd6a bl 80004bc <__aeabi_fadd> - 80039e8: 1c03 adds r3, r0, #0 - 80039ea: 1c1a adds r2, r3, #0 - 80039ec: 68fb ldr r3, [r7, #12] - 80039ee: 6a5b ldr r3, [r3, #36] ; 0x24 - 80039f0: 1c19 adds r1, r3, #0 - 80039f2: 1c10 adds r0, r2, #0 - 80039f4: f7fc fd62 bl 80004bc <__aeabi_fadd> - 80039f8: 1c03 adds r3, r0, #0 - 80039fa: 1c1a adds r2, r3, #0 - 80039fc: 68fb ldr r3, [r7, #12] - 80039fe: 62da str r2, [r3, #44] ; 0x2c - if (pid->out > pid->limMax) { - 8003a00: 68fb ldr r3, [r7, #12] - 8003a02: 6ada ldr r2, [r3, #44] ; 0x2c + 80039e4: 68fb ldr r3, [r7, #12] + 80039e6: 69db ldr r3, [r3, #28] + 80039e8: 6939 ldr r1, [r7, #16] + 80039ea: 1c18 adds r0, r3, #0 + 80039ec: f7fc fd66 bl 80004bc <__aeabi_fadd> + 80039f0: 1c03 adds r3, r0, #0 + 80039f2: 1c1a adds r2, r3, #0 + 80039f4: 68fb ldr r3, [r7, #12] + 80039f6: 6a5b ldr r3, [r3, #36] ; 0x24 + 80039f8: 1c19 adds r1, r3, #0 + 80039fa: 1c10 adds r0, r2, #0 + 80039fc: f7fc fd5e bl 80004bc <__aeabi_fadd> + 8003a00: 1c03 adds r3, r0, #0 + 8003a02: 1c1a adds r2, r3, #0 8003a04: 68fb ldr r3, [r7, #12] - 8003a06: 695b ldr r3, [r3, #20] - 8003a08: 1c19 adds r1, r3, #0 - 8003a0a: 1c10 adds r0, r2, #0 - 8003a0c: f7fc fd2a bl 8000464 <__aeabi_fcmpgt> - 8003a10: 1e03 subs r3, r0, #0 - 8003a12: d004 beq.n 8003a1e + 8003a06: 62da str r2, [r3, #44] ; 0x2c + if (pid->out > pid->limMax) { + 8003a08: 68fb ldr r3, [r7, #12] + 8003a0a: 6ada ldr r2, [r3, #44] ; 0x2c + 8003a0c: 68fb ldr r3, [r7, #12] + 8003a0e: 695b ldr r3, [r3, #20] + 8003a10: 1c19 adds r1, r3, #0 + 8003a12: 1c10 adds r0, r2, #0 + 8003a14: f7fc fd26 bl 8000464 <__aeabi_fcmpgt> + 8003a18: 1e03 subs r3, r0, #0 + 8003a1a: d004 beq.n 8003a26 pid->out = pid->limMax; - 8003a14: 68fb ldr r3, [r7, #12] - 8003a16: 695a ldr r2, [r3, #20] - 8003a18: 68fb ldr r3, [r7, #12] - 8003a1a: 62da str r2, [r3, #44] ; 0x2c - 8003a1c: e00d b.n 8003a3a + 8003a1c: 68fb ldr r3, [r7, #12] + 8003a1e: 695a ldr r2, [r3, #20] + 8003a20: 68fb ldr r3, [r7, #12] + 8003a22: 62da str r2, [r3, #44] ; 0x2c + 8003a24: e00d b.n 8003a42 } else if (pid->out < pid->limMin) { - 8003a1e: 68fb ldr r3, [r7, #12] - 8003a20: 6ada ldr r2, [r3, #44] ; 0x2c - 8003a22: 68fb ldr r3, [r7, #12] - 8003a24: 691b ldr r3, [r3, #16] - 8003a26: 1c19 adds r1, r3, #0 - 8003a28: 1c10 adds r0, r2, #0 - 8003a2a: f7fc fd07 bl 800043c <__aeabi_fcmplt> - 8003a2e: 1e03 subs r3, r0, #0 - 8003a30: d003 beq.n 8003a3a + 8003a26: 68fb ldr r3, [r7, #12] + 8003a28: 6ada ldr r2, [r3, #44] ; 0x2c + 8003a2a: 68fb ldr r3, [r7, #12] + 8003a2c: 691b ldr r3, [r3, #16] + 8003a2e: 1c19 adds r1, r3, #0 + 8003a30: 1c10 adds r0, r2, #0 + 8003a32: f7fc fd03 bl 800043c <__aeabi_fcmplt> + 8003a36: 1e03 subs r3, r0, #0 + 8003a38: d003 beq.n 8003a42 pid->out = pid->limMin; - 8003a32: 68fb ldr r3, [r7, #12] - 8003a34: 691a ldr r2, [r3, #16] - 8003a36: 68fb ldr r3, [r7, #12] - 8003a38: 62da str r2, [r3, #44] ; 0x2c + 8003a3a: 68fb ldr r3, [r7, #12] + 8003a3c: 691a ldr r2, [r3, #16] + 8003a3e: 68fb ldr r3, [r7, #12] + 8003a40: 62da str r2, [r3, #44] ; 0x2c } //Store error and measurement for later use pid->prevError = error; - 8003a3a: 68fb ldr r3, [r7, #12] - 8003a3c: 697a ldr r2, [r7, #20] - 8003a3e: 621a str r2, [r3, #32] + 8003a42: 68fb ldr r3, [r7, #12] + 8003a44: 697a ldr r2, [r7, #20] + 8003a46: 621a str r2, [r3, #32] pid->prevMeasurement = measurement; - 8003a40: 68fb ldr r3, [r7, #12] - 8003a42: 687a ldr r2, [r7, #4] - 8003a44: 629a str r2, [r3, #40] ; 0x28 + 8003a48: 68fb ldr r3, [r7, #12] + 8003a4a: 687a ldr r2, [r7, #4] + 8003a4c: 629a str r2, [r3, #40] ; 0x28 //Return controller output return pid->out; - 8003a46: 68fb ldr r3, [r7, #12] - 8003a48: 6adb ldr r3, [r3, #44] ; 0x2c + 8003a4e: 68fb ldr r3, [r7, #12] + 8003a50: 6adb ldr r3, [r3, #44] ; 0x2c } - 8003a4a: 1c18 adds r0, r3, #0 - 8003a4c: 46bd mov sp, r7 - 8003a4e: b008 add sp, #32 - 8003a50: bdb0 pop {r4, r5, r7, pc} + 8003a52: 1c18 adds r0, r3, #0 + 8003a54: 46bd mov sp, r7 + 8003a56: b008 add sp, #32 + 8003a58: bdb0 pop {r4, r5, r7, pc} ... -08003a54 : +08003a5c : SPI_HandleTypeDef hspi2; /* SPI2 init function */ void MX_SPI2_Init(void) { - 8003a54: b580 push {r7, lr} - 8003a56: af00 add r7, sp, #0 + 8003a5c: b580 push {r7, lr} + 8003a5e: af00 add r7, sp, #0 /* USER CODE END SPI2_Init 0 */ /* USER CODE BEGIN SPI2_Init 1 */ /* USER CODE END SPI2_Init 1 */ hspi2.Instance = SPI2; - 8003a58: 4b1c ldr r3, [pc, #112] ; (8003acc ) - 8003a5a: 4a1d ldr r2, [pc, #116] ; (8003ad0 ) - 8003a5c: 601a str r2, [r3, #0] + 8003a60: 4b1c ldr r3, [pc, #112] ; (8003ad4 ) + 8003a62: 4a1d ldr r2, [pc, #116] ; (8003ad8 ) + 8003a64: 601a str r2, [r3, #0] hspi2.Init.Mode = SPI_MODE_MASTER; - 8003a5e: 4b1b ldr r3, [pc, #108] ; (8003acc ) - 8003a60: 2282 movs r2, #130 ; 0x82 - 8003a62: 0052 lsls r2, r2, #1 - 8003a64: 605a str r2, [r3, #4] + 8003a66: 4b1b ldr r3, [pc, #108] ; (8003ad4 ) + 8003a68: 2282 movs r2, #130 ; 0x82 + 8003a6a: 0052 lsls r2, r2, #1 + 8003a6c: 605a str r2, [r3, #4] hspi2.Init.Direction = SPI_DIRECTION_2LINES_RXONLY; - 8003a66: 4b19 ldr r3, [pc, #100] ; (8003acc ) - 8003a68: 2280 movs r2, #128 ; 0x80 - 8003a6a: 00d2 lsls r2, r2, #3 - 8003a6c: 609a str r2, [r3, #8] - hspi2.Init.DataSize = SPI_DATASIZE_8BIT; - 8003a6e: 4b17 ldr r3, [pc, #92] ; (8003acc ) - 8003a70: 22e0 movs r2, #224 ; 0xe0 + 8003a6e: 4b19 ldr r3, [pc, #100] ; (8003ad4 ) + 8003a70: 2280 movs r2, #128 ; 0x80 8003a72: 00d2 lsls r2, r2, #3 - 8003a74: 60da str r2, [r3, #12] + 8003a74: 609a str r2, [r3, #8] + hspi2.Init.DataSize = SPI_DATASIZE_8BIT; + 8003a76: 4b17 ldr r3, [pc, #92] ; (8003ad4 ) + 8003a78: 22e0 movs r2, #224 ; 0xe0 + 8003a7a: 00d2 lsls r2, r2, #3 + 8003a7c: 60da str r2, [r3, #12] hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; - 8003a76: 4b15 ldr r3, [pc, #84] ; (8003acc ) - 8003a78: 2200 movs r2, #0 - 8003a7a: 611a str r2, [r3, #16] + 8003a7e: 4b15 ldr r3, [pc, #84] ; (8003ad4 ) + 8003a80: 2200 movs r2, #0 + 8003a82: 611a str r2, [r3, #16] hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; - 8003a7c: 4b13 ldr r3, [pc, #76] ; (8003acc ) - 8003a7e: 2200 movs r2, #0 - 8003a80: 615a str r2, [r3, #20] + 8003a84: 4b13 ldr r3, [pc, #76] ; (8003ad4 ) + 8003a86: 2200 movs r2, #0 + 8003a88: 615a str r2, [r3, #20] hspi2.Init.NSS = SPI_NSS_SOFT; - 8003a82: 4b12 ldr r3, [pc, #72] ; (8003acc ) - 8003a84: 2280 movs r2, #128 ; 0x80 - 8003a86: 0092 lsls r2, r2, #2 - 8003a88: 619a str r2, [r3, #24] + 8003a8a: 4b12 ldr r3, [pc, #72] ; (8003ad4 ) + 8003a8c: 2280 movs r2, #128 ; 0x80 + 8003a8e: 0092 lsls r2, r2, #2 + 8003a90: 619a str r2, [r3, #24] hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; - 8003a8a: 4b10 ldr r3, [pc, #64] ; (8003acc ) - 8003a8c: 2218 movs r2, #24 - 8003a8e: 61da str r2, [r3, #28] + 8003a92: 4b10 ldr r3, [pc, #64] ; (8003ad4 ) + 8003a94: 2218 movs r2, #24 + 8003a96: 61da str r2, [r3, #28] hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; - 8003a90: 4b0e ldr r3, [pc, #56] ; (8003acc ) - 8003a92: 2200 movs r2, #0 - 8003a94: 621a str r2, [r3, #32] + 8003a98: 4b0e ldr r3, [pc, #56] ; (8003ad4 ) + 8003a9a: 2200 movs r2, #0 + 8003a9c: 621a str r2, [r3, #32] hspi2.Init.TIMode = SPI_TIMODE_DISABLE; - 8003a96: 4b0d ldr r3, [pc, #52] ; (8003acc ) - 8003a98: 2200 movs r2, #0 - 8003a9a: 625a str r2, [r3, #36] ; 0x24 + 8003a9e: 4b0d ldr r3, [pc, #52] ; (8003ad4 ) + 8003aa0: 2200 movs r2, #0 + 8003aa2: 625a str r2, [r3, #36] ; 0x24 hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 8003a9c: 4b0b ldr r3, [pc, #44] ; (8003acc ) - 8003a9e: 2200 movs r2, #0 - 8003aa0: 629a str r2, [r3, #40] ; 0x28 + 8003aa4: 4b0b ldr r3, [pc, #44] ; (8003ad4 ) + 8003aa6: 2200 movs r2, #0 + 8003aa8: 629a str r2, [r3, #40] ; 0x28 hspi2.Init.CRCPolynomial = 7; - 8003aa2: 4b0a ldr r3, [pc, #40] ; (8003acc ) - 8003aa4: 2207 movs r2, #7 - 8003aa6: 62da str r2, [r3, #44] ; 0x2c + 8003aaa: 4b0a ldr r3, [pc, #40] ; (8003ad4 ) + 8003aac: 2207 movs r2, #7 + 8003aae: 62da str r2, [r3, #44] ; 0x2c hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; - 8003aa8: 4b08 ldr r3, [pc, #32] ; (8003acc ) - 8003aaa: 2200 movs r2, #0 - 8003aac: 631a str r2, [r3, #48] ; 0x30 + 8003ab0: 4b08 ldr r3, [pc, #32] ; (8003ad4 ) + 8003ab2: 2200 movs r2, #0 + 8003ab4: 631a str r2, [r3, #48] ; 0x30 hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; - 8003aae: 4b07 ldr r3, [pc, #28] ; (8003acc ) - 8003ab0: 2208 movs r2, #8 - 8003ab2: 635a str r2, [r3, #52] ; 0x34 + 8003ab6: 4b07 ldr r3, [pc, #28] ; (8003ad4 ) + 8003ab8: 2208 movs r2, #8 + 8003aba: 635a str r2, [r3, #52] ; 0x34 if (HAL_SPI_Init(&hspi2) != HAL_OK) - 8003ab4: 4b05 ldr r3, [pc, #20] ; (8003acc ) - 8003ab6: 0018 movs r0, r3 - 8003ab8: f004 fbf4 bl 80082a4 - 8003abc: 1e03 subs r3, r0, #0 - 8003abe: d001 beq.n 8003ac4 + 8003abc: 4b05 ldr r3, [pc, #20] ; (8003ad4 ) + 8003abe: 0018 movs r0, r3 + 8003ac0: f004 fd34 bl 800852c + 8003ac4: 1e03 subs r3, r0, #0 + 8003ac6: d001 beq.n 8003acc { Error_Handler(); - 8003ac0: f7ff fe5a bl 8003778 + 8003ac8: f7ff fe5a bl 8003780 } /* USER CODE BEGIN SPI2_Init 2 */ /* USER CODE END SPI2_Init 2 */ } - 8003ac4: 46c0 nop ; (mov r8, r8) - 8003ac6: 46bd mov sp, r7 - 8003ac8: bd80 pop {r7, pc} - 8003aca: 46c0 nop ; (mov r8, r8) - 8003acc: 200001ac .word 0x200001ac - 8003ad0: 40003800 .word 0x40003800 + 8003acc: 46c0 nop ; (mov r8, r8) + 8003ace: 46bd mov sp, r7 + 8003ad0: bd80 pop {r7, pc} + 8003ad2: 46c0 nop ; (mov r8, r8) + 8003ad4: 200001ac .word 0x200001ac + 8003ad8: 40003800 .word 0x40003800 -08003ad4 : +08003adc : void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle) { - 8003ad4: b590 push {r4, r7, lr} - 8003ad6: b08b sub sp, #44 ; 0x2c - 8003ad8: af00 add r7, sp, #0 - 8003ada: 6078 str r0, [r7, #4] + 8003adc: b590 push {r4, r7, lr} + 8003ade: b08b sub sp, #44 ; 0x2c + 8003ae0: af00 add r7, sp, #0 + 8003ae2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8003adc: 2414 movs r4, #20 - 8003ade: 193b adds r3, r7, r4 - 8003ae0: 0018 movs r0, r3 - 8003ae2: 2314 movs r3, #20 - 8003ae4: 001a movs r2, r3 - 8003ae6: 2100 movs r1, #0 - 8003ae8: f00a fa71 bl 800dfce + 8003ae4: 2414 movs r4, #20 + 8003ae6: 193b adds r3, r7, r4 + 8003ae8: 0018 movs r0, r3 + 8003aea: 2314 movs r3, #20 + 8003aec: 001a movs r2, r3 + 8003aee: 2100 movs r1, #0 + 8003af0: f00b f88d bl 800ec0e if(spiHandle->Instance==SPI2) - 8003aec: 687b ldr r3, [r7, #4] - 8003aee: 681b ldr r3, [r3, #0] - 8003af0: 4a1b ldr r2, [pc, #108] ; (8003b60 ) - 8003af2: 4293 cmp r3, r2 - 8003af4: d130 bne.n 8003b58 + 8003af4: 687b ldr r3, [r7, #4] + 8003af6: 681b ldr r3, [r3, #0] + 8003af8: 4a1b ldr r2, [pc, #108] ; (8003b68 ) + 8003afa: 4293 cmp r3, r2 + 8003afc: d130 bne.n 8003b60 { /* USER CODE BEGIN SPI2_MspInit 0 */ /* USER CODE END SPI2_MspInit 0 */ /* SPI2 clock enable */ __HAL_RCC_SPI2_CLK_ENABLE(); - 8003af6: 4b1b ldr r3, [pc, #108] ; (8003b64 ) - 8003af8: 6bda ldr r2, [r3, #60] ; 0x3c - 8003afa: 4b1a ldr r3, [pc, #104] ; (8003b64 ) - 8003afc: 2180 movs r1, #128 ; 0x80 - 8003afe: 01c9 lsls r1, r1, #7 - 8003b00: 430a orrs r2, r1 - 8003b02: 63da str r2, [r3, #60] ; 0x3c - 8003b04: 4b17 ldr r3, [pc, #92] ; (8003b64 ) - 8003b06: 6bda ldr r2, [r3, #60] ; 0x3c - 8003b08: 2380 movs r3, #128 ; 0x80 - 8003b0a: 01db lsls r3, r3, #7 - 8003b0c: 4013 ands r3, r2 - 8003b0e: 613b str r3, [r7, #16] - 8003b10: 693b ldr r3, [r7, #16] + 8003afe: 4b1b ldr r3, [pc, #108] ; (8003b6c ) + 8003b00: 6bda ldr r2, [r3, #60] ; 0x3c + 8003b02: 4b1a ldr r3, [pc, #104] ; (8003b6c ) + 8003b04: 2180 movs r1, #128 ; 0x80 + 8003b06: 01c9 lsls r1, r1, #7 + 8003b08: 430a orrs r2, r1 + 8003b0a: 63da str r2, [r3, #60] ; 0x3c + 8003b0c: 4b17 ldr r3, [pc, #92] ; (8003b6c ) + 8003b0e: 6bda ldr r2, [r3, #60] ; 0x3c + 8003b10: 2380 movs r3, #128 ; 0x80 + 8003b12: 01db lsls r3, r3, #7 + 8003b14: 4013 ands r3, r2 + 8003b16: 613b str r3, [r7, #16] + 8003b18: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8003b12: 4b14 ldr r3, [pc, #80] ; (8003b64 ) - 8003b14: 6b5a ldr r2, [r3, #52] ; 0x34 - 8003b16: 4b13 ldr r3, [pc, #76] ; (8003b64 ) - 8003b18: 2102 movs r1, #2 - 8003b1a: 430a orrs r2, r1 - 8003b1c: 635a str r2, [r3, #52] ; 0x34 - 8003b1e: 4b11 ldr r3, [pc, #68] ; (8003b64 ) - 8003b20: 6b5b ldr r3, [r3, #52] ; 0x34 - 8003b22: 2202 movs r2, #2 - 8003b24: 4013 ands r3, r2 - 8003b26: 60fb str r3, [r7, #12] - 8003b28: 68fb ldr r3, [r7, #12] + 8003b1a: 4b14 ldr r3, [pc, #80] ; (8003b6c ) + 8003b1c: 6b5a ldr r2, [r3, #52] ; 0x34 + 8003b1e: 4b13 ldr r3, [pc, #76] ; (8003b6c ) + 8003b20: 2102 movs r1, #2 + 8003b22: 430a orrs r2, r1 + 8003b24: 635a str r2, [r3, #52] ; 0x34 + 8003b26: 4b11 ldr r3, [pc, #68] ; (8003b6c ) + 8003b28: 6b5b ldr r3, [r3, #52] ; 0x34 + 8003b2a: 2202 movs r2, #2 + 8003b2c: 4013 ands r3, r2 + 8003b2e: 60fb str r3, [r7, #12] + 8003b30: 68fb ldr r3, [r7, #12] /**SPI2 GPIO Configuration PB13 ------> SPI2_SCK PB14 ------> SPI2_MISO */ GPIO_InitStruct.Pin = MAX_SCK_Pin|MAX_MISO_Pin; - 8003b2a: 193b adds r3, r7, r4 - 8003b2c: 22c0 movs r2, #192 ; 0xc0 - 8003b2e: 01d2 lsls r2, r2, #7 - 8003b30: 601a str r2, [r3, #0] + 8003b32: 193b adds r3, r7, r4 + 8003b34: 22c0 movs r2, #192 ; 0xc0 + 8003b36: 01d2 lsls r2, r2, #7 + 8003b38: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8003b32: 0021 movs r1, r4 - 8003b34: 187b adds r3, r7, r1 - 8003b36: 2202 movs r2, #2 - 8003b38: 605a str r2, [r3, #4] + 8003b3a: 0021 movs r1, r4 + 8003b3c: 187b adds r3, r7, r1 + 8003b3e: 2202 movs r2, #2 + 8003b40: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8003b3a: 187b adds r3, r7, r1 - 8003b3c: 2200 movs r2, #0 - 8003b3e: 609a str r2, [r3, #8] + 8003b42: 187b adds r3, r7, r1 + 8003b44: 2200 movs r2, #0 + 8003b46: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8003b40: 187b adds r3, r7, r1 - 8003b42: 2200 movs r2, #0 - 8003b44: 60da str r2, [r3, #12] + 8003b48: 187b adds r3, r7, r1 + 8003b4a: 2200 movs r2, #0 + 8003b4c: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF0_SPI2; - 8003b46: 187b adds r3, r7, r1 - 8003b48: 2200 movs r2, #0 - 8003b4a: 611a str r2, [r3, #16] + 8003b4e: 187b adds r3, r7, r1 + 8003b50: 2200 movs r2, #0 + 8003b52: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8003b4c: 187b adds r3, r7, r1 - 8003b4e: 4a06 ldr r2, [pc, #24] ; (8003b68 ) - 8003b50: 0019 movs r1, r3 - 8003b52: 0010 movs r0, r2 - 8003b54: f003 fbc2 bl 80072dc + 8003b54: 187b adds r3, r7, r1 + 8003b56: 4a06 ldr r2, [pc, #24] ; (8003b70 ) + 8003b58: 0019 movs r1, r3 + 8003b5a: 0010 movs r0, r2 + 8003b5c: f003 fd02 bl 8007564 /* USER CODE BEGIN SPI2_MspInit 1 */ /* USER CODE END SPI2_MspInit 1 */ } } - 8003b58: 46c0 nop ; (mov r8, r8) - 8003b5a: 46bd mov sp, r7 - 8003b5c: b00b add sp, #44 ; 0x2c - 8003b5e: bd90 pop {r4, r7, pc} - 8003b60: 40003800 .word 0x40003800 - 8003b64: 40021000 .word 0x40021000 - 8003b68: 50000400 .word 0x50000400 + 8003b60: 46c0 nop ; (mov r8, r8) + 8003b62: 46bd mov sp, r7 + 8003b64: b00b add sp, #44 ; 0x2c + 8003b66: bd90 pop {r4, r7, pc} + 8003b68: 40003800 .word 0x40003800 + 8003b6c: 40021000 .word 0x40021000 + 8003b70: 50000400 .word 0x50000400 -08003b6c : +08003b74 : }; #ifndef __delay_us #define __delay_us void delay_us(volatile unsigned long nTime) { - 8003b6c: b580 push {r7, lr} - 8003b6e: b082 sub sp, #8 - 8003b70: af00 add r7, sp, #0 - 8003b72: 6078 str r0, [r7, #4] + 8003b74: b580 push {r7, lr} + 8003b76: b082 sub sp, #8 + 8003b78: af00 add r7, sp, #0 + 8003b7a: 6078 str r0, [r7, #4] nTime=nTime<<2; - 8003b74: 687b ldr r3, [r7, #4] - 8003b76: 009b lsls r3, r3, #2 - 8003b78: 607b str r3, [r7, #4] - while(nTime != 0) { - 8003b7a: e008 b.n 8003b8e - nTime--; 8003b7c: 687b ldr r3, [r7, #4] - 8003b7e: 3b01 subs r3, #1 + 8003b7e: 009b lsls r3, r3, #2 8003b80: 607b str r3, [r7, #4] - nTime++; - 8003b82: 687b ldr r3, [r7, #4] - 8003b84: 3301 adds r3, #1 - 8003b86: 607b str r3, [r7, #4] - nTime--; - 8003b88: 687b ldr r3, [r7, #4] - 8003b8a: 3b01 subs r3, #1 - 8003b8c: 607b str r3, [r7, #4] while(nTime != 0) { - 8003b8e: 687b ldr r3, [r7, #4] - 8003b90: 2b00 cmp r3, #0 - 8003b92: d1f3 bne.n 8003b7c + 8003b82: e008 b.n 8003b96 + nTime--; + 8003b84: 687b ldr r3, [r7, #4] + 8003b86: 3b01 subs r3, #1 + 8003b88: 607b str r3, [r7, #4] + nTime++; + 8003b8a: 687b ldr r3, [r7, #4] + 8003b8c: 3301 adds r3, #1 + 8003b8e: 607b str r3, [r7, #4] + nTime--; + 8003b90: 687b ldr r3, [r7, #4] + 8003b92: 3b01 subs r3, #1 + 8003b94: 607b str r3, [r7, #4] + while(nTime != 0) { + 8003b96: 687b ldr r3, [r7, #4] + 8003b98: 2b00 cmp r3, #0 + 8003b9a: d1f3 bne.n 8003b84 } } - 8003b94: 46c0 nop ; (mov r8, r8) - 8003b96: 46c0 nop ; (mov r8, r8) - 8003b98: 46bd mov sp, r7 - 8003b9a: b002 add sp, #8 - 8003b9c: bd80 pop {r7, pc} + 8003b9c: 46c0 nop ; (mov r8, r8) + 8003b9e: 46c0 nop ; (mov r8, r8) + 8003ba0: 46bd mov sp, r7 + 8003ba2: b002 add sp, #8 + 8003ba4: bd80 pop {r7, pc} -08003b9e : +08003ba6 : #endif //Set Data bus pins to output void ST7793_SetDWrite(void) { - 8003b9e: b580 push {r7, lr} - 8003ba0: b086 sub sp, #24 - 8003ba2: af00 add r7, sp, #0 + 8003ba6: b580 push {r7, lr} + 8003ba8: b086 sub sp, #24 + 8003baa: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8003ba4: 1d3b adds r3, r7, #4 - 8003ba6: 0018 movs r0, r3 - 8003ba8: 2314 movs r3, #20 - 8003baa: 001a movs r2, r3 - 8003bac: 2100 movs r1, #0 - 8003bae: f00a fa0e bl 800dfce + 8003bac: 1d3b adds r3, r7, #4 + 8003bae: 0018 movs r0, r3 + 8003bb0: 2314 movs r3, #20 + 8003bb2: 001a movs r2, r3 + 8003bb4: 2100 movs r1, #0 + 8003bb6: f00b f82a bl 800ec0e GPIO_InitStruct.Pin = (0xFF< + 8003bd2: 1d3a adds r2, r7, #4 + 8003bd4: 23a0 movs r3, #160 ; 0xa0 + 8003bd6: 05db lsls r3, r3, #23 + 8003bd8: 0011 movs r1, r2 + 8003bda: 0018 movs r0, r3 + 8003bdc: f003 fcc2 bl 8007564 } - 8003bd8: 46c0 nop ; (mov r8, r8) - 8003bda: 46bd mov sp, r7 - 8003bdc: b006 add sp, #24 - 8003bde: bd80 pop {r7, pc} + 8003be0: 46c0 nop ; (mov r8, r8) + 8003be2: 46bd mov sp, r7 + 8003be4: b006 add sp, #24 + 8003be6: bd80 pop {r7, pc} -08003be0 : +08003be8 : //Set Data bus pins to input void ST7793_SetDRead(void) { - 8003be0: b580 push {r7, lr} - 8003be2: b086 sub sp, #24 - 8003be4: af00 add r7, sp, #0 + 8003be8: b580 push {r7, lr} + 8003bea: b086 sub sp, #24 + 8003bec: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8003be6: 1d3b adds r3, r7, #4 - 8003be8: 0018 movs r0, r3 - 8003bea: 2314 movs r3, #20 - 8003bec: 001a movs r2, r3 - 8003bee: 2100 movs r1, #0 - 8003bf0: f00a f9ed bl 800dfce + 8003bee: 1d3b adds r3, r7, #4 + 8003bf0: 0018 movs r0, r3 + 8003bf2: 2314 movs r3, #20 + 8003bf4: 001a movs r2, r3 + 8003bf6: 2100 movs r1, #0 + 8003bf8: f00b f809 bl 800ec0e GPIO_InitStruct.Pin = (0xFF< + 8003c14: 1d3a adds r2, r7, #4 + 8003c16: 23a0 movs r3, #160 ; 0xa0 + 8003c18: 05db lsls r3, r3, #23 + 8003c1a: 0011 movs r1, r2 + 8003c1c: 0018 movs r0, r3 + 8003c1e: f003 fca1 bl 8007564 } - 8003c1a: 46c0 nop ; (mov r8, r8) - 8003c1c: 46bd mov sp, r7 - 8003c1e: b006 add sp, #24 - 8003c20: bd80 pop {r7, pc} + 8003c22: 46c0 nop ; (mov r8, r8) + 8003c24: 46bd mov sp, r7 + 8003c26: b006 add sp, #24 + 8003c28: bd80 pop {r7, pc} ... -08003c24 : +08003c2c : //Set data on the TFT data bus void ST7793_Write8(uint16_t data) { - 8003c24: b580 push {r7, lr} - 8003c26: b082 sub sp, #8 - 8003c28: af00 add r7, sp, #0 - 8003c2a: 0002 movs r2, r0 - 8003c2c: 1dbb adds r3, r7, #6 - 8003c2e: 801a strh r2, [r3, #0] + 8003c2c: b580 push {r7, lr} + 8003c2e: b082 sub sp, #8 + 8003c30: af00 add r7, sp, #0 + 8003c32: 0002 movs r2, r0 + 8003c34: 1dbb adds r3, r7, #6 + 8003c36: 801a strh r2, [r3, #0] ST7793_DPort->ODR &= ~(0x00FF << ST7793_DShift); - 8003c30: 23a0 movs r3, #160 ; 0xa0 - 8003c32: 05db lsls r3, r3, #23 - 8003c34: 695a ldr r2, [r3, #20] - 8003c36: 23a0 movs r3, #160 ; 0xa0 - 8003c38: 05db lsls r3, r3, #23 - 8003c3a: 21ff movs r1, #255 ; 0xff - 8003c3c: 438a bics r2, r1 - 8003c3e: 615a str r2, [r3, #20] + 8003c38: 23a0 movs r3, #160 ; 0xa0 + 8003c3a: 05db lsls r3, r3, #23 + 8003c3c: 695a ldr r2, [r3, #20] + 8003c3e: 23a0 movs r3, #160 ; 0xa0 + 8003c40: 05db lsls r3, r3, #23 + 8003c42: 21ff movs r1, #255 ; 0xff + 8003c44: 438a bics r2, r1 + 8003c46: 615a str r2, [r3, #20] ST7793_DPort->ODR |= ((0x00FF & data) << ST7793_DShift); - 8003c40: 23a0 movs r3, #160 ; 0xa0 - 8003c42: 05db lsls r3, r3, #23 - 8003c44: 6959 ldr r1, [r3, #20] - 8003c46: 1dbb adds r3, r7, #6 - 8003c48: 881b ldrh r3, [r3, #0] - 8003c4a: 22ff movs r2, #255 ; 0xff - 8003c4c: 401a ands r2, r3 - 8003c4e: 23a0 movs r3, #160 ; 0xa0 - 8003c50: 05db lsls r3, r3, #23 - 8003c52: 430a orrs r2, r1 - 8003c54: 615a str r2, [r3, #20] + 8003c48: 23a0 movs r3, #160 ; 0xa0 + 8003c4a: 05db lsls r3, r3, #23 + 8003c4c: 6959 ldr r1, [r3, #20] + 8003c4e: 1dbb adds r3, r7, #6 + 8003c50: 881b ldrh r3, [r3, #0] + 8003c52: 22ff movs r2, #255 ; 0xff + 8003c54: 401a ands r2, r3 + 8003c56: 23a0 movs r3, #160 ; 0xa0 + 8003c58: 05db lsls r3, r3, #23 + 8003c5a: 430a orrs r2, r1 + 8003c5c: 615a str r2, [r3, #20] ST7793_WR_PULSE; //Pulse on the WR pin - 8003c56: 4b08 ldr r3, [pc, #32] ; (8003c78 ) - 8003c58: 2200 movs r2, #0 - 8003c5a: 2102 movs r1, #2 - 8003c5c: 0018 movs r0, r3 - 8003c5e: f003 fca1 bl 80075a4 - 8003c62: 4b05 ldr r3, [pc, #20] ; (8003c78 ) - 8003c64: 2201 movs r2, #1 - 8003c66: 2102 movs r1, #2 - 8003c68: 0018 movs r0, r3 - 8003c6a: f003 fc9b bl 80075a4 + 8003c5e: 4b08 ldr r3, [pc, #32] ; (8003c80 ) + 8003c60: 2200 movs r2, #0 + 8003c62: 2102 movs r1, #2 + 8003c64: 0018 movs r0, r3 + 8003c66: f003 fde1 bl 800782c + 8003c6a: 4b05 ldr r3, [pc, #20] ; (8003c80 ) + 8003c6c: 2201 movs r2, #1 + 8003c6e: 2102 movs r1, #2 + 8003c70: 0018 movs r0, r3 + 8003c72: f003 fddb bl 800782c } - 8003c6e: 46c0 nop ; (mov r8, r8) - 8003c70: 46bd mov sp, r7 - 8003c72: b002 add sp, #8 - 8003c74: bd80 pop {r7, pc} 8003c76: 46c0 nop ; (mov r8, r8) - 8003c78: 50000400 .word 0x50000400 + 8003c78: 46bd mov sp, r7 + 8003c7a: b002 add sp, #8 + 8003c7c: bd80 pop {r7, pc} + 8003c7e: 46c0 nop ; (mov r8, r8) + 8003c80: 50000400 .word 0x50000400 -08003c7c : +08003c84 : //Read data from the TFT data bus uint16_t ST7793_Read16() { - 8003c7c: b580 push {r7, lr} - 8003c7e: b082 sub sp, #8 - 8003c80: af00 add r7, sp, #0 + 8003c84: b580 push {r7, lr} + 8003c86: b082 sub sp, #8 + 8003c88: af00 add r7, sp, #0 uint16_t data; ST7793_RD_ON; //Activate RD pin - 8003c82: 4b1c ldr r3, [pc, #112] ; (8003cf4 ) - 8003c84: 2200 movs r2, #0 - 8003c86: 2110 movs r1, #16 - 8003c88: 0018 movs r0, r3 - 8003c8a: f003 fc8b bl 80075a4 + 8003c8a: 4b1c ldr r3, [pc, #112] ; (8003cfc ) + 8003c8c: 2200 movs r2, #0 + 8003c8e: 2110 movs r1, #16 + 8003c90: 0018 movs r0, r3 + 8003c92: f003 fdcb bl 800782c delay_us(1); //wait a bit - 8003c8e: 2001 movs r0, #1 - 8003c90: f7ff ff6c bl 8003b6c + 8003c96: 2001 movs r0, #1 + 8003c98: f7ff ff6c bl 8003b74 data = ((ST7793_DPort->IDR >> ST7793_DShift) & 0x00FF) << 8; //Get 8 MSB of data - 8003c94: 23a0 movs r3, #160 ; 0xa0 - 8003c96: 05db lsls r3, r3, #23 - 8003c98: 691b ldr r3, [r3, #16] - 8003c9a: b29a uxth r2, r3 - 8003c9c: 1dbb adds r3, r7, #6 - 8003c9e: 0212 lsls r2, r2, #8 - 8003ca0: 801a strh r2, [r3, #0] + 8003c9c: 23a0 movs r3, #160 ; 0xa0 + 8003c9e: 05db lsls r3, r3, #23 + 8003ca0: 691b ldr r3, [r3, #16] + 8003ca2: b29a uxth r2, r3 + 8003ca4: 1dbb adds r3, r7, #6 + 8003ca6: 0212 lsls r2, r2, #8 + 8003ca8: 801a strh r2, [r3, #0] ST7793_RD_OFF; //Deactivate RD pin - 8003ca2: 4b14 ldr r3, [pc, #80] ; (8003cf4 ) - 8003ca4: 2201 movs r2, #1 - 8003ca6: 2110 movs r1, #16 - 8003ca8: 0018 movs r0, r3 - 8003caa: f003 fc7b bl 80075a4 + 8003caa: 4b14 ldr r3, [pc, #80] ; (8003cfc ) + 8003cac: 2201 movs r2, #1 + 8003cae: 2110 movs r1, #16 + 8003cb0: 0018 movs r0, r3 + 8003cb2: f003 fdbb bl 800782c delay_us(1); //wait a bit - 8003cae: 2001 movs r0, #1 - 8003cb0: f7ff ff5c bl 8003b6c + 8003cb6: 2001 movs r0, #1 + 8003cb8: f7ff ff5c bl 8003b74 ST7793_RD_ON; //Activate RD pin - 8003cb4: 4b0f ldr r3, [pc, #60] ; (8003cf4 ) - 8003cb6: 2200 movs r2, #0 - 8003cb8: 2110 movs r1, #16 - 8003cba: 0018 movs r0, r3 - 8003cbc: f003 fc72 bl 80075a4 + 8003cbc: 4b0f ldr r3, [pc, #60] ; (8003cfc ) + 8003cbe: 2200 movs r2, #0 + 8003cc0: 2110 movs r1, #16 + 8003cc2: 0018 movs r0, r3 + 8003cc4: f003 fdb2 bl 800782c delay_us(1); //wait a bit - 8003cc0: 2001 movs r0, #1 - 8003cc2: f7ff ff53 bl 8003b6c + 8003cc8: 2001 movs r0, #1 + 8003cca: f7ff ff53 bl 8003b74 data |= (ST7793_DPort->IDR >> ST7793_DShift) & 0x00FF; //Get 8 LSB of data - 8003cc6: 23a0 movs r3, #160 ; 0xa0 - 8003cc8: 05db lsls r3, r3, #23 - 8003cca: 691b ldr r3, [r3, #16] - 8003ccc: 22ff movs r2, #255 ; 0xff - 8003cce: 4013 ands r3, r2 - 8003cd0: b299 uxth r1, r3 - 8003cd2: 1dbb adds r3, r7, #6 - 8003cd4: 1dba adds r2, r7, #6 - 8003cd6: 8812 ldrh r2, [r2, #0] - 8003cd8: 430a orrs r2, r1 - 8003cda: 801a strh r2, [r3, #0] + 8003cce: 23a0 movs r3, #160 ; 0xa0 + 8003cd0: 05db lsls r3, r3, #23 + 8003cd2: 691b ldr r3, [r3, #16] + 8003cd4: 22ff movs r2, #255 ; 0xff + 8003cd6: 4013 ands r3, r2 + 8003cd8: b299 uxth r1, r3 + 8003cda: 1dbb adds r3, r7, #6 + 8003cdc: 1dba adds r2, r7, #6 + 8003cde: 8812 ldrh r2, [r2, #0] + 8003ce0: 430a orrs r2, r1 + 8003ce2: 801a strh r2, [r3, #0] ST7793_RD_OFF; //Deactivate RD pin - 8003cdc: 4b05 ldr r3, [pc, #20] ; (8003cf4 ) - 8003cde: 2201 movs r2, #1 - 8003ce0: 2110 movs r1, #16 - 8003ce2: 0018 movs r0, r3 - 8003ce4: f003 fc5e bl 80075a4 + 8003ce4: 4b05 ldr r3, [pc, #20] ; (8003cfc ) + 8003ce6: 2201 movs r2, #1 + 8003ce8: 2110 movs r1, #16 + 8003cea: 0018 movs r0, r3 + 8003cec: f003 fd9e bl 800782c return data; - 8003ce8: 1dbb adds r3, r7, #6 - 8003cea: 881b ldrh r3, [r3, #0] + 8003cf0: 1dbb adds r3, r7, #6 + 8003cf2: 881b ldrh r3, [r3, #0] } - 8003cec: 0018 movs r0, r3 - 8003cee: 46bd mov sp, r7 - 8003cf0: b002 add sp, #8 - 8003cf2: bd80 pop {r7, pc} - 8003cf4: 50000800 .word 0x50000800 + 8003cf4: 0018 movs r0, r3 + 8003cf6: 46bd mov sp, r7 + 8003cf8: b002 add sp, #8 + 8003cfa: bd80 pop {r7, pc} + 8003cfc: 50000800 .word 0x50000800 -08003cf8 : +08003d00 : //Send data void ST7793_SendData(uint16_t data) { - 8003cf8: b580 push {r7, lr} - 8003cfa: b082 sub sp, #8 - 8003cfc: af00 add r7, sp, #0 - 8003cfe: 0002 movs r2, r0 - 8003d00: 1dbb adds r3, r7, #6 - 8003d02: 801a strh r2, [r3, #0] + 8003d00: b580 push {r7, lr} + 8003d02: b082 sub sp, #8 + 8003d04: af00 add r7, sp, #0 + 8003d06: 0002 movs r2, r0 + 8003d08: 1dbb adds r3, r7, #6 + 8003d0a: 801a strh r2, [r3, #0] ST7793_DATA; //RS pin to data mode - 8003d04: 4b0a ldr r3, [pc, #40] ; (8003d30 ) - 8003d06: 2201 movs r2, #1 - 8003d08: 2101 movs r1, #1 - 8003d0a: 0018 movs r0, r3 - 8003d0c: f003 fc4a bl 80075a4 + 8003d0c: 4b0a ldr r3, [pc, #40] ; (8003d38 ) + 8003d0e: 2201 movs r2, #1 + 8003d10: 2101 movs r1, #1 + 8003d12: 0018 movs r0, r3 + 8003d14: f003 fd8a bl 800782c ST7793_Write8(data >> 8); //Send data 8MSB - 8003d10: 1dbb adds r3, r7, #6 - 8003d12: 881b ldrh r3, [r3, #0] - 8003d14: 0a1b lsrs r3, r3, #8 - 8003d16: b29b uxth r3, r3 - 8003d18: 0018 movs r0, r3 - 8003d1a: f7ff ff83 bl 8003c24 + 8003d18: 1dbb adds r3, r7, #6 + 8003d1a: 881b ldrh r3, [r3, #0] + 8003d1c: 0a1b lsrs r3, r3, #8 + 8003d1e: b29b uxth r3, r3 + 8003d20: 0018 movs r0, r3 + 8003d22: f7ff ff83 bl 8003c2c ST7793_Write8(data); //Send data 8LSB - 8003d1e: 1dbb adds r3, r7, #6 - 8003d20: 881b ldrh r3, [r3, #0] - 8003d22: 0018 movs r0, r3 - 8003d24: f7ff ff7e bl 8003c24 + 8003d26: 1dbb adds r3, r7, #6 + 8003d28: 881b ldrh r3, [r3, #0] + 8003d2a: 0018 movs r0, r3 + 8003d2c: f7ff ff7e bl 8003c2c } - 8003d28: 46c0 nop ; (mov r8, r8) - 8003d2a: 46bd mov sp, r7 - 8003d2c: b002 add sp, #8 - 8003d2e: bd80 pop {r7, pc} - 8003d30: 50000400 .word 0x50000400 + 8003d30: 46c0 nop ; (mov r8, r8) + 8003d32: 46bd mov sp, r7 + 8003d34: b002 add sp, #8 + 8003d36: bd80 pop {r7, pc} + 8003d38: 50000400 .word 0x50000400 -08003d34 : +08003d3c : //Send a command. Register index and data to fill it with void ST7793_SendCommand(uint16_t index, uint16_t data) { - 8003d34: b580 push {r7, lr} - 8003d36: b082 sub sp, #8 - 8003d38: af00 add r7, sp, #0 - 8003d3a: 0002 movs r2, r0 - 8003d3c: 1dbb adds r3, r7, #6 - 8003d3e: 801a strh r2, [r3, #0] - 8003d40: 1d3b adds r3, r7, #4 - 8003d42: 1c0a adds r2, r1, #0 - 8003d44: 801a strh r2, [r3, #0] + 8003d3c: b580 push {r7, lr} + 8003d3e: b082 sub sp, #8 + 8003d40: af00 add r7, sp, #0 + 8003d42: 0002 movs r2, r0 + 8003d44: 1dbb adds r3, r7, #6 + 8003d46: 801a strh r2, [r3, #0] + 8003d48: 1d3b adds r3, r7, #4 + 8003d4a: 1c0a adds r2, r1, #0 + 8003d4c: 801a strh r2, [r3, #0] ST7793_COMMAND; //RS pin to command mode - 8003d46: 4b0d ldr r3, [pc, #52] ; (8003d7c ) - 8003d48: 2200 movs r2, #0 - 8003d4a: 2101 movs r1, #1 - 8003d4c: 0018 movs r0, r3 - 8003d4e: f003 fc29 bl 80075a4 + 8003d4e: 4b0d ldr r3, [pc, #52] ; (8003d84 ) + 8003d50: 2200 movs r2, #0 + 8003d52: 2101 movs r1, #1 + 8003d54: 0018 movs r0, r3 + 8003d56: f003 fd69 bl 800782c ST7793_Write8(index >> 8); //Send command code 8MSB - 8003d52: 1dbb adds r3, r7, #6 - 8003d54: 881b ldrh r3, [r3, #0] - 8003d56: 0a1b lsrs r3, r3, #8 - 8003d58: b29b uxth r3, r3 - 8003d5a: 0018 movs r0, r3 - 8003d5c: f7ff ff62 bl 8003c24 + 8003d5a: 1dbb adds r3, r7, #6 + 8003d5c: 881b ldrh r3, [r3, #0] + 8003d5e: 0a1b lsrs r3, r3, #8 + 8003d60: b29b uxth r3, r3 + 8003d62: 0018 movs r0, r3 + 8003d64: f7ff ff62 bl 8003c2c ST7793_Write8(index); //Send command code 8LSB - 8003d60: 1dbb adds r3, r7, #6 - 8003d62: 881b ldrh r3, [r3, #0] - 8003d64: 0018 movs r0, r3 - 8003d66: f7ff ff5d bl 8003c24 + 8003d68: 1dbb adds r3, r7, #6 + 8003d6a: 881b ldrh r3, [r3, #0] + 8003d6c: 0018 movs r0, r3 + 8003d6e: f7ff ff5d bl 8003c2c ST7793_SendData(data); - 8003d6a: 1d3b adds r3, r7, #4 - 8003d6c: 881b ldrh r3, [r3, #0] - 8003d6e: 0018 movs r0, r3 - 8003d70: f7ff ffc2 bl 8003cf8 + 8003d72: 1d3b adds r3, r7, #4 + 8003d74: 881b ldrh r3, [r3, #0] + 8003d76: 0018 movs r0, r3 + 8003d78: f7ff ffc2 bl 8003d00 } - 8003d74: 46c0 nop ; (mov r8, r8) - 8003d76: 46bd mov sp, r7 - 8003d78: b002 add sp, #8 - 8003d7a: bd80 pop {r7, pc} - 8003d7c: 50000400 .word 0x50000400 + 8003d7c: 46c0 nop ; (mov r8, r8) + 8003d7e: 46bd mov sp, r7 + 8003d80: b002 add sp, #8 + 8003d82: bd80 pop {r7, pc} + 8003d84: 50000400 .word 0x50000400 -08003d80 : +08003d88 : //Read data from a register uint16_t ST7793_ReadReg(uint16_t index) { - 8003d80: b5b0 push {r4, r5, r7, lr} - 8003d82: b084 sub sp, #16 - 8003d84: af00 add r7, sp, #0 - 8003d86: 0002 movs r2, r0 - 8003d88: 1dbb adds r3, r7, #6 - 8003d8a: 801a strh r2, [r3, #0] + 8003d88: b5b0 push {r4, r5, r7, lr} + 8003d8a: b084 sub sp, #16 + 8003d8c: af00 add r7, sp, #0 + 8003d8e: 0002 movs r2, r0 + 8003d90: 1dbb adds r3, r7, #6 + 8003d92: 801a strh r2, [r3, #0] uint16_t data; ST7793_COMMAND; //RS pin to command mode - 8003d8c: 4b15 ldr r3, [pc, #84] ; (8003de4 ) - 8003d8e: 2200 movs r2, #0 - 8003d90: 2101 movs r1, #1 - 8003d92: 0018 movs r0, r3 - 8003d94: f003 fc06 bl 80075a4 + 8003d94: 4b15 ldr r3, [pc, #84] ; (8003dec ) + 8003d96: 2200 movs r2, #0 + 8003d98: 2101 movs r1, #1 + 8003d9a: 0018 movs r0, r3 + 8003d9c: f003 fd46 bl 800782c ST7793_Write8(index >> 8); //Send command code 8MSB - 8003d98: 1dbb adds r3, r7, #6 - 8003d9a: 881b ldrh r3, [r3, #0] - 8003d9c: 0a1b lsrs r3, r3, #8 - 8003d9e: b29b uxth r3, r3 - 8003da0: 0018 movs r0, r3 - 8003da2: f7ff ff3f bl 8003c24 + 8003da0: 1dbb adds r3, r7, #6 + 8003da2: 881b ldrh r3, [r3, #0] + 8003da4: 0a1b lsrs r3, r3, #8 + 8003da6: b29b uxth r3, r3 + 8003da8: 0018 movs r0, r3 + 8003daa: f7ff ff3f bl 8003c2c ST7793_Write8(index); //Send command code 8LSB - 8003da6: 1dbb adds r3, r7, #6 - 8003da8: 881b ldrh r3, [r3, #0] - 8003daa: 0018 movs r0, r3 - 8003dac: f7ff ff3a bl 8003c24 + 8003dae: 1dbb adds r3, r7, #6 + 8003db0: 881b ldrh r3, [r3, #0] + 8003db2: 0018 movs r0, r3 + 8003db4: f7ff ff3a bl 8003c2c delay_us(2); //wait a bit - 8003db0: 2002 movs r0, #2 - 8003db2: f7ff fedb bl 8003b6c + 8003db8: 2002 movs r0, #2 + 8003dba: f7ff fedb bl 8003b74 ST7793_DATA; //RS pin to data mode - 8003db6: 4b0b ldr r3, [pc, #44] ; (8003de4 ) - 8003db8: 2201 movs r2, #1 - 8003dba: 2101 movs r1, #1 - 8003dbc: 0018 movs r0, r3 - 8003dbe: f003 fbf1 bl 80075a4 + 8003dbe: 4b0b ldr r3, [pc, #44] ; (8003dec ) + 8003dc0: 2201 movs r2, #1 + 8003dc2: 2101 movs r1, #1 + 8003dc4: 0018 movs r0, r3 + 8003dc6: f003 fd31 bl 800782c ST7793_SetDRead(); //Set data bus mode to input - 8003dc2: f7ff ff0d bl 8003be0 + 8003dca: f7ff ff0d bl 8003be8 data = ST7793_Read16(); //Read data from the data bus - 8003dc6: 250e movs r5, #14 - 8003dc8: 197c adds r4, r7, r5 - 8003dca: f7ff ff57 bl 8003c7c - 8003dce: 0003 movs r3, r0 - 8003dd0: 8023 strh r3, [r4, #0] + 8003dce: 250e movs r5, #14 + 8003dd0: 197c adds r4, r7, r5 + 8003dd2: f7ff ff57 bl 8003c84 + 8003dd6: 0003 movs r3, r0 + 8003dd8: 8023 strh r3, [r4, #0] ST7793_SetDWrite(); //Set data bus mode to output - 8003dd2: f7ff fee4 bl 8003b9e + 8003dda: f7ff fee4 bl 8003ba6 return data; - 8003dd6: 197b adds r3, r7, r5 - 8003dd8: 881b ldrh r3, [r3, #0] + 8003dde: 197b adds r3, r7, r5 + 8003de0: 881b ldrh r3, [r3, #0] } - 8003dda: 0018 movs r0, r3 - 8003ddc: 46bd mov sp, r7 - 8003dde: b004 add sp, #16 - 8003de0: bdb0 pop {r4, r5, r7, pc} - 8003de2: 46c0 nop ; (mov r8, r8) - 8003de4: 50000400 .word 0x50000400 + 8003de2: 0018 movs r0, r3 + 8003de4: 46bd mov sp, r7 + 8003de6: b004 add sp, #16 + 8003de8: bdb0 pop {r4, r5, r7, pc} + 8003dea: 46c0 nop ; (mov r8, r8) + 8003dec: 50000400 .word 0x50000400 -08003de8 : +08003df0 : //Display reset void ST7793_Reset(void) { - 8003de8: b580 push {r7, lr} - 8003dea: af00 add r7, sp, #0 + 8003df0: b580 push {r7, lr} + 8003df2: af00 add r7, sp, #0 ST7793_CS_OFF; //Deactivate CS pin - 8003dec: 4b11 ldr r3, [pc, #68] ; (8003e34 ) - 8003dee: 2201 movs r2, #1 - 8003df0: 2110 movs r1, #16 - 8003df2: 0018 movs r0, r3 - 8003df4: f003 fbd6 bl 80075a4 + 8003df4: 4b11 ldr r3, [pc, #68] ; (8003e3c ) + 8003df6: 2201 movs r2, #1 + 8003df8: 2110 movs r1, #16 + 8003dfa: 0018 movs r0, r3 + 8003dfc: f003 fd16 bl 800782c ST7793_WR_OFF; //Deactivate WR pin - 8003df8: 4b0f ldr r3, [pc, #60] ; (8003e38 ) - 8003dfa: 2201 movs r2, #1 - 8003dfc: 2102 movs r1, #2 - 8003dfe: 0018 movs r0, r3 - 8003e00: f003 fbd0 bl 80075a4 + 8003e00: 4b0f ldr r3, [pc, #60] ; (8003e40 ) + 8003e02: 2201 movs r2, #1 + 8003e04: 2102 movs r1, #2 + 8003e06: 0018 movs r0, r3 + 8003e08: f003 fd10 bl 800782c ST7793_RD_OFF; //Deactivate RD pin - 8003e04: 4b0d ldr r3, [pc, #52] ; (8003e3c ) - 8003e06: 2201 movs r2, #1 - 8003e08: 2110 movs r1, #16 - 8003e0a: 0018 movs r0, r3 - 8003e0c: f003 fbca bl 80075a4 + 8003e0c: 4b0d ldr r3, [pc, #52] ; (8003e44 ) + 8003e0e: 2201 movs r2, #1 + 8003e10: 2110 movs r1, #16 + 8003e12: 0018 movs r0, r3 + 8003e14: f003 fd0a bl 800782c ST7793_RST_ON; //Activate RST pin - 8003e10: 4b0a ldr r3, [pc, #40] ; (8003e3c ) - 8003e12: 2200 movs r2, #0 - 8003e14: 2120 movs r1, #32 - 8003e16: 0018 movs r0, r3 - 8003e18: f003 fbc4 bl 80075a4 + 8003e18: 4b0a ldr r3, [pc, #40] ; (8003e44 ) + 8003e1a: 2200 movs r2, #0 + 8003e1c: 2120 movs r1, #32 + 8003e1e: 0018 movs r0, r3 + 8003e20: f003 fd04 bl 800782c HAL_Delay(2); //2ms delay for reset - 8003e1c: 2002 movs r0, #2 - 8003e1e: f002 f8e5 bl 8005fec + 8003e24: 2002 movs r0, #2 + 8003e26: f002 fa25 bl 8006274 ST7793_RST_OFF; //Deactivate RST pin - 8003e22: 4b06 ldr r3, [pc, #24] ; (8003e3c ) - 8003e24: 2201 movs r2, #1 - 8003e26: 2120 movs r1, #32 - 8003e28: 0018 movs r0, r3 - 8003e2a: f003 fbbb bl 80075a4 + 8003e2a: 4b06 ldr r3, [pc, #24] ; (8003e44 ) + 8003e2c: 2201 movs r2, #1 + 8003e2e: 2120 movs r1, #32 + 8003e30: 0018 movs r0, r3 + 8003e32: f003 fcfb bl 800782c } - 8003e2e: 46c0 nop ; (mov r8, r8) - 8003e30: 46bd mov sp, r7 - 8003e32: bd80 pop {r7, pc} - 8003e34: 50000c00 .word 0x50000c00 - 8003e38: 50000400 .word 0x50000400 - 8003e3c: 50000800 .word 0x50000800 + 8003e36: 46c0 nop ; (mov r8, r8) + 8003e38: 46bd mov sp, r7 + 8003e3a: bd80 pop {r7, pc} + 8003e3c: 50000c00 .word 0x50000c00 + 8003e40: 50000400 .word 0x50000400 + 8003e44: 50000800 .word 0x50000800 -08003e40 : +08003e48 : //Display initialization uint8_t ST7793_Init(void) { - 8003e40: b580 push {r7, lr} - 8003e42: af00 add r7, sp, #0 + 8003e48: b580 push {r7, lr} + 8003e4a: af00 add r7, sp, #0 ST7793_CS_ON; //Activate CS pin - 8003e44: 4b57 ldr r3, [pc, #348] ; (8003fa4 ) - 8003e46: 2200 movs r2, #0 - 8003e48: 2110 movs r1, #16 - 8003e4a: 0018 movs r0, r3 - 8003e4c: f003 fbaa bl 80075a4 + 8003e4c: 4b57 ldr r3, [pc, #348] ; (8003fac ) + 8003e4e: 2200 movs r2, #0 + 8003e50: 2110 movs r1, #16 + 8003e52: 0018 movs r0, r3 + 8003e54: f003 fcea bl 800782c ST7793_SetDWrite(); //Set data bus mode to output - 8003e50: f7ff fea5 bl 8003b9e + 8003e58: f7ff fea5 bl 8003ba6 ST7793_Reset(); //Reset the device - 8003e54: f7ff ffc8 bl 8003de8 + 8003e5c: f7ff ffc8 bl 8003df0 HAL_Delay(3); //3ms delay - 8003e58: 2003 movs r0, #3 - 8003e5a: f002 f8c7 bl 8005fec + 8003e60: 2003 movs r0, #3 + 8003e62: f002 fa07 bl 8006274 ST7793_CS_ON; - 8003e5e: 4b51 ldr r3, [pc, #324] ; (8003fa4 ) - 8003e60: 2200 movs r2, #0 - 8003e62: 2110 movs r1, #16 - 8003e64: 0018 movs r0, r3 - 8003e66: f003 fb9d bl 80075a4 + 8003e66: 4b51 ldr r3, [pc, #324] ; (8003fac ) + 8003e68: 2200 movs r2, #0 + 8003e6a: 2110 movs r1, #16 + 8003e6c: 0018 movs r0, r3 + 8003e6e: f003 fcdd bl 800782c if (ST7793_ReadReg(0x0000) != 0x7793) return 0x10; //Driver code register should be 0x7793 - 8003e6a: 2000 movs r0, #0 - 8003e6c: f7ff ff88 bl 8003d80 - 8003e70: 0003 movs r3, r0 - 8003e72: 001a movs r2, r3 - 8003e74: 4b4c ldr r3, [pc, #304] ; (8003fa8 ) - 8003e76: 429a cmp r2, r3 - 8003e78: d001 beq.n 8003e7e - 8003e7a: 2310 movs r3, #16 - 8003e7c: e08f b.n 8003f9e + 8003e72: 2000 movs r0, #0 + 8003e74: f7ff ff88 bl 8003d88 + 8003e78: 0003 movs r3, r0 + 8003e7a: 001a movs r2, r3 + 8003e7c: 4b4c ldr r3, [pc, #304] ; (8003fb0 ) + 8003e7e: 429a cmp r2, r3 + 8003e80: d001 beq.n 8003e86 + 8003e82: 2310 movs r3, #16 + 8003e84: e08f b.n 8003fa6 ST7793_SendCommand(0x0001, 0x0100); //Device Output Control 0x0000 for default - 8003e7e: 2380 movs r3, #128 ; 0x80 - 8003e80: 005b lsls r3, r3, #1 - 8003e82: 0019 movs r1, r3 - 8003e84: 2001 movs r0, #1 - 8003e86: f7ff ff55 bl 8003d34 + 8003e86: 2380 movs r3, #128 ; 0x80 + 8003e88: 005b lsls r3, r3, #1 + 8003e8a: 0019 movs r1, r3 + 8003e8c: 2001 movs r0, #1 + 8003e8e: f7ff ff55 bl 8003d3c //ST7793_SendCommand(0x0003, 0x1000); //ST7793_SendCommand(0x0003, 0x1010); //ST7793_SendCommand(0x0003, 0x1020); //ST7793_SendCommand(0x0003, 0x1030); //ST7793_SendCommand(0x0003, 0x1038); ST7793_SendCommand(0x0003, 0x1038); - 8003e8a: 4b48 ldr r3, [pc, #288] ; (8003fac ) - 8003e8c: 0019 movs r1, r3 - 8003e8e: 2003 movs r0, #3 - 8003e90: f7ff ff50 bl 8003d34 + 8003e92: 4b48 ldr r3, [pc, #288] ; (8003fb4 ) + 8003e94: 0019 movs r1, r3 + 8003e96: 2003 movs r0, #3 + 8003e98: f7ff ff50 bl 8003d3c ST7793_SendCommand(0x0090, 0x8000); //Frame Marker Control 4. default is 0x0000 - 8003e94: 2380 movs r3, #128 ; 0x80 - 8003e96: 021b lsls r3, r3, #8 - 8003e98: 0019 movs r1, r3 - 8003e9a: 2090 movs r0, #144 ; 0x90 - 8003e9c: f7ff ff4a bl 8003d34 + 8003e9c: 2380 movs r3, #128 ; 0x80 + 8003e9e: 021b lsls r3, r3, #8 + 8003ea0: 0019 movs r1, r3 + 8003ea2: 2090 movs r0, #144 ; 0x90 + 8003ea4: f7ff ff4a bl 8003d3c ST7793_SendCommand(0x0400, 0xE200); //Base Image Display Control. Flip X. Datasheet page 114. - 8003ea0: 23e2 movs r3, #226 ; 0xe2 - 8003ea2: 021a lsls r2, r3, #8 - 8003ea4: 2380 movs r3, #128 ; 0x80 - 8003ea6: 00db lsls r3, r3, #3 - 8003ea8: 0011 movs r1, r2 - 8003eaa: 0018 movs r0, r3 - 8003eac: f7ff ff42 bl 8003d34 + 8003ea8: 23e2 movs r3, #226 ; 0xe2 + 8003eaa: 021a lsls r2, r3, #8 + 8003eac: 2380 movs r3, #128 ; 0x80 + 8003eae: 00db lsls r3, r3, #3 + 8003eb0: 0011 movs r1, r2 + 8003eb2: 0018 movs r0, r3 + 8003eb4: f7ff ff42 bl 8003d3c //Power control ST7793_SendCommand(0x00FF, 0x0001); //Ext Command Control. Enable extended registers - 8003eb0: 2101 movs r1, #1 - 8003eb2: 20ff movs r0, #255 ; 0xff - 8003eb4: f7ff ff3e bl 8003d34 + 8003eb8: 2101 movs r1, #1 + 8003eba: 20ff movs r0, #255 ; 0xff + 8003ebc: f7ff ff3e bl 8003d3c ST7793_SendCommand(0x0102, 0x01B0); //Power Control 3. Turn on power supply - 8003eb8: 23d8 movs r3, #216 ; 0xd8 - 8003eba: 005a lsls r2, r3, #1 - 8003ebc: 2381 movs r3, #129 ; 0x81 - 8003ebe: 005b lsls r3, r3, #1 - 8003ec0: 0011 movs r1, r2 - 8003ec2: 0018 movs r0, r3 - 8003ec4: f7ff ff36 bl 8003d34 + 8003ec0: 23d8 movs r3, #216 ; 0xd8 + 8003ec2: 005a lsls r2, r3, #1 + 8003ec4: 2381 movs r3, #129 ; 0x81 + 8003ec6: 005b lsls r3, r3, #1 + 8003ec8: 0011 movs r1, r2 + 8003eca: 0018 movs r0, r3 + 8003ecc: f7ff ff36 bl 8003d3c ST7793_SendCommand(0x0710, 0x0014); //Source Control 1. 4.250 V - 8003ec8: 23e2 movs r3, #226 ; 0xe2 - 8003eca: 00db lsls r3, r3, #3 - 8003ecc: 2114 movs r1, #20 - 8003ece: 0018 movs r0, r3 - 8003ed0: f7ff ff30 bl 8003d34 + 8003ed0: 23e2 movs r3, #226 ; 0xe2 + 8003ed2: 00db lsls r3, r3, #3 + 8003ed4: 2114 movs r1, #20 + 8003ed6: 0018 movs r0, r3 + 8003ed8: f7ff ff30 bl 8003d3c ST7793_SendCommand(0x0712, 0x000F); //Source Control 2. 0 mV - 8003ed4: 4b36 ldr r3, [pc, #216] ; (8003fb0 ) - 8003ed6: 210f movs r1, #15 - 8003ed8: 0018 movs r0, r3 - 8003eda: f7ff ff2b bl 8003d34 + 8003edc: 4b36 ldr r3, [pc, #216] ; (8003fb8 ) + 8003ede: 210f movs r1, #15 + 8003ee0: 0018 movs r0, r3 + 8003ee2: f7ff ff2b bl 8003d3c ST7793_SendCommand(0x0752, 0x001F); //Source Driving Control. Medium - 8003ede: 4b35 ldr r3, [pc, #212] ; (8003fb4 ) - 8003ee0: 211f movs r1, #31 - 8003ee2: 0018 movs r0, r3 - 8003ee4: f7ff ff26 bl 8003d34 - delay_us(200000); - 8003ee8: 4b33 ldr r3, [pc, #204] ; (8003fb8 ) + 8003ee6: 4b35 ldr r3, [pc, #212] ; (8003fbc ) + 8003ee8: 211f movs r1, #31 8003eea: 0018 movs r0, r3 - 8003eec: f7ff fe3e bl 8003b6c + 8003eec: f7ff ff26 bl 8003d3c + delay_us(200000); + 8003ef0: 4b33 ldr r3, [pc, #204] ; (8003fc0 ) + 8003ef2: 0018 movs r0, r3 + 8003ef4: f7ff fe3e bl 8003b74 //Gamma correction ST7793_SendCommand(0x0380, 0x0303); - 8003ef0: 4a32 ldr r2, [pc, #200] ; (8003fbc ) - 8003ef2: 23e0 movs r3, #224 ; 0xe0 - 8003ef4: 009b lsls r3, r3, #2 - 8003ef6: 0011 movs r1, r2 - 8003ef8: 0018 movs r0, r3 - 8003efa: f7ff ff1b bl 8003d34 + 8003ef8: 4a32 ldr r2, [pc, #200] ; (8003fc4 ) + 8003efa: 23e0 movs r3, #224 ; 0xe0 + 8003efc: 009b lsls r3, r3, #2 + 8003efe: 0011 movs r1, r2 + 8003f00: 0018 movs r0, r3 + 8003f02: f7ff ff1b bl 8003d3c ST7793_SendCommand(0x0381, 0x481F); - 8003efe: 4a30 ldr r2, [pc, #192] ; (8003fc0 ) - 8003f00: 4b30 ldr r3, [pc, #192] ; (8003fc4 ) - 8003f02: 0011 movs r1, r2 - 8003f04: 0018 movs r0, r3 - 8003f06: f7ff ff15 bl 8003d34 + 8003f06: 4a30 ldr r2, [pc, #192] ; (8003fc8 ) + 8003f08: 4b30 ldr r3, [pc, #192] ; (8003fcc ) + 8003f0a: 0011 movs r1, r2 + 8003f0c: 0018 movs r0, r3 + 8003f0e: f7ff ff15 bl 8003d3c ST7793_SendCommand(0x0382, 0x0803); - 8003f0a: 4a2f ldr r2, [pc, #188] ; (8003fc8 ) - 8003f0c: 4b2f ldr r3, [pc, #188] ; (8003fcc ) - 8003f0e: 0011 movs r1, r2 - 8003f10: 0018 movs r0, r3 - 8003f12: f7ff ff0f bl 8003d34 + 8003f12: 4a2f ldr r2, [pc, #188] ; (8003fd0 ) + 8003f14: 4b2f ldr r3, [pc, #188] ; (8003fd4 ) + 8003f16: 0011 movs r1, r2 + 8003f18: 0018 movs r0, r3 + 8003f1a: f7ff ff0f bl 8003d3c ST7793_SendCommand(0x0383, 0x030F); - 8003f16: 4a2e ldr r2, [pc, #184] ; (8003fd0 ) - 8003f18: 4b2e ldr r3, [pc, #184] ; (8003fd4 ) - 8003f1a: 0011 movs r1, r2 - 8003f1c: 0018 movs r0, r3 - 8003f1e: f7ff ff09 bl 8003d34 + 8003f1e: 4a2e ldr r2, [pc, #184] ; (8003fd8 ) + 8003f20: 4b2e ldr r3, [pc, #184] ; (8003fdc ) + 8003f22: 0011 movs r1, r2 + 8003f24: 0018 movs r0, r3 + 8003f26: f7ff ff09 bl 8003d3c ST7793_SendCommand(0x0384, 0x2230); - 8003f22: 4a2d ldr r2, [pc, #180] ; (8003fd8 ) - 8003f24: 23e1 movs r3, #225 ; 0xe1 - 8003f26: 009b lsls r3, r3, #2 - 8003f28: 0011 movs r1, r2 - 8003f2a: 0018 movs r0, r3 - 8003f2c: f7ff ff02 bl 8003d34 + 8003f2a: 4a2d ldr r2, [pc, #180] ; (8003fe0 ) + 8003f2c: 23e1 movs r3, #225 ; 0xe1 + 8003f2e: 009b lsls r3, r3, #2 + 8003f30: 0011 movs r1, r2 + 8003f32: 0018 movs r0, r3 + 8003f34: f7ff ff02 bl 8003d3c ST7793_SendCommand(0x0385, 0x0300); - 8003f30: 23c0 movs r3, #192 ; 0xc0 - 8003f32: 009b lsls r3, r3, #2 - 8003f34: 4a29 ldr r2, [pc, #164] ; (8003fdc ) - 8003f36: 0019 movs r1, r3 - 8003f38: 0010 movs r0, r2 - 8003f3a: f7ff fefb bl 8003d34 + 8003f38: 23c0 movs r3, #192 ; 0xc0 + 8003f3a: 009b lsls r3, r3, #2 + 8003f3c: 4a29 ldr r2, [pc, #164] ; (8003fe4 ) + 8003f3e: 0019 movs r1, r3 + 8003f40: 0010 movs r0, r2 + 8003f42: f7ff fefb bl 8003d3c ST7793_SendCommand(0x0386, 0x491E); - 8003f3e: 4a28 ldr r2, [pc, #160] ; (8003fe0 ) - 8003f40: 4b28 ldr r3, [pc, #160] ; (8003fe4 ) - 8003f42: 0011 movs r1, r2 - 8003f44: 0018 movs r0, r3 - 8003f46: f7ff fef5 bl 8003d34 + 8003f46: 4a28 ldr r2, [pc, #160] ; (8003fe8 ) + 8003f48: 4b28 ldr r3, [pc, #160] ; (8003fec ) + 8003f4a: 0011 movs r1, r2 + 8003f4c: 0018 movs r0, r3 + 8003f4e: f7ff fef5 bl 8003d3c ST7793_SendCommand(0x0387, 0x0703); - 8003f4a: 4a27 ldr r2, [pc, #156] ; (8003fe8 ) - 8003f4c: 4b27 ldr r3, [pc, #156] ; (8003fec ) - 8003f4e: 0011 movs r1, r2 - 8003f50: 0018 movs r0, r3 - 8003f52: f7ff feef bl 8003d34 + 8003f52: 4a27 ldr r2, [pc, #156] ; (8003ff0 ) + 8003f54: 4b27 ldr r3, [pc, #156] ; (8003ff4 ) + 8003f56: 0011 movs r1, r2 + 8003f58: 0018 movs r0, r3 + 8003f5a: f7ff feef bl 8003d3c ST7793_SendCommand(0x0388, 0x070F); - 8003f56: 4a26 ldr r2, [pc, #152] ; (8003ff0 ) - 8003f58: 23e2 movs r3, #226 ; 0xe2 - 8003f5a: 009b lsls r3, r3, #2 - 8003f5c: 0011 movs r1, r2 - 8003f5e: 0018 movs r0, r3 - 8003f60: f7ff fee8 bl 8003d34 + 8003f5e: 4a26 ldr r2, [pc, #152] ; (8003ff8 ) + 8003f60: 23e2 movs r3, #226 ; 0xe2 + 8003f62: 009b lsls r3, r3, #2 + 8003f64: 0011 movs r1, r2 + 8003f66: 0018 movs r0, r3 + 8003f68: f7ff fee8 bl 8003d3c ST7793_SendCommand(0x0389, 0x2230); - 8003f64: 4a1c ldr r2, [pc, #112] ; (8003fd8 ) - 8003f66: 4b23 ldr r3, [pc, #140] ; (8003ff4 ) - 8003f68: 0011 movs r1, r2 - 8003f6a: 0018 movs r0, r3 - 8003f6c: f7ff fee2 bl 8003d34 + 8003f6c: 4a1c ldr r2, [pc, #112] ; (8003fe0 ) + 8003f6e: 4b23 ldr r3, [pc, #140] ; (8003ffc ) + 8003f70: 0011 movs r1, r2 + 8003f72: 0018 movs r0, r3 + 8003f74: f7ff fee2 bl 8003d3c ST7793_SendCommand(0x0702, 0x0060); //VCOM Control. 1680 mV - 8003f70: 4b21 ldr r3, [pc, #132] ; (8003ff8 ) - 8003f72: 2160 movs r1, #96 ; 0x60 - 8003f74: 0018 movs r0, r3 - 8003f76: f7ff fedd bl 8003d34 + 8003f78: 4b21 ldr r3, [pc, #132] ; (8004000 ) + 8003f7a: 2160 movs r1, #96 ; 0x60 + 8003f7c: 0018 movs r0, r3 + 8003f7e: f7ff fedd bl 8003d3c ST7793_SendCommand(0x00FF, 0x0000); //Ext Command Control. Disable extended registers - 8003f7a: 2100 movs r1, #0 - 8003f7c: 20ff movs r0, #255 ; 0xff - 8003f7e: f7ff fed9 bl 8003d34 + 8003f82: 2100 movs r1, #0 + 8003f84: 20ff movs r0, #255 ; 0xff + 8003f86: f7ff fed9 bl 8003d3c ST7793_SendCommand(0x0007, 0x0100); //Display Control 1. Base image display enable - 8003f82: 2380 movs r3, #128 ; 0x80 - 8003f84: 005b lsls r3, r3, #1 - 8003f86: 0019 movs r1, r3 - 8003f88: 2007 movs r0, #7 - 8003f8a: f7ff fed3 bl 8003d34 + 8003f8a: 2380 movs r3, #128 ; 0x80 + 8003f8c: 005b lsls r3, r3, #1 + 8003f8e: 0019 movs r1, r3 + 8003f90: 2007 movs r0, #7 + 8003f92: f7ff fed3 bl 8003d3c delay_us(200000); - 8003f8e: 4b0a ldr r3, [pc, #40] ; (8003fb8 ) - 8003f90: 0018 movs r0, r3 - 8003f92: f7ff fdeb bl 8003b6c + 8003f96: 4b0a ldr r3, [pc, #40] ; (8003fc0 ) + 8003f98: 0018 movs r0, r3 + 8003f9a: f7ff fdeb bl 8003b74 //ST7793_CS_OFF; //Deactivate CS pin #ifdef ST7793_USE_PWM ST7793_Brightness(99); - 8003f96: 2063 movs r0, #99 ; 0x63 - 8003f98: f000 f830 bl 8003ffc + 8003f9e: 2063 movs r0, #99 ; 0x63 + 8003fa0: f000 f830 bl 8004004 #else HAL_GPIO_WritePin(ST7793_LED_pt, ST7793_LED_pn, GPIO_PIN_SET); #endif return 0; - 8003f9c: 2300 movs r3, #0 + 8003fa4: 2300 movs r3, #0 } - 8003f9e: 0018 movs r0, r3 - 8003fa0: 46bd mov sp, r7 - 8003fa2: bd80 pop {r7, pc} - 8003fa4: 50000c00 .word 0x50000c00 - 8003fa8: 00007793 .word 0x00007793 - 8003fac: 00001038 .word 0x00001038 - 8003fb0: 00000712 .word 0x00000712 - 8003fb4: 00000752 .word 0x00000752 - 8003fb8: 00030d40 .word 0x00030d40 - 8003fbc: 00000303 .word 0x00000303 - 8003fc0: 0000481f .word 0x0000481f - 8003fc4: 00000381 .word 0x00000381 - 8003fc8: 00000803 .word 0x00000803 - 8003fcc: 00000382 .word 0x00000382 - 8003fd0: 0000030f .word 0x0000030f - 8003fd4: 00000383 .word 0x00000383 - 8003fd8: 00002230 .word 0x00002230 - 8003fdc: 00000385 .word 0x00000385 - 8003fe0: 0000491e .word 0x0000491e - 8003fe4: 00000386 .word 0x00000386 - 8003fe8: 00000703 .word 0x00000703 - 8003fec: 00000387 .word 0x00000387 - 8003ff0: 0000070f .word 0x0000070f - 8003ff4: 00000389 .word 0x00000389 - 8003ff8: 00000702 .word 0x00000702 + 8003fa6: 0018 movs r0, r3 + 8003fa8: 46bd mov sp, r7 + 8003faa: bd80 pop {r7, pc} + 8003fac: 50000c00 .word 0x50000c00 + 8003fb0: 00007793 .word 0x00007793 + 8003fb4: 00001038 .word 0x00001038 + 8003fb8: 00000712 .word 0x00000712 + 8003fbc: 00000752 .word 0x00000752 + 8003fc0: 00030d40 .word 0x00030d40 + 8003fc4: 00000303 .word 0x00000303 + 8003fc8: 0000481f .word 0x0000481f + 8003fcc: 00000381 .word 0x00000381 + 8003fd0: 00000803 .word 0x00000803 + 8003fd4: 00000382 .word 0x00000382 + 8003fd8: 0000030f .word 0x0000030f + 8003fdc: 00000383 .word 0x00000383 + 8003fe0: 00002230 .word 0x00002230 + 8003fe4: 00000385 .word 0x00000385 + 8003fe8: 0000491e .word 0x0000491e + 8003fec: 00000386 .word 0x00000386 + 8003ff0: 00000703 .word 0x00000703 + 8003ff4: 00000387 .word 0x00000387 + 8003ff8: 0000070f .word 0x0000070f + 8003ffc: 00000389 .word 0x00000389 + 8004000: 00000702 .word 0x00000702 -08003ffc : +08004004 : //Set backlight brightness (0-99) void ST7793_Brightness(uint8_t level) { - 8003ffc: b580 push {r7, lr} - 8003ffe: b082 sub sp, #8 - 8004000: af00 add r7, sp, #0 - 8004002: 0002 movs r2, r0 - 8004004: 1dfb adds r3, r7, #7 - 8004006: 701a strb r2, [r3, #0] + 8004004: b580 push {r7, lr} + 8004006: b082 sub sp, #8 + 8004008: af00 add r7, sp, #0 + 800400a: 0002 movs r2, r0 + 800400c: 1dfb adds r3, r7, #7 + 800400e: 701a strb r2, [r3, #0] ST7793_TIM->CCR1 = level; - 8004008: 4b03 ldr r3, [pc, #12] ; (8004018 ) - 800400a: 1dfa adds r2, r7, #7 - 800400c: 7812 ldrb r2, [r2, #0] - 800400e: 635a str r2, [r3, #52] ; 0x34 + 8004010: 4b03 ldr r3, [pc, #12] ; (8004020 ) + 8004012: 1dfa adds r2, r7, #7 + 8004014: 7812 ldrb r2, [r2, #0] + 8004016: 635a str r2, [r3, #52] ; 0x34 } - 8004010: 46c0 nop ; (mov r8, r8) - 8004012: 46bd mov sp, r7 - 8004014: b002 add sp, #8 - 8004016: bd80 pop {r7, pc} - 8004018: 40014000 .word 0x40014000 + 8004018: 46c0 nop ; (mov r8, r8) + 800401a: 46bd mov sp, r7 + 800401c: b002 add sp, #8 + 800401e: bd80 pop {r7, pc} + 8004020: 40014000 .word 0x40014000 -0800401c : +08004024 : //=============================== Drawing functions =============================== //Fill the entire screen with color void ST7793_FillScreen(uint16_t color) { - 800401c: b580 push {r7, lr} - 800401e: b084 sub sp, #16 - 8004020: af00 add r7, sp, #0 - 8004022: 0002 movs r2, r0 - 8004024: 1dbb adds r3, r7, #6 - 8004026: 801a strh r2, [r3, #0] - int i, cnt = ST7793_XMAX * ST7793_YMAX; - 8004028: 4b2f ldr r3, [pc, #188] ; (80040e8 ) - 800402a: 60bb str r3, [r7, #8] - color = ~color; + 8004024: b580 push {r7, lr} + 8004026: b084 sub sp, #16 + 8004028: af00 add r7, sp, #0 + 800402a: 0002 movs r2, r0 800402c: 1dbb adds r3, r7, #6 - 800402e: 1dba adds r2, r7, #6 - 8004030: 8812 ldrh r2, [r2, #0] - 8004032: 43d2 mvns r2, r2 - 8004034: 801a strh r2, [r3, #0] + 800402e: 801a strh r2, [r3, #0] + int i, cnt = ST7793_XMAX * ST7793_YMAX; + 8004030: 4b2f ldr r3, [pc, #188] ; (80040f0 ) + 8004032: 60bb str r3, [r7, #8] + color = ~color; + 8004034: 1dbb adds r3, r7, #6 + 8004036: 1dba adds r2, r7, #6 + 8004038: 8812 ldrh r2, [r2, #0] + 800403a: 43d2 mvns r2, r2 + 800403c: 801a strh r2, [r3, #0] //Set the window to entire screen ST7793_SendCommand(0x0212, 0); - 8004036: 4b2d ldr r3, [pc, #180] ; (80040ec ) - 8004038: 2100 movs r1, #0 - 800403a: 0018 movs r0, r3 - 800403c: f7ff fe7a bl 8003d34 + 800403e: 4b2d ldr r3, [pc, #180] ; (80040f4 ) + 8004040: 2100 movs r1, #0 + 8004042: 0018 movs r0, r3 + 8004044: f7ff fe7a bl 8003d3c ST7793_SendCommand(0x0213, ST7793_XMAX-1); - 8004040: 2390 movs r3, #144 ; 0x90 - 8004042: 33ff adds r3, #255 ; 0xff - 8004044: 4a2a ldr r2, [pc, #168] ; (80040f0 ) - 8004046: 0019 movs r1, r3 - 8004048: 0010 movs r0, r2 - 800404a: f7ff fe73 bl 8003d34 + 8004048: 2390 movs r3, #144 ; 0x90 + 800404a: 33ff adds r3, #255 ; 0xff + 800404c: 4a2a ldr r2, [pc, #168] ; (80040f8 ) + 800404e: 0019 movs r1, r3 + 8004050: 0010 movs r0, r2 + 8004052: f7ff fe73 bl 8003d3c ST7793_SendCommand(0x0210, 0); - 800404e: 2384 movs r3, #132 ; 0x84 - 8004050: 009b lsls r3, r3, #2 - 8004052: 2100 movs r1, #0 - 8004054: 0018 movs r0, r3 - 8004056: f7ff fe6d bl 8003d34 + 8004056: 2384 movs r3, #132 ; 0x84 + 8004058: 009b lsls r3, r3, #2 + 800405a: 2100 movs r1, #0 + 800405c: 0018 movs r0, r3 + 800405e: f7ff fe6d bl 8003d3c ST7793_SendCommand(0x0211, ST7793_YMAX-1); - 800405a: 4b26 ldr r3, [pc, #152] ; (80040f4 ) - 800405c: 21ef movs r1, #239 ; 0xef - 800405e: 0018 movs r0, r3 - 8004060: f7ff fe68 bl 8003d34 + 8004062: 4b26 ldr r3, [pc, #152] ; (80040fc ) + 8004064: 21ef movs r1, #239 ; 0xef + 8004066: 0018 movs r0, r3 + 8004068: f7ff fe68 bl 8003d3c ST7793_SendCommand(0x0201, 0); //Set X pixel address - 8004064: 4b24 ldr r3, [pc, #144] ; (80040f8 ) - 8004066: 2100 movs r1, #0 - 8004068: 0018 movs r0, r3 - 800406a: f7ff fe63 bl 8003d34 + 800406c: 4b24 ldr r3, [pc, #144] ; (8004100 ) + 800406e: 2100 movs r1, #0 + 8004070: 0018 movs r0, r3 + 8004072: f7ff fe63 bl 8003d3c ST7793_SendCommand(0x0200, 0); //Set Y pixel address - 800406e: 2380 movs r3, #128 ; 0x80 - 8004070: 009b lsls r3, r3, #2 - 8004072: 2100 movs r1, #0 - 8004074: 0018 movs r0, r3 - 8004076: f7ff fe5d bl 8003d34 + 8004076: 2380 movs r3, #128 ; 0x80 + 8004078: 009b lsls r3, r3, #2 + 800407a: 2100 movs r1, #0 + 800407c: 0018 movs r0, r3 + 800407e: f7ff fe5d bl 8003d3c ST7793_COMMAND; //RS pin to command mode - 800407a: 4b20 ldr r3, [pc, #128] ; (80040fc ) - 800407c: 2200 movs r2, #0 - 800407e: 2101 movs r1, #1 - 8004080: 0018 movs r0, r3 - 8004082: f003 fa8f bl 80075a4 + 8004082: 4b20 ldr r3, [pc, #128] ; (8004104 ) + 8004084: 2200 movs r2, #0 + 8004086: 2101 movs r1, #1 + 8004088: 0018 movs r0, r3 + 800408a: f003 fbcf bl 800782c ST7793_Write8(0x02); //send a command 0x0202 8 MSB first - 8004086: 2002 movs r0, #2 - 8004088: f7ff fdcc bl 8003c24 + 800408e: 2002 movs r0, #2 + 8004090: f7ff fdcc bl 8003c2c ST7793_WR_PULSE; //Pulse on the WR pin to send the same 8bits as LSB of the command - 800408c: 4b1b ldr r3, [pc, #108] ; (80040fc ) - 800408e: 2200 movs r2, #0 - 8004090: 2102 movs r1, #2 - 8004092: 0018 movs r0, r3 - 8004094: f003 fa86 bl 80075a4 - 8004098: 4b18 ldr r3, [pc, #96] ; (80040fc ) - 800409a: 2201 movs r2, #1 - 800409c: 2102 movs r1, #2 - 800409e: 0018 movs r0, r3 - 80040a0: f003 fa80 bl 80075a4 + 8004094: 4b1b ldr r3, [pc, #108] ; (8004104 ) + 8004096: 2200 movs r2, #0 + 8004098: 2102 movs r1, #2 + 800409a: 0018 movs r0, r3 + 800409c: f003 fbc6 bl 800782c + 80040a0: 4b18 ldr r3, [pc, #96] ; (8004104 ) + 80040a2: 2201 movs r2, #1 + 80040a4: 2102 movs r1, #2 + 80040a6: 0018 movs r0, r3 + 80040a8: f003 fbc0 bl 800782c ST7793_DATA; //RS pin to data mode - 80040a4: 4b15 ldr r3, [pc, #84] ; (80040fc ) - 80040a6: 2201 movs r2, #1 - 80040a8: 2101 movs r1, #1 - 80040aa: 0018 movs r0, r3 - 80040ac: f003 fa7a bl 80075a4 + 80040ac: 4b15 ldr r3, [pc, #84] ; (8004104 ) + 80040ae: 2201 movs r2, #1 + 80040b0: 2101 movs r1, #1 + 80040b2: 0018 movs r0, r3 + 80040b4: f003 fbba bl 800782c for (i=0; i + 80040b8: 2300 movs r3, #0 + 80040ba: 60fb str r3, [r7, #12] + 80040bc: e00e b.n 80040dc ST7793_Write8(color >> 8); //Send color code 8MSB - 80040b6: 1dbb adds r3, r7, #6 - 80040b8: 881b ldrh r3, [r3, #0] - 80040ba: 0a1b lsrs r3, r3, #8 - 80040bc: b29b uxth r3, r3 - 80040be: 0018 movs r0, r3 - 80040c0: f7ff fdb0 bl 8003c24 + 80040be: 1dbb adds r3, r7, #6 + 80040c0: 881b ldrh r3, [r3, #0] + 80040c2: 0a1b lsrs r3, r3, #8 + 80040c4: b29b uxth r3, r3 + 80040c6: 0018 movs r0, r3 + 80040c8: f7ff fdb0 bl 8003c2c ST7793_Write8(color); //Send color code 8LSB - 80040c4: 1dbb adds r3, r7, #6 - 80040c6: 881b ldrh r3, [r3, #0] - 80040c8: 0018 movs r0, r3 - 80040ca: f7ff fdab bl 8003c24 + 80040cc: 1dbb adds r3, r7, #6 + 80040ce: 881b ldrh r3, [r3, #0] + 80040d0: 0018 movs r0, r3 + 80040d2: f7ff fdab bl 8003c2c for (i=0; i + 80040d6: 68fb ldr r3, [r7, #12] + 80040d8: 3301 adds r3, #1 + 80040da: 60fb str r3, [r7, #12] + 80040dc: 68fa ldr r2, [r7, #12] + 80040de: 68bb ldr r3, [r7, #8] + 80040e0: 429a cmp r2, r3 + 80040e2: dbec blt.n 80040be } } - 80040dc: 46c0 nop ; (mov r8, r8) - 80040de: 46c0 nop ; (mov r8, r8) - 80040e0: 46bd mov sp, r7 - 80040e2: b004 add sp, #16 - 80040e4: bd80 pop {r7, pc} + 80040e4: 46c0 nop ; (mov r8, r8) 80040e6: 46c0 nop ; (mov r8, r8) - 80040e8: 00017700 .word 0x00017700 - 80040ec: 00000212 .word 0x00000212 - 80040f0: 00000213 .word 0x00000213 - 80040f4: 00000211 .word 0x00000211 - 80040f8: 00000201 .word 0x00000201 - 80040fc: 50000400 .word 0x50000400 + 80040e8: 46bd mov sp, r7 + 80040ea: b004 add sp, #16 + 80040ec: bd80 pop {r7, pc} + 80040ee: 46c0 nop ; (mov r8, r8) + 80040f0: 00017700 .word 0x00017700 + 80040f4: 00000212 .word 0x00000212 + 80040f8: 00000213 .word 0x00000213 + 80040fc: 00000211 .word 0x00000211 + 8004100: 00000201 .word 0x00000201 + 8004104: 50000400 .word 0x50000400 -08004100 : +08004108 : //Fill a rectangle zone with color void ST7793_FillRect(uint16_t color, uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { - 8004100: b5b0 push {r4, r5, r7, lr} - 8004102: b086 sub sp, #24 - 8004104: af00 add r7, sp, #0 - 8004106: 0005 movs r5, r0 - 8004108: 000c movs r4, r1 - 800410a: 0010 movs r0, r2 - 800410c: 0019 movs r1, r3 - 800410e: 1dbb adds r3, r7, #6 - 8004110: 1c2a adds r2, r5, #0 - 8004112: 801a strh r2, [r3, #0] - 8004114: 1d3b adds r3, r7, #4 - 8004116: 1c22 adds r2, r4, #0 - 8004118: 801a strh r2, [r3, #0] - 800411a: 1cbb adds r3, r7, #2 - 800411c: 1c02 adds r2, r0, #0 - 800411e: 801a strh r2, [r3, #0] - 8004120: 003b movs r3, r7 - 8004122: 1c0a adds r2, r1, #0 - 8004124: 801a strh r2, [r3, #0] + 8004108: b5b0 push {r4, r5, r7, lr} + 800410a: b086 sub sp, #24 + 800410c: af00 add r7, sp, #0 + 800410e: 0005 movs r5, r0 + 8004110: 000c movs r4, r1 + 8004112: 0010 movs r0, r2 + 8004114: 0019 movs r1, r3 + 8004116: 1dbb adds r3, r7, #6 + 8004118: 1c2a adds r2, r5, #0 + 800411a: 801a strh r2, [r3, #0] + 800411c: 1d3b adds r3, r7, #4 + 800411e: 1c22 adds r2, r4, #0 + 8004120: 801a strh r2, [r3, #0] + 8004122: 1cbb adds r3, r7, #2 + 8004124: 1c02 adds r2, r0, #0 + 8004126: 801a strh r2, [r3, #0] + 8004128: 003b movs r3, r7 + 800412a: 1c0a adds r2, r1, #0 + 800412c: 801a strh r2, [r3, #0] int k, l, dx, dy; color = ~color; - 8004126: 1dbb adds r3, r7, #6 - 8004128: 1dba adds r2, r7, #6 - 800412a: 8812 ldrh r2, [r2, #0] - 800412c: 43d2 mvns r2, r2 - 800412e: 801a strh r2, [r3, #0] + 800412e: 1dbb adds r3, r7, #6 + 8004130: 1dba adds r2, r7, #6 + 8004132: 8812 ldrh r2, [r2, #0] + 8004134: 43d2 mvns r2, r2 + 8004136: 801a strh r2, [r3, #0] //Check coordinates are in right order if (x1 > x2) {dx = x1; x1 = x2; x2 = dx;} - 8004130: 1d3a adds r2, r7, #4 - 8004132: 003b movs r3, r7 - 8004134: 8812 ldrh r2, [r2, #0] - 8004136: 881b ldrh r3, [r3, #0] - 8004138: 429a cmp r2, r3 - 800413a: d909 bls.n 8004150 - 800413c: 1d3b adds r3, r7, #4 + 8004138: 1d3a adds r2, r7, #4 + 800413a: 003b movs r3, r7 + 800413c: 8812 ldrh r2, [r2, #0] 800413e: 881b ldrh r3, [r3, #0] - 8004140: 60fb str r3, [r7, #12] - 8004142: 1d3b adds r3, r7, #4 - 8004144: 003a movs r2, r7 - 8004146: 8812 ldrh r2, [r2, #0] - 8004148: 801a strh r2, [r3, #0] - 800414a: 003b movs r3, r7 - 800414c: 68fa ldr r2, [r7, #12] - 800414e: 801a strh r2, [r3, #0] + 8004140: 429a cmp r2, r3 + 8004142: d909 bls.n 8004158 + 8004144: 1d3b adds r3, r7, #4 + 8004146: 881b ldrh r3, [r3, #0] + 8004148: 60fb str r3, [r7, #12] + 800414a: 1d3b adds r3, r7, #4 + 800414c: 003a movs r2, r7 + 800414e: 8812 ldrh r2, [r2, #0] + 8004150: 801a strh r2, [r3, #0] + 8004152: 003b movs r3, r7 + 8004154: 68fa ldr r2, [r7, #12] + 8004156: 801a strh r2, [r3, #0] if (y1 > y2) {dy = y1; y1 = y2; y2 = dy;} - 8004150: 1cba adds r2, r7, #2 - 8004152: 2128 movs r1, #40 ; 0x28 - 8004154: 187b adds r3, r7, r1 - 8004156: 8812 ldrh r2, [r2, #0] - 8004158: 881b ldrh r3, [r3, #0] - 800415a: 429a cmp r2, r3 - 800415c: d909 bls.n 8004172 - 800415e: 1cbb adds r3, r7, #2 + 8004158: 1cba adds r2, r7, #2 + 800415a: 2128 movs r1, #40 ; 0x28 + 800415c: 187b adds r3, r7, r1 + 800415e: 8812 ldrh r2, [r2, #0] 8004160: 881b ldrh r3, [r3, #0] - 8004162: 60bb str r3, [r7, #8] - 8004164: 1cba adds r2, r7, #2 - 8004166: 187b adds r3, r7, r1 + 8004162: 429a cmp r2, r3 + 8004164: d909 bls.n 800417a + 8004166: 1cbb adds r3, r7, #2 8004168: 881b ldrh r3, [r3, #0] - 800416a: 8013 strh r3, [r2, #0] - 800416c: 187b adds r3, r7, r1 - 800416e: 68ba ldr r2, [r7, #8] - 8004170: 801a strh r2, [r3, #0] + 800416a: 60bb str r3, [r7, #8] + 800416c: 1cba adds r2, r7, #2 + 800416e: 187b adds r3, r7, r1 + 8004170: 881b ldrh r3, [r3, #0] + 8004172: 8013 strh r3, [r2, #0] + 8004174: 187b adds r3, r7, r1 + 8004176: 68ba ldr r2, [r7, #8] + 8004178: 801a strh r2, [r3, #0] dx = x2-x1; - 8004172: 003b movs r3, r7 - 8004174: 881a ldrh r2, [r3, #0] - 8004176: 1d3b adds r3, r7, #4 - 8004178: 881b ldrh r3, [r3, #0] - 800417a: 1ad3 subs r3, r2, r3 - 800417c: 60fb str r3, [r7, #12] + 800417a: 003b movs r3, r7 + 800417c: 881a ldrh r2, [r3, #0] + 800417e: 1d3b adds r3, r7, #4 + 8004180: 881b ldrh r3, [r3, #0] + 8004182: 1ad3 subs r3, r2, r3 + 8004184: 60fb str r3, [r7, #12] dy = y2-y1; - 800417e: 2428 movs r4, #40 ; 0x28 - 8004180: 193b adds r3, r7, r4 - 8004182: 881a ldrh r2, [r3, #0] - 8004184: 1cbb adds r3, r7, #2 - 8004186: 881b ldrh r3, [r3, #0] - 8004188: 1ad3 subs r3, r2, r3 - 800418a: 60bb str r3, [r7, #8] + 8004186: 2428 movs r4, #40 ; 0x28 + 8004188: 193b adds r3, r7, r4 + 800418a: 881a ldrh r2, [r3, #0] + 800418c: 1cbb adds r3, r7, #2 + 800418e: 881b ldrh r3, [r3, #0] + 8004190: 1ad3 subs r3, r2, r3 + 8004192: 60bb str r3, [r7, #8] //Set screen window and start coordinates ST7793_SendCommand(0x210,y1); - 800418c: 1cbb adds r3, r7, #2 - 800418e: 881a ldrh r2, [r3, #0] - 8004190: 2384 movs r3, #132 ; 0x84 - 8004192: 009b lsls r3, r3, #2 - 8004194: 0011 movs r1, r2 - 8004196: 0018 movs r0, r3 - 8004198: f7ff fdcc bl 8003d34 + 8004194: 1cbb adds r3, r7, #2 + 8004196: 881a ldrh r2, [r3, #0] + 8004198: 2384 movs r3, #132 ; 0x84 + 800419a: 009b lsls r3, r3, #2 + 800419c: 0011 movs r1, r2 + 800419e: 0018 movs r0, r3 + 80041a0: f7ff fdcc bl 8003d3c ST7793_SendCommand(0x211,y2); - 800419c: 193b adds r3, r7, r4 - 800419e: 881b ldrh r3, [r3, #0] - 80041a0: 4a30 ldr r2, [pc, #192] ; (8004264 ) - 80041a2: 0019 movs r1, r3 - 80041a4: 0010 movs r0, r2 - 80041a6: f7ff fdc5 bl 8003d34 + 80041a4: 193b adds r3, r7, r4 + 80041a6: 881b ldrh r3, [r3, #0] + 80041a8: 4a30 ldr r2, [pc, #192] ; (800426c ) + 80041aa: 0019 movs r1, r3 + 80041ac: 0010 movs r0, r2 + 80041ae: f7ff fdc5 bl 8003d3c ST7793_SendCommand(0x212,x1); - 80041aa: 1d3b adds r3, r7, #4 - 80041ac: 881b ldrh r3, [r3, #0] - 80041ae: 4a2e ldr r2, [pc, #184] ; (8004268 ) - 80041b0: 0019 movs r1, r3 - 80041b2: 0010 movs r0, r2 - 80041b4: f7ff fdbe bl 8003d34 + 80041b2: 1d3b adds r3, r7, #4 + 80041b4: 881b ldrh r3, [r3, #0] + 80041b6: 4a2e ldr r2, [pc, #184] ; (8004270 ) + 80041b8: 0019 movs r1, r3 + 80041ba: 0010 movs r0, r2 + 80041bc: f7ff fdbe bl 8003d3c ST7793_SendCommand(0x213,x2); - 80041b8: 003b movs r3, r7 - 80041ba: 881b ldrh r3, [r3, #0] - 80041bc: 4a2b ldr r2, [pc, #172] ; (800426c ) - 80041be: 0019 movs r1, r3 - 80041c0: 0010 movs r0, r2 - 80041c2: f7ff fdb7 bl 8003d34 + 80041c0: 003b movs r3, r7 + 80041c2: 881b ldrh r3, [r3, #0] + 80041c4: 4a2b ldr r2, [pc, #172] ; (8004274 ) + 80041c6: 0019 movs r1, r3 + 80041c8: 0010 movs r0, r2 + 80041ca: f7ff fdb7 bl 8003d3c ST7793_SendCommand(0x200,y1); - 80041c6: 1cbb adds r3, r7, #2 - 80041c8: 881a ldrh r2, [r3, #0] - 80041ca: 2380 movs r3, #128 ; 0x80 - 80041cc: 009b lsls r3, r3, #2 - 80041ce: 0011 movs r1, r2 - 80041d0: 0018 movs r0, r3 - 80041d2: f7ff fdaf bl 8003d34 + 80041ce: 1cbb adds r3, r7, #2 + 80041d0: 881a ldrh r2, [r3, #0] + 80041d2: 2380 movs r3, #128 ; 0x80 + 80041d4: 009b lsls r3, r3, #2 + 80041d6: 0011 movs r1, r2 + 80041d8: 0018 movs r0, r3 + 80041da: f7ff fdaf bl 8003d3c ST7793_SendCommand(0x201,x1); - 80041d6: 1d3b adds r3, r7, #4 - 80041d8: 881b ldrh r3, [r3, #0] - 80041da: 4a25 ldr r2, [pc, #148] ; (8004270 ) - 80041dc: 0019 movs r1, r3 - 80041de: 0010 movs r0, r2 - 80041e0: f7ff fda8 bl 8003d34 + 80041de: 1d3b adds r3, r7, #4 + 80041e0: 881b ldrh r3, [r3, #0] + 80041e2: 4a25 ldr r2, [pc, #148] ; (8004278 ) + 80041e4: 0019 movs r1, r3 + 80041e6: 0010 movs r0, r2 + 80041e8: f7ff fda8 bl 8003d3c ST7793_COMMAND; //RS pin to command mode - 80041e4: 4b23 ldr r3, [pc, #140] ; (8004274 ) - 80041e6: 2200 movs r2, #0 - 80041e8: 2101 movs r1, #1 - 80041ea: 0018 movs r0, r3 - 80041ec: f003 f9da bl 80075a4 + 80041ec: 4b23 ldr r3, [pc, #140] ; (800427c ) + 80041ee: 2200 movs r2, #0 + 80041f0: 2101 movs r1, #1 + 80041f2: 0018 movs r0, r3 + 80041f4: f003 fb1a bl 800782c ST7793_Write8(0x02); //send a command 0x0202 8 MSB first - 80041f0: 2002 movs r0, #2 - 80041f2: f7ff fd17 bl 8003c24 + 80041f8: 2002 movs r0, #2 + 80041fa: f7ff fd17 bl 8003c2c ST7793_WR_PULSE; //Pulse on the WR pin to send the same 8bits as LSB of the command - 80041f6: 4b1f ldr r3, [pc, #124] ; (8004274 ) - 80041f8: 2200 movs r2, #0 - 80041fa: 2102 movs r1, #2 - 80041fc: 0018 movs r0, r3 - 80041fe: f003 f9d1 bl 80075a4 - 8004202: 4b1c ldr r3, [pc, #112] ; (8004274 ) - 8004204: 2201 movs r2, #1 - 8004206: 2102 movs r1, #2 - 8004208: 0018 movs r0, r3 - 800420a: f003 f9cb bl 80075a4 + 80041fe: 4b1f ldr r3, [pc, #124] ; (800427c ) + 8004200: 2200 movs r2, #0 + 8004202: 2102 movs r1, #2 + 8004204: 0018 movs r0, r3 + 8004206: f003 fb11 bl 800782c + 800420a: 4b1c ldr r3, [pc, #112] ; (800427c ) + 800420c: 2201 movs r2, #1 + 800420e: 2102 movs r1, #2 + 8004210: 0018 movs r0, r3 + 8004212: f003 fb0b bl 800782c ST7793_DATA; //RS pin to data mode - 800420e: 4b19 ldr r3, [pc, #100] ; (8004274 ) - 8004210: 2201 movs r2, #1 - 8004212: 2101 movs r1, #1 - 8004214: 0018 movs r0, r3 - 8004216: f003 f9c5 bl 80075a4 + 8004216: 4b19 ldr r3, [pc, #100] ; (800427c ) + 8004218: 2201 movs r2, #1 + 800421a: 2101 movs r1, #1 + 800421c: 0018 movs r0, r3 + 800421e: f003 fb05 bl 800782c for (k=0; k<=dx; k++) - 800421a: 2300 movs r3, #0 - 800421c: 617b str r3, [r7, #20] - 800421e: e018 b.n 8004252 + 8004222: 2300 movs r3, #0 + 8004224: 617b str r3, [r7, #20] + 8004226: e018 b.n 800425a for (l=0; l<=dy; l++) { - 8004220: 2300 movs r3, #0 - 8004222: 613b str r3, [r7, #16] - 8004224: e00e b.n 8004244 + 8004228: 2300 movs r3, #0 + 800422a: 613b str r3, [r7, #16] + 800422c: e00e b.n 800424c ST7793_Write8(color >> 8); //Send color code 8MSB - 8004226: 1dbb adds r3, r7, #6 - 8004228: 881b ldrh r3, [r3, #0] - 800422a: 0a1b lsrs r3, r3, #8 - 800422c: b29b uxth r3, r3 - 800422e: 0018 movs r0, r3 - 8004230: f7ff fcf8 bl 8003c24 + 800422e: 1dbb adds r3, r7, #6 + 8004230: 881b ldrh r3, [r3, #0] + 8004232: 0a1b lsrs r3, r3, #8 + 8004234: b29b uxth r3, r3 + 8004236: 0018 movs r0, r3 + 8004238: f7ff fcf8 bl 8003c2c ST7793_Write8(color); //Send color code 8LSB - 8004234: 1dbb adds r3, r7, #6 - 8004236: 881b ldrh r3, [r3, #0] - 8004238: 0018 movs r0, r3 - 800423a: f7ff fcf3 bl 8003c24 + 800423c: 1dbb adds r3, r7, #6 + 800423e: 881b ldrh r3, [r3, #0] + 8004240: 0018 movs r0, r3 + 8004242: f7ff fcf3 bl 8003c2c for (l=0; l<=dy; l++) { - 800423e: 693b ldr r3, [r7, #16] - 8004240: 3301 adds r3, #1 - 8004242: 613b str r3, [r7, #16] - 8004244: 693a ldr r2, [r7, #16] - 8004246: 68bb ldr r3, [r7, #8] - 8004248: 429a cmp r2, r3 - 800424a: ddec ble.n 8004226 + 8004246: 693b ldr r3, [r7, #16] + 8004248: 3301 adds r3, #1 + 800424a: 613b str r3, [r7, #16] + 800424c: 693a ldr r2, [r7, #16] + 800424e: 68bb ldr r3, [r7, #8] + 8004250: 429a cmp r2, r3 + 8004252: ddec ble.n 800422e for (k=0; k<=dx; k++) - 800424c: 697b ldr r3, [r7, #20] - 800424e: 3301 adds r3, #1 - 8004250: 617b str r3, [r7, #20] - 8004252: 697a ldr r2, [r7, #20] - 8004254: 68fb ldr r3, [r7, #12] - 8004256: 429a cmp r2, r3 - 8004258: dde2 ble.n 8004220 + 8004254: 697b ldr r3, [r7, #20] + 8004256: 3301 adds r3, #1 + 8004258: 617b str r3, [r7, #20] + 800425a: 697a ldr r2, [r7, #20] + 800425c: 68fb ldr r3, [r7, #12] + 800425e: 429a cmp r2, r3 + 8004260: dde2 ble.n 8004228 } } - 800425a: 46c0 nop ; (mov r8, r8) - 800425c: 46c0 nop ; (mov r8, r8) - 800425e: 46bd mov sp, r7 - 8004260: b006 add sp, #24 - 8004262: bdb0 pop {r4, r5, r7, pc} - 8004264: 00000211 .word 0x00000211 - 8004268: 00000212 .word 0x00000212 - 800426c: 00000213 .word 0x00000213 - 8004270: 00000201 .word 0x00000201 - 8004274: 50000400 .word 0x50000400 + 8004262: 46c0 nop ; (mov r8, r8) + 8004264: 46c0 nop ; (mov r8, r8) + 8004266: 46bd mov sp, r7 + 8004268: b006 add sp, #24 + 800426a: bdb0 pop {r4, r5, r7, pc} + 800426c: 00000211 .word 0x00000211 + 8004270: 00000212 .word 0x00000212 + 8004274: 00000213 .word 0x00000213 + 8004278: 00000201 .word 0x00000201 + 800427c: 50000400 .word 0x50000400 -08004278 : +08004280 : //Draw a pixel at XY void ST7793_DrawPixel(uint16_t color, uint16_t x, uint16_t y) { - 8004278: b590 push {r4, r7, lr} - 800427a: b083 sub sp, #12 - 800427c: af00 add r7, sp, #0 - 800427e: 0004 movs r4, r0 - 8004280: 0008 movs r0, r1 - 8004282: 0011 movs r1, r2 - 8004284: 1dbb adds r3, r7, #6 - 8004286: 1c22 adds r2, r4, #0 - 8004288: 801a strh r2, [r3, #0] - 800428a: 1d3b adds r3, r7, #4 - 800428c: 1c02 adds r2, r0, #0 - 800428e: 801a strh r2, [r3, #0] - 8004290: 1cbb adds r3, r7, #2 - 8004292: 1c0a adds r2, r1, #0 - 8004294: 801a strh r2, [r3, #0] + 8004280: b590 push {r4, r7, lr} + 8004282: b083 sub sp, #12 + 8004284: af00 add r7, sp, #0 + 8004286: 0004 movs r4, r0 + 8004288: 0008 movs r0, r1 + 800428a: 0011 movs r1, r2 + 800428c: 1dbb adds r3, r7, #6 + 800428e: 1c22 adds r2, r4, #0 + 8004290: 801a strh r2, [r3, #0] + 8004292: 1d3b adds r3, r7, #4 + 8004294: 1c02 adds r2, r0, #0 + 8004296: 801a strh r2, [r3, #0] + 8004298: 1cbb adds r3, r7, #2 + 800429a: 1c0a adds r2, r1, #0 + 800429c: 801a strh r2, [r3, #0] color = ~color; - 8004296: 1dbb adds r3, r7, #6 - 8004298: 1dba adds r2, r7, #6 - 800429a: 8812 ldrh r2, [r2, #0] - 800429c: 43d2 mvns r2, r2 - 800429e: 801a strh r2, [r3, #0] + 800429e: 1dbb adds r3, r7, #6 + 80042a0: 1dba adds r2, r7, #6 + 80042a2: 8812 ldrh r2, [r2, #0] + 80042a4: 43d2 mvns r2, r2 + 80042a6: 801a strh r2, [r3, #0] ST7793_SendCommand(0x0201, x); //Set X pixel address - 80042a0: 1d3b adds r3, r7, #4 - 80042a2: 881b ldrh r3, [r3, #0] - 80042a4: 4a15 ldr r2, [pc, #84] ; (80042fc ) - 80042a6: 0019 movs r1, r3 - 80042a8: 0010 movs r0, r2 - 80042aa: f7ff fd43 bl 8003d34 + 80042a8: 1d3b adds r3, r7, #4 + 80042aa: 881b ldrh r3, [r3, #0] + 80042ac: 4a15 ldr r2, [pc, #84] ; (8004304 ) + 80042ae: 0019 movs r1, r3 + 80042b0: 0010 movs r0, r2 + 80042b2: f7ff fd43 bl 8003d3c ST7793_SendCommand(0x0200, y); //Set Y pixel address - 80042ae: 1cbb adds r3, r7, #2 - 80042b0: 881a ldrh r2, [r3, #0] - 80042b2: 2380 movs r3, #128 ; 0x80 - 80042b4: 009b lsls r3, r3, #2 - 80042b6: 0011 movs r1, r2 - 80042b8: 0018 movs r0, r3 - 80042ba: f7ff fd3b bl 8003d34 + 80042b6: 1cbb adds r3, r7, #2 + 80042b8: 881a ldrh r2, [r3, #0] + 80042ba: 2380 movs r3, #128 ; 0x80 + 80042bc: 009b lsls r3, r3, #2 + 80042be: 0011 movs r1, r2 + 80042c0: 0018 movs r0, r3 + 80042c2: f7ff fd3b bl 8003d3c ST7793_COMMAND; //RS pin to command mode - 80042be: 4b10 ldr r3, [pc, #64] ; (8004300 ) - 80042c0: 2200 movs r2, #0 - 80042c2: 2101 movs r1, #1 - 80042c4: 0018 movs r0, r3 - 80042c6: f003 f96d bl 80075a4 + 80042c6: 4b10 ldr r3, [pc, #64] ; (8004308 ) + 80042c8: 2200 movs r2, #0 + 80042ca: 2101 movs r1, #1 + 80042cc: 0018 movs r0, r3 + 80042ce: f003 faad bl 800782c ST7793_Write8(0x02); //send a command 0x0202 8 MSB first - 80042ca: 2002 movs r0, #2 - 80042cc: f7ff fcaa bl 8003c24 + 80042d2: 2002 movs r0, #2 + 80042d4: f7ff fcaa bl 8003c2c ST7793_WR_PULSE; //Pulse on the WR pin to send the same 8bits as LSB of the command - 80042d0: 4b0b ldr r3, [pc, #44] ; (8004300 ) - 80042d2: 2200 movs r2, #0 - 80042d4: 2102 movs r1, #2 - 80042d6: 0018 movs r0, r3 - 80042d8: f003 f964 bl 80075a4 - 80042dc: 4b08 ldr r3, [pc, #32] ; (8004300 ) - 80042de: 2201 movs r2, #1 - 80042e0: 2102 movs r1, #2 - 80042e2: 0018 movs r0, r3 - 80042e4: f003 f95e bl 80075a4 + 80042d8: 4b0b ldr r3, [pc, #44] ; (8004308 ) + 80042da: 2200 movs r2, #0 + 80042dc: 2102 movs r1, #2 + 80042de: 0018 movs r0, r3 + 80042e0: f003 faa4 bl 800782c + 80042e4: 4b08 ldr r3, [pc, #32] ; (8004308 ) + 80042e6: 2201 movs r2, #1 + 80042e8: 2102 movs r1, #2 + 80042ea: 0018 movs r0, r3 + 80042ec: f003 fa9e bl 800782c ST7793_SendData(color); //Send color data - 80042e8: 1dbb adds r3, r7, #6 - 80042ea: 881b ldrh r3, [r3, #0] - 80042ec: 0018 movs r0, r3 - 80042ee: f7ff fd03 bl 8003cf8 + 80042f0: 1dbb adds r3, r7, #6 + 80042f2: 881b ldrh r3, [r3, #0] + 80042f4: 0018 movs r0, r3 + 80042f6: f7ff fd03 bl 8003d00 } - 80042f2: 46c0 nop ; (mov r8, r8) - 80042f4: 46bd mov sp, r7 - 80042f6: b003 add sp, #12 - 80042f8: bd90 pop {r4, r7, pc} 80042fa: 46c0 nop ; (mov r8, r8) - 80042fc: 00000201 .word 0x00000201 - 8004300: 50000400 .word 0x50000400 + 80042fc: 46bd mov sp, r7 + 80042fe: b003 add sp, #12 + 8004300: bd90 pop {r4, r7, pc} + 8004302: 46c0 nop ; (mov r8, r8) + 8004304: 00000201 .word 0x00000201 + 8004308: 50000400 .word 0x50000400 -08004304 : +0800430c : //Draw a line void ST7793_DrawLine(uint16_t color, uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { - 8004304: b5b0 push {r4, r5, r7, lr} - 8004306: b088 sub sp, #32 - 8004308: af00 add r7, sp, #0 - 800430a: 0005 movs r5, r0 - 800430c: 000c movs r4, r1 - 800430e: 0010 movs r0, r2 - 8004310: 0019 movs r1, r3 - 8004312: 1dbb adds r3, r7, #6 - 8004314: 1c2a adds r2, r5, #0 - 8004316: 801a strh r2, [r3, #0] - 8004318: 1d3b adds r3, r7, #4 - 800431a: 1c22 adds r2, r4, #0 - 800431c: 801a strh r2, [r3, #0] - 800431e: 1cbb adds r3, r7, #2 - 8004320: 1c02 adds r2, r0, #0 - 8004322: 801a strh r2, [r3, #0] - 8004324: 003b movs r3, r7 - 8004326: 1c0a adds r2, r1, #0 - 8004328: 801a strh r2, [r3, #0] + 800430c: b5b0 push {r4, r5, r7, lr} + 800430e: b088 sub sp, #32 + 8004310: af00 add r7, sp, #0 + 8004312: 0005 movs r5, r0 + 8004314: 000c movs r4, r1 + 8004316: 0010 movs r0, r2 + 8004318: 0019 movs r1, r3 + 800431a: 1dbb adds r3, r7, #6 + 800431c: 1c2a adds r2, r5, #0 + 800431e: 801a strh r2, [r3, #0] + 8004320: 1d3b adds r3, r7, #4 + 8004322: 1c22 adds r2, r4, #0 + 8004324: 801a strh r2, [r3, #0] + 8004326: 1cbb adds r3, r7, #2 + 8004328: 1c02 adds r2, r0, #0 + 800432a: 801a strh r2, [r3, #0] + 800432c: 003b movs r3, r7 + 800432e: 1c0a adds r2, r1, #0 + 8004330: 801a strh r2, [r3, #0] int dx = abs(x2-x1); - 800432a: 003b movs r3, r7 - 800432c: 881a ldrh r2, [r3, #0] - 800432e: 1d3b adds r3, r7, #4 - 8004330: 881b ldrh r3, [r3, #0] - 8004332: 1ad3 subs r3, r2, r3 - 8004334: 17da asrs r2, r3, #31 - 8004336: 189b adds r3, r3, r2 - 8004338: 4053 eors r3, r2 - 800433a: 61bb str r3, [r7, #24] + 8004332: 003b movs r3, r7 + 8004334: 881a ldrh r2, [r3, #0] + 8004336: 1d3b adds r3, r7, #4 + 8004338: 881b ldrh r3, [r3, #0] + 800433a: 1ad3 subs r3, r2, r3 + 800433c: 17da asrs r2, r3, #31 + 800433e: 189b adds r3, r3, r2 + 8004340: 4053 eors r3, r2 + 8004342: 61bb str r3, [r7, #24] int dy = abs(y2-y1); - 800433c: 2330 movs r3, #48 ; 0x30 - 800433e: 18fb adds r3, r7, r3 - 8004340: 881a ldrh r2, [r3, #0] - 8004342: 1cbb adds r3, r7, #2 - 8004344: 881b ldrh r3, [r3, #0] - 8004346: 1ad3 subs r3, r2, r3 - 8004348: 17da asrs r2, r3, #31 - 800434a: 189b adds r3, r3, r2 - 800434c: 4053 eors r3, r2 - 800434e: 617b str r3, [r7, #20] + 8004344: 2330 movs r3, #48 ; 0x30 + 8004346: 18fb adds r3, r7, r3 + 8004348: 881a ldrh r2, [r3, #0] + 800434a: 1cbb adds r3, r7, #2 + 800434c: 881b ldrh r3, [r3, #0] + 800434e: 1ad3 subs r3, r2, r3 + 8004350: 17da asrs r2, r3, #31 + 8004352: 189b adds r3, r3, r2 + 8004354: 4053 eors r3, r2 + 8004356: 617b str r3, [r7, #20] int sx = x1 < x2 ? 1 : -1; - 8004350: 1d3a adds r2, r7, #4 - 8004352: 003b movs r3, r7 - 8004354: 8812 ldrh r2, [r2, #0] - 8004356: 881b ldrh r3, [r3, #0] - 8004358: 429a cmp r2, r3 - 800435a: d201 bcs.n 8004360 - 800435c: 2301 movs r3, #1 - 800435e: e001 b.n 8004364 - 8004360: 2301 movs r3, #1 - 8004362: 425b negs r3, r3 - 8004364: 613b str r3, [r7, #16] + 8004358: 1d3a adds r2, r7, #4 + 800435a: 003b movs r3, r7 + 800435c: 8812 ldrh r2, [r2, #0] + 800435e: 881b ldrh r3, [r3, #0] + 8004360: 429a cmp r2, r3 + 8004362: d201 bcs.n 8004368 + 8004364: 2301 movs r3, #1 + 8004366: e001 b.n 800436c + 8004368: 2301 movs r3, #1 + 800436a: 425b negs r3, r3 + 800436c: 613b str r3, [r7, #16] int sy = y1 < y2 ? 1 : -1; - 8004366: 1cba adds r2, r7, #2 - 8004368: 2330 movs r3, #48 ; 0x30 - 800436a: 18fb adds r3, r7, r3 - 800436c: 8812 ldrh r2, [r2, #0] - 800436e: 881b ldrh r3, [r3, #0] - 8004370: 429a cmp r2, r3 - 8004372: d201 bcs.n 8004378 - 8004374: 2301 movs r3, #1 - 8004376: e001 b.n 800437c - 8004378: 2301 movs r3, #1 - 800437a: 425b negs r3, r3 - 800437c: 60fb str r3, [r7, #12] + 800436e: 1cba adds r2, r7, #2 + 8004370: 2330 movs r3, #48 ; 0x30 + 8004372: 18fb adds r3, r7, r3 + 8004374: 8812 ldrh r2, [r2, #0] + 8004376: 881b ldrh r3, [r3, #0] + 8004378: 429a cmp r2, r3 + 800437a: d201 bcs.n 8004380 + 800437c: 2301 movs r3, #1 + 800437e: e001 b.n 8004384 + 8004380: 2301 movs r3, #1 + 8004382: 425b negs r3, r3 + 8004384: 60fb str r3, [r7, #12] int error = dx - dy; - 800437e: 69ba ldr r2, [r7, #24] - 8004380: 697b ldr r3, [r7, #20] - 8004382: 1ad3 subs r3, r2, r3 - 8004384: 61fb str r3, [r7, #28] + 8004386: 69ba ldr r2, [r7, #24] + 8004388: 697b ldr r3, [r7, #20] + 800438a: 1ad3 subs r3, r2, r3 + 800438c: 61fb str r3, [r7, #28] int error2; ST7793_DrawPixel(color, x2, y2); - 8004386: 2330 movs r3, #48 ; 0x30 - 8004388: 18fb adds r3, r7, r3 - 800438a: 881a ldrh r2, [r3, #0] - 800438c: 003b movs r3, r7 - 800438e: 8819 ldrh r1, [r3, #0] - 8004390: 1dbb adds r3, r7, #6 - 8004392: 881b ldrh r3, [r3, #0] - 8004394: 0018 movs r0, r3 - 8004396: f7ff ff6f bl 8004278 + 800438e: 2330 movs r3, #48 ; 0x30 + 8004390: 18fb adds r3, r7, r3 + 8004392: 881a ldrh r2, [r3, #0] + 8004394: 003b movs r3, r7 + 8004396: 8819 ldrh r1, [r3, #0] + 8004398: 1dbb adds r3, r7, #6 + 800439a: 881b ldrh r3, [r3, #0] + 800439c: 0018 movs r0, r3 + 800439e: f7ff ff6f bl 8004280 while (x1 != x2 || y1 != y2) { - 800439a: e02e b.n 80043fa + 80043a2: e02e b.n 8004402 ST7793_DrawPixel(color, x1, y1); - 800439c: 1cbb adds r3, r7, #2 - 800439e: 881a ldrh r2, [r3, #0] - 80043a0: 1d3b adds r3, r7, #4 - 80043a2: 8819 ldrh r1, [r3, #0] - 80043a4: 1dbb adds r3, r7, #6 - 80043a6: 881b ldrh r3, [r3, #0] - 80043a8: 0018 movs r0, r3 - 80043aa: f7ff ff65 bl 8004278 + 80043a4: 1cbb adds r3, r7, #2 + 80043a6: 881a ldrh r2, [r3, #0] + 80043a8: 1d3b adds r3, r7, #4 + 80043aa: 8819 ldrh r1, [r3, #0] + 80043ac: 1dbb adds r3, r7, #6 + 80043ae: 881b ldrh r3, [r3, #0] + 80043b0: 0018 movs r0, r3 + 80043b2: f7ff ff65 bl 8004280 error2 = error << 1; - 80043ae: 69fb ldr r3, [r7, #28] - 80043b0: 005b lsls r3, r3, #1 - 80043b2: 60bb str r3, [r7, #8] + 80043b6: 69fb ldr r3, [r7, #28] + 80043b8: 005b lsls r3, r3, #1 + 80043ba: 60bb str r3, [r7, #8] if (error2 > -dy) { - 80043b4: 697b ldr r3, [r7, #20] - 80043b6: 425b negs r3, r3 - 80043b8: 68ba ldr r2, [r7, #8] - 80043ba: 429a cmp r2, r3 - 80043bc: dd0a ble.n 80043d4 + 80043bc: 697b ldr r3, [r7, #20] + 80043be: 425b negs r3, r3 + 80043c0: 68ba ldr r2, [r7, #8] + 80043c2: 429a cmp r2, r3 + 80043c4: dd0a ble.n 80043dc error -= dy; - 80043be: 69fa ldr r2, [r7, #28] - 80043c0: 697b ldr r3, [r7, #20] - 80043c2: 1ad3 subs r3, r2, r3 - 80043c4: 61fb str r3, [r7, #28] + 80043c6: 69fa ldr r2, [r7, #28] + 80043c8: 697b ldr r3, [r7, #20] + 80043ca: 1ad3 subs r3, r2, r3 + 80043cc: 61fb str r3, [r7, #28] x1 += sx; - 80043c6: 693b ldr r3, [r7, #16] - 80043c8: b299 uxth r1, r3 - 80043ca: 1d3b adds r3, r7, #4 - 80043cc: 1d3a adds r2, r7, #4 - 80043ce: 8812 ldrh r2, [r2, #0] - 80043d0: 188a adds r2, r1, r2 - 80043d2: 801a strh r2, [r3, #0] - 80043d4: 1cbb adds r3, r7, #2 - 80043d6: 1cba adds r2, r7, #2 - 80043d8: 8812 ldrh r2, [r2, #0] + 80043ce: 693b ldr r3, [r7, #16] + 80043d0: b299 uxth r1, r3 + 80043d2: 1d3b adds r3, r7, #4 + 80043d4: 1d3a adds r2, r7, #4 + 80043d6: 8812 ldrh r2, [r2, #0] + 80043d8: 188a adds r2, r1, r2 80043da: 801a strh r2, [r3, #0] + 80043dc: 1cbb adds r3, r7, #2 + 80043de: 1cba adds r2, r7, #2 + 80043e0: 8812 ldrh r2, [r2, #0] + 80043e2: 801a strh r2, [r3, #0] } if (error2 < dx) { - 80043dc: 68ba ldr r2, [r7, #8] - 80043de: 69bb ldr r3, [r7, #24] - 80043e0: 429a cmp r2, r3 - 80043e2: da0a bge.n 80043fa - error += dx; - 80043e4: 69fa ldr r2, [r7, #28] + 80043e4: 68ba ldr r2, [r7, #8] 80043e6: 69bb ldr r3, [r7, #24] - 80043e8: 18d3 adds r3, r2, r3 - 80043ea: 61fb str r3, [r7, #28] + 80043e8: 429a cmp r2, r3 + 80043ea: da0a bge.n 8004402 + error += dx; + 80043ec: 69fa ldr r2, [r7, #28] + 80043ee: 69bb ldr r3, [r7, #24] + 80043f0: 18d3 adds r3, r2, r3 + 80043f2: 61fb str r3, [r7, #28] y1 += sy; - 80043ec: 68fb ldr r3, [r7, #12] - 80043ee: b299 uxth r1, r3 - 80043f0: 1cbb adds r3, r7, #2 - 80043f2: 1cba adds r2, r7, #2 - 80043f4: 8812 ldrh r2, [r2, #0] - 80043f6: 188a adds r2, r1, r2 - 80043f8: 801a strh r2, [r3, #0] + 80043f4: 68fb ldr r3, [r7, #12] + 80043f6: b299 uxth r1, r3 + 80043f8: 1cbb adds r3, r7, #2 + 80043fa: 1cba adds r2, r7, #2 + 80043fc: 8812 ldrh r2, [r2, #0] + 80043fe: 188a adds r2, r1, r2 + 8004400: 801a strh r2, [r3, #0] while (x1 != x2 || y1 != y2) { - 80043fa: 1d3a adds r2, r7, #4 - 80043fc: 003b movs r3, r7 - 80043fe: 8812 ldrh r2, [r2, #0] - 8004400: 881b ldrh r3, [r3, #0] - 8004402: 429a cmp r2, r3 - 8004404: d1ca bne.n 800439c - 8004406: 1cba adds r2, r7, #2 - 8004408: 2330 movs r3, #48 ; 0x30 - 800440a: 18fb adds r3, r7, r3 - 800440c: 8812 ldrh r2, [r2, #0] - 800440e: 881b ldrh r3, [r3, #0] - 8004410: 429a cmp r2, r3 - 8004412: d1c3 bne.n 800439c + 8004402: 1d3a adds r2, r7, #4 + 8004404: 003b movs r3, r7 + 8004406: 8812 ldrh r2, [r2, #0] + 8004408: 881b ldrh r3, [r3, #0] + 800440a: 429a cmp r2, r3 + 800440c: d1ca bne.n 80043a4 + 800440e: 1cba adds r2, r7, #2 + 8004410: 2330 movs r3, #48 ; 0x30 + 8004412: 18fb adds r3, r7, r3 + 8004414: 8812 ldrh r2, [r2, #0] + 8004416: 881b ldrh r3, [r3, #0] + 8004418: 429a cmp r2, r3 + 800441a: d1c3 bne.n 80043a4 } } } - 8004414: 46c0 nop ; (mov r8, r8) - 8004416: 46c0 nop ; (mov r8, r8) - 8004418: 46bd mov sp, r7 - 800441a: b008 add sp, #32 - 800441c: bdb0 pop {r4, r5, r7, pc} + 800441c: 46c0 nop ; (mov r8, r8) + 800441e: 46c0 nop ; (mov r8, r8) + 8004420: 46bd mov sp, r7 + 8004422: b008 add sp, #32 + 8004424: bdb0 pop {r4, r5, r7, pc} -0800441e : +08004426 : //Draw a rectangle void ST7793_DrawRect(uint16_t color, uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { - 800441e: b5b0 push {r4, r5, r7, lr} - 8004420: b084 sub sp, #16 - 8004422: af02 add r7, sp, #8 - 8004424: 0005 movs r5, r0 - 8004426: 000c movs r4, r1 - 8004428: 0010 movs r0, r2 - 800442a: 0019 movs r1, r3 - 800442c: 1dbb adds r3, r7, #6 - 800442e: 1c2a adds r2, r5, #0 - 8004430: 801a strh r2, [r3, #0] - 8004432: 1d3b adds r3, r7, #4 - 8004434: 1c22 adds r2, r4, #0 - 8004436: 801a strh r2, [r3, #0] - 8004438: 1cbb adds r3, r7, #2 - 800443a: 1c02 adds r2, r0, #0 - 800443c: 801a strh r2, [r3, #0] - 800443e: 003b movs r3, r7 - 8004440: 1c0a adds r2, r1, #0 - 8004442: 801a strh r2, [r3, #0] + 8004426: b5b0 push {r4, r5, r7, lr} + 8004428: b084 sub sp, #16 + 800442a: af02 add r7, sp, #8 + 800442c: 0005 movs r5, r0 + 800442e: 000c movs r4, r1 + 8004430: 0010 movs r0, r2 + 8004432: 0019 movs r1, r3 + 8004434: 1dbb adds r3, r7, #6 + 8004436: 1c2a adds r2, r5, #0 + 8004438: 801a strh r2, [r3, #0] + 800443a: 1d3b adds r3, r7, #4 + 800443c: 1c22 adds r2, r4, #0 + 800443e: 801a strh r2, [r3, #0] + 8004440: 1cbb adds r3, r7, #2 + 8004442: 1c02 adds r2, r0, #0 + 8004444: 801a strh r2, [r3, #0] + 8004446: 003b movs r3, r7 + 8004448: 1c0a adds r2, r1, #0 + 800444a: 801a strh r2, [r3, #0] ST7793_DrawLine(color, x1, y1, x2, y1); - 8004444: 003b movs r3, r7 - 8004446: 881c ldrh r4, [r3, #0] - 8004448: 1cbb adds r3, r7, #2 - 800444a: 881a ldrh r2, [r3, #0] - 800444c: 1d3b adds r3, r7, #4 - 800444e: 8819 ldrh r1, [r3, #0] - 8004450: 1dbb adds r3, r7, #6 - 8004452: 8818 ldrh r0, [r3, #0] - 8004454: 1cbb adds r3, r7, #2 - 8004456: 881b ldrh r3, [r3, #0] - 8004458: 9300 str r3, [sp, #0] - 800445a: 0023 movs r3, r4 - 800445c: f7ff ff52 bl 8004304 + 800444c: 003b movs r3, r7 + 800444e: 881c ldrh r4, [r3, #0] + 8004450: 1cbb adds r3, r7, #2 + 8004452: 881a ldrh r2, [r3, #0] + 8004454: 1d3b adds r3, r7, #4 + 8004456: 8819 ldrh r1, [r3, #0] + 8004458: 1dbb adds r3, r7, #6 + 800445a: 8818 ldrh r0, [r3, #0] + 800445c: 1cbb adds r3, r7, #2 + 800445e: 881b ldrh r3, [r3, #0] + 8004460: 9300 str r3, [sp, #0] + 8004462: 0023 movs r3, r4 + 8004464: f7ff ff52 bl 800430c ST7793_DrawLine(color, x1, y2, x2, y2); - 8004460: 003b movs r3, r7 - 8004462: 881c ldrh r4, [r3, #0] - 8004464: 2518 movs r5, #24 - 8004466: 197b adds r3, r7, r5 - 8004468: 881a ldrh r2, [r3, #0] - 800446a: 1d3b adds r3, r7, #4 - 800446c: 8819 ldrh r1, [r3, #0] - 800446e: 1dbb adds r3, r7, #6 - 8004470: 8818 ldrh r0, [r3, #0] - 8004472: 197b adds r3, r7, r5 - 8004474: 881b ldrh r3, [r3, #0] - 8004476: 9300 str r3, [sp, #0] - 8004478: 0023 movs r3, r4 - 800447a: f7ff ff43 bl 8004304 + 8004468: 003b movs r3, r7 + 800446a: 881c ldrh r4, [r3, #0] + 800446c: 2518 movs r5, #24 + 800446e: 197b adds r3, r7, r5 + 8004470: 881a ldrh r2, [r3, #0] + 8004472: 1d3b adds r3, r7, #4 + 8004474: 8819 ldrh r1, [r3, #0] + 8004476: 1dbb adds r3, r7, #6 + 8004478: 8818 ldrh r0, [r3, #0] + 800447a: 197b adds r3, r7, r5 + 800447c: 881b ldrh r3, [r3, #0] + 800447e: 9300 str r3, [sp, #0] + 8004480: 0023 movs r3, r4 + 8004482: f7ff ff43 bl 800430c ST7793_DrawLine(color, x1, y1, x1, y2); - 800447e: 1d3b adds r3, r7, #4 - 8004480: 881c ldrh r4, [r3, #0] - 8004482: 1cbb adds r3, r7, #2 - 8004484: 881a ldrh r2, [r3, #0] 8004486: 1d3b adds r3, r7, #4 - 8004488: 8819 ldrh r1, [r3, #0] - 800448a: 1dbb adds r3, r7, #6 - 800448c: 8818 ldrh r0, [r3, #0] - 800448e: 197b adds r3, r7, r5 - 8004490: 881b ldrh r3, [r3, #0] - 8004492: 9300 str r3, [sp, #0] - 8004494: 0023 movs r3, r4 - 8004496: f7ff ff35 bl 8004304 + 8004488: 881c ldrh r4, [r3, #0] + 800448a: 1cbb adds r3, r7, #2 + 800448c: 881a ldrh r2, [r3, #0] + 800448e: 1d3b adds r3, r7, #4 + 8004490: 8819 ldrh r1, [r3, #0] + 8004492: 1dbb adds r3, r7, #6 + 8004494: 8818 ldrh r0, [r3, #0] + 8004496: 197b adds r3, r7, r5 + 8004498: 881b ldrh r3, [r3, #0] + 800449a: 9300 str r3, [sp, #0] + 800449c: 0023 movs r3, r4 + 800449e: f7ff ff35 bl 800430c ST7793_DrawLine(color, x2, y1, x2, y2); - 800449a: 003b movs r3, r7 - 800449c: 881c ldrh r4, [r3, #0] - 800449e: 1cbb adds r3, r7, #2 - 80044a0: 881a ldrh r2, [r3, #0] 80044a2: 003b movs r3, r7 - 80044a4: 8819 ldrh r1, [r3, #0] - 80044a6: 1dbb adds r3, r7, #6 - 80044a8: 8818 ldrh r0, [r3, #0] - 80044aa: 197b adds r3, r7, r5 - 80044ac: 881b ldrh r3, [r3, #0] - 80044ae: 9300 str r3, [sp, #0] - 80044b0: 0023 movs r3, r4 - 80044b2: f7ff ff27 bl 8004304 + 80044a4: 881c ldrh r4, [r3, #0] + 80044a6: 1cbb adds r3, r7, #2 + 80044a8: 881a ldrh r2, [r3, #0] + 80044aa: 003b movs r3, r7 + 80044ac: 8819 ldrh r1, [r3, #0] + 80044ae: 1dbb adds r3, r7, #6 + 80044b0: 8818 ldrh r0, [r3, #0] + 80044b2: 197b adds r3, r7, r5 + 80044b4: 881b ldrh r3, [r3, #0] + 80044b6: 9300 str r3, [sp, #0] + 80044b8: 0023 movs r3, r4 + 80044ba: f7ff ff27 bl 800430c } - 80044b6: 46c0 nop ; (mov r8, r8) - 80044b8: 46bd mov sp, r7 - 80044ba: b002 add sp, #8 - 80044bc: bdb0 pop {r4, r5, r7, pc} + 80044be: 46c0 nop ; (mov r8, r8) + 80044c0: 46bd mov sp, r7 + 80044c2: b002 add sp, #8 + 80044c4: bdb0 pop {r4, r5, r7, pc} ... -080044c0 : +080044c8 : --y; } } //Set font size void ST7793_SetFontSize(uint8_t size) { - 80044c0: b580 push {r7, lr} - 80044c2: b082 sub sp, #8 - 80044c4: af00 add r7, sp, #0 - 80044c6: 0002 movs r2, r0 - 80044c8: 1dfb adds r3, r7, #7 - 80044ca: 701a strb r2, [r3, #0] + 80044c8: b580 push {r7, lr} + 80044ca: b082 sub sp, #8 + 80044cc: af00 add r7, sp, #0 + 80044ce: 0002 movs r2, r0 + 80044d0: 1dfb adds r3, r7, #7 + 80044d2: 701a strb r2, [r3, #0] if (size < 1) { - 80044cc: 1dfb adds r3, r7, #7 - 80044ce: 781b ldrb r3, [r3, #0] - 80044d0: 2b00 cmp r3, #0 - 80044d2: d103 bne.n 80044dc + 80044d4: 1dfb adds r3, r7, #7 + 80044d6: 781b ldrb r3, [r3, #0] + 80044d8: 2b00 cmp r3, #0 + 80044da: d103 bne.n 80044e4 ST7793_FontSize = 1; - 80044d4: 4b09 ldr r3, [pc, #36] ; (80044fc ) - 80044d6: 2201 movs r2, #1 - 80044d8: 701a strb r2, [r3, #0] + 80044dc: 4b09 ldr r3, [pc, #36] ; (8004504 ) + 80044de: 2201 movs r2, #1 + 80044e0: 701a strb r2, [r3, #0] } else if (size > 5) { ST7793_FontSize = 5; } else { ST7793_FontSize = size; } } - 80044da: e00b b.n 80044f4 + 80044e2: e00b b.n 80044fc } else if (size > 5) { - 80044dc: 1dfb adds r3, r7, #7 - 80044de: 781b ldrb r3, [r3, #0] - 80044e0: 2b05 cmp r3, #5 - 80044e2: d903 bls.n 80044ec + 80044e4: 1dfb adds r3, r7, #7 + 80044e6: 781b ldrb r3, [r3, #0] + 80044e8: 2b05 cmp r3, #5 + 80044ea: d903 bls.n 80044f4 ST7793_FontSize = 5; - 80044e4: 4b05 ldr r3, [pc, #20] ; (80044fc ) - 80044e6: 2205 movs r2, #5 - 80044e8: 701a strb r2, [r3, #0] + 80044ec: 4b05 ldr r3, [pc, #20] ; (8004504 ) + 80044ee: 2205 movs r2, #5 + 80044f0: 701a strb r2, [r3, #0] } - 80044ea: e003 b.n 80044f4 + 80044f2: e003 b.n 80044fc ST7793_FontSize = size; - 80044ec: 4b03 ldr r3, [pc, #12] ; (80044fc ) - 80044ee: 1dfa adds r2, r7, #7 - 80044f0: 7812 ldrb r2, [r2, #0] - 80044f2: 701a strb r2, [r3, #0] + 80044f4: 4b03 ldr r3, [pc, #12] ; (8004504 ) + 80044f6: 1dfa adds r2, r7, #7 + 80044f8: 7812 ldrb r2, [r2, #0] + 80044fa: 701a strb r2, [r3, #0] } - 80044f4: 46c0 nop ; (mov r8, r8) - 80044f6: 46bd mov sp, r7 - 80044f8: b002 add sp, #8 - 80044fa: bd80 pop {r7, pc} - 80044fc: 2000003f .word 0x2000003f + 80044fc: 46c0 nop ; (mov r8, r8) + 80044fe: 46bd mov sp, r7 + 8004500: b002 add sp, #8 + 8004502: bd80 pop {r7, pc} + 8004504: 2000003f .word 0x2000003f -08004500 : +08004508 : //Draw a character void ST7793_DrawChar(uint16_t color, uint16_t bgcolor, char c, uint16_t x, uint16_t y) { - 8004500: b5b0 push {r4, r5, r7, lr} - 8004502: b084 sub sp, #16 - 8004504: af00 add r7, sp, #0 - 8004506: 0005 movs r5, r0 - 8004508: 000c movs r4, r1 - 800450a: 0010 movs r0, r2 - 800450c: 0019 movs r1, r3 - 800450e: 1dbb adds r3, r7, #6 - 8004510: 1c2a adds r2, r5, #0 - 8004512: 801a strh r2, [r3, #0] - 8004514: 1d3b adds r3, r7, #4 - 8004516: 1c22 adds r2, r4, #0 - 8004518: 801a strh r2, [r3, #0] - 800451a: 1cfb adds r3, r7, #3 - 800451c: 1c02 adds r2, r0, #0 - 800451e: 701a strb r2, [r3, #0] - 8004520: 003b movs r3, r7 - 8004522: 1c0a adds r2, r1, #0 - 8004524: 801a strh r2, [r3, #0] + 8004508: b5b0 push {r4, r5, r7, lr} + 800450a: b084 sub sp, #16 + 800450c: af00 add r7, sp, #0 + 800450e: 0005 movs r5, r0 + 8004510: 000c movs r4, r1 + 8004512: 0010 movs r0, r2 + 8004514: 0019 movs r1, r3 + 8004516: 1dbb adds r3, r7, #6 + 8004518: 1c2a adds r2, r5, #0 + 800451a: 801a strh r2, [r3, #0] + 800451c: 1d3b adds r3, r7, #4 + 800451e: 1c22 adds r2, r4, #0 + 8004520: 801a strh r2, [r3, #0] + 8004522: 1cfb adds r3, r7, #3 + 8004524: 1c02 adds r2, r0, #0 + 8004526: 701a strb r2, [r3, #0] + 8004528: 003b movs r3, r7 + 800452a: 1c0a adds r2, r1, #0 + 800452c: 801a strh r2, [r3, #0] color = ~color; - 8004526: 1dbb adds r3, r7, #6 - 8004528: 1dba adds r2, r7, #6 - 800452a: 8812 ldrh r2, [r2, #0] - 800452c: 43d2 mvns r2, r2 - 800452e: 801a strh r2, [r3, #0] + 800452e: 1dbb adds r3, r7, #6 + 8004530: 1dba adds r2, r7, #6 + 8004532: 8812 ldrh r2, [r2, #0] + 8004534: 43d2 mvns r2, r2 + 8004536: 801a strh r2, [r3, #0] bgcolor = ~bgcolor; - 8004530: 1d3b adds r3, r7, #4 - 8004532: 1d3a adds r2, r7, #4 - 8004534: 8812 ldrh r2, [r2, #0] - 8004536: 43d2 mvns r2, r2 - 8004538: 801a strh r2, [r3, #0] + 8004538: 1d3b adds r3, r7, #4 + 800453a: 1d3a adds r2, r7, #4 + 800453c: 8812 ldrh r2, [r2, #0] + 800453e: 43d2 mvns r2, r2 + 8004540: 801a strh r2, [r3, #0] char h, ch, p, mask, sh, sw; //Set screen window and start coordinates ST7793_SendCommand(0x210,y); - 800453a: 2420 movs r4, #32 - 800453c: 193b adds r3, r7, r4 - 800453e: 881a ldrh r2, [r3, #0] - 8004540: 2384 movs r3, #132 ; 0x84 - 8004542: 009b lsls r3, r3, #2 - 8004544: 0011 movs r1, r2 - 8004546: 0018 movs r0, r3 - 8004548: f7ff fbf4 bl 8003d34 + 8004542: 2420 movs r4, #32 + 8004544: 193b adds r3, r7, r4 + 8004546: 881a ldrh r2, [r3, #0] + 8004548: 2384 movs r3, #132 ; 0x84 + 800454a: 009b lsls r3, r3, #2 + 800454c: 0011 movs r1, r2 + 800454e: 0018 movs r0, r3 + 8004550: f7ff fbf4 bl 8003d3c ST7793_SendCommand(0x211,y+ST7793_CHAR_H*ST7793_FontSize+ST7793_FontSize-1); - 800454c: 4b70 ldr r3, [pc, #448] ; (8004710 ) - 800454e: 781b ldrb r3, [r3, #0] - 8004550: b29b uxth r3, r3 - 8004552: 220c movs r2, #12 - 8004554: 4353 muls r3, r2 - 8004556: b29a uxth r2, r3 - 8004558: 193b adds r3, r7, r4 - 800455a: 881b ldrh r3, [r3, #0] - 800455c: 18d3 adds r3, r2, r3 + 8004554: 4b70 ldr r3, [pc, #448] ; (8004718 ) + 8004556: 781b ldrb r3, [r3, #0] + 8004558: b29b uxth r3, r3 + 800455a: 220c movs r2, #12 + 800455c: 4353 muls r3, r2 800455e: b29a uxth r2, r3 - 8004560: 4b6b ldr r3, [pc, #428] ; (8004710 ) - 8004562: 781b ldrb r3, [r3, #0] - 8004564: b29b uxth r3, r3 - 8004566: 18d3 adds r3, r2, r3 - 8004568: b29b uxth r3, r3 - 800456a: 3b01 subs r3, #1 + 8004560: 193b adds r3, r7, r4 + 8004562: 881b ldrh r3, [r3, #0] + 8004564: 18d3 adds r3, r2, r3 + 8004566: b29a uxth r2, r3 + 8004568: 4b6b ldr r3, [pc, #428] ; (8004718 ) + 800456a: 781b ldrb r3, [r3, #0] 800456c: b29b uxth r3, r3 - 800456e: 4a69 ldr r2, [pc, #420] ; (8004714 ) - 8004570: 0019 movs r1, r3 - 8004572: 0010 movs r0, r2 - 8004574: f7ff fbde bl 8003d34 + 800456e: 18d3 adds r3, r2, r3 + 8004570: b29b uxth r3, r3 + 8004572: 3b01 subs r3, #1 + 8004574: b29b uxth r3, r3 + 8004576: 4a69 ldr r2, [pc, #420] ; (800471c ) + 8004578: 0019 movs r1, r3 + 800457a: 0010 movs r0, r2 + 800457c: f7ff fbde bl 8003d3c ST7793_SendCommand(0x212,x); - 8004578: 003b movs r3, r7 - 800457a: 881b ldrh r3, [r3, #0] - 800457c: 4a66 ldr r2, [pc, #408] ; (8004718 ) - 800457e: 0019 movs r1, r3 - 8004580: 0010 movs r0, r2 - 8004582: f7ff fbd7 bl 8003d34 + 8004580: 003b movs r3, r7 + 8004582: 881b ldrh r3, [r3, #0] + 8004584: 4a66 ldr r2, [pc, #408] ; (8004720 ) + 8004586: 0019 movs r1, r3 + 8004588: 0010 movs r0, r2 + 800458a: f7ff fbd7 bl 8003d3c ST7793_SendCommand(0x213,x+(ST7793_CHAR_W-1)*ST7793_FontSize+ST7793_FontSize-1); - 8004586: 4b62 ldr r3, [pc, #392] ; (8004710 ) - 8004588: 781b ldrb r3, [r3, #0] - 800458a: b29b uxth r3, r3 - 800458c: 1c1a adds r2, r3, #0 - 800458e: 00d2 lsls r2, r2, #3 - 8004590: 1ad3 subs r3, r2, r3 - 8004592: b29a uxth r2, r3 - 8004594: 003b movs r3, r7 - 8004596: 881b ldrh r3, [r3, #0] - 8004598: 18d3 adds r3, r2, r3 + 800458e: 4b62 ldr r3, [pc, #392] ; (8004718 ) + 8004590: 781b ldrb r3, [r3, #0] + 8004592: b29b uxth r3, r3 + 8004594: 1c1a adds r2, r3, #0 + 8004596: 00d2 lsls r2, r2, #3 + 8004598: 1ad3 subs r3, r2, r3 800459a: b29a uxth r2, r3 - 800459c: 4b5c ldr r3, [pc, #368] ; (8004710 ) - 800459e: 781b ldrb r3, [r3, #0] - 80045a0: b29b uxth r3, r3 - 80045a2: 18d3 adds r3, r2, r3 - 80045a4: b29b uxth r3, r3 - 80045a6: 3b01 subs r3, #1 + 800459c: 003b movs r3, r7 + 800459e: 881b ldrh r3, [r3, #0] + 80045a0: 18d3 adds r3, r2, r3 + 80045a2: b29a uxth r2, r3 + 80045a4: 4b5c ldr r3, [pc, #368] ; (8004718 ) + 80045a6: 781b ldrb r3, [r3, #0] 80045a8: b29b uxth r3, r3 - 80045aa: 4a5c ldr r2, [pc, #368] ; (800471c ) - 80045ac: 0019 movs r1, r3 - 80045ae: 0010 movs r0, r2 - 80045b0: f7ff fbc0 bl 8003d34 + 80045aa: 18d3 adds r3, r2, r3 + 80045ac: b29b uxth r3, r3 + 80045ae: 3b01 subs r3, #1 + 80045b0: b29b uxth r3, r3 + 80045b2: 4a5c ldr r2, [pc, #368] ; (8004724 ) + 80045b4: 0019 movs r1, r3 + 80045b6: 0010 movs r0, r2 + 80045b8: f7ff fbc0 bl 8003d3c ST7793_SendCommand(0x200,y); - 80045b4: 193b adds r3, r7, r4 - 80045b6: 881a ldrh r2, [r3, #0] - 80045b8: 2380 movs r3, #128 ; 0x80 - 80045ba: 009b lsls r3, r3, #2 - 80045bc: 0011 movs r1, r2 - 80045be: 0018 movs r0, r3 - 80045c0: f7ff fbb8 bl 8003d34 + 80045bc: 193b adds r3, r7, r4 + 80045be: 881a ldrh r2, [r3, #0] + 80045c0: 2380 movs r3, #128 ; 0x80 + 80045c2: 009b lsls r3, r3, #2 + 80045c4: 0011 movs r1, r2 + 80045c6: 0018 movs r0, r3 + 80045c8: f7ff fbb8 bl 8003d3c ST7793_SendCommand(0x201,x); - 80045c4: 003b movs r3, r7 - 80045c6: 881b ldrh r3, [r3, #0] - 80045c8: 4a55 ldr r2, [pc, #340] ; (8004720 ) - 80045ca: 0019 movs r1, r3 - 80045cc: 0010 movs r0, r2 - 80045ce: f7ff fbb1 bl 8003d34 + 80045cc: 003b movs r3, r7 + 80045ce: 881b ldrh r3, [r3, #0] + 80045d0: 4a55 ldr r2, [pc, #340] ; (8004728 ) + 80045d2: 0019 movs r1, r3 + 80045d4: 0010 movs r0, r2 + 80045d6: f7ff fbb1 bl 8003d3c ST7793_COMMAND; //RS pin to command mode - 80045d2: 4b54 ldr r3, [pc, #336] ; (8004724 ) - 80045d4: 2200 movs r2, #0 - 80045d6: 2101 movs r1, #1 - 80045d8: 0018 movs r0, r3 - 80045da: f002 ffe3 bl 80075a4 + 80045da: 4b54 ldr r3, [pc, #336] ; (800472c ) + 80045dc: 2200 movs r2, #0 + 80045de: 2101 movs r1, #1 + 80045e0: 0018 movs r0, r3 + 80045e2: f003 f923 bl 800782c ST7793_Write8(0x02); //send a command 0x0202 8 MSB first - 80045de: 2002 movs r0, #2 - 80045e0: f7ff fb20 bl 8003c24 + 80045e6: 2002 movs r0, #2 + 80045e8: f7ff fb20 bl 8003c2c ST7793_WR_PULSE; //Pulse on the WR pin to send the same 8bits as LSB of the command - 80045e4: 4b4f ldr r3, [pc, #316] ; (8004724 ) - 80045e6: 2200 movs r2, #0 - 80045e8: 2102 movs r1, #2 - 80045ea: 0018 movs r0, r3 - 80045ec: f002 ffda bl 80075a4 - 80045f0: 4b4c ldr r3, [pc, #304] ; (8004724 ) - 80045f2: 2201 movs r2, #1 - 80045f4: 2102 movs r1, #2 - 80045f6: 0018 movs r0, r3 - 80045f8: f002 ffd4 bl 80075a4 + 80045ec: 4b4f ldr r3, [pc, #316] ; (800472c ) + 80045ee: 2200 movs r2, #0 + 80045f0: 2102 movs r1, #2 + 80045f2: 0018 movs r0, r3 + 80045f4: f003 f91a bl 800782c + 80045f8: 4b4c ldr r3, [pc, #304] ; (800472c ) + 80045fa: 2201 movs r2, #1 + 80045fc: 2102 movs r1, #2 + 80045fe: 0018 movs r0, r3 + 8004600: f003 f914 bl 800782c for (h=0; h<=ST7793_CHAR_H; h++) { - 80045fc: 230f movs r3, #15 - 80045fe: 18fb adds r3, r7, r3 - 8004600: 2200 movs r2, #0 - 8004602: 701a strb r2, [r3, #0] - 8004604: e079 b.n 80046fa + 8004604: 230f movs r3, #15 + 8004606: 18fb adds r3, r7, r3 + 8004608: 2200 movs r2, #0 + 800460a: 701a strb r2, [r3, #0] + 800460c: e079 b.n 8004702 ch = ascii_tab[(unsigned char)c][(unsigned char)h]; - 8004606: 1cfb adds r3, r7, #3 - 8004608: 781a ldrb r2, [r3, #0] - 800460a: 230f movs r3, #15 - 800460c: 18fb adds r3, r7, r3 - 800460e: 7818 ldrb r0, [r3, #0] - 8004610: 230a movs r3, #10 - 8004612: 18f9 adds r1, r7, r3 - 8004614: 4c44 ldr r4, [pc, #272] ; (8004728 ) - 8004616: 0013 movs r3, r2 - 8004618: 00db lsls r3, r3, #3 - 800461a: 1a9b subs r3, r3, r2 - 800461c: 005b lsls r3, r3, #1 - 800461e: 18e3 adds r3, r4, r3 - 8004620: 5c1b ldrb r3, [r3, r0] - 8004622: 700b strb r3, [r1, #0] + 800460e: 1cfb adds r3, r7, #3 + 8004610: 781a ldrb r2, [r3, #0] + 8004612: 230f movs r3, #15 + 8004614: 18fb adds r3, r7, r3 + 8004616: 7818 ldrb r0, [r3, #0] + 8004618: 230a movs r3, #10 + 800461a: 18f9 adds r1, r7, r3 + 800461c: 4c44 ldr r4, [pc, #272] ; (8004730 ) + 800461e: 0013 movs r3, r2 + 8004620: 00db lsls r3, r3, #3 + 8004622: 1a9b subs r3, r3, r2 + 8004624: 005b lsls r3, r3, #1 + 8004626: 18e3 adds r3, r4, r3 + 8004628: 5c1b ldrb r3, [r3, r0] + 800462a: 700b strb r3, [r1, #0] for (sh=0; sh + 800462c: 230c movs r3, #12 + 800462e: 18fb adds r3, r7, r3 + 8004630: 2200 movs r2, #0 + 8004632: 701a strb r2, [r3, #0] + 8004634: e058 b.n 80046e8 mask = 0x80; - 800462e: 230d movs r3, #13 - 8004630: 18fb adds r3, r7, r3 - 8004632: 2280 movs r2, #128 ; 0x80 - 8004634: 701a strb r2, [r3, #0] - for (p=ST7793_CHAR_W; p>0; p--) { - 8004636: 230e movs r3, #14 + 8004636: 230d movs r3, #13 8004638: 18fb adds r3, r7, r3 - 800463a: 2208 movs r2, #8 + 800463a: 2280 movs r2, #128 ; 0x80 800463c: 701a strb r2, [r3, #0] - 800463e: e044 b.n 80046ca + for (p=ST7793_CHAR_W; p>0; p--) { + 800463e: 230e movs r3, #14 + 8004640: 18fb adds r3, r7, r3 + 8004642: 2208 movs r2, #8 + 8004644: 701a strb r2, [r3, #0] + 8004646: e044 b.n 80046d2 if (ch & mask) { - 8004640: 230a movs r3, #10 - 8004642: 18fb adds r3, r7, r3 - 8004644: 220d movs r2, #13 - 8004646: 18ba adds r2, r7, r2 - 8004648: 781b ldrb r3, [r3, #0] - 800464a: 7812 ldrb r2, [r2, #0] - 800464c: 4013 ands r3, r2 - 800464e: b2db uxtb r3, r3 - 8004650: 2b00 cmp r3, #0 - 8004652: d017 beq.n 8004684 + 8004648: 230a movs r3, #10 + 800464a: 18fb adds r3, r7, r3 + 800464c: 220d movs r2, #13 + 800464e: 18ba adds r2, r7, r2 + 8004650: 781b ldrb r3, [r3, #0] + 8004652: 7812 ldrb r2, [r2, #0] + 8004654: 4013 ands r3, r2 + 8004656: b2db uxtb r3, r3 + 8004658: 2b00 cmp r3, #0 + 800465a: d017 beq.n 800468c for (sw=0; sw - 800465e: 1dbb adds r3, r7, #6 - 8004660: 881b ldrh r3, [r3, #0] - 8004662: 0018 movs r0, r3 - 8004664: f7ff fb48 bl 8003cf8 - 8004668: 210b movs r1, #11 - 800466a: 187b adds r3, r7, r1 - 800466c: 781a ldrb r2, [r3, #0] - 800466e: 187b adds r3, r7, r1 - 8004670: 3201 adds r2, #1 - 8004672: 701a strb r2, [r3, #0] - 8004674: 4b26 ldr r3, [pc, #152] ; (8004710 ) - 8004676: 781b ldrb r3, [r3, #0] - 8004678: 220b movs r2, #11 - 800467a: 18ba adds r2, r7, r2 - 800467c: 7812 ldrb r2, [r2, #0] - 800467e: 429a cmp r2, r3 - 8004680: d3ed bcc.n 800465e - 8004682: e016 b.n 80046b2 + 800465c: 230b movs r3, #11 + 800465e: 18fb adds r3, r7, r3 + 8004660: 2200 movs r2, #0 + 8004662: 701a strb r2, [r3, #0] + 8004664: e00a b.n 800467c + 8004666: 1dbb adds r3, r7, #6 + 8004668: 881b ldrh r3, [r3, #0] + 800466a: 0018 movs r0, r3 + 800466c: f7ff fb48 bl 8003d00 + 8004670: 210b movs r1, #11 + 8004672: 187b adds r3, r7, r1 + 8004674: 781a ldrb r2, [r3, #0] + 8004676: 187b adds r3, r7, r1 + 8004678: 3201 adds r2, #1 + 800467a: 701a strb r2, [r3, #0] + 800467c: 4b26 ldr r3, [pc, #152] ; (8004718 ) + 800467e: 781b ldrb r3, [r3, #0] + 8004680: 220b movs r2, #11 + 8004682: 18ba adds r2, r7, r2 + 8004684: 7812 ldrb r2, [r2, #0] + 8004686: 429a cmp r2, r3 + 8004688: d3ed bcc.n 8004666 + 800468a: e016 b.n 80046ba } else { for (sw=0; sw - 800468e: 1d3b adds r3, r7, #4 - 8004690: 881b ldrh r3, [r3, #0] - 8004692: 0018 movs r0, r3 - 8004694: f7ff fb30 bl 8003cf8 - 8004698: 210b movs r1, #11 - 800469a: 187b adds r3, r7, r1 - 800469c: 781a ldrb r2, [r3, #0] - 800469e: 187b adds r3, r7, r1 - 80046a0: 3201 adds r2, #1 - 80046a2: 701a strb r2, [r3, #0] - 80046a4: 4b1a ldr r3, [pc, #104] ; (8004710 ) - 80046a6: 781b ldrb r3, [r3, #0] - 80046a8: 220b movs r2, #11 - 80046aa: 18ba adds r2, r7, r2 - 80046ac: 7812 ldrb r2, [r2, #0] - 80046ae: 429a cmp r2, r3 - 80046b0: d3ed bcc.n 800468e + 800468c: 230b movs r3, #11 + 800468e: 18fb adds r3, r7, r3 + 8004690: 2200 movs r2, #0 + 8004692: 701a strb r2, [r3, #0] + 8004694: e00a b.n 80046ac + 8004696: 1d3b adds r3, r7, #4 + 8004698: 881b ldrh r3, [r3, #0] + 800469a: 0018 movs r0, r3 + 800469c: f7ff fb30 bl 8003d00 + 80046a0: 210b movs r1, #11 + 80046a2: 187b adds r3, r7, r1 + 80046a4: 781a ldrb r2, [r3, #0] + 80046a6: 187b adds r3, r7, r1 + 80046a8: 3201 adds r2, #1 + 80046aa: 701a strb r2, [r3, #0] + 80046ac: 4b1a ldr r3, [pc, #104] ; (8004718 ) + 80046ae: 781b ldrb r3, [r3, #0] + 80046b0: 220b movs r2, #11 + 80046b2: 18ba adds r2, r7, r2 + 80046b4: 7812 ldrb r2, [r2, #0] + 80046b6: 429a cmp r2, r3 + 80046b8: d3ed bcc.n 8004696 } mask = mask >> 1; - 80046b2: 220d movs r2, #13 - 80046b4: 18bb adds r3, r7, r2 - 80046b6: 18ba adds r2, r7, r2 - 80046b8: 7812 ldrb r2, [r2, #0] - 80046ba: 0852 lsrs r2, r2, #1 - 80046bc: 701a strb r2, [r3, #0] + 80046ba: 220d movs r2, #13 + 80046bc: 18bb adds r3, r7, r2 + 80046be: 18ba adds r2, r7, r2 + 80046c0: 7812 ldrb r2, [r2, #0] + 80046c2: 0852 lsrs r2, r2, #1 + 80046c4: 701a strb r2, [r3, #0] for (p=ST7793_CHAR_W; p>0; p--) { - 80046be: 210e movs r1, #14 - 80046c0: 187b adds r3, r7, r1 - 80046c2: 781a ldrb r2, [r3, #0] - 80046c4: 187b adds r3, r7, r1 - 80046c6: 3a01 subs r2, #1 - 80046c8: 701a strb r2, [r3, #0] - 80046ca: 230e movs r3, #14 - 80046cc: 18fb adds r3, r7, r3 - 80046ce: 781b ldrb r3, [r3, #0] - 80046d0: 2b00 cmp r3, #0 - 80046d2: d1b5 bne.n 8004640 + 80046c6: 210e movs r1, #14 + 80046c8: 187b adds r3, r7, r1 + 80046ca: 781a ldrb r2, [r3, #0] + 80046cc: 187b adds r3, r7, r1 + 80046ce: 3a01 subs r2, #1 + 80046d0: 701a strb r2, [r3, #0] + 80046d2: 230e movs r3, #14 + 80046d4: 18fb adds r3, r7, r3 + 80046d6: 781b ldrb r3, [r3, #0] + 80046d8: 2b00 cmp r3, #0 + 80046da: d1b5 bne.n 8004648 for (sh=0; sh) - 80046e2: 781b ldrb r3, [r3, #0] - 80046e4: 220c movs r2, #12 - 80046e6: 18ba adds r2, r7, r2 - 80046e8: 7812 ldrb r2, [r2, #0] - 80046ea: 429a cmp r2, r3 - 80046ec: d39f bcc.n 800462e + 80046dc: 210c movs r1, #12 + 80046de: 187b adds r3, r7, r1 + 80046e0: 781a ldrb r2, [r3, #0] + 80046e2: 187b adds r3, r7, r1 + 80046e4: 3201 adds r2, #1 + 80046e6: 701a strb r2, [r3, #0] + 80046e8: 4b0b ldr r3, [pc, #44] ; (8004718 ) + 80046ea: 781b ldrb r3, [r3, #0] + 80046ec: 220c movs r2, #12 + 80046ee: 18ba adds r2, r7, r2 + 80046f0: 7812 ldrb r2, [r2, #0] + 80046f2: 429a cmp r2, r3 + 80046f4: d39f bcc.n 8004636 for (h=0; h<=ST7793_CHAR_H; h++) { - 80046ee: 210f movs r1, #15 - 80046f0: 187b adds r3, r7, r1 - 80046f2: 781a ldrb r2, [r3, #0] - 80046f4: 187b adds r3, r7, r1 - 80046f6: 3201 adds r2, #1 - 80046f8: 701a strb r2, [r3, #0] - 80046fa: 230f movs r3, #15 - 80046fc: 18fb adds r3, r7, r3 - 80046fe: 781b ldrb r3, [r3, #0] - 8004700: 2b0c cmp r3, #12 - 8004702: d800 bhi.n 8004706 - 8004704: e77f b.n 8004606 + 80046f6: 210f movs r1, #15 + 80046f8: 187b adds r3, r7, r1 + 80046fa: 781a ldrb r2, [r3, #0] + 80046fc: 187b adds r3, r7, r1 + 80046fe: 3201 adds r2, #1 + 8004700: 701a strb r2, [r3, #0] + 8004702: 230f movs r3, #15 + 8004704: 18fb adds r3, r7, r3 + 8004706: 781b ldrb r3, [r3, #0] + 8004708: 2b0c cmp r3, #12 + 800470a: d800 bhi.n 800470e + 800470c: e77f b.n 800460e } } } } - 8004706: 46c0 nop ; (mov r8, r8) - 8004708: 46c0 nop ; (mov r8, r8) - 800470a: 46bd mov sp, r7 - 800470c: b004 add sp, #16 - 800470e: bdb0 pop {r4, r5, r7, pc} - 8004710: 2000003f .word 0x2000003f - 8004714: 00000211 .word 0x00000211 - 8004718: 00000212 .word 0x00000212 - 800471c: 00000213 .word 0x00000213 - 8004720: 00000201 .word 0x00000201 - 8004724: 50000400 .word 0x50000400 - 8004728: 0800f3d8 .word 0x0800f3d8 + 800470e: 46c0 nop ; (mov r8, r8) + 8004710: 46c0 nop ; (mov r8, r8) + 8004712: 46bd mov sp, r7 + 8004714: b004 add sp, #16 + 8004716: bdb0 pop {r4, r5, r7, pc} + 8004718: 2000003f .word 0x2000003f + 800471c: 00000211 .word 0x00000211 + 8004720: 00000212 .word 0x00000212 + 8004724: 00000213 .word 0x00000213 + 8004728: 00000201 .word 0x00000201 + 800472c: 50000400 .word 0x50000400 + 8004730: 08010018 .word 0x08010018 -0800472c : +08004734 : //Draw a thin number character void ST7793_DrawTNChar(uint16_t color, uint16_t bgcolor, char c, uint16_t x, uint16_t y) { - 800472c: b5b0 push {r4, r5, r7, lr} - 800472e: b084 sub sp, #16 - 8004730: af00 add r7, sp, #0 - 8004732: 0005 movs r5, r0 - 8004734: 000c movs r4, r1 - 8004736: 0010 movs r0, r2 - 8004738: 0019 movs r1, r3 - 800473a: 1dbb adds r3, r7, #6 - 800473c: 1c2a adds r2, r5, #0 - 800473e: 801a strh r2, [r3, #0] - 8004740: 1d3b adds r3, r7, #4 - 8004742: 1c22 adds r2, r4, #0 - 8004744: 801a strh r2, [r3, #0] - 8004746: 1cfb adds r3, r7, #3 - 8004748: 1c02 adds r2, r0, #0 - 800474a: 701a strb r2, [r3, #0] - 800474c: 003b movs r3, r7 - 800474e: 1c0a adds r2, r1, #0 - 8004750: 801a strh r2, [r3, #0] + 8004734: b5b0 push {r4, r5, r7, lr} + 8004736: b084 sub sp, #16 + 8004738: af00 add r7, sp, #0 + 800473a: 0005 movs r5, r0 + 800473c: 000c movs r4, r1 + 800473e: 0010 movs r0, r2 + 8004740: 0019 movs r1, r3 + 8004742: 1dbb adds r3, r7, #6 + 8004744: 1c2a adds r2, r5, #0 + 8004746: 801a strh r2, [r3, #0] + 8004748: 1d3b adds r3, r7, #4 + 800474a: 1c22 adds r2, r4, #0 + 800474c: 801a strh r2, [r3, #0] + 800474e: 1cfb adds r3, r7, #3 + 8004750: 1c02 adds r2, r0, #0 + 8004752: 701a strb r2, [r3, #0] + 8004754: 003b movs r3, r7 + 8004756: 1c0a adds r2, r1, #0 + 8004758: 801a strh r2, [r3, #0] uint8_t i, j, b, idx; if ( (c < 0x30 || c > 0x39) && c != 0x2E && c != 0xB0 && c != 0x73 ) return; // only numbers, dot and degree sign - 8004752: 1cfb adds r3, r7, #3 - 8004754: 781b ldrb r3, [r3, #0] - 8004756: 2b2f cmp r3, #47 ; 0x2f - 8004758: d903 bls.n 8004762 800475a: 1cfb adds r3, r7, #3 800475c: 781b ldrb r3, [r3, #0] - 800475e: 2b39 cmp r3, #57 ; 0x39 - 8004760: d90c bls.n 800477c + 800475e: 2b2f cmp r3, #47 ; 0x2f + 8004760: d903 bls.n 800476a 8004762: 1cfb adds r3, r7, #3 8004764: 781b ldrb r3, [r3, #0] - 8004766: 2b2e cmp r3, #46 ; 0x2e - 8004768: d008 beq.n 800477c + 8004766: 2b39 cmp r3, #57 ; 0x39 + 8004768: d90c bls.n 8004784 800476a: 1cfb adds r3, r7, #3 800476c: 781b ldrb r3, [r3, #0] - 800476e: 2bb0 cmp r3, #176 ; 0xb0 - 8004770: d004 beq.n 800477c + 800476e: 2b2e cmp r3, #46 ; 0x2e + 8004770: d008 beq.n 8004784 8004772: 1cfb adds r3, r7, #3 8004774: 781b ldrb r3, [r3, #0] - 8004776: 2b73 cmp r3, #115 ; 0x73 - 8004778: d000 beq.n 800477c - 800477a: e0b3 b.n 80048e4 + 8004776: 2bb0 cmp r3, #176 ; 0xb0 + 8004778: d004 beq.n 8004784 + 800477a: 1cfb adds r3, r7, #3 + 800477c: 781b ldrb r3, [r3, #0] + 800477e: 2b73 cmp r3, #115 ; 0x73 + 8004780: d000 beq.n 8004784 + 8004782: e0b3 b.n 80048ec switch (c) { - 800477c: 1cfb adds r3, r7, #3 - 800477e: 781b ldrb r3, [r3, #0] - 8004780: 2bb0 cmp r3, #176 ; 0xb0 - 8004782: d00a beq.n 800479a - 8004784: dc13 bgt.n 80047ae - 8004786: 2b2e cmp r3, #46 ; 0x2e - 8004788: d002 beq.n 8004790 - 800478a: 2b73 cmp r3, #115 ; 0x73 - 800478c: d00a beq.n 80047a4 - 800478e: e00e b.n 80047ae + 8004784: 1cfb adds r3, r7, #3 + 8004786: 781b ldrb r3, [r3, #0] + 8004788: 2bb0 cmp r3, #176 ; 0xb0 + 800478a: d00a beq.n 80047a2 + 800478c: dc13 bgt.n 80047b6 + 800478e: 2b2e cmp r3, #46 ; 0x2e + 8004790: d002 beq.n 8004798 + 8004792: 2b73 cmp r3, #115 ; 0x73 + 8004794: d00a beq.n 80047ac + 8004796: e00e b.n 80047b6 case 0x2E: // . idx = 10; - 8004790: 230d movs r3, #13 - 8004792: 18fb adds r3, r7, r3 - 8004794: 220a movs r2, #10 - 8004796: 701a strb r2, [r3, #0] + 8004798: 230d movs r3, #13 + 800479a: 18fb adds r3, r7, r3 + 800479c: 220a movs r2, #10 + 800479e: 701a strb r2, [r3, #0] break; - 8004798: e010 b.n 80047bc + 80047a0: e010 b.n 80047c4 case 0xB0: // ° idx = 11; - 800479a: 230d movs r3, #13 - 800479c: 18fb adds r3, r7, r3 - 800479e: 220b movs r2, #11 - 80047a0: 701a strb r2, [r3, #0] + 80047a2: 230d movs r3, #13 + 80047a4: 18fb adds r3, r7, r3 + 80047a6: 220b movs r2, #11 + 80047a8: 701a strb r2, [r3, #0] break; - 80047a2: e00b b.n 80047bc + 80047aa: e00b b.n 80047c4 case 0x73: // s idx = 12; - 80047a4: 230d movs r3, #13 - 80047a6: 18fb adds r3, r7, r3 - 80047a8: 220c movs r2, #12 - 80047aa: 701a strb r2, [r3, #0] + 80047ac: 230d movs r3, #13 + 80047ae: 18fb adds r3, r7, r3 + 80047b0: 220c movs r2, #12 + 80047b2: 701a strb r2, [r3, #0] break; - 80047ac: e006 b.n 80047bc + 80047b4: e006 b.n 80047c4 default: // 0-9 idx = c - 0x30; - 80047ae: 230d movs r3, #13 - 80047b0: 18fb adds r3, r7, r3 - 80047b2: 1cfa adds r2, r7, #3 - 80047b4: 7812 ldrb r2, [r2, #0] - 80047b6: 3a30 subs r2, #48 ; 0x30 - 80047b8: 701a strb r2, [r3, #0] + 80047b6: 230d movs r3, #13 + 80047b8: 18fb adds r3, r7, r3 + 80047ba: 1cfa adds r2, r7, #3 + 80047bc: 7812 ldrb r2, [r2, #0] + 80047be: 3a30 subs r2, #48 ; 0x30 + 80047c0: 701a strb r2, [r3, #0] break; - 80047ba: 46c0 nop ; (mov r8, r8) + 80047c2: 46c0 nop ; (mov r8, r8) } color = ~color; - 80047bc: 1dbb adds r3, r7, #6 - 80047be: 1dba adds r2, r7, #6 - 80047c0: 8812 ldrh r2, [r2, #0] - 80047c2: 43d2 mvns r2, r2 - 80047c4: 801a strh r2, [r3, #0] + 80047c4: 1dbb adds r3, r7, #6 + 80047c6: 1dba adds r2, r7, #6 + 80047c8: 8812 ldrh r2, [r2, #0] + 80047ca: 43d2 mvns r2, r2 + 80047cc: 801a strh r2, [r3, #0] bgcolor = ~bgcolor; - 80047c6: 1d3b adds r3, r7, #4 - 80047c8: 1d3a adds r2, r7, #4 - 80047ca: 8812 ldrh r2, [r2, #0] - 80047cc: 43d2 mvns r2, r2 - 80047ce: 801a strh r2, [r3, #0] + 80047ce: 1d3b adds r3, r7, #4 + 80047d0: 1d3a adds r2, r7, #4 + 80047d2: 8812 ldrh r2, [r2, #0] + 80047d4: 43d2 mvns r2, r2 + 80047d6: 801a strh r2, [r3, #0] //Set screen window and start coordinates ST7793_SendCommand(0x210,y); - 80047d0: 2420 movs r4, #32 - 80047d2: 193b adds r3, r7, r4 - 80047d4: 881a ldrh r2, [r3, #0] - 80047d6: 2384 movs r3, #132 ; 0x84 - 80047d8: 009b lsls r3, r3, #2 - 80047da: 0011 movs r1, r2 - 80047dc: 0018 movs r0, r3 - 80047de: f7ff faa9 bl 8003d34 + 80047d8: 2420 movs r4, #32 + 80047da: 193b adds r3, r7, r4 + 80047dc: 881a ldrh r2, [r3, #0] + 80047de: 2384 movs r3, #132 ; 0x84 + 80047e0: 009b lsls r3, r3, #2 + 80047e2: 0011 movs r1, r2 + 80047e4: 0018 movs r0, r3 + 80047e6: f7ff faa9 bl 8003d3c ST7793_SendCommand(0x211,y+7); - 80047e2: 193b adds r3, r7, r4 - 80047e4: 881b ldrh r3, [r3, #0] - 80047e6: 3307 adds r3, #7 - 80047e8: b29b uxth r3, r3 - 80047ea: 4a40 ldr r2, [pc, #256] ; (80048ec ) - 80047ec: 0019 movs r1, r3 - 80047ee: 0010 movs r0, r2 - 80047f0: f7ff faa0 bl 8003d34 + 80047ea: 193b adds r3, r7, r4 + 80047ec: 881b ldrh r3, [r3, #0] + 80047ee: 3307 adds r3, #7 + 80047f0: b29b uxth r3, r3 + 80047f2: 4a40 ldr r2, [pc, #256] ; (80048f4 ) + 80047f4: 0019 movs r1, r3 + 80047f6: 0010 movs r0, r2 + 80047f8: f7ff faa0 bl 8003d3c ST7793_SendCommand(0x212,x); - 80047f4: 003b movs r3, r7 - 80047f6: 881b ldrh r3, [r3, #0] - 80047f8: 4a3d ldr r2, [pc, #244] ; (80048f0 ) - 80047fa: 0019 movs r1, r3 - 80047fc: 0010 movs r0, r2 - 80047fe: f7ff fa99 bl 8003d34 + 80047fc: 003b movs r3, r7 + 80047fe: 881b ldrh r3, [r3, #0] + 8004800: 4a3d ldr r2, [pc, #244] ; (80048f8 ) + 8004802: 0019 movs r1, r3 + 8004804: 0010 movs r0, r2 + 8004806: f7ff fa99 bl 8003d3c ST7793_SendCommand(0x213,x+5); - 8004802: 003b movs r3, r7 - 8004804: 881b ldrh r3, [r3, #0] - 8004806: 3305 adds r3, #5 - 8004808: b29b uxth r3, r3 - 800480a: 4a3a ldr r2, [pc, #232] ; (80048f4 ) - 800480c: 0019 movs r1, r3 - 800480e: 0010 movs r0, r2 - 8004810: f7ff fa90 bl 8003d34 + 800480a: 003b movs r3, r7 + 800480c: 881b ldrh r3, [r3, #0] + 800480e: 3305 adds r3, #5 + 8004810: b29b uxth r3, r3 + 8004812: 4a3a ldr r2, [pc, #232] ; (80048fc ) + 8004814: 0019 movs r1, r3 + 8004816: 0010 movs r0, r2 + 8004818: f7ff fa90 bl 8003d3c ST7793_SendCommand(0x200,y); - 8004814: 193b adds r3, r7, r4 - 8004816: 881a ldrh r2, [r3, #0] - 8004818: 2380 movs r3, #128 ; 0x80 - 800481a: 009b lsls r3, r3, #2 - 800481c: 0011 movs r1, r2 - 800481e: 0018 movs r0, r3 - 8004820: f7ff fa88 bl 8003d34 + 800481c: 193b adds r3, r7, r4 + 800481e: 881a ldrh r2, [r3, #0] + 8004820: 2380 movs r3, #128 ; 0x80 + 8004822: 009b lsls r3, r3, #2 + 8004824: 0011 movs r1, r2 + 8004826: 0018 movs r0, r3 + 8004828: f7ff fa88 bl 8003d3c ST7793_SendCommand(0x201,x); - 8004824: 003b movs r3, r7 - 8004826: 881b ldrh r3, [r3, #0] - 8004828: 4a33 ldr r2, [pc, #204] ; (80048f8 ) - 800482a: 0019 movs r1, r3 - 800482c: 0010 movs r0, r2 - 800482e: f7ff fa81 bl 8003d34 + 800482c: 003b movs r3, r7 + 800482e: 881b ldrh r3, [r3, #0] + 8004830: 4a33 ldr r2, [pc, #204] ; (8004900 ) + 8004832: 0019 movs r1, r3 + 8004834: 0010 movs r0, r2 + 8004836: f7ff fa81 bl 8003d3c ST7793_COMMAND; //RS pin to command mode - 8004832: 4b32 ldr r3, [pc, #200] ; (80048fc ) - 8004834: 2200 movs r2, #0 - 8004836: 2101 movs r1, #1 - 8004838: 0018 movs r0, r3 - 800483a: f002 feb3 bl 80075a4 + 800483a: 4b32 ldr r3, [pc, #200] ; (8004904 ) + 800483c: 2200 movs r2, #0 + 800483e: 2101 movs r1, #1 + 8004840: 0018 movs r0, r3 + 8004842: f002 fff3 bl 800782c ST7793_Write8(0x02); //send a command 0x0202 8 MSB first - 800483e: 2002 movs r0, #2 - 8004840: f7ff f9f0 bl 8003c24 + 8004846: 2002 movs r0, #2 + 8004848: f7ff f9f0 bl 8003c2c ST7793_WR_PULSE; //Pulse on the WR pin to send the same 8bits as LSB of the command - 8004844: 4b2d ldr r3, [pc, #180] ; (80048fc ) - 8004846: 2200 movs r2, #0 - 8004848: 2102 movs r1, #2 - 800484a: 0018 movs r0, r3 - 800484c: f002 feaa bl 80075a4 - 8004850: 4b2a ldr r3, [pc, #168] ; (80048fc ) - 8004852: 2201 movs r2, #1 - 8004854: 2102 movs r1, #2 - 8004856: 0018 movs r0, r3 - 8004858: f002 fea4 bl 80075a4 + 800484c: 4b2d ldr r3, [pc, #180] ; (8004904 ) + 800484e: 2200 movs r2, #0 + 8004850: 2102 movs r1, #2 + 8004852: 0018 movs r0, r3 + 8004854: f002 ffea bl 800782c + 8004858: 4b2a ldr r3, [pc, #168] ; (8004904 ) + 800485a: 2201 movs r2, #1 + 800485c: 2102 movs r1, #2 + 800485e: 0018 movs r0, r3 + 8004860: f002 ffe4 bl 800782c for (i = 0; i < 8; i++) { - 800485c: 230f movs r3, #15 - 800485e: 18fb adds r3, r7, r3 - 8004860: 2200 movs r2, #0 - 8004862: 701a strb r2, [r3, #0] - 8004864: e038 b.n 80048d8 + 8004864: 230f movs r3, #15 + 8004866: 18fb adds r3, r7, r3 + 8004868: 2200 movs r2, #0 + 800486a: 701a strb r2, [r3, #0] + 800486c: e038 b.n 80048e0 b = thin_num[idx][i]; - 8004866: 230d movs r3, #13 - 8004868: 18fb adds r3, r7, r3 - 800486a: 7819 ldrb r1, [r3, #0] - 800486c: 230f movs r3, #15 - 800486e: 18fb adds r3, r7, r3 - 8004870: 781a ldrb r2, [r3, #0] - 8004872: 230c movs r3, #12 - 8004874: 18fb adds r3, r7, r3 - 8004876: 4822 ldr r0, [pc, #136] ; (8004900 ) - 8004878: 00c9 lsls r1, r1, #3 - 800487a: 1841 adds r1, r0, r1 - 800487c: 5c8a ldrb r2, [r1, r2] - 800487e: 701a strb r2, [r3, #0] - for (j = 0; j < 6; j++) { - 8004880: 230e movs r3, #14 - 8004882: 18fb adds r3, r7, r3 - 8004884: 2200 movs r2, #0 + 800486e: 230d movs r3, #13 + 8004870: 18fb adds r3, r7, r3 + 8004872: 7819 ldrb r1, [r3, #0] + 8004874: 230f movs r3, #15 + 8004876: 18fb adds r3, r7, r3 + 8004878: 781a ldrb r2, [r3, #0] + 800487a: 230c movs r3, #12 + 800487c: 18fb adds r3, r7, r3 + 800487e: 4822 ldr r0, [pc, #136] ; (8004908 ) + 8004880: 00c9 lsls r1, r1, #3 + 8004882: 1841 adds r1, r0, r1 + 8004884: 5c8a ldrb r2, [r1, r2] 8004886: 701a strb r2, [r3, #0] - 8004888: e01b b.n 80048c2 + for (j = 0; j < 6; j++) { + 8004888: 230e movs r3, #14 + 800488a: 18fb adds r3, r7, r3 + 800488c: 2200 movs r2, #0 + 800488e: 701a strb r2, [r3, #0] + 8004890: e01b b.n 80048ca if ((b << j) & 0x80) { - 800488a: 230c movs r3, #12 - 800488c: 18fb adds r3, r7, r3 - 800488e: 781a ldrb r2, [r3, #0] - 8004890: 230e movs r3, #14 - 8004892: 18fb adds r3, r7, r3 - 8004894: 781b ldrb r3, [r3, #0] - 8004896: 409a lsls r2, r3 - 8004898: 0013 movs r3, r2 - 800489a: 2280 movs r2, #128 ; 0x80 - 800489c: 4013 ands r3, r2 - 800489e: d005 beq.n 80048ac + 8004892: 230c movs r3, #12 + 8004894: 18fb adds r3, r7, r3 + 8004896: 781a ldrb r2, [r3, #0] + 8004898: 230e movs r3, #14 + 800489a: 18fb adds r3, r7, r3 + 800489c: 781b ldrb r3, [r3, #0] + 800489e: 409a lsls r2, r3 + 80048a0: 0013 movs r3, r2 + 80048a2: 2280 movs r2, #128 ; 0x80 + 80048a4: 4013 ands r3, r2 + 80048a6: d005 beq.n 80048b4 ST7793_SendData(color); - 80048a0: 1dbb adds r3, r7, #6 - 80048a2: 881b ldrh r3, [r3, #0] - 80048a4: 0018 movs r0, r3 - 80048a6: f7ff fa27 bl 8003cf8 - 80048aa: e004 b.n 80048b6 + 80048a8: 1dbb adds r3, r7, #6 + 80048aa: 881b ldrh r3, [r3, #0] + 80048ac: 0018 movs r0, r3 + 80048ae: f7ff fa27 bl 8003d00 + 80048b2: e004 b.n 80048be } else { ST7793_SendData(bgcolor); - 80048ac: 1d3b adds r3, r7, #4 - 80048ae: 881b ldrh r3, [r3, #0] - 80048b0: 0018 movs r0, r3 - 80048b2: f7ff fa21 bl 8003cf8 + 80048b4: 1d3b adds r3, r7, #4 + 80048b6: 881b ldrh r3, [r3, #0] + 80048b8: 0018 movs r0, r3 + 80048ba: f7ff fa21 bl 8003d00 for (j = 0; j < 6; j++) { - 80048b6: 210e movs r1, #14 - 80048b8: 187b adds r3, r7, r1 - 80048ba: 781a ldrb r2, [r3, #0] - 80048bc: 187b adds r3, r7, r1 - 80048be: 3201 adds r2, #1 - 80048c0: 701a strb r2, [r3, #0] - 80048c2: 230e movs r3, #14 - 80048c4: 18fb adds r3, r7, r3 - 80048c6: 781b ldrb r3, [r3, #0] - 80048c8: 2b05 cmp r3, #5 - 80048ca: d9de bls.n 800488a + 80048be: 210e movs r1, #14 + 80048c0: 187b adds r3, r7, r1 + 80048c2: 781a ldrb r2, [r3, #0] + 80048c4: 187b adds r3, r7, r1 + 80048c6: 3201 adds r2, #1 + 80048c8: 701a strb r2, [r3, #0] + 80048ca: 230e movs r3, #14 + 80048cc: 18fb adds r3, r7, r3 + 80048ce: 781b ldrb r3, [r3, #0] + 80048d0: 2b05 cmp r3, #5 + 80048d2: d9de bls.n 8004892 for (i = 0; i < 8; i++) { - 80048cc: 210f movs r1, #15 - 80048ce: 187b adds r3, r7, r1 - 80048d0: 781a ldrb r2, [r3, #0] - 80048d2: 187b adds r3, r7, r1 - 80048d4: 3201 adds r2, #1 - 80048d6: 701a strb r2, [r3, #0] - 80048d8: 230f movs r3, #15 - 80048da: 18fb adds r3, r7, r3 - 80048dc: 781b ldrb r3, [r3, #0] - 80048de: 2b07 cmp r3, #7 - 80048e0: d9c1 bls.n 8004866 - 80048e2: e000 b.n 80048e6 + 80048d4: 210f movs r1, #15 + 80048d6: 187b adds r3, r7, r1 + 80048d8: 781a ldrb r2, [r3, #0] + 80048da: 187b adds r3, r7, r1 + 80048dc: 3201 adds r2, #1 + 80048de: 701a strb r2, [r3, #0] + 80048e0: 230f movs r3, #15 + 80048e2: 18fb adds r3, r7, r3 + 80048e4: 781b ldrb r3, [r3, #0] + 80048e6: 2b07 cmp r3, #7 + 80048e8: d9c1 bls.n 800486e + 80048ea: e000 b.n 80048ee if ( (c < 0x30 || c > 0x39) && c != 0x2E && c != 0xB0 && c != 0x73 ) return; // only numbers, dot and degree sign - 80048e4: 46c0 nop ; (mov r8, r8) + 80048ec: 46c0 nop ; (mov r8, r8) } } } } - 80048e6: 46bd mov sp, r7 - 80048e8: b004 add sp, #16 - 80048ea: bdb0 pop {r4, r5, r7, pc} - 80048ec: 00000211 .word 0x00000211 - 80048f0: 00000212 .word 0x00000212 - 80048f4: 00000213 .word 0x00000213 - 80048f8: 00000201 .word 0x00000201 - 80048fc: 50000400 .word 0x50000400 - 8004900: 080101d8 .word 0x080101d8 + 80048ee: 46bd mov sp, r7 + 80048f0: b004 add sp, #16 + 80048f2: bdb0 pop {r4, r5, r7, pc} + 80048f4: 00000211 .word 0x00000211 + 80048f8: 00000212 .word 0x00000212 + 80048fc: 00000213 .word 0x00000213 + 8004900: 00000201 .word 0x00000201 + 8004904: 50000400 .word 0x50000400 + 8004908: 08010e18 .word 0x08010e18 -08004904 : +0800490c : //Draw a string of characters void ST7793_DrawString(uint16_t color, uint16_t bgcolor, char *str, uint16_t x, uint16_t y) { - 8004904: b5b0 push {r4, r5, r7, lr} - 8004906: b088 sub sp, #32 - 8004908: af02 add r7, sp, #8 - 800490a: 0004 movs r4, r0 - 800490c: 0008 movs r0, r1 - 800490e: 60ba str r2, [r7, #8] - 8004910: 0019 movs r1, r3 - 8004912: 230e movs r3, #14 - 8004914: 18fb adds r3, r7, r3 - 8004916: 1c22 adds r2, r4, #0 - 8004918: 801a strh r2, [r3, #0] - 800491a: 230c movs r3, #12 + 800490c: b5b0 push {r4, r5, r7, lr} + 800490e: b088 sub sp, #32 + 8004910: af02 add r7, sp, #8 + 8004912: 0004 movs r4, r0 + 8004914: 0008 movs r0, r1 + 8004916: 60ba str r2, [r7, #8] + 8004918: 0019 movs r1, r3 + 800491a: 230e movs r3, #14 800491c: 18fb adds r3, r7, r3 - 800491e: 1c02 adds r2, r0, #0 + 800491e: 1c22 adds r2, r4, #0 8004920: 801a strh r2, [r3, #0] - 8004922: 1dbb adds r3, r7, #6 - 8004924: 1c0a adds r2, r1, #0 - 8004926: 801a strh r2, [r3, #0] + 8004922: 230c movs r3, #12 + 8004924: 18fb adds r3, r7, r3 + 8004926: 1c02 adds r2, r0, #0 + 8004928: 801a strh r2, [r3, #0] + 800492a: 1dbb adds r3, r7, #6 + 800492c: 1c0a adds r2, r1, #0 + 800492e: 801a strh r2, [r3, #0] unsigned char j = 0; - 8004928: 2317 movs r3, #23 - 800492a: 18fb adds r3, r7, r3 - 800492c: 2200 movs r2, #0 - 800492e: 701a strb r2, [r3, #0] + 8004930: 2317 movs r3, #23 + 8004932: 18fb adds r3, r7, r3 + 8004934: 2200 movs r2, #0 + 8004936: 701a strb r2, [r3, #0] while (j < strlen(str)) { - 8004930: e026 b.n 8004980 + 8004938: e026 b.n 8004988 ST7793_DrawChar(color, bgcolor, str[j], x+j*ST7793_CHAR_W*ST7793_FontSize, y); - 8004932: 2517 movs r5, #23 - 8004934: 197b adds r3, r7, r5 - 8004936: 781b ldrb r3, [r3, #0] - 8004938: 68ba ldr r2, [r7, #8] - 800493a: 18d3 adds r3, r2, r3 - 800493c: 781c ldrb r4, [r3, #0] - 800493e: 197b adds r3, r7, r5 - 8004940: 781b ldrb r3, [r3, #0] - 8004942: b29b uxth r3, r3 - 8004944: 4a16 ldr r2, [pc, #88] ; (80049a0 ) - 8004946: 7812 ldrb r2, [r2, #0] - 8004948: b292 uxth r2, r2 - 800494a: 4353 muls r3, r2 - 800494c: b29b uxth r3, r3 - 800494e: 00db lsls r3, r3, #3 - 8004950: b29a uxth r2, r3 - 8004952: 1dbb adds r3, r7, #6 - 8004954: 881b ldrh r3, [r3, #0] - 8004956: 18d3 adds r3, r2, r3 + 800493a: 2517 movs r5, #23 + 800493c: 197b adds r3, r7, r5 + 800493e: 781b ldrb r3, [r3, #0] + 8004940: 68ba ldr r2, [r7, #8] + 8004942: 18d3 adds r3, r2, r3 + 8004944: 781c ldrb r4, [r3, #0] + 8004946: 197b adds r3, r7, r5 + 8004948: 781b ldrb r3, [r3, #0] + 800494a: b29b uxth r3, r3 + 800494c: 4a16 ldr r2, [pc, #88] ; (80049a8 ) + 800494e: 7812 ldrb r2, [r2, #0] + 8004950: b292 uxth r2, r2 + 8004952: 4353 muls r3, r2 + 8004954: b29b uxth r3, r3 + 8004956: 00db lsls r3, r3, #3 8004958: b29a uxth r2, r3 - 800495a: 230c movs r3, #12 - 800495c: 18fb adds r3, r7, r3 - 800495e: 8819 ldrh r1, [r3, #0] - 8004960: 230e movs r3, #14 - 8004962: 18fb adds r3, r7, r3 - 8004964: 8818 ldrh r0, [r3, #0] - 8004966: 2328 movs r3, #40 ; 0x28 - 8004968: 18fb adds r3, r7, r3 - 800496a: 881b ldrh r3, [r3, #0] - 800496c: 9300 str r3, [sp, #0] - 800496e: 0013 movs r3, r2 - 8004970: 0022 movs r2, r4 - 8004972: f7ff fdc5 bl 8004500 + 800495a: 1dbb adds r3, r7, #6 + 800495c: 881b ldrh r3, [r3, #0] + 800495e: 18d3 adds r3, r2, r3 + 8004960: b29a uxth r2, r3 + 8004962: 230c movs r3, #12 + 8004964: 18fb adds r3, r7, r3 + 8004966: 8819 ldrh r1, [r3, #0] + 8004968: 230e movs r3, #14 + 800496a: 18fb adds r3, r7, r3 + 800496c: 8818 ldrh r0, [r3, #0] + 800496e: 2328 movs r3, #40 ; 0x28 + 8004970: 18fb adds r3, r7, r3 + 8004972: 881b ldrh r3, [r3, #0] + 8004974: 9300 str r3, [sp, #0] + 8004976: 0013 movs r3, r2 + 8004978: 0022 movs r2, r4 + 800497a: f7ff fdc5 bl 8004508 j++; - 8004976: 197b adds r3, r7, r5 - 8004978: 781a ldrb r2, [r3, #0] - 800497a: 197b adds r3, r7, r5 - 800497c: 3201 adds r2, #1 - 800497e: 701a strb r2, [r3, #0] + 800497e: 197b adds r3, r7, r5 + 8004980: 781a ldrb r2, [r3, #0] + 8004982: 197b adds r3, r7, r5 + 8004984: 3201 adds r2, #1 + 8004986: 701a strb r2, [r3, #0] while (j < strlen(str)) { - 8004980: 2317 movs r3, #23 - 8004982: 18fb adds r3, r7, r3 - 8004984: 781c ldrb r4, [r3, #0] - 8004986: 68bb ldr r3, [r7, #8] - 8004988: 0018 movs r0, r3 - 800498a: f7fb fbbd bl 8000108 - 800498e: 0003 movs r3, r0 - 8004990: 429c cmp r4, r3 - 8004992: d3ce bcc.n 8004932 + 8004988: 2317 movs r3, #23 + 800498a: 18fb adds r3, r7, r3 + 800498c: 781c ldrb r4, [r3, #0] + 800498e: 68bb ldr r3, [r7, #8] + 8004990: 0018 movs r0, r3 + 8004992: f7fb fbb9 bl 8000108 + 8004996: 0003 movs r3, r0 + 8004998: 429c cmp r4, r3 + 800499a: d3ce bcc.n 800493a } } - 8004994: 46c0 nop ; (mov r8, r8) - 8004996: 46c0 nop ; (mov r8, r8) - 8004998: 46bd mov sp, r7 - 800499a: b006 add sp, #24 - 800499c: bdb0 pop {r4, r5, r7, pc} + 800499c: 46c0 nop ; (mov r8, r8) 800499e: 46c0 nop ; (mov r8, r8) - 80049a0: 2000003f .word 0x2000003f + 80049a0: 46bd mov sp, r7 + 80049a2: b006 add sp, #24 + 80049a4: bdb0 pop {r4, r5, r7, pc} + 80049a6: 46c0 nop ; (mov r8, r8) + 80049a8: 2000003f .word 0x2000003f -080049a4 : +080049ac : //Draw a string of characters void ST7793_DrawStringC(uint16_t color, uint16_t bgcolor, const char *str, uint16_t x, uint16_t y) { - 80049a4: b5b0 push {r4, r5, r7, lr} - 80049a6: b088 sub sp, #32 - 80049a8: af02 add r7, sp, #8 - 80049aa: 0004 movs r4, r0 - 80049ac: 0008 movs r0, r1 - 80049ae: 60ba str r2, [r7, #8] - 80049b0: 0019 movs r1, r3 - 80049b2: 230e movs r3, #14 - 80049b4: 18fb adds r3, r7, r3 - 80049b6: 1c22 adds r2, r4, #0 - 80049b8: 801a strh r2, [r3, #0] - 80049ba: 230c movs r3, #12 + 80049ac: b5b0 push {r4, r5, r7, lr} + 80049ae: b088 sub sp, #32 + 80049b0: af02 add r7, sp, #8 + 80049b2: 0004 movs r4, r0 + 80049b4: 0008 movs r0, r1 + 80049b6: 60ba str r2, [r7, #8] + 80049b8: 0019 movs r1, r3 + 80049ba: 230e movs r3, #14 80049bc: 18fb adds r3, r7, r3 - 80049be: 1c02 adds r2, r0, #0 + 80049be: 1c22 adds r2, r4, #0 80049c0: 801a strh r2, [r3, #0] - 80049c2: 1dbb adds r3, r7, #6 - 80049c4: 1c0a adds r2, r1, #0 - 80049c6: 801a strh r2, [r3, #0] + 80049c2: 230c movs r3, #12 + 80049c4: 18fb adds r3, r7, r3 + 80049c6: 1c02 adds r2, r0, #0 + 80049c8: 801a strh r2, [r3, #0] + 80049ca: 1dbb adds r3, r7, #6 + 80049cc: 1c0a adds r2, r1, #0 + 80049ce: 801a strh r2, [r3, #0] unsigned char j = 0; - 80049c8: 2317 movs r3, #23 - 80049ca: 18fb adds r3, r7, r3 - 80049cc: 2200 movs r2, #0 - 80049ce: 701a strb r2, [r3, #0] + 80049d0: 2317 movs r3, #23 + 80049d2: 18fb adds r3, r7, r3 + 80049d4: 2200 movs r2, #0 + 80049d6: 701a strb r2, [r3, #0] while (j < strlen(str)) { - 80049d0: e026 b.n 8004a20 + 80049d8: e026 b.n 8004a28 ST7793_DrawChar(color, bgcolor, str[j], x+j*ST7793_CHAR_W*ST7793_FontSize, y); - 80049d2: 2517 movs r5, #23 - 80049d4: 197b adds r3, r7, r5 - 80049d6: 781b ldrb r3, [r3, #0] - 80049d8: 68ba ldr r2, [r7, #8] - 80049da: 18d3 adds r3, r2, r3 - 80049dc: 781c ldrb r4, [r3, #0] - 80049de: 197b adds r3, r7, r5 - 80049e0: 781b ldrb r3, [r3, #0] - 80049e2: b29b uxth r3, r3 - 80049e4: 4a16 ldr r2, [pc, #88] ; (8004a40 ) - 80049e6: 7812 ldrb r2, [r2, #0] - 80049e8: b292 uxth r2, r2 - 80049ea: 4353 muls r3, r2 - 80049ec: b29b uxth r3, r3 - 80049ee: 00db lsls r3, r3, #3 - 80049f0: b29a uxth r2, r3 - 80049f2: 1dbb adds r3, r7, #6 - 80049f4: 881b ldrh r3, [r3, #0] - 80049f6: 18d3 adds r3, r2, r3 + 80049da: 2517 movs r5, #23 + 80049dc: 197b adds r3, r7, r5 + 80049de: 781b ldrb r3, [r3, #0] + 80049e0: 68ba ldr r2, [r7, #8] + 80049e2: 18d3 adds r3, r2, r3 + 80049e4: 781c ldrb r4, [r3, #0] + 80049e6: 197b adds r3, r7, r5 + 80049e8: 781b ldrb r3, [r3, #0] + 80049ea: b29b uxth r3, r3 + 80049ec: 4a16 ldr r2, [pc, #88] ; (8004a48 ) + 80049ee: 7812 ldrb r2, [r2, #0] + 80049f0: b292 uxth r2, r2 + 80049f2: 4353 muls r3, r2 + 80049f4: b29b uxth r3, r3 + 80049f6: 00db lsls r3, r3, #3 80049f8: b29a uxth r2, r3 - 80049fa: 230c movs r3, #12 - 80049fc: 18fb adds r3, r7, r3 - 80049fe: 8819 ldrh r1, [r3, #0] - 8004a00: 230e movs r3, #14 - 8004a02: 18fb adds r3, r7, r3 - 8004a04: 8818 ldrh r0, [r3, #0] - 8004a06: 2328 movs r3, #40 ; 0x28 - 8004a08: 18fb adds r3, r7, r3 - 8004a0a: 881b ldrh r3, [r3, #0] - 8004a0c: 9300 str r3, [sp, #0] - 8004a0e: 0013 movs r3, r2 - 8004a10: 0022 movs r2, r4 - 8004a12: f7ff fd75 bl 8004500 + 80049fa: 1dbb adds r3, r7, #6 + 80049fc: 881b ldrh r3, [r3, #0] + 80049fe: 18d3 adds r3, r2, r3 + 8004a00: b29a uxth r2, r3 + 8004a02: 230c movs r3, #12 + 8004a04: 18fb adds r3, r7, r3 + 8004a06: 8819 ldrh r1, [r3, #0] + 8004a08: 230e movs r3, #14 + 8004a0a: 18fb adds r3, r7, r3 + 8004a0c: 8818 ldrh r0, [r3, #0] + 8004a0e: 2328 movs r3, #40 ; 0x28 + 8004a10: 18fb adds r3, r7, r3 + 8004a12: 881b ldrh r3, [r3, #0] + 8004a14: 9300 str r3, [sp, #0] + 8004a16: 0013 movs r3, r2 + 8004a18: 0022 movs r2, r4 + 8004a1a: f7ff fd75 bl 8004508 j++; - 8004a16: 197b adds r3, r7, r5 - 8004a18: 781a ldrb r2, [r3, #0] - 8004a1a: 197b adds r3, r7, r5 - 8004a1c: 3201 adds r2, #1 - 8004a1e: 701a strb r2, [r3, #0] + 8004a1e: 197b adds r3, r7, r5 + 8004a20: 781a ldrb r2, [r3, #0] + 8004a22: 197b adds r3, r7, r5 + 8004a24: 3201 adds r2, #1 + 8004a26: 701a strb r2, [r3, #0] while (j < strlen(str)) { - 8004a20: 2317 movs r3, #23 - 8004a22: 18fb adds r3, r7, r3 - 8004a24: 781c ldrb r4, [r3, #0] - 8004a26: 68bb ldr r3, [r7, #8] - 8004a28: 0018 movs r0, r3 - 8004a2a: f7fb fb6d bl 8000108 - 8004a2e: 0003 movs r3, r0 - 8004a30: 429c cmp r4, r3 - 8004a32: d3ce bcc.n 80049d2 + 8004a28: 2317 movs r3, #23 + 8004a2a: 18fb adds r3, r7, r3 + 8004a2c: 781c ldrb r4, [r3, #0] + 8004a2e: 68bb ldr r3, [r7, #8] + 8004a30: 0018 movs r0, r3 + 8004a32: f7fb fb69 bl 8000108 + 8004a36: 0003 movs r3, r0 + 8004a38: 429c cmp r4, r3 + 8004a3a: d3ce bcc.n 80049da } } - 8004a34: 46c0 nop ; (mov r8, r8) - 8004a36: 46c0 nop ; (mov r8, r8) - 8004a38: 46bd mov sp, r7 - 8004a3a: b006 add sp, #24 - 8004a3c: bdb0 pop {r4, r5, r7, pc} + 8004a3c: 46c0 nop ; (mov r8, r8) 8004a3e: 46c0 nop ; (mov r8, r8) - 8004a40: 2000003f .word 0x2000003f + 8004a40: 46bd mov sp, r7 + 8004a42: b006 add sp, #24 + 8004a44: bdb0 pop {r4, r5, r7, pc} + 8004a46: 46c0 nop ; (mov r8, r8) + 8004a48: 2000003f .word 0x2000003f -08004a44 : +08004a4c : //Draw a string of thin number characters void ST7793_DrawTNString(uint16_t color, uint16_t bgcolor, char *str, uint16_t x, uint16_t y) { - 8004a44: b5b0 push {r4, r5, r7, lr} - 8004a46: b088 sub sp, #32 - 8004a48: af02 add r7, sp, #8 - 8004a4a: 0004 movs r4, r0 - 8004a4c: 0008 movs r0, r1 - 8004a4e: 60ba str r2, [r7, #8] - 8004a50: 0019 movs r1, r3 - 8004a52: 230e movs r3, #14 - 8004a54: 18fb adds r3, r7, r3 - 8004a56: 1c22 adds r2, r4, #0 - 8004a58: 801a strh r2, [r3, #0] - 8004a5a: 230c movs r3, #12 + 8004a4c: b5b0 push {r4, r5, r7, lr} + 8004a4e: b088 sub sp, #32 + 8004a50: af02 add r7, sp, #8 + 8004a52: 0004 movs r4, r0 + 8004a54: 0008 movs r0, r1 + 8004a56: 60ba str r2, [r7, #8] + 8004a58: 0019 movs r1, r3 + 8004a5a: 230e movs r3, #14 8004a5c: 18fb adds r3, r7, r3 - 8004a5e: 1c02 adds r2, r0, #0 + 8004a5e: 1c22 adds r2, r4, #0 8004a60: 801a strh r2, [r3, #0] - 8004a62: 1dbb adds r3, r7, #6 - 8004a64: 1c0a adds r2, r1, #0 - 8004a66: 801a strh r2, [r3, #0] + 8004a62: 230c movs r3, #12 + 8004a64: 18fb adds r3, r7, r3 + 8004a66: 1c02 adds r2, r0, #0 + 8004a68: 801a strh r2, [r3, #0] + 8004a6a: 1dbb adds r3, r7, #6 + 8004a6c: 1c0a adds r2, r1, #0 + 8004a6e: 801a strh r2, [r3, #0] unsigned char j = 0; - 8004a68: 2317 movs r3, #23 - 8004a6a: 18fb adds r3, r7, r3 - 8004a6c: 2200 movs r2, #0 - 8004a6e: 701a strb r2, [r3, #0] + 8004a70: 2317 movs r3, #23 + 8004a72: 18fb adds r3, r7, r3 + 8004a74: 2200 movs r2, #0 + 8004a76: 701a strb r2, [r3, #0] while (j < strlen(str)) { - 8004a70: e025 b.n 8004abe + 8004a78: e025 b.n 8004ac6 ST7793_DrawTNChar(color, bgcolor, str[j], x+j*6, y); - 8004a72: 2517 movs r5, #23 - 8004a74: 197b adds r3, r7, r5 - 8004a76: 781b ldrb r3, [r3, #0] - 8004a78: 68ba ldr r2, [r7, #8] - 8004a7a: 18d3 adds r3, r2, r3 - 8004a7c: 781c ldrb r4, [r3, #0] - 8004a7e: 197b adds r3, r7, r5 - 8004a80: 781b ldrb r3, [r3, #0] - 8004a82: b29b uxth r3, r3 - 8004a84: 1c1a adds r2, r3, #0 - 8004a86: 1c13 adds r3, r2, #0 - 8004a88: 18db adds r3, r3, r3 - 8004a8a: 189b adds r3, r3, r2 - 8004a8c: 18db adds r3, r3, r3 - 8004a8e: b29a uxth r2, r3 - 8004a90: 1dbb adds r3, r7, #6 - 8004a92: 881b ldrh r3, [r3, #0] - 8004a94: 18d3 adds r3, r2, r3 + 8004a7a: 2517 movs r5, #23 + 8004a7c: 197b adds r3, r7, r5 + 8004a7e: 781b ldrb r3, [r3, #0] + 8004a80: 68ba ldr r2, [r7, #8] + 8004a82: 18d3 adds r3, r2, r3 + 8004a84: 781c ldrb r4, [r3, #0] + 8004a86: 197b adds r3, r7, r5 + 8004a88: 781b ldrb r3, [r3, #0] + 8004a8a: b29b uxth r3, r3 + 8004a8c: 1c1a adds r2, r3, #0 + 8004a8e: 1c13 adds r3, r2, #0 + 8004a90: 18db adds r3, r3, r3 + 8004a92: 189b adds r3, r3, r2 + 8004a94: 18db adds r3, r3, r3 8004a96: b29a uxth r2, r3 - 8004a98: 230c movs r3, #12 - 8004a9a: 18fb adds r3, r7, r3 - 8004a9c: 8819 ldrh r1, [r3, #0] - 8004a9e: 230e movs r3, #14 - 8004aa0: 18fb adds r3, r7, r3 - 8004aa2: 8818 ldrh r0, [r3, #0] - 8004aa4: 2328 movs r3, #40 ; 0x28 - 8004aa6: 18fb adds r3, r7, r3 - 8004aa8: 881b ldrh r3, [r3, #0] - 8004aaa: 9300 str r3, [sp, #0] - 8004aac: 0013 movs r3, r2 - 8004aae: 0022 movs r2, r4 - 8004ab0: f7ff fe3c bl 800472c + 8004a98: 1dbb adds r3, r7, #6 + 8004a9a: 881b ldrh r3, [r3, #0] + 8004a9c: 18d3 adds r3, r2, r3 + 8004a9e: b29a uxth r2, r3 + 8004aa0: 230c movs r3, #12 + 8004aa2: 18fb adds r3, r7, r3 + 8004aa4: 8819 ldrh r1, [r3, #0] + 8004aa6: 230e movs r3, #14 + 8004aa8: 18fb adds r3, r7, r3 + 8004aaa: 8818 ldrh r0, [r3, #0] + 8004aac: 2328 movs r3, #40 ; 0x28 + 8004aae: 18fb adds r3, r7, r3 + 8004ab0: 881b ldrh r3, [r3, #0] + 8004ab2: 9300 str r3, [sp, #0] + 8004ab4: 0013 movs r3, r2 + 8004ab6: 0022 movs r2, r4 + 8004ab8: f7ff fe3c bl 8004734 j++; - 8004ab4: 197b adds r3, r7, r5 - 8004ab6: 781a ldrb r2, [r3, #0] - 8004ab8: 197b adds r3, r7, r5 - 8004aba: 3201 adds r2, #1 - 8004abc: 701a strb r2, [r3, #0] + 8004abc: 197b adds r3, r7, r5 + 8004abe: 781a ldrb r2, [r3, #0] + 8004ac0: 197b adds r3, r7, r5 + 8004ac2: 3201 adds r2, #1 + 8004ac4: 701a strb r2, [r3, #0] while (j < strlen(str)) { - 8004abe: 2317 movs r3, #23 - 8004ac0: 18fb adds r3, r7, r3 - 8004ac2: 781c ldrb r4, [r3, #0] - 8004ac4: 68bb ldr r3, [r7, #8] - 8004ac6: 0018 movs r0, r3 - 8004ac8: f7fb fb1e bl 8000108 - 8004acc: 0003 movs r3, r0 - 8004ace: 429c cmp r4, r3 - 8004ad0: d3cf bcc.n 8004a72 + 8004ac6: 2317 movs r3, #23 + 8004ac8: 18fb adds r3, r7, r3 + 8004aca: 781c ldrb r4, [r3, #0] + 8004acc: 68bb ldr r3, [r7, #8] + 8004ace: 0018 movs r0, r3 + 8004ad0: f7fb fb1a bl 8000108 + 8004ad4: 0003 movs r3, r0 + 8004ad6: 429c cmp r4, r3 + 8004ad8: d3cf bcc.n 8004a7a } } - 8004ad2: 46c0 nop ; (mov r8, r8) - 8004ad4: 46c0 nop ; (mov r8, r8) - 8004ad6: 46bd mov sp, r7 - 8004ad8: b006 add sp, #24 - 8004ada: bdb0 pop {r4, r5, r7, pc} + 8004ada: 46c0 nop ; (mov r8, r8) + 8004adc: 46c0 nop ; (mov r8, r8) + 8004ade: 46bd mov sp, r7 + 8004ae0: b006 add sp, #24 + 8004ae2: bdb0 pop {r4, r5, r7, pc} -08004adc : +08004ae4 : //Draw a button void ST7793_DrawButton(uint8_t btn_type, uint16_t color, uint16_t txtcolor, uint16_t x, uint16_t y, uint16_t x2, uint16_t y2, const char *data, uint8_t func) { - 8004adc: b5f0 push {r4, r5, r6, r7, lr} - 8004ade: b089 sub sp, #36 ; 0x24 - 8004ae0: af02 add r7, sp, #8 - 8004ae2: 0005 movs r5, r0 - 8004ae4: 000c movs r4, r1 - 8004ae6: 0010 movs r0, r2 - 8004ae8: 0019 movs r1, r3 - 8004aea: 1dfb adds r3, r7, #7 - 8004aec: 1c2a adds r2, r5, #0 - 8004aee: 701a strb r2, [r3, #0] - 8004af0: 1d3b adds r3, r7, #4 - 8004af2: 1c22 adds r2, r4, #0 - 8004af4: 801a strh r2, [r3, #0] - 8004af6: 1cbb adds r3, r7, #2 - 8004af8: 1c02 adds r2, r0, #0 - 8004afa: 801a strh r2, [r3, #0] - 8004afc: 003b movs r3, r7 - 8004afe: 1c0a adds r2, r1, #0 - 8004b00: 801a strh r2, [r3, #0] + 8004ae4: b5f0 push {r4, r5, r6, r7, lr} + 8004ae6: b089 sub sp, #36 ; 0x24 + 8004ae8: af02 add r7, sp, #8 + 8004aea: 0005 movs r5, r0 + 8004aec: 000c movs r4, r1 + 8004aee: 0010 movs r0, r2 + 8004af0: 0019 movs r1, r3 + 8004af2: 1dfb adds r3, r7, #7 + 8004af4: 1c2a adds r2, r5, #0 + 8004af6: 701a strb r2, [r3, #0] + 8004af8: 1d3b adds r3, r7, #4 + 8004afa: 1c22 adds r2, r4, #0 + 8004afc: 801a strh r2, [r3, #0] + 8004afe: 1cbb adds r3, r7, #2 + 8004b00: 1c02 adds r2, r0, #0 + 8004b02: 801a strh r2, [r3, #0] + 8004b04: 003b movs r3, r7 + 8004b06: 1c0a adds r2, r1, #0 + 8004b08: 801a strh r2, [r3, #0] uint16_t color1, color2, colswp; int16_t dx; uint16_t dy = 0; - 8004b02: 2312 movs r3, #18 - 8004b04: 18fb adds r3, r7, r3 - 8004b06: 2200 movs r2, #0 - 8004b08: 801a strh r2, [r3, #0] + 8004b0a: 2312 movs r3, #18 + 8004b0c: 18fb adds r3, r7, r3 + 8004b0e: 2200 movs r2, #0 + 8004b10: 801a strh r2, [r3, #0] uint16_t w, h; color1 = ((color&0xf800)-(((color&0xf800)>>2)&0xf800))|((color&0x07e0)-(((color&0x07e0)>>2)&0x07e0))|((color&0x001f)-(((color&0x001f)>>2)&0x001f)); - 8004b0a: 1d3b adds r3, r7, #4 - 8004b0c: 881b ldrh r3, [r3, #0] - 8004b0e: 0adb lsrs r3, r3, #11 - 8004b10: 02db lsls r3, r3, #11 - 8004b12: b29a uxth r2, r3 - 8004b14: 1d3b adds r3, r7, #4 - 8004b16: 881b ldrh r3, [r3, #0] - 8004b18: 109b asrs r3, r3, #2 - 8004b1a: b299 uxth r1, r3 - 8004b1c: 23e0 movs r3, #224 ; 0xe0 - 8004b1e: 019b lsls r3, r3, #6 - 8004b20: 400b ands r3, r1 - 8004b22: b29b uxth r3, r3 - 8004b24: 1ad3 subs r3, r2, r3 - 8004b26: b29b uxth r3, r3 - 8004b28: b21a sxth r2, r3 - 8004b2a: 1d3b adds r3, r7, #4 - 8004b2c: 8819 ldrh r1, [r3, #0] - 8004b2e: 23fc movs r3, #252 ; 0xfc - 8004b30: 00db lsls r3, r3, #3 - 8004b32: 400b ands r3, r1 - 8004b34: b299 uxth r1, r3 - 8004b36: 1d3b adds r3, r7, #4 - 8004b38: 881b ldrh r3, [r3, #0] - 8004b3a: 109b asrs r3, r3, #2 - 8004b3c: b298 uxth r0, r3 - 8004b3e: 23f0 movs r3, #240 ; 0xf0 - 8004b40: 005b lsls r3, r3, #1 - 8004b42: 4003 ands r3, r0 - 8004b44: b29b uxth r3, r3 - 8004b46: 1acb subs r3, r1, r3 - 8004b48: b29b uxth r3, r3 - 8004b4a: b21b sxth r3, r3 - 8004b4c: 4313 orrs r3, r2 - 8004b4e: b21a sxth r2, r3 - 8004b50: 1d3b adds r3, r7, #4 - 8004b52: 881b ldrh r3, [r3, #0] - 8004b54: 211f movs r1, #31 - 8004b56: 400b ands r3, r1 - 8004b58: b299 uxth r1, r3 - 8004b5a: 1d3b adds r3, r7, #4 - 8004b5c: 881b ldrh r3, [r3, #0] - 8004b5e: 109b asrs r3, r3, #2 - 8004b60: b29b uxth r3, r3 - 8004b62: 2007 movs r0, #7 - 8004b64: 4003 ands r3, r0 - 8004b66: b29b uxth r3, r3 - 8004b68: 1acb subs r3, r1, r3 - 8004b6a: b29b uxth r3, r3 - 8004b6c: b21b sxth r3, r3 - 8004b6e: 4313 orrs r3, r2 - 8004b70: b21a sxth r2, r3 - 8004b72: 230e movs r3, #14 - 8004b74: 18fb adds r3, r7, r3 - 8004b76: 801a strh r2, [r3, #0] + 8004b12: 1d3b adds r3, r7, #4 + 8004b14: 881b ldrh r3, [r3, #0] + 8004b16: 0adb lsrs r3, r3, #11 + 8004b18: 02db lsls r3, r3, #11 + 8004b1a: b29a uxth r2, r3 + 8004b1c: 1d3b adds r3, r7, #4 + 8004b1e: 881b ldrh r3, [r3, #0] + 8004b20: 109b asrs r3, r3, #2 + 8004b22: b299 uxth r1, r3 + 8004b24: 23e0 movs r3, #224 ; 0xe0 + 8004b26: 019b lsls r3, r3, #6 + 8004b28: 400b ands r3, r1 + 8004b2a: b29b uxth r3, r3 + 8004b2c: 1ad3 subs r3, r2, r3 + 8004b2e: b29b uxth r3, r3 + 8004b30: b21a sxth r2, r3 + 8004b32: 1d3b adds r3, r7, #4 + 8004b34: 8819 ldrh r1, [r3, #0] + 8004b36: 23fc movs r3, #252 ; 0xfc + 8004b38: 00db lsls r3, r3, #3 + 8004b3a: 400b ands r3, r1 + 8004b3c: b299 uxth r1, r3 + 8004b3e: 1d3b adds r3, r7, #4 + 8004b40: 881b ldrh r3, [r3, #0] + 8004b42: 109b asrs r3, r3, #2 + 8004b44: b298 uxth r0, r3 + 8004b46: 23f0 movs r3, #240 ; 0xf0 + 8004b48: 005b lsls r3, r3, #1 + 8004b4a: 4003 ands r3, r0 + 8004b4c: b29b uxth r3, r3 + 8004b4e: 1acb subs r3, r1, r3 + 8004b50: b29b uxth r3, r3 + 8004b52: b21b sxth r3, r3 + 8004b54: 4313 orrs r3, r2 + 8004b56: b21a sxth r2, r3 + 8004b58: 1d3b adds r3, r7, #4 + 8004b5a: 881b ldrh r3, [r3, #0] + 8004b5c: 211f movs r1, #31 + 8004b5e: 400b ands r3, r1 + 8004b60: b299 uxth r1, r3 + 8004b62: 1d3b adds r3, r7, #4 + 8004b64: 881b ldrh r3, [r3, #0] + 8004b66: 109b asrs r3, r3, #2 + 8004b68: b29b uxth r3, r3 + 8004b6a: 2007 movs r0, #7 + 8004b6c: 4003 ands r3, r0 + 8004b6e: b29b uxth r3, r3 + 8004b70: 1acb subs r3, r1, r3 + 8004b72: b29b uxth r3, r3 + 8004b74: b21b sxth r3, r3 + 8004b76: 4313 orrs r3, r2 + 8004b78: b21a sxth r2, r3 + 8004b7a: 230e movs r3, #14 + 8004b7c: 18fb adds r3, r7, r3 + 8004b7e: 801a strh r2, [r3, #0] color2 = ((color&0xf800)-(((color&0xf800)>>1)&0xf800))|((color&0x07e0)-(((color&0x07e0)>>1)&0x07e0))|((color&0x001f)-(((color&0x001f)>>1)&0x001f)); - 8004b78: 1d3b adds r3, r7, #4 - 8004b7a: 881b ldrh r3, [r3, #0] - 8004b7c: 0adb lsrs r3, r3, #11 - 8004b7e: 02db lsls r3, r3, #11 - 8004b80: b29a uxth r2, r3 - 8004b82: 1d3b adds r3, r7, #4 - 8004b84: 881b ldrh r3, [r3, #0] - 8004b86: 105b asrs r3, r3, #1 - 8004b88: b299 uxth r1, r3 - 8004b8a: 23f0 movs r3, #240 ; 0xf0 - 8004b8c: 01db lsls r3, r3, #7 - 8004b8e: 400b ands r3, r1 - 8004b90: b29b uxth r3, r3 - 8004b92: 1ad3 subs r3, r2, r3 - 8004b94: b29b uxth r3, r3 - 8004b96: b21a sxth r2, r3 - 8004b98: 1d3b adds r3, r7, #4 - 8004b9a: 8819 ldrh r1, [r3, #0] - 8004b9c: 23fc movs r3, #252 ; 0xfc - 8004b9e: 00db lsls r3, r3, #3 - 8004ba0: 400b ands r3, r1 - 8004ba2: b299 uxth r1, r3 - 8004ba4: 1d3b adds r3, r7, #4 - 8004ba6: 881b ldrh r3, [r3, #0] - 8004ba8: 105b asrs r3, r3, #1 - 8004baa: b298 uxth r0, r3 - 8004bac: 23f8 movs r3, #248 ; 0xf8 - 8004bae: 009b lsls r3, r3, #2 - 8004bb0: 4003 ands r3, r0 - 8004bb2: b29b uxth r3, r3 - 8004bb4: 1acb subs r3, r1, r3 - 8004bb6: b29b uxth r3, r3 - 8004bb8: b21b sxth r3, r3 - 8004bba: 4313 orrs r3, r2 - 8004bbc: b21a sxth r2, r3 - 8004bbe: 1d3b adds r3, r7, #4 - 8004bc0: 881b ldrh r3, [r3, #0] - 8004bc2: 211f movs r1, #31 - 8004bc4: 400b ands r3, r1 - 8004bc6: b299 uxth r1, r3 - 8004bc8: 1d3b adds r3, r7, #4 - 8004bca: 881b ldrh r3, [r3, #0] - 8004bcc: 105b asrs r3, r3, #1 - 8004bce: b29b uxth r3, r3 - 8004bd0: 200f movs r0, #15 - 8004bd2: 4003 ands r3, r0 - 8004bd4: b29b uxth r3, r3 - 8004bd6: 1acb subs r3, r1, r3 - 8004bd8: b29b uxth r3, r3 - 8004bda: b21b sxth r3, r3 - 8004bdc: 4313 orrs r3, r2 - 8004bde: b21a sxth r2, r3 - 8004be0: 2316 movs r3, #22 - 8004be2: 18fb adds r3, r7, r3 - 8004be4: 801a strh r2, [r3, #0] + 8004b80: 1d3b adds r3, r7, #4 + 8004b82: 881b ldrh r3, [r3, #0] + 8004b84: 0adb lsrs r3, r3, #11 + 8004b86: 02db lsls r3, r3, #11 + 8004b88: b29a uxth r2, r3 + 8004b8a: 1d3b adds r3, r7, #4 + 8004b8c: 881b ldrh r3, [r3, #0] + 8004b8e: 105b asrs r3, r3, #1 + 8004b90: b299 uxth r1, r3 + 8004b92: 23f0 movs r3, #240 ; 0xf0 + 8004b94: 01db lsls r3, r3, #7 + 8004b96: 400b ands r3, r1 + 8004b98: b29b uxth r3, r3 + 8004b9a: 1ad3 subs r3, r2, r3 + 8004b9c: b29b uxth r3, r3 + 8004b9e: b21a sxth r2, r3 + 8004ba0: 1d3b adds r3, r7, #4 + 8004ba2: 8819 ldrh r1, [r3, #0] + 8004ba4: 23fc movs r3, #252 ; 0xfc + 8004ba6: 00db lsls r3, r3, #3 + 8004ba8: 400b ands r3, r1 + 8004baa: b299 uxth r1, r3 + 8004bac: 1d3b adds r3, r7, #4 + 8004bae: 881b ldrh r3, [r3, #0] + 8004bb0: 105b asrs r3, r3, #1 + 8004bb2: b298 uxth r0, r3 + 8004bb4: 23f8 movs r3, #248 ; 0xf8 + 8004bb6: 009b lsls r3, r3, #2 + 8004bb8: 4003 ands r3, r0 + 8004bba: b29b uxth r3, r3 + 8004bbc: 1acb subs r3, r1, r3 + 8004bbe: b29b uxth r3, r3 + 8004bc0: b21b sxth r3, r3 + 8004bc2: 4313 orrs r3, r2 + 8004bc4: b21a sxth r2, r3 + 8004bc6: 1d3b adds r3, r7, #4 + 8004bc8: 881b ldrh r3, [r3, #0] + 8004bca: 211f movs r1, #31 + 8004bcc: 400b ands r3, r1 + 8004bce: b299 uxth r1, r3 + 8004bd0: 1d3b adds r3, r7, #4 + 8004bd2: 881b ldrh r3, [r3, #0] + 8004bd4: 105b asrs r3, r3, #1 + 8004bd6: b29b uxth r3, r3 + 8004bd8: 200f movs r0, #15 + 8004bda: 4003 ands r3, r0 + 8004bdc: b29b uxth r3, r3 + 8004bde: 1acb subs r3, r1, r3 + 8004be0: b29b uxth r3, r3 + 8004be2: b21b sxth r3, r3 + 8004be4: 4313 orrs r3, r2 + 8004be6: b21a sxth r2, r3 + 8004be8: 2316 movs r3, #22 + 8004bea: 18fb adds r3, r7, r3 + 8004bec: 801a strh r2, [r3, #0] if (x2 < x) { dx=x2; x2=x; x=dx; } - 8004be6: 212c movs r1, #44 ; 0x2c - 8004be8: 2408 movs r4, #8 - 8004bea: 190b adds r3, r1, r4 - 8004bec: 19da adds r2, r3, r7 - 8004bee: 003b movs r3, r7 - 8004bf0: 8812 ldrh r2, [r2, #0] - 8004bf2: 881b ldrh r3, [r3, #0] - 8004bf4: 429a cmp r2, r3 - 8004bf6: d20e bcs.n 8004c16 - 8004bf8: 2014 movs r0, #20 - 8004bfa: 183b adds r3, r7, r0 - 8004bfc: 190a adds r2, r1, r4 - 8004bfe: 19d2 adds r2, r2, r7 - 8004c00: 8812 ldrh r2, [r2, #0] - 8004c02: 801a strh r2, [r3, #0] - 8004c04: 190b adds r3, r1, r4 - 8004c06: 19db adds r3, r3, r7 - 8004c08: 003a movs r2, r7 - 8004c0a: 8812 ldrh r2, [r2, #0] - 8004c0c: 801a strh r2, [r3, #0] - 8004c0e: 003b movs r3, r7 - 8004c10: 183a adds r2, r7, r0 + 8004bee: 212c movs r1, #44 ; 0x2c + 8004bf0: 2408 movs r4, #8 + 8004bf2: 190b adds r3, r1, r4 + 8004bf4: 19da adds r2, r3, r7 + 8004bf6: 003b movs r3, r7 + 8004bf8: 8812 ldrh r2, [r2, #0] + 8004bfa: 881b ldrh r3, [r3, #0] + 8004bfc: 429a cmp r2, r3 + 8004bfe: d20e bcs.n 8004c1e + 8004c00: 2014 movs r0, #20 + 8004c02: 183b adds r3, r7, r0 + 8004c04: 190a adds r2, r1, r4 + 8004c06: 19d2 adds r2, r2, r7 + 8004c08: 8812 ldrh r2, [r2, #0] + 8004c0a: 801a strh r2, [r3, #0] + 8004c0c: 190b adds r3, r1, r4 + 8004c0e: 19db adds r3, r3, r7 + 8004c10: 003a movs r2, r7 8004c12: 8812 ldrh r2, [r2, #0] 8004c14: 801a strh r2, [r3, #0] + 8004c16: 003b movs r3, r7 + 8004c18: 183a adds r2, r7, r0 + 8004c1a: 8812 ldrh r2, [r2, #0] + 8004c1c: 801a strh r2, [r3, #0] if (y2 < y) { dx=y2; y2=y; y=dx; } - 8004c16: 2130 movs r1, #48 ; 0x30 - 8004c18: 2508 movs r5, #8 - 8004c1a: 194b adds r3, r1, r5 - 8004c1c: 19da adds r2, r3, r7 - 8004c1e: 2028 movs r0, #40 ; 0x28 - 8004c20: 1943 adds r3, r0, r5 - 8004c22: 19db adds r3, r3, r7 - 8004c24: 8812 ldrh r2, [r2, #0] - 8004c26: 881b ldrh r3, [r3, #0] - 8004c28: 429a cmp r2, r3 - 8004c2a: d210 bcs.n 8004c4e - 8004c2c: 2414 movs r4, #20 - 8004c2e: 193b adds r3, r7, r4 - 8004c30: 194a adds r2, r1, r5 - 8004c32: 19d2 adds r2, r2, r7 - 8004c34: 8812 ldrh r2, [r2, #0] - 8004c36: 801a strh r2, [r3, #0] - 8004c38: 194b adds r3, r1, r5 - 8004c3a: 19da adds r2, r3, r7 - 8004c3c: 1943 adds r3, r0, r5 - 8004c3e: 19db adds r3, r3, r7 - 8004c40: 881b ldrh r3, [r3, #0] - 8004c42: 8013 strh r3, [r2, #0] + 8004c1e: 2130 movs r1, #48 ; 0x30 + 8004c20: 2508 movs r5, #8 + 8004c22: 194b adds r3, r1, r5 + 8004c24: 19da adds r2, r3, r7 + 8004c26: 2028 movs r0, #40 ; 0x28 + 8004c28: 1943 adds r3, r0, r5 + 8004c2a: 19db adds r3, r3, r7 + 8004c2c: 8812 ldrh r2, [r2, #0] + 8004c2e: 881b ldrh r3, [r3, #0] + 8004c30: 429a cmp r2, r3 + 8004c32: d210 bcs.n 8004c56 + 8004c34: 2414 movs r4, #20 + 8004c36: 193b adds r3, r7, r4 + 8004c38: 194a adds r2, r1, r5 + 8004c3a: 19d2 adds r2, r2, r7 + 8004c3c: 8812 ldrh r2, [r2, #0] + 8004c3e: 801a strh r2, [r3, #0] + 8004c40: 194b adds r3, r1, r5 + 8004c42: 19da adds r2, r3, r7 8004c44: 1943 adds r3, r0, r5 8004c46: 19db adds r3, r3, r7 - 8004c48: 193a adds r2, r7, r4 - 8004c4a: 8812 ldrh r2, [r2, #0] - 8004c4c: 801a strh r2, [r3, #0] + 8004c48: 881b ldrh r3, [r3, #0] + 8004c4a: 8013 strh r3, [r2, #0] + 8004c4c: 1943 adds r3, r0, r5 + 8004c4e: 19db adds r3, r3, r7 + 8004c50: 193a adds r2, r7, r4 + 8004c52: 8812 ldrh r2, [r2, #0] + 8004c54: 801a strh r2, [r3, #0] if (btn_type == BTN_TEXT) dx = (x2-x-strlen(data)*ST7793_CHAR_W*ST7793_FontSize)>>1; - 8004c4e: 1dfb adds r3, r7, #7 - 8004c50: 781b ldrb r3, [r3, #0] - 8004c52: 2b00 cmp r3, #0 - 8004c54: d116 bne.n 8004c84 - 8004c56: 232c movs r3, #44 ; 0x2c - 8004c58: 2208 movs r2, #8 - 8004c5a: 189b adds r3, r3, r2 - 8004c5c: 19db adds r3, r3, r7 - 8004c5e: 881a ldrh r2, [r3, #0] - 8004c60: 003b movs r3, r7 - 8004c62: 881b ldrh r3, [r3, #0] - 8004c64: 1ad3 subs r3, r2, r3 - 8004c66: 001c movs r4, r3 - 8004c68: 6bfb ldr r3, [r7, #60] ; 0x3c - 8004c6a: 0018 movs r0, r3 - 8004c6c: f7fb fa4c bl 8000108 - 8004c70: 0002 movs r2, r0 - 8004c72: 4b2c ldr r3, [pc, #176] ; (8004d24 ) - 8004c74: 781b ldrb r3, [r3, #0] - 8004c76: 4353 muls r3, r2 - 8004c78: 00db lsls r3, r3, #3 - 8004c7a: 1ae3 subs r3, r4, r3 - 8004c7c: 085a lsrs r2, r3, #1 - 8004c7e: 2314 movs r3, #20 - 8004c80: 18fb adds r3, r7, r3 - 8004c82: 801a strh r2, [r3, #0] + 8004c56: 1dfb adds r3, r7, #7 + 8004c58: 781b ldrb r3, [r3, #0] + 8004c5a: 2b00 cmp r3, #0 + 8004c5c: d116 bne.n 8004c8c + 8004c5e: 232c movs r3, #44 ; 0x2c + 8004c60: 2208 movs r2, #8 + 8004c62: 189b adds r3, r3, r2 + 8004c64: 19db adds r3, r3, r7 + 8004c66: 881a ldrh r2, [r3, #0] + 8004c68: 003b movs r3, r7 + 8004c6a: 881b ldrh r3, [r3, #0] + 8004c6c: 1ad3 subs r3, r2, r3 + 8004c6e: 001c movs r4, r3 + 8004c70: 6bfb ldr r3, [r7, #60] ; 0x3c + 8004c72: 0018 movs r0, r3 + 8004c74: f7fb fa48 bl 8000108 + 8004c78: 0002 movs r2, r0 + 8004c7a: 4b2c ldr r3, [pc, #176] ; (8004d2c ) + 8004c7c: 781b ldrb r3, [r3, #0] + 8004c7e: 4353 muls r3, r2 + 8004c80: 00db lsls r3, r3, #3 + 8004c82: 1ae3 subs r3, r4, r3 + 8004c84: 085a lsrs r2, r3, #1 + 8004c86: 2314 movs r3, #20 + 8004c88: 18fb adds r3, r7, r3 + 8004c8a: 801a strh r2, [r3, #0] if (btn_type == BTN_ICON) { - 8004c84: 1dfb adds r3, r7, #7 - 8004c86: 781b ldrb r3, [r3, #0] - 8004c88: 2b01 cmp r3, #1 - 8004c8a: d129 bne.n 8004ce0 - w = (data[0] << 8) | data[1]; - 8004c8c: 6bfb ldr r3, [r7, #60] ; 0x3c + 8004c8c: 1dfb adds r3, r7, #7 8004c8e: 781b ldrb r3, [r3, #0] - 8004c90: 021b lsls r3, r3, #8 - 8004c92: b21a sxth r2, r3 + 8004c90: 2b01 cmp r3, #1 + 8004c92: d129 bne.n 8004ce8 + w = (data[0] << 8) | data[1]; 8004c94: 6bfb ldr r3, [r7, #60] ; 0x3c - 8004c96: 3301 adds r3, #1 - 8004c98: 781b ldrb r3, [r3, #0] - 8004c9a: b21b sxth r3, r3 - 8004c9c: 4313 orrs r3, r2 - 8004c9e: b21a sxth r2, r3 - 8004ca0: 210c movs r1, #12 - 8004ca2: 187b adds r3, r7, r1 - 8004ca4: 801a strh r2, [r3, #0] + 8004c96: 781b ldrb r3, [r3, #0] + 8004c98: 021b lsls r3, r3, #8 + 8004c9a: b21a sxth r2, r3 + 8004c9c: 6bfb ldr r3, [r7, #60] ; 0x3c + 8004c9e: 3301 adds r3, #1 + 8004ca0: 781b ldrb r3, [r3, #0] + 8004ca2: b21b sxth r3, r3 + 8004ca4: 4313 orrs r3, r2 + 8004ca6: b21a sxth r2, r3 + 8004ca8: 210c movs r1, #12 + 8004caa: 187b adds r3, r7, r1 + 8004cac: 801a strh r2, [r3, #0] h = (data[2] << 8) | data[3]; - 8004ca6: 6bfb ldr r3, [r7, #60] ; 0x3c - 8004ca8: 3302 adds r3, #2 - 8004caa: 781b ldrb r3, [r3, #0] - 8004cac: 021b lsls r3, r3, #8 - 8004cae: b21a sxth r2, r3 - 8004cb0: 6bfb ldr r3, [r7, #60] ; 0x3c - 8004cb2: 3303 adds r3, #3 - 8004cb4: 781b ldrb r3, [r3, #0] - 8004cb6: b21b sxth r3, r3 - 8004cb8: 4313 orrs r3, r2 - 8004cba: b21a sxth r2, r3 - 8004cbc: 2310 movs r3, #16 - 8004cbe: 18fb adds r3, r7, r3 - 8004cc0: 801a strh r2, [r3, #0] + 8004cae: 6bfb ldr r3, [r7, #60] ; 0x3c + 8004cb0: 3302 adds r3, #2 + 8004cb2: 781b ldrb r3, [r3, #0] + 8004cb4: 021b lsls r3, r3, #8 + 8004cb6: b21a sxth r2, r3 + 8004cb8: 6bfb ldr r3, [r7, #60] ; 0x3c + 8004cba: 3303 adds r3, #3 + 8004cbc: 781b ldrb r3, [r3, #0] + 8004cbe: b21b sxth r3, r3 + 8004cc0: 4313 orrs r3, r2 + 8004cc2: b21a sxth r2, r3 + 8004cc4: 2310 movs r3, #16 + 8004cc6: 18fb adds r3, r7, r3 + 8004cc8: 801a strh r2, [r3, #0] dx = (x2 - x - w) >> 1; - 8004cc2: 232c movs r3, #44 ; 0x2c - 8004cc4: 2208 movs r2, #8 - 8004cc6: 189b adds r3, r3, r2 - 8004cc8: 19db adds r3, r3, r7 - 8004cca: 881a ldrh r2, [r3, #0] - 8004ccc: 003b movs r3, r7 - 8004cce: 881b ldrh r3, [r3, #0] - 8004cd0: 1ad2 subs r2, r2, r3 - 8004cd2: 187b adds r3, r7, r1 - 8004cd4: 881b ldrh r3, [r3, #0] - 8004cd6: 1ad3 subs r3, r2, r3 - 8004cd8: 105a asrs r2, r3, #1 - 8004cda: 2314 movs r3, #20 - 8004cdc: 18fb adds r3, r7, r3 - 8004cde: 801a strh r2, [r3, #0] + 8004cca: 232c movs r3, #44 ; 0x2c + 8004ccc: 2208 movs r2, #8 + 8004cce: 189b adds r3, r3, r2 + 8004cd0: 19db adds r3, r3, r7 + 8004cd2: 881a ldrh r2, [r3, #0] + 8004cd4: 003b movs r3, r7 + 8004cd6: 881b ldrh r3, [r3, #0] + 8004cd8: 1ad2 subs r2, r2, r3 + 8004cda: 187b adds r3, r7, r1 + 8004cdc: 881b ldrh r3, [r3, #0] + 8004cde: 1ad3 subs r3, r2, r3 + 8004ce0: 105a asrs r2, r3, #1 + 8004ce2: 2314 movs r3, #20 + 8004ce4: 18fb adds r3, r7, r3 + 8004ce6: 801a strh r2, [r3, #0] } if (func) { - 8004ce0: 2338 movs r3, #56 ; 0x38 - 8004ce2: 2208 movs r2, #8 - 8004ce4: 189b adds r3, r3, r2 - 8004ce6: 19db adds r3, r3, r7 - 8004ce8: 781b ldrb r3, [r3, #0] - 8004cea: 2b00 cmp r3, #0 - 8004cec: d01c beq.n 8004d28 + 8004ce8: 2338 movs r3, #56 ; 0x38 + 8004cea: 2208 movs r2, #8 + 8004cec: 189b adds r3, r3, r2 + 8004cee: 19db adds r3, r3, r7 + 8004cf0: 781b ldrb r3, [r3, #0] + 8004cf2: 2b00 cmp r3, #0 + 8004cf4: d01c beq.n 8004d30 colswp = color; - 8004cee: 210a movs r1, #10 - 8004cf0: 187b adds r3, r7, r1 - 8004cf2: 1d3a adds r2, r7, #4 - 8004cf4: 8812 ldrh r2, [r2, #0] - 8004cf6: 801a strh r2, [r3, #0] + 8004cf6: 210a movs r1, #10 + 8004cf8: 187b adds r3, r7, r1 + 8004cfa: 1d3a adds r2, r7, #4 + 8004cfc: 8812 ldrh r2, [r2, #0] + 8004cfe: 801a strh r2, [r3, #0] color = color2; - 8004cf8: 1d3b adds r3, r7, #4 - 8004cfa: 2016 movs r0, #22 - 8004cfc: 183a adds r2, r7, r0 - 8004cfe: 8812 ldrh r2, [r2, #0] - 8004d00: 801a strh r2, [r3, #0] - color2 = colswp; - 8004d02: 183b adds r3, r7, r0 - 8004d04: 187a adds r2, r7, r1 + 8004d00: 1d3b adds r3, r7, #4 + 8004d02: 2016 movs r0, #22 + 8004d04: 183a adds r2, r7, r0 8004d06: 8812 ldrh r2, [r2, #0] 8004d08: 801a strh r2, [r3, #0] + color2 = colswp; + 8004d0a: 183b adds r3, r7, r0 + 8004d0c: 187a adds r2, r7, r1 + 8004d0e: 8812 ldrh r2, [r2, #0] + 8004d10: 801a strh r2, [r3, #0] dx += 2; - 8004d0a: 2114 movs r1, #20 - 8004d0c: 187b adds r3, r7, r1 - 8004d0e: 881b ldrh r3, [r3, #0] - 8004d10: 3302 adds r3, #2 - 8004d12: b29a uxth r2, r3 + 8004d12: 2114 movs r1, #20 8004d14: 187b adds r3, r7, r1 - 8004d16: 801a strh r2, [r3, #0] - dy = 2; - 8004d18: 2312 movs r3, #18 - 8004d1a: 18fb adds r3, r7, r3 - 8004d1c: 2202 movs r2, #2 + 8004d16: 881b ldrh r3, [r3, #0] + 8004d18: 3302 adds r3, #2 + 8004d1a: b29a uxth r2, r3 + 8004d1c: 187b adds r3, r7, r1 8004d1e: 801a strh r2, [r3, #0] - 8004d20: e002 b.n 8004d28 - 8004d22: 46c0 nop ; (mov r8, r8) - 8004d24: 2000003f .word 0x2000003f + dy = 2; + 8004d20: 2312 movs r3, #18 + 8004d22: 18fb adds r3, r7, r3 + 8004d24: 2202 movs r2, #2 + 8004d26: 801a strh r2, [r3, #0] + 8004d28: e002 b.n 8004d30 + 8004d2a: 46c0 nop ; (mov r8, r8) + 8004d2c: 2000003f .word 0x2000003f } ST7793_DrawLine(color,x,y,x2-1,y); - 8004d28: 252c movs r5, #44 ; 0x2c - 8004d2a: 2208 movs r2, #8 - 8004d2c: 18ab adds r3, r5, r2 - 8004d2e: 19db adds r3, r3, r7 - 8004d30: 881b ldrh r3, [r3, #0] - 8004d32: 3b01 subs r3, #1 - 8004d34: b29c uxth r4, r3 - 8004d36: 2628 movs r6, #40 ; 0x28 - 8004d38: 18b1 adds r1, r6, r2 - 8004d3a: 19cb adds r3, r1, r7 - 8004d3c: 881a ldrh r2, [r3, #0] - 8004d3e: 003b movs r3, r7 - 8004d40: 8819 ldrh r1, [r3, #0] - 8004d42: 1d3b adds r3, r7, #4 - 8004d44: 8818 ldrh r0, [r3, #0] - 8004d46: 2308 movs r3, #8 - 8004d48: 18f3 adds r3, r6, r3 - 8004d4a: 19db adds r3, r3, r7 - 8004d4c: 881b ldrh r3, [r3, #0] - 8004d4e: 9300 str r3, [sp, #0] - 8004d50: 0023 movs r3, r4 - 8004d52: f7ff fad7 bl 8004304 + 8004d30: 252c movs r5, #44 ; 0x2c + 8004d32: 2208 movs r2, #8 + 8004d34: 18ab adds r3, r5, r2 + 8004d36: 19db adds r3, r3, r7 + 8004d38: 881b ldrh r3, [r3, #0] + 8004d3a: 3b01 subs r3, #1 + 8004d3c: b29c uxth r4, r3 + 8004d3e: 2628 movs r6, #40 ; 0x28 + 8004d40: 18b1 adds r1, r6, r2 + 8004d42: 19cb adds r3, r1, r7 + 8004d44: 881a ldrh r2, [r3, #0] + 8004d46: 003b movs r3, r7 + 8004d48: 8819 ldrh r1, [r3, #0] + 8004d4a: 1d3b adds r3, r7, #4 + 8004d4c: 8818 ldrh r0, [r3, #0] + 8004d4e: 2308 movs r3, #8 + 8004d50: 18f3 adds r3, r6, r3 + 8004d52: 19db adds r3, r3, r7 + 8004d54: 881b ldrh r3, [r3, #0] + 8004d56: 9300 str r3, [sp, #0] + 8004d58: 0023 movs r3, r4 + 8004d5a: f7ff fad7 bl 800430c ST7793_DrawLine(color,x,y+1,x2-2,y+1); - 8004d56: 2208 movs r2, #8 - 8004d58: 18b3 adds r3, r6, r2 - 8004d5a: 19db adds r3, r3, r7 - 8004d5c: 881b ldrh r3, [r3, #0] - 8004d5e: 3301 adds r3, #1 - 8004d60: b29c uxth r4, r3 - 8004d62: 18ab adds r3, r5, r2 - 8004d64: 19db adds r3, r3, r7 - 8004d66: 881b ldrh r3, [r3, #0] - 8004d68: 3b02 subs r3, #2 - 8004d6a: b29d uxth r5, r3 - 8004d6c: 18b3 adds r3, r6, r2 - 8004d6e: 19db adds r3, r3, r7 - 8004d70: 881b ldrh r3, [r3, #0] - 8004d72: 3301 adds r3, #1 - 8004d74: b29b uxth r3, r3 - 8004d76: 003a movs r2, r7 - 8004d78: 8811 ldrh r1, [r2, #0] - 8004d7a: 1d3a adds r2, r7, #4 - 8004d7c: 8810 ldrh r0, [r2, #0] - 8004d7e: 9300 str r3, [sp, #0] - 8004d80: 002b movs r3, r5 - 8004d82: 0022 movs r2, r4 - 8004d84: f7ff fabe bl 8004304 + 8004d5e: 2208 movs r2, #8 + 8004d60: 18b3 adds r3, r6, r2 + 8004d62: 19db adds r3, r3, r7 + 8004d64: 881b ldrh r3, [r3, #0] + 8004d66: 3301 adds r3, #1 + 8004d68: b29c uxth r4, r3 + 8004d6a: 18ab adds r3, r5, r2 + 8004d6c: 19db adds r3, r3, r7 + 8004d6e: 881b ldrh r3, [r3, #0] + 8004d70: 3b02 subs r3, #2 + 8004d72: b29d uxth r5, r3 + 8004d74: 18b3 adds r3, r6, r2 + 8004d76: 19db adds r3, r3, r7 + 8004d78: 881b ldrh r3, [r3, #0] + 8004d7a: 3301 adds r3, #1 + 8004d7c: b29b uxth r3, r3 + 8004d7e: 003a movs r2, r7 + 8004d80: 8811 ldrh r1, [r2, #0] + 8004d82: 1d3a adds r2, r7, #4 + 8004d84: 8810 ldrh r0, [r2, #0] + 8004d86: 9300 str r3, [sp, #0] + 8004d88: 002b movs r3, r5 + 8004d8a: 0022 movs r2, r4 + 8004d8c: f7ff fabe bl 800430c ST7793_DrawLine(color,x,y+2,x2-3,y+2); - 8004d88: 2208 movs r2, #8 - 8004d8a: 18b3 adds r3, r6, r2 - 8004d8c: 19db adds r3, r3, r7 - 8004d8e: 881b ldrh r3, [r3, #0] - 8004d90: 3302 adds r3, #2 - 8004d92: b29c uxth r4, r3 - 8004d94: 252c movs r5, #44 ; 0x2c - 8004d96: 18ab adds r3, r5, r2 - 8004d98: 19db adds r3, r3, r7 - 8004d9a: 881b ldrh r3, [r3, #0] - 8004d9c: 3b03 subs r3, #3 - 8004d9e: b29d uxth r5, r3 - 8004da0: 18b3 adds r3, r6, r2 - 8004da2: 19db adds r3, r3, r7 - 8004da4: 881b ldrh r3, [r3, #0] - 8004da6: 3302 adds r3, #2 - 8004da8: b29b uxth r3, r3 - 8004daa: 003a movs r2, r7 - 8004dac: 8811 ldrh r1, [r2, #0] - 8004dae: 1d3a adds r2, r7, #4 - 8004db0: 8810 ldrh r0, [r2, #0] - 8004db2: 9300 str r3, [sp, #0] - 8004db4: 002b movs r3, r5 - 8004db6: 0022 movs r2, r4 - 8004db8: f7ff faa4 bl 8004304 + 8004d90: 2208 movs r2, #8 + 8004d92: 18b3 adds r3, r6, r2 + 8004d94: 19db adds r3, r3, r7 + 8004d96: 881b ldrh r3, [r3, #0] + 8004d98: 3302 adds r3, #2 + 8004d9a: b29c uxth r4, r3 + 8004d9c: 252c movs r5, #44 ; 0x2c + 8004d9e: 18ab adds r3, r5, r2 + 8004da0: 19db adds r3, r3, r7 + 8004da2: 881b ldrh r3, [r3, #0] + 8004da4: 3b03 subs r3, #3 + 8004da6: b29d uxth r5, r3 + 8004da8: 18b3 adds r3, r6, r2 + 8004daa: 19db adds r3, r3, r7 + 8004dac: 881b ldrh r3, [r3, #0] + 8004dae: 3302 adds r3, #2 + 8004db0: b29b uxth r3, r3 + 8004db2: 003a movs r2, r7 + 8004db4: 8811 ldrh r1, [r2, #0] + 8004db6: 1d3a adds r2, r7, #4 + 8004db8: 8810 ldrh r0, [r2, #0] + 8004dba: 9300 str r3, [sp, #0] + 8004dbc: 002b movs r3, r5 + 8004dbe: 0022 movs r2, r4 + 8004dc0: f7ff faa4 bl 800430c ST7793_DrawLine(color,x,y+3,x,y2-1); - 8004dbc: 2208 movs r2, #8 - 8004dbe: 18b3 adds r3, r6, r2 - 8004dc0: 19db adds r3, r3, r7 - 8004dc2: 881b ldrh r3, [r3, #0] - 8004dc4: 3303 adds r3, #3 - 8004dc6: b29c uxth r4, r3 - 8004dc8: 2330 movs r3, #48 ; 0x30 - 8004dca: 189b adds r3, r3, r2 - 8004dcc: 19db adds r3, r3, r7 - 8004dce: 881b ldrh r3, [r3, #0] - 8004dd0: 3b01 subs r3, #1 - 8004dd2: b29b uxth r3, r3 - 8004dd4: 003a movs r2, r7 - 8004dd6: 8815 ldrh r5, [r2, #0] - 8004dd8: 003a movs r2, r7 - 8004dda: 8811 ldrh r1, [r2, #0] - 8004ddc: 1d3a adds r2, r7, #4 - 8004dde: 8810 ldrh r0, [r2, #0] - 8004de0: 9300 str r3, [sp, #0] - 8004de2: 002b movs r3, r5 - 8004de4: 0022 movs r2, r4 - 8004de6: f7ff fa8d bl 8004304 + 8004dc4: 2208 movs r2, #8 + 8004dc6: 18b3 adds r3, r6, r2 + 8004dc8: 19db adds r3, r3, r7 + 8004dca: 881b ldrh r3, [r3, #0] + 8004dcc: 3303 adds r3, #3 + 8004dce: b29c uxth r4, r3 + 8004dd0: 2330 movs r3, #48 ; 0x30 + 8004dd2: 189b adds r3, r3, r2 + 8004dd4: 19db adds r3, r3, r7 + 8004dd6: 881b ldrh r3, [r3, #0] + 8004dd8: 3b01 subs r3, #1 + 8004dda: b29b uxth r3, r3 + 8004ddc: 003a movs r2, r7 + 8004dde: 8815 ldrh r5, [r2, #0] + 8004de0: 003a movs r2, r7 + 8004de2: 8811 ldrh r1, [r2, #0] + 8004de4: 1d3a adds r2, r7, #4 + 8004de6: 8810 ldrh r0, [r2, #0] + 8004de8: 9300 str r3, [sp, #0] + 8004dea: 002b movs r3, r5 + 8004dec: 0022 movs r2, r4 + 8004dee: f7ff fa8d bl 800430c ST7793_DrawLine(color,x+1,y+3,x+1,y2-2); - 8004dea: 003b movs r3, r7 - 8004dec: 881b ldrh r3, [r3, #0] - 8004dee: 3301 adds r3, #1 - 8004df0: b299 uxth r1, r3 - 8004df2: 2208 movs r2, #8 - 8004df4: 18b3 adds r3, r6, r2 - 8004df6: 19db adds r3, r3, r7 - 8004df8: 881b ldrh r3, [r3, #0] - 8004dfa: 3303 adds r3, #3 - 8004dfc: b29c uxth r4, r3 - 8004dfe: 003b movs r3, r7 + 8004df2: 003b movs r3, r7 + 8004df4: 881b ldrh r3, [r3, #0] + 8004df6: 3301 adds r3, #1 + 8004df8: b299 uxth r1, r3 + 8004dfa: 2208 movs r2, #8 + 8004dfc: 18b3 adds r3, r6, r2 + 8004dfe: 19db adds r3, r3, r7 8004e00: 881b ldrh r3, [r3, #0] - 8004e02: 3301 adds r3, #1 - 8004e04: b29d uxth r5, r3 - 8004e06: 2330 movs r3, #48 ; 0x30 - 8004e08: 189b adds r3, r3, r2 - 8004e0a: 19db adds r3, r3, r7 - 8004e0c: 881b ldrh r3, [r3, #0] - 8004e0e: 3b02 subs r3, #2 - 8004e10: b29b uxth r3, r3 - 8004e12: 1d3a adds r2, r7, #4 - 8004e14: 8810 ldrh r0, [r2, #0] - 8004e16: 9300 str r3, [sp, #0] - 8004e18: 002b movs r3, r5 - 8004e1a: 0022 movs r2, r4 - 8004e1c: f7ff fa72 bl 8004304 + 8004e02: 3303 adds r3, #3 + 8004e04: b29c uxth r4, r3 + 8004e06: 003b movs r3, r7 + 8004e08: 881b ldrh r3, [r3, #0] + 8004e0a: 3301 adds r3, #1 + 8004e0c: b29d uxth r5, r3 + 8004e0e: 2330 movs r3, #48 ; 0x30 + 8004e10: 189b adds r3, r3, r2 + 8004e12: 19db adds r3, r3, r7 + 8004e14: 881b ldrh r3, [r3, #0] + 8004e16: 3b02 subs r3, #2 + 8004e18: b29b uxth r3, r3 + 8004e1a: 1d3a adds r2, r7, #4 + 8004e1c: 8810 ldrh r0, [r2, #0] + 8004e1e: 9300 str r3, [sp, #0] + 8004e20: 002b movs r3, r5 + 8004e22: 0022 movs r2, r4 + 8004e24: f7ff fa72 bl 800430c ST7793_DrawLine(color,x+2,y+3,x+2,y2-3); - 8004e20: 003b movs r3, r7 - 8004e22: 881b ldrh r3, [r3, #0] - 8004e24: 3302 adds r3, #2 - 8004e26: b299 uxth r1, r3 - 8004e28: 2208 movs r2, #8 - 8004e2a: 18b3 adds r3, r6, r2 - 8004e2c: 19db adds r3, r3, r7 - 8004e2e: 881b ldrh r3, [r3, #0] - 8004e30: 3303 adds r3, #3 - 8004e32: b29c uxth r4, r3 - 8004e34: 003b movs r3, r7 + 8004e28: 003b movs r3, r7 + 8004e2a: 881b ldrh r3, [r3, #0] + 8004e2c: 3302 adds r3, #2 + 8004e2e: b299 uxth r1, r3 + 8004e30: 2208 movs r2, #8 + 8004e32: 18b3 adds r3, r6, r2 + 8004e34: 19db adds r3, r3, r7 8004e36: 881b ldrh r3, [r3, #0] - 8004e38: 3302 adds r3, #2 - 8004e3a: b29d uxth r5, r3 - 8004e3c: 2330 movs r3, #48 ; 0x30 - 8004e3e: 189b adds r3, r3, r2 - 8004e40: 19db adds r3, r3, r7 - 8004e42: 881b ldrh r3, [r3, #0] - 8004e44: 3b03 subs r3, #3 - 8004e46: b29b uxth r3, r3 - 8004e48: 1d3a adds r2, r7, #4 - 8004e4a: 8810 ldrh r0, [r2, #0] - 8004e4c: 9300 str r3, [sp, #0] - 8004e4e: 002b movs r3, r5 - 8004e50: 0022 movs r2, r4 - 8004e52: f7ff fa57 bl 8004304 + 8004e38: 3303 adds r3, #3 + 8004e3a: b29c uxth r4, r3 + 8004e3c: 003b movs r3, r7 + 8004e3e: 881b ldrh r3, [r3, #0] + 8004e40: 3302 adds r3, #2 + 8004e42: b29d uxth r5, r3 + 8004e44: 2330 movs r3, #48 ; 0x30 + 8004e46: 189b adds r3, r3, r2 + 8004e48: 19db adds r3, r3, r7 + 8004e4a: 881b ldrh r3, [r3, #0] + 8004e4c: 3b03 subs r3, #3 + 8004e4e: b29b uxth r3, r3 + 8004e50: 1d3a adds r2, r7, #4 + 8004e52: 8810 ldrh r0, [r2, #0] + 8004e54: 9300 str r3, [sp, #0] + 8004e56: 002b movs r3, r5 + 8004e58: 0022 movs r2, r4 + 8004e5a: f7ff fa57 bl 800430c ST7793_DrawLine(color2,x,y2,x2-1,y2); - 8004e56: 222c movs r2, #44 ; 0x2c - 8004e58: 2008 movs r0, #8 - 8004e5a: 1813 adds r3, r2, r0 - 8004e5c: 19db adds r3, r3, r7 - 8004e5e: 881b ldrh r3, [r3, #0] - 8004e60: 3b01 subs r3, #1 - 8004e62: b29c uxth r4, r3 - 8004e64: 2530 movs r5, #48 ; 0x30 - 8004e66: 182a adds r2, r5, r0 - 8004e68: 19d3 adds r3, r2, r7 - 8004e6a: 881a ldrh r2, [r3, #0] - 8004e6c: 003b movs r3, r7 - 8004e6e: 8819 ldrh r1, [r3, #0] - 8004e70: 2316 movs r3, #22 - 8004e72: 18fb adds r3, r7, r3 - 8004e74: 8818 ldrh r0, [r3, #0] - 8004e76: 2308 movs r3, #8 - 8004e78: 18eb adds r3, r5, r3 - 8004e7a: 19db adds r3, r3, r7 - 8004e7c: 881b ldrh r3, [r3, #0] - 8004e7e: 9300 str r3, [sp, #0] - 8004e80: 0023 movs r3, r4 - 8004e82: f7ff fa3f bl 8004304 + 8004e5e: 222c movs r2, #44 ; 0x2c + 8004e60: 2008 movs r0, #8 + 8004e62: 1813 adds r3, r2, r0 + 8004e64: 19db adds r3, r3, r7 + 8004e66: 881b ldrh r3, [r3, #0] + 8004e68: 3b01 subs r3, #1 + 8004e6a: b29c uxth r4, r3 + 8004e6c: 2530 movs r5, #48 ; 0x30 + 8004e6e: 182a adds r2, r5, r0 + 8004e70: 19d3 adds r3, r2, r7 + 8004e72: 881a ldrh r2, [r3, #0] + 8004e74: 003b movs r3, r7 + 8004e76: 8819 ldrh r1, [r3, #0] + 8004e78: 2316 movs r3, #22 + 8004e7a: 18fb adds r3, r7, r3 + 8004e7c: 8818 ldrh r0, [r3, #0] + 8004e7e: 2308 movs r3, #8 + 8004e80: 18eb adds r3, r5, r3 + 8004e82: 19db adds r3, r3, r7 + 8004e84: 881b ldrh r3, [r3, #0] + 8004e86: 9300 str r3, [sp, #0] + 8004e88: 0023 movs r3, r4 + 8004e8a: f7ff fa3f bl 800430c ST7793_DrawLine(color2,x+1,y2-1,x2-1,y2-1); - 8004e86: 003b movs r3, r7 - 8004e88: 881b ldrh r3, [r3, #0] - 8004e8a: 3301 adds r3, #1 - 8004e8c: b299 uxth r1, r3 - 8004e8e: 002a movs r2, r5 - 8004e90: 2008 movs r0, #8 - 8004e92: 1813 adds r3, r2, r0 - 8004e94: 19db adds r3, r3, r7 - 8004e96: 881b ldrh r3, [r3, #0] - 8004e98: 3b01 subs r3, #1 - 8004e9a: b29c uxth r4, r3 - 8004e9c: 252c movs r5, #44 ; 0x2c - 8004e9e: 182b adds r3, r5, r0 - 8004ea0: 19db adds r3, r3, r7 - 8004ea2: 881b ldrh r3, [r3, #0] - 8004ea4: 3b01 subs r3, #1 - 8004ea6: b29d uxth r5, r3 - 8004ea8: 1813 adds r3, r2, r0 - 8004eaa: 19db adds r3, r3, r7 - 8004eac: 881b ldrh r3, [r3, #0] - 8004eae: 3b01 subs r3, #1 - 8004eb0: b29b uxth r3, r3 - 8004eb2: 2016 movs r0, #22 - 8004eb4: 183a adds r2, r7, r0 - 8004eb6: 8810 ldrh r0, [r2, #0] - 8004eb8: 9300 str r3, [sp, #0] - 8004eba: 002b movs r3, r5 - 8004ebc: 0022 movs r2, r4 - 8004ebe: f7ff fa21 bl 8004304 + 8004e8e: 003b movs r3, r7 + 8004e90: 881b ldrh r3, [r3, #0] + 8004e92: 3301 adds r3, #1 + 8004e94: b299 uxth r1, r3 + 8004e96: 002a movs r2, r5 + 8004e98: 2008 movs r0, #8 + 8004e9a: 1813 adds r3, r2, r0 + 8004e9c: 19db adds r3, r3, r7 + 8004e9e: 881b ldrh r3, [r3, #0] + 8004ea0: 3b01 subs r3, #1 + 8004ea2: b29c uxth r4, r3 + 8004ea4: 252c movs r5, #44 ; 0x2c + 8004ea6: 182b adds r3, r5, r0 + 8004ea8: 19db adds r3, r3, r7 + 8004eaa: 881b ldrh r3, [r3, #0] + 8004eac: 3b01 subs r3, #1 + 8004eae: b29d uxth r5, r3 + 8004eb0: 1813 adds r3, r2, r0 + 8004eb2: 19db adds r3, r3, r7 + 8004eb4: 881b ldrh r3, [r3, #0] + 8004eb6: 3b01 subs r3, #1 + 8004eb8: b29b uxth r3, r3 + 8004eba: 2016 movs r0, #22 + 8004ebc: 183a adds r2, r7, r0 + 8004ebe: 8810 ldrh r0, [r2, #0] + 8004ec0: 9300 str r3, [sp, #0] + 8004ec2: 002b movs r3, r5 + 8004ec4: 0022 movs r2, r4 + 8004ec6: f7ff fa21 bl 800430c ST7793_DrawLine(color2,x+2,y2-2,x2-1,y2-2); - 8004ec2: 003b movs r3, r7 - 8004ec4: 881b ldrh r3, [r3, #0] - 8004ec6: 3302 adds r3, #2 - 8004ec8: b299 uxth r1, r3 - 8004eca: 2230 movs r2, #48 ; 0x30 - 8004ecc: 2008 movs r0, #8 - 8004ece: 1813 adds r3, r2, r0 - 8004ed0: 19db adds r3, r3, r7 - 8004ed2: 881b ldrh r3, [r3, #0] - 8004ed4: 3b02 subs r3, #2 - 8004ed6: b29c uxth r4, r3 - 8004ed8: 252c movs r5, #44 ; 0x2c - 8004eda: 182b adds r3, r5, r0 - 8004edc: 19db adds r3, r3, r7 - 8004ede: 881b ldrh r3, [r3, #0] - 8004ee0: 3b01 subs r3, #1 - 8004ee2: b29d uxth r5, r3 - 8004ee4: 1813 adds r3, r2, r0 - 8004ee6: 19db adds r3, r3, r7 - 8004ee8: 881b ldrh r3, [r3, #0] - 8004eea: 3b02 subs r3, #2 - 8004eec: b29b uxth r3, r3 - 8004eee: 2016 movs r0, #22 - 8004ef0: 183a adds r2, r7, r0 - 8004ef2: 8810 ldrh r0, [r2, #0] - 8004ef4: 9300 str r3, [sp, #0] - 8004ef6: 002b movs r3, r5 - 8004ef8: 0022 movs r2, r4 - 8004efa: f7ff fa03 bl 8004304 + 8004eca: 003b movs r3, r7 + 8004ecc: 881b ldrh r3, [r3, #0] + 8004ece: 3302 adds r3, #2 + 8004ed0: b299 uxth r1, r3 + 8004ed2: 2230 movs r2, #48 ; 0x30 + 8004ed4: 2008 movs r0, #8 + 8004ed6: 1813 adds r3, r2, r0 + 8004ed8: 19db adds r3, r3, r7 + 8004eda: 881b ldrh r3, [r3, #0] + 8004edc: 3b02 subs r3, #2 + 8004ede: b29c uxth r4, r3 + 8004ee0: 252c movs r5, #44 ; 0x2c + 8004ee2: 182b adds r3, r5, r0 + 8004ee4: 19db adds r3, r3, r7 + 8004ee6: 881b ldrh r3, [r3, #0] + 8004ee8: 3b01 subs r3, #1 + 8004eea: b29d uxth r5, r3 + 8004eec: 1813 adds r3, r2, r0 + 8004eee: 19db adds r3, r3, r7 + 8004ef0: 881b ldrh r3, [r3, #0] + 8004ef2: 3b02 subs r3, #2 + 8004ef4: b29b uxth r3, r3 + 8004ef6: 2016 movs r0, #22 + 8004ef8: 183a adds r2, r7, r0 + 8004efa: 8810 ldrh r0, [r2, #0] + 8004efc: 9300 str r3, [sp, #0] + 8004efe: 002b movs r3, r5 + 8004f00: 0022 movs r2, r4 + 8004f02: f7ff fa03 bl 800430c ST7793_DrawLine(color2,x2-3,y+3,x2-3,y2-3); - 8004efe: 202c movs r0, #44 ; 0x2c - 8004f00: 2208 movs r2, #8 - 8004f02: 1883 adds r3, r0, r2 - 8004f04: 19db adds r3, r3, r7 - 8004f06: 881b ldrh r3, [r3, #0] - 8004f08: 3b03 subs r3, #3 - 8004f0a: b299 uxth r1, r3 - 8004f0c: 18b3 adds r3, r6, r2 - 8004f0e: 19db adds r3, r3, r7 - 8004f10: 881b ldrh r3, [r3, #0] - 8004f12: 3303 adds r3, #3 - 8004f14: b29c uxth r4, r3 - 8004f16: 1880 adds r0, r0, r2 - 8004f18: 19c3 adds r3, r0, r7 - 8004f1a: 881b ldrh r3, [r3, #0] - 8004f1c: 3b03 subs r3, #3 - 8004f1e: b29d uxth r5, r3 - 8004f20: 2230 movs r2, #48 ; 0x30 - 8004f22: 2308 movs r3, #8 - 8004f24: 18d0 adds r0, r2, r3 - 8004f26: 19c3 adds r3, r0, r7 - 8004f28: 881b ldrh r3, [r3, #0] - 8004f2a: 3b03 subs r3, #3 - 8004f2c: b29b uxth r3, r3 - 8004f2e: 2216 movs r2, #22 - 8004f30: 18ba adds r2, r7, r2 - 8004f32: 8810 ldrh r0, [r2, #0] - 8004f34: 9300 str r3, [sp, #0] - 8004f36: 002b movs r3, r5 - 8004f38: 0022 movs r2, r4 - 8004f3a: f7ff f9e3 bl 8004304 + 8004f06: 202c movs r0, #44 ; 0x2c + 8004f08: 2208 movs r2, #8 + 8004f0a: 1883 adds r3, r0, r2 + 8004f0c: 19db adds r3, r3, r7 + 8004f0e: 881b ldrh r3, [r3, #0] + 8004f10: 3b03 subs r3, #3 + 8004f12: b299 uxth r1, r3 + 8004f14: 18b3 adds r3, r6, r2 + 8004f16: 19db adds r3, r3, r7 + 8004f18: 881b ldrh r3, [r3, #0] + 8004f1a: 3303 adds r3, #3 + 8004f1c: b29c uxth r4, r3 + 8004f1e: 1880 adds r0, r0, r2 + 8004f20: 19c3 adds r3, r0, r7 + 8004f22: 881b ldrh r3, [r3, #0] + 8004f24: 3b03 subs r3, #3 + 8004f26: b29d uxth r5, r3 + 8004f28: 2230 movs r2, #48 ; 0x30 + 8004f2a: 2308 movs r3, #8 + 8004f2c: 18d0 adds r0, r2, r3 + 8004f2e: 19c3 adds r3, r0, r7 + 8004f30: 881b ldrh r3, [r3, #0] + 8004f32: 3b03 subs r3, #3 + 8004f34: b29b uxth r3, r3 + 8004f36: 2216 movs r2, #22 + 8004f38: 18ba adds r2, r7, r2 + 8004f3a: 8810 ldrh r0, [r2, #0] + 8004f3c: 9300 str r3, [sp, #0] + 8004f3e: 002b movs r3, r5 + 8004f40: 0022 movs r2, r4 + 8004f42: f7ff f9e3 bl 800430c ST7793_DrawLine(color2,x2-2,y+2,x2-2,y2-3); - 8004f3e: 202c movs r0, #44 ; 0x2c - 8004f40: 2208 movs r2, #8 - 8004f42: 1883 adds r3, r0, r2 - 8004f44: 19db adds r3, r3, r7 - 8004f46: 881b ldrh r3, [r3, #0] - 8004f48: 3b02 subs r3, #2 - 8004f4a: b299 uxth r1, r3 - 8004f4c: 18b3 adds r3, r6, r2 - 8004f4e: 19db adds r3, r3, r7 - 8004f50: 881b ldrh r3, [r3, #0] - 8004f52: 3302 adds r3, #2 - 8004f54: b29c uxth r4, r3 - 8004f56: 1880 adds r0, r0, r2 - 8004f58: 19c3 adds r3, r0, r7 - 8004f5a: 881b ldrh r3, [r3, #0] - 8004f5c: 3b02 subs r3, #2 - 8004f5e: b29d uxth r5, r3 - 8004f60: 2230 movs r2, #48 ; 0x30 - 8004f62: 2308 movs r3, #8 - 8004f64: 18d0 adds r0, r2, r3 - 8004f66: 19c3 adds r3, r0, r7 - 8004f68: 881b ldrh r3, [r3, #0] - 8004f6a: 3b03 subs r3, #3 - 8004f6c: b29b uxth r3, r3 - 8004f6e: 2216 movs r2, #22 - 8004f70: 18ba adds r2, r7, r2 - 8004f72: 8810 ldrh r0, [r2, #0] - 8004f74: 9300 str r3, [sp, #0] - 8004f76: 002b movs r3, r5 - 8004f78: 0022 movs r2, r4 - 8004f7a: f7ff f9c3 bl 8004304 + 8004f46: 202c movs r0, #44 ; 0x2c + 8004f48: 2208 movs r2, #8 + 8004f4a: 1883 adds r3, r0, r2 + 8004f4c: 19db adds r3, r3, r7 + 8004f4e: 881b ldrh r3, [r3, #0] + 8004f50: 3b02 subs r3, #2 + 8004f52: b299 uxth r1, r3 + 8004f54: 18b3 adds r3, r6, r2 + 8004f56: 19db adds r3, r3, r7 + 8004f58: 881b ldrh r3, [r3, #0] + 8004f5a: 3302 adds r3, #2 + 8004f5c: b29c uxth r4, r3 + 8004f5e: 1880 adds r0, r0, r2 + 8004f60: 19c3 adds r3, r0, r7 + 8004f62: 881b ldrh r3, [r3, #0] + 8004f64: 3b02 subs r3, #2 + 8004f66: b29d uxth r5, r3 + 8004f68: 2230 movs r2, #48 ; 0x30 + 8004f6a: 2308 movs r3, #8 + 8004f6c: 18d0 adds r0, r2, r3 + 8004f6e: 19c3 adds r3, r0, r7 + 8004f70: 881b ldrh r3, [r3, #0] + 8004f72: 3b03 subs r3, #3 + 8004f74: b29b uxth r3, r3 + 8004f76: 2216 movs r2, #22 + 8004f78: 18ba adds r2, r7, r2 + 8004f7a: 8810 ldrh r0, [r2, #0] + 8004f7c: 9300 str r3, [sp, #0] + 8004f7e: 002b movs r3, r5 + 8004f80: 0022 movs r2, r4 + 8004f82: f7ff f9c3 bl 800430c ST7793_DrawLine(color2,x2-1,y+1,x2-1,y2-3); - 8004f7e: 202c movs r0, #44 ; 0x2c - 8004f80: 2208 movs r2, #8 - 8004f82: 1883 adds r3, r0, r2 - 8004f84: 19db adds r3, r3, r7 - 8004f86: 881b ldrh r3, [r3, #0] - 8004f88: 3b01 subs r3, #1 - 8004f8a: b299 uxth r1, r3 - 8004f8c: 18b3 adds r3, r6, r2 - 8004f8e: 19db adds r3, r3, r7 - 8004f90: 881b ldrh r3, [r3, #0] - 8004f92: 3301 adds r3, #1 - 8004f94: b29c uxth r4, r3 - 8004f96: 1880 adds r0, r0, r2 - 8004f98: 19c3 adds r3, r0, r7 - 8004f9a: 881b ldrh r3, [r3, #0] - 8004f9c: 3b01 subs r3, #1 - 8004f9e: b29d uxth r5, r3 - 8004fa0: 2230 movs r2, #48 ; 0x30 - 8004fa2: 2308 movs r3, #8 - 8004fa4: 18d0 adds r0, r2, r3 - 8004fa6: 19c3 adds r3, r0, r7 - 8004fa8: 881b ldrh r3, [r3, #0] - 8004faa: 3b03 subs r3, #3 - 8004fac: b29b uxth r3, r3 - 8004fae: 2216 movs r2, #22 - 8004fb0: 18ba adds r2, r7, r2 - 8004fb2: 8810 ldrh r0, [r2, #0] - 8004fb4: 9300 str r3, [sp, #0] - 8004fb6: 002b movs r3, r5 - 8004fb8: 0022 movs r2, r4 - 8004fba: f7ff f9a3 bl 8004304 + 8004f86: 202c movs r0, #44 ; 0x2c + 8004f88: 2208 movs r2, #8 + 8004f8a: 1883 adds r3, r0, r2 + 8004f8c: 19db adds r3, r3, r7 + 8004f8e: 881b ldrh r3, [r3, #0] + 8004f90: 3b01 subs r3, #1 + 8004f92: b299 uxth r1, r3 + 8004f94: 18b3 adds r3, r6, r2 + 8004f96: 19db adds r3, r3, r7 + 8004f98: 881b ldrh r3, [r3, #0] + 8004f9a: 3301 adds r3, #1 + 8004f9c: b29c uxth r4, r3 + 8004f9e: 1880 adds r0, r0, r2 + 8004fa0: 19c3 adds r3, r0, r7 + 8004fa2: 881b ldrh r3, [r3, #0] + 8004fa4: 3b01 subs r3, #1 + 8004fa6: b29d uxth r5, r3 + 8004fa8: 2230 movs r2, #48 ; 0x30 + 8004faa: 2308 movs r3, #8 + 8004fac: 18d0 adds r0, r2, r3 + 8004fae: 19c3 adds r3, r0, r7 + 8004fb0: 881b ldrh r3, [r3, #0] + 8004fb2: 3b03 subs r3, #3 + 8004fb4: b29b uxth r3, r3 + 8004fb6: 2216 movs r2, #22 + 8004fb8: 18ba adds r2, r7, r2 + 8004fba: 8810 ldrh r0, [r2, #0] + 8004fbc: 9300 str r3, [sp, #0] + 8004fbe: 002b movs r3, r5 + 8004fc0: 0022 movs r2, r4 + 8004fc2: f7ff f9a3 bl 800430c ST7793_FillRect(color1,x+3,y+3,x2-4,y2-3); - 8004fbe: 003b movs r3, r7 - 8004fc0: 881b ldrh r3, [r3, #0] - 8004fc2: 3303 adds r3, #3 - 8004fc4: b299 uxth r1, r3 - 8004fc6: 2208 movs r2, #8 - 8004fc8: 18b3 adds r3, r6, r2 - 8004fca: 19db adds r3, r3, r7 - 8004fcc: 881b ldrh r3, [r3, #0] - 8004fce: 3303 adds r3, #3 - 8004fd0: b29c uxth r4, r3 - 8004fd2: 202c movs r0, #44 ; 0x2c - 8004fd4: 1883 adds r3, r0, r2 - 8004fd6: 19db adds r3, r3, r7 - 8004fd8: 881b ldrh r3, [r3, #0] - 8004fda: 3b04 subs r3, #4 - 8004fdc: b29d uxth r5, r3 - 8004fde: 2230 movs r2, #48 ; 0x30 - 8004fe0: 2008 movs r0, #8 - 8004fe2: 1813 adds r3, r2, r0 - 8004fe4: 19db adds r3, r3, r7 - 8004fe6: 881b ldrh r3, [r3, #0] - 8004fe8: 3b03 subs r3, #3 - 8004fea: b29b uxth r3, r3 - 8004fec: 200e movs r0, #14 - 8004fee: 183a adds r2, r7, r0 - 8004ff0: 8810 ldrh r0, [r2, #0] - 8004ff2: 9300 str r3, [sp, #0] - 8004ff4: 002b movs r3, r5 - 8004ff6: 0022 movs r2, r4 - 8004ff8: f7ff f882 bl 8004100 + 8004fc6: 003b movs r3, r7 + 8004fc8: 881b ldrh r3, [r3, #0] + 8004fca: 3303 adds r3, #3 + 8004fcc: b299 uxth r1, r3 + 8004fce: 2208 movs r2, #8 + 8004fd0: 18b3 adds r3, r6, r2 + 8004fd2: 19db adds r3, r3, r7 + 8004fd4: 881b ldrh r3, [r3, #0] + 8004fd6: 3303 adds r3, #3 + 8004fd8: b29c uxth r4, r3 + 8004fda: 202c movs r0, #44 ; 0x2c + 8004fdc: 1883 adds r3, r0, r2 + 8004fde: 19db adds r3, r3, r7 + 8004fe0: 881b ldrh r3, [r3, #0] + 8004fe2: 3b04 subs r3, #4 + 8004fe4: b29d uxth r5, r3 + 8004fe6: 2230 movs r2, #48 ; 0x30 + 8004fe8: 2008 movs r0, #8 + 8004fea: 1813 adds r3, r2, r0 + 8004fec: 19db adds r3, r3, r7 + 8004fee: 881b ldrh r3, [r3, #0] + 8004ff0: 3b03 subs r3, #3 + 8004ff2: b29b uxth r3, r3 + 8004ff4: 200e movs r0, #14 + 8004ff6: 183a adds r2, r7, r0 + 8004ff8: 8810 ldrh r0, [r2, #0] + 8004ffa: 9300 str r3, [sp, #0] + 8004ffc: 002b movs r3, r5 + 8004ffe: 0022 movs r2, r4 + 8005000: f7ff f882 bl 8004108 if (btn_type == BTN_TEXT) ST7793_DrawStringC(txtcolor,color1,data,x+dx,y+((y2-y-ST7793_CHAR_H*ST7793_FontSize)>>1)+dy); - 8004ffc: 1dfb adds r3, r7, #7 - 8004ffe: 781b ldrb r3, [r3, #0] - 8005000: 2b00 cmp r3, #0 - 8005002: d12e bne.n 8005062 - 8005004: 2314 movs r3, #20 - 8005006: 18fb adds r3, r7, r3 - 8005008: 881a ldrh r2, [r3, #0] - 800500a: 003b movs r3, r7 - 800500c: 881b ldrh r3, [r3, #0] - 800500e: 18d3 adds r3, r2, r3 - 8005010: b29d uxth r5, r3 - 8005012: 2230 movs r2, #48 ; 0x30 - 8005014: 2008 movs r0, #8 - 8005016: 1813 adds r3, r2, r0 - 8005018: 19db adds r3, r3, r7 - 800501a: 881a ldrh r2, [r3, #0] - 800501c: 1833 adds r3, r6, r0 - 800501e: 19db adds r3, r3, r7 - 8005020: 881b ldrh r3, [r3, #0] - 8005022: 1ad2 subs r2, r2, r3 - 8005024: 4b29 ldr r3, [pc, #164] ; (80050cc ) - 8005026: 781b ldrb r3, [r3, #0] - 8005028: 0019 movs r1, r3 - 800502a: 000b movs r3, r1 - 800502c: 0089 lsls r1, r1, #2 - 800502e: 1a5b subs r3, r3, r1 - 8005030: 009b lsls r3, r3, #2 - 8005032: 18d3 adds r3, r2, r3 - 8005034: 105b asrs r3, r3, #1 - 8005036: b29a uxth r2, r3 - 8005038: 1833 adds r3, r6, r0 - 800503a: 19db adds r3, r3, r7 - 800503c: 881b ldrh r3, [r3, #0] - 800503e: 18d3 adds r3, r2, r3 - 8005040: b29a uxth r2, r3 - 8005042: 2312 movs r3, #18 - 8005044: 18fb adds r3, r7, r3 - 8005046: 881b ldrh r3, [r3, #0] - 8005048: 18d3 adds r3, r2, r3 - 800504a: b29b uxth r3, r3 - 800504c: 6bfc ldr r4, [r7, #60] ; 0x3c - 800504e: 200e movs r0, #14 - 8005050: 183a adds r2, r7, r0 - 8005052: 8811 ldrh r1, [r2, #0] - 8005054: 1cba adds r2, r7, #2 - 8005056: 8810 ldrh r0, [r2, #0] - 8005058: 9300 str r3, [sp, #0] - 800505a: 002b movs r3, r5 - 800505c: 0022 movs r2, r4 - 800505e: f7ff fca1 bl 80049a4 + 8005004: 1dfb adds r3, r7, #7 + 8005006: 781b ldrb r3, [r3, #0] + 8005008: 2b00 cmp r3, #0 + 800500a: d12e bne.n 800506a + 800500c: 2314 movs r3, #20 + 800500e: 18fb adds r3, r7, r3 + 8005010: 881a ldrh r2, [r3, #0] + 8005012: 003b movs r3, r7 + 8005014: 881b ldrh r3, [r3, #0] + 8005016: 18d3 adds r3, r2, r3 + 8005018: b29d uxth r5, r3 + 800501a: 2230 movs r2, #48 ; 0x30 + 800501c: 2008 movs r0, #8 + 800501e: 1813 adds r3, r2, r0 + 8005020: 19db adds r3, r3, r7 + 8005022: 881a ldrh r2, [r3, #0] + 8005024: 1833 adds r3, r6, r0 + 8005026: 19db adds r3, r3, r7 + 8005028: 881b ldrh r3, [r3, #0] + 800502a: 1ad2 subs r2, r2, r3 + 800502c: 4b29 ldr r3, [pc, #164] ; (80050d4 ) + 800502e: 781b ldrb r3, [r3, #0] + 8005030: 0019 movs r1, r3 + 8005032: 000b movs r3, r1 + 8005034: 0089 lsls r1, r1, #2 + 8005036: 1a5b subs r3, r3, r1 + 8005038: 009b lsls r3, r3, #2 + 800503a: 18d3 adds r3, r2, r3 + 800503c: 105b asrs r3, r3, #1 + 800503e: b29a uxth r2, r3 + 8005040: 1833 adds r3, r6, r0 + 8005042: 19db adds r3, r3, r7 + 8005044: 881b ldrh r3, [r3, #0] + 8005046: 18d3 adds r3, r2, r3 + 8005048: b29a uxth r2, r3 + 800504a: 2312 movs r3, #18 + 800504c: 18fb adds r3, r7, r3 + 800504e: 881b ldrh r3, [r3, #0] + 8005050: 18d3 adds r3, r2, r3 + 8005052: b29b uxth r3, r3 + 8005054: 6bfc ldr r4, [r7, #60] ; 0x3c + 8005056: 200e movs r0, #14 + 8005058: 183a adds r2, r7, r0 + 800505a: 8811 ldrh r1, [r2, #0] + 800505c: 1cba adds r2, r7, #2 + 800505e: 8810 ldrh r0, [r2, #0] + 8005060: 9300 str r3, [sp, #0] + 8005062: 002b movs r3, r5 + 8005064: 0022 movs r2, r4 + 8005066: f7ff fca1 bl 80049ac if (btn_type == BTN_ICON) ST7793_Draw1bBitmap(txtcolor, color1, x+dx, y+((y2-y-h)>>1)+dy, data); - 8005062: 1dfb adds r3, r7, #7 - 8005064: 781b ldrb r3, [r3, #0] - 8005066: 2b01 cmp r3, #1 - 8005068: d12b bne.n 80050c2 - 800506a: 2314 movs r3, #20 - 800506c: 18fb adds r3, r7, r3 - 800506e: 881a ldrh r2, [r3, #0] - 8005070: 003b movs r3, r7 - 8005072: 881b ldrh r3, [r3, #0] - 8005074: 18d3 adds r3, r2, r3 - 8005076: b29c uxth r4, r3 - 8005078: 2330 movs r3, #48 ; 0x30 - 800507a: 2008 movs r0, #8 - 800507c: 181b adds r3, r3, r0 - 800507e: 19db adds r3, r3, r7 - 8005080: 881a ldrh r2, [r3, #0] - 8005082: 2128 movs r1, #40 ; 0x28 - 8005084: 180b adds r3, r1, r0 + 800506a: 1dfb adds r3, r7, #7 + 800506c: 781b ldrb r3, [r3, #0] + 800506e: 2b01 cmp r3, #1 + 8005070: d12b bne.n 80050ca + 8005072: 2314 movs r3, #20 + 8005074: 18fb adds r3, r7, r3 + 8005076: 881a ldrh r2, [r3, #0] + 8005078: 003b movs r3, r7 + 800507a: 881b ldrh r3, [r3, #0] + 800507c: 18d3 adds r3, r2, r3 + 800507e: b29c uxth r4, r3 + 8005080: 2330 movs r3, #48 ; 0x30 + 8005082: 2008 movs r0, #8 + 8005084: 181b adds r3, r3, r0 8005086: 19db adds r3, r3, r7 - 8005088: 881b ldrh r3, [r3, #0] - 800508a: 1ad2 subs r2, r2, r3 - 800508c: 2310 movs r3, #16 - 800508e: 18fb adds r3, r7, r3 + 8005088: 881a ldrh r2, [r3, #0] + 800508a: 2128 movs r1, #40 ; 0x28 + 800508c: 180b adds r3, r1, r0 + 800508e: 19db adds r3, r3, r7 8005090: 881b ldrh r3, [r3, #0] - 8005092: 1ad3 subs r3, r2, r3 - 8005094: 105b asrs r3, r3, #1 - 8005096: b29a uxth r2, r3 - 8005098: 180b adds r3, r1, r0 - 800509a: 19db adds r3, r3, r7 - 800509c: 881b ldrh r3, [r3, #0] - 800509e: 18d3 adds r3, r2, r3 - 80050a0: b29a uxth r2, r3 - 80050a2: 2312 movs r3, #18 - 80050a4: 18fb adds r3, r7, r3 - 80050a6: 881b ldrh r3, [r3, #0] - 80050a8: 18d3 adds r3, r2, r3 - 80050aa: b29a uxth r2, r3 - 80050ac: 230e movs r3, #14 - 80050ae: 18fb adds r3, r7, r3 - 80050b0: 8819 ldrh r1, [r3, #0] - 80050b2: 1cbb adds r3, r7, #2 - 80050b4: 8818 ldrh r0, [r3, #0] - 80050b6: 6bfb ldr r3, [r7, #60] ; 0x3c - 80050b8: 9300 str r3, [sp, #0] - 80050ba: 0013 movs r3, r2 - 80050bc: 0022 movs r2, r4 - 80050be: f000 f807 bl 80050d0 + 8005092: 1ad2 subs r2, r2, r3 + 8005094: 2310 movs r3, #16 + 8005096: 18fb adds r3, r7, r3 + 8005098: 881b ldrh r3, [r3, #0] + 800509a: 1ad3 subs r3, r2, r3 + 800509c: 105b asrs r3, r3, #1 + 800509e: b29a uxth r2, r3 + 80050a0: 180b adds r3, r1, r0 + 80050a2: 19db adds r3, r3, r7 + 80050a4: 881b ldrh r3, [r3, #0] + 80050a6: 18d3 adds r3, r2, r3 + 80050a8: b29a uxth r2, r3 + 80050aa: 2312 movs r3, #18 + 80050ac: 18fb adds r3, r7, r3 + 80050ae: 881b ldrh r3, [r3, #0] + 80050b0: 18d3 adds r3, r2, r3 + 80050b2: b29a uxth r2, r3 + 80050b4: 230e movs r3, #14 + 80050b6: 18fb adds r3, r7, r3 + 80050b8: 8819 ldrh r1, [r3, #0] + 80050ba: 1cbb adds r3, r7, #2 + 80050bc: 8818 ldrh r0, [r3, #0] + 80050be: 6bfb ldr r3, [r7, #60] ; 0x3c + 80050c0: 9300 str r3, [sp, #0] + 80050c2: 0013 movs r3, r2 + 80050c4: 0022 movs r2, r4 + 80050c6: f000 f807 bl 80050d8 } - 80050c2: 46c0 nop ; (mov r8, r8) - 80050c4: 46bd mov sp, r7 - 80050c6: b007 add sp, #28 - 80050c8: bdf0 pop {r4, r5, r6, r7, pc} 80050ca: 46c0 nop ; (mov r8, r8) - 80050cc: 2000003f .word 0x2000003f + 80050cc: 46bd mov sp, r7 + 80050ce: b007 add sp, #28 + 80050d0: bdf0 pop {r4, r5, r6, r7, pc} + 80050d2: 46c0 nop ; (mov r8, r8) + 80050d4: 2000003f .word 0x2000003f -080050d0 : +080050d8 : //Draw 1-bit bitmap void ST7793_Draw1bBitmap(uint16_t color, uint16_t bgcolor, uint16_t x, uint16_t y, const char *data) { - 80050d0: b5b0 push {r4, r5, r7, lr} - 80050d2: b086 sub sp, #24 - 80050d4: af00 add r7, sp, #0 - 80050d6: 0005 movs r5, r0 - 80050d8: 000c movs r4, r1 - 80050da: 0010 movs r0, r2 - 80050dc: 0019 movs r1, r3 - 80050de: 1dbb adds r3, r7, #6 - 80050e0: 1c2a adds r2, r5, #0 - 80050e2: 801a strh r2, [r3, #0] - 80050e4: 1d3b adds r3, r7, #4 - 80050e6: 1c22 adds r2, r4, #0 - 80050e8: 801a strh r2, [r3, #0] - 80050ea: 1cbb adds r3, r7, #2 - 80050ec: 1c02 adds r2, r0, #0 - 80050ee: 801a strh r2, [r3, #0] - 80050f0: 003b movs r3, r7 - 80050f2: 1c0a adds r2, r1, #0 - 80050f4: 801a strh r2, [r3, #0] + 80050d8: b5b0 push {r4, r5, r7, lr} + 80050da: b086 sub sp, #24 + 80050dc: af00 add r7, sp, #0 + 80050de: 0005 movs r5, r0 + 80050e0: 000c movs r4, r1 + 80050e2: 0010 movs r0, r2 + 80050e4: 0019 movs r1, r3 + 80050e6: 1dbb adds r3, r7, #6 + 80050e8: 1c2a adds r2, r5, #0 + 80050ea: 801a strh r2, [r3, #0] + 80050ec: 1d3b adds r3, r7, #4 + 80050ee: 1c22 adds r2, r4, #0 + 80050f0: 801a strh r2, [r3, #0] + 80050f2: 1cbb adds r3, r7, #2 + 80050f4: 1c02 adds r2, r0, #0 + 80050f6: 801a strh r2, [r3, #0] + 80050f8: 003b movs r3, r7 + 80050fa: 1c0a adds r2, r1, #0 + 80050fc: 801a strh r2, [r3, #0] color = ~color; - 80050f6: 1dbb adds r3, r7, #6 - 80050f8: 1dba adds r2, r7, #6 - 80050fa: 8812 ldrh r2, [r2, #0] - 80050fc: 43d2 mvns r2, r2 - 80050fe: 801a strh r2, [r3, #0] + 80050fe: 1dbb adds r3, r7, #6 + 8005100: 1dba adds r2, r7, #6 + 8005102: 8812 ldrh r2, [r2, #0] + 8005104: 43d2 mvns r2, r2 + 8005106: 801a strh r2, [r3, #0] bgcolor = ~bgcolor; - 8005100: 1d3b adds r3, r7, #4 - 8005102: 1d3a adds r2, r7, #4 - 8005104: 8812 ldrh r2, [r2, #0] - 8005106: 43d2 mvns r2, r2 - 8005108: 801a strh r2, [r3, #0] - uint16_t w = 0; - 800510a: 2410 movs r4, #16 - 800510c: 193b adds r3, r7, r4 - 800510e: 2200 movs r2, #0 + 8005108: 1d3b adds r3, r7, #4 + 800510a: 1d3a adds r2, r7, #4 + 800510c: 8812 ldrh r2, [r2, #0] + 800510e: 43d2 mvns r2, r2 8005110: 801a strh r2, [r3, #0] - uint16_t h = 0; - 8005112: 210e movs r1, #14 - 8005114: 187b adds r3, r7, r1 + uint16_t w = 0; + 8005112: 2410 movs r4, #16 + 8005114: 193b adds r3, r7, r4 8005116: 2200 movs r2, #0 8005118: 801a strh r2, [r3, #0] + uint16_t h = 0; + 800511a: 210e movs r1, #14 + 800511c: 187b adds r3, r7, r1 + 800511e: 2200 movs r2, #0 + 8005120: 801a strh r2, [r3, #0] uint16_t i, j, bc; w = (data[0] << 8) | data[1]; - 800511a: 6abb ldr r3, [r7, #40] ; 0x28 - 800511c: 781b ldrb r3, [r3, #0] - 800511e: 021b lsls r3, r3, #8 - 8005120: b21a sxth r2, r3 8005122: 6abb ldr r3, [r7, #40] ; 0x28 - 8005124: 3301 adds r3, #1 - 8005126: 781b ldrb r3, [r3, #0] - 8005128: b21b sxth r3, r3 - 800512a: 4313 orrs r3, r2 - 800512c: b21a sxth r2, r3 - 800512e: 193b adds r3, r7, r4 - 8005130: 801a strh r2, [r3, #0] + 8005124: 781b ldrb r3, [r3, #0] + 8005126: 021b lsls r3, r3, #8 + 8005128: b21a sxth r2, r3 + 800512a: 6abb ldr r3, [r7, #40] ; 0x28 + 800512c: 3301 adds r3, #1 + 800512e: 781b ldrb r3, [r3, #0] + 8005130: b21b sxth r3, r3 + 8005132: 4313 orrs r3, r2 + 8005134: b21a sxth r2, r3 + 8005136: 193b adds r3, r7, r4 + 8005138: 801a strh r2, [r3, #0] h = (data[2] << 8) | data[3]; - 8005132: 6abb ldr r3, [r7, #40] ; 0x28 - 8005134: 3302 adds r3, #2 - 8005136: 781b ldrb r3, [r3, #0] - 8005138: 021b lsls r3, r3, #8 - 800513a: b21a sxth r2, r3 - 800513c: 6abb ldr r3, [r7, #40] ; 0x28 - 800513e: 3303 adds r3, #3 - 8005140: 781b ldrb r3, [r3, #0] - 8005142: b21b sxth r3, r3 - 8005144: 4313 orrs r3, r2 - 8005146: b21a sxth r2, r3 - 8005148: 000d movs r5, r1 - 800514a: 187b adds r3, r7, r1 - 800514c: 801a strh r2, [r3, #0] + 800513a: 6abb ldr r3, [r7, #40] ; 0x28 + 800513c: 3302 adds r3, #2 + 800513e: 781b ldrb r3, [r3, #0] + 8005140: 021b lsls r3, r3, #8 + 8005142: b21a sxth r2, r3 + 8005144: 6abb ldr r3, [r7, #40] ; 0x28 + 8005146: 3303 adds r3, #3 + 8005148: 781b ldrb r3, [r3, #0] + 800514a: b21b sxth r3, r3 + 800514c: 4313 orrs r3, r2 + 800514e: b21a sxth r2, r3 + 8005150: 000d movs r5, r1 + 8005152: 187b adds r3, r7, r1 + 8005154: 801a strh r2, [r3, #0] //Set screen window and start coordinates ST7793_SendCommand(0x210,y); - 800514e: 003b movs r3, r7 - 8005150: 881a ldrh r2, [r3, #0] - 8005152: 2384 movs r3, #132 ; 0x84 - 8005154: 009b lsls r3, r3, #2 - 8005156: 0011 movs r1, r2 - 8005158: 0018 movs r0, r3 - 800515a: f7fe fdeb bl 8003d34 + 8005156: 003b movs r3, r7 + 8005158: 881a ldrh r2, [r3, #0] + 800515a: 2384 movs r3, #132 ; 0x84 + 800515c: 009b lsls r3, r3, #2 + 800515e: 0011 movs r1, r2 + 8005160: 0018 movs r0, r3 + 8005162: f7fe fdeb bl 8003d3c ST7793_SendCommand(0x211,y+h-1); - 800515e: 003a movs r2, r7 - 8005160: 197b adds r3, r7, r5 - 8005162: 8812 ldrh r2, [r2, #0] - 8005164: 881b ldrh r3, [r3, #0] - 8005166: 18d3 adds r3, r2, r3 - 8005168: b29b uxth r3, r3 - 800516a: 3b01 subs r3, #1 - 800516c: b29b uxth r3, r3 - 800516e: 4a50 ldr r2, [pc, #320] ; (80052b0 ) - 8005170: 0019 movs r1, r3 - 8005172: 0010 movs r0, r2 - 8005174: f7fe fdde bl 8003d34 + 8005166: 003a movs r2, r7 + 8005168: 197b adds r3, r7, r5 + 800516a: 8812 ldrh r2, [r2, #0] + 800516c: 881b ldrh r3, [r3, #0] + 800516e: 18d3 adds r3, r2, r3 + 8005170: b29b uxth r3, r3 + 8005172: 3b01 subs r3, #1 + 8005174: b29b uxth r3, r3 + 8005176: 4a50 ldr r2, [pc, #320] ; (80052b8 ) + 8005178: 0019 movs r1, r3 + 800517a: 0010 movs r0, r2 + 800517c: f7fe fdde bl 8003d3c ST7793_SendCommand(0x212,x); - 8005178: 1cbb adds r3, r7, #2 - 800517a: 881b ldrh r3, [r3, #0] - 800517c: 4a4d ldr r2, [pc, #308] ; (80052b4 ) - 800517e: 0019 movs r1, r3 - 8005180: 0010 movs r0, r2 - 8005182: f7fe fdd7 bl 8003d34 + 8005180: 1cbb adds r3, r7, #2 + 8005182: 881b ldrh r3, [r3, #0] + 8005184: 4a4d ldr r2, [pc, #308] ; (80052bc ) + 8005186: 0019 movs r1, r3 + 8005188: 0010 movs r0, r2 + 800518a: f7fe fdd7 bl 8003d3c ST7793_SendCommand(0x213,x+w-1); - 8005186: 1cba adds r2, r7, #2 - 8005188: 193b adds r3, r7, r4 - 800518a: 8812 ldrh r2, [r2, #0] - 800518c: 881b ldrh r3, [r3, #0] - 800518e: 18d3 adds r3, r2, r3 - 8005190: b29b uxth r3, r3 - 8005192: 3b01 subs r3, #1 - 8005194: b29b uxth r3, r3 - 8005196: 4a48 ldr r2, [pc, #288] ; (80052b8 ) - 8005198: 0019 movs r1, r3 - 800519a: 0010 movs r0, r2 - 800519c: f7fe fdca bl 8003d34 + 800518e: 1cba adds r2, r7, #2 + 8005190: 193b adds r3, r7, r4 + 8005192: 8812 ldrh r2, [r2, #0] + 8005194: 881b ldrh r3, [r3, #0] + 8005196: 18d3 adds r3, r2, r3 + 8005198: b29b uxth r3, r3 + 800519a: 3b01 subs r3, #1 + 800519c: b29b uxth r3, r3 + 800519e: 4a48 ldr r2, [pc, #288] ; (80052c0 ) + 80051a0: 0019 movs r1, r3 + 80051a2: 0010 movs r0, r2 + 80051a4: f7fe fdca bl 8003d3c ST7793_SendCommand(0x200,y); - 80051a0: 003b movs r3, r7 - 80051a2: 881a ldrh r2, [r3, #0] - 80051a4: 2380 movs r3, #128 ; 0x80 - 80051a6: 009b lsls r3, r3, #2 - 80051a8: 0011 movs r1, r2 - 80051aa: 0018 movs r0, r3 - 80051ac: f7fe fdc2 bl 8003d34 + 80051a8: 003b movs r3, r7 + 80051aa: 881a ldrh r2, [r3, #0] + 80051ac: 2380 movs r3, #128 ; 0x80 + 80051ae: 009b lsls r3, r3, #2 + 80051b0: 0011 movs r1, r2 + 80051b2: 0018 movs r0, r3 + 80051b4: f7fe fdc2 bl 8003d3c ST7793_SendCommand(0x201,x); - 80051b0: 1cbb adds r3, r7, #2 - 80051b2: 881b ldrh r3, [r3, #0] - 80051b4: 4a41 ldr r2, [pc, #260] ; (80052bc ) - 80051b6: 0019 movs r1, r3 - 80051b8: 0010 movs r0, r2 - 80051ba: f7fe fdbb bl 8003d34 + 80051b8: 1cbb adds r3, r7, #2 + 80051ba: 881b ldrh r3, [r3, #0] + 80051bc: 4a41 ldr r2, [pc, #260] ; (80052c4 ) + 80051be: 0019 movs r1, r3 + 80051c0: 0010 movs r0, r2 + 80051c2: f7fe fdbb bl 8003d3c ST7793_COMMAND; //RS pin to command mode - 80051be: 4b40 ldr r3, [pc, #256] ; (80052c0 ) - 80051c0: 2200 movs r2, #0 - 80051c2: 2101 movs r1, #1 - 80051c4: 0018 movs r0, r3 - 80051c6: f002 f9ed bl 80075a4 + 80051c6: 4b40 ldr r3, [pc, #256] ; (80052c8 ) + 80051c8: 2200 movs r2, #0 + 80051ca: 2101 movs r1, #1 + 80051cc: 0018 movs r0, r3 + 80051ce: f002 fb2d bl 800782c ST7793_Write8(0x02); //send a command 0x0202 8 MSB first - 80051ca: 2002 movs r0, #2 - 80051cc: f7fe fd2a bl 8003c24 + 80051d2: 2002 movs r0, #2 + 80051d4: f7fe fd2a bl 8003c2c ST7793_WR_PULSE; //Pulse on the WR pin to send the same 8bits as LSB of the command - 80051d0: 4b3b ldr r3, [pc, #236] ; (80052c0 ) - 80051d2: 2200 movs r2, #0 - 80051d4: 2102 movs r1, #2 - 80051d6: 0018 movs r0, r3 - 80051d8: f002 f9e4 bl 80075a4 - 80051dc: 4b38 ldr r3, [pc, #224] ; (80052c0 ) - 80051de: 2201 movs r2, #1 - 80051e0: 2102 movs r1, #2 - 80051e2: 0018 movs r0, r3 - 80051e4: f002 f9de bl 80075a4 + 80051d8: 4b3b ldr r3, [pc, #236] ; (80052c8 ) + 80051da: 2200 movs r2, #0 + 80051dc: 2102 movs r1, #2 + 80051de: 0018 movs r0, r3 + 80051e0: f002 fb24 bl 800782c + 80051e4: 4b38 ldr r3, [pc, #224] ; (80052c8 ) + 80051e6: 2201 movs r2, #1 + 80051e8: 2102 movs r1, #2 + 80051ea: 0018 movs r0, r3 + 80051ec: f002 fb1e bl 800782c bc = 4; - 80051e8: 2312 movs r3, #18 - 80051ea: 18fb adds r3, r7, r3 - 80051ec: 2204 movs r2, #4 - 80051ee: 801a strh r2, [r3, #0] - for (i = 0; i < h; i++) { - 80051f0: 2316 movs r3, #22 + 80051f0: 2312 movs r3, #18 80051f2: 18fb adds r3, r7, r3 - 80051f4: 2200 movs r2, #0 + 80051f4: 2204 movs r2, #4 80051f6: 801a strh r2, [r3, #0] - 80051f8: e04c b.n 8005294 + for (i = 0; i < h; i++) { + 80051f8: 2316 movs r3, #22 + 80051fa: 18fb adds r3, r7, r3 + 80051fc: 2200 movs r2, #0 + 80051fe: 801a strh r2, [r3, #0] + 8005200: e04c b.n 800529c for (j = 0; j < w; j++) { - 80051fa: 2314 movs r3, #20 - 80051fc: 18fb adds r3, r7, r3 - 80051fe: 2200 movs r2, #0 - 8005200: 801a strh r2, [r3, #0] - 8005202: e033 b.n 800526c + 8005202: 2314 movs r3, #20 + 8005204: 18fb adds r3, r7, r3 + 8005206: 2200 movs r2, #0 + 8005208: 801a strh r2, [r3, #0] + 800520a: e033 b.n 8005274 if (!(j % 8) && j > 0) bc++; - 8005204: 2114 movs r1, #20 - 8005206: 187b adds r3, r7, r1 - 8005208: 881b ldrh r3, [r3, #0] - 800520a: 2207 movs r2, #7 - 800520c: 4013 ands r3, r2 - 800520e: b29b uxth r3, r3 - 8005210: 2b00 cmp r3, #0 - 8005212: d109 bne.n 8005228 - 8005214: 187b adds r3, r7, r1 - 8005216: 881b ldrh r3, [r3, #0] + 800520c: 2114 movs r1, #20 + 800520e: 187b adds r3, r7, r1 + 8005210: 881b ldrh r3, [r3, #0] + 8005212: 2207 movs r2, #7 + 8005214: 4013 ands r3, r2 + 8005216: b29b uxth r3, r3 8005218: 2b00 cmp r3, #0 - 800521a: d005 beq.n 8005228 - 800521c: 2112 movs r1, #18 - 800521e: 187b adds r3, r7, r1 - 8005220: 881a ldrh r2, [r3, #0] - 8005222: 187b adds r3, r7, r1 - 8005224: 3201 adds r2, #1 - 8005226: 801a strh r2, [r3, #0] + 800521a: d109 bne.n 8005230 + 800521c: 187b adds r3, r7, r1 + 800521e: 881b ldrh r3, [r3, #0] + 8005220: 2b00 cmp r3, #0 + 8005222: d005 beq.n 8005230 + 8005224: 2112 movs r1, #18 + 8005226: 187b adds r3, r7, r1 + 8005228: 881a ldrh r2, [r3, #0] + 800522a: 187b adds r3, r7, r1 + 800522c: 3201 adds r2, #1 + 800522e: 801a strh r2, [r3, #0] if ((data[bc] << (j % 8)) & 0x80) ST7793_SendData(color); - 8005228: 2312 movs r3, #18 - 800522a: 18fb adds r3, r7, r3 - 800522c: 881b ldrh r3, [r3, #0] - 800522e: 6aba ldr r2, [r7, #40] ; 0x28 - 8005230: 18d3 adds r3, r2, r3 - 8005232: 781b ldrb r3, [r3, #0] - 8005234: 0019 movs r1, r3 - 8005236: 2314 movs r3, #20 - 8005238: 18fb adds r3, r7, r3 - 800523a: 881b ldrh r3, [r3, #0] - 800523c: 2207 movs r2, #7 - 800523e: 4013 ands r3, r2 - 8005240: 4099 lsls r1, r3 - 8005242: 000b movs r3, r1 - 8005244: 2280 movs r2, #128 ; 0x80 + 8005230: 2312 movs r3, #18 + 8005232: 18fb adds r3, r7, r3 + 8005234: 881b ldrh r3, [r3, #0] + 8005236: 6aba ldr r2, [r7, #40] ; 0x28 + 8005238: 18d3 adds r3, r2, r3 + 800523a: 781b ldrb r3, [r3, #0] + 800523c: 0019 movs r1, r3 + 800523e: 2314 movs r3, #20 + 8005240: 18fb adds r3, r7, r3 + 8005242: 881b ldrh r3, [r3, #0] + 8005244: 2207 movs r2, #7 8005246: 4013 ands r3, r2 - 8005248: d005 beq.n 8005256 - 800524a: 1dbb adds r3, r7, #6 - 800524c: 881b ldrh r3, [r3, #0] - 800524e: 0018 movs r0, r3 - 8005250: f7fe fd52 bl 8003cf8 - 8005254: e004 b.n 8005260 + 8005248: 4099 lsls r1, r3 + 800524a: 000b movs r3, r1 + 800524c: 2280 movs r2, #128 ; 0x80 + 800524e: 4013 ands r3, r2 + 8005250: d005 beq.n 800525e + 8005252: 1dbb adds r3, r7, #6 + 8005254: 881b ldrh r3, [r3, #0] + 8005256: 0018 movs r0, r3 + 8005258: f7fe fd52 bl 8003d00 + 800525c: e004 b.n 8005268 else ST7793_SendData(bgcolor); - 8005256: 1d3b adds r3, r7, #4 - 8005258: 881b ldrh r3, [r3, #0] - 800525a: 0018 movs r0, r3 - 800525c: f7fe fd4c bl 8003cf8 + 800525e: 1d3b adds r3, r7, #4 + 8005260: 881b ldrh r3, [r3, #0] + 8005262: 0018 movs r0, r3 + 8005264: f7fe fd4c bl 8003d00 for (j = 0; j < w; j++) { - 8005260: 2114 movs r1, #20 - 8005262: 187b adds r3, r7, r1 - 8005264: 881a ldrh r2, [r3, #0] - 8005266: 187b adds r3, r7, r1 - 8005268: 3201 adds r2, #1 - 800526a: 801a strh r2, [r3, #0] - 800526c: 2314 movs r3, #20 - 800526e: 18fa adds r2, r7, r3 - 8005270: 2310 movs r3, #16 - 8005272: 18fb adds r3, r7, r3 - 8005274: 8812 ldrh r2, [r2, #0] - 8005276: 881b ldrh r3, [r3, #0] - 8005278: 429a cmp r2, r3 - 800527a: d3c3 bcc.n 8005204 + 8005268: 2114 movs r1, #20 + 800526a: 187b adds r3, r7, r1 + 800526c: 881a ldrh r2, [r3, #0] + 800526e: 187b adds r3, r7, r1 + 8005270: 3201 adds r2, #1 + 8005272: 801a strh r2, [r3, #0] + 8005274: 2314 movs r3, #20 + 8005276: 18fa adds r2, r7, r3 + 8005278: 2310 movs r3, #16 + 800527a: 18fb adds r3, r7, r3 + 800527c: 8812 ldrh r2, [r2, #0] + 800527e: 881b ldrh r3, [r3, #0] + 8005280: 429a cmp r2, r3 + 8005282: d3c3 bcc.n 800520c } bc++; - 800527c: 2112 movs r1, #18 - 800527e: 187b adds r3, r7, r1 - 8005280: 881a ldrh r2, [r3, #0] - 8005282: 187b adds r3, r7, r1 - 8005284: 3201 adds r2, #1 - 8005286: 801a strh r2, [r3, #0] - for (i = 0; i < h; i++) { - 8005288: 2116 movs r1, #22 + 8005284: 2112 movs r1, #18 + 8005286: 187b adds r3, r7, r1 + 8005288: 881a ldrh r2, [r3, #0] 800528a: 187b adds r3, r7, r1 - 800528c: 881a ldrh r2, [r3, #0] - 800528e: 187b adds r3, r7, r1 - 8005290: 3201 adds r2, #1 - 8005292: 801a strh r2, [r3, #0] - 8005294: 2316 movs r3, #22 - 8005296: 18fa adds r2, r7, r3 - 8005298: 230e movs r3, #14 - 800529a: 18fb adds r3, r7, r3 - 800529c: 8812 ldrh r2, [r2, #0] - 800529e: 881b ldrh r3, [r3, #0] - 80052a0: 429a cmp r2, r3 - 80052a2: d3aa bcc.n 80051fa + 800528c: 3201 adds r2, #1 + 800528e: 801a strh r2, [r3, #0] + for (i = 0; i < h; i++) { + 8005290: 2116 movs r1, #22 + 8005292: 187b adds r3, r7, r1 + 8005294: 881a ldrh r2, [r3, #0] + 8005296: 187b adds r3, r7, r1 + 8005298: 3201 adds r2, #1 + 800529a: 801a strh r2, [r3, #0] + 800529c: 2316 movs r3, #22 + 800529e: 18fa adds r2, r7, r3 + 80052a0: 230e movs r3, #14 + 80052a2: 18fb adds r3, r7, r3 + 80052a4: 8812 ldrh r2, [r2, #0] + 80052a6: 881b ldrh r3, [r3, #0] + 80052a8: 429a cmp r2, r3 + 80052aa: d3aa bcc.n 8005202 } } - 80052a4: 46c0 nop ; (mov r8, r8) - 80052a6: 46c0 nop ; (mov r8, r8) - 80052a8: 46bd mov sp, r7 - 80052aa: b006 add sp, #24 - 80052ac: bdb0 pop {r4, r5, r7, pc} + 80052ac: 46c0 nop ; (mov r8, r8) 80052ae: 46c0 nop ; (mov r8, r8) - 80052b0: 00000211 .word 0x00000211 - 80052b4: 00000212 .word 0x00000212 - 80052b8: 00000213 .word 0x00000213 - 80052bc: 00000201 .word 0x00000201 - 80052c0: 50000400 .word 0x50000400 + 80052b0: 46bd mov sp, r7 + 80052b2: b006 add sp, #24 + 80052b4: bdb0 pop {r4, r5, r7, pc} + 80052b6: 46c0 nop ; (mov r8, r8) + 80052b8: 00000211 .word 0x00000211 + 80052bc: 00000212 .word 0x00000212 + 80052c0: 00000213 .word 0x00000213 + 80052c4: 00000201 .word 0x00000201 + 80052c8: 50000400 .word 0x50000400 -080052c4 : +080052cc : #ifdef HAS_TOUCHSCREEN //read ADC channel uint16_t ST7793_ReadADC(uint8_t chan) { - 80052c4: b590 push {r4, r7, lr} - 80052c6: b087 sub sp, #28 - 80052c8: af00 add r7, sp, #0 - 80052ca: 0002 movs r2, r0 - 80052cc: 1dfb adds r3, r7, #7 - 80052ce: 701a strb r2, [r3, #0] + 80052cc: b590 push {r4, r7, lr} + 80052ce: b087 sub sp, #28 + 80052d0: af00 add r7, sp, #0 + 80052d2: 0002 movs r2, r0 + 80052d4: 1dfb adds r3, r7, #7 + 80052d6: 701a strb r2, [r3, #0] ADC_ChannelConfTypeDef sConfig = {0}; - 80052d0: 2308 movs r3, #8 - 80052d2: 18fb adds r3, r7, r3 - 80052d4: 0018 movs r0, r3 - 80052d6: 230c movs r3, #12 - 80052d8: 001a movs r2, r3 - 80052da: 2100 movs r1, #0 - 80052dc: f008 fe77 bl 800dfce + 80052d8: 2308 movs r3, #8 + 80052da: 18fb adds r3, r7, r3 + 80052dc: 0018 movs r0, r3 + 80052de: 230c movs r3, #12 + 80052e0: 001a movs r2, r3 + 80052e2: 2100 movs r1, #0 + 80052e4: f009 fc93 bl 800ec0e uint16_t res; sConfig.Channel = chan == 0 ? ST7793_XM_CHAN : ST7793_YP_CHAN; - 80052e0: 1dfb adds r3, r7, #7 - 80052e2: 781b ldrb r3, [r3, #0] - 80052e4: 2b00 cmp r3, #0 - 80052e6: d101 bne.n 80052ec - 80052e8: 4a18 ldr r2, [pc, #96] ; (800534c ) - 80052ea: e000 b.n 80052ee - 80052ec: 4a18 ldr r2, [pc, #96] ; (8005350 ) - 80052ee: 2108 movs r1, #8 - 80052f0: 187b adds r3, r7, r1 - 80052f2: 601a str r2, [r3, #0] + 80052e8: 1dfb adds r3, r7, #7 + 80052ea: 781b ldrb r3, [r3, #0] + 80052ec: 2b00 cmp r3, #0 + 80052ee: d101 bne.n 80052f4 + 80052f0: 4a18 ldr r2, [pc, #96] ; (8005354 ) + 80052f2: e000 b.n 80052f6 + 80052f4: 4a18 ldr r2, [pc, #96] ; (8005358 ) + 80052f6: 2108 movs r1, #8 + 80052f8: 187b adds r3, r7, r1 + 80052fa: 601a str r2, [r3, #0] sConfig.Rank = ADC_REGULAR_RANK_1; - 80052f4: 187b adds r3, r7, r1 - 80052f6: 2200 movs r2, #0 - 80052f8: 605a str r2, [r3, #4] + 80052fc: 187b adds r3, r7, r1 + 80052fe: 2200 movs r2, #0 + 8005300: 605a str r2, [r3, #4] sConfig.SamplingTime = ADC_SAMPLINGTIME_COMMON_1; - 80052fa: 187b adds r3, r7, r1 - 80052fc: 2200 movs r2, #0 - 80052fe: 609a str r2, [r3, #8] + 8005302: 187b adds r3, r7, r1 + 8005304: 2200 movs r2, #0 + 8005306: 609a str r2, [r3, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { - 8005300: 187a adds r2, r7, r1 - 8005302: 4b14 ldr r3, [pc, #80] ; (8005354 ) - 8005304: 0011 movs r1, r2 - 8005306: 0018 movs r0, r3 - 8005308: f001 fae6 bl 80068d8 - 800530c: 1e03 subs r3, r0, #0 - 800530e: d001 beq.n 8005314 + 8005308: 187a adds r2, r7, r1 + 800530a: 4b14 ldr r3, [pc, #80] ; (800535c ) + 800530c: 0011 movs r1, r2 + 800530e: 0018 movs r0, r3 + 8005310: f001 fc26 bl 8006b60 + 8005314: 1e03 subs r3, r0, #0 + 8005316: d001 beq.n 800531c Error_Handler(); - 8005310: f7fe fa32 bl 8003778 + 8005318: f7fe fa32 bl 8003780 } HAL_ADC_Start(&hadc1); - 8005314: 4b0f ldr r3, [pc, #60] ; (8005354 ) - 8005316: 0018 movs r0, r3 - 8005318: f001 f9b4 bl 8006684 + 800531c: 4b0f ldr r3, [pc, #60] ; (800535c ) + 800531e: 0018 movs r0, r3 + 8005320: f001 faf4 bl 800690c HAL_ADC_PollForConversion(&hadc1, 50); - 800531c: 4b0d ldr r3, [pc, #52] ; (8005354 ) - 800531e: 2132 movs r1, #50 ; 0x32 - 8005320: 0018 movs r0, r3 - 8005322: f001 fa39 bl 8006798 - res = HAL_ADC_GetValue(&hadc1); - 8005326: 4b0b ldr r3, [pc, #44] ; (8005354 ) + 8005324: 4b0d ldr r3, [pc, #52] ; (800535c ) + 8005326: 2132 movs r1, #50 ; 0x32 8005328: 0018 movs r0, r3 - 800532a: f001 fac9 bl 80068c0 - 800532e: 0002 movs r2, r0 - 8005330: 2416 movs r4, #22 - 8005332: 193b adds r3, r7, r4 - 8005334: 801a strh r2, [r3, #0] + 800532a: f001 fb79 bl 8006a20 + res = HAL_ADC_GetValue(&hadc1); + 800532e: 4b0b ldr r3, [pc, #44] ; (800535c ) + 8005330: 0018 movs r0, r3 + 8005332: f001 fc09 bl 8006b48 + 8005336: 0002 movs r2, r0 + 8005338: 2416 movs r4, #22 + 800533a: 193b adds r3, r7, r4 + 800533c: 801a strh r2, [r3, #0] HAL_ADC_Stop(&hadc1); - 8005336: 4b07 ldr r3, [pc, #28] ; (8005354 ) - 8005338: 0018 movs r0, r3 - 800533a: f001 f9f1 bl 8006720 + 800533e: 4b07 ldr r3, [pc, #28] ; (800535c ) + 8005340: 0018 movs r0, r3 + 8005342: f001 fb31 bl 80069a8 return res; - 800533e: 193b adds r3, r7, r4 - 8005340: 881b ldrh r3, [r3, #0] + 8005346: 193b adds r3, r7, r4 + 8005348: 881b ldrh r3, [r3, #0] } - 8005342: 0018 movs r0, r3 - 8005344: 46bd mov sp, r7 - 8005346: b007 add sp, #28 - 8005348: bd90 pop {r4, r7, pc} - 800534a: 46c0 nop ; (mov r8, r8) - 800534c: 20000100 .word 0x20000100 - 8005350: 24000200 .word 0x24000200 - 8005354: 200000d0 .word 0x200000d0 + 800534a: 0018 movs r0, r3 + 800534c: 46bd mov sp, r7 + 800534e: b007 add sp, #28 + 8005350: bd90 pop {r4, r7, pc} + 8005352: 46c0 nop ; (mov r8, r8) + 8005354: 20000100 .word 0x20000100 + 8005358: 24000200 .word 0x24000200 + 800535c: 200000d0 .word 0x200000d0 -08005358 : +08005360 : //Configure pins to read X, Y, Z or set them to control the display // 0 - display; 1 - Z, 2 - X, 3 - Y void ST7793_TouchPins(uint8_t mode) { - 8005358: b5f0 push {r4, r5, r6, r7, lr} - 800535a: b097 sub sp, #92 ; 0x5c - 800535c: af00 add r7, sp, #0 - 800535e: 0002 movs r2, r0 - 8005360: 1dfb adds r3, r7, #7 - 8005362: 701a strb r2, [r3, #0] + 8005360: b5f0 push {r4, r5, r6, r7, lr} + 8005362: b097 sub sp, #92 ; 0x5c + 8005364: af00 add r7, sp, #0 + 8005366: 0002 movs r2, r0 + 8005368: 1dfb adds r3, r7, #7 + 800536a: 701a strb r2, [r3, #0] GPIO_InitTypeDef GPIO_InitStructXM = {0}; - 8005364: 2444 movs r4, #68 ; 0x44 - 8005366: 193b adds r3, r7, r4 - 8005368: 0018 movs r0, r3 - 800536a: 2314 movs r3, #20 - 800536c: 001a movs r2, r3 - 800536e: 2100 movs r1, #0 - 8005370: f008 fe2d bl 800dfce + 800536c: 2444 movs r4, #68 ; 0x44 + 800536e: 193b adds r3, r7, r4 + 8005370: 0018 movs r0, r3 + 8005372: 2314 movs r3, #20 + 8005374: 001a movs r2, r3 + 8005376: 2100 movs r1, #0 + 8005378: f009 fc49 bl 800ec0e GPIO_InitTypeDef GPIO_InitStructXP = {0}; - 8005374: 2530 movs r5, #48 ; 0x30 - 8005376: 197b adds r3, r7, r5 - 8005378: 0018 movs r0, r3 - 800537a: 2314 movs r3, #20 - 800537c: 001a movs r2, r3 - 800537e: 2100 movs r1, #0 - 8005380: f008 fe25 bl 800dfce + 800537c: 2530 movs r5, #48 ; 0x30 + 800537e: 197b adds r3, r7, r5 + 8005380: 0018 movs r0, r3 + 8005382: 2314 movs r3, #20 + 8005384: 001a movs r2, r3 + 8005386: 2100 movs r1, #0 + 8005388: f009 fc41 bl 800ec0e GPIO_InitTypeDef GPIO_InitStructYM = {0}; - 8005384: 261c movs r6, #28 - 8005386: 19bb adds r3, r7, r6 - 8005388: 0018 movs r0, r3 - 800538a: 2314 movs r3, #20 - 800538c: 001a movs r2, r3 - 800538e: 2100 movs r1, #0 - 8005390: f008 fe1d bl 800dfce + 800538c: 261c movs r6, #28 + 800538e: 19bb adds r3, r7, r6 + 8005390: 0018 movs r0, r3 + 8005392: 2314 movs r3, #20 + 8005394: 001a movs r2, r3 + 8005396: 2100 movs r1, #0 + 8005398: f009 fc39 bl 800ec0e GPIO_InitTypeDef GPIO_InitStructYP = {0}; - 8005394: 2108 movs r1, #8 - 8005396: 187b adds r3, r7, r1 - 8005398: 0018 movs r0, r3 - 800539a: 2314 movs r3, #20 - 800539c: 001a movs r2, r3 - 800539e: 2100 movs r1, #0 - 80053a0: f008 fe15 bl 800dfce + 800539c: 2108 movs r1, #8 + 800539e: 187b adds r3, r7, r1 + 80053a0: 0018 movs r0, r3 + 80053a2: 2314 movs r3, #20 + 80053a4: 001a movs r2, r3 + 80053a6: 2100 movs r1, #0 + 80053a8: f009 fc31 bl 800ec0e GPIO_InitStructXM.Pin = ST7793_RS_pn; - 80053a4: 193b adds r3, r7, r4 - 80053a6: 2201 movs r2, #1 - 80053a8: 601a str r2, [r3, #0] + 80053ac: 193b adds r3, r7, r4 + 80053ae: 2201 movs r2, #1 + 80053b0: 601a str r2, [r3, #0] GPIO_InitStructXP.Pin = GPIO_PIN_6< - 80053f6: dc4b bgt.n 8005490 - 80053f8: 2b02 cmp r3, #2 - 80053fa: d027 beq.n 800544c - 80053fc: dc48 bgt.n 8005490 - 80053fe: 2b00 cmp r3, #0 - 8005400: d002 beq.n 8005408 - 8005402: 2b01 cmp r3, #1 - 8005404: d011 beq.n 800542a - 8005406: e043 b.n 8005490 + 80053f6: 1dfb adds r3, r7, #7 + 80053f8: 781b ldrb r3, [r3, #0] + 80053fa: 2b03 cmp r3, #3 + 80053fc: d03b beq.n 8005476 + 80053fe: dc4b bgt.n 8005498 + 8005400: 2b02 cmp r3, #2 + 8005402: d027 beq.n 8005454 + 8005404: dc48 bgt.n 8005498 + 8005406: 2b00 cmp r3, #0 + 8005408: d002 beq.n 8005410 + 800540a: 2b01 cmp r3, #1 + 800540c: d011 beq.n 8005432 + 800540e: e043 b.n 8005498 case 0: //Display mode GPIO_InitStructXM.Mode = GPIO_MODE_OUTPUT_PP; - 8005408: 2344 movs r3, #68 ; 0x44 - 800540a: 18fb adds r3, r7, r3 - 800540c: 2201 movs r2, #1 - 800540e: 605a str r2, [r3, #4] - GPIO_InitStructXP.Mode = GPIO_MODE_OUTPUT_PP; - 8005410: 2330 movs r3, #48 ; 0x30 + 8005410: 2344 movs r3, #68 ; 0x44 8005412: 18fb adds r3, r7, r3 8005414: 2201 movs r2, #1 8005416: 605a str r2, [r3, #4] - GPIO_InitStructYM.Mode = GPIO_MODE_OUTPUT_PP; - 8005418: 231c movs r3, #28 + GPIO_InitStructXP.Mode = GPIO_MODE_OUTPUT_PP; + 8005418: 2330 movs r3, #48 ; 0x30 800541a: 18fb adds r3, r7, r3 800541c: 2201 movs r2, #1 800541e: 605a str r2, [r3, #4] - GPIO_InitStructYP.Mode = GPIO_MODE_OUTPUT_PP; - 8005420: 2308 movs r3, #8 + GPIO_InitStructYM.Mode = GPIO_MODE_OUTPUT_PP; + 8005420: 231c movs r3, #28 8005422: 18fb adds r3, r7, r3 8005424: 2201 movs r2, #1 8005426: 605a str r2, [r3, #4] + GPIO_InitStructYP.Mode = GPIO_MODE_OUTPUT_PP; + 8005428: 2308 movs r3, #8 + 800542a: 18fb adds r3, r7, r3 + 800542c: 2201 movs r2, #1 + 800542e: 605a str r2, [r3, #4] break; - 8005428: e032 b.n 8005490 + 8005430: e032 b.n 8005498 case 1: //Z mode GPIO_InitStructXM.Mode = GPIO_MODE_ANALOG; - 800542a: 2344 movs r3, #68 ; 0x44 - 800542c: 18fb adds r3, r7, r3 - 800542e: 2203 movs r2, #3 - 8005430: 605a str r2, [r3, #4] - GPIO_InitStructXP.Mode = GPIO_MODE_OUTPUT_PP; - 8005432: 2330 movs r3, #48 ; 0x30 + 8005432: 2344 movs r3, #68 ; 0x44 8005434: 18fb adds r3, r7, r3 - 8005436: 2201 movs r2, #1 + 8005436: 2203 movs r2, #3 8005438: 605a str r2, [r3, #4] - GPIO_InitStructYM.Mode = GPIO_MODE_OUTPUT_PP; - 800543a: 231c movs r3, #28 + GPIO_InitStructXP.Mode = GPIO_MODE_OUTPUT_PP; + 800543a: 2330 movs r3, #48 ; 0x30 800543c: 18fb adds r3, r7, r3 800543e: 2201 movs r2, #1 8005440: 605a str r2, [r3, #4] - GPIO_InitStructYP.Mode = GPIO_MODE_ANALOG; - 8005442: 2308 movs r3, #8 + GPIO_InitStructYM.Mode = GPIO_MODE_OUTPUT_PP; + 8005442: 231c movs r3, #28 8005444: 18fb adds r3, r7, r3 - 8005446: 2203 movs r2, #3 + 8005446: 2201 movs r2, #1 8005448: 605a str r2, [r3, #4] + GPIO_InitStructYP.Mode = GPIO_MODE_ANALOG; + 800544a: 2308 movs r3, #8 + 800544c: 18fb adds r3, r7, r3 + 800544e: 2203 movs r2, #3 + 8005450: 605a str r2, [r3, #4] break; - 800544a: e021 b.n 8005490 + 8005452: e021 b.n 8005498 case 2: //X mode GPIO_InitStructXM.Mode = GPIO_MODE_OUTPUT_PP; - 800544c: 2344 movs r3, #68 ; 0x44 - 800544e: 18fb adds r3, r7, r3 - 8005450: 2201 movs r2, #1 - 8005452: 605a str r2, [r3, #4] - GPIO_InitStructXP.Mode = GPIO_MODE_OUTPUT_PP; - 8005454: 2330 movs r3, #48 ; 0x30 + 8005454: 2344 movs r3, #68 ; 0x44 8005456: 18fb adds r3, r7, r3 8005458: 2201 movs r2, #1 800545a: 605a str r2, [r3, #4] - GPIO_InitStructYM.Mode = GPIO_MODE_INPUT; - 800545c: 231c movs r3, #28 + GPIO_InitStructXP.Mode = GPIO_MODE_OUTPUT_PP; + 800545c: 2330 movs r3, #48 ; 0x30 800545e: 18fb adds r3, r7, r3 - 8005460: 2200 movs r2, #0 + 8005460: 2201 movs r2, #1 8005462: 605a str r2, [r3, #4] - GPIO_InitStructYP.Mode = GPIO_MODE_ANALOG; - 8005464: 2308 movs r3, #8 + GPIO_InitStructYM.Mode = GPIO_MODE_INPUT; + 8005464: 231c movs r3, #28 8005466: 18fb adds r3, r7, r3 - 8005468: 2203 movs r2, #3 + 8005468: 2200 movs r2, #0 800546a: 605a str r2, [r3, #4] + GPIO_InitStructYP.Mode = GPIO_MODE_ANALOG; + 800546c: 2308 movs r3, #8 + 800546e: 18fb adds r3, r7, r3 + 8005470: 2203 movs r2, #3 + 8005472: 605a str r2, [r3, #4] break; - 800546c: e010 b.n 8005490 + 8005474: e010 b.n 8005498 case 3: //Y mode GPIO_InitStructXM.Mode = GPIO_MODE_ANALOG; - 800546e: 2344 movs r3, #68 ; 0x44 - 8005470: 18fb adds r3, r7, r3 - 8005472: 2203 movs r2, #3 - 8005474: 605a str r2, [r3, #4] - GPIO_InitStructXP.Mode = GPIO_MODE_INPUT; - 8005476: 2330 movs r3, #48 ; 0x30 + 8005476: 2344 movs r3, #68 ; 0x44 8005478: 18fb adds r3, r7, r3 - 800547a: 2200 movs r2, #0 + 800547a: 2203 movs r2, #3 800547c: 605a str r2, [r3, #4] - GPIO_InitStructYM.Mode = GPIO_MODE_OUTPUT_PP; - 800547e: 231c movs r3, #28 + GPIO_InitStructXP.Mode = GPIO_MODE_INPUT; + 800547e: 2330 movs r3, #48 ; 0x30 8005480: 18fb adds r3, r7, r3 - 8005482: 2201 movs r2, #1 + 8005482: 2200 movs r2, #0 8005484: 605a str r2, [r3, #4] - GPIO_InitStructYP.Mode = GPIO_MODE_OUTPUT_PP; - 8005486: 2308 movs r3, #8 + GPIO_InitStructYM.Mode = GPIO_MODE_OUTPUT_PP; + 8005486: 231c movs r3, #28 8005488: 18fb adds r3, r7, r3 800548a: 2201 movs r2, #1 800548c: 605a str r2, [r3, #4] + GPIO_InitStructYP.Mode = GPIO_MODE_OUTPUT_PP; + 800548e: 2308 movs r3, #8 + 8005490: 18fb adds r3, r7, r3 + 8005492: 2201 movs r2, #1 + 8005494: 605a str r2, [r3, #4] break; - 800548e: 46c0 nop ; (mov r8, r8) + 8005496: 46c0 nop ; (mov r8, r8) } HAL_GPIO_Init(ST7793_RS_pt, &GPIO_InitStructXM); - 8005490: 2344 movs r3, #68 ; 0x44 - 8005492: 18fb adds r3, r7, r3 - 8005494: 4a2a ldr r2, [pc, #168] ; (8005540 ) - 8005496: 0019 movs r1, r3 - 8005498: 0010 movs r0, r2 - 800549a: f001 ff1f bl 80072dc + 8005498: 2344 movs r3, #68 ; 0x44 + 800549a: 18fb adds r3, r7, r3 + 800549c: 4a2a ldr r2, [pc, #168] ; (8005548 ) + 800549e: 0019 movs r1, r3 + 80054a0: 0010 movs r0, r2 + 80054a2: f002 f85f bl 8007564 HAL_GPIO_Init(ST7793_DPort, &GPIO_InitStructXP); - 800549e: 2330 movs r3, #48 ; 0x30 - 80054a0: 18fa adds r2, r7, r3 - 80054a2: 23a0 movs r3, #160 ; 0xa0 - 80054a4: 05db lsls r3, r3, #23 - 80054a6: 0011 movs r1, r2 - 80054a8: 0018 movs r0, r3 - 80054aa: f001 ff17 bl 80072dc + 80054a6: 2330 movs r3, #48 ; 0x30 + 80054a8: 18fa adds r2, r7, r3 + 80054aa: 23a0 movs r3, #160 ; 0xa0 + 80054ac: 05db lsls r3, r3, #23 + 80054ae: 0011 movs r1, r2 + 80054b0: 0018 movs r0, r3 + 80054b2: f002 f857 bl 8007564 HAL_GPIO_Init(ST7793_DPort, &GPIO_InitStructYM); - 80054ae: 231c movs r3, #28 - 80054b0: 18fa adds r2, r7, r3 - 80054b2: 23a0 movs r3, #160 ; 0xa0 - 80054b4: 05db lsls r3, r3, #23 - 80054b6: 0011 movs r1, r2 - 80054b8: 0018 movs r0, r3 - 80054ba: f001 ff0f bl 80072dc + 80054b6: 231c movs r3, #28 + 80054b8: 18fa adds r2, r7, r3 + 80054ba: 23a0 movs r3, #160 ; 0xa0 + 80054bc: 05db lsls r3, r3, #23 + 80054be: 0011 movs r1, r2 + 80054c0: 0018 movs r0, r3 + 80054c2: f002 f84f bl 8007564 HAL_GPIO_Init(ST7793_WR_pt, &GPIO_InitStructYP); - 80054be: 2308 movs r3, #8 - 80054c0: 18fb adds r3, r7, r3 - 80054c2: 4a1f ldr r2, [pc, #124] ; (8005540 ) - 80054c4: 0019 movs r1, r3 - 80054c6: 0010 movs r0, r2 - 80054c8: f001 ff08 bl 80072dc + 80054c6: 2308 movs r3, #8 + 80054c8: 18fb adds r3, r7, r3 + 80054ca: 4a1f ldr r2, [pc, #124] ; (8005548 ) + 80054cc: 0019 movs r1, r3 + 80054ce: 0010 movs r0, r2 + 80054d0: f002 f848 bl 8007564 switch (mode) { - 80054cc: 1dfb adds r3, r7, #7 - 80054ce: 781b ldrb r3, [r3, #0] - 80054d0: 2b03 cmp r3, #3 - 80054d2: d022 beq.n 800551a - 80054d4: dc2f bgt.n 8005536 - 80054d6: 2b01 cmp r3, #1 - 80054d8: d002 beq.n 80054e0 - 80054da: 2b02 cmp r3, #2 - 80054dc: d00f beq.n 80054fe + 80054d4: 1dfb adds r3, r7, #7 + 80054d6: 781b ldrb r3, [r3, #0] + 80054d8: 2b03 cmp r3, #3 + 80054da: d022 beq.n 8005522 + 80054dc: dc2f bgt.n 800553e + 80054de: 2b01 cmp r3, #1 + 80054e0: d002 beq.n 80054e8 + 80054e2: 2b02 cmp r3, #2 + 80054e4: d00f beq.n 8005506 HAL_GPIO_WritePin(ST7793_WR_pt, ST7793_WR_pn, GPIO_PIN_SET); // Set Y+ to VCC break; } } - 80054de: e02a b.n 8005536 + 80054e6: e02a b.n 800553e HAL_GPIO_WritePin(ST7793_DPort, GPIO_PIN_6< + 80054e8: 23a0 movs r3, #160 ; 0xa0 + 80054ea: 05db lsls r3, r3, #23 + 80054ec: 2200 movs r2, #0 + 80054ee: 2140 movs r1, #64 ; 0x40 + 80054f0: 0018 movs r0, r3 + 80054f2: f002 f99b bl 800782c HAL_GPIO_WritePin(ST7793_DPort, GPIO_PIN_7< + 80054f6: 23a0 movs r3, #160 ; 0xa0 + 80054f8: 05db lsls r3, r3, #23 + 80054fa: 2201 movs r2, #1 + 80054fc: 2180 movs r1, #128 ; 0x80 + 80054fe: 0018 movs r0, r3 + 8005500: f002 f994 bl 800782c break; - 80054fc: e01b b.n 8005536 + 8005504: e01b b.n 800553e HAL_GPIO_WritePin(ST7793_RS_pt, ST7793_RS_pn, GPIO_PIN_RESET); // Set X- to ground - 80054fe: 4b10 ldr r3, [pc, #64] ; (8005540 ) - 8005500: 2200 movs r2, #0 - 8005502: 2101 movs r1, #1 - 8005504: 0018 movs r0, r3 - 8005506: f002 f84d bl 80075a4 + 8005506: 4b10 ldr r3, [pc, #64] ; (8005548 ) + 8005508: 2200 movs r2, #0 + 800550a: 2101 movs r1, #1 + 800550c: 0018 movs r0, r3 + 800550e: f002 f98d bl 800782c HAL_GPIO_WritePin(ST7793_DPort, GPIO_PIN_6< + 8005512: 23a0 movs r3, #160 ; 0xa0 + 8005514: 05db lsls r3, r3, #23 + 8005516: 2201 movs r2, #1 + 8005518: 2140 movs r1, #64 ; 0x40 + 800551a: 0018 movs r0, r3 + 800551c: f002 f986 bl 800782c break; - 8005518: e00d b.n 8005536 + 8005520: e00d b.n 800553e HAL_GPIO_WritePin(ST7793_DPort, GPIO_PIN_7< + 8005522: 23a0 movs r3, #160 ; 0xa0 + 8005524: 05db lsls r3, r3, #23 + 8005526: 2200 movs r2, #0 + 8005528: 2180 movs r1, #128 ; 0x80 + 800552a: 0018 movs r0, r3 + 800552c: f002 f97e bl 800782c HAL_GPIO_WritePin(ST7793_WR_pt, ST7793_WR_pn, GPIO_PIN_SET); // Set Y+ to VCC - 8005528: 4b05 ldr r3, [pc, #20] ; (8005540 ) - 800552a: 2201 movs r2, #1 - 800552c: 2102 movs r1, #2 - 800552e: 0018 movs r0, r3 - 8005530: f002 f838 bl 80075a4 + 8005530: 4b05 ldr r3, [pc, #20] ; (8005548 ) + 8005532: 2201 movs r2, #1 + 8005534: 2102 movs r1, #2 + 8005536: 0018 movs r0, r3 + 8005538: f002 f978 bl 800782c break; - 8005534: 46c0 nop ; (mov r8, r8) + 800553c: 46c0 nop ; (mov r8, r8) } - 8005536: 46c0 nop ; (mov r8, r8) - 8005538: 46bd mov sp, r7 - 800553a: b017 add sp, #92 ; 0x5c - 800553c: bdf0 pop {r4, r5, r6, r7, pc} 800553e: 46c0 nop ; (mov r8, r8) - 8005540: 50000400 .word 0x50000400 + 8005540: 46bd mov sp, r7 + 8005542: b017 add sp, #92 ; 0x5c + 8005544: bdf0 pop {r4, r5, r6, r7, pc} + 8005546: 46c0 nop ; (mov r8, r8) + 8005548: 50000400 .word 0x50000400 -08005544 : +0800554c : //Map ADC values to screen resolution uint16_t ST7793_Map(uint16_t x, uint16_t in_min, uint16_t in_max, uint16_t out_min, uint16_t out_max) { - 8005544: b5b0 push {r4, r5, r7, lr} - 8005546: b082 sub sp, #8 - 8005548: af00 add r7, sp, #0 - 800554a: 0005 movs r5, r0 - 800554c: 000c movs r4, r1 - 800554e: 0010 movs r0, r2 - 8005550: 0019 movs r1, r3 - 8005552: 1dbb adds r3, r7, #6 - 8005554: 1c2a adds r2, r5, #0 - 8005556: 801a strh r2, [r3, #0] - 8005558: 1d3b adds r3, r7, #4 - 800555a: 1c22 adds r2, r4, #0 - 800555c: 801a strh r2, [r3, #0] - 800555e: 1cbb adds r3, r7, #2 - 8005560: 1c02 adds r2, r0, #0 - 8005562: 801a strh r2, [r3, #0] - 8005564: 003b movs r3, r7 - 8005566: 1c0a adds r2, r1, #0 - 8005568: 801a strh r2, [r3, #0] + 800554c: b5b0 push {r4, r5, r7, lr} + 800554e: b082 sub sp, #8 + 8005550: af00 add r7, sp, #0 + 8005552: 0005 movs r5, r0 + 8005554: 000c movs r4, r1 + 8005556: 0010 movs r0, r2 + 8005558: 0019 movs r1, r3 + 800555a: 1dbb adds r3, r7, #6 + 800555c: 1c2a adds r2, r5, #0 + 800555e: 801a strh r2, [r3, #0] + 8005560: 1d3b adds r3, r7, #4 + 8005562: 1c22 adds r2, r4, #0 + 8005564: 801a strh r2, [r3, #0] + 8005566: 1cbb adds r3, r7, #2 + 8005568: 1c02 adds r2, r0, #0 + 800556a: 801a strh r2, [r3, #0] + 800556c: 003b movs r3, r7 + 800556e: 1c0a adds r2, r1, #0 + 8005570: 801a strh r2, [r3, #0] return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min; - 800556a: 1dbb adds r3, r7, #6 - 800556c: 881a ldrh r2, [r3, #0] - 800556e: 1d3b adds r3, r7, #4 - 8005570: 881b ldrh r3, [r3, #0] - 8005572: 1ad2 subs r2, r2, r3 - 8005574: 2318 movs r3, #24 - 8005576: 18fb adds r3, r7, r3 - 8005578: 8819 ldrh r1, [r3, #0] - 800557a: 003b movs r3, r7 - 800557c: 881b ldrh r3, [r3, #0] - 800557e: 1acb subs r3, r1, r3 - 8005580: 4353 muls r3, r2 - 8005582: 0018 movs r0, r3 - 8005584: 1cbb adds r3, r7, #2 - 8005586: 881a ldrh r2, [r3, #0] - 8005588: 1d3b adds r3, r7, #4 - 800558a: 881b ldrh r3, [r3, #0] - 800558c: 1ad3 subs r3, r2, r3 - 800558e: 0019 movs r1, r3 - 8005590: f7fa fe56 bl 8000240 <__divsi3> - 8005594: 0003 movs r3, r0 - 8005596: b29a uxth r2, r3 - 8005598: 003b movs r3, r7 - 800559a: 881b ldrh r3, [r3, #0] - 800559c: 18d3 adds r3, r2, r3 - 800559e: b29b uxth r3, r3 + 8005572: 1dbb adds r3, r7, #6 + 8005574: 881a ldrh r2, [r3, #0] + 8005576: 1d3b adds r3, r7, #4 + 8005578: 881b ldrh r3, [r3, #0] + 800557a: 1ad2 subs r2, r2, r3 + 800557c: 2318 movs r3, #24 + 800557e: 18fb adds r3, r7, r3 + 8005580: 8819 ldrh r1, [r3, #0] + 8005582: 003b movs r3, r7 + 8005584: 881b ldrh r3, [r3, #0] + 8005586: 1acb subs r3, r1, r3 + 8005588: 4353 muls r3, r2 + 800558a: 0018 movs r0, r3 + 800558c: 1cbb adds r3, r7, #2 + 800558e: 881a ldrh r2, [r3, #0] + 8005590: 1d3b adds r3, r7, #4 + 8005592: 881b ldrh r3, [r3, #0] + 8005594: 1ad3 subs r3, r2, r3 + 8005596: 0019 movs r1, r3 + 8005598: f7fa fe52 bl 8000240 <__divsi3> + 800559c: 0003 movs r3, r0 + 800559e: b29a uxth r2, r3 + 80055a0: 003b movs r3, r7 + 80055a2: 881b ldrh r3, [r3, #0] + 80055a4: 18d3 adds r3, r2, r3 + 80055a6: b29b uxth r3, r3 } - 80055a0: 0018 movs r0, r3 - 80055a2: 46bd mov sp, r7 - 80055a4: b002 add sp, #8 - 80055a6: bdb0 pop {r4, r5, r7, pc} + 80055a8: 0018 movs r0, r3 + 80055aa: 46bd mov sp, r7 + 80055ac: b002 add sp, #8 + 80055ae: bdb0 pop {r4, r5, r7, pc} -080055a8 : +080055b0 : //Check touch screen. Returns x and y of the touch and z as the pressure value. If z == 0 then we have no touch. TouchPoint ST7793_CheckTouch(void) { - 80055a8: b5f0 push {r4, r5, r6, r7, lr} - 80055aa: b089 sub sp, #36 ; 0x24 - 80055ac: af02 add r7, sp, #8 - 80055ae: 6078 str r0, [r7, #4] + 80055b0: b5f0 push {r4, r5, r6, r7, lr} + 80055b2: b089 sub sp, #36 ; 0x24 + 80055b4: af02 add r7, sp, #8 + 80055b6: 6078 str r0, [r7, #4] TouchPoint t = {0}; - 80055b0: 250c movs r5, #12 - 80055b2: 197b adds r3, r7, r5 - 80055b4: 0018 movs r0, r3 - 80055b6: 2306 movs r3, #6 - 80055b8: 001a movs r2, r3 - 80055ba: 2100 movs r1, #0 - 80055bc: f008 fd07 bl 800dfce + 80055b8: 250c movs r5, #12 + 80055ba: 197b adds r3, r7, r5 + 80055bc: 0018 movs r0, r3 + 80055be: 2306 movs r3, #6 + 80055c0: 001a movs r2, r3 + 80055c2: 2100 movs r1, #0 + 80055c4: f009 fb23 bl 800ec0e uint16_t a1, a2; ST7793_TouchPins(1); - 80055c0: 2001 movs r0, #1 - 80055c2: f7ff fec9 bl 8005358 + 80055c8: 2001 movs r0, #1 + 80055ca: f7ff fec9 bl 8005360 // read ADC X- and Y+ a1 = ST7793_ReadADC(0); - 80055c6: 2616 movs r6, #22 - 80055c8: 19bc adds r4, r7, r6 - 80055ca: 2000 movs r0, #0 - 80055cc: f7ff fe7a bl 80052c4 - 80055d0: 0003 movs r3, r0 - 80055d2: 8023 strh r3, [r4, #0] + 80055ce: 2616 movs r6, #22 + 80055d0: 19bc adds r4, r7, r6 + 80055d2: 2000 movs r0, #0 + 80055d4: f7ff fe7a bl 80052cc + 80055d8: 0003 movs r3, r0 + 80055da: 8023 strh r3, [r4, #0] a2 = ST7793_ReadADC(1); - 80055d4: 2014 movs r0, #20 - 80055d6: 183c adds r4, r7, r0 - 80055d8: 2001 movs r0, #1 - 80055da: f7ff fe73 bl 80052c4 - 80055de: 0003 movs r3, r0 - 80055e0: 8023 strh r3, [r4, #0] + 80055dc: 2014 movs r0, #20 + 80055de: 183c adds r4, r7, r0 + 80055e0: 2001 movs r0, #1 + 80055e2: f7ff fe73 bl 80052cc + 80055e6: 0003 movs r3, r0 + 80055e8: 8023 strh r3, [r4, #0] t.z = 1023-a2+a1; - 80055e2: 19ba adds r2, r7, r6 - 80055e4: 2014 movs r0, #20 - 80055e6: 183b adds r3, r7, r0 - 80055e8: 8812 ldrh r2, [r2, #0] - 80055ea: 881b ldrh r3, [r3, #0] - 80055ec: 1ad3 subs r3, r2, r3 - 80055ee: b29b uxth r3, r3 - 80055f0: 4a25 ldr r2, [pc, #148] ; (8005688 ) - 80055f2: 4694 mov ip, r2 - 80055f4: 4463 add r3, ip - 80055f6: b29a uxth r2, r3 - 80055f8: 197b adds r3, r7, r5 - 80055fa: 809a strh r2, [r3, #4] + 80055ea: 19ba adds r2, r7, r6 + 80055ec: 2014 movs r0, #20 + 80055ee: 183b adds r3, r7, r0 + 80055f0: 8812 ldrh r2, [r2, #0] + 80055f2: 881b ldrh r3, [r3, #0] + 80055f4: 1ad3 subs r3, r2, r3 + 80055f6: b29b uxth r3, r3 + 80055f8: 4a25 ldr r2, [pc, #148] ; (8005690 ) + 80055fa: 4694 mov ip, r2 + 80055fc: 4463 add r3, ip + 80055fe: b29a uxth r2, r3 + 8005600: 197b adds r3, r7, r5 + 8005602: 809a strh r2, [r3, #4] if (t.z > ST7793_Z_THRESHOLD) { - 80055fc: 197b adds r3, r7, r5 - 80055fe: 889b ldrh r3, [r3, #4] - 8005600: 2b0f cmp r3, #15 - 8005602: d930 bls.n 8005666 + 8005604: 197b adds r3, r7, r5 + 8005606: 889b ldrh r3, [r3, #4] + 8005608: 2b0f cmp r3, #15 + 800560a: d930 bls.n 800566e //Reading X ST7793_TouchPins(2); - 8005604: 2002 movs r0, #2 - 8005606: f7ff fea7 bl 8005358 + 800560c: 2002 movs r0, #2 + 800560e: f7ff fea7 bl 8005360 a1 = ST7793_ReadADC(1); - 800560a: 19bc adds r4, r7, r6 - 800560c: 2001 movs r0, #1 - 800560e: f7ff fe59 bl 80052c4 - 8005612: 0003 movs r3, r0 - 8005614: 8023 strh r3, [r4, #0] + 8005612: 19bc adds r4, r7, r6 + 8005614: 2001 movs r0, #1 + 8005616: f7ff fe59 bl 80052cc + 800561a: 0003 movs r3, r0 + 800561c: 8023 strh r3, [r4, #0] //Reading Y ST7793_TouchPins(3); - 8005616: 2003 movs r0, #3 - 8005618: f7ff fe9e bl 8005358 + 800561e: 2003 movs r0, #3 + 8005620: f7ff fe9e bl 8005360 a2 = 1023 - ST7793_ReadADC(0); - 800561c: 2000 movs r0, #0 - 800561e: f7ff fe51 bl 80052c4 - 8005622: 0003 movs r3, r0 - 8005624: 0019 movs r1, r3 - 8005626: 2014 movs r0, #20 - 8005628: 183b adds r3, r7, r0 - 800562a: 4a17 ldr r2, [pc, #92] ; (8005688 ) - 800562c: 1a52 subs r2, r2, r1 - 800562e: 801a strh r2, [r3, #0] + 8005624: 2000 movs r0, #0 + 8005626: f7ff fe51 bl 80052cc + 800562a: 0003 movs r3, r0 + 800562c: 0019 movs r1, r3 + 800562e: 2014 movs r0, #20 + 8005630: 183b adds r3, r7, r0 + 8005632: 4a17 ldr r2, [pc, #92] ; (8005690 ) + 8005634: 1a52 subs r2, r2, r1 + 8005636: 801a strh r2, [r3, #0] // t.x = a2; // t.y = a1; t.x = ST7793_Map(a2, ST7793_TS_XMIN, ST7793_TS_XMAX, 1, ST7793_XMAX); - 8005630: 4a16 ldr r2, [pc, #88] ; (800568c ) - 8005632: 183b adds r3, r7, r0 - 8005634: 8818 ldrh r0, [r3, #0] - 8005636: 23c8 movs r3, #200 ; 0xc8 - 8005638: 005b lsls r3, r3, #1 - 800563a: 9300 str r3, [sp, #0] - 800563c: 2301 movs r3, #1 - 800563e: 2164 movs r1, #100 ; 0x64 - 8005640: f7ff ff80 bl 8005544 - 8005644: 0003 movs r3, r0 - 8005646: 001a movs r2, r3 - 8005648: 197b adds r3, r7, r5 - 800564a: 801a strh r2, [r3, #0] + 8005638: 4a16 ldr r2, [pc, #88] ; (8005694 ) + 800563a: 183b adds r3, r7, r0 + 800563c: 8818 ldrh r0, [r3, #0] + 800563e: 23c8 movs r3, #200 ; 0xc8 + 8005640: 005b lsls r3, r3, #1 + 8005642: 9300 str r3, [sp, #0] + 8005644: 2301 movs r3, #1 + 8005646: 2164 movs r1, #100 ; 0x64 + 8005648: f7ff ff80 bl 800554c + 800564c: 0003 movs r3, r0 + 800564e: 001a movs r2, r3 + 8005650: 197b adds r3, r7, r5 + 8005652: 801a strh r2, [r3, #0] t.y = ST7793_Map(a1, ST7793_TS_YMIN, ST7793_TS_YMAX, 1, ST7793_YMAX); - 800564c: 4a10 ldr r2, [pc, #64] ; (8005690 ) - 800564e: 19bb adds r3, r7, r6 - 8005650: 8818 ldrh r0, [r3, #0] - 8005652: 23f0 movs r3, #240 ; 0xf0 - 8005654: 9300 str r3, [sp, #0] - 8005656: 2301 movs r3, #1 - 8005658: 216e movs r1, #110 ; 0x6e - 800565a: f7ff ff73 bl 8005544 - 800565e: 0003 movs r3, r0 - 8005660: 001a movs r2, r3 - 8005662: 197b adds r3, r7, r5 - 8005664: 805a strh r2, [r3, #2] + 8005654: 4a10 ldr r2, [pc, #64] ; (8005698 ) + 8005656: 19bb adds r3, r7, r6 + 8005658: 8818 ldrh r0, [r3, #0] + 800565a: 23f0 movs r3, #240 ; 0xf0 + 800565c: 9300 str r3, [sp, #0] + 800565e: 2301 movs r3, #1 + 8005660: 216e movs r1, #110 ; 0x6e + 8005662: f7ff ff73 bl 800554c + 8005666: 0003 movs r3, r0 + 8005668: 001a movs r2, r3 + 800566a: 197b adds r3, r7, r5 + 800566c: 805a strh r2, [r3, #2] } ST7793_TouchPins(0); - 8005666: 2000 movs r0, #0 - 8005668: f7ff fe76 bl 8005358 + 800566e: 2000 movs r0, #0 + 8005670: f7ff fe76 bl 8005360 return t; - 800566c: 687a ldr r2, [r7, #4] - 800566e: 230c movs r3, #12 - 8005670: 18fb adds r3, r7, r3 - 8005672: 0010 movs r0, r2 - 8005674: 0019 movs r1, r3 - 8005676: 2306 movs r3, #6 - 8005678: 001a movs r2, r3 - 800567a: f008 fc9f bl 800dfbc + 8005674: 687a ldr r2, [r7, #4] + 8005676: 230c movs r3, #12 + 8005678: 18fb adds r3, r7, r3 + 800567a: 0010 movs r0, r2 + 800567c: 0019 movs r1, r3 + 800567e: 2306 movs r3, #6 + 8005680: 001a movs r2, r3 + 8005682: f009 fabb bl 800ebfc } - 800567e: 6878 ldr r0, [r7, #4] - 8005680: 46bd mov sp, r7 - 8005682: b007 add sp, #28 - 8005684: bdf0 pop {r4, r5, r6, r7, pc} - 8005686: 46c0 nop ; (mov r8, r8) - 8005688: 000003ff .word 0x000003ff - 800568c: 000003b6 .word 0x000003b6 - 8005690: 00000393 .word 0x00000393 + 8005686: 6878 ldr r0, [r7, #4] + 8005688: 46bd mov sp, r7 + 800568a: b007 add sp, #28 + 800568c: bdf0 pop {r4, r5, r6, r7, pc} + 800568e: 46c0 nop ; (mov r8, r8) + 8005690: 000003ff .word 0x000003ff + 8005694: 000003b6 .word 0x000003b6 + 8005698: 00000393 .word 0x00000393 -08005694 : +0800569c : //Check if the touch is in rect boundaries uint8_t ST7793_TouchInRect(TouchPoint *t, uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { - 8005694: b590 push {r4, r7, lr} - 8005696: b085 sub sp, #20 - 8005698: af00 add r7, sp, #0 - 800569a: 60f8 str r0, [r7, #12] - 800569c: 000c movs r4, r1 - 800569e: 0010 movs r0, r2 - 80056a0: 0019 movs r1, r3 - 80056a2: 230a movs r3, #10 - 80056a4: 18fb adds r3, r7, r3 - 80056a6: 1c22 adds r2, r4, #0 - 80056a8: 801a strh r2, [r3, #0] - 80056aa: 2308 movs r3, #8 + 800569c: b590 push {r4, r7, lr} + 800569e: b085 sub sp, #20 + 80056a0: af00 add r7, sp, #0 + 80056a2: 60f8 str r0, [r7, #12] + 80056a4: 000c movs r4, r1 + 80056a6: 0010 movs r0, r2 + 80056a8: 0019 movs r1, r3 + 80056aa: 230a movs r3, #10 80056ac: 18fb adds r3, r7, r3 - 80056ae: 1c02 adds r2, r0, #0 + 80056ae: 1c22 adds r2, r4, #0 80056b0: 801a strh r2, [r3, #0] - 80056b2: 1dbb adds r3, r7, #6 - 80056b4: 1c0a adds r2, r1, #0 - 80056b6: 801a strh r2, [r3, #0] + 80056b2: 2308 movs r3, #8 + 80056b4: 18fb adds r3, r7, r3 + 80056b6: 1c02 adds r2, r0, #0 + 80056b8: 801a strh r2, [r3, #0] + 80056ba: 1dbb adds r3, r7, #6 + 80056bc: 1c0a adds r2, r1, #0 + 80056be: 801a strh r2, [r3, #0] if (t->z < ST7793_Z_THRESHOLD) return 0; - 80056b8: 68fb ldr r3, [r7, #12] - 80056ba: 889b ldrh r3, [r3, #4] - 80056bc: 2b0e cmp r3, #14 - 80056be: d801 bhi.n 80056c4 - 80056c0: 2300 movs r3, #0 - 80056c2: e01d b.n 8005700 + 80056c0: 68fb ldr r3, [r7, #12] + 80056c2: 889b ldrh r3, [r3, #4] + 80056c4: 2b0e cmp r3, #14 + 80056c6: d801 bhi.n 80056cc + 80056c8: 2300 movs r3, #0 + 80056ca: e01d b.n 8005708 if (t->x >= x1 && t->x <= x2 && t->y >= y1 && t->y <= y2) { - 80056c4: 68fb ldr r3, [r7, #12] - 80056c6: 881b ldrh r3, [r3, #0] - 80056c8: 220a movs r2, #10 - 80056ca: 18ba adds r2, r7, r2 - 80056cc: 8812 ldrh r2, [r2, #0] - 80056ce: 429a cmp r2, r3 - 80056d0: d815 bhi.n 80056fe - 80056d2: 68fb ldr r3, [r7, #12] - 80056d4: 881b ldrh r3, [r3, #0] - 80056d6: 1dba adds r2, r7, #6 - 80056d8: 8812 ldrh r2, [r2, #0] - 80056da: 429a cmp r2, r3 - 80056dc: d30f bcc.n 80056fe - 80056de: 68fb ldr r3, [r7, #12] - 80056e0: 885b ldrh r3, [r3, #2] - 80056e2: 2208 movs r2, #8 - 80056e4: 18ba adds r2, r7, r2 - 80056e6: 8812 ldrh r2, [r2, #0] - 80056e8: 429a cmp r2, r3 - 80056ea: d808 bhi.n 80056fe - 80056ec: 68fb ldr r3, [r7, #12] - 80056ee: 885a ldrh r2, [r3, #2] - 80056f0: 2320 movs r3, #32 - 80056f2: 18fb adds r3, r7, r3 - 80056f4: 881b ldrh r3, [r3, #0] - 80056f6: 4293 cmp r3, r2 - 80056f8: d301 bcc.n 80056fe + 80056cc: 68fb ldr r3, [r7, #12] + 80056ce: 881b ldrh r3, [r3, #0] + 80056d0: 220a movs r2, #10 + 80056d2: 18ba adds r2, r7, r2 + 80056d4: 8812 ldrh r2, [r2, #0] + 80056d6: 429a cmp r2, r3 + 80056d8: d815 bhi.n 8005706 + 80056da: 68fb ldr r3, [r7, #12] + 80056dc: 881b ldrh r3, [r3, #0] + 80056de: 1dba adds r2, r7, #6 + 80056e0: 8812 ldrh r2, [r2, #0] + 80056e2: 429a cmp r2, r3 + 80056e4: d30f bcc.n 8005706 + 80056e6: 68fb ldr r3, [r7, #12] + 80056e8: 885b ldrh r3, [r3, #2] + 80056ea: 2208 movs r2, #8 + 80056ec: 18ba adds r2, r7, r2 + 80056ee: 8812 ldrh r2, [r2, #0] + 80056f0: 429a cmp r2, r3 + 80056f2: d808 bhi.n 8005706 + 80056f4: 68fb ldr r3, [r7, #12] + 80056f6: 885a ldrh r2, [r3, #2] + 80056f8: 2320 movs r3, #32 + 80056fa: 18fb adds r3, r7, r3 + 80056fc: 881b ldrh r3, [r3, #0] + 80056fe: 4293 cmp r3, r2 + 8005700: d301 bcc.n 8005706 return 1; - 80056fa: 2301 movs r3, #1 - 80056fc: e000 b.n 8005700 + 8005702: 2301 movs r3, #1 + 8005704: e000 b.n 8005708 } else { return 0; - 80056fe: 2300 movs r3, #0 + 8005706: 2300 movs r3, #0 } } - 8005700: 0018 movs r0, r3 - 8005702: 46bd mov sp, r7 - 8005704: b005 add sp, #20 - 8005706: bd90 pop {r4, r7, pc} + 8005708: 0018 movs r0, r3 + 800570a: 46bd mov sp, r7 + 800570c: b005 add sp, #20 + 800570e: bd90 pop {r4, r7, pc} -08005708 : +08005710 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8005708: b580 push {r7, lr} - 800570a: b082 sub sp, #8 - 800570c: af00 add r7, sp, #0 + 8005710: b580 push {r7, lr} + 8005712: b082 sub sp, #8 + 8005714: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 800570e: 4b15 ldr r3, [pc, #84] ; (8005764 ) - 8005710: 6c1a ldr r2, [r3, #64] ; 0x40 - 8005712: 4b14 ldr r3, [pc, #80] ; (8005764 ) - 8005714: 2101 movs r1, #1 - 8005716: 430a orrs r2, r1 - 8005718: 641a str r2, [r3, #64] ; 0x40 - 800571a: 4b12 ldr r3, [pc, #72] ; (8005764 ) - 800571c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800571e: 2201 movs r2, #1 - 8005720: 4013 ands r3, r2 - 8005722: 607b str r3, [r7, #4] - 8005724: 687b ldr r3, [r7, #4] + 8005716: 4b15 ldr r3, [pc, #84] ; (800576c ) + 8005718: 6c1a ldr r2, [r3, #64] ; 0x40 + 800571a: 4b14 ldr r3, [pc, #80] ; (800576c ) + 800571c: 2101 movs r1, #1 + 800571e: 430a orrs r2, r1 + 8005720: 641a str r2, [r3, #64] ; 0x40 + 8005722: 4b12 ldr r3, [pc, #72] ; (800576c ) + 8005724: 6c1b ldr r3, [r3, #64] ; 0x40 + 8005726: 2201 movs r2, #1 + 8005728: 4013 ands r3, r2 + 800572a: 607b str r3, [r7, #4] + 800572c: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); - 8005726: 4b0f ldr r3, [pc, #60] ; (8005764 ) - 8005728: 6bda ldr r2, [r3, #60] ; 0x3c - 800572a: 4b0e ldr r3, [pc, #56] ; (8005764 ) - 800572c: 2180 movs r1, #128 ; 0x80 - 800572e: 0549 lsls r1, r1, #21 - 8005730: 430a orrs r2, r1 - 8005732: 63da str r2, [r3, #60] ; 0x3c - 8005734: 4b0b ldr r3, [pc, #44] ; (8005764 ) - 8005736: 6bda ldr r2, [r3, #60] ; 0x3c - 8005738: 2380 movs r3, #128 ; 0x80 - 800573a: 055b lsls r3, r3, #21 - 800573c: 4013 ands r3, r2 - 800573e: 603b str r3, [r7, #0] - 8005740: 683b ldr r3, [r7, #0] + 800572e: 4b0f ldr r3, [pc, #60] ; (800576c ) + 8005730: 6bda ldr r2, [r3, #60] ; 0x3c + 8005732: 4b0e ldr r3, [pc, #56] ; (800576c ) + 8005734: 2180 movs r1, #128 ; 0x80 + 8005736: 0549 lsls r1, r1, #21 + 8005738: 430a orrs r2, r1 + 800573a: 63da str r2, [r3, #60] ; 0x3c + 800573c: 4b0b ldr r3, [pc, #44] ; (800576c ) + 800573e: 6bda ldr r2, [r3, #60] ; 0x3c + 8005740: 2380 movs r3, #128 ; 0x80 + 8005742: 055b lsls r3, r3, #21 + 8005744: 4013 ands r3, r2 + 8005746: 603b str r3, [r7, #0] + 8005748: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* PendSV_IRQn interrupt configuration */ HAL_NVIC_SetPriority(PendSV_IRQn, 3, 0); - 8005742: 2302 movs r3, #2 - 8005744: 425b negs r3, r3 - 8005746: 2200 movs r2, #0 - 8005748: 2103 movs r1, #3 - 800574a: 0018 movs r0, r3 - 800574c: f001 fda0 bl 8007290 + 800574a: 2302 movs r3, #2 + 800574c: 425b negs r3, r3 + 800574e: 2200 movs r2, #0 + 8005750: 2103 movs r1, #3 + 8005752: 0018 movs r0, r3 + 8005754: f001 fee0 bl 8007518 /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral */ HAL_SYSCFG_StrobeDBattpinsConfig(SYSCFG_CFGR1_UCPD1_STROBE | SYSCFG_CFGR1_UCPD2_STROBE); - 8005750: 23c0 movs r3, #192 ; 0xc0 - 8005752: 00db lsls r3, r3, #3 - 8005754: 0018 movs r0, r3 - 8005756: f000 fc6d bl 8006034 + 8005758: 23c0 movs r3, #192 ; 0xc0 + 800575a: 00db lsls r3, r3, #3 + 800575c: 0018 movs r0, r3 + 800575e: f000 fdad bl 80062bc /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 800575a: 46c0 nop ; (mov r8, r8) - 800575c: 46bd mov sp, r7 - 800575e: b002 add sp, #8 - 8005760: bd80 pop {r7, pc} 8005762: 46c0 nop ; (mov r8, r8) - 8005764: 40021000 .word 0x40021000 + 8005764: 46bd mov sp, r7 + 8005766: b002 add sp, #8 + 8005768: bd80 pop {r7, pc} + 800576a: 46c0 nop ; (mov r8, r8) + 800576c: 40021000 .word 0x40021000 -08005768 : +08005770 : * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). * @param TickPriority: Tick interrupt priority. * @retval HAL status */ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8005768: b5b0 push {r4, r5, r7, lr} - 800576a: b08c sub sp, #48 ; 0x30 - 800576c: af00 add r7, sp, #0 - 800576e: 6078 str r0, [r7, #4] + 8005770: b5b0 push {r4, r5, r7, lr} + 8005772: b08c sub sp, #48 ; 0x30 + 8005774: af00 add r7, sp, #0 + 8005776: 6078 str r0, [r7, #4] RCC_ClkInitTypeDef clkconfig; uint32_t uwTimclock, uwAPB1Prescaler; uint32_t uwPrescalerValue; uint32_t pFLatency; HAL_StatusTypeDef status = HAL_OK; - 8005770: 232b movs r3, #43 ; 0x2b - 8005772: 18fb adds r3, r7, r3 - 8005774: 2200 movs r2, #0 - 8005776: 701a strb r2, [r3, #0] + 8005778: 232b movs r3, #43 ; 0x2b + 800577a: 18fb adds r3, r7, r3 + 800577c: 2200 movs r2, #0 + 800577e: 701a strb r2, [r3, #0] /* Enable TIM6 clock */ __HAL_RCC_TIM6_CLK_ENABLE(); - 8005778: 4b37 ldr r3, [pc, #220] ; (8005858 ) - 800577a: 6bda ldr r2, [r3, #60] ; 0x3c - 800577c: 4b36 ldr r3, [pc, #216] ; (8005858 ) - 800577e: 2110 movs r1, #16 - 8005780: 430a orrs r2, r1 - 8005782: 63da str r2, [r3, #60] ; 0x3c - 8005784: 4b34 ldr r3, [pc, #208] ; (8005858 ) - 8005786: 6bdb ldr r3, [r3, #60] ; 0x3c - 8005788: 2210 movs r2, #16 - 800578a: 4013 ands r3, r2 - 800578c: 60bb str r3, [r7, #8] - 800578e: 68bb ldr r3, [r7, #8] + 8005780: 4b37 ldr r3, [pc, #220] ; (8005860 ) + 8005782: 6bda ldr r2, [r3, #60] ; 0x3c + 8005784: 4b36 ldr r3, [pc, #216] ; (8005860 ) + 8005786: 2110 movs r1, #16 + 8005788: 430a orrs r2, r1 + 800578a: 63da str r2, [r3, #60] ; 0x3c + 800578c: 4b34 ldr r3, [pc, #208] ; (8005860 ) + 800578e: 6bdb ldr r3, [r3, #60] ; 0x3c + 8005790: 2210 movs r2, #16 + 8005792: 4013 ands r3, r2 + 8005794: 60bb str r3, [r7, #8] + 8005796: 68bb ldr r3, [r7, #8] /* Get clock configuration */ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); - 8005790: 230c movs r3, #12 - 8005792: 18fa adds r2, r7, r3 - 8005794: 2410 movs r4, #16 - 8005796: 193b adds r3, r7, r4 - 8005798: 0011 movs r1, r2 - 800579a: 0018 movs r0, r3 - 800579c: f002 fc24 bl 8007fe8 + 8005798: 230c movs r3, #12 + 800579a: 18fa adds r2, r7, r3 + 800579c: 2410 movs r4, #16 + 800579e: 193b adds r3, r7, r4 + 80057a0: 0011 movs r1, r2 + 80057a2: 0018 movs r0, r3 + 80057a4: f002 fd64 bl 8008270 /* Get APB1 prescaler */ uwAPB1Prescaler = clkconfig.APB1CLKDivider; - 80057a0: 193b adds r3, r7, r4 - 80057a2: 68db ldr r3, [r3, #12] - 80057a4: 627b str r3, [r7, #36] ; 0x24 + 80057a8: 193b adds r3, r7, r4 + 80057aa: 68db ldr r3, [r3, #12] + 80057ac: 627b str r3, [r7, #36] ; 0x24 /* Compute TIM6 clock */ if (uwAPB1Prescaler == RCC_HCLK_DIV1) - 80057a6: 6a7b ldr r3, [r7, #36] ; 0x24 - 80057a8: 2b00 cmp r3, #0 - 80057aa: d104 bne.n 80057b6 + 80057ae: 6a7b ldr r3, [r7, #36] ; 0x24 + 80057b0: 2b00 cmp r3, #0 + 80057b2: d104 bne.n 80057be { uwTimclock = HAL_RCC_GetPCLK1Freq(); - 80057ac: f002 fc06 bl 8007fbc - 80057b0: 0003 movs r3, r0 - 80057b2: 62fb str r3, [r7, #44] ; 0x2c - 80057b4: e004 b.n 80057c0 + 80057b4: f002 fd46 bl 8008244 + 80057b8: 0003 movs r3, r0 + 80057ba: 62fb str r3, [r7, #44] ; 0x2c + 80057bc: e004 b.n 80057c8 } else { uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq(); - 80057b6: f002 fc01 bl 8007fbc - 80057ba: 0003 movs r3, r0 - 80057bc: 005b lsls r3, r3, #1 - 80057be: 62fb str r3, [r7, #44] ; 0x2c + 80057be: f002 fd41 bl 8008244 + 80057c2: 0003 movs r3, r0 + 80057c4: 005b lsls r3, r3, #1 + 80057c6: 62fb str r3, [r7, #44] ; 0x2c } /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); - 80057c0: 6afb ldr r3, [r7, #44] ; 0x2c - 80057c2: 4926 ldr r1, [pc, #152] ; (800585c ) - 80057c4: 0018 movs r0, r3 - 80057c6: f7fa fcb1 bl 800012c <__udivsi3> - 80057ca: 0003 movs r3, r0 - 80057cc: 3b01 subs r3, #1 - 80057ce: 623b str r3, [r7, #32] + 80057c8: 6afb ldr r3, [r7, #44] ; 0x2c + 80057ca: 4926 ldr r1, [pc, #152] ; (8005864 ) + 80057cc: 0018 movs r0, r3 + 80057ce: f7fa fcad bl 800012c <__udivsi3> + 80057d2: 0003 movs r3, r0 + 80057d4: 3b01 subs r3, #1 + 80057d6: 623b str r3, [r7, #32] /* Initialize TIM6 */ htim6.Instance = TIM6; - 80057d0: 4b23 ldr r3, [pc, #140] ; (8005860 ) - 80057d2: 4a24 ldr r2, [pc, #144] ; (8005864 ) - 80057d4: 601a str r2, [r3, #0] + 80057d8: 4b23 ldr r3, [pc, #140] ; (8005868 ) + 80057da: 4a24 ldr r2, [pc, #144] ; (800586c ) + 80057dc: 601a str r2, [r3, #0] + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base. + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. + ClockDivision = 0 + Counter direction = Up */ htim6.Init.Period = (1000000U / 1000U) - 1U; - 80057d6: 4b22 ldr r3, [pc, #136] ; (8005860 ) - 80057d8: 4a23 ldr r2, [pc, #140] ; (8005868 ) - 80057da: 60da str r2, [r3, #12] + 80057de: 4b22 ldr r3, [pc, #136] ; (8005868 ) + 80057e0: 4a23 ldr r2, [pc, #140] ; (8005870 ) + 80057e2: 60da str r2, [r3, #12] htim6.Init.Prescaler = uwPrescalerValue; - 80057dc: 4b20 ldr r3, [pc, #128] ; (8005860 ) - 80057de: 6a3a ldr r2, [r7, #32] - 80057e0: 605a str r2, [r3, #4] + 80057e4: 4b20 ldr r3, [pc, #128] ; (8005868 ) + 80057e6: 6a3a ldr r2, [r7, #32] + 80057e8: 605a str r2, [r3, #4] htim6.Init.ClockDivision = 0; - 80057e2: 4b1f ldr r3, [pc, #124] ; (8005860 ) - 80057e4: 2200 movs r2, #0 - 80057e6: 611a str r2, [r3, #16] + 80057ea: 4b1f ldr r3, [pc, #124] ; (8005868 ) + 80057ec: 2200 movs r2, #0 + 80057ee: 611a str r2, [r3, #16] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; - 80057e8: 4b1d ldr r3, [pc, #116] ; (8005860 ) - 80057ea: 2200 movs r2, #0 - 80057ec: 609a str r2, [r3, #8] + 80057f0: 4b1d ldr r3, [pc, #116] ; (8005868 ) + 80057f2: 2200 movs r2, #0 + 80057f4: 609a str r2, [r3, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 80057ee: 4b1c ldr r3, [pc, #112] ; (8005860 ) - 80057f0: 2200 movs r2, #0 - 80057f2: 619a str r2, [r3, #24] + 80057f6: 4b1c ldr r3, [pc, #112] ; (8005868 ) + 80057f8: 2200 movs r2, #0 + 80057fa: 619a str r2, [r3, #24] status = HAL_TIM_Base_Init(&htim6); - 80057f4: 252b movs r5, #43 ; 0x2b - 80057f6: 197c adds r4, r7, r5 - 80057f8: 4b19 ldr r3, [pc, #100] ; (8005860 ) - 80057fa: 0018 movs r0, r3 - 80057fc: f003 fafc bl 8008df8 - 8005800: 0003 movs r3, r0 - 8005802: 7023 strb r3, [r4, #0] + 80057fc: 252b movs r5, #43 ; 0x2b + 80057fe: 197c adds r4, r7, r5 + 8005800: 4b19 ldr r3, [pc, #100] ; (8005868 ) + 8005802: 0018 movs r0, r3 + 8005804: f003 fc3c bl 8009080 + 8005808: 0003 movs r3, r0 + 800580a: 7023 strb r3, [r4, #0] if (status == HAL_OK) - 8005804: 197b adds r3, r7, r5 - 8005806: 781b ldrb r3, [r3, #0] - 8005808: 2b00 cmp r3, #0 - 800580a: d11e bne.n 800584a + 800580c: 197b adds r3, r7, r5 + 800580e: 781b ldrb r3, [r3, #0] + 8005810: 2b00 cmp r3, #0 + 8005812: d11e bne.n 8005852 { /* Start the TIM time Base generation in interrupt mode */ status = HAL_TIM_Base_Start_IT(&htim6); - 800580c: 197c adds r4, r7, r5 - 800580e: 4b14 ldr r3, [pc, #80] ; (8005860 ) - 8005810: 0018 movs r0, r3 - 8005812: f003 fb49 bl 8008ea8 - 8005816: 0003 movs r3, r0 - 8005818: 7023 strb r3, [r4, #0] + 8005814: 197c adds r4, r7, r5 + 8005816: 4b14 ldr r3, [pc, #80] ; (8005868 ) + 8005818: 0018 movs r0, r3 + 800581a: f003 fc89 bl 8009130 + 800581e: 0003 movs r3, r0 + 8005820: 7023 strb r3, [r4, #0] if (status == HAL_OK) - 800581a: 197b adds r3, r7, r5 - 800581c: 781b ldrb r3, [r3, #0] - 800581e: 2b00 cmp r3, #0 - 8005820: d113 bne.n 800584a + 8005822: 197b adds r3, r7, r5 + 8005824: 781b ldrb r3, [r3, #0] + 8005826: 2b00 cmp r3, #0 + 8005828: d113 bne.n 8005852 { /* Enable the TIM6 global Interrupt */ HAL_NVIC_EnableIRQ(TIM6_IRQn); - 8005822: 2011 movs r0, #17 - 8005824: f001 fd49 bl 80072ba + 800582a: 2011 movs r0, #17 + 800582c: f001 fe89 bl 8007542 /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8005828: 687b ldr r3, [r7, #4] - 800582a: 2b03 cmp r3, #3 - 800582c: d809 bhi.n 8005842 + 8005830: 687b ldr r3, [r7, #4] + 8005832: 2b03 cmp r3, #3 + 8005834: d809 bhi.n 800584a { /* Configure the TIM IRQ priority */ HAL_NVIC_SetPriority(TIM6_IRQn, TickPriority, 0U); - 800582e: 687b ldr r3, [r7, #4] - 8005830: 2200 movs r2, #0 - 8005832: 0019 movs r1, r3 - 8005834: 2011 movs r0, #17 - 8005836: f001 fd2b bl 8007290 + 8005836: 687b ldr r3, [r7, #4] + 8005838: 2200 movs r2, #0 + 800583a: 0019 movs r1, r3 + 800583c: 2011 movs r0, #17 + 800583e: f001 fe6b bl 8007518 uwTickPrio = TickPriority; - 800583a: 4b0c ldr r3, [pc, #48] ; (800586c ) - 800583c: 687a ldr r2, [r7, #4] - 800583e: 601a str r2, [r3, #0] - 8005840: e003 b.n 800584a + 8005842: 4b0c ldr r3, [pc, #48] ; (8005874 ) + 8005844: 687a ldr r2, [r7, #4] + 8005846: 601a str r2, [r3, #0] + 8005848: e003 b.n 8005852 } else { status = HAL_ERROR; - 8005842: 232b movs r3, #43 ; 0x2b - 8005844: 18fb adds r3, r7, r3 - 8005846: 2201 movs r2, #1 - 8005848: 701a strb r2, [r3, #0] + 800584a: 232b movs r3, #43 ; 0x2b + 800584c: 18fb adds r3, r7, r3 + 800584e: 2201 movs r2, #1 + 8005850: 701a strb r2, [r3, #0] } } } /* Return function status */ return status; - 800584a: 232b movs r3, #43 ; 0x2b - 800584c: 18fb adds r3, r7, r3 - 800584e: 781b ldrb r3, [r3, #0] + 8005852: 232b movs r3, #43 ; 0x2b + 8005854: 18fb adds r3, r7, r3 + 8005856: 781b ldrb r3, [r3, #0] } - 8005850: 0018 movs r0, r3 - 8005852: 46bd mov sp, r7 - 8005854: b00c add sp, #48 ; 0x30 - 8005856: bdb0 pop {r4, r5, r7, pc} - 8005858: 40021000 .word 0x40021000 - 800585c: 000f4240 .word 0x000f4240 - 8005860: 20000210 .word 0x20000210 - 8005864: 40001000 .word 0x40001000 - 8005868: 000003e7 .word 0x000003e7 - 800586c: 20000044 .word 0x20000044 + 8005858: 0018 movs r0, r3 + 800585a: 46bd mov sp, r7 + 800585c: b00c add sp, #48 ; 0x30 + 800585e: bdb0 pop {r4, r5, r7, pc} + 8005860: 40021000 .word 0x40021000 + 8005864: 000f4240 .word 0x000f4240 + 8005868: 20000210 .word 0x20000210 + 800586c: 40001000 .word 0x40001000 + 8005870: 000003e7 .word 0x000003e7 + 8005874: 20000044 .word 0x20000044 -08005870 : +08005878 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8005870: b580 push {r7, lr} - 8005872: af00 add r7, sp, #0 + 8005878: b580 push {r7, lr} + 800587a: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8005874: e7fe b.n 8005874 + 800587c: e7fe b.n 800587c -08005876 : +0800587e : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8005876: b580 push {r7, lr} - 8005878: af00 add r7, sp, #0 + 800587e: b580 push {r7, lr} + 8005880: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 800587a: e7fe b.n 800587a + 8005882: e7fe b.n 8005882 -0800587c : +08005884 : /** * @brief This function handles TIM6 global interrupt. */ void TIM6_IRQHandler(void) { - 800587c: b580 push {r7, lr} - 800587e: af00 add r7, sp, #0 + 8005884: b580 push {r7, lr} + 8005886: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); - 8005880: 4b03 ldr r3, [pc, #12] ; (8005890 ) - 8005882: 0018 movs r0, r3 - 8005884: f003 fe0e bl 80094a4 + 8005888: 4b03 ldr r3, [pc, #12] ; (8005898 ) + 800588a: 0018 movs r0, r3 + 800588c: f003 ff4e bl 800972c /* USER CODE BEGIN TIM6_IRQn 1 */ /* USER CODE END TIM6_IRQn 1 */ } - 8005888: 46c0 nop ; (mov r8, r8) - 800588a: 46bd mov sp, r7 - 800588c: bd80 pop {r7, pc} - 800588e: 46c0 nop ; (mov r8, r8) - 8005890: 20000210 .word 0x20000210 + 8005890: 46c0 nop ; (mov r8, r8) + 8005892: 46bd mov sp, r7 + 8005894: bd80 pop {r7, pc} + 8005896: 46c0 nop ; (mov r8, r8) + 8005898: 20000210 .word 0x20000210 -08005894 : +0800589c : /** * @brief This function handles TIM17 global interrupt. */ void TIM17_IRQHandler(void) { - 8005894: b580 push {r7, lr} - 8005896: af00 add r7, sp, #0 + 800589c: b580 push {r7, lr} + 800589e: af00 add r7, sp, #0 /* USER CODE BEGIN TIM17_IRQn 0 */ /* USER CODE END TIM17_IRQn 0 */ HAL_TIM_IRQHandler(&htim17); - 8005898: 4b03 ldr r3, [pc, #12] ; (80058a8 ) - 800589a: 0018 movs r0, r3 - 800589c: f003 fe02 bl 80094a4 + 80058a0: 4b03 ldr r3, [pc, #12] ; (80058b0 ) + 80058a2: 0018 movs r0, r3 + 80058a4: f003 ff42 bl 800972c /* USER CODE BEGIN TIM17_IRQn 1 */ /* USER CODE END TIM17_IRQn 1 */ } - 80058a0: 46c0 nop ; (mov r8, r8) - 80058a2: 46bd mov sp, r7 - 80058a4: bd80 pop {r7, pc} - 80058a6: 46c0 nop ; (mov r8, r8) - 80058a8: 200002f8 .word 0x200002f8 + 80058a8: 46c0 nop ; (mov r8, r8) + 80058aa: 46bd mov sp, r7 + 80058ac: bd80 pop {r7, pc} + 80058ae: 46c0 nop ; (mov r8, r8) + 80058b0: 20000344 .word 0x20000344 -080058ac <_sbrk>: +080058b4 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { - 80058ac: b580 push {r7, lr} - 80058ae: b086 sub sp, #24 - 80058b0: af00 add r7, sp, #0 - 80058b2: 6078 str r0, [r7, #4] + 80058b4: b580 push {r7, lr} + 80058b6: b086 sub sp, #24 + 80058b8: af00 add r7, sp, #0 + 80058ba: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; - 80058b4: 4a14 ldr r2, [pc, #80] ; (8005908 <_sbrk+0x5c>) - 80058b6: 4b15 ldr r3, [pc, #84] ; (800590c <_sbrk+0x60>) - 80058b8: 1ad3 subs r3, r2, r3 - 80058ba: 617b str r3, [r7, #20] + 80058bc: 4a14 ldr r2, [pc, #80] ; (8005910 <_sbrk+0x5c>) + 80058be: 4b15 ldr r3, [pc, #84] ; (8005914 <_sbrk+0x60>) + 80058c0: 1ad3 subs r3, r2, r3 + 80058c2: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; - 80058bc: 697b ldr r3, [r7, #20] - 80058be: 613b str r3, [r7, #16] + 80058c4: 697b ldr r3, [r7, #20] + 80058c6: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) - 80058c0: 4b13 ldr r3, [pc, #76] ; (8005910 <_sbrk+0x64>) - 80058c2: 681b ldr r3, [r3, #0] - 80058c4: 2b00 cmp r3, #0 - 80058c6: d102 bne.n 80058ce <_sbrk+0x22> + 80058c8: 4b13 ldr r3, [pc, #76] ; (8005918 <_sbrk+0x64>) + 80058ca: 681b ldr r3, [r3, #0] + 80058cc: 2b00 cmp r3, #0 + 80058ce: d102 bne.n 80058d6 <_sbrk+0x22> { __sbrk_heap_end = &_end; - 80058c8: 4b11 ldr r3, [pc, #68] ; (8005910 <_sbrk+0x64>) - 80058ca: 4a12 ldr r2, [pc, #72] ; (8005914 <_sbrk+0x68>) - 80058cc: 601a str r2, [r3, #0] + 80058d0: 4b11 ldr r3, [pc, #68] ; (8005918 <_sbrk+0x64>) + 80058d2: 4a12 ldr r2, [pc, #72] ; (800591c <_sbrk+0x68>) + 80058d4: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) - 80058ce: 4b10 ldr r3, [pc, #64] ; (8005910 <_sbrk+0x64>) - 80058d0: 681a ldr r2, [r3, #0] - 80058d2: 687b ldr r3, [r7, #4] - 80058d4: 18d3 adds r3, r2, r3 - 80058d6: 693a ldr r2, [r7, #16] - 80058d8: 429a cmp r2, r3 - 80058da: d207 bcs.n 80058ec <_sbrk+0x40> + 80058d6: 4b10 ldr r3, [pc, #64] ; (8005918 <_sbrk+0x64>) + 80058d8: 681a ldr r2, [r3, #0] + 80058da: 687b ldr r3, [r7, #4] + 80058dc: 18d3 adds r3, r2, r3 + 80058de: 693a ldr r2, [r7, #16] + 80058e0: 429a cmp r2, r3 + 80058e2: d207 bcs.n 80058f4 <_sbrk+0x40> { errno = ENOMEM; - 80058dc: f008 fb42 bl 800df64 <__errno> - 80058e0: 0003 movs r3, r0 - 80058e2: 220c movs r2, #12 - 80058e4: 601a str r2, [r3, #0] + 80058e4: f009 f95e bl 800eba4 <__errno> + 80058e8: 0003 movs r3, r0 + 80058ea: 220c movs r2, #12 + 80058ec: 601a str r2, [r3, #0] return (void *)-1; - 80058e6: 2301 movs r3, #1 - 80058e8: 425b negs r3, r3 - 80058ea: e009 b.n 8005900 <_sbrk+0x54> + 80058ee: 2301 movs r3, #1 + 80058f0: 425b negs r3, r3 + 80058f2: e009 b.n 8005908 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; - 80058ec: 4b08 ldr r3, [pc, #32] ; (8005910 <_sbrk+0x64>) - 80058ee: 681b ldr r3, [r3, #0] - 80058f0: 60fb str r3, [r7, #12] + 80058f4: 4b08 ldr r3, [pc, #32] ; (8005918 <_sbrk+0x64>) + 80058f6: 681b ldr r3, [r3, #0] + 80058f8: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; - 80058f2: 4b07 ldr r3, [pc, #28] ; (8005910 <_sbrk+0x64>) - 80058f4: 681a ldr r2, [r3, #0] - 80058f6: 687b ldr r3, [r7, #4] - 80058f8: 18d2 adds r2, r2, r3 - 80058fa: 4b05 ldr r3, [pc, #20] ; (8005910 <_sbrk+0x64>) - 80058fc: 601a str r2, [r3, #0] + 80058fa: 4b07 ldr r3, [pc, #28] ; (8005918 <_sbrk+0x64>) + 80058fc: 681a ldr r2, [r3, #0] + 80058fe: 687b ldr r3, [r7, #4] + 8005900: 18d2 adds r2, r2, r3 + 8005902: 4b05 ldr r3, [pc, #20] ; (8005918 <_sbrk+0x64>) + 8005904: 601a str r2, [r3, #0] return (void *)prev_heap_end; - 80058fe: 68fb ldr r3, [r7, #12] + 8005906: 68fb ldr r3, [r7, #12] } - 8005900: 0018 movs r0, r3 - 8005902: 46bd mov sp, r7 - 8005904: b006 add sp, #24 - 8005906: bd80 pop {r7, pc} - 8005908: 20009000 .word 0x20009000 - 800590c: 00000400 .word 0x00000400 - 8005910: 2000025c .word 0x2000025c - 8005914: 20002960 .word 0x20002960 + 8005908: 0018 movs r0, r3 + 800590a: 46bd mov sp, r7 + 800590c: b006 add sp, #24 + 800590e: bd80 pop {r7, pc} + 8005910: 20009000 .word 0x20009000 + 8005914: 00000400 .word 0x00000400 + 8005918: 2000025c .word 0x2000025c + 800591c: 20002a40 .word 0x20002a40 -08005918 : +08005920 : * @brief Setup the microcontroller system. * @param None * @retval None */ void SystemInit(void) { - 8005918: b580 push {r7, lr} - 800591a: af00 add r7, sp, #0 + 8005920: b580 push {r7, lr} + 8005922: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation */ #endif /* USER_VECT_TAB_ADDRESS */ } - 800591c: 46c0 nop ; (mov r8, r8) - 800591e: 46bd mov sp, r7 - 8005920: bd80 pop {r7, pc} + 8005924: 46c0 nop ; (mov r8, r8) + 8005926: 46bd mov sp, r7 + 8005928: bd80 pop {r7, pc} ... -08005924 : +0800592c : TIM_HandleTypeDef htim15; TIM_HandleTypeDef htim17; /* TIM1 init function */ void MX_TIM1_Init(void) { - 8005924: b580 push {r7, lr} - 8005926: b0a4 sub sp, #144 ; 0x90 - 8005928: af00 add r7, sp, #0 + 800592c: b580 push {r7, lr} + 800592e: b0a4 sub sp, #144 ; 0x90 + 8005930: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_Init 0 */ /* USER CODE END TIM1_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 800592a: 2380 movs r3, #128 ; 0x80 - 800592c: 18fb adds r3, r7, r3 - 800592e: 0018 movs r0, r3 - 8005930: 2310 movs r3, #16 - 8005932: 001a movs r2, r3 - 8005934: 2100 movs r1, #0 - 8005936: f008 fb4a bl 800dfce + 8005932: 2380 movs r3, #128 ; 0x80 + 8005934: 18fb adds r3, r7, r3 + 8005936: 0018 movs r0, r3 + 8005938: 2310 movs r3, #16 + 800593a: 001a movs r2, r3 + 800593c: 2100 movs r1, #0 + 800593e: f009 f966 bl 800ec0e TIM_SlaveConfigTypeDef sSlaveConfig = {0}; - 800593a: 236c movs r3, #108 ; 0x6c - 800593c: 18fb adds r3, r7, r3 - 800593e: 0018 movs r0, r3 - 8005940: 2314 movs r3, #20 - 8005942: 001a movs r2, r3 - 8005944: 2100 movs r1, #0 - 8005946: f008 fb42 bl 800dfce + 8005942: 236c movs r3, #108 ; 0x6c + 8005944: 18fb adds r3, r7, r3 + 8005946: 0018 movs r0, r3 + 8005948: 2314 movs r3, #20 + 800594a: 001a movs r2, r3 + 800594c: 2100 movs r1, #0 + 800594e: f009 f95e bl 800ec0e TIM_MasterConfigTypeDef sMasterConfig = {0}; - 800594a: 2360 movs r3, #96 ; 0x60 - 800594c: 18fb adds r3, r7, r3 - 800594e: 0018 movs r0, r3 - 8005950: 230c movs r3, #12 - 8005952: 001a movs r2, r3 - 8005954: 2100 movs r1, #0 - 8005956: f008 fb3a bl 800dfce + 8005952: 2360 movs r3, #96 ; 0x60 + 8005954: 18fb adds r3, r7, r3 + 8005956: 0018 movs r0, r3 + 8005958: 230c movs r3, #12 + 800595a: 001a movs r2, r3 + 800595c: 2100 movs r1, #0 + 800595e: f009 f956 bl 800ec0e TIM_IC_InitTypeDef sConfigIC = {0}; - 800595a: 2350 movs r3, #80 ; 0x50 - 800595c: 18fb adds r3, r7, r3 - 800595e: 0018 movs r0, r3 - 8005960: 2310 movs r3, #16 - 8005962: 001a movs r2, r3 - 8005964: 2100 movs r1, #0 - 8005966: f008 fb32 bl 800dfce + 8005962: 2350 movs r3, #80 ; 0x50 + 8005964: 18fb adds r3, r7, r3 + 8005966: 0018 movs r0, r3 + 8005968: 2310 movs r3, #16 + 800596a: 001a movs r2, r3 + 800596c: 2100 movs r1, #0 + 800596e: f009 f94e bl 800ec0e TIM_OC_InitTypeDef sConfigOC = {0}; - 800596a: 2334 movs r3, #52 ; 0x34 - 800596c: 18fb adds r3, r7, r3 - 800596e: 0018 movs r0, r3 - 8005970: 231c movs r3, #28 - 8005972: 001a movs r2, r3 - 8005974: 2100 movs r1, #0 - 8005976: f008 fb2a bl 800dfce + 8005972: 2334 movs r3, #52 ; 0x34 + 8005974: 18fb adds r3, r7, r3 + 8005976: 0018 movs r0, r3 + 8005978: 231c movs r3, #28 + 800597a: 001a movs r2, r3 + 800597c: 2100 movs r1, #0 + 800597e: f009 f946 bl 800ec0e TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - 800597a: 003b movs r3, r7 - 800597c: 0018 movs r0, r3 - 800597e: 2334 movs r3, #52 ; 0x34 - 8005980: 001a movs r2, r3 - 8005982: 2100 movs r1, #0 - 8005984: f008 fb23 bl 800dfce + 8005982: 003b movs r3, r7 + 8005984: 0018 movs r0, r3 + 8005986: 2334 movs r3, #52 ; 0x34 + 8005988: 001a movs r2, r3 + 800598a: 2100 movs r1, #0 + 800598c: f009 f93f bl 800ec0e /* USER CODE BEGIN TIM1_Init 1 */ /* USER CODE END TIM1_Init 1 */ htim1.Instance = TIM1; - 8005988: 4b75 ldr r3, [pc, #468] ; (8005b60 ) - 800598a: 4a76 ldr r2, [pc, #472] ; (8005b64 ) - 800598c: 601a str r2, [r3, #0] + 8005990: 4b75 ldr r3, [pc, #468] ; (8005b68 ) + 8005992: 4a76 ldr r2, [pc, #472] ; (8005b6c ) + 8005994: 601a str r2, [r3, #0] htim1.Init.Prescaler = 640-1; - 800598e: 4b74 ldr r3, [pc, #464] ; (8005b60 ) - 8005990: 4a75 ldr r2, [pc, #468] ; (8005b68 ) - 8005992: 605a str r2, [r3, #4] + 8005996: 4b74 ldr r3, [pc, #464] ; (8005b68 ) + 8005998: 4a75 ldr r2, [pc, #468] ; (8005b70 ) + 800599a: 605a str r2, [r3, #4] htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 8005994: 4b72 ldr r3, [pc, #456] ; (8005b60 ) - 8005996: 2200 movs r2, #0 - 8005998: 609a str r2, [r3, #8] + 800599c: 4b72 ldr r3, [pc, #456] ; (8005b68 ) + 800599e: 2200 movs r2, #0 + 80059a0: 609a str r2, [r3, #8] htim1.Init.Period = 999; - 800599a: 4b71 ldr r3, [pc, #452] ; (8005b60 ) - 800599c: 4a73 ldr r2, [pc, #460] ; (8005b6c ) - 800599e: 60da str r2, [r3, #12] + 80059a2: 4b71 ldr r3, [pc, #452] ; (8005b68 ) + 80059a4: 4a73 ldr r2, [pc, #460] ; (8005b74 ) + 80059a6: 60da str r2, [r3, #12] htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 80059a0: 4b6f ldr r3, [pc, #444] ; (8005b60 ) - 80059a2: 2200 movs r2, #0 - 80059a4: 611a str r2, [r3, #16] + 80059a8: 4b6f ldr r3, [pc, #444] ; (8005b68 ) + 80059aa: 2200 movs r2, #0 + 80059ac: 611a str r2, [r3, #16] htim1.Init.RepetitionCounter = 0; - 80059a6: 4b6e ldr r3, [pc, #440] ; (8005b60 ) - 80059a8: 2200 movs r2, #0 - 80059aa: 615a str r2, [r3, #20] + 80059ae: 4b6e ldr r3, [pc, #440] ; (8005b68 ) + 80059b0: 2200 movs r2, #0 + 80059b2: 615a str r2, [r3, #20] htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 80059ac: 4b6c ldr r3, [pc, #432] ; (8005b60 ) - 80059ae: 2200 movs r2, #0 - 80059b0: 619a str r2, [r3, #24] + 80059b4: 4b6c ldr r3, [pc, #432] ; (8005b68 ) + 80059b6: 2200 movs r2, #0 + 80059b8: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 80059b2: 4b6b ldr r3, [pc, #428] ; (8005b60 ) - 80059b4: 0018 movs r0, r3 - 80059b6: f003 fa1f bl 8008df8 - 80059ba: 1e03 subs r3, r0, #0 - 80059bc: d001 beq.n 80059c2 + 80059ba: 4b6b ldr r3, [pc, #428] ; (8005b68 ) + 80059bc: 0018 movs r0, r3 + 80059be: f003 fb5f bl 8009080 + 80059c2: 1e03 subs r3, r0, #0 + 80059c4: d001 beq.n 80059ca { Error_Handler(); - 80059be: f7fd fedb bl 8003778 + 80059c6: f7fd fedb bl 8003780 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 80059c2: 2180 movs r1, #128 ; 0x80 - 80059c4: 187b adds r3, r7, r1 - 80059c6: 2280 movs r2, #128 ; 0x80 - 80059c8: 0152 lsls r2, r2, #5 - 80059ca: 601a str r2, [r3, #0] + 80059ca: 2180 movs r1, #128 ; 0x80 + 80059cc: 187b adds r3, r7, r1 + 80059ce: 2280 movs r2, #128 ; 0x80 + 80059d0: 0152 lsls r2, r2, #5 + 80059d2: 601a str r2, [r3, #0] if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 80059cc: 187a adds r2, r7, r1 - 80059ce: 4b64 ldr r3, [pc, #400] ; (8005b60 ) - 80059d0: 0011 movs r1, r2 - 80059d2: 0018 movs r0, r3 - 80059d4: f004 f83c bl 8009a50 - 80059d8: 1e03 subs r3, r0, #0 - 80059da: d001 beq.n 80059e0 + 80059d4: 187a adds r2, r7, r1 + 80059d6: 4b64 ldr r3, [pc, #400] ; (8005b68 ) + 80059d8: 0011 movs r1, r2 + 80059da: 0018 movs r0, r3 + 80059dc: f004 f97c bl 8009cd8 + 80059e0: 1e03 subs r3, r0, #0 + 80059e2: d001 beq.n 80059e8 { Error_Handler(); - 80059dc: f7fd fecc bl 8003778 + 80059e4: f7fd fecc bl 8003780 } if (HAL_TIM_IC_Init(&htim1) != HAL_OK) - 80059e0: 4b5f ldr r3, [pc, #380] ; (8005b60 ) - 80059e2: 0018 movs r0, r3 - 80059e4: f003 fc28 bl 8009238 - 80059e8: 1e03 subs r3, r0, #0 - 80059ea: d001 beq.n 80059f0 + 80059e8: 4b5f ldr r3, [pc, #380] ; (8005b68 ) + 80059ea: 0018 movs r0, r3 + 80059ec: f003 fd68 bl 80094c0 + 80059f0: 1e03 subs r3, r0, #0 + 80059f2: d001 beq.n 80059f8 { Error_Handler(); - 80059ec: f7fd fec4 bl 8003778 + 80059f4: f7fd fec4 bl 8003780 } if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) - 80059f0: 4b5b ldr r3, [pc, #364] ; (8005b60 ) - 80059f2: 0018 movs r0, r3 - 80059f4: f003 fadc bl 8008fb0 - 80059f8: 1e03 subs r3, r0, #0 - 80059fa: d001 beq.n 8005a00 + 80059f8: 4b5b ldr r3, [pc, #364] ; (8005b68 ) + 80059fa: 0018 movs r0, r3 + 80059fc: f003 fc1c bl 8009238 + 8005a00: 1e03 subs r3, r0, #0 + 8005a02: d001 beq.n 8005a08 { Error_Handler(); - 80059fc: f7fd febc bl 8003778 + 8005a04: f7fd febc bl 8003780 } if (HAL_TIM_OnePulse_Init(&htim1, TIM_OPMODE_SINGLE) != HAL_OK) - 8005a00: 4b57 ldr r3, [pc, #348] ; (8005b60 ) - 8005a02: 2108 movs r1, #8 - 8005a04: 0018 movs r0, r3 - 8005a06: f003 fc77 bl 80092f8 - 8005a0a: 1e03 subs r3, r0, #0 - 8005a0c: d001 beq.n 8005a12 + 8005a08: 4b57 ldr r3, [pc, #348] ; (8005b68 ) + 8005a0a: 2108 movs r1, #8 + 8005a0c: 0018 movs r0, r3 + 8005a0e: f003 fdb7 bl 8009580 + 8005a12: 1e03 subs r3, r0, #0 + 8005a14: d001 beq.n 8005a1a { Error_Handler(); - 8005a0e: f7fd feb3 bl 8003778 + 8005a16: f7fd feb3 bl 8003780 } sSlaveConfig.SlaveMode = TIM_SLAVEMODE_COMBINED_RESETTRIGGER; - 8005a12: 216c movs r1, #108 ; 0x6c - 8005a14: 187b adds r3, r7, r1 - 8005a16: 2280 movs r2, #128 ; 0x80 - 8005a18: 0252 lsls r2, r2, #9 - 8005a1a: 601a str r2, [r3, #0] - sSlaveConfig.InputTrigger = TIM_TS_TI1FP1; + 8005a1a: 216c movs r1, #108 ; 0x6c 8005a1c: 187b adds r3, r7, r1 - 8005a1e: 2250 movs r2, #80 ; 0x50 - 8005a20: 605a str r2, [r3, #4] + 8005a1e: 2280 movs r2, #128 ; 0x80 + 8005a20: 0252 lsls r2, r2, #9 + 8005a22: 601a str r2, [r3, #0] + sSlaveConfig.InputTrigger = TIM_TS_TI1FP1; + 8005a24: 187b adds r3, r7, r1 + 8005a26: 2250 movs r2, #80 ; 0x50 + 8005a28: 605a str r2, [r3, #4] sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - 8005a22: 187b adds r3, r7, r1 - 8005a24: 2200 movs r2, #0 - 8005a26: 609a str r2, [r3, #8] + 8005a2a: 187b adds r3, r7, r1 + 8005a2c: 2200 movs r2, #0 + 8005a2e: 609a str r2, [r3, #8] sSlaveConfig.TriggerFilter = 0; - 8005a28: 187b adds r3, r7, r1 - 8005a2a: 2200 movs r2, #0 - 8005a2c: 611a str r2, [r3, #16] + 8005a30: 187b adds r3, r7, r1 + 8005a32: 2200 movs r2, #0 + 8005a34: 611a str r2, [r3, #16] if (HAL_TIM_SlaveConfigSynchro(&htim1, &sSlaveConfig) != HAL_OK) - 8005a2e: 187a adds r2, r7, r1 - 8005a30: 4b4b ldr r3, [pc, #300] ; (8005b60 ) - 8005a32: 0011 movs r1, r2 - 8005a34: 0018 movs r0, r3 - 8005a36: f004 f8e1 bl 8009bfc - 8005a3a: 1e03 subs r3, r0, #0 - 8005a3c: d001 beq.n 8005a42 + 8005a36: 187a adds r2, r7, r1 + 8005a38: 4b4b ldr r3, [pc, #300] ; (8005b68 ) + 8005a3a: 0011 movs r1, r2 + 8005a3c: 0018 movs r0, r3 + 8005a3e: f004 fa21 bl 8009e84 + 8005a42: 1e03 subs r3, r0, #0 + 8005a44: d001 beq.n 8005a4a { Error_Handler(); - 8005a3e: f7fd fe9b bl 8003778 + 8005a46: f7fd fe9b bl 8003780 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8005a42: 2160 movs r1, #96 ; 0x60 - 8005a44: 187b adds r3, r7, r1 - 8005a46: 2200 movs r2, #0 - 8005a48: 601a str r2, [r3, #0] + 8005a4a: 2160 movs r1, #96 ; 0x60 + 8005a4c: 187b adds r3, r7, r1 + 8005a4e: 2200 movs r2, #0 + 8005a50: 601a str r2, [r3, #0] sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8005a4a: 187b adds r3, r7, r1 - 8005a4c: 2200 movs r2, #0 - 8005a4e: 605a str r2, [r3, #4] + 8005a52: 187b adds r3, r7, r1 + 8005a54: 2200 movs r2, #0 + 8005a56: 605a str r2, [r3, #4] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8005a50: 187b adds r3, r7, r1 - 8005a52: 2200 movs r2, #0 - 8005a54: 609a str r2, [r3, #8] + 8005a58: 187b adds r3, r7, r1 + 8005a5a: 2200 movs r2, #0 + 8005a5c: 609a str r2, [r3, #8] if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) - 8005a56: 187a adds r2, r7, r1 - 8005a58: 4b41 ldr r3, [pc, #260] ; (8005b60 ) - 8005a5a: 0011 movs r1, r2 - 8005a5c: 0018 movs r0, r3 - 8005a5e: f004 fee3 bl 800a828 - 8005a62: 1e03 subs r3, r0, #0 - 8005a64: d001 beq.n 8005a6a + 8005a5e: 187a adds r2, r7, r1 + 8005a60: 4b41 ldr r3, [pc, #260] ; (8005b68 ) + 8005a62: 0011 movs r1, r2 + 8005a64: 0018 movs r0, r3 + 8005a66: f005 f823 bl 800aab0 + 8005a6a: 1e03 subs r3, r0, #0 + 8005a6c: d001 beq.n 8005a72 { Error_Handler(); - 8005a66: f7fd fe87 bl 8003778 + 8005a6e: f7fd fe87 bl 8003780 } sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING; - 8005a6a: 2150 movs r1, #80 ; 0x50 - 8005a6c: 187b adds r3, r7, r1 - 8005a6e: 2200 movs r2, #0 - 8005a70: 601a str r2, [r3, #0] + 8005a72: 2150 movs r1, #80 ; 0x50 + 8005a74: 187b adds r3, r7, r1 + 8005a76: 2200 movs r2, #0 + 8005a78: 601a str r2, [r3, #0] sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI; - 8005a72: 187b adds r3, r7, r1 - 8005a74: 2201 movs r2, #1 - 8005a76: 605a str r2, [r3, #4] + 8005a7a: 187b adds r3, r7, r1 + 8005a7c: 2201 movs r2, #1 + 8005a7e: 605a str r2, [r3, #4] sConfigIC.ICPrescaler = TIM_ICPSC_DIV1; - 8005a78: 187b adds r3, r7, r1 - 8005a7a: 2200 movs r2, #0 - 8005a7c: 609a str r2, [r3, #8] + 8005a80: 187b adds r3, r7, r1 + 8005a82: 2200 movs r2, #0 + 8005a84: 609a str r2, [r3, #8] sConfigIC.ICFilter = 0; - 8005a7e: 187b adds r3, r7, r1 - 8005a80: 2200 movs r2, #0 - 8005a82: 60da str r2, [r3, #12] - if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) - 8005a84: 1879 adds r1, r7, r1 - 8005a86: 4b36 ldr r3, [pc, #216] ; (8005b60 ) + 8005a86: 187b adds r3, r7, r1 8005a88: 2200 movs r2, #0 - 8005a8a: 0018 movs r0, r3 - 8005a8c: f003 fe3c bl 8009708 - 8005a90: 1e03 subs r3, r0, #0 - 8005a92: d001 beq.n 8005a98 + 8005a8a: 60da str r2, [r3, #12] + if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) + 8005a8c: 1879 adds r1, r7, r1 + 8005a8e: 4b36 ldr r3, [pc, #216] ; (8005b68 ) + 8005a90: 2200 movs r2, #0 + 8005a92: 0018 movs r0, r3 + 8005a94: f003 ff7c bl 8009990 + 8005a98: 1e03 subs r3, r0, #0 + 8005a9a: d001 beq.n 8005aa0 { Error_Handler(); - 8005a94: f7fd fe70 bl 8003778 + 8005a9c: f7fd fe70 bl 8003780 } sConfigOC.OCMode = TIM_OCMODE_PWM2; - 8005a98: 2134 movs r1, #52 ; 0x34 - 8005a9a: 187b adds r3, r7, r1 - 8005a9c: 2270 movs r2, #112 ; 0x70 - 8005a9e: 601a str r2, [r3, #0] + 8005aa0: 2134 movs r1, #52 ; 0x34 + 8005aa2: 187b adds r3, r7, r1 + 8005aa4: 2270 movs r2, #112 ; 0x70 + 8005aa6: 601a str r2, [r3, #0] sConfigOC.Pulse = 1020; - 8005aa0: 187b adds r3, r7, r1 - 8005aa2: 22ff movs r2, #255 ; 0xff - 8005aa4: 0092 lsls r2, r2, #2 - 8005aa6: 605a str r2, [r3, #4] - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8005aa8: 187b adds r3, r7, r1 - 8005aaa: 2200 movs r2, #0 - 8005aac: 609a str r2, [r3, #8] + 8005aaa: 22ff movs r2, #255 ; 0xff + 8005aac: 0092 lsls r2, r2, #2 + 8005aae: 605a str r2, [r3, #4] + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 8005ab0: 187b adds r3, r7, r1 + 8005ab2: 2200 movs r2, #0 + 8005ab4: 609a str r2, [r3, #8] sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; - 8005aae: 187b adds r3, r7, r1 - 8005ab0: 2200 movs r2, #0 - 8005ab2: 60da str r2, [r3, #12] + 8005ab6: 187b adds r3, r7, r1 + 8005ab8: 2200 movs r2, #0 + 8005aba: 60da str r2, [r3, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8005ab4: 187b adds r3, r7, r1 - 8005ab6: 2200 movs r2, #0 - 8005ab8: 611a str r2, [r3, #16] + 8005abc: 187b adds r3, r7, r1 + 8005abe: 2200 movs r2, #0 + 8005ac0: 611a str r2, [r3, #16] sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; - 8005aba: 187b adds r3, r7, r1 - 8005abc: 2200 movs r2, #0 - 8005abe: 615a str r2, [r3, #20] + 8005ac2: 187b adds r3, r7, r1 + 8005ac4: 2200 movs r2, #0 + 8005ac6: 615a str r2, [r3, #20] sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; - 8005ac0: 187b adds r3, r7, r1 - 8005ac2: 2200 movs r2, #0 - 8005ac4: 619a str r2, [r3, #24] + 8005ac8: 187b adds r3, r7, r1 + 8005aca: 2200 movs r2, #0 + 8005acc: 619a str r2, [r3, #24] if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) - 8005ac6: 1879 adds r1, r7, r1 - 8005ac8: 4b25 ldr r3, [pc, #148] ; (8005b60 ) - 8005aca: 2204 movs r2, #4 - 8005acc: 0018 movs r0, r3 - 8005ace: f003 febf bl 8009850 - 8005ad2: 1e03 subs r3, r0, #0 - 8005ad4: d001 beq.n 8005ada + 8005ace: 1879 adds r1, r7, r1 + 8005ad0: 4b25 ldr r3, [pc, #148] ; (8005b68 ) + 8005ad2: 2204 movs r2, #4 + 8005ad4: 0018 movs r0, r3 + 8005ad6: f003 ffff bl 8009ad8 + 8005ada: 1e03 subs r3, r0, #0 + 8005adc: d001 beq.n 8005ae2 { Error_Handler(); - 8005ad6: f7fd fe4f bl 8003778 + 8005ade: f7fd fe4f bl 8003780 } __HAL_TIM_DISABLE_OCxPRELOAD(&htim1, TIM_CHANNEL_2); - 8005ada: 4b21 ldr r3, [pc, #132] ; (8005b60 ) - 8005adc: 681b ldr r3, [r3, #0] - 8005ade: 699a ldr r2, [r3, #24] - 8005ae0: 4b1f ldr r3, [pc, #124] ; (8005b60 ) - 8005ae2: 681b ldr r3, [r3, #0] - 8005ae4: 4922 ldr r1, [pc, #136] ; (8005b70 ) - 8005ae6: 400a ands r2, r1 - 8005ae8: 619a str r2, [r3, #24] + 8005ae2: 4b21 ldr r3, [pc, #132] ; (8005b68 ) + 8005ae4: 681b ldr r3, [r3, #0] + 8005ae6: 699a ldr r2, [r3, #24] + 8005ae8: 4b1f ldr r3, [pc, #124] ; (8005b68 ) + 8005aea: 681b ldr r3, [r3, #0] + 8005aec: 4922 ldr r1, [pc, #136] ; (8005b78 ) + 8005aee: 400a ands r2, r1 + 8005af0: 619a str r2, [r3, #24] sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; - 8005aea: 003b movs r3, r7 - 8005aec: 2200 movs r2, #0 - 8005aee: 601a str r2, [r3, #0] + 8005af2: 003b movs r3, r7 + 8005af4: 2200 movs r2, #0 + 8005af6: 601a str r2, [r3, #0] sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - 8005af0: 003b movs r3, r7 - 8005af2: 2200 movs r2, #0 - 8005af4: 605a str r2, [r3, #4] + 8005af8: 003b movs r3, r7 + 8005afa: 2200 movs r2, #0 + 8005afc: 605a str r2, [r3, #4] sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - 8005af6: 003b movs r3, r7 - 8005af8: 2200 movs r2, #0 - 8005afa: 609a str r2, [r3, #8] + 8005afe: 003b movs r3, r7 + 8005b00: 2200 movs r2, #0 + 8005b02: 609a str r2, [r3, #8] sBreakDeadTimeConfig.DeadTime = 0; - 8005afc: 003b movs r3, r7 - 8005afe: 2200 movs r2, #0 - 8005b00: 60da str r2, [r3, #12] + 8005b04: 003b movs r3, r7 + 8005b06: 2200 movs r2, #0 + 8005b08: 60da str r2, [r3, #12] sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - 8005b02: 003b movs r3, r7 - 8005b04: 2200 movs r2, #0 - 8005b06: 611a str r2, [r3, #16] + 8005b0a: 003b movs r3, r7 + 8005b0c: 2200 movs r2, #0 + 8005b0e: 611a str r2, [r3, #16] sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - 8005b08: 003b movs r3, r7 - 8005b0a: 2280 movs r2, #128 ; 0x80 - 8005b0c: 0192 lsls r2, r2, #6 - 8005b0e: 615a str r2, [r3, #20] - sBreakDeadTimeConfig.BreakFilter = 0; 8005b10: 003b movs r3, r7 - 8005b12: 2200 movs r2, #0 - 8005b14: 619a str r2, [r3, #24] + 8005b12: 2280 movs r2, #128 ; 0x80 + 8005b14: 0192 lsls r2, r2, #6 + 8005b16: 615a str r2, [r3, #20] + sBreakDeadTimeConfig.BreakFilter = 0; + 8005b18: 003b movs r3, r7 + 8005b1a: 2200 movs r2, #0 + 8005b1c: 619a str r2, [r3, #24] sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT; - 8005b16: 003b movs r3, r7 - 8005b18: 2200 movs r2, #0 - 8005b1a: 61da str r2, [r3, #28] + 8005b1e: 003b movs r3, r7 + 8005b20: 2200 movs r2, #0 + 8005b22: 61da str r2, [r3, #28] sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; - 8005b1c: 003b movs r3, r7 - 8005b1e: 2200 movs r2, #0 - 8005b20: 621a str r2, [r3, #32] + 8005b24: 003b movs r3, r7 + 8005b26: 2200 movs r2, #0 + 8005b28: 621a str r2, [r3, #32] sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - 8005b22: 003b movs r3, r7 - 8005b24: 2280 movs r2, #128 ; 0x80 - 8005b26: 0492 lsls r2, r2, #18 - 8005b28: 625a str r2, [r3, #36] ; 0x24 - sBreakDeadTimeConfig.Break2Filter = 0; 8005b2a: 003b movs r3, r7 - 8005b2c: 2200 movs r2, #0 - 8005b2e: 629a str r2, [r3, #40] ; 0x28 + 8005b2c: 2280 movs r2, #128 ; 0x80 + 8005b2e: 0492 lsls r2, r2, #18 + 8005b30: 625a str r2, [r3, #36] ; 0x24 + sBreakDeadTimeConfig.Break2Filter = 0; + 8005b32: 003b movs r3, r7 + 8005b34: 2200 movs r2, #0 + 8005b36: 629a str r2, [r3, #40] ; 0x28 sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT; - 8005b30: 003b movs r3, r7 - 8005b32: 2200 movs r2, #0 - 8005b34: 62da str r2, [r3, #44] ; 0x2c + 8005b38: 003b movs r3, r7 + 8005b3a: 2200 movs r2, #0 + 8005b3c: 62da str r2, [r3, #44] ; 0x2c sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - 8005b36: 003b movs r3, r7 - 8005b38: 2200 movs r2, #0 - 8005b3a: 631a str r2, [r3, #48] ; 0x30 + 8005b3e: 003b movs r3, r7 + 8005b40: 2200 movs r2, #0 + 8005b42: 631a str r2, [r3, #48] ; 0x30 if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - 8005b3c: 003a movs r2, r7 - 8005b3e: 4b08 ldr r3, [pc, #32] ; (8005b60 ) - 8005b40: 0011 movs r1, r2 - 8005b42: 0018 movs r0, r3 - 8005b44: f004 fed8 bl 800a8f8 - 8005b48: 1e03 subs r3, r0, #0 - 8005b4a: d001 beq.n 8005b50 + 8005b44: 003a movs r2, r7 + 8005b46: 4b08 ldr r3, [pc, #32] ; (8005b68 ) + 8005b48: 0011 movs r1, r2 + 8005b4a: 0018 movs r0, r3 + 8005b4c: f005 f818 bl 800ab80 + 8005b50: 1e03 subs r3, r0, #0 + 8005b52: d001 beq.n 8005b58 { Error_Handler(); - 8005b4c: f7fd fe14 bl 8003778 + 8005b54: f7fd fe14 bl 8003780 } /* USER CODE BEGIN TIM1_Init 2 */ /* USER CODE END TIM1_Init 2 */ HAL_TIM_MspPostInit(&htim1); - 8005b50: 4b03 ldr r3, [pc, #12] ; (8005b60 ) - 8005b52: 0018 movs r0, r3 - 8005b54: f000 f97a bl 8005e4c + 8005b58: 4b03 ldr r3, [pc, #12] ; (8005b68 ) + 8005b5a: 0018 movs r0, r3 + 8005b5c: f000 f9e0 bl 8005f20 } - 8005b58: 46c0 nop ; (mov r8, r8) - 8005b5a: 46bd mov sp, r7 - 8005b5c: b024 add sp, #144 ; 0x90 - 8005b5e: bd80 pop {r7, pc} - 8005b60: 20000260 .word 0x20000260 - 8005b64: 40012c00 .word 0x40012c00 - 8005b68: 0000027f .word 0x0000027f - 8005b6c: 000003e7 .word 0x000003e7 - 8005b70: fffff7ff .word 0xfffff7ff + 8005b60: 46c0 nop ; (mov r8, r8) + 8005b62: 46bd mov sp, r7 + 8005b64: b024 add sp, #144 ; 0x90 + 8005b66: bd80 pop {r7, pc} + 8005b68: 20000260 .word 0x20000260 + 8005b6c: 40012c00 .word 0x40012c00 + 8005b70: 0000027f .word 0x0000027f + 8005b74: 000003e7 .word 0x000003e7 + 8005b78: fffff7ff .word 0xfffff7ff -08005b74 : +08005b7c : +/* TIM14 init function */ +void MX_TIM14_Init(void) +{ + 8005b7c: b580 push {r7, lr} + 8005b7e: b088 sub sp, #32 + 8005b80: af00 add r7, sp, #0 + + /* USER CODE BEGIN TIM14_Init 0 */ + + /* USER CODE END TIM14_Init 0 */ + + TIM_OC_InitTypeDef sConfigOC = {0}; + 8005b82: 1d3b adds r3, r7, #4 + 8005b84: 0018 movs r0, r3 + 8005b86: 231c movs r3, #28 + 8005b88: 001a movs r2, r3 + 8005b8a: 2100 movs r1, #0 + 8005b8c: f009 f83f bl 800ec0e + + /* USER CODE BEGIN TIM14_Init 1 */ + + /* USER CODE END TIM14_Init 1 */ + htim14.Instance = TIM14; + 8005b90: 4b1f ldr r3, [pc, #124] ; (8005c10 ) + 8005b92: 4a20 ldr r2, [pc, #128] ; (8005c14 ) + 8005b94: 601a str r2, [r3, #0] + htim14.Init.Prescaler = 0; + 8005b96: 4b1e ldr r3, [pc, #120] ; (8005c10 ) + 8005b98: 2200 movs r2, #0 + 8005b9a: 605a str r2, [r3, #4] + htim14.Init.CounterMode = TIM_COUNTERMODE_UP; + 8005b9c: 4b1c ldr r3, [pc, #112] ; (8005c10 ) + 8005b9e: 2200 movs r2, #0 + 8005ba0: 609a str r2, [r3, #8] + htim14.Init.Period = 65535; + 8005ba2: 4b1b ldr r3, [pc, #108] ; (8005c10 ) + 8005ba4: 4a1c ldr r2, [pc, #112] ; (8005c18 ) + 8005ba6: 60da str r2, [r3, #12] + htim14.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8005ba8: 4b19 ldr r3, [pc, #100] ; (8005c10 ) + 8005baa: 2200 movs r2, #0 + 8005bac: 611a str r2, [r3, #16] + htim14.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8005bae: 4b18 ldr r3, [pc, #96] ; (8005c10 ) + 8005bb0: 2200 movs r2, #0 + 8005bb2: 619a str r2, [r3, #24] + if (HAL_TIM_Base_Init(&htim14) != HAL_OK) + 8005bb4: 4b16 ldr r3, [pc, #88] ; (8005c10 ) + 8005bb6: 0018 movs r0, r3 + 8005bb8: f003 fa62 bl 8009080 + 8005bbc: 1e03 subs r3, r0, #0 + 8005bbe: d001 beq.n 8005bc4 + { + Error_Handler(); + 8005bc0: f7fd fdde bl 8003780 + } + if (HAL_TIM_PWM_Init(&htim14) != HAL_OK) + 8005bc4: 4b12 ldr r3, [pc, #72] ; (8005c10 ) + 8005bc6: 0018 movs r0, r3 + 8005bc8: f003 fb36 bl 8009238 + 8005bcc: 1e03 subs r3, r0, #0 + 8005bce: d001 beq.n 8005bd4 + { + Error_Handler(); + 8005bd0: f7fd fdd6 bl 8003780 + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + 8005bd4: 1d3b adds r3, r7, #4 + 8005bd6: 2260 movs r2, #96 ; 0x60 + 8005bd8: 601a str r2, [r3, #0] + sConfigOC.Pulse = 0; + 8005bda: 1d3b adds r3, r7, #4 + 8005bdc: 2200 movs r2, #0 + 8005bde: 605a str r2, [r3, #4] + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 8005be0: 1d3b adds r3, r7, #4 + 8005be2: 2200 movs r2, #0 + 8005be4: 609a str r2, [r3, #8] + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 8005be6: 1d3b adds r3, r7, #4 + 8005be8: 2200 movs r2, #0 + 8005bea: 611a str r2, [r3, #16] + if (HAL_TIM_PWM_ConfigChannel(&htim14, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 8005bec: 1d39 adds r1, r7, #4 + 8005bee: 4b08 ldr r3, [pc, #32] ; (8005c10 ) + 8005bf0: 2200 movs r2, #0 + 8005bf2: 0018 movs r0, r3 + 8005bf4: f003 ff70 bl 8009ad8 + 8005bf8: 1e03 subs r3, r0, #0 + 8005bfa: d001 beq.n 8005c00 + { + Error_Handler(); + 8005bfc: f7fd fdc0 bl 8003780 + } + /* USER CODE BEGIN TIM14_Init 2 */ + + /* USER CODE END TIM14_Init 2 */ + HAL_TIM_MspPostInit(&htim14); + 8005c00: 4b03 ldr r3, [pc, #12] ; (8005c10 ) + 8005c02: 0018 movs r0, r3 + 8005c04: f000 f98c bl 8005f20 + +} + 8005c08: 46c0 nop ; (mov r8, r8) + 8005c0a: 46bd mov sp, r7 + 8005c0c: b008 add sp, #32 + 8005c0e: bd80 pop {r7, pc} + 8005c10: 200002ac .word 0x200002ac + 8005c14: 40002000 .word 0x40002000 + 8005c18: 0000ffff .word 0x0000ffff + +08005c1c : /* TIM15 init function */ void MX_TIM15_Init(void) { - 8005b74: b580 push {r7, lr} - 8005b76: b09c sub sp, #112 ; 0x70 - 8005b78: af00 add r7, sp, #0 + 8005c1c: b580 push {r7, lr} + 8005c1e: b09c sub sp, #112 ; 0x70 + 8005c20: af00 add r7, sp, #0 /* USER CODE BEGIN TIM15_Init 0 */ /* USER CODE END TIM15_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8005b7a: 2360 movs r3, #96 ; 0x60 - 8005b7c: 18fb adds r3, r7, r3 - 8005b7e: 0018 movs r0, r3 - 8005b80: 2310 movs r3, #16 - 8005b82: 001a movs r2, r3 - 8005b84: 2100 movs r1, #0 - 8005b86: f008 fa22 bl 800dfce + 8005c22: 2360 movs r3, #96 ; 0x60 + 8005c24: 18fb adds r3, r7, r3 + 8005c26: 0018 movs r0, r3 + 8005c28: 2310 movs r3, #16 + 8005c2a: 001a movs r2, r3 + 8005c2c: 2100 movs r1, #0 + 8005c2e: f008 ffee bl 800ec0e TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8005b8a: 2354 movs r3, #84 ; 0x54 - 8005b8c: 18fb adds r3, r7, r3 - 8005b8e: 0018 movs r0, r3 - 8005b90: 230c movs r3, #12 - 8005b92: 001a movs r2, r3 - 8005b94: 2100 movs r1, #0 - 8005b96: f008 fa1a bl 800dfce + 8005c32: 2354 movs r3, #84 ; 0x54 + 8005c34: 18fb adds r3, r7, r3 + 8005c36: 0018 movs r0, r3 + 8005c38: 230c movs r3, #12 + 8005c3a: 001a movs r2, r3 + 8005c3c: 2100 movs r1, #0 + 8005c3e: f008 ffe6 bl 800ec0e TIM_OC_InitTypeDef sConfigOC = {0}; - 8005b9a: 2338 movs r3, #56 ; 0x38 - 8005b9c: 18fb adds r3, r7, r3 - 8005b9e: 0018 movs r0, r3 - 8005ba0: 231c movs r3, #28 - 8005ba2: 001a movs r2, r3 - 8005ba4: 2100 movs r1, #0 - 8005ba6: f008 fa12 bl 800dfce + 8005c42: 2338 movs r3, #56 ; 0x38 + 8005c44: 18fb adds r3, r7, r3 + 8005c46: 0018 movs r0, r3 + 8005c48: 231c movs r3, #28 + 8005c4a: 001a movs r2, r3 + 8005c4c: 2100 movs r1, #0 + 8005c4e: f008 ffde bl 800ec0e TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - 8005baa: 1d3b adds r3, r7, #4 - 8005bac: 0018 movs r0, r3 - 8005bae: 2334 movs r3, #52 ; 0x34 - 8005bb0: 001a movs r2, r3 - 8005bb2: 2100 movs r1, #0 - 8005bb4: f008 fa0b bl 800dfce + 8005c52: 1d3b adds r3, r7, #4 + 8005c54: 0018 movs r0, r3 + 8005c56: 2334 movs r3, #52 ; 0x34 + 8005c58: 001a movs r2, r3 + 8005c5a: 2100 movs r1, #0 + 8005c5c: f008 ffd7 bl 800ec0e /* USER CODE BEGIN TIM15_Init 1 */ /* USER CODE END TIM15_Init 1 */ htim15.Instance = TIM15; - 8005bb8: 4b48 ldr r3, [pc, #288] ; (8005cdc ) - 8005bba: 4a49 ldr r2, [pc, #292] ; (8005ce0 ) - 8005bbc: 601a str r2, [r3, #0] + 8005c60: 4b48 ldr r3, [pc, #288] ; (8005d84 ) + 8005c62: 4a49 ldr r2, [pc, #292] ; (8005d88 ) + 8005c64: 601a str r2, [r3, #0] htim15.Init.Prescaler = 320-1; - 8005bbe: 4b47 ldr r3, [pc, #284] ; (8005cdc ) - 8005bc0: 2240 movs r2, #64 ; 0x40 - 8005bc2: 32ff adds r2, #255 ; 0xff - 8005bc4: 605a str r2, [r3, #4] + 8005c66: 4b47 ldr r3, [pc, #284] ; (8005d84 ) + 8005c68: 2240 movs r2, #64 ; 0x40 + 8005c6a: 32ff adds r2, #255 ; 0xff + 8005c6c: 605a str r2, [r3, #4] htim15.Init.CounterMode = TIM_COUNTERMODE_UP; - 8005bc6: 4b45 ldr r3, [pc, #276] ; (8005cdc ) - 8005bc8: 2200 movs r2, #0 - 8005bca: 609a str r2, [r3, #8] + 8005c6e: 4b45 ldr r3, [pc, #276] ; (8005d84 ) + 8005c70: 2200 movs r2, #0 + 8005c72: 609a str r2, [r3, #8] htim15.Init.Period = 100-1; - 8005bcc: 4b43 ldr r3, [pc, #268] ; (8005cdc ) - 8005bce: 2263 movs r2, #99 ; 0x63 - 8005bd0: 60da str r2, [r3, #12] + 8005c74: 4b43 ldr r3, [pc, #268] ; (8005d84 ) + 8005c76: 2263 movs r2, #99 ; 0x63 + 8005c78: 60da str r2, [r3, #12] htim15.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8005bd2: 4b42 ldr r3, [pc, #264] ; (8005cdc ) - 8005bd4: 2200 movs r2, #0 - 8005bd6: 611a str r2, [r3, #16] + 8005c7a: 4b42 ldr r3, [pc, #264] ; (8005d84 ) + 8005c7c: 2200 movs r2, #0 + 8005c7e: 611a str r2, [r3, #16] htim15.Init.RepetitionCounter = 0; - 8005bd8: 4b40 ldr r3, [pc, #256] ; (8005cdc ) - 8005bda: 2200 movs r2, #0 - 8005bdc: 615a str r2, [r3, #20] + 8005c80: 4b40 ldr r3, [pc, #256] ; (8005d84 ) + 8005c82: 2200 movs r2, #0 + 8005c84: 615a str r2, [r3, #20] htim15.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8005bde: 4b3f ldr r3, [pc, #252] ; (8005cdc ) - 8005be0: 2200 movs r2, #0 - 8005be2: 619a str r2, [r3, #24] + 8005c86: 4b3f ldr r3, [pc, #252] ; (8005d84 ) + 8005c88: 2200 movs r2, #0 + 8005c8a: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim15) != HAL_OK) - 8005be4: 4b3d ldr r3, [pc, #244] ; (8005cdc ) - 8005be6: 0018 movs r0, r3 - 8005be8: f003 f906 bl 8008df8 - 8005bec: 1e03 subs r3, r0, #0 - 8005bee: d001 beq.n 8005bf4 + 8005c8c: 4b3d ldr r3, [pc, #244] ; (8005d84 ) + 8005c8e: 0018 movs r0, r3 + 8005c90: f003 f9f6 bl 8009080 + 8005c94: 1e03 subs r3, r0, #0 + 8005c96: d001 beq.n 8005c9c { Error_Handler(); - 8005bf0: f7fd fdc2 bl 8003778 + 8005c98: f7fd fd72 bl 8003780 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8005bf4: 2160 movs r1, #96 ; 0x60 - 8005bf6: 187b adds r3, r7, r1 - 8005bf8: 2280 movs r2, #128 ; 0x80 - 8005bfa: 0152 lsls r2, r2, #5 - 8005bfc: 601a str r2, [r3, #0] + 8005c9c: 2160 movs r1, #96 ; 0x60 + 8005c9e: 187b adds r3, r7, r1 + 8005ca0: 2280 movs r2, #128 ; 0x80 + 8005ca2: 0152 lsls r2, r2, #5 + 8005ca4: 601a str r2, [r3, #0] if (HAL_TIM_ConfigClockSource(&htim15, &sClockSourceConfig) != HAL_OK) - 8005bfe: 187a adds r2, r7, r1 - 8005c00: 4b36 ldr r3, [pc, #216] ; (8005cdc ) - 8005c02: 0011 movs r1, r2 - 8005c04: 0018 movs r0, r3 - 8005c06: f003 ff23 bl 8009a50 - 8005c0a: 1e03 subs r3, r0, #0 - 8005c0c: d001 beq.n 8005c12 + 8005ca6: 187a adds r2, r7, r1 + 8005ca8: 4b36 ldr r3, [pc, #216] ; (8005d84 ) + 8005caa: 0011 movs r1, r2 + 8005cac: 0018 movs r0, r3 + 8005cae: f004 f813 bl 8009cd8 + 8005cb2: 1e03 subs r3, r0, #0 + 8005cb4: d001 beq.n 8005cba { Error_Handler(); - 8005c0e: f7fd fdb3 bl 8003778 + 8005cb6: f7fd fd63 bl 8003780 } if (HAL_TIM_PWM_Init(&htim15) != HAL_OK) - 8005c12: 4b32 ldr r3, [pc, #200] ; (8005cdc ) - 8005c14: 0018 movs r0, r3 - 8005c16: f003 f9cb bl 8008fb0 - 8005c1a: 1e03 subs r3, r0, #0 - 8005c1c: d001 beq.n 8005c22 + 8005cba: 4b32 ldr r3, [pc, #200] ; (8005d84 ) + 8005cbc: 0018 movs r0, r3 + 8005cbe: f003 fabb bl 8009238 + 8005cc2: 1e03 subs r3, r0, #0 + 8005cc4: d001 beq.n 8005cca { Error_Handler(); - 8005c1e: f7fd fdab bl 8003778 + 8005cc6: f7fd fd5b bl 8003780 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8005c22: 2154 movs r1, #84 ; 0x54 - 8005c24: 187b adds r3, r7, r1 - 8005c26: 2200 movs r2, #0 - 8005c28: 601a str r2, [r3, #0] + 8005cca: 2154 movs r1, #84 ; 0x54 + 8005ccc: 187b adds r3, r7, r1 + 8005cce: 2200 movs r2, #0 + 8005cd0: 601a str r2, [r3, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8005c2a: 187b adds r3, r7, r1 - 8005c2c: 2200 movs r2, #0 - 8005c2e: 609a str r2, [r3, #8] + 8005cd2: 187b adds r3, r7, r1 + 8005cd4: 2200 movs r2, #0 + 8005cd6: 609a str r2, [r3, #8] if (HAL_TIMEx_MasterConfigSynchronization(&htim15, &sMasterConfig) != HAL_OK) - 8005c30: 187a adds r2, r7, r1 - 8005c32: 4b2a ldr r3, [pc, #168] ; (8005cdc ) - 8005c34: 0011 movs r1, r2 - 8005c36: 0018 movs r0, r3 - 8005c38: f004 fdf6 bl 800a828 - 8005c3c: 1e03 subs r3, r0, #0 - 8005c3e: d001 beq.n 8005c44 + 8005cd8: 187a adds r2, r7, r1 + 8005cda: 4b2a ldr r3, [pc, #168] ; (8005d84 ) + 8005cdc: 0011 movs r1, r2 + 8005cde: 0018 movs r0, r3 + 8005ce0: f004 fee6 bl 800aab0 + 8005ce4: 1e03 subs r3, r0, #0 + 8005ce6: d001 beq.n 8005cec { Error_Handler(); - 8005c40: f7fd fd9a bl 8003778 + 8005ce8: f7fd fd4a bl 8003780 } sConfigOC.OCMode = TIM_OCMODE_PWM1; - 8005c44: 2138 movs r1, #56 ; 0x38 - 8005c46: 187b adds r3, r7, r1 - 8005c48: 2260 movs r2, #96 ; 0x60 - 8005c4a: 601a str r2, [r3, #0] + 8005cec: 2138 movs r1, #56 ; 0x38 + 8005cee: 187b adds r3, r7, r1 + 8005cf0: 2260 movs r2, #96 ; 0x60 + 8005cf2: 601a str r2, [r3, #0] sConfigOC.Pulse = 0; - 8005c4c: 187b adds r3, r7, r1 - 8005c4e: 2200 movs r2, #0 - 8005c50: 605a str r2, [r3, #4] + 8005cf4: 187b adds r3, r7, r1 + 8005cf6: 2200 movs r2, #0 + 8005cf8: 605a str r2, [r3, #4] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 8005c52: 187b adds r3, r7, r1 - 8005c54: 2200 movs r2, #0 - 8005c56: 609a str r2, [r3, #8] + 8005cfa: 187b adds r3, r7, r1 + 8005cfc: 2200 movs r2, #0 + 8005cfe: 609a str r2, [r3, #8] sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; - 8005c58: 187b adds r3, r7, r1 - 8005c5a: 2200 movs r2, #0 - 8005c5c: 60da str r2, [r3, #12] + 8005d00: 187b adds r3, r7, r1 + 8005d02: 2200 movs r2, #0 + 8005d04: 60da str r2, [r3, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 8005c5e: 187b adds r3, r7, r1 - 8005c60: 2200 movs r2, #0 - 8005c62: 611a str r2, [r3, #16] + 8005d06: 187b adds r3, r7, r1 + 8005d08: 2200 movs r2, #0 + 8005d0a: 611a str r2, [r3, #16] sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; - 8005c64: 187b adds r3, r7, r1 - 8005c66: 2200 movs r2, #0 - 8005c68: 615a str r2, [r3, #20] + 8005d0c: 187b adds r3, r7, r1 + 8005d0e: 2200 movs r2, #0 + 8005d10: 615a str r2, [r3, #20] sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; - 8005c6a: 187b adds r3, r7, r1 - 8005c6c: 2200 movs r2, #0 - 8005c6e: 619a str r2, [r3, #24] + 8005d12: 187b adds r3, r7, r1 + 8005d14: 2200 movs r2, #0 + 8005d16: 619a str r2, [r3, #24] if (HAL_TIM_PWM_ConfigChannel(&htim15, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 8005c70: 1879 adds r1, r7, r1 - 8005c72: 4b1a ldr r3, [pc, #104] ; (8005cdc ) - 8005c74: 2200 movs r2, #0 - 8005c76: 0018 movs r0, r3 - 8005c78: f003 fdea bl 8009850 - 8005c7c: 1e03 subs r3, r0, #0 - 8005c7e: d001 beq.n 8005c84 + 8005d18: 1879 adds r1, r7, r1 + 8005d1a: 4b1a ldr r3, [pc, #104] ; (8005d84 ) + 8005d1c: 2200 movs r2, #0 + 8005d1e: 0018 movs r0, r3 + 8005d20: f003 feda bl 8009ad8 + 8005d24: 1e03 subs r3, r0, #0 + 8005d26: d001 beq.n 8005d2c { Error_Handler(); - 8005c80: f7fd fd7a bl 8003778 + 8005d28: f7fd fd2a bl 8003780 } sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; - 8005c84: 1d3b adds r3, r7, #4 - 8005c86: 2200 movs r2, #0 - 8005c88: 601a str r2, [r3, #0] + 8005d2c: 1d3b adds r3, r7, #4 + 8005d2e: 2200 movs r2, #0 + 8005d30: 601a str r2, [r3, #0] sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - 8005c8a: 1d3b adds r3, r7, #4 - 8005c8c: 2200 movs r2, #0 - 8005c8e: 605a str r2, [r3, #4] + 8005d32: 1d3b adds r3, r7, #4 + 8005d34: 2200 movs r2, #0 + 8005d36: 605a str r2, [r3, #4] sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - 8005c90: 1d3b adds r3, r7, #4 - 8005c92: 2200 movs r2, #0 - 8005c94: 609a str r2, [r3, #8] + 8005d38: 1d3b adds r3, r7, #4 + 8005d3a: 2200 movs r2, #0 + 8005d3c: 609a str r2, [r3, #8] sBreakDeadTimeConfig.DeadTime = 0; - 8005c96: 1d3b adds r3, r7, #4 - 8005c98: 2200 movs r2, #0 - 8005c9a: 60da str r2, [r3, #12] + 8005d3e: 1d3b adds r3, r7, #4 + 8005d40: 2200 movs r2, #0 + 8005d42: 60da str r2, [r3, #12] sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - 8005c9c: 1d3b adds r3, r7, #4 - 8005c9e: 2200 movs r2, #0 - 8005ca0: 611a str r2, [r3, #16] + 8005d44: 1d3b adds r3, r7, #4 + 8005d46: 2200 movs r2, #0 + 8005d48: 611a str r2, [r3, #16] sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - 8005ca2: 1d3b adds r3, r7, #4 - 8005ca4: 2280 movs r2, #128 ; 0x80 - 8005ca6: 0192 lsls r2, r2, #6 - 8005ca8: 615a str r2, [r3, #20] + 8005d4a: 1d3b adds r3, r7, #4 + 8005d4c: 2280 movs r2, #128 ; 0x80 + 8005d4e: 0192 lsls r2, r2, #6 + 8005d50: 615a str r2, [r3, #20] sBreakDeadTimeConfig.BreakFilter = 0; - 8005caa: 1d3b adds r3, r7, #4 - 8005cac: 2200 movs r2, #0 - 8005cae: 619a str r2, [r3, #24] + 8005d52: 1d3b adds r3, r7, #4 + 8005d54: 2200 movs r2, #0 + 8005d56: 619a str r2, [r3, #24] sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - 8005cb0: 1d3b adds r3, r7, #4 - 8005cb2: 2200 movs r2, #0 - 8005cb4: 631a str r2, [r3, #48] ; 0x30 + 8005d58: 1d3b adds r3, r7, #4 + 8005d5a: 2200 movs r2, #0 + 8005d5c: 631a str r2, [r3, #48] ; 0x30 if (HAL_TIMEx_ConfigBreakDeadTime(&htim15, &sBreakDeadTimeConfig) != HAL_OK) - 8005cb6: 1d3a adds r2, r7, #4 - 8005cb8: 4b08 ldr r3, [pc, #32] ; (8005cdc ) - 8005cba: 0011 movs r1, r2 - 8005cbc: 0018 movs r0, r3 - 8005cbe: f004 fe1b bl 800a8f8 - 8005cc2: 1e03 subs r3, r0, #0 - 8005cc4: d001 beq.n 8005cca + 8005d5e: 1d3a adds r2, r7, #4 + 8005d60: 4b08 ldr r3, [pc, #32] ; (8005d84 ) + 8005d62: 0011 movs r1, r2 + 8005d64: 0018 movs r0, r3 + 8005d66: f004 ff0b bl 800ab80 + 8005d6a: 1e03 subs r3, r0, #0 + 8005d6c: d001 beq.n 8005d72 { Error_Handler(); - 8005cc6: f7fd fd57 bl 8003778 + 8005d6e: f7fd fd07 bl 8003780 } /* USER CODE BEGIN TIM15_Init 2 */ /* USER CODE END TIM15_Init 2 */ HAL_TIM_MspPostInit(&htim15); - 8005cca: 4b04 ldr r3, [pc, #16] ; (8005cdc ) - 8005ccc: 0018 movs r0, r3 - 8005cce: f000 f8bd bl 8005e4c + 8005d72: 4b04 ldr r3, [pc, #16] ; (8005d84 ) + 8005d74: 0018 movs r0, r3 + 8005d76: f000 f8d3 bl 8005f20 } - 8005cd2: 46c0 nop ; (mov r8, r8) - 8005cd4: 46bd mov sp, r7 - 8005cd6: b01c add sp, #112 ; 0x70 - 8005cd8: bd80 pop {r7, pc} - 8005cda: 46c0 nop ; (mov r8, r8) - 8005cdc: 200002ac .word 0x200002ac - 8005ce0: 40014000 .word 0x40014000 + 8005d7a: 46c0 nop ; (mov r8, r8) + 8005d7c: 46bd mov sp, r7 + 8005d7e: b01c add sp, #112 ; 0x70 + 8005d80: bd80 pop {r7, pc} + 8005d82: 46c0 nop ; (mov r8, r8) + 8005d84: 200002f8 .word 0x200002f8 + 8005d88: 40014000 .word 0x40014000 -08005ce4 : +08005d8c : /* TIM17 init function */ void MX_TIM17_Init(void) { - 8005ce4: b580 push {r7, lr} - 8005ce6: af00 add r7, sp, #0 + 8005d8c: b580 push {r7, lr} + 8005d8e: af00 add r7, sp, #0 /* USER CODE END TIM17_Init 0 */ /* USER CODE BEGIN TIM17_Init 1 */ /* USER CODE END TIM17_Init 1 */ htim17.Instance = TIM17; - 8005ce8: 4b14 ldr r3, [pc, #80] ; (8005d3c ) - 8005cea: 4a15 ldr r2, [pc, #84] ; (8005d40 ) - 8005cec: 601a str r2, [r3, #0] + 8005d90: 4b14 ldr r3, [pc, #80] ; (8005de4 ) + 8005d92: 4a15 ldr r2, [pc, #84] ; (8005de8 ) + 8005d94: 601a str r2, [r3, #0] htim17.Init.Prescaler = 64000-1; - 8005cee: 4b13 ldr r3, [pc, #76] ; (8005d3c ) - 8005cf0: 4a14 ldr r2, [pc, #80] ; (8005d44 ) - 8005cf2: 605a str r2, [r3, #4] + 8005d96: 4b13 ldr r3, [pc, #76] ; (8005de4 ) + 8005d98: 4a14 ldr r2, [pc, #80] ; (8005dec ) + 8005d9a: 605a str r2, [r3, #4] htim17.Init.CounterMode = TIM_COUNTERMODE_UP; - 8005cf4: 4b11 ldr r3, [pc, #68] ; (8005d3c ) - 8005cf6: 2200 movs r2, #0 - 8005cf8: 609a str r2, [r3, #8] + 8005d9c: 4b11 ldr r3, [pc, #68] ; (8005de4 ) + 8005d9e: 2200 movs r2, #0 + 8005da0: 609a str r2, [r3, #8] htim17.Init.Period = 999; - 8005cfa: 4b10 ldr r3, [pc, #64] ; (8005d3c ) - 8005cfc: 4a12 ldr r2, [pc, #72] ; (8005d48 ) - 8005cfe: 60da str r2, [r3, #12] + 8005da2: 4b10 ldr r3, [pc, #64] ; (8005de4 ) + 8005da4: 4a12 ldr r2, [pc, #72] ; (8005df0 ) + 8005da6: 60da str r2, [r3, #12] htim17.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8005d00: 4b0e ldr r3, [pc, #56] ; (8005d3c ) - 8005d02: 2200 movs r2, #0 - 8005d04: 611a str r2, [r3, #16] + 8005da8: 4b0e ldr r3, [pc, #56] ; (8005de4 ) + 8005daa: 2200 movs r2, #0 + 8005dac: 611a str r2, [r3, #16] htim17.Init.RepetitionCounter = 0; - 8005d06: 4b0d ldr r3, [pc, #52] ; (8005d3c ) - 8005d08: 2200 movs r2, #0 - 8005d0a: 615a str r2, [r3, #20] + 8005dae: 4b0d ldr r3, [pc, #52] ; (8005de4 ) + 8005db0: 2200 movs r2, #0 + 8005db2: 615a str r2, [r3, #20] htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8005d0c: 4b0b ldr r3, [pc, #44] ; (8005d3c ) - 8005d0e: 2200 movs r2, #0 - 8005d10: 619a str r2, [r3, #24] + 8005db4: 4b0b ldr r3, [pc, #44] ; (8005de4 ) + 8005db6: 2200 movs r2, #0 + 8005db8: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim17) != HAL_OK) - 8005d12: 4b0a ldr r3, [pc, #40] ; (8005d3c ) - 8005d14: 0018 movs r0, r3 - 8005d16: f003 f86f bl 8008df8 - 8005d1a: 1e03 subs r3, r0, #0 - 8005d1c: d001 beq.n 8005d22 + 8005dba: 4b0a ldr r3, [pc, #40] ; (8005de4 ) + 8005dbc: 0018 movs r0, r3 + 8005dbe: f003 f95f bl 8009080 + 8005dc2: 1e03 subs r3, r0, #0 + 8005dc4: d001 beq.n 8005dca { Error_Handler(); - 8005d1e: f7fd fd2b bl 8003778 + 8005dc6: f7fd fcdb bl 8003780 } if (HAL_TIM_OnePulse_Init(&htim17, TIM_OPMODE_SINGLE) != HAL_OK) - 8005d22: 4b06 ldr r3, [pc, #24] ; (8005d3c ) - 8005d24: 2108 movs r1, #8 - 8005d26: 0018 movs r0, r3 - 8005d28: f003 fae6 bl 80092f8 - 8005d2c: 1e03 subs r3, r0, #0 - 8005d2e: d001 beq.n 8005d34 + 8005dca: 4b06 ldr r3, [pc, #24] ; (8005de4 ) + 8005dcc: 2108 movs r1, #8 + 8005dce: 0018 movs r0, r3 + 8005dd0: f003 fbd6 bl 8009580 + 8005dd4: 1e03 subs r3, r0, #0 + 8005dd6: d001 beq.n 8005ddc { Error_Handler(); - 8005d30: f7fd fd22 bl 8003778 + 8005dd8: f7fd fcd2 bl 8003780 } /* USER CODE BEGIN TIM17_Init 2 */ /* USER CODE END TIM17_Init 2 */ } - 8005d34: 46c0 nop ; (mov r8, r8) - 8005d36: 46bd mov sp, r7 - 8005d38: bd80 pop {r7, pc} - 8005d3a: 46c0 nop ; (mov r8, r8) - 8005d3c: 200002f8 .word 0x200002f8 - 8005d40: 40014800 .word 0x40014800 - 8005d44: 0000f9ff .word 0x0000f9ff - 8005d48: 000003e7 .word 0x000003e7 + 8005ddc: 46c0 nop ; (mov r8, r8) + 8005dde: 46bd mov sp, r7 + 8005de0: bd80 pop {r7, pc} + 8005de2: 46c0 nop ; (mov r8, r8) + 8005de4: 20000344 .word 0x20000344 + 8005de8: 40014800 .word 0x40014800 + 8005dec: 0000f9ff .word 0x0000f9ff + 8005df0: 000003e7 .word 0x000003e7 -08005d4c : +08005df4 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { - 8005d4c: b590 push {r4, r7, lr} - 8005d4e: b08d sub sp, #52 ; 0x34 - 8005d50: af00 add r7, sp, #0 - 8005d52: 6078 str r0, [r7, #4] + 8005df4: b590 push {r4, r7, lr} + 8005df6: b08d sub sp, #52 ; 0x34 + 8005df8: af00 add r7, sp, #0 + 8005dfa: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8005d54: 241c movs r4, #28 - 8005d56: 193b adds r3, r7, r4 - 8005d58: 0018 movs r0, r3 - 8005d5a: 2314 movs r3, #20 - 8005d5c: 001a movs r2, r3 - 8005d5e: 2100 movs r1, #0 - 8005d60: f008 f935 bl 800dfce + 8005dfc: 241c movs r4, #28 + 8005dfe: 193b adds r3, r7, r4 + 8005e00: 0018 movs r0, r3 + 8005e02: 2314 movs r3, #20 + 8005e04: 001a movs r2, r3 + 8005e06: 2100 movs r1, #0 + 8005e08: f008 ff01 bl 800ec0e if(tim_baseHandle->Instance==TIM1) - 8005d64: 687b ldr r3, [r7, #4] - 8005d66: 681b ldr r3, [r3, #0] - 8005d68: 4a34 ldr r2, [pc, #208] ; (8005e3c ) - 8005d6a: 4293 cmp r3, r2 - 8005d6c: d132 bne.n 8005dd4 + 8005e0c: 687b ldr r3, [r7, #4] + 8005e0e: 681b ldr r3, [r3, #0] + 8005e10: 4a3e ldr r2, [pc, #248] ; (8005f0c ) + 8005e12: 4293 cmp r3, r2 + 8005e14: d132 bne.n 8005e7c { /* USER CODE BEGIN TIM1_MspInit 0 */ /* USER CODE END TIM1_MspInit 0 */ /* TIM1 clock enable */ __HAL_RCC_TIM1_CLK_ENABLE(); - 8005d6e: 4b34 ldr r3, [pc, #208] ; (8005e40 ) - 8005d70: 6c1a ldr r2, [r3, #64] ; 0x40 - 8005d72: 4b33 ldr r3, [pc, #204] ; (8005e40 ) - 8005d74: 2180 movs r1, #128 ; 0x80 - 8005d76: 0109 lsls r1, r1, #4 - 8005d78: 430a orrs r2, r1 - 8005d7a: 641a str r2, [r3, #64] ; 0x40 - 8005d7c: 4b30 ldr r3, [pc, #192] ; (8005e40 ) - 8005d7e: 6c1a ldr r2, [r3, #64] ; 0x40 - 8005d80: 2380 movs r3, #128 ; 0x80 - 8005d82: 011b lsls r3, r3, #4 - 8005d84: 4013 ands r3, r2 - 8005d86: 61bb str r3, [r7, #24] - 8005d88: 69bb ldr r3, [r7, #24] + 8005e16: 4b3e ldr r3, [pc, #248] ; (8005f10 ) + 8005e18: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005e1a: 4b3d ldr r3, [pc, #244] ; (8005f10 ) + 8005e1c: 2180 movs r1, #128 ; 0x80 + 8005e1e: 0109 lsls r1, r1, #4 + 8005e20: 430a orrs r2, r1 + 8005e22: 641a str r2, [r3, #64] ; 0x40 + 8005e24: 4b3a ldr r3, [pc, #232] ; (8005f10 ) + 8005e26: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005e28: 2380 movs r3, #128 ; 0x80 + 8005e2a: 011b lsls r3, r3, #4 + 8005e2c: 4013 ands r3, r2 + 8005e2e: 61bb str r3, [r7, #24] + 8005e30: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8005d8a: 4b2d ldr r3, [pc, #180] ; (8005e40 ) - 8005d8c: 6b5a ldr r2, [r3, #52] ; 0x34 - 8005d8e: 4b2c ldr r3, [pc, #176] ; (8005e40 ) - 8005d90: 2101 movs r1, #1 - 8005d92: 430a orrs r2, r1 - 8005d94: 635a str r2, [r3, #52] ; 0x34 - 8005d96: 4b2a ldr r3, [pc, #168] ; (8005e40 ) - 8005d98: 6b5b ldr r3, [r3, #52] ; 0x34 - 8005d9a: 2201 movs r2, #1 - 8005d9c: 4013 ands r3, r2 - 8005d9e: 617b str r3, [r7, #20] - 8005da0: 697b ldr r3, [r7, #20] + 8005e32: 4b37 ldr r3, [pc, #220] ; (8005f10 ) + 8005e34: 6b5a ldr r2, [r3, #52] ; 0x34 + 8005e36: 4b36 ldr r3, [pc, #216] ; (8005f10 ) + 8005e38: 2101 movs r1, #1 + 8005e3a: 430a orrs r2, r1 + 8005e3c: 635a str r2, [r3, #52] ; 0x34 + 8005e3e: 4b34 ldr r3, [pc, #208] ; (8005f10 ) + 8005e40: 6b5b ldr r3, [r3, #52] ; 0x34 + 8005e42: 2201 movs r2, #1 + 8005e44: 4013 ands r3, r2 + 8005e46: 617b str r3, [r7, #20] + 8005e48: 697b ldr r3, [r7, #20] /**TIM1 GPIO Configuration PA8 ------> TIM1_CH1 */ GPIO_InitStruct.Pin = TIM1_ZC_Pin; - 8005da2: 193b adds r3, r7, r4 - 8005da4: 2280 movs r2, #128 ; 0x80 - 8005da6: 0052 lsls r2, r2, #1 - 8005da8: 601a str r2, [r3, #0] + 8005e4a: 193b adds r3, r7, r4 + 8005e4c: 2280 movs r2, #128 ; 0x80 + 8005e4e: 0052 lsls r2, r2, #1 + 8005e50: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8005daa: 0021 movs r1, r4 - 8005dac: 187b adds r3, r7, r1 - 8005dae: 2202 movs r2, #2 - 8005db0: 605a str r2, [r3, #4] + 8005e52: 0021 movs r1, r4 + 8005e54: 187b adds r3, r7, r1 + 8005e56: 2202 movs r2, #2 + 8005e58: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8005db2: 187b adds r3, r7, r1 - 8005db4: 2200 movs r2, #0 - 8005db6: 609a str r2, [r3, #8] + 8005e5a: 187b adds r3, r7, r1 + 8005e5c: 2200 movs r2, #0 + 8005e5e: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8005db8: 187b adds r3, r7, r1 - 8005dba: 2200 movs r2, #0 - 8005dbc: 60da str r2, [r3, #12] + 8005e60: 187b adds r3, r7, r1 + 8005e62: 2200 movs r2, #0 + 8005e64: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF2_TIM1; - 8005dbe: 187b adds r3, r7, r1 - 8005dc0: 2202 movs r2, #2 - 8005dc2: 611a str r2, [r3, #16] + 8005e66: 187b adds r3, r7, r1 + 8005e68: 2202 movs r2, #2 + 8005e6a: 611a str r2, [r3, #16] HAL_GPIO_Init(TIM1_ZC_GPIO_Port, &GPIO_InitStruct); - 8005dc4: 187a adds r2, r7, r1 - 8005dc6: 23a0 movs r3, #160 ; 0xa0 - 8005dc8: 05db lsls r3, r3, #23 - 8005dca: 0011 movs r1, r2 - 8005dcc: 0018 movs r0, r3 - 8005dce: f001 fa85 bl 80072dc + 8005e6c: 187a adds r2, r7, r1 + 8005e6e: 23a0 movs r3, #160 ; 0xa0 + 8005e70: 05db lsls r3, r3, #23 + 8005e72: 0011 movs r1, r2 + 8005e74: 0018 movs r0, r3 + 8005e76: f001 fb75 bl 8007564 HAL_NVIC_EnableIRQ(TIM17_IRQn); /* USER CODE BEGIN TIM17_MspInit 1 */ /* USER CODE END TIM17_MspInit 1 */ } } - 8005dd2: e02e b.n 8005e32 + 8005e7a: e042 b.n 8005f02 + else if(tim_baseHandle->Instance==TIM14) + 8005e7c: 687b ldr r3, [r7, #4] + 8005e7e: 681b ldr r3, [r3, #0] + 8005e80: 4a24 ldr r2, [pc, #144] ; (8005f14 ) + 8005e82: 4293 cmp r3, r2 + 8005e84: d10e bne.n 8005ea4 + __HAL_RCC_TIM14_CLK_ENABLE(); + 8005e86: 4b22 ldr r3, [pc, #136] ; (8005f10 ) + 8005e88: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005e8a: 4b21 ldr r3, [pc, #132] ; (8005f10 ) + 8005e8c: 2180 movs r1, #128 ; 0x80 + 8005e8e: 0209 lsls r1, r1, #8 + 8005e90: 430a orrs r2, r1 + 8005e92: 641a str r2, [r3, #64] ; 0x40 + 8005e94: 4b1e ldr r3, [pc, #120] ; (8005f10 ) + 8005e96: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005e98: 2380 movs r3, #128 ; 0x80 + 8005e9a: 021b lsls r3, r3, #8 + 8005e9c: 4013 ands r3, r2 + 8005e9e: 613b str r3, [r7, #16] + 8005ea0: 693b ldr r3, [r7, #16] +} + 8005ea2: e02e b.n 8005f02 else if(tim_baseHandle->Instance==TIM15) - 8005dd4: 687b ldr r3, [r7, #4] - 8005dd6: 681b ldr r3, [r3, #0] - 8005dd8: 4a1a ldr r2, [pc, #104] ; (8005e44 ) - 8005dda: 4293 cmp r3, r2 - 8005ddc: d10e bne.n 8005dfc + 8005ea4: 687b ldr r3, [r7, #4] + 8005ea6: 681b ldr r3, [r3, #0] + 8005ea8: 4a1b ldr r2, [pc, #108] ; (8005f18 ) + 8005eaa: 4293 cmp r3, r2 + 8005eac: d10e bne.n 8005ecc __HAL_RCC_TIM15_CLK_ENABLE(); - 8005dde: 4b18 ldr r3, [pc, #96] ; (8005e40 ) - 8005de0: 6c1a ldr r2, [r3, #64] ; 0x40 - 8005de2: 4b17 ldr r3, [pc, #92] ; (8005e40 ) - 8005de4: 2180 movs r1, #128 ; 0x80 - 8005de6: 0249 lsls r1, r1, #9 - 8005de8: 430a orrs r2, r1 - 8005dea: 641a str r2, [r3, #64] ; 0x40 - 8005dec: 4b14 ldr r3, [pc, #80] ; (8005e40 ) - 8005dee: 6c1a ldr r2, [r3, #64] ; 0x40 - 8005df0: 2380 movs r3, #128 ; 0x80 - 8005df2: 025b lsls r3, r3, #9 - 8005df4: 4013 ands r3, r2 - 8005df6: 613b str r3, [r7, #16] - 8005df8: 693b ldr r3, [r7, #16] + 8005eae: 4b18 ldr r3, [pc, #96] ; (8005f10 ) + 8005eb0: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005eb2: 4b17 ldr r3, [pc, #92] ; (8005f10 ) + 8005eb4: 2180 movs r1, #128 ; 0x80 + 8005eb6: 0249 lsls r1, r1, #9 + 8005eb8: 430a orrs r2, r1 + 8005eba: 641a str r2, [r3, #64] ; 0x40 + 8005ebc: 4b14 ldr r3, [pc, #80] ; (8005f10 ) + 8005ebe: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005ec0: 2380 movs r3, #128 ; 0x80 + 8005ec2: 025b lsls r3, r3, #9 + 8005ec4: 4013 ands r3, r2 + 8005ec6: 60fb str r3, [r7, #12] + 8005ec8: 68fb ldr r3, [r7, #12] } - 8005dfa: e01a b.n 8005e32 + 8005eca: e01a b.n 8005f02 else if(tim_baseHandle->Instance==TIM17) - 8005dfc: 687b ldr r3, [r7, #4] - 8005dfe: 681b ldr r3, [r3, #0] - 8005e00: 4a11 ldr r2, [pc, #68] ; (8005e48 ) - 8005e02: 4293 cmp r3, r2 - 8005e04: d115 bne.n 8005e32 + 8005ecc: 687b ldr r3, [r7, #4] + 8005ece: 681b ldr r3, [r3, #0] + 8005ed0: 4a12 ldr r2, [pc, #72] ; (8005f1c ) + 8005ed2: 4293 cmp r3, r2 + 8005ed4: d115 bne.n 8005f02 __HAL_RCC_TIM17_CLK_ENABLE(); - 8005e06: 4b0e ldr r3, [pc, #56] ; (8005e40 ) - 8005e08: 6c1a ldr r2, [r3, #64] ; 0x40 - 8005e0a: 4b0d ldr r3, [pc, #52] ; (8005e40 ) - 8005e0c: 2180 movs r1, #128 ; 0x80 - 8005e0e: 02c9 lsls r1, r1, #11 - 8005e10: 430a orrs r2, r1 - 8005e12: 641a str r2, [r3, #64] ; 0x40 - 8005e14: 4b0a ldr r3, [pc, #40] ; (8005e40 ) - 8005e16: 6c1a ldr r2, [r3, #64] ; 0x40 - 8005e18: 2380 movs r3, #128 ; 0x80 - 8005e1a: 02db lsls r3, r3, #11 - 8005e1c: 4013 ands r3, r2 - 8005e1e: 60fb str r3, [r7, #12] - 8005e20: 68fb ldr r3, [r7, #12] + 8005ed6: 4b0e ldr r3, [pc, #56] ; (8005f10 ) + 8005ed8: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005eda: 4b0d ldr r3, [pc, #52] ; (8005f10 ) + 8005edc: 2180 movs r1, #128 ; 0x80 + 8005ede: 02c9 lsls r1, r1, #11 + 8005ee0: 430a orrs r2, r1 + 8005ee2: 641a str r2, [r3, #64] ; 0x40 + 8005ee4: 4b0a ldr r3, [pc, #40] ; (8005f10 ) + 8005ee6: 6c1a ldr r2, [r3, #64] ; 0x40 + 8005ee8: 2380 movs r3, #128 ; 0x80 + 8005eea: 02db lsls r3, r3, #11 + 8005eec: 4013 ands r3, r2 + 8005eee: 60bb str r3, [r7, #8] + 8005ef0: 68bb ldr r3, [r7, #8] HAL_NVIC_SetPriority(TIM17_IRQn, 3, 0); - 8005e22: 2200 movs r2, #0 - 8005e24: 2103 movs r1, #3 - 8005e26: 2016 movs r0, #22 - 8005e28: f001 fa32 bl 8007290 + 8005ef2: 2200 movs r2, #0 + 8005ef4: 2103 movs r1, #3 + 8005ef6: 2016 movs r0, #22 + 8005ef8: f001 fb0e bl 8007518 HAL_NVIC_EnableIRQ(TIM17_IRQn); - 8005e2c: 2016 movs r0, #22 - 8005e2e: f001 fa44 bl 80072ba + 8005efc: 2016 movs r0, #22 + 8005efe: f001 fb20 bl 8007542 } - 8005e32: 46c0 nop ; (mov r8, r8) - 8005e34: 46bd mov sp, r7 - 8005e36: b00d add sp, #52 ; 0x34 - 8005e38: bd90 pop {r4, r7, pc} - 8005e3a: 46c0 nop ; (mov r8, r8) - 8005e3c: 40012c00 .word 0x40012c00 - 8005e40: 40021000 .word 0x40021000 - 8005e44: 40014000 .word 0x40014000 - 8005e48: 40014800 .word 0x40014800 + 8005f02: 46c0 nop ; (mov r8, r8) + 8005f04: 46bd mov sp, r7 + 8005f06: b00d add sp, #52 ; 0x34 + 8005f08: bd90 pop {r4, r7, pc} + 8005f0a: 46c0 nop ; (mov r8, r8) + 8005f0c: 40012c00 .word 0x40012c00 + 8005f10: 40021000 .word 0x40021000 + 8005f14: 40002000 .word 0x40002000 + 8005f18: 40014000 .word 0x40014000 + 8005f1c: 40014800 .word 0x40014800 -08005e4c : +08005f20 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) { - 8005e4c: b590 push {r4, r7, lr} - 8005e4e: b08b sub sp, #44 ; 0x2c - 8005e50: af00 add r7, sp, #0 - 8005e52: 6078 str r0, [r7, #4] + 8005f20: b590 push {r4, r7, lr} + 8005f22: b08b sub sp, #44 ; 0x2c + 8005f24: af00 add r7, sp, #0 + 8005f26: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8005e54: 2414 movs r4, #20 - 8005e56: 193b adds r3, r7, r4 - 8005e58: 0018 movs r0, r3 - 8005e5a: 2314 movs r3, #20 - 8005e5c: 001a movs r2, r3 - 8005e5e: 2100 movs r1, #0 - 8005e60: f008 f8b5 bl 800dfce + 8005f28: 2414 movs r4, #20 + 8005f2a: 193b adds r3, r7, r4 + 8005f2c: 0018 movs r0, r3 + 8005f2e: 2314 movs r3, #20 + 8005f30: 001a movs r2, r3 + 8005f32: 2100 movs r1, #0 + 8005f34: f008 fe6b bl 800ec0e if(timHandle->Instance==TIM1) - 8005e64: 687b ldr r3, [r7, #4] - 8005e66: 681b ldr r3, [r3, #0] - 8005e68: 4a29 ldr r2, [pc, #164] ; (8005f10 ) - 8005e6a: 4293 cmp r3, r2 - 8005e6c: d124 bne.n 8005eb8 + 8005f38: 687b ldr r3, [r7, #4] + 8005f3a: 681b ldr r3, [r3, #0] + 8005f3c: 4a3d ldr r2, [pc, #244] ; (8006034 ) + 8005f3e: 4293 cmp r3, r2 + 8005f40: d124 bne.n 8005f8c { /* USER CODE BEGIN TIM1_MspPostInit 0 */ /* USER CODE END TIM1_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 8005e6e: 4b29 ldr r3, [pc, #164] ; (8005f14 ) - 8005e70: 6b5a ldr r2, [r3, #52] ; 0x34 - 8005e72: 4b28 ldr r3, [pc, #160] ; (8005f14 ) - 8005e74: 2101 movs r1, #1 - 8005e76: 430a orrs r2, r1 - 8005e78: 635a str r2, [r3, #52] ; 0x34 - 8005e7a: 4b26 ldr r3, [pc, #152] ; (8005f14 ) - 8005e7c: 6b5b ldr r3, [r3, #52] ; 0x34 - 8005e7e: 2201 movs r2, #1 - 8005e80: 4013 ands r3, r2 - 8005e82: 613b str r3, [r7, #16] - 8005e84: 693b ldr r3, [r7, #16] + 8005f42: 4b3d ldr r3, [pc, #244] ; (8006038 ) + 8005f44: 6b5a ldr r2, [r3, #52] ; 0x34 + 8005f46: 4b3c ldr r3, [pc, #240] ; (8006038 ) + 8005f48: 2101 movs r1, #1 + 8005f4a: 430a orrs r2, r1 + 8005f4c: 635a str r2, [r3, #52] ; 0x34 + 8005f4e: 4b3a ldr r3, [pc, #232] ; (8006038 ) + 8005f50: 6b5b ldr r3, [r3, #52] ; 0x34 + 8005f52: 2201 movs r2, #1 + 8005f54: 4013 ands r3, r2 + 8005f56: 613b str r3, [r7, #16] + 8005f58: 693b ldr r3, [r7, #16] /**TIM1 GPIO Configuration PA9 ------> TIM1_CH2 */ GPIO_InitStruct.Pin = TIM1_GC_Pin; - 8005e86: 193b adds r3, r7, r4 - 8005e88: 2280 movs r2, #128 ; 0x80 - 8005e8a: 0092 lsls r2, r2, #2 - 8005e8c: 601a str r2, [r3, #0] + 8005f5a: 193b adds r3, r7, r4 + 8005f5c: 2280 movs r2, #128 ; 0x80 + 8005f5e: 0092 lsls r2, r2, #2 + 8005f60: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8005e8e: 0021 movs r1, r4 - 8005e90: 187b adds r3, r7, r1 - 8005e92: 2202 movs r2, #2 - 8005e94: 605a str r2, [r3, #4] + 8005f62: 0021 movs r1, r4 + 8005f64: 187b adds r3, r7, r1 + 8005f66: 2202 movs r2, #2 + 8005f68: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8005e96: 187b adds r3, r7, r1 - 8005e98: 2200 movs r2, #0 - 8005e9a: 609a str r2, [r3, #8] + 8005f6a: 187b adds r3, r7, r1 + 8005f6c: 2200 movs r2, #0 + 8005f6e: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8005e9c: 187b adds r3, r7, r1 - 8005e9e: 2200 movs r2, #0 - 8005ea0: 60da str r2, [r3, #12] + 8005f70: 187b adds r3, r7, r1 + 8005f72: 2200 movs r2, #0 + 8005f74: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF2_TIM1; - 8005ea2: 187b adds r3, r7, r1 - 8005ea4: 2202 movs r2, #2 - 8005ea6: 611a str r2, [r3, #16] + 8005f76: 187b adds r3, r7, r1 + 8005f78: 2202 movs r2, #2 + 8005f7a: 611a str r2, [r3, #16] HAL_GPIO_Init(TIM1_GC_GPIO_Port, &GPIO_InitStruct); - 8005ea8: 187a adds r2, r7, r1 - 8005eaa: 23a0 movs r3, #160 ; 0xa0 - 8005eac: 05db lsls r3, r3, #23 - 8005eae: 0011 movs r1, r2 - 8005eb0: 0018 movs r0, r3 - 8005eb2: f001 fa13 bl 80072dc + 8005f7c: 187a adds r2, r7, r1 + 8005f7e: 23a0 movs r3, #160 ; 0xa0 + 8005f80: 05db lsls r3, r3, #23 + 8005f82: 0011 movs r1, r2 + 8005f84: 0018 movs r0, r3 + 8005f86: f001 faed bl 8007564 /* USER CODE BEGIN TIM15_MspPostInit 1 */ /* USER CODE END TIM15_MspPostInit 1 */ } } - 8005eb6: e026 b.n 8005f06 - else if(timHandle->Instance==TIM15) - 8005eb8: 687b ldr r3, [r7, #4] - 8005eba: 681b ldr r3, [r3, #0] - 8005ebc: 4a16 ldr r2, [pc, #88] ; (8005f18 ) - 8005ebe: 4293 cmp r3, r2 - 8005ec0: d121 bne.n 8005f06 + 8005f8a: e04f b.n 800602c + else if(timHandle->Instance==TIM14) + 8005f8c: 687b ldr r3, [r7, #4] + 8005f8e: 681b ldr r3, [r3, #0] + 8005f90: 4a2a ldr r2, [pc, #168] ; (800603c ) + 8005f92: 4293 cmp r3, r2 + 8005f94: d123 bne.n 8005fde __HAL_RCC_GPIOC_CLK_ENABLE(); - 8005ec2: 4b14 ldr r3, [pc, #80] ; (8005f14 ) - 8005ec4: 6b5a ldr r2, [r3, #52] ; 0x34 - 8005ec6: 4b13 ldr r3, [pc, #76] ; (8005f14 ) - 8005ec8: 2104 movs r1, #4 - 8005eca: 430a orrs r2, r1 - 8005ecc: 635a str r2, [r3, #52] ; 0x34 - 8005ece: 4b11 ldr r3, [pc, #68] ; (8005f14 ) - 8005ed0: 6b5b ldr r3, [r3, #52] ; 0x34 - 8005ed2: 2204 movs r2, #4 - 8005ed4: 4013 ands r3, r2 - 8005ed6: 60fb str r3, [r7, #12] - 8005ed8: 68fb ldr r3, [r7, #12] - GPIO_InitStruct.Pin = LCD_LED_Pin; - 8005eda: 2114 movs r1, #20 - 8005edc: 187b adds r3, r7, r1 - 8005ede: 2202 movs r2, #2 - 8005ee0: 601a str r2, [r3, #0] + 8005f96: 4b28 ldr r3, [pc, #160] ; (8006038 ) + 8005f98: 6b5a ldr r2, [r3, #52] ; 0x34 + 8005f9a: 4b27 ldr r3, [pc, #156] ; (8006038 ) + 8005f9c: 2104 movs r1, #4 + 8005f9e: 430a orrs r2, r1 + 8005fa0: 635a str r2, [r3, #52] ; 0x34 + 8005fa2: 4b25 ldr r3, [pc, #148] ; (8006038 ) + 8005fa4: 6b5b ldr r3, [r3, #52] ; 0x34 + 8005fa6: 2204 movs r2, #4 + 8005fa8: 4013 ands r3, r2 + 8005faa: 60fb str r3, [r7, #12] + 8005fac: 68fb ldr r3, [r7, #12] + GPIO_InitStruct.Pin = FAN_PWM_Pin; + 8005fae: 2114 movs r1, #20 + 8005fb0: 187b adds r3, r7, r1 + 8005fb2: 2280 movs r2, #128 ; 0x80 + 8005fb4: 0152 lsls r2, r2, #5 + 8005fb6: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8005ee2: 187b adds r3, r7, r1 - 8005ee4: 2202 movs r2, #2 - 8005ee6: 605a str r2, [r3, #4] + 8005fb8: 187b adds r3, r7, r1 + 8005fba: 2202 movs r2, #2 + 8005fbc: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8005ee8: 187b adds r3, r7, r1 - 8005eea: 2200 movs r2, #0 - 8005eec: 609a str r2, [r3, #8] + 8005fbe: 187b adds r3, r7, r1 + 8005fc0: 2200 movs r2, #0 + 8005fc2: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8005eee: 187b adds r3, r7, r1 - 8005ef0: 2200 movs r2, #0 - 8005ef2: 60da str r2, [r3, #12] - GPIO_InitStruct.Alternate = GPIO_AF2_TIM15; - 8005ef4: 187b adds r3, r7, r1 - 8005ef6: 2202 movs r2, #2 - 8005ef8: 611a str r2, [r3, #16] - HAL_GPIO_Init(LCD_LED_GPIO_Port, &GPIO_InitStruct); - 8005efa: 187b adds r3, r7, r1 - 8005efc: 4a07 ldr r2, [pc, #28] ; (8005f1c ) - 8005efe: 0019 movs r1, r3 - 8005f00: 0010 movs r0, r2 - 8005f02: f001 f9eb bl 80072dc + 8005fc4: 187b adds r3, r7, r1 + 8005fc6: 2200 movs r2, #0 + 8005fc8: 60da str r2, [r3, #12] + GPIO_InitStruct.Alternate = GPIO_AF2_TIM14; + 8005fca: 187b adds r3, r7, r1 + 8005fcc: 2202 movs r2, #2 + 8005fce: 611a str r2, [r3, #16] + HAL_GPIO_Init(FAN_PWM_GPIO_Port, &GPIO_InitStruct); + 8005fd0: 187b adds r3, r7, r1 + 8005fd2: 4a1b ldr r2, [pc, #108] ; (8006040 ) + 8005fd4: 0019 movs r1, r3 + 8005fd6: 0010 movs r0, r2 + 8005fd8: f001 fac4 bl 8007564 } - 8005f06: 46c0 nop ; (mov r8, r8) - 8005f08: 46bd mov sp, r7 - 8005f0a: b00b add sp, #44 ; 0x2c - 8005f0c: bd90 pop {r4, r7, pc} - 8005f0e: 46c0 nop ; (mov r8, r8) - 8005f10: 40012c00 .word 0x40012c00 - 8005f14: 40021000 .word 0x40021000 - 8005f18: 40014000 .word 0x40014000 - 8005f1c: 50000800 .word 0x50000800 + 8005fdc: e026 b.n 800602c + else if(timHandle->Instance==TIM15) + 8005fde: 687b ldr r3, [r7, #4] + 8005fe0: 681b ldr r3, [r3, #0] + 8005fe2: 4a18 ldr r2, [pc, #96] ; (8006044 ) + 8005fe4: 4293 cmp r3, r2 + 8005fe6: d121 bne.n 800602c + __HAL_RCC_GPIOC_CLK_ENABLE(); + 8005fe8: 4b13 ldr r3, [pc, #76] ; (8006038 ) + 8005fea: 6b5a ldr r2, [r3, #52] ; 0x34 + 8005fec: 4b12 ldr r3, [pc, #72] ; (8006038 ) + 8005fee: 2104 movs r1, #4 + 8005ff0: 430a orrs r2, r1 + 8005ff2: 635a str r2, [r3, #52] ; 0x34 + 8005ff4: 4b10 ldr r3, [pc, #64] ; (8006038 ) + 8005ff6: 6b5b ldr r3, [r3, #52] ; 0x34 + 8005ff8: 2204 movs r2, #4 + 8005ffa: 4013 ands r3, r2 + 8005ffc: 60bb str r3, [r7, #8] + 8005ffe: 68bb ldr r3, [r7, #8] + GPIO_InitStruct.Pin = LCD_LED_Pin; + 8006000: 2114 movs r1, #20 + 8006002: 187b adds r3, r7, r1 + 8006004: 2202 movs r2, #2 + 8006006: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 8006008: 187b adds r3, r7, r1 + 800600a: 2202 movs r2, #2 + 800600c: 605a str r2, [r3, #4] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 800600e: 187b adds r3, r7, r1 + 8006010: 2200 movs r2, #0 + 8006012: 609a str r2, [r3, #8] + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 8006014: 187b adds r3, r7, r1 + 8006016: 2200 movs r2, #0 + 8006018: 60da str r2, [r3, #12] + GPIO_InitStruct.Alternate = GPIO_AF2_TIM15; + 800601a: 187b adds r3, r7, r1 + 800601c: 2202 movs r2, #2 + 800601e: 611a str r2, [r3, #16] + HAL_GPIO_Init(LCD_LED_GPIO_Port, &GPIO_InitStruct); + 8006020: 187b adds r3, r7, r1 + 8006022: 4a07 ldr r2, [pc, #28] ; (8006040 ) + 8006024: 0019 movs r1, r3 + 8006026: 0010 movs r0, r2 + 8006028: f001 fa9c bl 8007564 +} + 800602c: 46c0 nop ; (mov r8, r8) + 800602e: 46bd mov sp, r7 + 8006030: b00b add sp, #44 ; 0x2c + 8006032: bd90 pop {r4, r7, pc} + 8006034: 40012c00 .word 0x40012c00 + 8006038: 40021000 .word 0x40021000 + 800603c: 40002000 .word 0x40002000 + 8006040: 50000800 .word 0x50000800 + 8006044: 40014000 .word 0x40014000 -08005f20 : +08006048 : +UART_HandleTypeDef huart1; + +/* USART1 init function */ + +void MX_USART1_UART_Init(void) +{ + 8006048: b580 push {r7, lr} + 800604a: af00 add r7, sp, #0 + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + 800604c: 4b23 ldr r3, [pc, #140] ; (80060dc ) + 800604e: 4a24 ldr r2, [pc, #144] ; (80060e0 ) + 8006050: 601a str r2, [r3, #0] + huart1.Init.BaudRate = 115200; + 8006052: 4b22 ldr r3, [pc, #136] ; (80060dc ) + 8006054: 22e1 movs r2, #225 ; 0xe1 + 8006056: 0252 lsls r2, r2, #9 + 8006058: 605a str r2, [r3, #4] + huart1.Init.WordLength = UART_WORDLENGTH_8B; + 800605a: 4b20 ldr r3, [pc, #128] ; (80060dc ) + 800605c: 2200 movs r2, #0 + 800605e: 609a str r2, [r3, #8] + huart1.Init.StopBits = UART_STOPBITS_1; + 8006060: 4b1e ldr r3, [pc, #120] ; (80060dc ) + 8006062: 2200 movs r2, #0 + 8006064: 60da str r2, [r3, #12] + huart1.Init.Parity = UART_PARITY_NONE; + 8006066: 4b1d ldr r3, [pc, #116] ; (80060dc ) + 8006068: 2200 movs r2, #0 + 800606a: 611a str r2, [r3, #16] + huart1.Init.Mode = UART_MODE_TX_RX; + 800606c: 4b1b ldr r3, [pc, #108] ; (80060dc ) + 800606e: 220c movs r2, #12 + 8006070: 615a str r2, [r3, #20] + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 8006072: 4b1a ldr r3, [pc, #104] ; (80060dc ) + 8006074: 2200 movs r2, #0 + 8006076: 619a str r2, [r3, #24] + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + 8006078: 4b18 ldr r3, [pc, #96] ; (80060dc ) + 800607a: 2200 movs r2, #0 + 800607c: 61da str r2, [r3, #28] + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 800607e: 4b17 ldr r3, [pc, #92] ; (80060dc ) + 8006080: 2200 movs r2, #0 + 8006082: 621a str r2, [r3, #32] + huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + 8006084: 4b15 ldr r3, [pc, #84] ; (80060dc ) + 8006086: 2200 movs r2, #0 + 8006088: 625a str r2, [r3, #36] ; 0x24 + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 800608a: 4b14 ldr r3, [pc, #80] ; (80060dc ) + 800608c: 2200 movs r2, #0 + 800608e: 629a str r2, [r3, #40] ; 0x28 + if (HAL_UART_Init(&huart1) != HAL_OK) + 8006090: 4b12 ldr r3, [pc, #72] ; (80060dc ) + 8006092: 0018 movs r0, r3 + 8006094: f004 fe32 bl 800acfc + 8006098: 1e03 subs r3, r0, #0 + 800609a: d001 beq.n 80060a0 + { + Error_Handler(); + 800609c: f7fd fb70 bl 8003780 + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + 80060a0: 4b0e ldr r3, [pc, #56] ; (80060dc ) + 80060a2: 2100 movs r1, #0 + 80060a4: 0018 movs r0, r3 + 80060a6: f005 fa27 bl 800b4f8 + 80060aa: 1e03 subs r3, r0, #0 + 80060ac: d001 beq.n 80060b2 + { + Error_Handler(); + 80060ae: f7fd fb67 bl 8003780 + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + 80060b2: 4b0a ldr r3, [pc, #40] ; (80060dc ) + 80060b4: 2100 movs r1, #0 + 80060b6: 0018 movs r0, r3 + 80060b8: f005 fa5e bl 800b578 + 80060bc: 1e03 subs r3, r0, #0 + 80060be: d001 beq.n 80060c4 + { + Error_Handler(); + 80060c0: f7fd fb5e bl 8003780 + } + if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) + 80060c4: 4b05 ldr r3, [pc, #20] ; (80060dc ) + 80060c6: 0018 movs r0, r3 + 80060c8: f005 f9dc bl 800b484 + 80060cc: 1e03 subs r3, r0, #0 + 80060ce: d001 beq.n 80060d4 + { + Error_Handler(); + 80060d0: f7fd fb56 bl 8003780 + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ + +} + 80060d4: 46c0 nop ; (mov r8, r8) + 80060d6: 46bd mov sp, r7 + 80060d8: bd80 pop {r7, pc} + 80060da: 46c0 nop ; (mov r8, r8) + 80060dc: 20000390 .word 0x20000390 + 80060e0: 40013800 .word 0x40013800 + +080060e4 : + +void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) +{ + 80060e4: b590 push {r4, r7, lr} + 80060e6: b091 sub sp, #68 ; 0x44 + 80060e8: af00 add r7, sp, #0 + 80060ea: 6078 str r0, [r7, #4] + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 80060ec: 232c movs r3, #44 ; 0x2c + 80060ee: 18fb adds r3, r7, r3 + 80060f0: 0018 movs r0, r3 + 80060f2: 2314 movs r3, #20 + 80060f4: 001a movs r2, r3 + 80060f6: 2100 movs r1, #0 + 80060f8: f008 fd89 bl 800ec0e + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + 80060fc: 2410 movs r4, #16 + 80060fe: 193b adds r3, r7, r4 + 8006100: 0018 movs r0, r3 + 8006102: 231c movs r3, #28 + 8006104: 001a movs r2, r3 + 8006106: 2100 movs r1, #0 + 8006108: f008 fd81 bl 800ec0e + if(uartHandle->Instance==USART1) + 800610c: 687b ldr r3, [r7, #4] + 800610e: 681b ldr r3, [r3, #0] + 8006110: 4a22 ldr r2, [pc, #136] ; (800619c ) + 8006112: 4293 cmp r3, r2 + 8006114: d13d bne.n 8006192 + + /* USER CODE END USART1_MspInit 0 */ + + /** Initializes the peripherals clocks + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; + 8006116: 193b adds r3, r7, r4 + 8006118: 2201 movs r2, #1 + 800611a: 601a str r2, [r3, #0] + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; + 800611c: 193b adds r3, r7, r4 + 800611e: 2200 movs r2, #0 + 8006120: 605a str r2, [r3, #4] + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + 8006122: 193b adds r3, r7, r4 + 8006124: 0018 movs r0, r3 + 8006126: f002 f8cd bl 80082c4 + 800612a: 1e03 subs r3, r0, #0 + 800612c: d001 beq.n 8006132 + { + Error_Handler(); + 800612e: f7fd fb27 bl 8003780 + } + + /* USART1 clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + 8006132: 4b1b ldr r3, [pc, #108] ; (80061a0 ) + 8006134: 6c1a ldr r2, [r3, #64] ; 0x40 + 8006136: 4b1a ldr r3, [pc, #104] ; (80061a0 ) + 8006138: 2180 movs r1, #128 ; 0x80 + 800613a: 01c9 lsls r1, r1, #7 + 800613c: 430a orrs r2, r1 + 800613e: 641a str r2, [r3, #64] ; 0x40 + 8006140: 4b17 ldr r3, [pc, #92] ; (80061a0 ) + 8006142: 6c1a ldr r2, [r3, #64] ; 0x40 + 8006144: 2380 movs r3, #128 ; 0x80 + 8006146: 01db lsls r3, r3, #7 + 8006148: 4013 ands r3, r2 + 800614a: 60fb str r3, [r7, #12] + 800614c: 68fb ldr r3, [r7, #12] + + __HAL_RCC_GPIOB_CLK_ENABLE(); + 800614e: 4b14 ldr r3, [pc, #80] ; (80061a0 ) + 8006150: 6b5a ldr r2, [r3, #52] ; 0x34 + 8006152: 4b13 ldr r3, [pc, #76] ; (80061a0 ) + 8006154: 2102 movs r1, #2 + 8006156: 430a orrs r2, r1 + 8006158: 635a str r2, [r3, #52] ; 0x34 + 800615a: 4b11 ldr r3, [pc, #68] ; (80061a0 ) + 800615c: 6b5b ldr r3, [r3, #52] ; 0x34 + 800615e: 2202 movs r2, #2 + 8006160: 4013 ands r3, r2 + 8006162: 60bb str r3, [r7, #8] + 8006164: 68bb ldr r3, [r7, #8] + /**USART1 GPIO Configuration + PB6 ------> USART1_TX + PB7 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; + 8006166: 212c movs r1, #44 ; 0x2c + 8006168: 187b adds r3, r7, r1 + 800616a: 22c0 movs r2, #192 ; 0xc0 + 800616c: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 800616e: 187b adds r3, r7, r1 + 8006170: 2202 movs r2, #2 + 8006172: 605a str r2, [r3, #4] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8006174: 187b adds r3, r7, r1 + 8006176: 2200 movs r2, #0 + 8006178: 609a str r2, [r3, #8] + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 800617a: 187b adds r3, r7, r1 + 800617c: 2200 movs r2, #0 + 800617e: 60da str r2, [r3, #12] + GPIO_InitStruct.Alternate = GPIO_AF0_USART1; + 8006180: 187b adds r3, r7, r1 + 8006182: 2200 movs r2, #0 + 8006184: 611a str r2, [r3, #16] + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 8006186: 187b adds r3, r7, r1 + 8006188: 4a06 ldr r2, [pc, #24] ; (80061a4 ) + 800618a: 0019 movs r1, r3 + 800618c: 0010 movs r0, r2 + 800618e: f001 f9e9 bl 8007564 + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } +} + 8006192: 46c0 nop ; (mov r8, r8) + 8006194: 46bd mov sp, r7 + 8006196: b011 add sp, #68 ; 0x44 + 8006198: bd90 pop {r4, r7, pc} + 800619a: 46c0 nop ; (mov r8, r8) + 800619c: 40013800 .word 0x40013800 + 80061a0: 40021000 .word 0x40021000 + 80061a4: 50000400 .word 0x50000400 + +080061a8 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack - 8005f20: 480d ldr r0, [pc, #52] ; (8005f58 ) + 80061a8: 480d ldr r0, [pc, #52] ; (80061e0 ) mov sp, r0 /* set stack pointer */ - 8005f22: 4685 mov sp, r0 + 80061aa: 4685 mov sp, r0 /* Call the clock system initialization function.*/ bl SystemInit - 8005f24: f7ff fcf8 bl 8005918 + 80061ac: f7ff fbb8 bl 8005920 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8005f28: 480c ldr r0, [pc, #48] ; (8005f5c ) + 80061b0: 480c ldr r0, [pc, #48] ; (80061e4 ) ldr r1, =_edata - 8005f2a: 490d ldr r1, [pc, #52] ; (8005f60 ) + 80061b2: 490d ldr r1, [pc, #52] ; (80061e8 ) ldr r2, =_sidata - 8005f2c: 4a0d ldr r2, [pc, #52] ; (8005f64 ) + 80061b4: 4a0d ldr r2, [pc, #52] ; (80061ec ) movs r3, #0 - 8005f2e: 2300 movs r3, #0 + 80061b6: 2300 movs r3, #0 b LoopCopyDataInit - 8005f30: e002 b.n 8005f38 + 80061b8: e002 b.n 80061c0 -08005f32 : +080061ba : CopyDataInit: ldr r4, [r2, r3] - 8005f32: 58d4 ldr r4, [r2, r3] + 80061ba: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8005f34: 50c4 str r4, [r0, r3] + 80061bc: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8005f36: 3304 adds r3, #4 + 80061be: 3304 adds r3, #4 -08005f38 : +080061c0 : LoopCopyDataInit: adds r4, r0, r3 - 8005f38: 18c4 adds r4, r0, r3 + 80061c0: 18c4 adds r4, r0, r3 cmp r4, r1 - 8005f3a: 428c cmp r4, r1 + 80061c2: 428c cmp r4, r1 bcc CopyDataInit - 8005f3c: d3f9 bcc.n 8005f32 + 80061c4: d3f9 bcc.n 80061ba /* Zero fill the bss segment. */ ldr r2, =_sbss - 8005f3e: 4a0a ldr r2, [pc, #40] ; (8005f68 ) + 80061c6: 4a0a ldr r2, [pc, #40] ; (80061f0 ) ldr r4, =_ebss - 8005f40: 4c0a ldr r4, [pc, #40] ; (8005f6c ) + 80061c8: 4c0a ldr r4, [pc, #40] ; (80061f4 ) movs r3, #0 - 8005f42: 2300 movs r3, #0 + 80061ca: 2300 movs r3, #0 b LoopFillZerobss - 8005f44: e001 b.n 8005f4a + 80061cc: e001 b.n 80061d2 -08005f46 : +080061ce : FillZerobss: str r3, [r2] - 8005f46: 6013 str r3, [r2, #0] + 80061ce: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8005f48: 3204 adds r2, #4 + 80061d0: 3204 adds r2, #4 -08005f4a : +080061d2 : LoopFillZerobss: cmp r2, r4 - 8005f4a: 42a2 cmp r2, r4 + 80061d2: 42a2 cmp r2, r4 bcc FillZerobss - 8005f4c: d3fb bcc.n 8005f46 + 80061d4: d3fb bcc.n 80061ce /* Call static constructors */ bl __libc_init_array - 8005f4e: f008 f80f bl 800df70 <__libc_init_array> + 80061d6: f008 fceb bl 800ebb0 <__libc_init_array> /* Call the application s entry point.*/ bl main - 8005f52: f7fd fb4d bl 80035f0
+ 80061da: f7fd fa09 bl 80035f0
-08005f56 : +080061de : LoopForever: b LoopForever - 8005f56: e7fe b.n 8005f56 + 80061de: e7fe b.n 80061de ldr r0, =_estack - 8005f58: 20009000 .word 0x20009000 + 80061e0: 20009000 .word 0x20009000 ldr r0, =_sdata - 8005f5c: 20000000 .word 0x20000000 + 80061e4: 20000000 .word 0x20000000 ldr r1, =_edata - 8005f60: 200000b4 .word 0x200000b4 + 80061e8: 200000b4 .word 0x200000b4 ldr r2, =_sidata - 8005f64: 080103b8 .word 0x080103b8 + 80061ec: 08011020 .word 0x08011020 ldr r2, =_sbss - 8005f68: 200000b4 .word 0x200000b4 + 80061f0: 200000b4 .word 0x200000b4 ldr r4, =_ebss - 8005f6c: 20002960 .word 0x20002960 + 80061f4: 20002a40 .word 0x20002a40 -08005f70 : +080061f8 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8005f70: e7fe b.n 8005f70 + 80061f8: e7fe b.n 80061f8 ... -08005f74 : +080061fc : * each 1ms in the SysTick_Handler() interrupt handler. * * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8005f74: b580 push {r7, lr} - 8005f76: b082 sub sp, #8 - 8005f78: af00 add r7, sp, #0 + 80061fc: b580 push {r7, lr} + 80061fe: b082 sub sp, #8 + 8006200: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; - 8005f7a: 1dfb adds r3, r7, #7 - 8005f7c: 2200 movs r2, #0 - 8005f7e: 701a strb r2, [r3, #0] + 8006202: 1dfb adds r3, r7, #7 + 8006204: 2200 movs r2, #0 + 8006206: 701a strb r2, [r3, #0] #if (INSTRUCTION_CACHE_ENABLE == 0U) __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); #endif /* INSTRUCTION_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8005f80: 4b0b ldr r3, [pc, #44] ; (8005fb0 ) - 8005f82: 681a ldr r2, [r3, #0] - 8005f84: 4b0a ldr r3, [pc, #40] ; (8005fb0 ) - 8005f86: 2180 movs r1, #128 ; 0x80 - 8005f88: 0049 lsls r1, r1, #1 - 8005f8a: 430a orrs r2, r1 - 8005f8c: 601a str r2, [r3, #0] + 8006208: 4b0b ldr r3, [pc, #44] ; (8006238 ) + 800620a: 681a ldr r2, [r3, #0] + 800620c: 4b0a ldr r3, [pc, #40] ; (8006238 ) + 800620e: 2180 movs r1, #128 ; 0x80 + 8006210: 0049 lsls r1, r1, #1 + 8006212: 430a orrs r2, r1 + 8006214: 601a str r2, [r3, #0] #endif /* PREFETCH_ENABLE */ /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is HSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 8005f8e: 2003 movs r0, #3 - 8005f90: f7ff fbea bl 8005768 - 8005f94: 1e03 subs r3, r0, #0 - 8005f96: d003 beq.n 8005fa0 + 8006216: 2003 movs r0, #3 + 8006218: f7ff faaa bl 8005770 + 800621c: 1e03 subs r3, r0, #0 + 800621e: d003 beq.n 8006228 { status = HAL_ERROR; - 8005f98: 1dfb adds r3, r7, #7 - 8005f9a: 2201 movs r2, #1 - 8005f9c: 701a strb r2, [r3, #0] - 8005f9e: e001 b.n 8005fa4 + 8006220: 1dfb adds r3, r7, #7 + 8006222: 2201 movs r2, #1 + 8006224: 701a strb r2, [r3, #0] + 8006226: e001 b.n 800622c } else { /* Init the low level hardware */ HAL_MspInit(); - 8005fa0: f7ff fbb2 bl 8005708 + 8006228: f7ff fa72 bl 8005710 } /* Return function status */ return status; - 8005fa4: 1dfb adds r3, r7, #7 - 8005fa6: 781b ldrb r3, [r3, #0] + 800622c: 1dfb adds r3, r7, #7 + 800622e: 781b ldrb r3, [r3, #0] } - 8005fa8: 0018 movs r0, r3 - 8005faa: 46bd mov sp, r7 - 8005fac: b002 add sp, #8 - 8005fae: bd80 pop {r7, pc} - 8005fb0: 40022000 .word 0x40022000 + 8006230: 0018 movs r0, r3 + 8006232: 46bd mov sp, r7 + 8006234: b002 add sp, #8 + 8006236: bd80 pop {r7, pc} + 8006238: 40022000 .word 0x40022000 -08005fb4 : +0800623c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8005fb4: b580 push {r7, lr} - 8005fb6: af00 add r7, sp, #0 + 800623c: b580 push {r7, lr} + 800623e: af00 add r7, sp, #0 uwTick += (uint32_t)uwTickFreq; - 8005fb8: 4b05 ldr r3, [pc, #20] ; (8005fd0 ) - 8005fba: 781b ldrb r3, [r3, #0] - 8005fbc: 001a movs r2, r3 - 8005fbe: 4b05 ldr r3, [pc, #20] ; (8005fd4 ) - 8005fc0: 681b ldr r3, [r3, #0] - 8005fc2: 18d2 adds r2, r2, r3 - 8005fc4: 4b03 ldr r3, [pc, #12] ; (8005fd4 ) - 8005fc6: 601a str r2, [r3, #0] + 8006240: 4b05 ldr r3, [pc, #20] ; (8006258 ) + 8006242: 781b ldrb r3, [r3, #0] + 8006244: 001a movs r2, r3 + 8006246: 4b05 ldr r3, [pc, #20] ; (800625c ) + 8006248: 681b ldr r3, [r3, #0] + 800624a: 18d2 adds r2, r2, r3 + 800624c: 4b03 ldr r3, [pc, #12] ; (800625c ) + 800624e: 601a str r2, [r3, #0] } - 8005fc8: 46c0 nop ; (mov r8, r8) - 8005fca: 46bd mov sp, r7 - 8005fcc: bd80 pop {r7, pc} - 8005fce: 46c0 nop ; (mov r8, r8) - 8005fd0: 20000048 .word 0x20000048 - 8005fd4: 20000344 .word 0x20000344 + 8006250: 46c0 nop ; (mov r8, r8) + 8006252: 46bd mov sp, r7 + 8006254: bd80 pop {r7, pc} + 8006256: 46c0 nop ; (mov r8, r8) + 8006258: 20000048 .word 0x20000048 + 800625c: 20000424 .word 0x20000424 -08005fd8 : +08006260 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8005fd8: b580 push {r7, lr} - 8005fda: af00 add r7, sp, #0 + 8006260: b580 push {r7, lr} + 8006262: af00 add r7, sp, #0 return uwTick; - 8005fdc: 4b02 ldr r3, [pc, #8] ; (8005fe8 ) - 8005fde: 681b ldr r3, [r3, #0] + 8006264: 4b02 ldr r3, [pc, #8] ; (8006270 ) + 8006266: 681b ldr r3, [r3, #0] } - 8005fe0: 0018 movs r0, r3 - 8005fe2: 46bd mov sp, r7 - 8005fe4: bd80 pop {r7, pc} - 8005fe6: 46c0 nop ; (mov r8, r8) - 8005fe8: 20000344 .word 0x20000344 + 8006268: 0018 movs r0, r3 + 800626a: 46bd mov sp, r7 + 800626c: bd80 pop {r7, pc} + 800626e: 46c0 nop ; (mov r8, r8) + 8006270: 20000424 .word 0x20000424 -08005fec : +08006274 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 8005fec: b580 push {r7, lr} - 8005fee: b084 sub sp, #16 - 8005ff0: af00 add r7, sp, #0 - 8005ff2: 6078 str r0, [r7, #4] + 8006274: b580 push {r7, lr} + 8006276: b084 sub sp, #16 + 8006278: af00 add r7, sp, #0 + 800627a: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 8005ff4: f7ff fff0 bl 8005fd8 - 8005ff8: 0003 movs r3, r0 - 8005ffa: 60bb str r3, [r7, #8] + 800627c: f7ff fff0 bl 8006260 + 8006280: 0003 movs r3, r0 + 8006282: 60bb str r3, [r7, #8] uint32_t wait = Delay; - 8005ffc: 687b ldr r3, [r7, #4] - 8005ffe: 60fb str r3, [r7, #12] + 8006284: 687b ldr r3, [r7, #4] + 8006286: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 8006000: 68fb ldr r3, [r7, #12] - 8006002: 3301 adds r3, #1 - 8006004: d005 beq.n 8006012 + 8006288: 68fb ldr r3, [r7, #12] + 800628a: 3301 adds r3, #1 + 800628c: d005 beq.n 800629a { wait += (uint32_t)(uwTickFreq); - 8006006: 4b0a ldr r3, [pc, #40] ; (8006030 ) - 8006008: 781b ldrb r3, [r3, #0] - 800600a: 001a movs r2, r3 - 800600c: 68fb ldr r3, [r7, #12] - 800600e: 189b adds r3, r3, r2 - 8006010: 60fb str r3, [r7, #12] + 800628e: 4b0a ldr r3, [pc, #40] ; (80062b8 ) + 8006290: 781b ldrb r3, [r3, #0] + 8006292: 001a movs r2, r3 + 8006294: 68fb ldr r3, [r7, #12] + 8006296: 189b adds r3, r3, r2 + 8006298: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) - 8006012: 46c0 nop ; (mov r8, r8) - 8006014: f7ff ffe0 bl 8005fd8 - 8006018: 0002 movs r2, r0 - 800601a: 68bb ldr r3, [r7, #8] - 800601c: 1ad3 subs r3, r2, r3 - 800601e: 68fa ldr r2, [r7, #12] - 8006020: 429a cmp r2, r3 - 8006022: d8f7 bhi.n 8006014 + 800629a: 46c0 nop ; (mov r8, r8) + 800629c: f7ff ffe0 bl 8006260 + 80062a0: 0002 movs r2, r0 + 80062a2: 68bb ldr r3, [r7, #8] + 80062a4: 1ad3 subs r3, r2, r3 + 80062a6: 68fa ldr r2, [r7, #12] + 80062a8: 429a cmp r2, r3 + 80062aa: d8f7 bhi.n 800629c { } } - 8006024: 46c0 nop ; (mov r8, r8) - 8006026: 46c0 nop ; (mov r8, r8) - 8006028: 46bd mov sp, r7 - 800602a: b004 add sp, #16 - 800602c: bd80 pop {r7, pc} - 800602e: 46c0 nop ; (mov r8, r8) - 8006030: 20000048 .word 0x20000048 + 80062ac: 46c0 nop ; (mov r8, r8) + 80062ae: 46c0 nop ; (mov r8, r8) + 80062b0: 46bd mov sp, r7 + 80062b2: b004 add sp, #16 + 80062b4: bd80 pop {r7, pc} + 80062b6: 46c0 nop ; (mov r8, r8) + 80062b8: 20000048 .word 0x20000048 -08006034 : +080062bc : * @arg @ref SYSCFG_UCPD1_STROBE * @arg @ref SYSCFG_UCPD2_STROBE * @retval None */ void HAL_SYSCFG_StrobeDBattpinsConfig(uint32_t ConfigDeadBattery) { - 8006034: b580 push {r7, lr} - 8006036: b082 sub sp, #8 - 8006038: af00 add r7, sp, #0 - 800603a: 6078 str r0, [r7, #4] + 80062bc: b580 push {r7, lr} + 80062be: b082 sub sp, #8 + 80062c0: af00 add r7, sp, #0 + 80062c2: 6078 str r0, [r7, #4] assert_param(IS_SYSCFG_DBATT_CONFIG(ConfigDeadBattery)); /* Change strobe configuration of GPIO depending on UCPDx dead battery settings */ MODIFY_REG(SYSCFG->CFGR1, (SYSCFG_CFGR1_UCPD1_STROBE | SYSCFG_CFGR1_UCPD2_STROBE), ConfigDeadBattery); - 800603c: 4b06 ldr r3, [pc, #24] ; (8006058 ) - 800603e: 681b ldr r3, [r3, #0] - 8006040: 4a06 ldr r2, [pc, #24] ; (800605c ) - 8006042: 4013 ands r3, r2 - 8006044: 0019 movs r1, r3 - 8006046: 4b04 ldr r3, [pc, #16] ; (8006058 ) - 8006048: 687a ldr r2, [r7, #4] - 800604a: 430a orrs r2, r1 - 800604c: 601a str r2, [r3, #0] + 80062c4: 4b06 ldr r3, [pc, #24] ; (80062e0 ) + 80062c6: 681b ldr r3, [r3, #0] + 80062c8: 4a06 ldr r2, [pc, #24] ; (80062e4 ) + 80062ca: 4013 ands r3, r2 + 80062cc: 0019 movs r1, r3 + 80062ce: 4b04 ldr r3, [pc, #16] ; (80062e0 ) + 80062d0: 687a ldr r2, [r7, #4] + 80062d2: 430a orrs r2, r1 + 80062d4: 601a str r2, [r3, #0] } - 800604e: 46c0 nop ; (mov r8, r8) - 8006050: 46bd mov sp, r7 - 8006052: b002 add sp, #8 - 8006054: bd80 pop {r7, pc} - 8006056: 46c0 nop ; (mov r8, r8) - 8006058: 40010000 .word 0x40010000 - 800605c: fffff9ff .word 0xfffff9ff + 80062d6: 46c0 nop ; (mov r8, r8) + 80062d8: 46bd mov sp, r7 + 80062da: b002 add sp, #8 + 80062dc: bd80 pop {r7, pc} + 80062de: 46c0 nop ; (mov r8, r8) + 80062e0: 40010000 .word 0x40010000 + 80062e4: fffff9ff .word 0xfffff9ff -08006060 : +080062e8 : * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR * @arg @ref LL_ADC_PATH_INTERNAL_VBAT * @retval None */ __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal) { - 8006060: b580 push {r7, lr} - 8006062: b082 sub sp, #8 - 8006064: af00 add r7, sp, #0 - 8006066: 6078 str r0, [r7, #4] - 8006068: 6039 str r1, [r7, #0] + 80062e8: b580 push {r7, lr} + 80062ea: b082 sub sp, #8 + 80062ec: af00 add r7, sp, #0 + 80062ee: 6078 str r0, [r7, #4] + 80062f0: 6039 str r1, [r7, #0] MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN, PathInternal); - 800606a: 687b ldr r3, [r7, #4] - 800606c: 681b ldr r3, [r3, #0] - 800606e: 4a05 ldr r2, [pc, #20] ; (8006084 ) - 8006070: 401a ands r2, r3 - 8006072: 683b ldr r3, [r7, #0] - 8006074: 431a orrs r2, r3 - 8006076: 687b ldr r3, [r7, #4] - 8006078: 601a str r2, [r3, #0] + 80062f2: 687b ldr r3, [r7, #4] + 80062f4: 681b ldr r3, [r3, #0] + 80062f6: 4a05 ldr r2, [pc, #20] ; (800630c ) + 80062f8: 401a ands r2, r3 + 80062fa: 683b ldr r3, [r7, #0] + 80062fc: 431a orrs r2, r3 + 80062fe: 687b ldr r3, [r7, #4] + 8006300: 601a str r2, [r3, #0] } - 800607a: 46c0 nop ; (mov r8, r8) - 800607c: 46bd mov sp, r7 - 800607e: b002 add sp, #8 - 8006080: bd80 pop {r7, pc} - 8006082: 46c0 nop ; (mov r8, r8) - 8006084: fe3fffff .word 0xfe3fffff + 8006302: 46c0 nop ; (mov r8, r8) + 8006304: 46bd mov sp, r7 + 8006306: b002 add sp, #8 + 8006308: bd80 pop {r7, pc} + 800630a: 46c0 nop ; (mov r8, r8) + 800630c: fe3fffff .word 0xfe3fffff -08006088 : +08006310 : * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR * @arg @ref LL_ADC_PATH_INTERNAL_VBAT */ __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON) { - 8006088: b580 push {r7, lr} - 800608a: b082 sub sp, #8 - 800608c: af00 add r7, sp, #0 - 800608e: 6078 str r0, [r7, #4] + 8006310: b580 push {r7, lr} + 8006312: b082 sub sp, #8 + 8006314: af00 add r7, sp, #0 + 8006316: 6078 str r0, [r7, #4] return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN)); - 8006090: 687b ldr r3, [r7, #4] - 8006092: 681a ldr r2, [r3, #0] - 8006094: 23e0 movs r3, #224 ; 0xe0 - 8006096: 045b lsls r3, r3, #17 - 8006098: 4013 ands r3, r2 + 8006318: 687b ldr r3, [r7, #4] + 800631a: 681a ldr r2, [r3, #0] + 800631c: 23e0 movs r3, #224 ; 0xe0 + 800631e: 045b lsls r3, r3, #17 + 8006320: 4013 ands r3, r2 } - 800609a: 0018 movs r0, r3 - 800609c: 46bd mov sp, r7 - 800609e: b002 add sp, #8 - 80060a0: bd80 pop {r7, pc} + 8006322: 0018 movs r0, r3 + 8006324: 46bd mov sp, r7 + 8006326: b002 add sp, #8 + 8006328: bd80 pop {r7, pc} -080060a2 : +0800632a : * @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5 * @retval None */ __STATIC_INLINE void LL_ADC_SetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTimeY, uint32_t SamplingTime) { - 80060a2: b580 push {r7, lr} - 80060a4: b084 sub sp, #16 - 80060a6: af00 add r7, sp, #0 - 80060a8: 60f8 str r0, [r7, #12] - 80060aa: 60b9 str r1, [r7, #8] - 80060ac: 607a str r2, [r7, #4] + 800632a: b580 push {r7, lr} + 800632c: b084 sub sp, #16 + 800632e: af00 add r7, sp, #0 + 8006330: 60f8 str r0, [r7, #12] + 8006332: 60b9 str r1, [r7, #8] + 8006334: 607a str r2, [r7, #4] MODIFY_REG(ADCx->SMPR, - 80060ae: 68fb ldr r3, [r7, #12] - 80060b0: 695b ldr r3, [r3, #20] - 80060b2: 68ba ldr r2, [r7, #8] - 80060b4: 2104 movs r1, #4 - 80060b6: 400a ands r2, r1 - 80060b8: 2107 movs r1, #7 - 80060ba: 4091 lsls r1, r2 - 80060bc: 000a movs r2, r1 - 80060be: 43d2 mvns r2, r2 - 80060c0: 401a ands r2, r3 - 80060c2: 68bb ldr r3, [r7, #8] - 80060c4: 2104 movs r1, #4 - 80060c6: 400b ands r3, r1 - 80060c8: 6879 ldr r1, [r7, #4] - 80060ca: 4099 lsls r1, r3 - 80060cc: 000b movs r3, r1 - 80060ce: 431a orrs r2, r3 - 80060d0: 68fb ldr r3, [r7, #12] - 80060d2: 615a str r2, [r3, #20] + 8006336: 68fb ldr r3, [r7, #12] + 8006338: 695b ldr r3, [r3, #20] + 800633a: 68ba ldr r2, [r7, #8] + 800633c: 2104 movs r1, #4 + 800633e: 400a ands r2, r1 + 8006340: 2107 movs r1, #7 + 8006342: 4091 lsls r1, r2 + 8006344: 000a movs r2, r1 + 8006346: 43d2 mvns r2, r2 + 8006348: 401a ands r2, r3 + 800634a: 68bb ldr r3, [r7, #8] + 800634c: 2104 movs r1, #4 + 800634e: 400b ands r3, r1 + 8006350: 6879 ldr r1, [r7, #4] + 8006352: 4099 lsls r1, r3 + 8006354: 000b movs r3, r1 + 8006356: 431a orrs r2, r3 + 8006358: 68fb ldr r3, [r7, #12] + 800635a: 615a str r2, [r3, #20] ADC_SMPR_SMP1 << (SamplingTimeY & ADC_SAMPLING_TIME_SMP_SHIFT_MASK), SamplingTime << (SamplingTimeY & ADC_SAMPLING_TIME_SMP_SHIFT_MASK)); } - 80060d4: 46c0 nop ; (mov r8, r8) - 80060d6: 46bd mov sp, r7 - 80060d8: b004 add sp, #16 - 80060da: bd80 pop {r7, pc} + 800635c: 46c0 nop ; (mov r8, r8) + 800635e: 46bd mov sp, r7 + 8006360: b004 add sp, #16 + 8006362: bd80 pop {r7, pc} -080060dc : +08006364 : * @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5 * @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5 * @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5 */ __STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTimeY) { - 80060dc: b580 push {r7, lr} - 80060de: b082 sub sp, #8 - 80060e0: af00 add r7, sp, #0 - 80060e2: 6078 str r0, [r7, #4] - 80060e4: 6039 str r1, [r7, #0] + 8006364: b580 push {r7, lr} + 8006366: b082 sub sp, #8 + 8006368: af00 add r7, sp, #0 + 800636a: 6078 str r0, [r7, #4] + 800636c: 6039 str r1, [r7, #0] return (uint32_t)((READ_BIT(ADCx->SMPR, ADC_SMPR_SMP1 << (SamplingTimeY & ADC_SAMPLING_TIME_SMP_SHIFT_MASK))) - 80060e6: 687b ldr r3, [r7, #4] - 80060e8: 695b ldr r3, [r3, #20] - 80060ea: 683a ldr r2, [r7, #0] - 80060ec: 2104 movs r1, #4 - 80060ee: 400a ands r2, r1 - 80060f0: 2107 movs r1, #7 - 80060f2: 4091 lsls r1, r2 - 80060f4: 000a movs r2, r1 - 80060f6: 401a ands r2, r3 + 800636e: 687b ldr r3, [r7, #4] + 8006370: 695b ldr r3, [r3, #20] + 8006372: 683a ldr r2, [r7, #0] + 8006374: 2104 movs r1, #4 + 8006376: 400a ands r2, r1 + 8006378: 2107 movs r1, #7 + 800637a: 4091 lsls r1, r2 + 800637c: 000a movs r2, r1 + 800637e: 401a ands r2, r3 >> (SamplingTimeY & ADC_SAMPLING_TIME_SMP_SHIFT_MASK)); - 80060f8: 683b ldr r3, [r7, #0] - 80060fa: 2104 movs r1, #4 - 80060fc: 400b ands r3, r1 + 8006380: 683b ldr r3, [r7, #0] + 8006382: 2104 movs r1, #4 + 8006384: 400b ands r3, r1 return (uint32_t)((READ_BIT(ADCx->SMPR, ADC_SMPR_SMP1 << (SamplingTimeY & ADC_SAMPLING_TIME_SMP_SHIFT_MASK))) - 80060fe: 40da lsrs r2, r3 - 8006100: 0013 movs r3, r2 + 8006386: 40da lsrs r2, r3 + 8006388: 0013 movs r3, r2 } - 8006102: 0018 movs r0, r3 - 8006104: 46bd mov sp, r7 - 8006106: b002 add sp, #8 - 8006108: bd80 pop {r7, pc} + 800638a: 0018 movs r0, r3 + 800638c: 46bd mov sp, r7 + 800638e: b002 add sp, #8 + 8006390: bd80 pop {r7, pc} -0800610a : +08006392 : * @param ADCx ADC instance * @retval Value "0" if trigger source external trigger * Value "1" if trigger source SW start. */ __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) { - 800610a: b580 push {r7, lr} - 800610c: b082 sub sp, #8 - 800610e: af00 add r7, sp, #0 - 8006110: 6078 str r0, [r7, #4] + 8006392: b580 push {r7, lr} + 8006394: b082 sub sp, #8 + 8006396: af00 add r7, sp, #0 + 8006398: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ? 1UL : 0UL); - 8006112: 687b ldr r3, [r7, #4] - 8006114: 68da ldr r2, [r3, #12] - 8006116: 23c0 movs r3, #192 ; 0xc0 - 8006118: 011b lsls r3, r3, #4 - 800611a: 4013 ands r3, r2 - 800611c: d101 bne.n 8006122 - 800611e: 2301 movs r3, #1 - 8006120: e000 b.n 8006124 - 8006122: 2300 movs r3, #0 + 800639a: 687b ldr r3, [r7, #4] + 800639c: 68da ldr r2, [r3, #12] + 800639e: 23c0 movs r3, #192 ; 0xc0 + 80063a0: 011b lsls r3, r3, #4 + 80063a2: 4013 ands r3, r2 + 80063a4: d101 bne.n 80063aa + 80063a6: 2301 movs r3, #1 + 80063a8: e000 b.n 80063ac + 80063aa: 2300 movs r3, #0 } - 8006124: 0018 movs r0, r3 - 8006126: 46bd mov sp, r7 - 8006128: b002 add sp, #8 - 800612a: bd80 pop {r7, pc} + 80063ac: 0018 movs r0, r3 + 80063ae: 46bd mov sp, r7 + 80063b0: b002 add sp, #8 + 80063b2: bd80 pop {r7, pc} -0800612c : +080063b4 : * only if sequencer is set in mode "not fully configurable", * refer to function @ref LL_ADC_REG_SetSequencerConfigurable(). * @retval None */ __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel) { - 800612c: b580 push {r7, lr} - 800612e: b084 sub sp, #16 - 8006130: af00 add r7, sp, #0 - 8006132: 60f8 str r0, [r7, #12] - 8006134: 60b9 str r1, [r7, #8] - 8006136: 607a str r2, [r7, #4] + 80063b4: b580 push {r7, lr} + 80063b6: b084 sub sp, #16 + 80063b8: af00 add r7, sp, #0 + 80063ba: 60f8 str r0, [r7, #12] + 80063bc: 60b9 str r1, [r7, #8] + 80063be: 607a str r2, [r7, #4] /* Set bits with content of parameter "Channel" with bits position */ /* in register depending on parameter "Rank". */ /* Parameters "Rank" and "Channel" are used with masks because containing */ /* other bits reserved for other purpose. */ MODIFY_REG(ADCx->CHSELR, - 8006138: 68fb ldr r3, [r7, #12] - 800613a: 6a9b ldr r3, [r3, #40] ; 0x28 - 800613c: 68ba ldr r2, [r7, #8] - 800613e: 211f movs r1, #31 - 8006140: 400a ands r2, r1 - 8006142: 210f movs r1, #15 - 8006144: 4091 lsls r1, r2 - 8006146: 000a movs r2, r1 - 8006148: 43d2 mvns r2, r2 - 800614a: 401a ands r2, r3 - 800614c: 687b ldr r3, [r7, #4] - 800614e: 0e9b lsrs r3, r3, #26 - 8006150: 210f movs r1, #15 - 8006152: 4019 ands r1, r3 - 8006154: 68bb ldr r3, [r7, #8] - 8006156: 201f movs r0, #31 - 8006158: 4003 ands r3, r0 - 800615a: 4099 lsls r1, r3 - 800615c: 000b movs r3, r1 - 800615e: 431a orrs r2, r3 - 8006160: 68fb ldr r3, [r7, #12] - 8006162: 629a str r2, [r3, #40] ; 0x28 + 80063c0: 68fb ldr r3, [r7, #12] + 80063c2: 6a9b ldr r3, [r3, #40] ; 0x28 + 80063c4: 68ba ldr r2, [r7, #8] + 80063c6: 211f movs r1, #31 + 80063c8: 400a ands r2, r1 + 80063ca: 210f movs r1, #15 + 80063cc: 4091 lsls r1, r2 + 80063ce: 000a movs r2, r1 + 80063d0: 43d2 mvns r2, r2 + 80063d2: 401a ands r2, r3 + 80063d4: 687b ldr r3, [r7, #4] + 80063d6: 0e9b lsrs r3, r3, #26 + 80063d8: 210f movs r1, #15 + 80063da: 4019 ands r1, r3 + 80063dc: 68bb ldr r3, [r7, #8] + 80063de: 201f movs r0, #31 + 80063e0: 4003 ands r3, r0 + 80063e2: 4099 lsls r1, r3 + 80063e4: 000b movs r3, r1 + 80063e6: 431a orrs r2, r3 + 80063e8: 68fb ldr r3, [r7, #12] + 80063ea: 629a str r2, [r3, #40] ; 0x28 ADC_CHSELR_SQ1 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), ((Channel & ADC_CHANNEL_ID_NUMBER_MASK_SEQ) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_REG_RANK_ID_SQRX_MASK)); } - 8006164: 46c0 nop ; (mov r8, r8) - 8006166: 46bd mov sp, r7 - 8006168: b004 add sp, #16 - 800616a: bd80 pop {r7, pc} + 80063ec: 46c0 nop ; (mov r8, r8) + 80063ee: 46bd mov sp, r7 + 80063f0: b004 add sp, #16 + 80063f2: bd80 pop {r7, pc} -0800616c : +080063f4 : * only if sequencer is set in mode "not fully configurable", * refer to function @ref LL_ADC_REG_SetSequencerConfigurable(). * @retval None */ __STATIC_INLINE void LL_ADC_REG_SetSequencerChAdd(ADC_TypeDef *ADCx, uint32_t Channel) { - 800616c: b580 push {r7, lr} - 800616e: b082 sub sp, #8 - 8006170: af00 add r7, sp, #0 - 8006172: 6078 str r0, [r7, #4] - 8006174: 6039 str r1, [r7, #0] + 80063f4: b580 push {r7, lr} + 80063f6: b082 sub sp, #8 + 80063f8: af00 add r7, sp, #0 + 80063fa: 6078 str r0, [r7, #4] + 80063fc: 6039 str r1, [r7, #0] /* Parameter "Channel" is used with masks because containing */ /* other bits reserved for other purpose. */ SET_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK)); - 8006176: 687b ldr r3, [r7, #4] - 8006178: 6a9a ldr r2, [r3, #40] ; 0x28 - 800617a: 683b ldr r3, [r7, #0] - 800617c: 035b lsls r3, r3, #13 - 800617e: 0b5b lsrs r3, r3, #13 - 8006180: 431a orrs r2, r3 - 8006182: 687b ldr r3, [r7, #4] - 8006184: 629a str r2, [r3, #40] ; 0x28 + 80063fe: 687b ldr r3, [r7, #4] + 8006400: 6a9a ldr r2, [r3, #40] ; 0x28 + 8006402: 683b ldr r3, [r7, #0] + 8006404: 035b lsls r3, r3, #13 + 8006406: 0b5b lsrs r3, r3, #13 + 8006408: 431a orrs r2, r3 + 800640a: 687b ldr r3, [r7, #4] + 800640c: 629a str r2, [r3, #40] ; 0x28 } - 8006186: 46c0 nop ; (mov r8, r8) - 8006188: 46bd mov sp, r7 - 800618a: b002 add sp, #8 - 800618c: bd80 pop {r7, pc} + 800640e: 46c0 nop ; (mov r8, r8) + 8006410: 46bd mov sp, r7 + 8006412: b002 add sp, #8 + 8006414: bd80 pop {r7, pc} -0800618e : +08006416 : * only if sequencer is set in mode "not fully configurable", * refer to function @ref LL_ADC_REG_SetSequencerConfigurable(). * @retval None */ __STATIC_INLINE void LL_ADC_REG_SetSequencerChRem(ADC_TypeDef *ADCx, uint32_t Channel) { - 800618e: b580 push {r7, lr} - 8006190: b082 sub sp, #8 - 8006192: af00 add r7, sp, #0 - 8006194: 6078 str r0, [r7, #4] - 8006196: 6039 str r1, [r7, #0] + 8006416: b580 push {r7, lr} + 8006418: b082 sub sp, #8 + 800641a: af00 add r7, sp, #0 + 800641c: 6078 str r0, [r7, #4] + 800641e: 6039 str r1, [r7, #0] /* Parameter "Channel" is used with masks because containing */ /* other bits reserved for other purpose. */ CLEAR_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK)); - 8006198: 687b ldr r3, [r7, #4] - 800619a: 6a9b ldr r3, [r3, #40] ; 0x28 - 800619c: 683a ldr r2, [r7, #0] - 800619e: 0352 lsls r2, r2, #13 - 80061a0: 0b52 lsrs r2, r2, #13 - 80061a2: 43d2 mvns r2, r2 - 80061a4: 401a ands r2, r3 - 80061a6: 687b ldr r3, [r7, #4] - 80061a8: 629a str r2, [r3, #40] ; 0x28 + 8006420: 687b ldr r3, [r7, #4] + 8006422: 6a9b ldr r3, [r3, #40] ; 0x28 + 8006424: 683a ldr r2, [r7, #0] + 8006426: 0352 lsls r2, r2, #13 + 8006428: 0b52 lsrs r2, r2, #13 + 800642a: 43d2 mvns r2, r2 + 800642c: 401a ands r2, r3 + 800642e: 687b ldr r3, [r7, #4] + 8006430: 629a str r2, [r3, #40] ; 0x28 } - 80061aa: 46c0 nop ; (mov r8, r8) - 80061ac: 46bd mov sp, r7 - 80061ae: b002 add sp, #8 - 80061b0: bd80 pop {r7, pc} + 8006432: 46c0 nop ; (mov r8, r8) + 8006434: 46bd mov sp, r7 + 8006436: b002 add sp, #8 + 8006438: bd80 pop {r7, pc} ... -080061b4 : +0800643c : * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_1 * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_2 * @retval None */ __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SamplingTimeY) { - 80061b4: b580 push {r7, lr} - 80061b6: b084 sub sp, #16 - 80061b8: af00 add r7, sp, #0 - 80061ba: 60f8 str r0, [r7, #12] - 80061bc: 60b9 str r1, [r7, #8] - 80061be: 607a str r2, [r7, #4] + 800643c: b580 push {r7, lr} + 800643e: b084 sub sp, #16 + 8006440: af00 add r7, sp, #0 + 8006442: 60f8 str r0, [r7, #12] + 8006444: 60b9 str r1, [r7, #8] + 8006446: 607a str r2, [r7, #4] /* Parameter "Channel" is used with masks because containing */ /* other bits reserved for other purpose. */ MODIFY_REG(ADCx->SMPR, - 80061c0: 68fb ldr r3, [r7, #12] - 80061c2: 695b ldr r3, [r3, #20] - 80061c4: 68ba ldr r2, [r7, #8] - 80061c6: 0212 lsls r2, r2, #8 - 80061c8: 43d2 mvns r2, r2 - 80061ca: 401a ands r2, r3 - 80061cc: 68bb ldr r3, [r7, #8] - 80061ce: 021b lsls r3, r3, #8 - 80061d0: 6879 ldr r1, [r7, #4] - 80061d2: 400b ands r3, r1 - 80061d4: 4904 ldr r1, [pc, #16] ; (80061e8 ) - 80061d6: 400b ands r3, r1 - 80061d8: 431a orrs r2, r3 - 80061da: 68fb ldr r3, [r7, #12] - 80061dc: 615a str r2, [r3, #20] + 8006448: 68fb ldr r3, [r7, #12] + 800644a: 695b ldr r3, [r3, #20] + 800644c: 68ba ldr r2, [r7, #8] + 800644e: 0212 lsls r2, r2, #8 + 8006450: 43d2 mvns r2, r2 + 8006452: 401a ands r2, r3 + 8006454: 68bb ldr r3, [r7, #8] + 8006456: 021b lsls r3, r3, #8 + 8006458: 6879 ldr r1, [r7, #4] + 800645a: 400b ands r3, r1 + 800645c: 4904 ldr r1, [pc, #16] ; (8006470 ) + 800645e: 400b ands r3, r1 + 8006460: 431a orrs r2, r3 + 8006462: 68fb ldr r3, [r7, #12] + 8006464: 615a str r2, [r3, #20] (Channel << ADC_SMPR_SMPSEL0_BITOFFSET_POS), (Channel << ADC_SMPR_SMPSEL0_BITOFFSET_POS) & (SamplingTimeY & ADC_SAMPLING_TIME_CH_MASK) ); } - 80061de: 46c0 nop ; (mov r8, r8) - 80061e0: 46bd mov sp, r7 - 80061e2: b004 add sp, #16 - 80061e4: bd80 pop {r7, pc} - 80061e6: 46c0 nop ; (mov r8, r8) - 80061e8: 07ffff00 .word 0x07ffff00 + 8006466: 46c0 nop ; (mov r8, r8) + 8006468: 46bd mov sp, r7 + 800646a: b004 add sp, #16 + 800646c: bd80 pop {r7, pc} + 800646e: 46c0 nop ; (mov r8, r8) + 8006470: 07ffff00 .word 0x07ffff00 -080061ec : +08006474 : * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx) { - 80061ec: b580 push {r7, lr} - 80061ee: b082 sub sp, #8 - 80061f0: af00 add r7, sp, #0 - 80061f2: 6078 str r0, [r7, #4] + 8006474: b580 push {r7, lr} + 8006476: b082 sub sp, #8 + 8006478: af00 add r7, sp, #0 + 800647a: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 80061f4: 687b ldr r3, [r7, #4] - 80061f6: 689b ldr r3, [r3, #8] - 80061f8: 4a05 ldr r2, [pc, #20] ; (8006210 ) - 80061fa: 4013 ands r3, r2 - 80061fc: 2280 movs r2, #128 ; 0x80 - 80061fe: 0552 lsls r2, r2, #21 - 8006200: 431a orrs r2, r3 - 8006202: 687b ldr r3, [r7, #4] - 8006204: 609a str r2, [r3, #8] + 800647c: 687b ldr r3, [r7, #4] + 800647e: 689b ldr r3, [r3, #8] + 8006480: 4a05 ldr r2, [pc, #20] ; (8006498 ) + 8006482: 4013 ands r3, r2 + 8006484: 2280 movs r2, #128 ; 0x80 + 8006486: 0552 lsls r2, r2, #21 + 8006488: 431a orrs r2, r3 + 800648a: 687b ldr r3, [r7, #4] + 800648c: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADVREGEN); } - 8006206: 46c0 nop ; (mov r8, r8) - 8006208: 46bd mov sp, r7 - 800620a: b002 add sp, #8 - 800620c: bd80 pop {r7, pc} - 800620e: 46c0 nop ; (mov r8, r8) - 8006210: 6fffffe8 .word 0x6fffffe8 + 800648e: 46c0 nop ; (mov r8, r8) + 8006490: 46bd mov sp, r7 + 8006492: b002 add sp, #8 + 8006494: bd80 pop {r7, pc} + 8006496: 46c0 nop ; (mov r8, r8) + 8006498: 6fffffe8 .word 0x6fffffe8 -08006214 : +0800649c : * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled * @param ADCx ADC instance * @retval 0: internal regulator is disabled, 1: internal regulator is enabled. */ __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx) { - 8006214: b580 push {r7, lr} - 8006216: b082 sub sp, #8 - 8006218: af00 add r7, sp, #0 - 800621a: 6078 str r0, [r7, #4] + 800649c: b580 push {r7, lr} + 800649e: b082 sub sp, #8 + 80064a0: af00 add r7, sp, #0 + 80064a2: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL); - 800621c: 687b ldr r3, [r7, #4] - 800621e: 689a ldr r2, [r3, #8] - 8006220: 2380 movs r3, #128 ; 0x80 - 8006222: 055b lsls r3, r3, #21 - 8006224: 401a ands r2, r3 - 8006226: 2380 movs r3, #128 ; 0x80 - 8006228: 055b lsls r3, r3, #21 - 800622a: 429a cmp r2, r3 - 800622c: d101 bne.n 8006232 - 800622e: 2301 movs r3, #1 - 8006230: e000 b.n 8006234 - 8006232: 2300 movs r3, #0 + 80064a4: 687b ldr r3, [r7, #4] + 80064a6: 689a ldr r2, [r3, #8] + 80064a8: 2380 movs r3, #128 ; 0x80 + 80064aa: 055b lsls r3, r3, #21 + 80064ac: 401a ands r2, r3 + 80064ae: 2380 movs r3, #128 ; 0x80 + 80064b0: 055b lsls r3, r3, #21 + 80064b2: 429a cmp r2, r3 + 80064b4: d101 bne.n 80064ba + 80064b6: 2301 movs r3, #1 + 80064b8: e000 b.n 80064bc + 80064ba: 2300 movs r3, #0 } - 8006234: 0018 movs r0, r3 - 8006236: 46bd mov sp, r7 - 8006238: b002 add sp, #8 - 800623a: bd80 pop {r7, pc} + 80064bc: 0018 movs r0, r3 + 80064be: 46bd mov sp, r7 + 80064c0: b002 add sp, #8 + 80064c2: bd80 pop {r7, pc} -0800623c : +080064c4 : * @rmtoll CR ADEN LL_ADC_Enable * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx) { - 800623c: b580 push {r7, lr} - 800623e: b082 sub sp, #8 - 8006240: af00 add r7, sp, #0 - 8006242: 6078 str r0, [r7, #4] + 80064c4: b580 push {r7, lr} + 80064c6: b082 sub sp, #8 + 80064c8: af00 add r7, sp, #0 + 80064ca: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8006244: 687b ldr r3, [r7, #4] - 8006246: 689b ldr r3, [r3, #8] - 8006248: 4a04 ldr r2, [pc, #16] ; (800625c ) - 800624a: 4013 ands r3, r2 - 800624c: 2201 movs r2, #1 - 800624e: 431a orrs r2, r3 - 8006250: 687b ldr r3, [r7, #4] - 8006252: 609a str r2, [r3, #8] + 80064cc: 687b ldr r3, [r7, #4] + 80064ce: 689b ldr r3, [r3, #8] + 80064d0: 4a04 ldr r2, [pc, #16] ; (80064e4 ) + 80064d2: 4013 ands r3, r2 + 80064d4: 2201 movs r2, #1 + 80064d6: 431a orrs r2, r3 + 80064d8: 687b ldr r3, [r7, #4] + 80064da: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADEN); } - 8006254: 46c0 nop ; (mov r8, r8) - 8006256: 46bd mov sp, r7 - 8006258: b002 add sp, #8 - 800625a: bd80 pop {r7, pc} - 800625c: 7fffffe8 .word 0x7fffffe8 + 80064dc: 46c0 nop ; (mov r8, r8) + 80064de: 46bd mov sp, r7 + 80064e0: b002 add sp, #8 + 80064e2: bd80 pop {r7, pc} + 80064e4: 7fffffe8 .word 0x7fffffe8 -08006260 : +080064e8 : * @rmtoll CR ADDIS LL_ADC_Disable * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx) { - 8006260: b580 push {r7, lr} - 8006262: b082 sub sp, #8 - 8006264: af00 add r7, sp, #0 - 8006266: 6078 str r0, [r7, #4] + 80064e8: b580 push {r7, lr} + 80064ea: b082 sub sp, #8 + 80064ec: af00 add r7, sp, #0 + 80064ee: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8006268: 687b ldr r3, [r7, #4] - 800626a: 689b ldr r3, [r3, #8] - 800626c: 4a04 ldr r2, [pc, #16] ; (8006280 ) - 800626e: 4013 ands r3, r2 - 8006270: 2202 movs r2, #2 - 8006272: 431a orrs r2, r3 - 8006274: 687b ldr r3, [r7, #4] - 8006276: 609a str r2, [r3, #8] + 80064f0: 687b ldr r3, [r7, #4] + 80064f2: 689b ldr r3, [r3, #8] + 80064f4: 4a04 ldr r2, [pc, #16] ; (8006508 ) + 80064f6: 4013 ands r3, r2 + 80064f8: 2202 movs r2, #2 + 80064fa: 431a orrs r2, r3 + 80064fc: 687b ldr r3, [r7, #4] + 80064fe: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADDIS); } - 8006278: 46c0 nop ; (mov r8, r8) - 800627a: 46bd mov sp, r7 - 800627c: b002 add sp, #8 - 800627e: bd80 pop {r7, pc} - 8006280: 7fffffe8 .word 0x7fffffe8 + 8006500: 46c0 nop ; (mov r8, r8) + 8006502: 46bd mov sp, r7 + 8006504: b002 add sp, #8 + 8006506: bd80 pop {r7, pc} + 8006508: 7fffffe8 .word 0x7fffffe8 -08006284 : +0800650c : * @rmtoll CR ADEN LL_ADC_IsEnabled * @param ADCx ADC instance * @retval 0: ADC is disabled, 1: ADC is enabled. */ __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx) { - 8006284: b580 push {r7, lr} - 8006286: b082 sub sp, #8 - 8006288: af00 add r7, sp, #0 - 800628a: 6078 str r0, [r7, #4] + 800650c: b580 push {r7, lr} + 800650e: b082 sub sp, #8 + 8006510: af00 add r7, sp, #0 + 8006512: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); - 800628c: 687b ldr r3, [r7, #4] - 800628e: 689b ldr r3, [r3, #8] - 8006290: 2201 movs r2, #1 - 8006292: 4013 ands r3, r2 - 8006294: 2b01 cmp r3, #1 - 8006296: d101 bne.n 800629c - 8006298: 2301 movs r3, #1 - 800629a: e000 b.n 800629e - 800629c: 2300 movs r3, #0 + 8006514: 687b ldr r3, [r7, #4] + 8006516: 689b ldr r3, [r3, #8] + 8006518: 2201 movs r2, #1 + 800651a: 4013 ands r3, r2 + 800651c: 2b01 cmp r3, #1 + 800651e: d101 bne.n 8006524 + 8006520: 2301 movs r3, #1 + 8006522: e000 b.n 8006526 + 8006524: 2300 movs r3, #0 } - 800629e: 0018 movs r0, r3 - 80062a0: 46bd mov sp, r7 - 80062a2: b002 add sp, #8 - 80062a4: bd80 pop {r7, pc} + 8006526: 0018 movs r0, r3 + 8006528: 46bd mov sp, r7 + 800652a: b002 add sp, #8 + 800652c: bd80 pop {r7, pc} -080062a6 : +0800652e : * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing * @param ADCx ADC instance * @retval 0: no ADC disable command on going. */ __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx) { - 80062a6: b580 push {r7, lr} - 80062a8: b082 sub sp, #8 - 80062aa: af00 add r7, sp, #0 - 80062ac: 6078 str r0, [r7, #4] + 800652e: b580 push {r7, lr} + 8006530: b082 sub sp, #8 + 8006532: af00 add r7, sp, #0 + 8006534: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL); - 80062ae: 687b ldr r3, [r7, #4] - 80062b0: 689b ldr r3, [r3, #8] - 80062b2: 2202 movs r2, #2 - 80062b4: 4013 ands r3, r2 - 80062b6: 2b02 cmp r3, #2 - 80062b8: d101 bne.n 80062be - 80062ba: 2301 movs r3, #1 - 80062bc: e000 b.n 80062c0 - 80062be: 2300 movs r3, #0 + 8006536: 687b ldr r3, [r7, #4] + 8006538: 689b ldr r3, [r3, #8] + 800653a: 2202 movs r2, #2 + 800653c: 4013 ands r3, r2 + 800653e: 2b02 cmp r3, #2 + 8006540: d101 bne.n 8006546 + 8006542: 2301 movs r3, #1 + 8006544: e000 b.n 8006548 + 8006546: 2300 movs r3, #0 } - 80062c0: 0018 movs r0, r3 - 80062c2: 46bd mov sp, r7 - 80062c4: b002 add sp, #8 - 80062c6: bd80 pop {r7, pc} + 8006548: 0018 movs r0, r3 + 800654a: 46bd mov sp, r7 + 800654c: b002 add sp, #8 + 800654e: bd80 pop {r7, pc} -080062c8 : +08006550 : * @rmtoll CR ADSTART LL_ADC_REG_StartConversion * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx) { - 80062c8: b580 push {r7, lr} - 80062ca: b082 sub sp, #8 - 80062cc: af00 add r7, sp, #0 - 80062ce: 6078 str r0, [r7, #4] + 8006550: b580 push {r7, lr} + 8006552: b082 sub sp, #8 + 8006554: af00 add r7, sp, #0 + 8006556: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 80062d0: 687b ldr r3, [r7, #4] - 80062d2: 689b ldr r3, [r3, #8] - 80062d4: 4a04 ldr r2, [pc, #16] ; (80062e8 ) - 80062d6: 4013 ands r3, r2 - 80062d8: 2204 movs r2, #4 - 80062da: 431a orrs r2, r3 - 80062dc: 687b ldr r3, [r7, #4] - 80062de: 609a str r2, [r3, #8] + 8006558: 687b ldr r3, [r7, #4] + 800655a: 689b ldr r3, [r3, #8] + 800655c: 4a04 ldr r2, [pc, #16] ; (8006570 ) + 800655e: 4013 ands r3, r2 + 8006560: 2204 movs r2, #4 + 8006562: 431a orrs r2, r3 + 8006564: 687b ldr r3, [r7, #4] + 8006566: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADSTART); } - 80062e0: 46c0 nop ; (mov r8, r8) - 80062e2: 46bd mov sp, r7 - 80062e4: b002 add sp, #8 - 80062e6: bd80 pop {r7, pc} - 80062e8: 7fffffe8 .word 0x7fffffe8 + 8006568: 46c0 nop ; (mov r8, r8) + 800656a: 46bd mov sp, r7 + 800656c: b002 add sp, #8 + 800656e: bd80 pop {r7, pc} + 8006570: 7fffffe8 .word 0x7fffffe8 -080062ec : +08006574 : * @rmtoll CR ADSTP LL_ADC_REG_StopConversion * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx) { - 80062ec: b580 push {r7, lr} - 80062ee: b082 sub sp, #8 - 80062f0: af00 add r7, sp, #0 - 80062f2: 6078 str r0, [r7, #4] + 8006574: b580 push {r7, lr} + 8006576: b082 sub sp, #8 + 8006578: af00 add r7, sp, #0 + 800657a: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 80062f4: 687b ldr r3, [r7, #4] - 80062f6: 689b ldr r3, [r3, #8] - 80062f8: 4a04 ldr r2, [pc, #16] ; (800630c ) - 80062fa: 4013 ands r3, r2 - 80062fc: 2210 movs r2, #16 - 80062fe: 431a orrs r2, r3 - 8006300: 687b ldr r3, [r7, #4] - 8006302: 609a str r2, [r3, #8] + 800657c: 687b ldr r3, [r7, #4] + 800657e: 689b ldr r3, [r3, #8] + 8006580: 4a04 ldr r2, [pc, #16] ; (8006594 ) + 8006582: 4013 ands r3, r2 + 8006584: 2210 movs r2, #16 + 8006586: 431a orrs r2, r3 + 8006588: 687b ldr r3, [r7, #4] + 800658a: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADSTP); } - 8006304: 46c0 nop ; (mov r8, r8) - 8006306: 46bd mov sp, r7 - 8006308: b002 add sp, #8 - 800630a: bd80 pop {r7, pc} - 800630c: 7fffffe8 .word 0x7fffffe8 + 800658c: 46c0 nop ; (mov r8, r8) + 800658e: 46bd mov sp, r7 + 8006590: b002 add sp, #8 + 8006592: bd80 pop {r7, pc} + 8006594: 7fffffe8 .word 0x7fffffe8 -08006310 : +08006598 : * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing * @param ADCx ADC instance * @retval 0: no conversion is on going on ADC group regular. */ __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx) { - 8006310: b580 push {r7, lr} - 8006312: b082 sub sp, #8 - 8006314: af00 add r7, sp, #0 - 8006316: 6078 str r0, [r7, #4] + 8006598: b580 push {r7, lr} + 800659a: b082 sub sp, #8 + 800659c: af00 add r7, sp, #0 + 800659e: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL); - 8006318: 687b ldr r3, [r7, #4] - 800631a: 689b ldr r3, [r3, #8] - 800631c: 2204 movs r2, #4 - 800631e: 4013 ands r3, r2 - 8006320: 2b04 cmp r3, #4 - 8006322: d101 bne.n 8006328 - 8006324: 2301 movs r3, #1 - 8006326: e000 b.n 800632a - 8006328: 2300 movs r3, #0 + 80065a0: 687b ldr r3, [r7, #4] + 80065a2: 689b ldr r3, [r3, #8] + 80065a4: 2204 movs r2, #4 + 80065a6: 4013 ands r3, r2 + 80065a8: 2b04 cmp r3, #4 + 80065aa: d101 bne.n 80065b0 + 80065ac: 2301 movs r3, #1 + 80065ae: e000 b.n 80065b2 + 80065b0: 2300 movs r3, #0 } - 800632a: 0018 movs r0, r3 - 800632c: 46bd mov sp, r7 - 800632e: b002 add sp, #8 - 8006330: bd80 pop {r7, pc} + 80065b2: 0018 movs r0, r3 + 80065b4: 46bd mov sp, r7 + 80065b6: b002 add sp, #8 + 80065b8: bd80 pop {r7, pc} ... -08006334 : +080065bc : * of structure "ADC_InitTypeDef". * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc) { - 8006334: b580 push {r7, lr} - 8006336: b088 sub sp, #32 - 8006338: af00 add r7, sp, #0 - 800633a: 6078 str r0, [r7, #4] + 80065bc: b580 push {r7, lr} + 80065be: b088 sub sp, #32 + 80065c0: af00 add r7, sp, #0 + 80065c2: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 800633c: 231f movs r3, #31 - 800633e: 18fb adds r3, r7, r3 - 8006340: 2200 movs r2, #0 - 8006342: 701a strb r2, [r3, #0] + 80065c4: 231f movs r3, #31 + 80065c6: 18fb adds r3, r7, r3 + 80065c8: 2200 movs r2, #0 + 80065ca: 701a strb r2, [r3, #0] uint32_t tmpCFGR1 = 0UL; - 8006344: 2300 movs r3, #0 - 8006346: 61bb str r3, [r7, #24] + 80065cc: 2300 movs r3, #0 + 80065ce: 61bb str r3, [r7, #24] uint32_t tmpCFGR2 = 0UL; - 8006348: 2300 movs r3, #0 - 800634a: 617b str r3, [r7, #20] + 80065d0: 2300 movs r3, #0 + 80065d2: 617b str r3, [r7, #20] uint32_t tmp_adc_reg_is_conversion_on_going; __IO uint32_t wait_loop_index = 0UL; - 800634c: 2300 movs r3, #0 - 800634e: 60fb str r3, [r7, #12] + 80065d4: 2300 movs r3, #0 + 80065d6: 60fb str r3, [r7, #12] /* Check ADC handle */ if (hadc == NULL) - 8006350: 687b ldr r3, [r7, #4] - 8006352: 2b00 cmp r3, #0 - 8006354: d101 bne.n 800635a + 80065d8: 687b ldr r3, [r7, #4] + 80065da: 2b00 cmp r3, #0 + 80065dc: d101 bne.n 80065e2 { return HAL_ERROR; - 8006356: 2301 movs r3, #1 - 8006358: e17f b.n 800665a + 80065de: 2301 movs r3, #1 + 80065e0: e17f b.n 80068e2 /* continuous mode is disabled. */ assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == ENABLE))); /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 800635a: 687b ldr r3, [r7, #4] - 800635c: 6d9b ldr r3, [r3, #88] ; 0x58 - 800635e: 2b00 cmp r3, #0 - 8006360: d10a bne.n 8006378 + 80065e2: 687b ldr r3, [r7, #4] + 80065e4: 6d9b ldr r3, [r3, #88] ; 0x58 + 80065e6: 2b00 cmp r3, #0 + 80065e8: d10a bne.n 8006600 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 8006362: 687b ldr r3, [r7, #4] - 8006364: 0018 movs r0, r3 - 8006366: f7fb fb41 bl 80019ec + 80065ea: 687b ldr r3, [r7, #4] + 80065ec: 0018 movs r0, r3 + 80065ee: f7fb f9fd bl 80019ec #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 800636a: 687b ldr r3, [r7, #4] - 800636c: 2200 movs r2, #0 - 800636e: 65da str r2, [r3, #92] ; 0x5c + 80065f2: 687b ldr r3, [r7, #4] + 80065f4: 2200 movs r2, #0 + 80065f6: 65da str r2, [r3, #92] ; 0x5c /* Initialize Lock */ hadc->Lock = HAL_UNLOCKED; - 8006370: 687b ldr r3, [r7, #4] - 8006372: 2254 movs r2, #84 ; 0x54 - 8006374: 2100 movs r1, #0 - 8006376: 5499 strb r1, [r3, r2] + 80065f8: 687b ldr r3, [r7, #4] + 80065fa: 2254 movs r2, #84 ; 0x54 + 80065fc: 2100 movs r1, #0 + 80065fe: 5499 strb r1, [r3, r2] } if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) - 8006378: 687b ldr r3, [r7, #4] - 800637a: 681b ldr r3, [r3, #0] - 800637c: 0018 movs r0, r3 - 800637e: f7ff ff49 bl 8006214 - 8006382: 1e03 subs r3, r0, #0 - 8006384: d115 bne.n 80063b2 + 8006600: 687b ldr r3, [r7, #4] + 8006602: 681b ldr r3, [r3, #0] + 8006604: 0018 movs r0, r3 + 8006606: f7ff ff49 bl 800649c + 800660a: 1e03 subs r3, r0, #0 + 800660c: d115 bne.n 800663a { /* Enable ADC internal voltage regulator */ LL_ADC_EnableInternalRegulator(hadc->Instance); - 8006386: 687b ldr r3, [r7, #4] - 8006388: 681b ldr r3, [r3, #0] - 800638a: 0018 movs r0, r3 - 800638c: f7ff ff2e bl 80061ec + 800660e: 687b ldr r3, [r7, #4] + 8006610: 681b ldr r3, [r3, #0] + 8006612: 0018 movs r0, r3 + 8006614: f7ff ff2e bl 8006474 /* Delay for ADC stabilization time */ /* Wait loop initialization and execution */ /* Note: Variable divided by 2 to compensate partially */ /* CPU processing cycles, scaling in us split to not */ /* exceed 32 bits register capacity and handle low frequency. */ wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); - 8006390: 4bb4 ldr r3, [pc, #720] ; (8006664 ) - 8006392: 681b ldr r3, [r3, #0] - 8006394: 49b4 ldr r1, [pc, #720] ; (8006668 ) - 8006396: 0018 movs r0, r3 - 8006398: f7f9 fec8 bl 800012c <__udivsi3> - 800639c: 0003 movs r3, r0 - 800639e: 3301 adds r3, #1 - 80063a0: 005b lsls r3, r3, #1 - 80063a2: 60fb str r3, [r7, #12] + 8006618: 4bb4 ldr r3, [pc, #720] ; (80068ec ) + 800661a: 681b ldr r3, [r3, #0] + 800661c: 49b4 ldr r1, [pc, #720] ; (80068f0 ) + 800661e: 0018 movs r0, r3 + 8006620: f7f9 fd84 bl 800012c <__udivsi3> + 8006624: 0003 movs r3, r0 + 8006626: 3301 adds r3, #1 + 8006628: 005b lsls r3, r3, #1 + 800662a: 60fb str r3, [r7, #12] while (wait_loop_index != 0UL) - 80063a4: e002 b.n 80063ac + 800662c: e002 b.n 8006634 { wait_loop_index--; - 80063a6: 68fb ldr r3, [r7, #12] - 80063a8: 3b01 subs r3, #1 - 80063aa: 60fb str r3, [r7, #12] + 800662e: 68fb ldr r3, [r7, #12] + 8006630: 3b01 subs r3, #1 + 8006632: 60fb str r3, [r7, #12] while (wait_loop_index != 0UL) - 80063ac: 68fb ldr r3, [r7, #12] - 80063ae: 2b00 cmp r3, #0 - 80063b0: d1f9 bne.n 80063a6 + 8006634: 68fb ldr r3, [r7, #12] + 8006636: 2b00 cmp r3, #0 + 8006638: d1f9 bne.n 800662e } /* Verification that ADC voltage regulator is correctly enabled, whether */ /* or not ADC is coming from state reset (if any potential problem of */ /* clocking, voltage regulator would not be enabled). */ if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) - 80063b2: 687b ldr r3, [r7, #4] - 80063b4: 681b ldr r3, [r3, #0] - 80063b6: 0018 movs r0, r3 - 80063b8: f7ff ff2c bl 8006214 - 80063bc: 1e03 subs r3, r0, #0 - 80063be: d10f bne.n 80063e0 + 800663a: 687b ldr r3, [r7, #4] + 800663c: 681b ldr r3, [r3, #0] + 800663e: 0018 movs r0, r3 + 8006640: f7ff ff2c bl 800649c + 8006644: 1e03 subs r3, r0, #0 + 8006646: d10f bne.n 8006668 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80063c0: 687b ldr r3, [r7, #4] - 80063c2: 6d9b ldr r3, [r3, #88] ; 0x58 - 80063c4: 2210 movs r2, #16 - 80063c6: 431a orrs r2, r3 - 80063c8: 687b ldr r3, [r7, #4] - 80063ca: 659a str r2, [r3, #88] ; 0x58 + 8006648: 687b ldr r3, [r7, #4] + 800664a: 6d9b ldr r3, [r3, #88] ; 0x58 + 800664c: 2210 movs r2, #16 + 800664e: 431a orrs r2, r3 + 8006650: 687b ldr r3, [r7, #4] + 8006652: 659a str r2, [r3, #88] ; 0x58 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80063cc: 687b ldr r3, [r7, #4] - 80063ce: 6ddb ldr r3, [r3, #92] ; 0x5c - 80063d0: 2201 movs r2, #1 - 80063d2: 431a orrs r2, r3 - 80063d4: 687b ldr r3, [r7, #4] - 80063d6: 65da str r2, [r3, #92] ; 0x5c + 8006654: 687b ldr r3, [r7, #4] + 8006656: 6ddb ldr r3, [r3, #92] ; 0x5c + 8006658: 2201 movs r2, #1 + 800665a: 431a orrs r2, r3 + 800665c: 687b ldr r3, [r7, #4] + 800665e: 65da str r2, [r3, #92] ; 0x5c tmp_hal_status = HAL_ERROR; - 80063d8: 231f movs r3, #31 - 80063da: 18fb adds r3, r7, r3 - 80063dc: 2201 movs r2, #1 - 80063de: 701a strb r2, [r3, #0] + 8006660: 231f movs r3, #31 + 8006662: 18fb adds r3, r7, r3 + 8006664: 2201 movs r2, #1 + 8006666: 701a strb r2, [r3, #0] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed and if there is no conversion on going on regular */ /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */ /* called to update a parameter on the fly). */ tmp_adc_reg_is_conversion_on_going = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 80063e0: 687b ldr r3, [r7, #4] - 80063e2: 681b ldr r3, [r3, #0] - 80063e4: 0018 movs r0, r3 - 80063e6: f7ff ff93 bl 8006310 - 80063ea: 0003 movs r3, r0 - 80063ec: 613b str r3, [r7, #16] + 8006668: 687b ldr r3, [r7, #4] + 800666a: 681b ldr r3, [r3, #0] + 800666c: 0018 movs r0, r3 + 800666e: f7ff ff93 bl 8006598 + 8006672: 0003 movs r3, r0 + 8006674: 613b str r3, [r7, #16] if (((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) - 80063ee: 687b ldr r3, [r7, #4] - 80063f0: 6d9b ldr r3, [r3, #88] ; 0x58 - 80063f2: 2210 movs r2, #16 - 80063f4: 4013 ands r3, r2 - 80063f6: d000 beq.n 80063fa - 80063f8: e122 b.n 8006640 + 8006676: 687b ldr r3, [r7, #4] + 8006678: 6d9b ldr r3, [r3, #88] ; 0x58 + 800667a: 2210 movs r2, #16 + 800667c: 4013 ands r3, r2 + 800667e: d000 beq.n 8006682 + 8006680: e122 b.n 80068c8 && (tmp_adc_reg_is_conversion_on_going == 0UL) - 80063fa: 693b ldr r3, [r7, #16] - 80063fc: 2b00 cmp r3, #0 - 80063fe: d000 beq.n 8006402 - 8006400: e11e b.n 8006640 + 8006682: 693b ldr r3, [r7, #16] + 8006684: 2b00 cmp r3, #0 + 8006686: d000 beq.n 800668a + 8006688: e11e b.n 80068c8 ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8006402: 687b ldr r3, [r7, #4] - 8006404: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006406: 4a99 ldr r2, [pc, #612] ; (800666c ) - 8006408: 4013 ands r3, r2 - 800640a: 2202 movs r2, #2 - 800640c: 431a orrs r2, r3 - 800640e: 687b ldr r3, [r7, #4] - 8006410: 659a str r2, [r3, #88] ; 0x58 + 800668a: 687b ldr r3, [r7, #4] + 800668c: 6d9b ldr r3, [r3, #88] ; 0x58 + 800668e: 4a99 ldr r2, [pc, #612] ; (80068f4 ) + 8006690: 4013 ands r3, r2 + 8006692: 2202 movs r2, #2 + 8006694: 431a orrs r2, r3 + 8006696: 687b ldr r3, [r7, #4] + 8006698: 659a str r2, [r3, #88] ; 0x58 /* - DMA continuous request */ /* - Trigger frequency mode */ /* Note: If low power mode AutoPowerOff is enabled, ADC enable */ /* and disable phases are performed automatically by hardware */ /* (in this case, flag ADC_FLAG_RDY is not set). */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 8006412: 687b ldr r3, [r7, #4] - 8006414: 681b ldr r3, [r3, #0] - 8006416: 0018 movs r0, r3 - 8006418: f7ff ff34 bl 8006284 - 800641c: 1e03 subs r3, r0, #0 - 800641e: d000 beq.n 8006422 - 8006420: e0ad b.n 800657e + 800669a: 687b ldr r3, [r7, #4] + 800669c: 681b ldr r3, [r3, #0] + 800669e: 0018 movs r0, r3 + 80066a0: f7ff ff34 bl 800650c + 80066a4: 1e03 subs r3, r0, #0 + 80066a6: d000 beq.n 80066aa + 80066a8: e0ad b.n 8006806 /* without needing to reconfigure all other ADC groups/channels */ /* parameters): */ /* - internal measurement paths (VrefInt, ...) */ /* (set into HAL_ADC_ConfigChannel() ) */ tmpCFGR1 |= (hadc->Init.Resolution | - 8006422: 687b ldr r3, [r7, #4] - 8006424: 689a ldr r2, [r3, #8] + 80066aa: 687b ldr r3, [r7, #4] + 80066ac: 689a ldr r2, [r3, #8] ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | - 8006426: 687b ldr r3, [r7, #4] - 8006428: 7e1b ldrb r3, [r3, #24] - 800642a: 039b lsls r3, r3, #14 + 80066ae: 687b ldr r3, [r7, #4] + 80066b0: 7e1b ldrb r3, [r3, #24] + 80066b2: 039b lsls r3, r3, #14 tmpCFGR1 |= (hadc->Init.Resolution | - 800642c: 431a orrs r2, r3 + 80066b4: 431a orrs r2, r3 ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | - 800642e: 687b ldr r3, [r7, #4] - 8006430: 7e5b ldrb r3, [r3, #25] - 8006432: 03db lsls r3, r3, #15 + 80066b6: 687b ldr r3, [r7, #4] + 80066b8: 7e5b ldrb r3, [r3, #25] + 80066ba: 03db lsls r3, r3, #15 ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | - 8006434: 431a orrs r2, r3 + 80066bc: 431a orrs r2, r3 ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8006436: 687b ldr r3, [r7, #4] - 8006438: 7e9b ldrb r3, [r3, #26] - 800643a: 035b lsls r3, r3, #13 + 80066be: 687b ldr r3, [r7, #4] + 80066c0: 7e9b ldrb r3, [r3, #26] + 80066c2: 035b lsls r3, r3, #13 ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | - 800643c: 431a orrs r2, r3 + 80066c4: 431a orrs r2, r3 ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | - 800643e: 687b ldr r3, [r7, #4] - 8006440: 6b1b ldr r3, [r3, #48] ; 0x30 - 8006442: 2b00 cmp r3, #0 - 8006444: d002 beq.n 800644c - 8006446: 2380 movs r3, #128 ; 0x80 - 8006448: 015b lsls r3, r3, #5 - 800644a: e000 b.n 800644e - 800644c: 2300 movs r3, #0 + 80066c6: 687b ldr r3, [r7, #4] + 80066c8: 6b1b ldr r3, [r3, #48] ; 0x30 + 80066ca: 2b00 cmp r3, #0 + 80066cc: d002 beq.n 80066d4 + 80066ce: 2380 movs r3, #128 ; 0x80 + 80066d0: 015b lsls r3, r3, #5 + 80066d2: e000 b.n 80066d6 + 80066d4: 2300 movs r3, #0 ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 800644e: 431a orrs r2, r3 + 80066d6: 431a orrs r2, r3 hadc->Init.DataAlign | - 8006450: 687b ldr r3, [r7, #4] - 8006452: 68db ldr r3, [r3, #12] + 80066d8: 687b ldr r3, [r7, #4] + 80066da: 68db ldr r3, [r3, #12] ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | - 8006454: 431a orrs r2, r3 + 80066dc: 431a orrs r2, r3 ADC_SCAN_SEQ_MODE(hadc->Init.ScanConvMode) | - 8006456: 687b ldr r3, [r7, #4] - 8006458: 691b ldr r3, [r3, #16] - 800645a: 2b00 cmp r3, #0 - 800645c: da04 bge.n 8006468 - 800645e: 687b ldr r3, [r7, #4] - 8006460: 691b ldr r3, [r3, #16] - 8006462: 005b lsls r3, r3, #1 - 8006464: 085b lsrs r3, r3, #1 - 8006466: e001 b.n 800646c - 8006468: 2380 movs r3, #128 ; 0x80 - 800646a: 039b lsls r3, r3, #14 + 80066de: 687b ldr r3, [r7, #4] + 80066e0: 691b ldr r3, [r3, #16] + 80066e2: 2b00 cmp r3, #0 + 80066e4: da04 bge.n 80066f0 + 80066e6: 687b ldr r3, [r7, #4] + 80066e8: 691b ldr r3, [r3, #16] + 80066ea: 005b lsls r3, r3, #1 + 80066ec: 085b lsrs r3, r3, #1 + 80066ee: e001 b.n 80066f4 + 80066f0: 2380 movs r3, #128 ; 0x80 + 80066f2: 039b lsls r3, r3, #14 hadc->Init.DataAlign | - 800646c: 431a orrs r2, r3 + 80066f4: 431a orrs r2, r3 ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests)); - 800646e: 687b ldr r3, [r7, #4] - 8006470: 212c movs r1, #44 ; 0x2c - 8006472: 5c5b ldrb r3, [r3, r1] - 8006474: 005b lsls r3, r3, #1 + 80066f6: 687b ldr r3, [r7, #4] + 80066f8: 212c movs r1, #44 ; 0x2c + 80066fa: 5c5b ldrb r3, [r3, r1] + 80066fc: 005b lsls r3, r3, #1 ADC_SCAN_SEQ_MODE(hadc->Init.ScanConvMode) | - 8006476: 4313 orrs r3, r2 + 80066fe: 4313 orrs r3, r2 tmpCFGR1 |= (hadc->Init.Resolution | - 8006478: 69ba ldr r2, [r7, #24] - 800647a: 4313 orrs r3, r2 - 800647c: 61bb str r3, [r7, #24] + 8006700: 69ba ldr r2, [r7, #24] + 8006702: 4313 orrs r3, r2 + 8006704: 61bb str r3, [r7, #24] /* Update setting of discontinuous mode only if continuous mode is disabled */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 800647e: 687b ldr r3, [r7, #4] - 8006480: 2220 movs r2, #32 - 8006482: 5c9b ldrb r3, [r3, r2] - 8006484: 2b01 cmp r3, #1 - 8006486: d115 bne.n 80064b4 + 8006706: 687b ldr r3, [r7, #4] + 8006708: 2220 movs r2, #32 + 800670a: 5c9b ldrb r3, [r3, r2] + 800670c: 2b01 cmp r3, #1 + 800670e: d115 bne.n 800673c { if (hadc->Init.ContinuousConvMode == DISABLE) - 8006488: 687b ldr r3, [r7, #4] - 800648a: 7e9b ldrb r3, [r3, #26] - 800648c: 2b00 cmp r3, #0 - 800648e: d105 bne.n 800649c + 8006710: 687b ldr r3, [r7, #4] + 8006712: 7e9b ldrb r3, [r3, #26] + 8006714: 2b00 cmp r3, #0 + 8006716: d105 bne.n 8006724 { /* Enable the selected ADC group regular discontinuous mode */ tmpCFGR1 |= ADC_CFGR1_DISCEN; - 8006490: 69bb ldr r3, [r7, #24] - 8006492: 2280 movs r2, #128 ; 0x80 - 8006494: 0252 lsls r2, r2, #9 - 8006496: 4313 orrs r3, r2 - 8006498: 61bb str r3, [r7, #24] - 800649a: e00b b.n 80064b4 + 8006718: 69bb ldr r3, [r7, #24] + 800671a: 2280 movs r2, #128 ; 0x80 + 800671c: 0252 lsls r2, r2, #9 + 800671e: 4313 orrs r3, r2 + 8006720: 61bb str r3, [r7, #24] + 8006722: e00b b.n 800673c /* ADC regular group discontinuous was intended to be enabled, */ /* but ADC regular group modes continuous and sequencer discontinuous */ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 800649c: 687b ldr r3, [r7, #4] - 800649e: 6d9b ldr r3, [r3, #88] ; 0x58 - 80064a0: 2220 movs r2, #32 - 80064a2: 431a orrs r2, r3 - 80064a4: 687b ldr r3, [r7, #4] - 80064a6: 659a str r2, [r3, #88] ; 0x58 + 8006724: 687b ldr r3, [r7, #4] + 8006726: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006728: 2220 movs r2, #32 + 800672a: 431a orrs r2, r3 + 800672c: 687b ldr r3, [r7, #4] + 800672e: 659a str r2, [r3, #88] ; 0x58 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80064a8: 687b ldr r3, [r7, #4] - 80064aa: 6ddb ldr r3, [r3, #92] ; 0x5c - 80064ac: 2201 movs r2, #1 - 80064ae: 431a orrs r2, r3 - 80064b0: 687b ldr r3, [r7, #4] - 80064b2: 65da str r2, [r3, #92] ; 0x5c + 8006730: 687b ldr r3, [r7, #4] + 8006732: 6ddb ldr r3, [r3, #92] ; 0x5c + 8006734: 2201 movs r2, #1 + 8006736: 431a orrs r2, r3 + 8006738: 687b ldr r3, [r7, #4] + 800673a: 65da str r2, [r3, #92] ; 0x5c /* Enable external trigger if trigger selection is different of software */ /* start. */ /* Note: This configuration keeps the hardware feature of parameter */ /* ExternalTrigConvEdge "trigger edge none" equivalent to */ /* software start. */ if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - 80064b4: 687b ldr r3, [r7, #4] - 80064b6: 6a5b ldr r3, [r3, #36] ; 0x24 - 80064b8: 2b00 cmp r3, #0 - 80064ba: d00a beq.n 80064d2 + 800673c: 687b ldr r3, [r7, #4] + 800673e: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006740: 2b00 cmp r3, #0 + 8006742: d00a beq.n 800675a { tmpCFGR1 |= ((hadc->Init.ExternalTrigConv & ADC_CFGR1_EXTSEL) | - 80064bc: 687b ldr r3, [r7, #4] - 80064be: 6a5a ldr r2, [r3, #36] ; 0x24 - 80064c0: 23e0 movs r3, #224 ; 0xe0 - 80064c2: 005b lsls r3, r3, #1 - 80064c4: 401a ands r2, r3 + 8006744: 687b ldr r3, [r7, #4] + 8006746: 6a5a ldr r2, [r3, #36] ; 0x24 + 8006748: 23e0 movs r3, #224 ; 0xe0 + 800674a: 005b lsls r3, r3, #1 + 800674c: 401a ands r2, r3 hadc->Init.ExternalTrigConvEdge); - 80064c6: 687b ldr r3, [r7, #4] - 80064c8: 6a9b ldr r3, [r3, #40] ; 0x28 + 800674e: 687b ldr r3, [r7, #4] + 8006750: 6a9b ldr r3, [r3, #40] ; 0x28 tmpCFGR1 |= ((hadc->Init.ExternalTrigConv & ADC_CFGR1_EXTSEL) | - 80064ca: 4313 orrs r3, r2 - 80064cc: 69ba ldr r2, [r7, #24] - 80064ce: 4313 orrs r3, r2 - 80064d0: 61bb str r3, [r7, #24] + 8006752: 4313 orrs r3, r2 + 8006754: 69ba ldr r2, [r7, #24] + 8006756: 4313 orrs r3, r2 + 8006758: 61bb str r3, [r7, #24] } /* Update ADC configuration register with previous settings */ MODIFY_REG(hadc->Instance->CFGR1, - 80064d2: 687b ldr r3, [r7, #4] - 80064d4: 681b ldr r3, [r3, #0] - 80064d6: 68db ldr r3, [r3, #12] - 80064d8: 4a65 ldr r2, [pc, #404] ; (8006670 ) - 80064da: 4013 ands r3, r2 - 80064dc: 0019 movs r1, r3 - 80064de: 687b ldr r3, [r7, #4] - 80064e0: 681b ldr r3, [r3, #0] - 80064e2: 69ba ldr r2, [r7, #24] - 80064e4: 430a orrs r2, r1 - 80064e6: 60da str r2, [r3, #12] + 800675a: 687b ldr r3, [r7, #4] + 800675c: 681b ldr r3, [r3, #0] + 800675e: 68db ldr r3, [r3, #12] + 8006760: 4a65 ldr r2, [pc, #404] ; (80068f8 ) + 8006762: 4013 ands r3, r2 + 8006764: 0019 movs r1, r3 + 8006766: 687b ldr r3, [r7, #4] + 8006768: 681b ldr r3, [r3, #0] + 800676a: 69ba ldr r2, [r7, #24] + 800676c: 430a orrs r2, r1 + 800676e: 60da str r2, [r3, #12] ADC_CFGR1_ALIGN | ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG, tmpCFGR1); tmpCFGR2 |= ((hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | - 80064e8: 687b ldr r3, [r7, #4] - 80064ea: 685b ldr r3, [r3, #4] - 80064ec: 0f9b lsrs r3, r3, #30 - 80064ee: 079a lsls r2, r3, #30 + 8006770: 687b ldr r3, [r7, #4] + 8006772: 685b ldr r3, [r3, #4] + 8006774: 0f9b lsrs r3, r3, #30 + 8006776: 079a lsls r2, r3, #30 hadc->Init.TriggerFrequencyMode - 80064f0: 687b ldr r3, [r7, #4] - 80064f2: 6cdb ldr r3, [r3, #76] ; 0x4c + 8006778: 687b ldr r3, [r7, #4] + 800677a: 6cdb ldr r3, [r3, #76] ; 0x4c tmpCFGR2 |= ((hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | - 80064f4: 4313 orrs r3, r2 - 80064f6: 697a ldr r2, [r7, #20] - 80064f8: 4313 orrs r3, r2 - 80064fa: 617b str r3, [r7, #20] + 800677c: 4313 orrs r3, r2 + 800677e: 697a ldr r2, [r7, #20] + 8006780: 4313 orrs r3, r2 + 8006782: 617b str r3, [r7, #20] ); if (hadc->Init.OversamplingMode == ENABLE) - 80064fc: 687b ldr r3, [r7, #4] - 80064fe: 223c movs r2, #60 ; 0x3c - 8006500: 5c9b ldrb r3, [r3, r2] - 8006502: 2b01 cmp r3, #1 - 8006504: d111 bne.n 800652a + 8006784: 687b ldr r3, [r7, #4] + 8006786: 223c movs r2, #60 ; 0x3c + 8006788: 5c9b ldrb r3, [r3, r2] + 800678a: 2b01 cmp r3, #1 + 800678c: d111 bne.n 80067b2 { tmpCFGR2 |= (ADC_CFGR2_OVSE | (hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | - 8006506: 687b ldr r3, [r7, #4] - 8006508: 685b ldr r3, [r3, #4] - 800650a: 0f9b lsrs r3, r3, #30 - 800650c: 079a lsls r2, r3, #30 + 800678e: 687b ldr r3, [r7, #4] + 8006790: 685b ldr r3, [r3, #4] + 8006792: 0f9b lsrs r3, r3, #30 + 8006794: 079a lsls r2, r3, #30 hadc->Init.Oversampling.Ratio | - 800650e: 687b ldr r3, [r7, #4] - 8006510: 6c1b ldr r3, [r3, #64] ; 0x40 + 8006796: 687b ldr r3, [r7, #4] + 8006798: 6c1b ldr r3, [r3, #64] ; 0x40 (hadc->Init.ClockPrescaler & ADC_CFGR2_CKMODE) | - 8006512: 431a orrs r2, r3 + 800679a: 431a orrs r2, r3 hadc->Init.Oversampling.RightBitShift | - 8006514: 687b ldr r3, [r7, #4] - 8006516: 6c5b ldr r3, [r3, #68] ; 0x44 + 800679c: 687b ldr r3, [r7, #4] + 800679e: 6c5b ldr r3, [r3, #68] ; 0x44 hadc->Init.Oversampling.Ratio | - 8006518: 431a orrs r2, r3 + 80067a0: 431a orrs r2, r3 hadc->Init.Oversampling.TriggeredMode - 800651a: 687b ldr r3, [r7, #4] - 800651c: 6c9b ldr r3, [r3, #72] ; 0x48 + 80067a2: 687b ldr r3, [r7, #4] + 80067a4: 6c9b ldr r3, [r3, #72] ; 0x48 hadc->Init.Oversampling.RightBitShift | - 800651e: 431a orrs r2, r3 + 80067a6: 431a orrs r2, r3 tmpCFGR2 |= (ADC_CFGR2_OVSE | - 8006520: 697b ldr r3, [r7, #20] - 8006522: 4313 orrs r3, r2 - 8006524: 2201 movs r2, #1 - 8006526: 4313 orrs r3, r2 - 8006528: 617b str r3, [r7, #20] + 80067a8: 697b ldr r3, [r7, #20] + 80067aa: 4313 orrs r3, r2 + 80067ac: 2201 movs r2, #1 + 80067ae: 4313 orrs r3, r2 + 80067b0: 617b str r3, [r7, #20] ); } MODIFY_REG(hadc->Instance->CFGR2, - 800652a: 687b ldr r3, [r7, #4] - 800652c: 681b ldr r3, [r3, #0] - 800652e: 691b ldr r3, [r3, #16] - 8006530: 4a50 ldr r2, [pc, #320] ; (8006674 ) - 8006532: 4013 ands r3, r2 - 8006534: 0019 movs r1, r3 - 8006536: 687b ldr r3, [r7, #4] - 8006538: 681b ldr r3, [r3, #0] - 800653a: 697a ldr r2, [r7, #20] - 800653c: 430a orrs r2, r1 - 800653e: 611a str r2, [r3, #16] + 80067b2: 687b ldr r3, [r7, #4] + 80067b4: 681b ldr r3, [r3, #0] + 80067b6: 691b ldr r3, [r3, #16] + 80067b8: 4a50 ldr r2, [pc, #320] ; (80068fc ) + 80067ba: 4013 ands r3, r2 + 80067bc: 0019 movs r1, r3 + 80067be: 687b ldr r3, [r7, #4] + 80067c0: 681b ldr r3, [r3, #0] + 80067c2: 697a ldr r2, [r7, #20] + 80067c4: 430a orrs r2, r1 + 80067c6: 611a str r2, [r3, #16] ADC_CFGR2_TOVS, tmpCFGR2); /* Configuration of ADC clock mode: asynchronous clock source */ /* with selectable prescaler. */ if (((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV1) && - 8006540: 687b ldr r3, [r7, #4] - 8006542: 685a ldr r2, [r3, #4] - 8006544: 23c0 movs r3, #192 ; 0xc0 - 8006546: 061b lsls r3, r3, #24 - 8006548: 429a cmp r2, r3 - 800654a: d018 beq.n 800657e + 80067c8: 687b ldr r3, [r7, #4] + 80067ca: 685a ldr r2, [r3, #4] + 80067cc: 23c0 movs r3, #192 ; 0xc0 + 80067ce: 061b lsls r3, r3, #24 + 80067d0: 429a cmp r2, r3 + 80067d2: d018 beq.n 8006806 ((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV2) && - 800654c: 687b ldr r3, [r7, #4] - 800654e: 685a ldr r2, [r3, #4] + 80067d4: 687b ldr r3, [r7, #4] + 80067d6: 685a ldr r2, [r3, #4] if (((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV1) && - 8006550: 2380 movs r3, #128 ; 0x80 - 8006552: 05db lsls r3, r3, #23 - 8006554: 429a cmp r2, r3 - 8006556: d012 beq.n 800657e + 80067d8: 2380 movs r3, #128 ; 0x80 + 80067da: 05db lsls r3, r3, #23 + 80067dc: 429a cmp r2, r3 + 80067de: d012 beq.n 8006806 ((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV4)) - 8006558: 687b ldr r3, [r7, #4] - 800655a: 685a ldr r2, [r3, #4] + 80067e0: 687b ldr r3, [r7, #4] + 80067e2: 685a ldr r2, [r3, #4] ((hadc->Init.ClockPrescaler) != ADC_CLOCK_SYNC_PCLK_DIV2) && - 800655c: 2380 movs r3, #128 ; 0x80 - 800655e: 061b lsls r3, r3, #24 - 8006560: 429a cmp r2, r3 - 8006562: d00c beq.n 800657e + 80067e4: 2380 movs r3, #128 ; 0x80 + 80067e6: 061b lsls r3, r3, #24 + 80067e8: 429a cmp r2, r3 + 80067ea: d00c beq.n 8006806 { MODIFY_REG(ADC1_COMMON->CCR, - 8006564: 4b44 ldr r3, [pc, #272] ; (8006678 ) - 8006566: 681b ldr r3, [r3, #0] - 8006568: 4a44 ldr r2, [pc, #272] ; (800667c ) - 800656a: 4013 ands r3, r2 - 800656c: 0019 movs r1, r3 - 800656e: 687b ldr r3, [r7, #4] - 8006570: 685a ldr r2, [r3, #4] - 8006572: 23f0 movs r3, #240 ; 0xf0 - 8006574: 039b lsls r3, r3, #14 - 8006576: 401a ands r2, r3 - 8006578: 4b3f ldr r3, [pc, #252] ; (8006678 ) - 800657a: 430a orrs r2, r1 - 800657c: 601a str r2, [r3, #0] + 80067ec: 4b44 ldr r3, [pc, #272] ; (8006900 ) + 80067ee: 681b ldr r3, [r3, #0] + 80067f0: 4a44 ldr r2, [pc, #272] ; (8006904 ) + 80067f2: 4013 ands r3, r2 + 80067f4: 0019 movs r1, r3 + 80067f6: 687b ldr r3, [r7, #4] + 80067f8: 685a ldr r2, [r3, #4] + 80067fa: 23f0 movs r3, #240 ; 0xf0 + 80067fc: 039b lsls r3, r3, #14 + 80067fe: 401a ands r2, r3 + 8006800: 4b3f ldr r3, [pc, #252] ; (8006900 ) + 8006802: 430a orrs r2, r1 + 8006804: 601a str r2, [r3, #0] hadc->Init.ClockPrescaler & ADC_CCR_PRESC); } } /* Channel sampling time configuration */ LL_ADC_SetSamplingTimeCommonChannels(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_1, hadc->Init.SamplingTimeCommon1); - 800657e: 687b ldr r3, [r7, #4] - 8006580: 6818 ldr r0, [r3, #0] - 8006582: 687b ldr r3, [r7, #4] - 8006584: 6b5b ldr r3, [r3, #52] ; 0x34 - 8006586: 001a movs r2, r3 - 8006588: 2100 movs r1, #0 - 800658a: f7ff fd8a bl 80060a2 + 8006806: 687b ldr r3, [r7, #4] + 8006808: 6818 ldr r0, [r3, #0] + 800680a: 687b ldr r3, [r7, #4] + 800680c: 6b5b ldr r3, [r3, #52] ; 0x34 + 800680e: 001a movs r2, r3 + 8006810: 2100 movs r1, #0 + 8006812: f7ff fd8a bl 800632a LL_ADC_SetSamplingTimeCommonChannels(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_2, hadc->Init.SamplingTimeCommon2); - 800658e: 687b ldr r3, [r7, #4] - 8006590: 6818 ldr r0, [r3, #0] - 8006592: 687b ldr r3, [r7, #4] - 8006594: 6b9b ldr r3, [r3, #56] ; 0x38 - 8006596: 493a ldr r1, [pc, #232] ; (8006680 ) - 8006598: 001a movs r2, r3 - 800659a: f7ff fd82 bl 80060a2 + 8006816: 687b ldr r3, [r7, #4] + 8006818: 6818 ldr r0, [r3, #0] + 800681a: 687b ldr r3, [r7, #4] + 800681c: 6b9b ldr r3, [r3, #56] ; 0x38 + 800681e: 493a ldr r1, [pc, #232] ; (8006908 ) + 8006820: 001a movs r2, r3 + 8006822: f7ff fd82 bl 800632a /* emulated by software for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion". */ /* Channels must be configured into each rank using function */ /* "HAL_ADC_ConfigChannel()". */ if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) - 800659e: 687b ldr r3, [r7, #4] - 80065a0: 691b ldr r3, [r3, #16] - 80065a2: 2b00 cmp r3, #0 - 80065a4: d109 bne.n 80065ba + 8006826: 687b ldr r3, [r7, #4] + 8006828: 691b ldr r3, [r3, #16] + 800682a: 2b00 cmp r3, #0 + 800682c: d109 bne.n 8006842 { /* Set sequencer scan length by clearing ranks above rank 1 */ /* and do not modify rank 1 value. */ SET_BIT(hadc->Instance->CHSELR, - 80065a6: 687b ldr r3, [r7, #4] - 80065a8: 681b ldr r3, [r3, #0] - 80065aa: 6a9a ldr r2, [r3, #40] ; 0x28 - 80065ac: 687b ldr r3, [r7, #4] - 80065ae: 681b ldr r3, [r3, #0] - 80065b0: 2110 movs r1, #16 - 80065b2: 4249 negs r1, r1 - 80065b4: 430a orrs r2, r1 - 80065b6: 629a str r2, [r3, #40] ; 0x28 - 80065b8: e018 b.n 80065ec + 800682e: 687b ldr r3, [r7, #4] + 8006830: 681b ldr r3, [r3, #0] + 8006832: 6a9a ldr r2, [r3, #40] ; 0x28 + 8006834: 687b ldr r3, [r7, #4] + 8006836: 681b ldr r3, [r3, #0] + 8006838: 2110 movs r1, #16 + 800683a: 4249 negs r1, r1 + 800683c: 430a orrs r2, r1 + 800683e: 629a str r2, [r3, #40] ; 0x28 + 8006840: e018 b.n 8006874 ADC_CHSELR_SQ2_TO_SQ8); } else if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE) - 80065ba: 687b ldr r3, [r7, #4] - 80065bc: 691a ldr r2, [r3, #16] - 80065be: 2380 movs r3, #128 ; 0x80 - 80065c0: 039b lsls r3, r3, #14 - 80065c2: 429a cmp r2, r3 - 80065c4: d112 bne.n 80065ec + 8006842: 687b ldr r3, [r7, #4] + 8006844: 691a ldr r2, [r3, #16] + 8006846: 2380 movs r3, #128 ; 0x80 + 8006848: 039b lsls r3, r3, #14 + 800684a: 429a cmp r2, r3 + 800684c: d112 bne.n 8006874 /* therefore after the first call of "HAL_ADC_Init()", */ /* each rank corresponding to parameter "NbrOfConversion" */ /* must be set using "HAL_ADC_ConfigChannel()". */ /* - Set sequencer scan length by clearing ranks above maximum rank */ /* and do not modify other ranks value. */ MODIFY_REG(hadc->Instance->CHSELR, - 80065c6: 687b ldr r3, [r7, #4] - 80065c8: 681b ldr r3, [r3, #0] - 80065ca: 6a9b ldr r3, [r3, #40] ; 0x28 - 80065cc: 687b ldr r3, [r7, #4] - 80065ce: 69db ldr r3, [r3, #28] - 80065d0: 3b01 subs r3, #1 - 80065d2: 009b lsls r3, r3, #2 - 80065d4: 221c movs r2, #28 - 80065d6: 4013 ands r3, r2 - 80065d8: 2210 movs r2, #16 - 80065da: 4252 negs r2, r2 - 80065dc: 409a lsls r2, r3 - 80065de: 0011 movs r1, r2 - 80065e0: 687b ldr r3, [r7, #4] - 80065e2: 6e1a ldr r2, [r3, #96] ; 0x60 - 80065e4: 687b ldr r3, [r7, #4] - 80065e6: 681b ldr r3, [r3, #0] - 80065e8: 430a orrs r2, r1 - 80065ea: 629a str r2, [r3, #40] ; 0x28 + 800684e: 687b ldr r3, [r7, #4] + 8006850: 681b ldr r3, [r3, #0] + 8006852: 6a9b ldr r3, [r3, #40] ; 0x28 + 8006854: 687b ldr r3, [r7, #4] + 8006856: 69db ldr r3, [r3, #28] + 8006858: 3b01 subs r3, #1 + 800685a: 009b lsls r3, r3, #2 + 800685c: 221c movs r2, #28 + 800685e: 4013 ands r3, r2 + 8006860: 2210 movs r2, #16 + 8006862: 4252 negs r2, r2 + 8006864: 409a lsls r2, r3 + 8006866: 0011 movs r1, r2 + 8006868: 687b ldr r3, [r7, #4] + 800686a: 6e1a ldr r2, [r3, #96] ; 0x60 + 800686c: 687b ldr r3, [r7, #4] + 800686e: 681b ldr r3, [r3, #0] + 8006870: 430a orrs r2, r1 + 8006872: 629a str r2, [r3, #40] ; 0x28 ); } /* Check back that ADC registers have effectively been configured to */ /* ensure of no potential problem of ADC core peripheral clocking. */ if(LL_ADC_GetSamplingTimeCommonChannels(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_1) - 80065ec: 687b ldr r3, [r7, #4] - 80065ee: 681b ldr r3, [r3, #0] - 80065f0: 2100 movs r1, #0 - 80065f2: 0018 movs r0, r3 - 80065f4: f7ff fd72 bl 80060dc - 80065f8: 0002 movs r2, r0 + 8006874: 687b ldr r3, [r7, #4] + 8006876: 681b ldr r3, [r3, #0] + 8006878: 2100 movs r1, #0 + 800687a: 0018 movs r0, r3 + 800687c: f7ff fd72 bl 8006364 + 8006880: 0002 movs r2, r0 == hadc->Init.SamplingTimeCommon1) - 80065fa: 687b ldr r3, [r7, #4] - 80065fc: 6b5b ldr r3, [r3, #52] ; 0x34 + 8006882: 687b ldr r3, [r7, #4] + 8006884: 6b5b ldr r3, [r3, #52] ; 0x34 if(LL_ADC_GetSamplingTimeCommonChannels(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_1) - 80065fe: 429a cmp r2, r3 - 8006600: d10b bne.n 800661a + 8006886: 429a cmp r2, r3 + 8006888: d10b bne.n 80068a2 { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 8006602: 687b ldr r3, [r7, #4] - 8006604: 2200 movs r2, #0 - 8006606: 65da str r2, [r3, #92] ; 0x5c + 800688a: 687b ldr r3, [r7, #4] + 800688c: 2200 movs r2, #0 + 800688e: 65da str r2, [r3, #92] ; 0x5c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8006608: 687b ldr r3, [r7, #4] - 800660a: 6d9b ldr r3, [r3, #88] ; 0x58 - 800660c: 2203 movs r2, #3 - 800660e: 4393 bics r3, r2 - 8006610: 2201 movs r2, #1 - 8006612: 431a orrs r2, r3 - 8006614: 687b ldr r3, [r7, #4] - 8006616: 659a str r2, [r3, #88] ; 0x58 + 8006890: 687b ldr r3, [r7, #4] + 8006892: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006894: 2203 movs r2, #3 + 8006896: 4393 bics r3, r2 + 8006898: 2201 movs r2, #1 + 800689a: 431a orrs r2, r3 + 800689c: 687b ldr r3, [r7, #4] + 800689e: 659a str r2, [r3, #88] ; 0x58 if(LL_ADC_GetSamplingTimeCommonChannels(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_1) - 8006618: e01c b.n 8006654 + 80068a0: e01c b.n 80068dc HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, - 800661a: 687b ldr r3, [r7, #4] - 800661c: 6d9b ldr r3, [r3, #88] ; 0x58 - 800661e: 2212 movs r2, #18 - 8006620: 4393 bics r3, r2 - 8006622: 2210 movs r2, #16 - 8006624: 431a orrs r2, r3 - 8006626: 687b ldr r3, [r7, #4] - 8006628: 659a str r2, [r3, #88] ; 0x58 + 80068a2: 687b ldr r3, [r7, #4] + 80068a4: 6d9b ldr r3, [r3, #88] ; 0x58 + 80068a6: 2212 movs r2, #18 + 80068a8: 4393 bics r3, r2 + 80068aa: 2210 movs r2, #16 + 80068ac: 431a orrs r2, r3 + 80068ae: 687b ldr r3, [r7, #4] + 80068b0: 659a str r2, [r3, #88] ; 0x58 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 800662a: 687b ldr r3, [r7, #4] - 800662c: 6ddb ldr r3, [r3, #92] ; 0x5c - 800662e: 2201 movs r2, #1 - 8006630: 431a orrs r2, r3 - 8006632: 687b ldr r3, [r7, #4] - 8006634: 65da str r2, [r3, #92] ; 0x5c + 80068b2: 687b ldr r3, [r7, #4] + 80068b4: 6ddb ldr r3, [r3, #92] ; 0x5c + 80068b6: 2201 movs r2, #1 + 80068b8: 431a orrs r2, r3 + 80068ba: 687b ldr r3, [r7, #4] + 80068bc: 65da str r2, [r3, #92] ; 0x5c tmp_hal_status = HAL_ERROR; - 8006636: 231f movs r3, #31 - 8006638: 18fb adds r3, r7, r3 - 800663a: 2201 movs r2, #1 - 800663c: 701a strb r2, [r3, #0] + 80068be: 231f movs r3, #31 + 80068c0: 18fb adds r3, r7, r3 + 80068c2: 2201 movs r2, #1 + 80068c4: 701a strb r2, [r3, #0] if(LL_ADC_GetSamplingTimeCommonChannels(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_1) - 800663e: e009 b.n 8006654 + 80068c6: e009 b.n 80068dc } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8006640: 687b ldr r3, [r7, #4] - 8006642: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006644: 2210 movs r2, #16 - 8006646: 431a orrs r2, r3 - 8006648: 687b ldr r3, [r7, #4] - 800664a: 659a str r2, [r3, #88] ; 0x58 + 80068c8: 687b ldr r3, [r7, #4] + 80068ca: 6d9b ldr r3, [r3, #88] ; 0x58 + 80068cc: 2210 movs r2, #16 + 80068ce: 431a orrs r2, r3 + 80068d0: 687b ldr r3, [r7, #4] + 80068d2: 659a str r2, [r3, #88] ; 0x58 tmp_hal_status = HAL_ERROR; - 800664c: 231f movs r3, #31 - 800664e: 18fb adds r3, r7, r3 - 8006650: 2201 movs r2, #1 - 8006652: 701a strb r2, [r3, #0] + 80068d4: 231f movs r3, #31 + 80068d6: 18fb adds r3, r7, r3 + 80068d8: 2201 movs r2, #1 + 80068da: 701a strb r2, [r3, #0] } return tmp_hal_status; - 8006654: 231f movs r3, #31 - 8006656: 18fb adds r3, r7, r3 - 8006658: 781b ldrb r3, [r3, #0] + 80068dc: 231f movs r3, #31 + 80068de: 18fb adds r3, r7, r3 + 80068e0: 781b ldrb r3, [r3, #0] } - 800665a: 0018 movs r0, r3 - 800665c: 46bd mov sp, r7 - 800665e: b008 add sp, #32 - 8006660: bd80 pop {r7, pc} - 8006662: 46c0 nop ; (mov r8, r8) - 8006664: 20000040 .word 0x20000040 - 8006668: 00030d40 .word 0x00030d40 - 800666c: fffffefd .word 0xfffffefd - 8006670: fffe0201 .word 0xfffe0201 - 8006674: 1ffffc02 .word 0x1ffffc02 - 8006678: 40012708 .word 0x40012708 - 800667c: ffc3ffff .word 0xffc3ffff - 8006680: 07ffff04 .word 0x07ffff04 + 80068e2: 0018 movs r0, r3 + 80068e4: 46bd mov sp, r7 + 80068e6: b008 add sp, #32 + 80068e8: bd80 pop {r7, pc} + 80068ea: 46c0 nop ; (mov r8, r8) + 80068ec: 20000040 .word 0x20000040 + 80068f0: 00030d40 .word 0x00030d40 + 80068f4: fffffefd .word 0xfffffefd + 80068f8: fffe0201 .word 0xfffe0201 + 80068fc: 1ffffc02 .word 0x1ffffc02 + 8006900: 40012708 .word 0x40012708 + 8006904: ffc3ffff .word 0xffc3ffff + 8006908: 07ffff04 .word 0x07ffff04 -08006684 : +0800690c : * @note Interruptions enabled in this function: None. * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc) { - 8006684: b5b0 push {r4, r5, r7, lr} - 8006686: b084 sub sp, #16 - 8006688: af00 add r7, sp, #0 - 800668a: 6078 str r0, [r7, #4] + 800690c: b5b0 push {r4, r5, r7, lr} + 800690e: b084 sub sp, #16 + 8006910: af00 add r7, sp, #0 + 8006912: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Perform ADC enable and conversion start if no conversion is on going */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) - 800668c: 687b ldr r3, [r7, #4] - 800668e: 681b ldr r3, [r3, #0] - 8006690: 0018 movs r0, r3 - 8006692: f7ff fe3d bl 8006310 - 8006696: 1e03 subs r3, r0, #0 - 8006698: d135 bne.n 8006706 + 8006914: 687b ldr r3, [r7, #4] + 8006916: 681b ldr r3, [r3, #0] + 8006918: 0018 movs r0, r3 + 800691a: f7ff fe3d bl 8006598 + 800691e: 1e03 subs r3, r0, #0 + 8006920: d135 bne.n 800698e { __HAL_LOCK(hadc); - 800669a: 687b ldr r3, [r7, #4] - 800669c: 2254 movs r2, #84 ; 0x54 - 800669e: 5c9b ldrb r3, [r3, r2] - 80066a0: 2b01 cmp r3, #1 - 80066a2: d101 bne.n 80066a8 - 80066a4: 2302 movs r3, #2 - 80066a6: e035 b.n 8006714 - 80066a8: 687b ldr r3, [r7, #4] - 80066aa: 2254 movs r2, #84 ; 0x54 - 80066ac: 2101 movs r1, #1 - 80066ae: 5499 strb r1, [r3, r2] + 8006922: 687b ldr r3, [r7, #4] + 8006924: 2254 movs r2, #84 ; 0x54 + 8006926: 5c9b ldrb r3, [r3, r2] + 8006928: 2b01 cmp r3, #1 + 800692a: d101 bne.n 8006930 + 800692c: 2302 movs r3, #2 + 800692e: e035 b.n 800699c + 8006930: 687b ldr r3, [r7, #4] + 8006932: 2254 movs r2, #84 ; 0x54 + 8006934: 2101 movs r1, #1 + 8006936: 5499 strb r1, [r3, r2] /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); - 80066b0: 250f movs r5, #15 - 80066b2: 197c adds r4, r7, r5 - 80066b4: 687b ldr r3, [r7, #4] - 80066b6: 0018 movs r0, r3 - 80066b8: f000 fb28 bl 8006d0c - 80066bc: 0003 movs r3, r0 - 80066be: 7023 strb r3, [r4, #0] + 8006938: 250f movs r5, #15 + 800693a: 197c adds r4, r7, r5 + 800693c: 687b ldr r3, [r7, #4] + 800693e: 0018 movs r0, r3 + 8006940: f000 fb28 bl 8006f94 + 8006944: 0003 movs r3, r0 + 8006946: 7023 strb r3, [r4, #0] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) - 80066c0: 197b adds r3, r7, r5 - 80066c2: 781b ldrb r3, [r3, #0] - 80066c4: 2b00 cmp r3, #0 - 80066c6: d119 bne.n 80066fc + 8006948: 197b adds r3, r7, r5 + 800694a: 781b ldrb r3, [r3, #0] + 800694c: 2b00 cmp r3, #0 + 800694e: d119 bne.n 8006984 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, - 80066c8: 687b ldr r3, [r7, #4] - 80066ca: 6d9b ldr r3, [r3, #88] ; 0x58 - 80066cc: 4a13 ldr r2, [pc, #76] ; (800671c ) - 80066ce: 4013 ands r3, r2 - 80066d0: 2280 movs r2, #128 ; 0x80 - 80066d2: 0052 lsls r2, r2, #1 - 80066d4: 431a orrs r2, r3 - 80066d6: 687b ldr r3, [r7, #4] - 80066d8: 659a str r2, [r3, #88] ; 0x58 + 8006950: 687b ldr r3, [r7, #4] + 8006952: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006954: 4a13 ldr r2, [pc, #76] ; (80069a4 ) + 8006956: 4013 ands r3, r2 + 8006958: 2280 movs r2, #128 ; 0x80 + 800695a: 0052 lsls r2, r2, #1 + 800695c: 431a orrs r2, r3 + 800695e: 687b ldr r3, [r7, #4] + 8006960: 659a str r2, [r3, #88] ; 0x58 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP, HAL_ADC_STATE_REG_BUSY); /* Set ADC error code */ /* Reset all ADC error code fields */ ADC_CLEAR_ERRORCODE(hadc); - 80066da: 687b ldr r3, [r7, #4] - 80066dc: 2200 movs r2, #0 - 80066de: 65da str r2, [r3, #92] ; 0x5c + 8006962: 687b ldr r3, [r7, #4] + 8006964: 2200 movs r2, #0 + 8006966: 65da str r2, [r3, #92] ; 0x5c /* Clear ADC group regular conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - 80066e0: 687b ldr r3, [r7, #4] - 80066e2: 681b ldr r3, [r3, #0] - 80066e4: 221c movs r2, #28 - 80066e6: 601a str r2, [r3, #0] + 8006968: 687b ldr r3, [r7, #4] + 800696a: 681b ldr r3, [r3, #0] + 800696c: 221c movs r2, #28 + 800696e: 601a str r2, [r3, #0] /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); - 80066e8: 687b ldr r3, [r7, #4] - 80066ea: 2254 movs r2, #84 ; 0x54 - 80066ec: 2100 movs r1, #0 - 80066ee: 5499 strb r1, [r3, r2] + 8006970: 687b ldr r3, [r7, #4] + 8006972: 2254 movs r2, #84 ; 0x54 + 8006974: 2100 movs r1, #0 + 8006976: 5499 strb r1, [r3, r2] /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ /* If external trigger has been selected, conversion will start at next */ /* trigger event. */ /* Start ADC group regular conversion */ LL_ADC_REG_StartConversion(hadc->Instance); - 80066f0: 687b ldr r3, [r7, #4] - 80066f2: 681b ldr r3, [r3, #0] - 80066f4: 0018 movs r0, r3 - 80066f6: f7ff fde7 bl 80062c8 - 80066fa: e008 b.n 800670e + 8006978: 687b ldr r3, [r7, #4] + 800697a: 681b ldr r3, [r3, #0] + 800697c: 0018 movs r0, r3 + 800697e: f7ff fde7 bl 8006550 + 8006982: e008 b.n 8006996 } else { __HAL_UNLOCK(hadc); - 80066fc: 687b ldr r3, [r7, #4] - 80066fe: 2254 movs r2, #84 ; 0x54 - 8006700: 2100 movs r1, #0 - 8006702: 5499 strb r1, [r3, r2] - 8006704: e003 b.n 800670e + 8006984: 687b ldr r3, [r7, #4] + 8006986: 2254 movs r2, #84 ; 0x54 + 8006988: 2100 movs r1, #0 + 800698a: 5499 strb r1, [r3, r2] + 800698c: e003 b.n 8006996 } } else { tmp_hal_status = HAL_BUSY; - 8006706: 230f movs r3, #15 - 8006708: 18fb adds r3, r7, r3 - 800670a: 2202 movs r2, #2 - 800670c: 701a strb r2, [r3, #0] + 800698e: 230f movs r3, #15 + 8006990: 18fb adds r3, r7, r3 + 8006992: 2202 movs r2, #2 + 8006994: 701a strb r2, [r3, #0] } return tmp_hal_status; - 800670e: 230f movs r3, #15 - 8006710: 18fb adds r3, r7, r3 - 8006712: 781b ldrb r3, [r3, #0] + 8006996: 230f movs r3, #15 + 8006998: 18fb adds r3, r7, r3 + 800699a: 781b ldrb r3, [r3, #0] } - 8006714: 0018 movs r0, r3 - 8006716: 46bd mov sp, r7 - 8006718: b004 add sp, #16 - 800671a: bdb0 pop {r4, r5, r7, pc} - 800671c: fffff0fe .word 0xfffff0fe + 800699c: 0018 movs r0, r3 + 800699e: 46bd mov sp, r7 + 80069a0: b004 add sp, #16 + 80069a2: bdb0 pop {r4, r5, r7, pc} + 80069a4: fffff0fe .word 0xfffff0fe -08006720 : +080069a8 : * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc) { - 8006720: b5b0 push {r4, r5, r7, lr} - 8006722: b084 sub sp, #16 - 8006724: af00 add r7, sp, #0 - 8006726: 6078 str r0, [r7, #4] + 80069a8: b5b0 push {r4, r5, r7, lr} + 80069aa: b084 sub sp, #16 + 80069ac: af00 add r7, sp, #0 + 80069ae: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status; /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); __HAL_LOCK(hadc); - 8006728: 687b ldr r3, [r7, #4] - 800672a: 2254 movs r2, #84 ; 0x54 - 800672c: 5c9b ldrb r3, [r3, r2] - 800672e: 2b01 cmp r3, #1 - 8006730: d101 bne.n 8006736 - 8006732: 2302 movs r3, #2 - 8006734: e029 b.n 800678a - 8006736: 687b ldr r3, [r7, #4] - 8006738: 2254 movs r2, #84 ; 0x54 - 800673a: 2101 movs r1, #1 - 800673c: 5499 strb r1, [r3, r2] + 80069b0: 687b ldr r3, [r7, #4] + 80069b2: 2254 movs r2, #84 ; 0x54 + 80069b4: 5c9b ldrb r3, [r3, r2] + 80069b6: 2b01 cmp r3, #1 + 80069b8: d101 bne.n 80069be + 80069ba: 2302 movs r3, #2 + 80069bc: e029 b.n 8006a12 + 80069be: 687b ldr r3, [r7, #4] + 80069c0: 2254 movs r2, #84 ; 0x54 + 80069c2: 2101 movs r1, #1 + 80069c4: 5499 strb r1, [r3, r2] /* 1. Stop potential conversion on going, on ADC group regular */ tmp_hal_status = ADC_ConversionStop(hadc); - 800673e: 250f movs r5, #15 - 8006740: 197c adds r4, r7, r5 - 8006742: 687b ldr r3, [r7, #4] - 8006744: 0018 movs r0, r3 - 8006746: f000 fa9f bl 8006c88 - 800674a: 0003 movs r3, r0 - 800674c: 7023 strb r3, [r4, #0] + 80069c6: 250f movs r5, #15 + 80069c8: 197c adds r4, r7, r5 + 80069ca: 687b ldr r3, [r7, #4] + 80069cc: 0018 movs r0, r3 + 80069ce: f000 fa9f bl 8006f10 + 80069d2: 0003 movs r3, r0 + 80069d4: 7023 strb r3, [r4, #0] /* Disable ADC peripheral if conversions are effectively stopped */ if (tmp_hal_status == HAL_OK) - 800674e: 197b adds r3, r7, r5 - 8006750: 781b ldrb r3, [r3, #0] - 8006752: 2b00 cmp r3, #0 - 8006754: d112 bne.n 800677c + 80069d6: 197b adds r3, r7, r5 + 80069d8: 781b ldrb r3, [r3, #0] + 80069da: 2b00 cmp r3, #0 + 80069dc: d112 bne.n 8006a04 { /* 2. Disable the ADC peripheral */ tmp_hal_status = ADC_Disable(hadc); - 8006756: 197c adds r4, r7, r5 - 8006758: 687b ldr r3, [r7, #4] - 800675a: 0018 movs r0, r3 - 800675c: f000 fb5c bl 8006e18 - 8006760: 0003 movs r3, r0 - 8006762: 7023 strb r3, [r4, #0] + 80069de: 197c adds r4, r7, r5 + 80069e0: 687b ldr r3, [r7, #4] + 80069e2: 0018 movs r0, r3 + 80069e4: f000 fb5c bl 80070a0 + 80069e8: 0003 movs r3, r0 + 80069ea: 7023 strb r3, [r4, #0] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) - 8006764: 197b adds r3, r7, r5 - 8006766: 781b ldrb r3, [r3, #0] - 8006768: 2b00 cmp r3, #0 - 800676a: d107 bne.n 800677c + 80069ec: 197b adds r3, r7, r5 + 80069ee: 781b ldrb r3, [r3, #0] + 80069f0: 2b00 cmp r3, #0 + 80069f2: d107 bne.n 8006a04 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 800676c: 687b ldr r3, [r7, #4] - 800676e: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006770: 4a08 ldr r2, [pc, #32] ; (8006794 ) - 8006772: 4013 ands r3, r2 - 8006774: 2201 movs r2, #1 - 8006776: 431a orrs r2, r3 - 8006778: 687b ldr r3, [r7, #4] - 800677a: 659a str r2, [r3, #88] ; 0x58 + 80069f4: 687b ldr r3, [r7, #4] + 80069f6: 6d9b ldr r3, [r3, #88] ; 0x58 + 80069f8: 4a08 ldr r2, [pc, #32] ; (8006a1c ) + 80069fa: 4013 ands r3, r2 + 80069fc: 2201 movs r2, #1 + 80069fe: 431a orrs r2, r3 + 8006a00: 687b ldr r3, [r7, #4] + 8006a02: 659a str r2, [r3, #88] ; 0x58 HAL_ADC_STATE_REG_BUSY, HAL_ADC_STATE_READY); } } __HAL_UNLOCK(hadc); - 800677c: 687b ldr r3, [r7, #4] - 800677e: 2254 movs r2, #84 ; 0x54 - 8006780: 2100 movs r1, #0 - 8006782: 5499 strb r1, [r3, r2] + 8006a04: 687b ldr r3, [r7, #4] + 8006a06: 2254 movs r2, #84 ; 0x54 + 8006a08: 2100 movs r1, #0 + 8006a0a: 5499 strb r1, [r3, r2] return tmp_hal_status; - 8006784: 230f movs r3, #15 - 8006786: 18fb adds r3, r7, r3 - 8006788: 781b ldrb r3, [r3, #0] + 8006a0c: 230f movs r3, #15 + 8006a0e: 18fb adds r3, r7, r3 + 8006a10: 781b ldrb r3, [r3, #0] } - 800678a: 0018 movs r0, r3 - 800678c: 46bd mov sp, r7 - 800678e: b004 add sp, #16 - 8006790: bdb0 pop {r4, r5, r7, pc} - 8006792: 46c0 nop ; (mov r8, r8) - 8006794: fffffefe .word 0xfffffefe + 8006a12: 0018 movs r0, r3 + 8006a14: 46bd mov sp, r7 + 8006a16: b004 add sp, #16 + 8006a18: bdb0 pop {r4, r5, r7, pc} + 8006a1a: 46c0 nop ; (mov r8, r8) + 8006a1c: fffffefe .word 0xfffffefe -08006798 : +08006a20 : * @param hadc ADC handle * @param Timeout Timeout value in millisecond. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout) { - 8006798: b580 push {r7, lr} - 800679a: b084 sub sp, #16 - 800679c: af00 add r7, sp, #0 - 800679e: 6078 str r0, [r7, #4] - 80067a0: 6039 str r1, [r7, #0] + 8006a20: b580 push {r7, lr} + 8006a22: b084 sub sp, #16 + 8006a24: af00 add r7, sp, #0 + 8006a26: 6078 str r0, [r7, #4] + 8006a28: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* If end of conversion selected to end of sequence conversions */ if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) - 80067a2: 687b ldr r3, [r7, #4] - 80067a4: 695b ldr r3, [r3, #20] - 80067a6: 2b08 cmp r3, #8 - 80067a8: d102 bne.n 80067b0 + 8006a2a: 687b ldr r3, [r7, #4] + 8006a2c: 695b ldr r3, [r3, #20] + 8006a2e: 2b08 cmp r3, #8 + 8006a30: d102 bne.n 8006a38 { tmp_flag_end = ADC_FLAG_EOS; - 80067aa: 2308 movs r3, #8 - 80067ac: 60fb str r3, [r7, #12] - 80067ae: e00f b.n 80067d0 + 8006a32: 2308 movs r3, #8 + 8006a34: 60fb str r3, [r7, #12] + 8006a36: e00f b.n 8006a58 /* each conversion: */ /* Particular case is ADC configured in DMA mode and ADC sequencer with */ /* several ranks and polling for end of each conversion. */ /* For code simplicity sake, this particular case is generalized to */ /* ADC configured in DMA mode and and polling for end of each conversion. */ if ((hadc->Instance->CFGR1 & ADC_CFGR1_DMAEN) != 0UL) - 80067b0: 687b ldr r3, [r7, #4] - 80067b2: 681b ldr r3, [r3, #0] - 80067b4: 68db ldr r3, [r3, #12] - 80067b6: 2201 movs r2, #1 - 80067b8: 4013 ands r3, r2 - 80067ba: d007 beq.n 80067cc + 8006a38: 687b ldr r3, [r7, #4] + 8006a3a: 681b ldr r3, [r3, #0] + 8006a3c: 68db ldr r3, [r3, #12] + 8006a3e: 2201 movs r2, #1 + 8006a40: 4013 ands r3, r2 + 8006a42: d007 beq.n 8006a54 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 80067bc: 687b ldr r3, [r7, #4] - 80067be: 6d9b ldr r3, [r3, #88] ; 0x58 - 80067c0: 2220 movs r2, #32 - 80067c2: 431a orrs r2, r3 - 80067c4: 687b ldr r3, [r7, #4] - 80067c6: 659a str r2, [r3, #88] ; 0x58 + 8006a44: 687b ldr r3, [r7, #4] + 8006a46: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006a48: 2220 movs r2, #32 + 8006a4a: 431a orrs r2, r3 + 8006a4c: 687b ldr r3, [r7, #4] + 8006a4e: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 80067c8: 2301 movs r3, #1 - 80067ca: e072 b.n 80068b2 + 8006a50: 2301 movs r3, #1 + 8006a52: e072 b.n 8006b3a } else { tmp_flag_end = (ADC_FLAG_EOC); - 80067cc: 2304 movs r3, #4 - 80067ce: 60fb str r3, [r7, #12] + 8006a54: 2304 movs r3, #4 + 8006a56: 60fb str r3, [r7, #12] } } /* Get tick count */ tickstart = HAL_GetTick(); - 80067d0: f7ff fc02 bl 8005fd8 - 80067d4: 0003 movs r3, r0 - 80067d6: 60bb str r3, [r7, #8] + 8006a58: f7ff fc02 bl 8006260 + 8006a5c: 0003 movs r3, r0 + 8006a5e: 60bb str r3, [r7, #8] /* Wait until End of unitary conversion or sequence conversions flag is raised */ while ((hadc->Instance->ISR & tmp_flag_end) == 0UL) - 80067d8: e01f b.n 800681a + 8006a60: e01f b.n 8006aa2 { /* Check if timeout is disabled (set to infinite wait) */ if (Timeout != HAL_MAX_DELAY) - 80067da: 683b ldr r3, [r7, #0] - 80067dc: 3301 adds r3, #1 - 80067de: d01c beq.n 800681a + 8006a62: 683b ldr r3, [r7, #0] + 8006a64: 3301 adds r3, #1 + 8006a66: d01c beq.n 8006aa2 { if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL)) - 80067e0: f7ff fbfa bl 8005fd8 - 80067e4: 0002 movs r2, r0 - 80067e6: 68bb ldr r3, [r7, #8] - 80067e8: 1ad3 subs r3, r2, r3 - 80067ea: 683a ldr r2, [r7, #0] - 80067ec: 429a cmp r2, r3 - 80067ee: d302 bcc.n 80067f6 - 80067f0: 683b ldr r3, [r7, #0] - 80067f2: 2b00 cmp r3, #0 - 80067f4: d111 bne.n 800681a + 8006a68: f7ff fbfa bl 8006260 + 8006a6c: 0002 movs r2, r0 + 8006a6e: 68bb ldr r3, [r7, #8] + 8006a70: 1ad3 subs r3, r2, r3 + 8006a72: 683a ldr r2, [r7, #0] + 8006a74: 429a cmp r2, r3 + 8006a76: d302 bcc.n 8006a7e + 8006a78: 683b ldr r3, [r7, #0] + 8006a7a: 2b00 cmp r3, #0 + 8006a7c: d111 bne.n 8006aa2 { /* New check to avoid false timeout detection in case of preemption */ if ((hadc->Instance->ISR & tmp_flag_end) == 0UL) - 80067f6: 687b ldr r3, [r7, #4] - 80067f8: 681b ldr r3, [r3, #0] - 80067fa: 681b ldr r3, [r3, #0] - 80067fc: 68fa ldr r2, [r7, #12] - 80067fe: 4013 ands r3, r2 - 8006800: d10b bne.n 800681a + 8006a7e: 687b ldr r3, [r7, #4] + 8006a80: 681b ldr r3, [r3, #0] + 8006a82: 681b ldr r3, [r3, #0] + 8006a84: 68fa ldr r2, [r7, #12] + 8006a86: 4013 ands r3, r2 + 8006a88: d10b bne.n 8006aa2 { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); - 8006802: 687b ldr r3, [r7, #4] - 8006804: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006806: 2204 movs r2, #4 - 8006808: 431a orrs r2, r3 - 800680a: 687b ldr r3, [r7, #4] - 800680c: 659a str r2, [r3, #88] ; 0x58 + 8006a8a: 687b ldr r3, [r7, #4] + 8006a8c: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006a8e: 2204 movs r2, #4 + 8006a90: 431a orrs r2, r3 + 8006a92: 687b ldr r3, [r7, #4] + 8006a94: 659a str r2, [r3, #88] ; 0x58 __HAL_UNLOCK(hadc); - 800680e: 687b ldr r3, [r7, #4] - 8006810: 2254 movs r2, #84 ; 0x54 - 8006812: 2100 movs r1, #0 - 8006814: 5499 strb r1, [r3, r2] + 8006a96: 687b ldr r3, [r7, #4] + 8006a98: 2254 movs r2, #84 ; 0x54 + 8006a9a: 2100 movs r1, #0 + 8006a9c: 5499 strb r1, [r3, r2] return HAL_TIMEOUT; - 8006816: 2303 movs r3, #3 - 8006818: e04b b.n 80068b2 + 8006a9e: 2303 movs r3, #3 + 8006aa0: e04b b.n 8006b3a while ((hadc->Instance->ISR & tmp_flag_end) == 0UL) - 800681a: 687b ldr r3, [r7, #4] - 800681c: 681b ldr r3, [r3, #0] - 800681e: 681b ldr r3, [r3, #0] - 8006820: 68fa ldr r2, [r7, #12] - 8006822: 4013 ands r3, r2 - 8006824: d0d9 beq.n 80067da + 8006aa2: 687b ldr r3, [r7, #4] + 8006aa4: 681b ldr r3, [r3, #0] + 8006aa6: 681b ldr r3, [r3, #0] + 8006aa8: 68fa ldr r2, [r7, #12] + 8006aaa: 4013 ands r3, r2 + 8006aac: d0d9 beq.n 8006a62 } } } /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 8006826: 687b ldr r3, [r7, #4] - 8006828: 6d9b ldr r3, [r3, #88] ; 0x58 - 800682a: 2280 movs r2, #128 ; 0x80 - 800682c: 0092 lsls r2, r2, #2 - 800682e: 431a orrs r2, r3 - 8006830: 687b ldr r3, [r7, #4] - 8006832: 659a str r2, [r3, #88] ; 0x58 + 8006aae: 687b ldr r3, [r7, #4] + 8006ab0: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006ab2: 2280 movs r2, #128 ; 0x80 + 8006ab4: 0092 lsls r2, r2, #2 + 8006ab6: 431a orrs r2, r3 + 8006ab8: 687b ldr r3, [r7, #4] + 8006aba: 659a str r2, [r3, #88] ; 0x58 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ if ((LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance) != 0UL) - 8006834: 687b ldr r3, [r7, #4] - 8006836: 681b ldr r3, [r3, #0] - 8006838: 0018 movs r0, r3 - 800683a: f7ff fc66 bl 800610a - 800683e: 1e03 subs r3, r0, #0 - 8006840: d02e beq.n 80068a0 + 8006abc: 687b ldr r3, [r7, #4] + 8006abe: 681b ldr r3, [r3, #0] + 8006ac0: 0018 movs r0, r3 + 8006ac2: f7ff fc66 bl 8006392 + 8006ac6: 1e03 subs r3, r0, #0 + 8006ac8: d02e beq.n 8006b28 && (hadc->Init.ContinuousConvMode == DISABLE) - 8006842: 687b ldr r3, [r7, #4] - 8006844: 7e9b ldrb r3, [r3, #26] - 8006846: 2b00 cmp r3, #0 - 8006848: d12a bne.n 80068a0 + 8006aca: 687b ldr r3, [r7, #4] + 8006acc: 7e9b ldrb r3, [r3, #26] + 8006ace: 2b00 cmp r3, #0 + 8006ad0: d12a bne.n 8006b28 ) { /* Check whether end of sequence is reached */ if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS)) - 800684a: 687b ldr r3, [r7, #4] - 800684c: 681b ldr r3, [r3, #0] - 800684e: 681b ldr r3, [r3, #0] - 8006850: 2208 movs r2, #8 - 8006852: 4013 ands r3, r2 - 8006854: 2b08 cmp r3, #8 - 8006856: d123 bne.n 80068a0 + 8006ad2: 687b ldr r3, [r7, #4] + 8006ad4: 681b ldr r3, [r3, #0] + 8006ad6: 681b ldr r3, [r3, #0] + 8006ad8: 2208 movs r2, #8 + 8006ada: 4013 ands r3, r2 + 8006adc: 2b08 cmp r3, #8 + 8006ade: d123 bne.n 8006b28 { /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ /* ADSTART==0 (no conversion on going) */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) - 8006858: 687b ldr r3, [r7, #4] - 800685a: 681b ldr r3, [r3, #0] - 800685c: 0018 movs r0, r3 - 800685e: f7ff fd57 bl 8006310 - 8006862: 1e03 subs r3, r0, #0 - 8006864: d110 bne.n 8006888 + 8006ae0: 687b ldr r3, [r7, #4] + 8006ae2: 681b ldr r3, [r3, #0] + 8006ae4: 0018 movs r0, r3 + 8006ae6: f7ff fd57 bl 8006598 + 8006aea: 1e03 subs r3, r0, #0 + 8006aec: d110 bne.n 8006b10 { /* Disable ADC end of single conversion interrupt on group regular */ /* Note: Overrun interrupt was enabled with EOC interrupt in */ /* HAL_Start_IT(), but is not disabled here because can be used */ /* by overrun IRQ process below. */ __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); - 8006866: 687b ldr r3, [r7, #4] - 8006868: 681b ldr r3, [r3, #0] - 800686a: 685a ldr r2, [r3, #4] - 800686c: 687b ldr r3, [r7, #4] - 800686e: 681b ldr r3, [r3, #0] - 8006870: 210c movs r1, #12 - 8006872: 438a bics r2, r1 - 8006874: 605a str r2, [r3, #4] + 8006aee: 687b ldr r3, [r7, #4] + 8006af0: 681b ldr r3, [r3, #0] + 8006af2: 685a ldr r2, [r3, #4] + 8006af4: 687b ldr r3, [r7, #4] + 8006af6: 681b ldr r3, [r3, #0] + 8006af8: 210c movs r1, #12 + 8006afa: 438a bics r2, r1 + 8006afc: 605a str r2, [r3, #4] /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8006876: 687b ldr r3, [r7, #4] - 8006878: 6d9b ldr r3, [r3, #88] ; 0x58 - 800687a: 4a10 ldr r2, [pc, #64] ; (80068bc ) - 800687c: 4013 ands r3, r2 - 800687e: 2201 movs r2, #1 - 8006880: 431a orrs r2, r3 - 8006882: 687b ldr r3, [r7, #4] - 8006884: 659a str r2, [r3, #88] ; 0x58 - 8006886: e00b b.n 80068a0 + 8006afe: 687b ldr r3, [r7, #4] + 8006b00: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006b02: 4a10 ldr r2, [pc, #64] ; (8006b44 ) + 8006b04: 4013 ands r3, r2 + 8006b06: 2201 movs r2, #1 + 8006b08: 431a orrs r2, r3 + 8006b0a: 687b ldr r3, [r7, #4] + 8006b0c: 659a str r2, [r3, #88] ; 0x58 + 8006b0e: e00b b.n 8006b28 HAL_ADC_STATE_READY); } else { /* Change ADC state to error state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8006888: 687b ldr r3, [r7, #4] - 800688a: 6d9b ldr r3, [r3, #88] ; 0x58 - 800688c: 2220 movs r2, #32 - 800688e: 431a orrs r2, r3 - 8006890: 687b ldr r3, [r7, #4] - 8006892: 659a str r2, [r3, #88] ; 0x58 + 8006b10: 687b ldr r3, [r7, #4] + 8006b12: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006b14: 2220 movs r2, #32 + 8006b16: 431a orrs r2, r3 + 8006b18: 687b ldr r3, [r7, #4] + 8006b1a: 659a str r2, [r3, #88] ; 0x58 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8006894: 687b ldr r3, [r7, #4] - 8006896: 6ddb ldr r3, [r3, #92] ; 0x5c - 8006898: 2201 movs r2, #1 - 800689a: 431a orrs r2, r3 - 800689c: 687b ldr r3, [r7, #4] - 800689e: 65da str r2, [r3, #92] ; 0x5c + 8006b1c: 687b ldr r3, [r7, #4] + 8006b1e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8006b20: 2201 movs r2, #1 + 8006b22: 431a orrs r2, r3 + 8006b24: 687b ldr r3, [r7, #4] + 8006b26: 65da str r2, [r3, #92] ; 0x5c } /* Clear end of conversion flag of regular group if low power feature */ /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ /* until data register is read using function HAL_ADC_GetValue(). */ if (hadc->Init.LowPowerAutoWait == DISABLE) - 80068a0: 687b ldr r3, [r7, #4] - 80068a2: 7e1b ldrb r3, [r3, #24] - 80068a4: 2b00 cmp r3, #0 - 80068a6: d103 bne.n 80068b0 + 8006b28: 687b ldr r3, [r7, #4] + 8006b2a: 7e1b ldrb r3, [r3, #24] + 8006b2c: 2b00 cmp r3, #0 + 8006b2e: d103 bne.n 8006b38 { /* Clear regular group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); - 80068a8: 687b ldr r3, [r7, #4] - 80068aa: 681b ldr r3, [r3, #0] - 80068ac: 220c movs r2, #12 - 80068ae: 601a str r2, [r3, #0] + 8006b30: 687b ldr r3, [r7, #4] + 8006b32: 681b ldr r3, [r3, #0] + 8006b34: 220c movs r2, #12 + 8006b36: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; - 80068b0: 2300 movs r3, #0 + 8006b38: 2300 movs r3, #0 } - 80068b2: 0018 movs r0, r3 - 80068b4: 46bd mov sp, r7 - 80068b6: b004 add sp, #16 - 80068b8: bd80 pop {r7, pc} - 80068ba: 46c0 nop ; (mov r8, r8) - 80068bc: fffffefe .word 0xfffffefe + 8006b3a: 0018 movs r0, r3 + 8006b3c: 46bd mov sp, r7 + 8006b3e: b004 add sp, #16 + 8006b40: bd80 pop {r7, pc} + 8006b42: 46c0 nop ; (mov r8, r8) + 8006b44: fffffefe .word 0xfffffefe -080068c0 : +08006b48 : * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). * @param hadc ADC handle * @retval ADC group regular conversion data */ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc) { - 80068c0: b580 push {r7, lr} - 80068c2: b082 sub sp, #8 - 80068c4: af00 add r7, sp, #0 - 80068c6: 6078 str r0, [r7, #4] + 8006b48: b580 push {r7, lr} + 8006b4a: b082 sub sp, #8 + 8006b4c: af00 add r7, sp, #0 + 8006b4e: 6078 str r0, [r7, #4] /* Note: EOC flag is not cleared here by software because automatically */ /* cleared by hardware when reading register DR. */ /* Return ADC converted value */ return hadc->Instance->DR; - 80068c8: 687b ldr r3, [r7, #4] - 80068ca: 681b ldr r3, [r3, #0] - 80068cc: 6c1b ldr r3, [r3, #64] ; 0x40 + 8006b50: 687b ldr r3, [r7, #4] + 8006b52: 681b ldr r3, [r3, #0] + 8006b54: 6c1b ldr r3, [r3, #64] ; 0x40 } - 80068ce: 0018 movs r0, r3 - 80068d0: 46bd mov sp, r7 - 80068d2: b002 add sp, #8 - 80068d4: bd80 pop {r7, pc} + 8006b56: 0018 movs r0, r3 + 8006b58: 46bd mov sp, r7 + 8006b5a: b002 add sp, #8 + 8006b5c: bd80 pop {r7, pc} ... -080068d8 : +08006b60 : * @param hadc ADC handle * @param pConfig Structure of ADC channel assigned to ADC group regular. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *pConfig) { - 80068d8: b580 push {r7, lr} - 80068da: b086 sub sp, #24 - 80068dc: af00 add r7, sp, #0 - 80068de: 6078 str r0, [r7, #4] - 80068e0: 6039 str r1, [r7, #0] + 8006b60: b580 push {r7, lr} + 8006b62: b086 sub sp, #24 + 8006b64: af00 add r7, sp, #0 + 8006b66: 6078 str r0, [r7, #4] + 8006b68: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80068e2: 2317 movs r3, #23 - 80068e4: 18fb adds r3, r7, r3 - 80068e6: 2200 movs r2, #0 - 80068e8: 701a strb r2, [r3, #0] + 8006b6a: 2317 movs r3, #23 + 8006b6c: 18fb adds r3, r7, r3 + 8006b6e: 2200 movs r2, #0 + 8006b70: 701a strb r2, [r3, #0] uint32_t tmp_config_internal_channel; __IO uint32_t wait_loop_index = 0UL; - 80068ea: 2300 movs r3, #0 - 80068ec: 60fb str r3, [r7, #12] + 8006b72: 2300 movs r3, #0 + 8006b74: 60fb str r3, [r7, #12] assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion)); assert_param(IS_ADC_REGULAR_RANK(pConfig->Rank)); } __HAL_LOCK(hadc); - 80068ee: 687b ldr r3, [r7, #4] - 80068f0: 2254 movs r2, #84 ; 0x54 - 80068f2: 5c9b ldrb r3, [r3, r2] - 80068f4: 2b01 cmp r3, #1 - 80068f6: d101 bne.n 80068fc - 80068f8: 2302 movs r3, #2 - 80068fa: e1c0 b.n 8006c7e - 80068fc: 687b ldr r3, [r7, #4] - 80068fe: 2254 movs r2, #84 ; 0x54 - 8006900: 2101 movs r1, #1 - 8006902: 5499 strb r1, [r3, r2] + 8006b76: 687b ldr r3, [r7, #4] + 8006b78: 2254 movs r2, #84 ; 0x54 + 8006b7a: 5c9b ldrb r3, [r3, r2] + 8006b7c: 2b01 cmp r3, #1 + 8006b7e: d101 bne.n 8006b84 + 8006b80: 2302 movs r3, #2 + 8006b82: e1c0 b.n 8006f06 + 8006b84: 687b ldr r3, [r7, #4] + 8006b86: 2254 movs r2, #84 ; 0x54 + 8006b88: 2101 movs r1, #1 + 8006b8a: 5499 strb r1, [r3, r2] /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular group: */ /* - Channel number */ /* - Channel sampling time */ /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) - 8006904: 687b ldr r3, [r7, #4] - 8006906: 681b ldr r3, [r3, #0] - 8006908: 0018 movs r0, r3 - 800690a: f7ff fd01 bl 8006310 - 800690e: 1e03 subs r3, r0, #0 - 8006910: d000 beq.n 8006914 - 8006912: e1a3 b.n 8006c5c + 8006b8c: 687b ldr r3, [r7, #4] + 8006b8e: 681b ldr r3, [r3, #0] + 8006b90: 0018 movs r0, r3 + 8006b92: f7ff fd01 bl 8006598 + 8006b96: 1e03 subs r3, r0, #0 + 8006b98: d000 beq.n 8006b9c + 8006b9a: e1a3 b.n 8006ee4 /* If sequencer set to not fully configurable with channel rank set to */ /* none, remove the channel from the sequencer. */ /* Otherwise (sequencer set to fully configurable or to to not fully */ /* configurable with channel rank to be set), configure the selected */ /* channel. */ if (pConfig->Rank != ADC_RANK_NONE) - 8006914: 683b ldr r3, [r7, #0] - 8006916: 685b ldr r3, [r3, #4] - 8006918: 2b02 cmp r3, #2 - 800691a: d100 bne.n 800691e - 800691c: e143 b.n 8006ba6 + 8006b9c: 683b ldr r3, [r7, #0] + 8006b9e: 685b ldr r3, [r3, #4] + 8006ba0: 2b02 cmp r3, #2 + 8006ba2: d100 bne.n 8006ba6 + 8006ba4: e143 b.n 8006e2e /* Note: ADC channel configuration requires few ADC clock cycles */ /* to be ready. Processing of ADC settings in this function */ /* induce that a specific wait time is not necessary. */ /* For more details on ADC channel configuration ready, */ /* refer to function "LL_ADC_IsActiveFlag_CCRDY()". */ if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || - 800691e: 687b ldr r3, [r7, #4] - 8006920: 691a ldr r2, [r3, #16] - 8006922: 2380 movs r3, #128 ; 0x80 - 8006924: 061b lsls r3, r3, #24 - 8006926: 429a cmp r2, r3 - 8006928: d004 beq.n 8006934 - (hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED_BACKWARD)) - 800692a: 687b ldr r3, [r7, #4] - 800692c: 691b ldr r3, [r3, #16] - if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || - 800692e: 4ac1 ldr r2, [pc, #772] ; (8006c34 ) - 8006930: 4293 cmp r3, r2 - 8006932: d108 bne.n 8006946 - { - /* Sequencer set to not fully configurable: */ - /* Set the channel by enabling the corresponding bitfield. */ - LL_ADC_REG_SetSequencerChAdd(hadc->Instance, pConfig->Channel); - 8006934: 687b ldr r3, [r7, #4] - 8006936: 681a ldr r2, [r3, #0] - 8006938: 683b ldr r3, [r7, #0] - 800693a: 681b ldr r3, [r3, #0] - 800693c: 0019 movs r1, r3 - 800693e: 0010 movs r0, r2 - 8006940: f7ff fc14 bl 800616c - 8006944: e0c9 b.n 8006ada - { - /* Sequencer set to fully configurable: */ - /* Set the channel by entering it into the selected rank. */ - - /* Memorize the channel set into variable in HAL ADC handle */ - MODIFY_REG(hadc->ADCGroupRegularSequencerRanks, - 8006946: 687b ldr r3, [r7, #4] - 8006948: 6e1a ldr r2, [r3, #96] ; 0x60 - 800694a: 683b ldr r3, [r7, #0] - 800694c: 685b ldr r3, [r3, #4] - 800694e: 211f movs r1, #31 - 8006950: 400b ands r3, r1 - 8006952: 210f movs r1, #15 - 8006954: 4099 lsls r1, r3 - 8006956: 000b movs r3, r1 - 8006958: 43db mvns r3, r3 - 800695a: 4013 ands r3, r2 - 800695c: 0019 movs r1, r3 - 800695e: 683b ldr r3, [r7, #0] - 8006960: 681b ldr r3, [r3, #0] - 8006962: 035b lsls r3, r3, #13 - 8006964: 0b5b lsrs r3, r3, #13 - 8006966: d105 bne.n 8006974 - 8006968: 683b ldr r3, [r7, #0] - 800696a: 681b ldr r3, [r3, #0] - 800696c: 0e9b lsrs r3, r3, #26 - 800696e: 221f movs r2, #31 - 8006970: 4013 ands r3, r2 - 8006972: e098 b.n 8006aa6 - 8006974: 683b ldr r3, [r7, #0] - 8006976: 681b ldr r3, [r3, #0] - 8006978: 2201 movs r2, #1 - 800697a: 4013 ands r3, r2 - 800697c: d000 beq.n 8006980 - 800697e: e091 b.n 8006aa4 - 8006980: 683b ldr r3, [r7, #0] - 8006982: 681b ldr r3, [r3, #0] - 8006984: 2202 movs r2, #2 - 8006986: 4013 ands r3, r2 - 8006988: d000 beq.n 800698c - 800698a: e089 b.n 8006aa0 - 800698c: 683b ldr r3, [r7, #0] - 800698e: 681b ldr r3, [r3, #0] - 8006990: 2204 movs r2, #4 - 8006992: 4013 ands r3, r2 - 8006994: d000 beq.n 8006998 - 8006996: e081 b.n 8006a9c - 8006998: 683b ldr r3, [r7, #0] - 800699a: 681b ldr r3, [r3, #0] - 800699c: 2208 movs r2, #8 - 800699e: 4013 ands r3, r2 - 80069a0: d000 beq.n 80069a4 - 80069a2: e079 b.n 8006a98 - 80069a4: 683b ldr r3, [r7, #0] - 80069a6: 681b ldr r3, [r3, #0] - 80069a8: 2210 movs r2, #16 - 80069aa: 4013 ands r3, r2 - 80069ac: d000 beq.n 80069b0 - 80069ae: e071 b.n 8006a94 - 80069b0: 683b ldr r3, [r7, #0] - 80069b2: 681b ldr r3, [r3, #0] - 80069b4: 2220 movs r2, #32 - 80069b6: 4013 ands r3, r2 - 80069b8: d000 beq.n 80069bc - 80069ba: e069 b.n 8006a90 - 80069bc: 683b ldr r3, [r7, #0] - 80069be: 681b ldr r3, [r3, #0] - 80069c0: 2240 movs r2, #64 ; 0x40 - 80069c2: 4013 ands r3, r2 - 80069c4: d000 beq.n 80069c8 - 80069c6: e061 b.n 8006a8c - 80069c8: 683b ldr r3, [r7, #0] - 80069ca: 681b ldr r3, [r3, #0] - 80069cc: 2280 movs r2, #128 ; 0x80 - 80069ce: 4013 ands r3, r2 - 80069d0: d000 beq.n 80069d4 - 80069d2: e059 b.n 8006a88 - 80069d4: 683b ldr r3, [r7, #0] - 80069d6: 681a ldr r2, [r3, #0] - 80069d8: 2380 movs r3, #128 ; 0x80 - 80069da: 005b lsls r3, r3, #1 - 80069dc: 4013 ands r3, r2 - 80069de: d151 bne.n 8006a84 - 80069e0: 683b ldr r3, [r7, #0] - 80069e2: 681a ldr r2, [r3, #0] - 80069e4: 2380 movs r3, #128 ; 0x80 - 80069e6: 009b lsls r3, r3, #2 - 80069e8: 4013 ands r3, r2 - 80069ea: d149 bne.n 8006a80 - 80069ec: 683b ldr r3, [r7, #0] - 80069ee: 681a ldr r2, [r3, #0] - 80069f0: 2380 movs r3, #128 ; 0x80 - 80069f2: 00db lsls r3, r3, #3 - 80069f4: 4013 ands r3, r2 - 80069f6: d141 bne.n 8006a7c - 80069f8: 683b ldr r3, [r7, #0] - 80069fa: 681a ldr r2, [r3, #0] - 80069fc: 2380 movs r3, #128 ; 0x80 - 80069fe: 011b lsls r3, r3, #4 - 8006a00: 4013 ands r3, r2 - 8006a02: d139 bne.n 8006a78 - 8006a04: 683b ldr r3, [r7, #0] - 8006a06: 681a ldr r2, [r3, #0] - 8006a08: 2380 movs r3, #128 ; 0x80 - 8006a0a: 015b lsls r3, r3, #5 - 8006a0c: 4013 ands r3, r2 - 8006a0e: d131 bne.n 8006a74 - 8006a10: 683b ldr r3, [r7, #0] - 8006a12: 681a ldr r2, [r3, #0] - 8006a14: 2380 movs r3, #128 ; 0x80 - 8006a16: 019b lsls r3, r3, #6 - 8006a18: 4013 ands r3, r2 - 8006a1a: d129 bne.n 8006a70 - 8006a1c: 683b ldr r3, [r7, #0] - 8006a1e: 681a ldr r2, [r3, #0] - 8006a20: 2380 movs r3, #128 ; 0x80 - 8006a22: 01db lsls r3, r3, #7 - 8006a24: 4013 ands r3, r2 - 8006a26: d121 bne.n 8006a6c - 8006a28: 683b ldr r3, [r7, #0] - 8006a2a: 681a ldr r2, [r3, #0] - 8006a2c: 2380 movs r3, #128 ; 0x80 - 8006a2e: 021b lsls r3, r3, #8 - 8006a30: 4013 ands r3, r2 - 8006a32: d119 bne.n 8006a68 - 8006a34: 683b ldr r3, [r7, #0] - 8006a36: 681a ldr r2, [r3, #0] - 8006a38: 2380 movs r3, #128 ; 0x80 - 8006a3a: 025b lsls r3, r3, #9 - 8006a3c: 4013 ands r3, r2 - 8006a3e: d111 bne.n 8006a64 - 8006a40: 683b ldr r3, [r7, #0] - 8006a42: 681a ldr r2, [r3, #0] - 8006a44: 2380 movs r3, #128 ; 0x80 - 8006a46: 029b lsls r3, r3, #10 - 8006a48: 4013 ands r3, r2 - 8006a4a: d109 bne.n 8006a60 - 8006a4c: 683b ldr r3, [r7, #0] - 8006a4e: 681a ldr r2, [r3, #0] - 8006a50: 2380 movs r3, #128 ; 0x80 - 8006a52: 02db lsls r3, r3, #11 - 8006a54: 4013 ands r3, r2 - 8006a56: d001 beq.n 8006a5c - 8006a58: 2312 movs r3, #18 - 8006a5a: e024 b.n 8006aa6 - 8006a5c: 2300 movs r3, #0 - 8006a5e: e022 b.n 8006aa6 - 8006a60: 2311 movs r3, #17 - 8006a62: e020 b.n 8006aa6 - 8006a64: 2310 movs r3, #16 - 8006a66: e01e b.n 8006aa6 - 8006a68: 230f movs r3, #15 - 8006a6a: e01c b.n 8006aa6 - 8006a6c: 230e movs r3, #14 - 8006a6e: e01a b.n 8006aa6 - 8006a70: 230d movs r3, #13 - 8006a72: e018 b.n 8006aa6 - 8006a74: 230c movs r3, #12 - 8006a76: e016 b.n 8006aa6 - 8006a78: 230b movs r3, #11 - 8006a7a: e014 b.n 8006aa6 - 8006a7c: 230a movs r3, #10 - 8006a7e: e012 b.n 8006aa6 - 8006a80: 2309 movs r3, #9 - 8006a82: e010 b.n 8006aa6 - 8006a84: 2308 movs r3, #8 - 8006a86: e00e b.n 8006aa6 - 8006a88: 2307 movs r3, #7 - 8006a8a: e00c b.n 8006aa6 - 8006a8c: 2306 movs r3, #6 - 8006a8e: e00a b.n 8006aa6 - 8006a90: 2305 movs r3, #5 - 8006a92: e008 b.n 8006aa6 - 8006a94: 2304 movs r3, #4 - 8006a96: e006 b.n 8006aa6 - 8006a98: 2303 movs r3, #3 - 8006a9a: e004 b.n 8006aa6 - 8006a9c: 2302 movs r3, #2 - 8006a9e: e002 b.n 8006aa6 - 8006aa0: 2301 movs r3, #1 - 8006aa2: e000 b.n 8006aa6 - 8006aa4: 2300 movs r3, #0 - 8006aa6: 683a ldr r2, [r7, #0] - 8006aa8: 6852 ldr r2, [r2, #4] - 8006aaa: 201f movs r0, #31 - 8006aac: 4002 ands r2, r0 - 8006aae: 4093 lsls r3, r2 - 8006ab0: 000a movs r2, r1 - 8006ab2: 431a orrs r2, r3 - 8006ab4: 687b ldr r3, [r7, #4] - 8006ab6: 661a str r2, [r3, #96] ; 0x60 - - /* If the selected rank is below ADC group regular sequencer length, */ - /* apply the configuration in ADC register. */ - /* Note: Otherwise, configuration is not applied. */ - /* To apply it, parameter'NbrOfConversion' must be increased. */ - if (((pConfig->Rank >> 2UL) + 1UL) <= hadc->Init.NbrOfConversion) - 8006ab8: 683b ldr r3, [r7, #0] - 8006aba: 685b ldr r3, [r3, #4] - 8006abc: 089b lsrs r3, r3, #2 - 8006abe: 1c5a adds r2, r3, #1 - 8006ac0: 687b ldr r3, [r7, #4] - 8006ac2: 69db ldr r3, [r3, #28] - 8006ac4: 429a cmp r2, r3 - 8006ac6: d808 bhi.n 8006ada - { - LL_ADC_REG_SetSequencerRanks(hadc->Instance, pConfig->Rank, pConfig->Channel); - 8006ac8: 687b ldr r3, [r7, #4] - 8006aca: 6818 ldr r0, [r3, #0] - 8006acc: 683b ldr r3, [r7, #0] - 8006ace: 6859 ldr r1, [r3, #4] - 8006ad0: 683b ldr r3, [r7, #0] - 8006ad2: 681b ldr r3, [r3, #0] - 8006ad4: 001a movs r2, r3 - 8006ad6: f7ff fb29 bl 800612c - } - } - - /* Set sampling time of the selected ADC channel */ - LL_ADC_SetChannelSamplingTime(hadc->Instance, pConfig->Channel, pConfig->SamplingTime); - 8006ada: 687b ldr r3, [r7, #4] - 8006adc: 6818 ldr r0, [r3, #0] - 8006ade: 683b ldr r3, [r7, #0] - 8006ae0: 6819 ldr r1, [r3, #0] - 8006ae2: 683b ldr r3, [r7, #0] - 8006ae4: 689b ldr r3, [r3, #8] - 8006ae6: 001a movs r2, r3 - 8006ae8: f7ff fb64 bl 80061b4 - /* internal measurement paths enable: If internal channel selected, */ - /* enable dedicated internal buffers and path. */ - /* Note: these internal measurement paths can be disabled using */ - /* HAL_ADC_DeInit() or removing the channel from sequencer with */ - /* channel configuration parameter "Rank". */ - if (__LL_ADC_IS_CHANNEL_INTERNAL(pConfig->Channel)) - 8006aec: 683b ldr r3, [r7, #0] - 8006aee: 681b ldr r3, [r3, #0] - 8006af0: 2b00 cmp r3, #0 - 8006af2: db00 blt.n 8006af6 - 8006af4: e0bc b.n 8006c70 - { - tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 8006af6: 4b50 ldr r3, [pc, #320] ; (8006c38 ) - 8006af8: 0018 movs r0, r3 - 8006afa: f7ff fac5 bl 8006088 - 8006afe: 0003 movs r3, r0 - 8006b00: 613b str r3, [r7, #16] - - /* If the requested internal measurement path has already been enabled, */ - /* bypass the configuration processing. */ - if ((pConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && - 8006b02: 683b ldr r3, [r7, #0] - 8006b04: 681b ldr r3, [r3, #0] - 8006b06: 4a4d ldr r2, [pc, #308] ; (8006c3c ) - 8006b08: 4293 cmp r3, r2 - 8006b0a: d122 bne.n 8006b52 - ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) - 8006b0c: 693a ldr r2, [r7, #16] - 8006b0e: 2380 movs r3, #128 ; 0x80 - 8006b10: 041b lsls r3, r3, #16 - 8006b12: 4013 ands r3, r2 - if ((pConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && - 8006b14: d11d bne.n 8006b52 - { - LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), - 8006b16: 693b ldr r3, [r7, #16] - 8006b18: 2280 movs r2, #128 ; 0x80 - 8006b1a: 0412 lsls r2, r2, #16 - 8006b1c: 4313 orrs r3, r2 - 8006b1e: 4a46 ldr r2, [pc, #280] ; (8006c38 ) - 8006b20: 0019 movs r1, r3 - 8006b22: 0010 movs r0, r2 - 8006b24: f7ff fa9c bl 8006060 - /* Delay for temperature sensor stabilization time */ - /* Wait loop initialization and execution */ - /* Note: Variable divided by 2 to compensate partially */ - /* CPU processing cycles, scaling in us split to not */ - /* exceed 32 bits register capacity and handle low frequency. */ - wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); - 8006b28: 4b45 ldr r3, [pc, #276] ; (8006c40 ) - 8006b2a: 681b ldr r3, [r3, #0] - 8006b2c: 4945 ldr r1, [pc, #276] ; (8006c44 ) - 8006b2e: 0018 movs r0, r3 - 8006b30: f7f9 fafc bl 800012c <__udivsi3> - 8006b34: 0003 movs r3, r0 - 8006b36: 1c5a adds r2, r3, #1 - 8006b38: 0013 movs r3, r2 - 8006b3a: 005b lsls r3, r3, #1 - 8006b3c: 189b adds r3, r3, r2 - 8006b3e: 009b lsls r3, r3, #2 - 8006b40: 60fb str r3, [r7, #12] - while (wait_loop_index != 0UL) - 8006b42: e002 b.n 8006b4a - { - wait_loop_index--; - 8006b44: 68fb ldr r3, [r7, #12] - 8006b46: 3b01 subs r3, #1 - 8006b48: 60fb str r3, [r7, #12] - while (wait_loop_index != 0UL) - 8006b4a: 68fb ldr r3, [r7, #12] - 8006b4c: 2b00 cmp r3, #0 - 8006b4e: d1f9 bne.n 8006b44 - if ((pConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && - 8006b50: e08e b.n 8006c70 - } - } - else if ((pConfig->Channel == ADC_CHANNEL_VBAT) - 8006b52: 683b ldr r3, [r7, #0] - 8006b54: 681b ldr r3, [r3, #0] - 8006b56: 4a3c ldr r2, [pc, #240] ; (8006c48 ) - 8006b58: 4293 cmp r3, r2 - 8006b5a: d10e bne.n 8006b7a - && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL)) - 8006b5c: 693a ldr r2, [r7, #16] - 8006b5e: 2380 movs r3, #128 ; 0x80 - 8006b60: 045b lsls r3, r3, #17 - 8006b62: 4013 ands r3, r2 - 8006b64: d109 bne.n 8006b7a - { - LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), - 8006b66: 693b ldr r3, [r7, #16] - 8006b68: 2280 movs r2, #128 ; 0x80 - 8006b6a: 0452 lsls r2, r2, #17 - 8006b6c: 4313 orrs r3, r2 - 8006b6e: 4a32 ldr r2, [pc, #200] ; (8006c38 ) - 8006b70: 0019 movs r1, r3 - 8006b72: 0010 movs r0, r2 - 8006b74: f7ff fa74 bl 8006060 - 8006b78: e07a b.n 8006c70 - LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); - } - else if ((pConfig->Channel == ADC_CHANNEL_VREFINT) && - 8006b7a: 683b ldr r3, [r7, #0] - 8006b7c: 681b ldr r3, [r3, #0] - 8006b7e: 4a33 ldr r2, [pc, #204] ; (8006c4c ) - 8006b80: 4293 cmp r3, r2 - 8006b82: d000 beq.n 8006b86 - 8006b84: e074 b.n 8006c70 - ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) - 8006b86: 693a ldr r2, [r7, #16] - 8006b88: 2380 movs r3, #128 ; 0x80 - 8006b8a: 03db lsls r3, r3, #15 - 8006b8c: 4013 ands r3, r2 - else if ((pConfig->Channel == ADC_CHANNEL_VREFINT) && - 8006b8e: d000 beq.n 8006b92 - 8006b90: e06e b.n 8006c70 - { - LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), - 8006b92: 693b ldr r3, [r7, #16] - 8006b94: 2280 movs r2, #128 ; 0x80 - 8006b96: 03d2 lsls r2, r2, #15 - 8006b98: 4313 orrs r3, r2 - 8006b9a: 4a27 ldr r2, [pc, #156] ; (8006c38 ) - 8006b9c: 0019 movs r1, r3 - 8006b9e: 0010 movs r0, r2 - 8006ba0: f7ff fa5e bl 8006060 - 8006ba4: e064 b.n 8006c70 - /* Regular sequencer configuration */ - /* Note: Case of sequencer set to fully configurable: */ - /* Sequencer rank cannot be disabled, only affected to */ - /* another channel. */ - /* To remove a rank, use parameter 'NbrOfConversion". */ - if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || 8006ba6: 687b ldr r3, [r7, #4] 8006ba8: 691a ldr r2, [r3, #16] 8006baa: 2380 movs r3, #128 ; 0x80 8006bac: 061b lsls r3, r3, #24 8006bae: 429a cmp r2, r3 - 8006bb0: d004 beq.n 8006bbc + 8006bb0: d004 beq.n 8006bbc (hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED_BACKWARD)) 8006bb2: 687b ldr r3, [r7, #4] 8006bb4: 691b ldr r3, [r3, #16] if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || - 8006bb6: 4a1f ldr r2, [pc, #124] ; (8006c34 ) + 8006bb6: 4ac1 ldr r2, [pc, #772] ; (8006ebc ) 8006bb8: 4293 cmp r3, r2 - 8006bba: d107 bne.n 8006bcc + 8006bba: d108 bne.n 8006bce { /* Sequencer set to not fully configurable: */ - /* Reset the channel by disabling the corresponding bitfield. */ - LL_ADC_REG_SetSequencerChRem(hadc->Instance, pConfig->Channel); + /* Set the channel by enabling the corresponding bitfield. */ + LL_ADC_REG_SetSequencerChAdd(hadc->Instance, pConfig->Channel); 8006bbc: 687b ldr r3, [r7, #4] 8006bbe: 681a ldr r2, [r3, #0] 8006bc0: 683b ldr r3, [r7, #0] 8006bc2: 681b ldr r3, [r3, #0] 8006bc4: 0019 movs r1, r3 8006bc6: 0010 movs r0, r2 - 8006bc8: f7ff fae1 bl 800618e + 8006bc8: f7ff fc14 bl 80063f4 + 8006bcc: e0c9 b.n 8006d62 + { + /* Sequencer set to fully configurable: */ + /* Set the channel by entering it into the selected rank. */ + + /* Memorize the channel set into variable in HAL ADC handle */ + MODIFY_REG(hadc->ADCGroupRegularSequencerRanks, + 8006bce: 687b ldr r3, [r7, #4] + 8006bd0: 6e1a ldr r2, [r3, #96] ; 0x60 + 8006bd2: 683b ldr r3, [r7, #0] + 8006bd4: 685b ldr r3, [r3, #4] + 8006bd6: 211f movs r1, #31 + 8006bd8: 400b ands r3, r1 + 8006bda: 210f movs r1, #15 + 8006bdc: 4099 lsls r1, r3 + 8006bde: 000b movs r3, r1 + 8006be0: 43db mvns r3, r3 + 8006be2: 4013 ands r3, r2 + 8006be4: 0019 movs r1, r3 + 8006be6: 683b ldr r3, [r7, #0] + 8006be8: 681b ldr r3, [r3, #0] + 8006bea: 035b lsls r3, r3, #13 + 8006bec: 0b5b lsrs r3, r3, #13 + 8006bee: d105 bne.n 8006bfc + 8006bf0: 683b ldr r3, [r7, #0] + 8006bf2: 681b ldr r3, [r3, #0] + 8006bf4: 0e9b lsrs r3, r3, #26 + 8006bf6: 221f movs r2, #31 + 8006bf8: 4013 ands r3, r2 + 8006bfa: e098 b.n 8006d2e + 8006bfc: 683b ldr r3, [r7, #0] + 8006bfe: 681b ldr r3, [r3, #0] + 8006c00: 2201 movs r2, #1 + 8006c02: 4013 ands r3, r2 + 8006c04: d000 beq.n 8006c08 + 8006c06: e091 b.n 8006d2c + 8006c08: 683b ldr r3, [r7, #0] + 8006c0a: 681b ldr r3, [r3, #0] + 8006c0c: 2202 movs r2, #2 + 8006c0e: 4013 ands r3, r2 + 8006c10: d000 beq.n 8006c14 + 8006c12: e089 b.n 8006d28 + 8006c14: 683b ldr r3, [r7, #0] + 8006c16: 681b ldr r3, [r3, #0] + 8006c18: 2204 movs r2, #4 + 8006c1a: 4013 ands r3, r2 + 8006c1c: d000 beq.n 8006c20 + 8006c1e: e081 b.n 8006d24 + 8006c20: 683b ldr r3, [r7, #0] + 8006c22: 681b ldr r3, [r3, #0] + 8006c24: 2208 movs r2, #8 + 8006c26: 4013 ands r3, r2 + 8006c28: d000 beq.n 8006c2c + 8006c2a: e079 b.n 8006d20 + 8006c2c: 683b ldr r3, [r7, #0] + 8006c2e: 681b ldr r3, [r3, #0] + 8006c30: 2210 movs r2, #16 + 8006c32: 4013 ands r3, r2 + 8006c34: d000 beq.n 8006c38 + 8006c36: e071 b.n 8006d1c + 8006c38: 683b ldr r3, [r7, #0] + 8006c3a: 681b ldr r3, [r3, #0] + 8006c3c: 2220 movs r2, #32 + 8006c3e: 4013 ands r3, r2 + 8006c40: d000 beq.n 8006c44 + 8006c42: e069 b.n 8006d18 + 8006c44: 683b ldr r3, [r7, #0] + 8006c46: 681b ldr r3, [r3, #0] + 8006c48: 2240 movs r2, #64 ; 0x40 + 8006c4a: 4013 ands r3, r2 + 8006c4c: d000 beq.n 8006c50 + 8006c4e: e061 b.n 8006d14 + 8006c50: 683b ldr r3, [r7, #0] + 8006c52: 681b ldr r3, [r3, #0] + 8006c54: 2280 movs r2, #128 ; 0x80 + 8006c56: 4013 ands r3, r2 + 8006c58: d000 beq.n 8006c5c + 8006c5a: e059 b.n 8006d10 + 8006c5c: 683b ldr r3, [r7, #0] + 8006c5e: 681a ldr r2, [r3, #0] + 8006c60: 2380 movs r3, #128 ; 0x80 + 8006c62: 005b lsls r3, r3, #1 + 8006c64: 4013 ands r3, r2 + 8006c66: d151 bne.n 8006d0c + 8006c68: 683b ldr r3, [r7, #0] + 8006c6a: 681a ldr r2, [r3, #0] + 8006c6c: 2380 movs r3, #128 ; 0x80 + 8006c6e: 009b lsls r3, r3, #2 + 8006c70: 4013 ands r3, r2 + 8006c72: d149 bne.n 8006d08 + 8006c74: 683b ldr r3, [r7, #0] + 8006c76: 681a ldr r2, [r3, #0] + 8006c78: 2380 movs r3, #128 ; 0x80 + 8006c7a: 00db lsls r3, r3, #3 + 8006c7c: 4013 ands r3, r2 + 8006c7e: d141 bne.n 8006d04 + 8006c80: 683b ldr r3, [r7, #0] + 8006c82: 681a ldr r2, [r3, #0] + 8006c84: 2380 movs r3, #128 ; 0x80 + 8006c86: 011b lsls r3, r3, #4 + 8006c88: 4013 ands r3, r2 + 8006c8a: d139 bne.n 8006d00 + 8006c8c: 683b ldr r3, [r7, #0] + 8006c8e: 681a ldr r2, [r3, #0] + 8006c90: 2380 movs r3, #128 ; 0x80 + 8006c92: 015b lsls r3, r3, #5 + 8006c94: 4013 ands r3, r2 + 8006c96: d131 bne.n 8006cfc + 8006c98: 683b ldr r3, [r7, #0] + 8006c9a: 681a ldr r2, [r3, #0] + 8006c9c: 2380 movs r3, #128 ; 0x80 + 8006c9e: 019b lsls r3, r3, #6 + 8006ca0: 4013 ands r3, r2 + 8006ca2: d129 bne.n 8006cf8 + 8006ca4: 683b ldr r3, [r7, #0] + 8006ca6: 681a ldr r2, [r3, #0] + 8006ca8: 2380 movs r3, #128 ; 0x80 + 8006caa: 01db lsls r3, r3, #7 + 8006cac: 4013 ands r3, r2 + 8006cae: d121 bne.n 8006cf4 + 8006cb0: 683b ldr r3, [r7, #0] + 8006cb2: 681a ldr r2, [r3, #0] + 8006cb4: 2380 movs r3, #128 ; 0x80 + 8006cb6: 021b lsls r3, r3, #8 + 8006cb8: 4013 ands r3, r2 + 8006cba: d119 bne.n 8006cf0 + 8006cbc: 683b ldr r3, [r7, #0] + 8006cbe: 681a ldr r2, [r3, #0] + 8006cc0: 2380 movs r3, #128 ; 0x80 + 8006cc2: 025b lsls r3, r3, #9 + 8006cc4: 4013 ands r3, r2 + 8006cc6: d111 bne.n 8006cec + 8006cc8: 683b ldr r3, [r7, #0] + 8006cca: 681a ldr r2, [r3, #0] + 8006ccc: 2380 movs r3, #128 ; 0x80 + 8006cce: 029b lsls r3, r3, #10 + 8006cd0: 4013 ands r3, r2 + 8006cd2: d109 bne.n 8006ce8 + 8006cd4: 683b ldr r3, [r7, #0] + 8006cd6: 681a ldr r2, [r3, #0] + 8006cd8: 2380 movs r3, #128 ; 0x80 + 8006cda: 02db lsls r3, r3, #11 + 8006cdc: 4013 ands r3, r2 + 8006cde: d001 beq.n 8006ce4 + 8006ce0: 2312 movs r3, #18 + 8006ce2: e024 b.n 8006d2e + 8006ce4: 2300 movs r3, #0 + 8006ce6: e022 b.n 8006d2e + 8006ce8: 2311 movs r3, #17 + 8006cea: e020 b.n 8006d2e + 8006cec: 2310 movs r3, #16 + 8006cee: e01e b.n 8006d2e + 8006cf0: 230f movs r3, #15 + 8006cf2: e01c b.n 8006d2e + 8006cf4: 230e movs r3, #14 + 8006cf6: e01a b.n 8006d2e + 8006cf8: 230d movs r3, #13 + 8006cfa: e018 b.n 8006d2e + 8006cfc: 230c movs r3, #12 + 8006cfe: e016 b.n 8006d2e + 8006d00: 230b movs r3, #11 + 8006d02: e014 b.n 8006d2e + 8006d04: 230a movs r3, #10 + 8006d06: e012 b.n 8006d2e + 8006d08: 2309 movs r3, #9 + 8006d0a: e010 b.n 8006d2e + 8006d0c: 2308 movs r3, #8 + 8006d0e: e00e b.n 8006d2e + 8006d10: 2307 movs r3, #7 + 8006d12: e00c b.n 8006d2e + 8006d14: 2306 movs r3, #6 + 8006d16: e00a b.n 8006d2e + 8006d18: 2305 movs r3, #5 + 8006d1a: e008 b.n 8006d2e + 8006d1c: 2304 movs r3, #4 + 8006d1e: e006 b.n 8006d2e + 8006d20: 2303 movs r3, #3 + 8006d22: e004 b.n 8006d2e + 8006d24: 2302 movs r3, #2 + 8006d26: e002 b.n 8006d2e + 8006d28: 2301 movs r3, #1 + 8006d2a: e000 b.n 8006d2e + 8006d2c: 2300 movs r3, #0 + 8006d2e: 683a ldr r2, [r7, #0] + 8006d30: 6852 ldr r2, [r2, #4] + 8006d32: 201f movs r0, #31 + 8006d34: 4002 ands r2, r0 + 8006d36: 4093 lsls r3, r2 + 8006d38: 000a movs r2, r1 + 8006d3a: 431a orrs r2, r3 + 8006d3c: 687b ldr r3, [r7, #4] + 8006d3e: 661a str r2, [r3, #96] ; 0x60 + + /* If the selected rank is below ADC group regular sequencer length, */ + /* apply the configuration in ADC register. */ + /* Note: Otherwise, configuration is not applied. */ + /* To apply it, parameter'NbrOfConversion' must be increased. */ + if (((pConfig->Rank >> 2UL) + 1UL) <= hadc->Init.NbrOfConversion) + 8006d40: 683b ldr r3, [r7, #0] + 8006d42: 685b ldr r3, [r3, #4] + 8006d44: 089b lsrs r3, r3, #2 + 8006d46: 1c5a adds r2, r3, #1 + 8006d48: 687b ldr r3, [r7, #4] + 8006d4a: 69db ldr r3, [r3, #28] + 8006d4c: 429a cmp r2, r3 + 8006d4e: d808 bhi.n 8006d62 + { + LL_ADC_REG_SetSequencerRanks(hadc->Instance, pConfig->Rank, pConfig->Channel); + 8006d50: 687b ldr r3, [r7, #4] + 8006d52: 6818 ldr r0, [r3, #0] + 8006d54: 683b ldr r3, [r7, #0] + 8006d56: 6859 ldr r1, [r3, #4] + 8006d58: 683b ldr r3, [r7, #0] + 8006d5a: 681b ldr r3, [r3, #0] + 8006d5c: 001a movs r2, r3 + 8006d5e: f7ff fb29 bl 80063b4 + } + } + + /* Set sampling time of the selected ADC channel */ + LL_ADC_SetChannelSamplingTime(hadc->Instance, pConfig->Channel, pConfig->SamplingTime); + 8006d62: 687b ldr r3, [r7, #4] + 8006d64: 6818 ldr r0, [r3, #0] + 8006d66: 683b ldr r3, [r7, #0] + 8006d68: 6819 ldr r1, [r3, #0] + 8006d6a: 683b ldr r3, [r7, #0] + 8006d6c: 689b ldr r3, [r3, #8] + 8006d6e: 001a movs r2, r3 + 8006d70: f7ff fb64 bl 800643c + /* internal measurement paths enable: If internal channel selected, */ + /* enable dedicated internal buffers and path. */ + /* Note: these internal measurement paths can be disabled using */ + /* HAL_ADC_DeInit() or removing the channel from sequencer with */ + /* channel configuration parameter "Rank". */ + if (__LL_ADC_IS_CHANNEL_INTERNAL(pConfig->Channel)) + 8006d74: 683b ldr r3, [r7, #0] + 8006d76: 681b ldr r3, [r3, #0] + 8006d78: 2b00 cmp r3, #0 + 8006d7a: db00 blt.n 8006d7e + 8006d7c: e0bc b.n 8006ef8 + { + tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); + 8006d7e: 4b50 ldr r3, [pc, #320] ; (8006ec0 ) + 8006d80: 0018 movs r0, r3 + 8006d82: f7ff fac5 bl 8006310 + 8006d86: 0003 movs r3, r0 + 8006d88: 613b str r3, [r7, #16] + + /* If the requested internal measurement path has already been enabled, */ + /* bypass the configuration processing. */ + if ((pConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && + 8006d8a: 683b ldr r3, [r7, #0] + 8006d8c: 681b ldr r3, [r3, #0] + 8006d8e: 4a4d ldr r2, [pc, #308] ; (8006ec4 ) + 8006d90: 4293 cmp r3, r2 + 8006d92: d122 bne.n 8006dda + ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) + 8006d94: 693a ldr r2, [r7, #16] + 8006d96: 2380 movs r3, #128 ; 0x80 + 8006d98: 041b lsls r3, r3, #16 + 8006d9a: 4013 ands r3, r2 + if ((pConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && + 8006d9c: d11d bne.n 8006dda + { + LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), + 8006d9e: 693b ldr r3, [r7, #16] + 8006da0: 2280 movs r2, #128 ; 0x80 + 8006da2: 0412 lsls r2, r2, #16 + 8006da4: 4313 orrs r3, r2 + 8006da6: 4a46 ldr r2, [pc, #280] ; (8006ec0 ) + 8006da8: 0019 movs r1, r3 + 8006daa: 0010 movs r0, r2 + 8006dac: f7ff fa9c bl 80062e8 + /* Delay for temperature sensor stabilization time */ + /* Wait loop initialization and execution */ + /* Note: Variable divided by 2 to compensate partially */ + /* CPU processing cycles, scaling in us split to not */ + /* exceed 32 bits register capacity and handle low frequency. */ + wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); + 8006db0: 4b45 ldr r3, [pc, #276] ; (8006ec8 ) + 8006db2: 681b ldr r3, [r3, #0] + 8006db4: 4945 ldr r1, [pc, #276] ; (8006ecc ) + 8006db6: 0018 movs r0, r3 + 8006db8: f7f9 f9b8 bl 800012c <__udivsi3> + 8006dbc: 0003 movs r3, r0 + 8006dbe: 1c5a adds r2, r3, #1 + 8006dc0: 0013 movs r3, r2 + 8006dc2: 005b lsls r3, r3, #1 + 8006dc4: 189b adds r3, r3, r2 + 8006dc6: 009b lsls r3, r3, #2 + 8006dc8: 60fb str r3, [r7, #12] + while (wait_loop_index != 0UL) + 8006dca: e002 b.n 8006dd2 + { + wait_loop_index--; + 8006dcc: 68fb ldr r3, [r7, #12] + 8006dce: 3b01 subs r3, #1 + 8006dd0: 60fb str r3, [r7, #12] + while (wait_loop_index != 0UL) + 8006dd2: 68fb ldr r3, [r7, #12] + 8006dd4: 2b00 cmp r3, #0 + 8006dd6: d1f9 bne.n 8006dcc + if ((pConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && + 8006dd8: e08e b.n 8006ef8 + } + } + else if ((pConfig->Channel == ADC_CHANNEL_VBAT) + 8006dda: 683b ldr r3, [r7, #0] + 8006ddc: 681b ldr r3, [r3, #0] + 8006dde: 4a3c ldr r2, [pc, #240] ; (8006ed0 ) + 8006de0: 4293 cmp r3, r2 + 8006de2: d10e bne.n 8006e02 + && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL)) + 8006de4: 693a ldr r2, [r7, #16] + 8006de6: 2380 movs r3, #128 ; 0x80 + 8006de8: 045b lsls r3, r3, #17 + 8006dea: 4013 ands r3, r2 + 8006dec: d109 bne.n 8006e02 + { + LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), + 8006dee: 693b ldr r3, [r7, #16] + 8006df0: 2280 movs r2, #128 ; 0x80 + 8006df2: 0452 lsls r2, r2, #17 + 8006df4: 4313 orrs r3, r2 + 8006df6: 4a32 ldr r2, [pc, #200] ; (8006ec0 ) + 8006df8: 0019 movs r1, r3 + 8006dfa: 0010 movs r0, r2 + 8006dfc: f7ff fa74 bl 80062e8 + 8006e00: e07a b.n 8006ef8 + LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); + } + else if ((pConfig->Channel == ADC_CHANNEL_VREFINT) && + 8006e02: 683b ldr r3, [r7, #0] + 8006e04: 681b ldr r3, [r3, #0] + 8006e06: 4a33 ldr r2, [pc, #204] ; (8006ed4 ) + 8006e08: 4293 cmp r3, r2 + 8006e0a: d000 beq.n 8006e0e + 8006e0c: e074 b.n 8006ef8 + ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) + 8006e0e: 693a ldr r2, [r7, #16] + 8006e10: 2380 movs r3, #128 ; 0x80 + 8006e12: 03db lsls r3, r3, #15 + 8006e14: 4013 ands r3, r2 + else if ((pConfig->Channel == ADC_CHANNEL_VREFINT) && + 8006e16: d000 beq.n 8006e1a + 8006e18: e06e b.n 8006ef8 + { + LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), + 8006e1a: 693b ldr r3, [r7, #16] + 8006e1c: 2280 movs r2, #128 ; 0x80 + 8006e1e: 03d2 lsls r2, r2, #15 + 8006e20: 4313 orrs r3, r2 + 8006e22: 4a27 ldr r2, [pc, #156] ; (8006ec0 ) + 8006e24: 0019 movs r1, r3 + 8006e26: 0010 movs r0, r2 + 8006e28: f7ff fa5e bl 80062e8 + 8006e2c: e064 b.n 8006ef8 + /* Regular sequencer configuration */ + /* Note: Case of sequencer set to fully configurable: */ + /* Sequencer rank cannot be disabled, only affected to */ + /* another channel. */ + /* To remove a rank, use parameter 'NbrOfConversion". */ + if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || + 8006e2e: 687b ldr r3, [r7, #4] + 8006e30: 691a ldr r2, [r3, #16] + 8006e32: 2380 movs r3, #128 ; 0x80 + 8006e34: 061b lsls r3, r3, #24 + 8006e36: 429a cmp r2, r3 + 8006e38: d004 beq.n 8006e44 + (hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED_BACKWARD)) + 8006e3a: 687b ldr r3, [r7, #4] + 8006e3c: 691b ldr r3, [r3, #16] + if ((hadc->Init.ScanConvMode == ADC_SCAN_SEQ_FIXED) || + 8006e3e: 4a1f ldr r2, [pc, #124] ; (8006ebc ) + 8006e40: 4293 cmp r3, r2 + 8006e42: d107 bne.n 8006e54 + { + /* Sequencer set to not fully configurable: */ + /* Reset the channel by disabling the corresponding bitfield. */ + LL_ADC_REG_SetSequencerChRem(hadc->Instance, pConfig->Channel); + 8006e44: 687b ldr r3, [r7, #4] + 8006e46: 681a ldr r2, [r3, #0] + 8006e48: 683b ldr r3, [r7, #0] + 8006e4a: 681b ldr r3, [r3, #0] + 8006e4c: 0019 movs r1, r3 + 8006e4e: 0010 movs r0, r2 + 8006e50: f7ff fae1 bl 8006416 } /* Management of internal measurement channels: Vbat/VrefInt/TempSensor. */ /* If internal channel selected, enable dedicated internal buffers and */ /* paths. */ if (__LL_ADC_IS_CHANNEL_INTERNAL(pConfig->Channel)) - 8006bcc: 683b ldr r3, [r7, #0] - 8006bce: 681b ldr r3, [r3, #0] - 8006bd0: 2b00 cmp r3, #0 - 8006bd2: da4d bge.n 8006c70 + 8006e54: 683b ldr r3, [r7, #0] + 8006e56: 681b ldr r3, [r3, #0] + 8006e58: 2b00 cmp r3, #0 + 8006e5a: da4d bge.n 8006ef8 { tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 8006bd4: 4b18 ldr r3, [pc, #96] ; (8006c38 ) - 8006bd6: 0018 movs r0, r3 - 8006bd8: f7ff fa56 bl 8006088 - 8006bdc: 0003 movs r3, r0 - 8006bde: 613b str r3, [r7, #16] + 8006e5c: 4b18 ldr r3, [pc, #96] ; (8006ec0 ) + 8006e5e: 0018 movs r0, r3 + 8006e60: f7ff fa56 bl 8006310 + 8006e64: 0003 movs r3, r0 + 8006e66: 613b str r3, [r7, #16] if (pConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8006be0: 683b ldr r3, [r7, #0] - 8006be2: 681b ldr r3, [r3, #0] - 8006be4: 4a15 ldr r2, [pc, #84] ; (8006c3c ) - 8006be6: 4293 cmp r3, r2 - 8006be8: d108 bne.n 8006bfc + 8006e68: 683b ldr r3, [r7, #0] + 8006e6a: 681b ldr r3, [r3, #0] + 8006e6c: 4a15 ldr r2, [pc, #84] ; (8006ec4 ) + 8006e6e: 4293 cmp r3, r2 + 8006e70: d108 bne.n 8006e84 { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), - 8006bea: 693b ldr r3, [r7, #16] - 8006bec: 4a18 ldr r2, [pc, #96] ; (8006c50 ) - 8006bee: 4013 ands r3, r2 - 8006bf0: 4a11 ldr r2, [pc, #68] ; (8006c38 ) - 8006bf2: 0019 movs r1, r3 - 8006bf4: 0010 movs r0, r2 - 8006bf6: f7ff fa33 bl 8006060 - 8006bfa: e039 b.n 8006c70 + 8006e72: 693b ldr r3, [r7, #16] + 8006e74: 4a18 ldr r2, [pc, #96] ; (8006ed8 ) + 8006e76: 4013 ands r3, r2 + 8006e78: 4a11 ldr r2, [pc, #68] ; (8006ec0 ) + 8006e7a: 0019 movs r1, r3 + 8006e7c: 0010 movs r0, r2 + 8006e7e: f7ff fa33 bl 80062e8 + 8006e82: e039 b.n 8006ef8 ~LL_ADC_PATH_INTERNAL_TEMPSENSOR & tmp_config_internal_channel); } else if (pConfig->Channel == ADC_CHANNEL_VBAT) - 8006bfc: 683b ldr r3, [r7, #0] - 8006bfe: 681b ldr r3, [r3, #0] - 8006c00: 4a11 ldr r2, [pc, #68] ; (8006c48 ) - 8006c02: 4293 cmp r3, r2 - 8006c04: d108 bne.n 8006c18 + 8006e84: 683b ldr r3, [r7, #0] + 8006e86: 681b ldr r3, [r3, #0] + 8006e88: 4a11 ldr r2, [pc, #68] ; (8006ed0 ) + 8006e8a: 4293 cmp r3, r2 + 8006e8c: d108 bne.n 8006ea0 { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), - 8006c06: 693b ldr r3, [r7, #16] - 8006c08: 4a12 ldr r2, [pc, #72] ; (8006c54 ) - 8006c0a: 4013 ands r3, r2 - 8006c0c: 4a0a ldr r2, [pc, #40] ; (8006c38 ) - 8006c0e: 0019 movs r1, r3 - 8006c10: 0010 movs r0, r2 - 8006c12: f7ff fa25 bl 8006060 - 8006c16: e02b b.n 8006c70 + 8006e8e: 693b ldr r3, [r7, #16] + 8006e90: 4a12 ldr r2, [pc, #72] ; (8006edc ) + 8006e92: 4013 ands r3, r2 + 8006e94: 4a0a ldr r2, [pc, #40] ; (8006ec0 ) + 8006e96: 0019 movs r1, r3 + 8006e98: 0010 movs r0, r2 + 8006e9a: f7ff fa25 bl 80062e8 + 8006e9e: e02b b.n 8006ef8 ~LL_ADC_PATH_INTERNAL_VBAT & tmp_config_internal_channel); } else if (pConfig->Channel == ADC_CHANNEL_VREFINT) - 8006c18: 683b ldr r3, [r7, #0] - 8006c1a: 681b ldr r3, [r3, #0] - 8006c1c: 4a0b ldr r2, [pc, #44] ; (8006c4c ) - 8006c1e: 4293 cmp r3, r2 - 8006c20: d126 bne.n 8006c70 + 8006ea0: 683b ldr r3, [r7, #0] + 8006ea2: 681b ldr r3, [r3, #0] + 8006ea4: 4a0b ldr r2, [pc, #44] ; (8006ed4 ) + 8006ea6: 4293 cmp r3, r2 + 8006ea8: d126 bne.n 8006ef8 { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), - 8006c22: 693b ldr r3, [r7, #16] - 8006c24: 4a0c ldr r2, [pc, #48] ; (8006c58 ) - 8006c26: 4013 ands r3, r2 - 8006c28: 4a03 ldr r2, [pc, #12] ; (8006c38 ) - 8006c2a: 0019 movs r1, r3 - 8006c2c: 0010 movs r0, r2 - 8006c2e: f7ff fa17 bl 8006060 - 8006c32: e01d b.n 8006c70 - 8006c34: 80000004 .word 0x80000004 - 8006c38: 40012708 .word 0x40012708 - 8006c3c: b0001000 .word 0xb0001000 - 8006c40: 20000040 .word 0x20000040 - 8006c44: 00030d40 .word 0x00030d40 - 8006c48: b8004000 .word 0xb8004000 - 8006c4c: b4002000 .word 0xb4002000 - 8006c50: ff7fffff .word 0xff7fffff - 8006c54: feffffff .word 0xfeffffff - 8006c58: ffbfffff .word 0xffbfffff + 8006eaa: 693b ldr r3, [r7, #16] + 8006eac: 4a0c ldr r2, [pc, #48] ; (8006ee0 ) + 8006eae: 4013 ands r3, r2 + 8006eb0: 4a03 ldr r2, [pc, #12] ; (8006ec0 ) + 8006eb2: 0019 movs r1, r3 + 8006eb4: 0010 movs r0, r2 + 8006eb6: f7ff fa17 bl 80062e8 + 8006eba: e01d b.n 8006ef8 + 8006ebc: 80000004 .word 0x80000004 + 8006ec0: 40012708 .word 0x40012708 + 8006ec4: b0001000 .word 0xb0001000 + 8006ec8: 20000040 .word 0x20000040 + 8006ecc: 00030d40 .word 0x00030d40 + 8006ed0: b8004000 .word 0xb8004000 + 8006ed4: b4002000 .word 0xb4002000 + 8006ed8: ff7fffff .word 0xff7fffff + 8006edc: feffffff .word 0xfeffffff + 8006ee0: ffbfffff .word 0xffbfffff /* channel could be done on neither of the channel configuration structure */ /* parameters. */ else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8006c5c: 687b ldr r3, [r7, #4] - 8006c5e: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006c60: 2220 movs r2, #32 - 8006c62: 431a orrs r2, r3 - 8006c64: 687b ldr r3, [r7, #4] - 8006c66: 659a str r2, [r3, #88] ; 0x58 + 8006ee4: 687b ldr r3, [r7, #4] + 8006ee6: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006ee8: 2220 movs r2, #32 + 8006eea: 431a orrs r2, r3 + 8006eec: 687b ldr r3, [r7, #4] + 8006eee: 659a str r2, [r3, #88] ; 0x58 tmp_hal_status = HAL_ERROR; - 8006c68: 2317 movs r3, #23 - 8006c6a: 18fb adds r3, r7, r3 - 8006c6c: 2201 movs r2, #1 - 8006c6e: 701a strb r2, [r3, #0] + 8006ef0: 2317 movs r3, #23 + 8006ef2: 18fb adds r3, r7, r3 + 8006ef4: 2201 movs r2, #1 + 8006ef6: 701a strb r2, [r3, #0] } __HAL_UNLOCK(hadc); - 8006c70: 687b ldr r3, [r7, #4] - 8006c72: 2254 movs r2, #84 ; 0x54 - 8006c74: 2100 movs r1, #0 - 8006c76: 5499 strb r1, [r3, r2] + 8006ef8: 687b ldr r3, [r7, #4] + 8006efa: 2254 movs r2, #84 ; 0x54 + 8006efc: 2100 movs r1, #0 + 8006efe: 5499 strb r1, [r3, r2] return tmp_hal_status; - 8006c78: 2317 movs r3, #23 - 8006c7a: 18fb adds r3, r7, r3 - 8006c7c: 781b ldrb r3, [r3, #0] + 8006f00: 2317 movs r3, #23 + 8006f02: 18fb adds r3, r7, r3 + 8006f04: 781b ldrb r3, [r3, #0] } - 8006c7e: 0018 movs r0, r3 - 8006c80: 46bd mov sp, r7 - 8006c82: b006 add sp, #24 - 8006c84: bd80 pop {r7, pc} - 8006c86: 46c0 nop ; (mov r8, r8) + 8006f06: 0018 movs r0, r3 + 8006f08: 46bd mov sp, r7 + 8006f0a: b006 add sp, #24 + 8006f0c: bd80 pop {r7, pc} + 8006f0e: 46c0 nop ; (mov r8, r8) -08006c88 : +08006f10 : * stopped to disable the ADC. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc) { - 8006c88: b580 push {r7, lr} - 8006c8a: b084 sub sp, #16 - 8006c8c: af00 add r7, sp, #0 - 8006c8e: 6078 str r0, [r7, #4] + 8006f10: b580 push {r7, lr} + 8006f12: b084 sub sp, #16 + 8006f14: af00 add r7, sp, #0 + 8006f16: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Verification if ADC is not already stopped on regular group to bypass */ /* this function if not needed. */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL) - 8006c90: 687b ldr r3, [r7, #4] - 8006c92: 681b ldr r3, [r3, #0] - 8006c94: 0018 movs r0, r3 - 8006c96: f7ff fb3b bl 8006310 - 8006c9a: 1e03 subs r3, r0, #0 - 8006c9c: d031 beq.n 8006d02 + 8006f18: 687b ldr r3, [r7, #4] + 8006f1a: 681b ldr r3, [r3, #0] + 8006f1c: 0018 movs r0, r3 + 8006f1e: f7ff fb3b bl 8006598 + 8006f22: 1e03 subs r3, r0, #0 + 8006f24: d031 beq.n 8006f8a { /* Stop potential conversion on going on regular group */ /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ if (LL_ADC_IsDisableOngoing(hadc->Instance) == 0UL) - 8006c9e: 687b ldr r3, [r7, #4] - 8006ca0: 681b ldr r3, [r3, #0] - 8006ca2: 0018 movs r0, r3 - 8006ca4: f7ff faff bl 80062a6 - 8006ca8: 1e03 subs r3, r0, #0 - 8006caa: d104 bne.n 8006cb6 + 8006f26: 687b ldr r3, [r7, #4] + 8006f28: 681b ldr r3, [r3, #0] + 8006f2a: 0018 movs r0, r3 + 8006f2c: f7ff faff bl 800652e + 8006f30: 1e03 subs r3, r0, #0 + 8006f32: d104 bne.n 8006f3e { /* Stop ADC group regular conversion */ LL_ADC_REG_StopConversion(hadc->Instance); - 8006cac: 687b ldr r3, [r7, #4] - 8006cae: 681b ldr r3, [r3, #0] - 8006cb0: 0018 movs r0, r3 - 8006cb2: f7ff fb1b bl 80062ec + 8006f34: 687b ldr r3, [r7, #4] + 8006f36: 681b ldr r3, [r3, #0] + 8006f38: 0018 movs r0, r3 + 8006f3a: f7ff fb1b bl 8006574 } /* Wait for conversion effectively stopped */ /* Get tick count */ tickstart = HAL_GetTick(); - 8006cb6: f7ff f98f bl 8005fd8 - 8006cba: 0003 movs r3, r0 - 8006cbc: 60fb str r3, [r7, #12] + 8006f3e: f7ff f98f bl 8006260 + 8006f42: 0003 movs r3, r0 + 8006f44: 60fb str r3, [r7, #12] while ((hadc->Instance->CR & ADC_CR_ADSTART) != 0UL) - 8006cbe: e01a b.n 8006cf6 + 8006f46: e01a b.n 8006f7e { if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) - 8006cc0: f7ff f98a bl 8005fd8 - 8006cc4: 0002 movs r2, r0 - 8006cc6: 68fb ldr r3, [r7, #12] - 8006cc8: 1ad3 subs r3, r2, r3 - 8006cca: 2b02 cmp r3, #2 - 8006ccc: d913 bls.n 8006cf6 + 8006f48: f7ff f98a bl 8006260 + 8006f4c: 0002 movs r2, r0 + 8006f4e: 68fb ldr r3, [r7, #12] + 8006f50: 1ad3 subs r3, r2, r3 + 8006f52: 2b02 cmp r3, #2 + 8006f54: d913 bls.n 8006f7e { /* New check to avoid false timeout detection in case of preemption */ if ((hadc->Instance->CR & ADC_CR_ADSTART) != 0UL) - 8006cce: 687b ldr r3, [r7, #4] - 8006cd0: 681b ldr r3, [r3, #0] - 8006cd2: 689b ldr r3, [r3, #8] - 8006cd4: 2204 movs r2, #4 - 8006cd6: 4013 ands r3, r2 - 8006cd8: d00d beq.n 8006cf6 + 8006f56: 687b ldr r3, [r7, #4] + 8006f58: 681b ldr r3, [r3, #0] + 8006f5a: 689b ldr r3, [r3, #8] + 8006f5c: 2204 movs r2, #4 + 8006f5e: 4013 ands r3, r2 + 8006f60: d00d beq.n 8006f7e { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8006cda: 687b ldr r3, [r7, #4] - 8006cdc: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006cde: 2210 movs r2, #16 - 8006ce0: 431a orrs r2, r3 - 8006ce2: 687b ldr r3, [r7, #4] - 8006ce4: 659a str r2, [r3, #88] ; 0x58 + 8006f62: 687b ldr r3, [r7, #4] + 8006f64: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006f66: 2210 movs r2, #16 + 8006f68: 431a orrs r2, r3 + 8006f6a: 687b ldr r3, [r7, #4] + 8006f6c: 659a str r2, [r3, #88] ; 0x58 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8006ce6: 687b ldr r3, [r7, #4] - 8006ce8: 6ddb ldr r3, [r3, #92] ; 0x5c - 8006cea: 2201 movs r2, #1 - 8006cec: 431a orrs r2, r3 - 8006cee: 687b ldr r3, [r7, #4] - 8006cf0: 65da str r2, [r3, #92] ; 0x5c + 8006f6e: 687b ldr r3, [r7, #4] + 8006f70: 6ddb ldr r3, [r3, #92] ; 0x5c + 8006f72: 2201 movs r2, #1 + 8006f74: 431a orrs r2, r3 + 8006f76: 687b ldr r3, [r7, #4] + 8006f78: 65da str r2, [r3, #92] ; 0x5c return HAL_ERROR; - 8006cf2: 2301 movs r3, #1 - 8006cf4: e006 b.n 8006d04 + 8006f7a: 2301 movs r3, #1 + 8006f7c: e006 b.n 8006f8c while ((hadc->Instance->CR & ADC_CR_ADSTART) != 0UL) - 8006cf6: 687b ldr r3, [r7, #4] - 8006cf8: 681b ldr r3, [r3, #0] - 8006cfa: 689b ldr r3, [r3, #8] - 8006cfc: 2204 movs r2, #4 - 8006cfe: 4013 ands r3, r2 - 8006d00: d1de bne.n 8006cc0 + 8006f7e: 687b ldr r3, [r7, #4] + 8006f80: 681b ldr r3, [r3, #0] + 8006f82: 689b ldr r3, [r3, #8] + 8006f84: 2204 movs r2, #4 + 8006f86: 4013 ands r3, r2 + 8006f88: d1de bne.n 8006f48 } } /* Return HAL status */ return HAL_OK; - 8006d02: 2300 movs r3, #0 + 8006f8a: 2300 movs r3, #0 } - 8006d04: 0018 movs r0, r3 - 8006d06: 46bd mov sp, r7 - 8006d08: b004 add sp, #16 - 8006d0a: bd80 pop {r7, pc} + 8006f8c: 0018 movs r0, r3 + 8006f8e: 46bd mov sp, r7 + 8006f90: b004 add sp, #16 + 8006f92: bd80 pop {r7, pc} -08006d0c : +08006f94 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc) { - 8006d0c: b580 push {r7, lr} - 8006d0e: b084 sub sp, #16 - 8006d10: af00 add r7, sp, #0 - 8006d12: 6078 str r0, [r7, #4] + 8006f94: b580 push {r7, lr} + 8006f96: b084 sub sp, #16 + 8006f98: af00 add r7, sp, #0 + 8006f9a: 6078 str r0, [r7, #4] uint32_t tickstart; __IO uint32_t wait_loop_index = 0UL; - 8006d14: 2300 movs r3, #0 - 8006d16: 60bb str r3, [r7, #8] + 8006f9c: 2300 movs r3, #0 + 8006f9e: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 8006d18: 687b ldr r3, [r7, #4] - 8006d1a: 681b ldr r3, [r3, #0] - 8006d1c: 0018 movs r0, r3 - 8006d1e: f7ff fab1 bl 8006284 - 8006d22: 1e03 subs r3, r0, #0 - 8006d24: d000 beq.n 8006d28 - 8006d26: e069 b.n 8006dfc + 8006fa0: 687b ldr r3, [r7, #4] + 8006fa2: 681b ldr r3, [r3, #0] + 8006fa4: 0018 movs r0, r3 + 8006fa6: f7ff fab1 bl 800650c + 8006faa: 1e03 subs r3, r0, #0 + 8006fac: d000 beq.n 8006fb0 + 8006fae: e069 b.n 8007084 { /* Check if conditions to enable the ADC are fulfilled */ if ((hadc->Instance->CR & (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN)) != 0UL) - 8006d28: 687b ldr r3, [r7, #4] - 8006d2a: 681b ldr r3, [r3, #0] - 8006d2c: 689b ldr r3, [r3, #8] - 8006d2e: 4a36 ldr r2, [pc, #216] ; (8006e08 ) - 8006d30: 4013 ands r3, r2 - 8006d32: d00d beq.n 8006d50 + 8006fb0: 687b ldr r3, [r7, #4] + 8006fb2: 681b ldr r3, [r3, #0] + 8006fb4: 689b ldr r3, [r3, #8] + 8006fb6: 4a36 ldr r2, [pc, #216] ; (8007090 ) + 8006fb8: 4013 ands r3, r2 + 8006fba: d00d beq.n 8006fd8 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8006d34: 687b ldr r3, [r7, #4] - 8006d36: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006d38: 2210 movs r2, #16 - 8006d3a: 431a orrs r2, r3 - 8006d3c: 687b ldr r3, [r7, #4] - 8006d3e: 659a str r2, [r3, #88] ; 0x58 + 8006fbc: 687b ldr r3, [r7, #4] + 8006fbe: 6d9b ldr r3, [r3, #88] ; 0x58 + 8006fc0: 2210 movs r2, #16 + 8006fc2: 431a orrs r2, r3 + 8006fc4: 687b ldr r3, [r7, #4] + 8006fc6: 659a str r2, [r3, #88] ; 0x58 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8006d40: 687b ldr r3, [r7, #4] - 8006d42: 6ddb ldr r3, [r3, #92] ; 0x5c - 8006d44: 2201 movs r2, #1 - 8006d46: 431a orrs r2, r3 - 8006d48: 687b ldr r3, [r7, #4] - 8006d4a: 65da str r2, [r3, #92] ; 0x5c + 8006fc8: 687b ldr r3, [r7, #4] + 8006fca: 6ddb ldr r3, [r3, #92] ; 0x5c + 8006fcc: 2201 movs r2, #1 + 8006fce: 431a orrs r2, r3 + 8006fd0: 687b ldr r3, [r7, #4] + 8006fd2: 65da str r2, [r3, #92] ; 0x5c return HAL_ERROR; - 8006d4c: 2301 movs r3, #1 - 8006d4e: e056 b.n 8006dfe + 8006fd4: 2301 movs r3, #1 + 8006fd6: e056 b.n 8007086 } /* Enable the ADC peripheral */ LL_ADC_Enable(hadc->Instance); - 8006d50: 687b ldr r3, [r7, #4] - 8006d52: 681b ldr r3, [r3, #0] - 8006d54: 0018 movs r0, r3 - 8006d56: f7ff fa71 bl 800623c + 8006fd8: 687b ldr r3, [r7, #4] + 8006fda: 681b ldr r3, [r3, #0] + 8006fdc: 0018 movs r0, r3 + 8006fde: f7ff fa71 bl 80064c4 if ((LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) & LL_ADC_PATH_INTERNAL_TEMPSENSOR) - 8006d5a: 4b2c ldr r3, [pc, #176] ; (8006e0c ) - 8006d5c: 0018 movs r0, r3 - 8006d5e: f7ff f993 bl 8006088 - 8006d62: 0002 movs r2, r0 - 8006d64: 2380 movs r3, #128 ; 0x80 - 8006d66: 041b lsls r3, r3, #16 - 8006d68: 4013 ands r3, r2 - 8006d6a: d00f beq.n 8006d8c + 8006fe2: 4b2c ldr r3, [pc, #176] ; (8007094 ) + 8006fe4: 0018 movs r0, r3 + 8006fe6: f7ff f993 bl 8006310 + 8006fea: 0002 movs r2, r0 + 8006fec: 2380 movs r3, #128 ; 0x80 + 8006fee: 041b lsls r3, r3, #16 + 8006ff0: 4013 ands r3, r2 + 8006ff2: d00f beq.n 8007014 /* Wait loop initialization and execution */ /* Note: Variable divided by 2 to compensate partially */ /* CPU processing cycles, scaling in us split to not */ /* exceed 32 bits register capacity and handle low frequency. */ wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_BUFFER_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); - 8006d6c: 4b28 ldr r3, [pc, #160] ; (8006e10 ) - 8006d6e: 681b ldr r3, [r3, #0] - 8006d70: 4928 ldr r1, [pc, #160] ; (8006e14 ) - 8006d72: 0018 movs r0, r3 - 8006d74: f7f9 f9da bl 800012c <__udivsi3> - 8006d78: 0003 movs r3, r0 - 8006d7a: 3301 adds r3, #1 + 8006ff4: 4b28 ldr r3, [pc, #160] ; (8007098 ) + 8006ff6: 681b ldr r3, [r3, #0] + 8006ff8: 4928 ldr r1, [pc, #160] ; (800709c ) + 8006ffa: 0018 movs r0, r3 + 8006ffc: f7f9 f896 bl 800012c <__udivsi3> + 8007000: 0003 movs r3, r0 + 8007002: 3301 adds r3, #1 wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_BUFFER_STAB_US / 10UL) - 8006d7c: 60bb str r3, [r7, #8] + 8007004: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 8006d7e: e002 b.n 8006d86 + 8007006: e002 b.n 800700e { wait_loop_index--; - 8006d80: 68bb ldr r3, [r7, #8] - 8006d82: 3b01 subs r3, #1 - 8006d84: 60bb str r3, [r7, #8] + 8007008: 68bb ldr r3, [r7, #8] + 800700a: 3b01 subs r3, #1 + 800700c: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 8006d86: 68bb ldr r3, [r7, #8] - 8006d88: 2b00 cmp r3, #0 - 8006d8a: d1f9 bne.n 8006d80 + 800700e: 68bb ldr r3, [r7, #8] + 8007010: 2b00 cmp r3, #0 + 8007012: d1f9 bne.n 8007008 } } /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ /* performed automatically by hardware and flag ADC ready is not set. */ if (hadc->Init.LowPowerAutoPowerOff != ENABLE) - 8006d8c: 687b ldr r3, [r7, #4] - 8006d8e: 7e5b ldrb r3, [r3, #25] - 8006d90: 2b01 cmp r3, #1 - 8006d92: d033 beq.n 8006dfc + 8007014: 687b ldr r3, [r7, #4] + 8007016: 7e5b ldrb r3, [r3, #25] + 8007018: 2b01 cmp r3, #1 + 800701a: d033 beq.n 8007084 { /* Wait for ADC effectively enabled */ tickstart = HAL_GetTick(); - 8006d94: f7ff f920 bl 8005fd8 - 8006d98: 0003 movs r3, r0 - 8006d9a: 60fb str r3, [r7, #12] + 800701c: f7ff f920 bl 8006260 + 8007020: 0003 movs r3, r0 + 8007022: 60fb str r3, [r7, #12] while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 8006d9c: e027 b.n 8006dee + 8007024: e027 b.n 8007076 The workaround is to continue setting ADEN until ADRDY is becomes 1. Additionally, ADC_ENABLE_TIMEOUT is defined to encompass this 4 ADC clock cycle duration */ /* Note: Test of ADC enabled required due to hardware constraint to */ /* not enable ADC if already enabled. */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 8006d9e: 687b ldr r3, [r7, #4] - 8006da0: 681b ldr r3, [r3, #0] - 8006da2: 0018 movs r0, r3 - 8006da4: f7ff fa6e bl 8006284 - 8006da8: 1e03 subs r3, r0, #0 - 8006daa: d104 bne.n 8006db6 + 8007026: 687b ldr r3, [r7, #4] + 8007028: 681b ldr r3, [r3, #0] + 800702a: 0018 movs r0, r3 + 800702c: f7ff fa6e bl 800650c + 8007030: 1e03 subs r3, r0, #0 + 8007032: d104 bne.n 800703e { LL_ADC_Enable(hadc->Instance); - 8006dac: 687b ldr r3, [r7, #4] - 8006dae: 681b ldr r3, [r3, #0] - 8006db0: 0018 movs r0, r3 - 8006db2: f7ff fa43 bl 800623c + 8007034: 687b ldr r3, [r7, #4] + 8007036: 681b ldr r3, [r3, #0] + 8007038: 0018 movs r0, r3 + 800703a: f7ff fa43 bl 80064c4 } if ((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) - 8006db6: f7ff f90f bl 8005fd8 - 8006dba: 0002 movs r2, r0 - 8006dbc: 68fb ldr r3, [r7, #12] - 8006dbe: 1ad3 subs r3, r2, r3 - 8006dc0: 2b02 cmp r3, #2 - 8006dc2: d914 bls.n 8006dee + 800703e: f7ff f90f bl 8006260 + 8007042: 0002 movs r2, r0 + 8007044: 68fb ldr r3, [r7, #12] + 8007046: 1ad3 subs r3, r2, r3 + 8007048: 2b02 cmp r3, #2 + 800704a: d914 bls.n 8007076 { /* New check to avoid false timeout detection in case of preemption */ if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 8006dc4: 687b ldr r3, [r7, #4] - 8006dc6: 681b ldr r3, [r3, #0] - 8006dc8: 681b ldr r3, [r3, #0] - 8006dca: 2201 movs r2, #1 - 8006dcc: 4013 ands r3, r2 - 8006dce: 2b01 cmp r3, #1 - 8006dd0: d00d beq.n 8006dee + 800704c: 687b ldr r3, [r7, #4] + 800704e: 681b ldr r3, [r3, #0] + 8007050: 681b ldr r3, [r3, #0] + 8007052: 2201 movs r2, #1 + 8007054: 4013 ands r3, r2 + 8007056: 2b01 cmp r3, #1 + 8007058: d00d beq.n 8007076 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8006dd2: 687b ldr r3, [r7, #4] - 8006dd4: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006dd6: 2210 movs r2, #16 - 8006dd8: 431a orrs r2, r3 - 8006dda: 687b ldr r3, [r7, #4] - 8006ddc: 659a str r2, [r3, #88] ; 0x58 + 800705a: 687b ldr r3, [r7, #4] + 800705c: 6d9b ldr r3, [r3, #88] ; 0x58 + 800705e: 2210 movs r2, #16 + 8007060: 431a orrs r2, r3 + 8007062: 687b ldr r3, [r7, #4] + 8007064: 659a str r2, [r3, #88] ; 0x58 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8006dde: 687b ldr r3, [r7, #4] - 8006de0: 6ddb ldr r3, [r3, #92] ; 0x5c - 8006de2: 2201 movs r2, #1 - 8006de4: 431a orrs r2, r3 - 8006de6: 687b ldr r3, [r7, #4] - 8006de8: 65da str r2, [r3, #92] ; 0x5c + 8007066: 687b ldr r3, [r7, #4] + 8007068: 6ddb ldr r3, [r3, #92] ; 0x5c + 800706a: 2201 movs r2, #1 + 800706c: 431a orrs r2, r3 + 800706e: 687b ldr r3, [r7, #4] + 8007070: 65da str r2, [r3, #92] ; 0x5c return HAL_ERROR; - 8006dea: 2301 movs r3, #1 - 8006dec: e007 b.n 8006dfe + 8007072: 2301 movs r3, #1 + 8007074: e007 b.n 8007086 while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 8006dee: 687b ldr r3, [r7, #4] - 8006df0: 681b ldr r3, [r3, #0] - 8006df2: 681b ldr r3, [r3, #0] - 8006df4: 2201 movs r2, #1 - 8006df6: 4013 ands r3, r2 - 8006df8: 2b01 cmp r3, #1 - 8006dfa: d1d0 bne.n 8006d9e + 8007076: 687b ldr r3, [r7, #4] + 8007078: 681b ldr r3, [r3, #0] + 800707a: 681b ldr r3, [r3, #0] + 800707c: 2201 movs r2, #1 + 800707e: 4013 ands r3, r2 + 8007080: 2b01 cmp r3, #1 + 8007082: d1d0 bne.n 8007026 } } } /* Return HAL status */ return HAL_OK; - 8006dfc: 2300 movs r3, #0 + 8007084: 2300 movs r3, #0 } - 8006dfe: 0018 movs r0, r3 - 8006e00: 46bd mov sp, r7 - 8006e02: b004 add sp, #16 - 8006e04: bd80 pop {r7, pc} - 8006e06: 46c0 nop ; (mov r8, r8) - 8006e08: 80000017 .word 0x80000017 - 8006e0c: 40012708 .word 0x40012708 - 8006e10: 20000040 .word 0x20000040 - 8006e14: 00030d40 .word 0x00030d40 + 8007086: 0018 movs r0, r3 + 8007088: 46bd mov sp, r7 + 800708a: b004 add sp, #16 + 800708c: bd80 pop {r7, pc} + 800708e: 46c0 nop ; (mov r8, r8) + 8007090: 80000017 .word 0x80000017 + 8007094: 40012708 .word 0x40012708 + 8007098: 20000040 .word 0x20000040 + 800709c: 00030d40 .word 0x00030d40 -08006e18 : +080070a0 : * stopped. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc) { - 8006e18: b580 push {r7, lr} - 8006e1a: b084 sub sp, #16 - 8006e1c: af00 add r7, sp, #0 - 8006e1e: 6078 str r0, [r7, #4] + 80070a0: b580 push {r7, lr} + 80070a2: b084 sub sp, #16 + 80070a4: af00 add r7, sp, #0 + 80070a6: 6078 str r0, [r7, #4] uint32_t tickstart; const uint32_t tmp_adc_is_disable_on_going = LL_ADC_IsDisableOngoing(hadc->Instance); - 8006e20: 687b ldr r3, [r7, #4] - 8006e22: 681b ldr r3, [r3, #0] - 8006e24: 0018 movs r0, r3 - 8006e26: f7ff fa3e bl 80062a6 - 8006e2a: 0003 movs r3, r0 - 8006e2c: 60fb str r3, [r7, #12] + 80070a8: 687b ldr r3, [r7, #4] + 80070aa: 681b ldr r3, [r3, #0] + 80070ac: 0018 movs r0, r3 + 80070ae: f7ff fa3e bl 800652e + 80070b2: 0003 movs r3, r0 + 80070b4: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled: */ /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ /* disabled. */ if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL) - 8006e2e: 687b ldr r3, [r7, #4] - 8006e30: 681b ldr r3, [r3, #0] - 8006e32: 0018 movs r0, r3 - 8006e34: f7ff fa26 bl 8006284 - 8006e38: 1e03 subs r3, r0, #0 - 8006e3a: d046 beq.n 8006eca + 80070b6: 687b ldr r3, [r7, #4] + 80070b8: 681b ldr r3, [r3, #0] + 80070ba: 0018 movs r0, r3 + 80070bc: f7ff fa26 bl 800650c + 80070c0: 1e03 subs r3, r0, #0 + 80070c2: d046 beq.n 8007152 && (tmp_adc_is_disable_on_going == 0UL) - 8006e3c: 68fb ldr r3, [r7, #12] - 8006e3e: 2b00 cmp r3, #0 - 8006e40: d143 bne.n 8006eca + 80070c4: 68fb ldr r3, [r7, #12] + 80070c6: 2b00 cmp r3, #0 + 80070c8: d143 bne.n 8007152 ) { /* Check if conditions to disable the ADC are fulfilled */ if ((hadc->Instance->CR & (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN) - 8006e42: 687b ldr r3, [r7, #4] - 8006e44: 681b ldr r3, [r3, #0] - 8006e46: 689b ldr r3, [r3, #8] - 8006e48: 2205 movs r2, #5 - 8006e4a: 4013 ands r3, r2 - 8006e4c: 2b01 cmp r3, #1 - 8006e4e: d10d bne.n 8006e6c + 80070ca: 687b ldr r3, [r7, #4] + 80070cc: 681b ldr r3, [r3, #0] + 80070ce: 689b ldr r3, [r3, #8] + 80070d0: 2205 movs r2, #5 + 80070d2: 4013 ands r3, r2 + 80070d4: 2b01 cmp r3, #1 + 80070d6: d10d bne.n 80070f4 { /* Disable the ADC peripheral */ LL_ADC_Disable(hadc->Instance); - 8006e50: 687b ldr r3, [r7, #4] - 8006e52: 681b ldr r3, [r3, #0] - 8006e54: 0018 movs r0, r3 - 8006e56: f7ff fa03 bl 8006260 + 80070d8: 687b ldr r3, [r7, #4] + 80070da: 681b ldr r3, [r3, #0] + 80070dc: 0018 movs r0, r3 + 80070de: f7ff fa03 bl 80064e8 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); - 8006e5a: 687b ldr r3, [r7, #4] - 8006e5c: 681b ldr r3, [r3, #0] - 8006e5e: 2203 movs r2, #3 - 8006e60: 601a str r2, [r3, #0] + 80070e2: 687b ldr r3, [r7, #4] + 80070e4: 681b ldr r3, [r3, #0] + 80070e6: 2203 movs r2, #3 + 80070e8: 601a str r2, [r3, #0] return HAL_ERROR; } /* Wait for ADC effectively disabled */ /* Get tick count */ tickstart = HAL_GetTick(); - 8006e62: f7ff f8b9 bl 8005fd8 - 8006e66: 0003 movs r3, r0 - 8006e68: 60bb str r3, [r7, #8] + 80070ea: f7ff f8b9 bl 8006260 + 80070ee: 0003 movs r3, r0 + 80070f0: 60bb str r3, [r7, #8] while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 8006e6a: e028 b.n 8006ebe + 80070f2: e028 b.n 8007146 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8006e6c: 687b ldr r3, [r7, #4] - 8006e6e: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006e70: 2210 movs r2, #16 - 8006e72: 431a orrs r2, r3 - 8006e74: 687b ldr r3, [r7, #4] - 8006e76: 659a str r2, [r3, #88] ; 0x58 + 80070f4: 687b ldr r3, [r7, #4] + 80070f6: 6d9b ldr r3, [r3, #88] ; 0x58 + 80070f8: 2210 movs r2, #16 + 80070fa: 431a orrs r2, r3 + 80070fc: 687b ldr r3, [r7, #4] + 80070fe: 659a str r2, [r3, #88] ; 0x58 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8006e78: 687b ldr r3, [r7, #4] - 8006e7a: 6ddb ldr r3, [r3, #92] ; 0x5c - 8006e7c: 2201 movs r2, #1 - 8006e7e: 431a orrs r2, r3 - 8006e80: 687b ldr r3, [r7, #4] - 8006e82: 65da str r2, [r3, #92] ; 0x5c + 8007100: 687b ldr r3, [r7, #4] + 8007102: 6ddb ldr r3, [r3, #92] ; 0x5c + 8007104: 2201 movs r2, #1 + 8007106: 431a orrs r2, r3 + 8007108: 687b ldr r3, [r7, #4] + 800710a: 65da str r2, [r3, #92] ; 0x5c return HAL_ERROR; - 8006e84: 2301 movs r3, #1 - 8006e86: e021 b.n 8006ecc + 800710c: 2301 movs r3, #1 + 800710e: e021 b.n 8007154 { if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 8006e88: f7ff f8a6 bl 8005fd8 - 8006e8c: 0002 movs r2, r0 - 8006e8e: 68bb ldr r3, [r7, #8] - 8006e90: 1ad3 subs r3, r2, r3 - 8006e92: 2b02 cmp r3, #2 - 8006e94: d913 bls.n 8006ebe + 8007110: f7ff f8a6 bl 8006260 + 8007114: 0002 movs r2, r0 + 8007116: 68bb ldr r3, [r7, #8] + 8007118: 1ad3 subs r3, r2, r3 + 800711a: 2b02 cmp r3, #2 + 800711c: d913 bls.n 8007146 { /* New check to avoid false timeout detection in case of preemption */ if ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 8006e96: 687b ldr r3, [r7, #4] - 8006e98: 681b ldr r3, [r3, #0] - 8006e9a: 689b ldr r3, [r3, #8] - 8006e9c: 2201 movs r2, #1 - 8006e9e: 4013 ands r3, r2 - 8006ea0: d00d beq.n 8006ebe + 800711e: 687b ldr r3, [r7, #4] + 8007120: 681b ldr r3, [r3, #0] + 8007122: 689b ldr r3, [r3, #8] + 8007124: 2201 movs r2, #1 + 8007126: 4013 ands r3, r2 + 8007128: d00d beq.n 8007146 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8006ea2: 687b ldr r3, [r7, #4] - 8006ea4: 6d9b ldr r3, [r3, #88] ; 0x58 - 8006ea6: 2210 movs r2, #16 - 8006ea8: 431a orrs r2, r3 - 8006eaa: 687b ldr r3, [r7, #4] - 8006eac: 659a str r2, [r3, #88] ; 0x58 + 800712a: 687b ldr r3, [r7, #4] + 800712c: 6d9b ldr r3, [r3, #88] ; 0x58 + 800712e: 2210 movs r2, #16 + 8007130: 431a orrs r2, r3 + 8007132: 687b ldr r3, [r7, #4] + 8007134: 659a str r2, [r3, #88] ; 0x58 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8006eae: 687b ldr r3, [r7, #4] - 8006eb0: 6ddb ldr r3, [r3, #92] ; 0x5c - 8006eb2: 2201 movs r2, #1 - 8006eb4: 431a orrs r2, r3 - 8006eb6: 687b ldr r3, [r7, #4] - 8006eb8: 65da str r2, [r3, #92] ; 0x5c + 8007136: 687b ldr r3, [r7, #4] + 8007138: 6ddb ldr r3, [r3, #92] ; 0x5c + 800713a: 2201 movs r2, #1 + 800713c: 431a orrs r2, r3 + 800713e: 687b ldr r3, [r7, #4] + 8007140: 65da str r2, [r3, #92] ; 0x5c return HAL_ERROR; - 8006eba: 2301 movs r3, #1 - 8006ebc: e006 b.n 8006ecc + 8007142: 2301 movs r3, #1 + 8007144: e006 b.n 8007154 while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 8006ebe: 687b ldr r3, [r7, #4] - 8006ec0: 681b ldr r3, [r3, #0] - 8006ec2: 689b ldr r3, [r3, #8] - 8006ec4: 2201 movs r2, #1 - 8006ec6: 4013 ands r3, r2 - 8006ec8: d1de bne.n 8006e88 + 8007146: 687b ldr r3, [r7, #4] + 8007148: 681b ldr r3, [r3, #0] + 800714a: 689b ldr r3, [r3, #8] + 800714c: 2201 movs r2, #1 + 800714e: 4013 ands r3, r2 + 8007150: d1de bne.n 8007110 } } } /* Return HAL status */ return HAL_OK; - 8006eca: 2300 movs r3, #0 + 8007152: 2300 movs r3, #0 } - 8006ecc: 0018 movs r0, r3 - 8006ece: 46bd mov sp, r7 - 8006ed0: b004 add sp, #16 - 8006ed2: bd80 pop {r7, pc} + 8007154: 0018 movs r0, r3 + 8007156: 46bd mov sp, r7 + 8007158: b004 add sp, #16 + 800715a: bd80 pop {r7, pc} -08006ed4 : +0800715c : { - 8006ed4: b580 push {r7, lr} - 8006ed6: b082 sub sp, #8 - 8006ed8: af00 add r7, sp, #0 - 8006eda: 6078 str r0, [r7, #4] - 8006edc: 6039 str r1, [r7, #0] + 800715c: b580 push {r7, lr} + 800715e: b082 sub sp, #8 + 8007160: af00 add r7, sp, #0 + 8007162: 6078 str r0, [r7, #4] + 8007164: 6039 str r1, [r7, #0] MODIFY_REG(ADCx->CALFACT, - 8006ede: 687b ldr r3, [r7, #4] - 8006ee0: 22b4 movs r2, #180 ; 0xb4 - 8006ee2: 589b ldr r3, [r3, r2] - 8006ee4: 227f movs r2, #127 ; 0x7f - 8006ee6: 4393 bics r3, r2 - 8006ee8: 001a movs r2, r3 - 8006eea: 683b ldr r3, [r7, #0] - 8006eec: 431a orrs r2, r3 - 8006eee: 687b ldr r3, [r7, #4] - 8006ef0: 21b4 movs r1, #180 ; 0xb4 - 8006ef2: 505a str r2, [r3, r1] + 8007166: 687b ldr r3, [r7, #4] + 8007168: 22b4 movs r2, #180 ; 0xb4 + 800716a: 589b ldr r3, [r3, r2] + 800716c: 227f movs r2, #127 ; 0x7f + 800716e: 4393 bics r3, r2 + 8007170: 001a movs r2, r3 + 8007172: 683b ldr r3, [r7, #0] + 8007174: 431a orrs r2, r3 + 8007176: 687b ldr r3, [r7, #4] + 8007178: 21b4 movs r1, #180 ; 0xb4 + 800717a: 505a str r2, [r3, r1] } - 8006ef4: 46c0 nop ; (mov r8, r8) - 8006ef6: 46bd mov sp, r7 - 8006ef8: b002 add sp, #8 - 8006efa: bd80 pop {r7, pc} + 800717c: 46c0 nop ; (mov r8, r8) + 800717e: 46bd mov sp, r7 + 8007180: b002 add sp, #8 + 8007182: bd80 pop {r7, pc} -08006efc : +08007184 : { - 8006efc: b580 push {r7, lr} - 8006efe: b082 sub sp, #8 - 8006f00: af00 add r7, sp, #0 - 8006f02: 6078 str r0, [r7, #4] + 8007184: b580 push {r7, lr} + 8007186: b082 sub sp, #8 + 8007188: af00 add r7, sp, #0 + 800718a: 6078 str r0, [r7, #4] return (uint32_t)(READ_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT)); - 8006f04: 687b ldr r3, [r7, #4] - 8006f06: 22b4 movs r2, #180 ; 0xb4 - 8006f08: 589b ldr r3, [r3, r2] - 8006f0a: 227f movs r2, #127 ; 0x7f - 8006f0c: 4013 ands r3, r2 + 800718c: 687b ldr r3, [r7, #4] + 800718e: 22b4 movs r2, #180 ; 0xb4 + 8007190: 589b ldr r3, [r3, r2] + 8007192: 227f movs r2, #127 ; 0x7f + 8007194: 4013 ands r3, r2 } - 8006f0e: 0018 movs r0, r3 - 8006f10: 46bd mov sp, r7 - 8006f12: b002 add sp, #8 - 8006f14: bd80 pop {r7, pc} + 8007196: 0018 movs r0, r3 + 8007198: 46bd mov sp, r7 + 800719a: b002 add sp, #8 + 800719c: bd80 pop {r7, pc} ... -08006f18 : +080071a0 : { - 8006f18: b580 push {r7, lr} - 8006f1a: b082 sub sp, #8 - 8006f1c: af00 add r7, sp, #0 - 8006f1e: 6078 str r0, [r7, #4] + 80071a0: b580 push {r7, lr} + 80071a2: b082 sub sp, #8 + 80071a4: af00 add r7, sp, #0 + 80071a6: 6078 str r0, [r7, #4] MODIFY_REG(ADCx->CR, - 8006f20: 687b ldr r3, [r7, #4] - 8006f22: 689b ldr r3, [r3, #8] - 8006f24: 4a04 ldr r2, [pc, #16] ; (8006f38 ) - 8006f26: 4013 ands r3, r2 - 8006f28: 2201 movs r2, #1 - 8006f2a: 431a orrs r2, r3 - 8006f2c: 687b ldr r3, [r7, #4] - 8006f2e: 609a str r2, [r3, #8] + 80071a8: 687b ldr r3, [r7, #4] + 80071aa: 689b ldr r3, [r3, #8] + 80071ac: 4a04 ldr r2, [pc, #16] ; (80071c0 ) + 80071ae: 4013 ands r3, r2 + 80071b0: 2201 movs r2, #1 + 80071b2: 431a orrs r2, r3 + 80071b4: 687b ldr r3, [r7, #4] + 80071b6: 609a str r2, [r3, #8] } - 8006f30: 46c0 nop ; (mov r8, r8) - 8006f32: 46bd mov sp, r7 - 8006f34: b002 add sp, #8 - 8006f36: bd80 pop {r7, pc} - 8006f38: 7fffffe8 .word 0x7fffffe8 + 80071b8: 46c0 nop ; (mov r8, r8) + 80071ba: 46bd mov sp, r7 + 80071bc: b002 add sp, #8 + 80071be: bd80 pop {r7, pc} + 80071c0: 7fffffe8 .word 0x7fffffe8 -08006f3c : +080071c4 : { - 8006f3c: b580 push {r7, lr} - 8006f3e: b082 sub sp, #8 - 8006f40: af00 add r7, sp, #0 - 8006f42: 6078 str r0, [r7, #4] + 80071c4: b580 push {r7, lr} + 80071c6: b082 sub sp, #8 + 80071c8: af00 add r7, sp, #0 + 80071ca: 6078 str r0, [r7, #4] MODIFY_REG(ADCx->CR, - 8006f44: 687b ldr r3, [r7, #4] - 8006f46: 689b ldr r3, [r3, #8] - 8006f48: 4a04 ldr r2, [pc, #16] ; (8006f5c ) - 8006f4a: 4013 ands r3, r2 - 8006f4c: 2202 movs r2, #2 - 8006f4e: 431a orrs r2, r3 - 8006f50: 687b ldr r3, [r7, #4] - 8006f52: 609a str r2, [r3, #8] + 80071cc: 687b ldr r3, [r7, #4] + 80071ce: 689b ldr r3, [r3, #8] + 80071d0: 4a04 ldr r2, [pc, #16] ; (80071e4 ) + 80071d2: 4013 ands r3, r2 + 80071d4: 2202 movs r2, #2 + 80071d6: 431a orrs r2, r3 + 80071d8: 687b ldr r3, [r7, #4] + 80071da: 609a str r2, [r3, #8] } - 8006f54: 46c0 nop ; (mov r8, r8) - 8006f56: 46bd mov sp, r7 - 8006f58: b002 add sp, #8 - 8006f5a: bd80 pop {r7, pc} - 8006f5c: 7fffffe8 .word 0x7fffffe8 + 80071dc: 46c0 nop ; (mov r8, r8) + 80071de: 46bd mov sp, r7 + 80071e0: b002 add sp, #8 + 80071e2: bd80 pop {r7, pc} + 80071e4: 7fffffe8 .word 0x7fffffe8 -08006f60 : +080071e8 : { - 8006f60: b580 push {r7, lr} - 8006f62: b082 sub sp, #8 - 8006f64: af00 add r7, sp, #0 - 8006f66: 6078 str r0, [r7, #4] + 80071e8: b580 push {r7, lr} + 80071ea: b082 sub sp, #8 + 80071ec: af00 add r7, sp, #0 + 80071ee: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); - 8006f68: 687b ldr r3, [r7, #4] - 8006f6a: 689b ldr r3, [r3, #8] - 8006f6c: 2201 movs r2, #1 - 8006f6e: 4013 ands r3, r2 - 8006f70: 2b01 cmp r3, #1 - 8006f72: d101 bne.n 8006f78 - 8006f74: 2301 movs r3, #1 - 8006f76: e000 b.n 8006f7a - 8006f78: 2300 movs r3, #0 + 80071f0: 687b ldr r3, [r7, #4] + 80071f2: 689b ldr r3, [r3, #8] + 80071f4: 2201 movs r2, #1 + 80071f6: 4013 ands r3, r2 + 80071f8: 2b01 cmp r3, #1 + 80071fa: d101 bne.n 8007200 + 80071fc: 2301 movs r3, #1 + 80071fe: e000 b.n 8007202 + 8007200: 2300 movs r3, #0 } - 8006f7a: 0018 movs r0, r3 - 8006f7c: 46bd mov sp, r7 - 8006f7e: b002 add sp, #8 - 8006f80: bd80 pop {r7, pc} + 8007202: 0018 movs r0, r3 + 8007204: 46bd mov sp, r7 + 8007206: b002 add sp, #8 + 8007208: bd80 pop {r7, pc} ... -08006f84 : +0800720c : { - 8006f84: b580 push {r7, lr} - 8006f86: b082 sub sp, #8 - 8006f88: af00 add r7, sp, #0 - 8006f8a: 6078 str r0, [r7, #4] + 800720c: b580 push {r7, lr} + 800720e: b082 sub sp, #8 + 8007210: af00 add r7, sp, #0 + 8007212: 6078 str r0, [r7, #4] MODIFY_REG(ADCx->CR, - 8006f8c: 687b ldr r3, [r7, #4] - 8006f8e: 689b ldr r3, [r3, #8] - 8006f90: 4a05 ldr r2, [pc, #20] ; (8006fa8 ) - 8006f92: 4013 ands r3, r2 - 8006f94: 2280 movs r2, #128 ; 0x80 - 8006f96: 0612 lsls r2, r2, #24 - 8006f98: 431a orrs r2, r3 - 8006f9a: 687b ldr r3, [r7, #4] - 8006f9c: 609a str r2, [r3, #8] + 8007214: 687b ldr r3, [r7, #4] + 8007216: 689b ldr r3, [r3, #8] + 8007218: 4a05 ldr r2, [pc, #20] ; (8007230 ) + 800721a: 4013 ands r3, r2 + 800721c: 2280 movs r2, #128 ; 0x80 + 800721e: 0612 lsls r2, r2, #24 + 8007220: 431a orrs r2, r3 + 8007222: 687b ldr r3, [r7, #4] + 8007224: 609a str r2, [r3, #8] } - 8006f9e: 46c0 nop ; (mov r8, r8) - 8006fa0: 46bd mov sp, r7 - 8006fa2: b002 add sp, #8 - 8006fa4: bd80 pop {r7, pc} - 8006fa6: 46c0 nop ; (mov r8, r8) - 8006fa8: 7fffffe8 .word 0x7fffffe8 + 8007226: 46c0 nop ; (mov r8, r8) + 8007228: 46bd mov sp, r7 + 800722a: b002 add sp, #8 + 800722c: bd80 pop {r7, pc} + 800722e: 46c0 nop ; (mov r8, r8) + 8007230: 7fffffe8 .word 0x7fffffe8 -08006fac : +08007234 : { - 8006fac: b580 push {r7, lr} - 8006fae: b082 sub sp, #8 - 8006fb0: af00 add r7, sp, #0 - 8006fb2: 6078 str r0, [r7, #4] + 8007234: b580 push {r7, lr} + 8007236: b082 sub sp, #8 + 8007238: af00 add r7, sp, #0 + 800723a: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL)) ? 1UL : 0UL); - 8006fb4: 687b ldr r3, [r7, #4] - 8006fb6: 689b ldr r3, [r3, #8] - 8006fb8: 0fdb lsrs r3, r3, #31 - 8006fba: 07da lsls r2, r3, #31 - 8006fbc: 2380 movs r3, #128 ; 0x80 - 8006fbe: 061b lsls r3, r3, #24 - 8006fc0: 429a cmp r2, r3 - 8006fc2: d101 bne.n 8006fc8 - 8006fc4: 2301 movs r3, #1 - 8006fc6: e000 b.n 8006fca - 8006fc8: 2300 movs r3, #0 + 800723c: 687b ldr r3, [r7, #4] + 800723e: 689b ldr r3, [r3, #8] + 8007240: 0fdb lsrs r3, r3, #31 + 8007242: 07da lsls r2, r3, #31 + 8007244: 2380 movs r3, #128 ; 0x80 + 8007246: 061b lsls r3, r3, #24 + 8007248: 429a cmp r2, r3 + 800724a: d101 bne.n 8007250 + 800724c: 2301 movs r3, #1 + 800724e: e000 b.n 8007252 + 8007250: 2300 movs r3, #0 } - 8006fca: 0018 movs r0, r3 - 8006fcc: 46bd mov sp, r7 - 8006fce: b002 add sp, #8 - 8006fd0: bd80 pop {r7, pc} + 8007252: 0018 movs r0, r3 + 8007254: 46bd mov sp, r7 + 8007256: b002 add sp, #8 + 8007258: bd80 pop {r7, pc} ... -08006fd4 : +0800725c : * HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]). * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc) { - 8006fd4: b590 push {r4, r7, lr} - 8006fd6: b089 sub sp, #36 ; 0x24 - 8006fd8: af00 add r7, sp, #0 - 8006fda: 6078 str r0, [r7, #4] + 800725c: b590 push {r4, r7, lr} + 800725e: b089 sub sp, #36 ; 0x24 + 8007260: af00 add r7, sp, #0 + 8007262: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status; __IO uint32_t wait_loop_index = 0UL; - 8006fdc: 2300 movs r3, #0 - 8006fde: 60bb str r3, [r7, #8] + 8007264: 2300 movs r3, #0 + 8007266: 60bb str r3, [r7, #8] uint32_t backup_setting_cfgr1; uint32_t calibration_index; uint32_t calibration_factor_accumulated = 0; - 8006fe0: 2300 movs r3, #0 - 8006fe2: 61bb str r3, [r7, #24] + 8007268: 2300 movs r3, #0 + 800726a: 61bb str r3, [r7, #24] uint32_t tickstart; /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); __HAL_LOCK(hadc); - 8006fe4: 687b ldr r3, [r7, #4] - 8006fe6: 2254 movs r2, #84 ; 0x54 - 8006fe8: 5c9b ldrb r3, [r3, r2] - 8006fea: 2b01 cmp r3, #1 - 8006fec: d101 bne.n 8006ff2 - 8006fee: 2302 movs r3, #2 - 8006ff0: e0ba b.n 8007168 - 8006ff2: 687b ldr r3, [r7, #4] - 8006ff4: 2254 movs r2, #84 ; 0x54 - 8006ff6: 2101 movs r1, #1 - 8006ff8: 5499 strb r1, [r3, r2] + 800726c: 687b ldr r3, [r7, #4] + 800726e: 2254 movs r2, #84 ; 0x54 + 8007270: 5c9b ldrb r3, [r3, r2] + 8007272: 2b01 cmp r3, #1 + 8007274: d101 bne.n 800727a + 8007276: 2302 movs r3, #2 + 8007278: e0ba b.n 80073f0 + 800727a: 687b ldr r3, [r7, #4] + 800727c: 2254 movs r2, #84 ; 0x54 + 800727e: 2101 movs r1, #1 + 8007280: 5499 strb r1, [r3, r2] /* Calibration prerequisite: ADC must be disabled. */ /* Disable the ADC (if not already disabled) */ tmp_hal_status = ADC_Disable(hadc); - 8006ffa: 2317 movs r3, #23 - 8006ffc: 18fc adds r4, r7, r3 - 8006ffe: 687b ldr r3, [r7, #4] - 8007000: 0018 movs r0, r3 - 8007002: f7ff ff09 bl 8006e18 - 8007006: 0003 movs r3, r0 - 8007008: 7023 strb r3, [r4, #0] + 8007282: 2317 movs r3, #23 + 8007284: 18fc adds r4, r7, r3 + 8007286: 687b ldr r3, [r7, #4] + 8007288: 0018 movs r0, r3 + 800728a: f7ff ff09 bl 80070a0 + 800728e: 0003 movs r3, r0 + 8007290: 7023 strb r3, [r4, #0] /* Check if ADC is effectively disabled */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 800700a: 687b ldr r3, [r7, #4] - 800700c: 681b ldr r3, [r3, #0] - 800700e: 0018 movs r0, r3 - 8007010: f7ff ffa6 bl 8006f60 - 8007014: 1e03 subs r3, r0, #0 - 8007016: d000 beq.n 800701a - 8007018: e099 b.n 800714e + 8007292: 687b ldr r3, [r7, #4] + 8007294: 681b ldr r3, [r3, #0] + 8007296: 0018 movs r0, r3 + 8007298: f7ff ffa6 bl 80071e8 + 800729c: 1e03 subs r3, r0, #0 + 800729e: d000 beq.n 80072a2 + 80072a0: e099 b.n 80073d6 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 800701a: 687b ldr r3, [r7, #4] - 800701c: 6d9b ldr r3, [r3, #88] ; 0x58 - 800701e: 4a54 ldr r2, [pc, #336] ; (8007170 ) - 8007020: 4013 ands r3, r2 - 8007022: 2202 movs r2, #2 - 8007024: 431a orrs r2, r3 - 8007026: 687b ldr r3, [r7, #4] - 8007028: 659a str r2, [r3, #88] ; 0x58 + 80072a2: 687b ldr r3, [r7, #4] + 80072a4: 6d9b ldr r3, [r3, #88] ; 0x58 + 80072a6: 4a54 ldr r2, [pc, #336] ; (80073f8 ) + 80072a8: 4013 ands r3, r2 + 80072aa: 2202 movs r2, #2 + 80072ac: 431a orrs r2, r3 + 80072ae: 687b ldr r3, [r7, #4] + 80072b0: 659a str r2, [r3, #88] ; 0x58 /* Note: Specificity of this STM32 series: Calibration factor is */ /* available in data register and also transferred by DMA. */ /* To not insert ADC calibration factor among ADC conversion data */ /* in array variable, DMA transfer must be disabled during */ /* calibration. */ backup_setting_cfgr1 = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG | ADC_CFGR1_AUTOFF); - 800702a: 687b ldr r3, [r7, #4] - 800702c: 681b ldr r3, [r3, #0] - 800702e: 68db ldr r3, [r3, #12] - 8007030: 4a50 ldr r2, [pc, #320] ; (8007174 ) - 8007032: 4013 ands r3, r2 - 8007034: 613b str r3, [r7, #16] + 80072b2: 687b ldr r3, [r7, #4] + 80072b4: 681b ldr r3, [r3, #0] + 80072b6: 68db ldr r3, [r3, #12] + 80072b8: 4a50 ldr r2, [pc, #320] ; (80073fc ) + 80072ba: 4013 ands r3, r2 + 80072bc: 613b str r3, [r7, #16] CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG | ADC_CFGR1_AUTOFF); - 8007036: 687b ldr r3, [r7, #4] - 8007038: 681b ldr r3, [r3, #0] - 800703a: 68da ldr r2, [r3, #12] - 800703c: 687b ldr r3, [r7, #4] - 800703e: 681b ldr r3, [r3, #0] - 8007040: 494d ldr r1, [pc, #308] ; (8007178 ) - 8007042: 400a ands r2, r1 - 8007044: 60da str r2, [r3, #12] + 80072be: 687b ldr r3, [r7, #4] + 80072c0: 681b ldr r3, [r3, #0] + 80072c2: 68da ldr r2, [r3, #12] + 80072c4: 687b ldr r3, [r7, #4] + 80072c6: 681b ldr r3, [r3, #0] + 80072c8: 494d ldr r1, [pc, #308] ; (8007400 ) + 80072ca: 400a ands r2, r1 + 80072cc: 60da str r2, [r3, #12] /* ADC calibration procedure */ /* Note: Perform an averaging of 8 calibrations for optimized accuracy */ for (calibration_index = 0UL; calibration_index < 8UL; calibration_index++) - 8007046: 2300 movs r3, #0 - 8007048: 61fb str r3, [r7, #28] - 800704a: e02d b.n 80070a8 + 80072ce: 2300 movs r3, #0 + 80072d0: 61fb str r3, [r7, #28] + 80072d2: e02d b.n 8007330 { /* Start ADC calibration */ LL_ADC_StartCalibration(hadc->Instance); - 800704c: 687b ldr r3, [r7, #4] - 800704e: 681b ldr r3, [r3, #0] - 8007050: 0018 movs r0, r3 - 8007052: f7ff ff97 bl 8006f84 + 80072d4: 687b ldr r3, [r7, #4] + 80072d6: 681b ldr r3, [r3, #0] + 80072d8: 0018 movs r0, r3 + 80072da: f7ff ff97 bl 800720c /* Wait for calibration completion */ while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL) - 8007056: e014 b.n 8007082 + 80072de: e014 b.n 800730a { wait_loop_index++; - 8007058: 68bb ldr r3, [r7, #8] - 800705a: 3301 adds r3, #1 - 800705c: 60bb str r3, [r7, #8] + 80072e0: 68bb ldr r3, [r7, #8] + 80072e2: 3301 adds r3, #1 + 80072e4: 60bb str r3, [r7, #8] if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) - 800705e: 68bb ldr r3, [r7, #8] - 8007060: 4a46 ldr r2, [pc, #280] ; (800717c ) - 8007062: 4293 cmp r3, r2 - 8007064: d90d bls.n 8007082 + 80072e6: 68bb ldr r3, [r7, #8] + 80072e8: 4a46 ldr r2, [pc, #280] ; (8007404 ) + 80072ea: 4293 cmp r3, r2 + 80072ec: d90d bls.n 800730a { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, - 8007066: 687b ldr r3, [r7, #4] - 8007068: 6d9b ldr r3, [r3, #88] ; 0x58 - 800706a: 2212 movs r2, #18 - 800706c: 4393 bics r3, r2 - 800706e: 2210 movs r2, #16 - 8007070: 431a orrs r2, r3 - 8007072: 687b ldr r3, [r7, #4] - 8007074: 659a str r2, [r3, #88] ; 0x58 + 80072ee: 687b ldr r3, [r7, #4] + 80072f0: 6d9b ldr r3, [r3, #88] ; 0x58 + 80072f2: 2212 movs r2, #18 + 80072f4: 4393 bics r3, r2 + 80072f6: 2210 movs r2, #16 + 80072f8: 431a orrs r2, r3 + 80072fa: 687b ldr r3, [r7, #4] + 80072fc: 659a str r2, [r3, #88] ; 0x58 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); __HAL_UNLOCK(hadc); - 8007076: 687b ldr r3, [r7, #4] - 8007078: 2254 movs r2, #84 ; 0x54 - 800707a: 2100 movs r1, #0 - 800707c: 5499 strb r1, [r3, r2] + 80072fe: 687b ldr r3, [r7, #4] + 8007300: 2254 movs r2, #84 ; 0x54 + 8007302: 2100 movs r1, #0 + 8007304: 5499 strb r1, [r3, r2] return HAL_ERROR; - 800707e: 2301 movs r3, #1 - 8007080: e072 b.n 8007168 + 8007306: 2301 movs r3, #1 + 8007308: e072 b.n 80073f0 while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL) - 8007082: 687b ldr r3, [r7, #4] - 8007084: 681b ldr r3, [r3, #0] - 8007086: 0018 movs r0, r3 - 8007088: f7ff ff90 bl 8006fac - 800708c: 1e03 subs r3, r0, #0 - 800708e: d1e3 bne.n 8007058 + 800730a: 687b ldr r3, [r7, #4] + 800730c: 681b ldr r3, [r3, #0] + 800730e: 0018 movs r0, r3 + 8007310: f7ff ff90 bl 8007234 + 8007314: 1e03 subs r3, r0, #0 + 8007316: d1e3 bne.n 80072e0 } } calibration_factor_accumulated += LL_ADC_GetCalibrationFactor(hadc->Instance); - 8007090: 687b ldr r3, [r7, #4] - 8007092: 681b ldr r3, [r3, #0] - 8007094: 0018 movs r0, r3 - 8007096: f7ff ff31 bl 8006efc - 800709a: 0002 movs r2, r0 - 800709c: 69bb ldr r3, [r7, #24] - 800709e: 189b adds r3, r3, r2 - 80070a0: 61bb str r3, [r7, #24] + 8007318: 687b ldr r3, [r7, #4] + 800731a: 681b ldr r3, [r3, #0] + 800731c: 0018 movs r0, r3 + 800731e: f7ff ff31 bl 8007184 + 8007322: 0002 movs r2, r0 + 8007324: 69bb ldr r3, [r7, #24] + 8007326: 189b adds r3, r3, r2 + 8007328: 61bb str r3, [r7, #24] for (calibration_index = 0UL; calibration_index < 8UL; calibration_index++) - 80070a2: 69fb ldr r3, [r7, #28] - 80070a4: 3301 adds r3, #1 - 80070a6: 61fb str r3, [r7, #28] - 80070a8: 69fb ldr r3, [r7, #28] - 80070aa: 2b07 cmp r3, #7 - 80070ac: d9ce bls.n 800704c + 800732a: 69fb ldr r3, [r7, #28] + 800732c: 3301 adds r3, #1 + 800732e: 61fb str r3, [r7, #28] + 8007330: 69fb ldr r3, [r7, #28] + 8007332: 2b07 cmp r3, #7 + 8007334: d9ce bls.n 80072d4 } /* Compute average */ calibration_factor_accumulated /= calibration_index; - 80070ae: 69f9 ldr r1, [r7, #28] - 80070b0: 69b8 ldr r0, [r7, #24] - 80070b2: f7f9 f83b bl 800012c <__udivsi3> - 80070b6: 0003 movs r3, r0 - 80070b8: 61bb str r3, [r7, #24] + 8007336: 69f9 ldr r1, [r7, #28] + 8007338: 69b8 ldr r0, [r7, #24] + 800733a: f7f8 fef7 bl 800012c <__udivsi3> + 800733e: 0003 movs r3, r0 + 8007340: 61bb str r3, [r7, #24] /* Apply calibration factor */ LL_ADC_Enable(hadc->Instance); - 80070ba: 687b ldr r3, [r7, #4] - 80070bc: 681b ldr r3, [r3, #0] - 80070be: 0018 movs r0, r3 - 80070c0: f7ff ff2a bl 8006f18 + 8007342: 687b ldr r3, [r7, #4] + 8007344: 681b ldr r3, [r3, #0] + 8007346: 0018 movs r0, r3 + 8007348: f7ff ff2a bl 80071a0 LL_ADC_SetCalibrationFactor(hadc->Instance, calibration_factor_accumulated); - 80070c4: 687b ldr r3, [r7, #4] - 80070c6: 681b ldr r3, [r3, #0] - 80070c8: 69ba ldr r2, [r7, #24] - 80070ca: 0011 movs r1, r2 - 80070cc: 0018 movs r0, r3 - 80070ce: f7ff ff01 bl 8006ed4 + 800734c: 687b ldr r3, [r7, #4] + 800734e: 681b ldr r3, [r3, #0] + 8007350: 69ba ldr r2, [r7, #24] + 8007352: 0011 movs r1, r2 + 8007354: 0018 movs r0, r3 + 8007356: f7ff ff01 bl 800715c LL_ADC_Disable(hadc->Instance); - 80070d2: 687b ldr r3, [r7, #4] - 80070d4: 681b ldr r3, [r3, #0] - 80070d6: 0018 movs r0, r3 - 80070d8: f7ff ff30 bl 8006f3c + 800735a: 687b ldr r3, [r7, #4] + 800735c: 681b ldr r3, [r3, #0] + 800735e: 0018 movs r0, r3 + 8007360: f7ff ff30 bl 80071c4 /* Wait for ADC effectively disabled before changing configuration */ /* Get tick count */ tickstart = HAL_GetTick(); - 80070dc: f7fe ff7c bl 8005fd8 - 80070e0: 0003 movs r3, r0 - 80070e2: 60fb str r3, [r7, #12] + 8007364: f7fe ff7c bl 8006260 + 8007368: 0003 movs r3, r0 + 800736a: 60fb str r3, [r7, #12] while (LL_ADC_IsEnabled(hadc->Instance) != 0UL) - 80070e4: e01b b.n 800711e + 800736c: e01b b.n 80073a6 { if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 80070e6: f7fe ff77 bl 8005fd8 - 80070ea: 0002 movs r2, r0 - 80070ec: 68fb ldr r3, [r7, #12] - 80070ee: 1ad3 subs r3, r2, r3 - 80070f0: 2b02 cmp r3, #2 - 80070f2: d914 bls.n 800711e + 800736e: f7fe ff77 bl 8006260 + 8007372: 0002 movs r2, r0 + 8007374: 68fb ldr r3, [r7, #12] + 8007376: 1ad3 subs r3, r2, r3 + 8007378: 2b02 cmp r3, #2 + 800737a: d914 bls.n 80073a6 { /* New check to avoid false timeout detection in case of preemption */ if (LL_ADC_IsEnabled(hadc->Instance) != 0UL) - 80070f4: 687b ldr r3, [r7, #4] - 80070f6: 681b ldr r3, [r3, #0] - 80070f8: 0018 movs r0, r3 - 80070fa: f7ff ff31 bl 8006f60 - 80070fe: 1e03 subs r3, r0, #0 - 8007100: d00d beq.n 800711e + 800737c: 687b ldr r3, [r7, #4] + 800737e: 681b ldr r3, [r3, #0] + 8007380: 0018 movs r0, r3 + 8007382: f7ff ff31 bl 80071e8 + 8007386: 1e03 subs r3, r0, #0 + 8007388: d00d beq.n 80073a6 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8007102: 687b ldr r3, [r7, #4] - 8007104: 6d9b ldr r3, [r3, #88] ; 0x58 - 8007106: 2210 movs r2, #16 - 8007108: 431a orrs r2, r3 - 800710a: 687b ldr r3, [r7, #4] - 800710c: 659a str r2, [r3, #88] ; 0x58 + 800738a: 687b ldr r3, [r7, #4] + 800738c: 6d9b ldr r3, [r3, #88] ; 0x58 + 800738e: 2210 movs r2, #16 + 8007390: 431a orrs r2, r3 + 8007392: 687b ldr r3, [r7, #4] + 8007394: 659a str r2, [r3, #88] ; 0x58 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 800710e: 687b ldr r3, [r7, #4] - 8007110: 6ddb ldr r3, [r3, #92] ; 0x5c - 8007112: 2201 movs r2, #1 - 8007114: 431a orrs r2, r3 - 8007116: 687b ldr r3, [r7, #4] - 8007118: 65da str r2, [r3, #92] ; 0x5c + 8007396: 687b ldr r3, [r7, #4] + 8007398: 6ddb ldr r3, [r3, #92] ; 0x5c + 800739a: 2201 movs r2, #1 + 800739c: 431a orrs r2, r3 + 800739e: 687b ldr r3, [r7, #4] + 80073a0: 65da str r2, [r3, #92] ; 0x5c return HAL_ERROR; - 800711a: 2301 movs r3, #1 - 800711c: e024 b.n 8007168 + 80073a2: 2301 movs r3, #1 + 80073a4: e024 b.n 80073f0 while (LL_ADC_IsEnabled(hadc->Instance) != 0UL) - 800711e: 687b ldr r3, [r7, #4] - 8007120: 681b ldr r3, [r3, #0] - 8007122: 0018 movs r0, r3 - 8007124: f7ff ff1c bl 8006f60 - 8007128: 1e03 subs r3, r0, #0 - 800712a: d1dc bne.n 80070e6 + 80073a6: 687b ldr r3, [r7, #4] + 80073a8: 681b ldr r3, [r3, #0] + 80073aa: 0018 movs r0, r3 + 80073ac: f7ff ff1c bl 80071e8 + 80073b0: 1e03 subs r3, r0, #0 + 80073b2: d1dc bne.n 800736e } } } /* Restore configuration after calibration */ SET_BIT(hadc->Instance->CFGR1, backup_setting_cfgr1); - 800712c: 687b ldr r3, [r7, #4] - 800712e: 681b ldr r3, [r3, #0] - 8007130: 68d9 ldr r1, [r3, #12] - 8007132: 687b ldr r3, [r7, #4] - 8007134: 681b ldr r3, [r3, #0] - 8007136: 693a ldr r2, [r7, #16] - 8007138: 430a orrs r2, r1 - 800713a: 60da str r2, [r3, #12] + 80073b4: 687b ldr r3, [r7, #4] + 80073b6: 681b ldr r3, [r3, #0] + 80073b8: 68d9 ldr r1, [r3, #12] + 80073ba: 687b ldr r3, [r7, #4] + 80073bc: 681b ldr r3, [r3, #0] + 80073be: 693a ldr r2, [r7, #16] + 80073c0: 430a orrs r2, r1 + 80073c2: 60da str r2, [r3, #12] /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 800713c: 687b ldr r3, [r7, #4] - 800713e: 6d9b ldr r3, [r3, #88] ; 0x58 - 8007140: 2203 movs r2, #3 - 8007142: 4393 bics r3, r2 - 8007144: 2201 movs r2, #1 - 8007146: 431a orrs r2, r3 - 8007148: 687b ldr r3, [r7, #4] - 800714a: 659a str r2, [r3, #88] ; 0x58 - 800714c: e005 b.n 800715a + 80073c4: 687b ldr r3, [r7, #4] + 80073c6: 6d9b ldr r3, [r3, #88] ; 0x58 + 80073c8: 2203 movs r2, #3 + 80073ca: 4393 bics r3, r2 + 80073cc: 2201 movs r2, #1 + 80073ce: 431a orrs r2, r3 + 80073d0: 687b ldr r3, [r7, #4] + 80073d2: 659a str r2, [r3, #88] ; 0x58 + 80073d4: e005 b.n 80073e2 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } else { SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 800714e: 687b ldr r3, [r7, #4] - 8007150: 6d9b ldr r3, [r3, #88] ; 0x58 - 8007152: 2210 movs r2, #16 - 8007154: 431a orrs r2, r3 - 8007156: 687b ldr r3, [r7, #4] - 8007158: 659a str r2, [r3, #88] ; 0x58 + 80073d6: 687b ldr r3, [r7, #4] + 80073d8: 6d9b ldr r3, [r3, #88] ; 0x58 + 80073da: 2210 movs r2, #16 + 80073dc: 431a orrs r2, r3 + 80073de: 687b ldr r3, [r7, #4] + 80073e0: 659a str r2, [r3, #88] ; 0x58 /* Note: No need to update variable "tmp_hal_status" here: already set */ /* to state "HAL_ERROR" by function disabling the ADC. */ } __HAL_UNLOCK(hadc); - 800715a: 687b ldr r3, [r7, #4] - 800715c: 2254 movs r2, #84 ; 0x54 - 800715e: 2100 movs r1, #0 - 8007160: 5499 strb r1, [r3, r2] + 80073e2: 687b ldr r3, [r7, #4] + 80073e4: 2254 movs r2, #84 ; 0x54 + 80073e6: 2100 movs r1, #0 + 80073e8: 5499 strb r1, [r3, r2] return tmp_hal_status; - 8007162: 2317 movs r3, #23 - 8007164: 18fb adds r3, r7, r3 - 8007166: 781b ldrb r3, [r3, #0] + 80073ea: 2317 movs r3, #23 + 80073ec: 18fb adds r3, r7, r3 + 80073ee: 781b ldrb r3, [r3, #0] } - 8007168: 0018 movs r0, r3 - 800716a: 46bd mov sp, r7 - 800716c: b009 add sp, #36 ; 0x24 - 800716e: bd90 pop {r4, r7, pc} - 8007170: fffffefd .word 0xfffffefd - 8007174: 00008003 .word 0x00008003 - 8007178: ffff7ffc .word 0xffff7ffc - 800717c: 0002f1ff .word 0x0002f1ff + 80073f0: 0018 movs r0, r3 + 80073f2: 46bd mov sp, r7 + 80073f4: b009 add sp, #36 ; 0x24 + 80073f6: bd90 pop {r4, r7, pc} + 80073f8: fffffefd .word 0xfffffefd + 80073fc: 00008003 .word 0x00008003 + 8007400: ffff7ffc .word 0xffff7ffc + 8007404: 0002f1ff .word 0x0002f1ff -08007180 <__NVIC_EnableIRQ>: +08007408 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 8007180: b580 push {r7, lr} - 8007182: b082 sub sp, #8 - 8007184: af00 add r7, sp, #0 - 8007186: 0002 movs r2, r0 - 8007188: 1dfb adds r3, r7, #7 - 800718a: 701a strb r2, [r3, #0] + 8007408: b580 push {r7, lr} + 800740a: b082 sub sp, #8 + 800740c: af00 add r7, sp, #0 + 800740e: 0002 movs r2, r0 + 8007410: 1dfb adds r3, r7, #7 + 8007412: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 800718c: 1dfb adds r3, r7, #7 - 800718e: 781b ldrb r3, [r3, #0] - 8007190: 2b7f cmp r3, #127 ; 0x7f - 8007192: d809 bhi.n 80071a8 <__NVIC_EnableIRQ+0x28> + 8007414: 1dfb adds r3, r7, #7 + 8007416: 781b ldrb r3, [r3, #0] + 8007418: 2b7f cmp r3, #127 ; 0x7f + 800741a: d809 bhi.n 8007430 <__NVIC_EnableIRQ+0x28> { __COMPILER_BARRIER(); NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8007194: 1dfb adds r3, r7, #7 - 8007196: 781b ldrb r3, [r3, #0] - 8007198: 001a movs r2, r3 - 800719a: 231f movs r3, #31 - 800719c: 401a ands r2, r3 - 800719e: 4b04 ldr r3, [pc, #16] ; (80071b0 <__NVIC_EnableIRQ+0x30>) - 80071a0: 2101 movs r1, #1 - 80071a2: 4091 lsls r1, r2 - 80071a4: 000a movs r2, r1 - 80071a6: 601a str r2, [r3, #0] + 800741c: 1dfb adds r3, r7, #7 + 800741e: 781b ldrb r3, [r3, #0] + 8007420: 001a movs r2, r3 + 8007422: 231f movs r3, #31 + 8007424: 401a ands r2, r3 + 8007426: 4b04 ldr r3, [pc, #16] ; (8007438 <__NVIC_EnableIRQ+0x30>) + 8007428: 2101 movs r1, #1 + 800742a: 4091 lsls r1, r2 + 800742c: 000a movs r2, r1 + 800742e: 601a str r2, [r3, #0] __COMPILER_BARRIER(); } } - 80071a8: 46c0 nop ; (mov r8, r8) - 80071aa: 46bd mov sp, r7 - 80071ac: b002 add sp, #8 - 80071ae: bd80 pop {r7, pc} - 80071b0: e000e100 .word 0xe000e100 + 8007430: 46c0 nop ; (mov r8, r8) + 8007432: 46bd mov sp, r7 + 8007434: b002 add sp, #8 + 8007436: bd80 pop {r7, pc} + 8007438: e000e100 .word 0xe000e100 -080071b4 <__NVIC_SetPriority>: +0800743c <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 80071b4: b590 push {r4, r7, lr} - 80071b6: b083 sub sp, #12 - 80071b8: af00 add r7, sp, #0 - 80071ba: 0002 movs r2, r0 - 80071bc: 6039 str r1, [r7, #0] - 80071be: 1dfb adds r3, r7, #7 - 80071c0: 701a strb r2, [r3, #0] + 800743c: b590 push {r4, r7, lr} + 800743e: b083 sub sp, #12 + 8007440: af00 add r7, sp, #0 + 8007442: 0002 movs r2, r0 + 8007444: 6039 str r1, [r7, #0] + 8007446: 1dfb adds r3, r7, #7 + 8007448: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 80071c2: 1dfb adds r3, r7, #7 - 80071c4: 781b ldrb r3, [r3, #0] - 80071c6: 2b7f cmp r3, #127 ; 0x7f - 80071c8: d828 bhi.n 800721c <__NVIC_SetPriority+0x68> + 800744a: 1dfb adds r3, r7, #7 + 800744c: 781b ldrb r3, [r3, #0] + 800744e: 2b7f cmp r3, #127 ; 0x7f + 8007450: d828 bhi.n 80074a4 <__NVIC_SetPriority+0x68> { NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 80071ca: 4a2f ldr r2, [pc, #188] ; (8007288 <__NVIC_SetPriority+0xd4>) - 80071cc: 1dfb adds r3, r7, #7 - 80071ce: 781b ldrb r3, [r3, #0] - 80071d0: b25b sxtb r3, r3 - 80071d2: 089b lsrs r3, r3, #2 - 80071d4: 33c0 adds r3, #192 ; 0xc0 - 80071d6: 009b lsls r3, r3, #2 - 80071d8: 589b ldr r3, [r3, r2] - 80071da: 1dfa adds r2, r7, #7 - 80071dc: 7812 ldrb r2, [r2, #0] - 80071de: 0011 movs r1, r2 - 80071e0: 2203 movs r2, #3 - 80071e2: 400a ands r2, r1 - 80071e4: 00d2 lsls r2, r2, #3 - 80071e6: 21ff movs r1, #255 ; 0xff - 80071e8: 4091 lsls r1, r2 - 80071ea: 000a movs r2, r1 - 80071ec: 43d2 mvns r2, r2 - 80071ee: 401a ands r2, r3 - 80071f0: 0011 movs r1, r2 + 8007452: 4a2f ldr r2, [pc, #188] ; (8007510 <__NVIC_SetPriority+0xd4>) + 8007454: 1dfb adds r3, r7, #7 + 8007456: 781b ldrb r3, [r3, #0] + 8007458: b25b sxtb r3, r3 + 800745a: 089b lsrs r3, r3, #2 + 800745c: 33c0 adds r3, #192 ; 0xc0 + 800745e: 009b lsls r3, r3, #2 + 8007460: 589b ldr r3, [r3, r2] + 8007462: 1dfa adds r2, r7, #7 + 8007464: 7812 ldrb r2, [r2, #0] + 8007466: 0011 movs r1, r2 + 8007468: 2203 movs r2, #3 + 800746a: 400a ands r2, r1 + 800746c: 00d2 lsls r2, r2, #3 + 800746e: 21ff movs r1, #255 ; 0xff + 8007470: 4091 lsls r1, r2 + 8007472: 000a movs r2, r1 + 8007474: 43d2 mvns r2, r2 + 8007476: 401a ands r2, r3 + 8007478: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 80071f2: 683b ldr r3, [r7, #0] - 80071f4: 019b lsls r3, r3, #6 - 80071f6: 22ff movs r2, #255 ; 0xff - 80071f8: 401a ands r2, r3 - 80071fa: 1dfb adds r3, r7, #7 - 80071fc: 781b ldrb r3, [r3, #0] - 80071fe: 0018 movs r0, r3 - 8007200: 2303 movs r3, #3 - 8007202: 4003 ands r3, r0 - 8007204: 00db lsls r3, r3, #3 - 8007206: 409a lsls r2, r3 + 800747a: 683b ldr r3, [r7, #0] + 800747c: 019b lsls r3, r3, #6 + 800747e: 22ff movs r2, #255 ; 0xff + 8007480: 401a ands r2, r3 + 8007482: 1dfb adds r3, r7, #7 + 8007484: 781b ldrb r3, [r3, #0] + 8007486: 0018 movs r0, r3 + 8007488: 2303 movs r3, #3 + 800748a: 4003 ands r3, r0 + 800748c: 00db lsls r3, r3, #3 + 800748e: 409a lsls r2, r3 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8007208: 481f ldr r0, [pc, #124] ; (8007288 <__NVIC_SetPriority+0xd4>) - 800720a: 1dfb adds r3, r7, #7 - 800720c: 781b ldrb r3, [r3, #0] - 800720e: b25b sxtb r3, r3 - 8007210: 089b lsrs r3, r3, #2 - 8007212: 430a orrs r2, r1 - 8007214: 33c0 adds r3, #192 ; 0xc0 - 8007216: 009b lsls r3, r3, #2 - 8007218: 501a str r2, [r3, r0] + 8007490: 481f ldr r0, [pc, #124] ; (8007510 <__NVIC_SetPriority+0xd4>) + 8007492: 1dfb adds r3, r7, #7 + 8007494: 781b ldrb r3, [r3, #0] + 8007496: b25b sxtb r3, r3 + 8007498: 089b lsrs r3, r3, #2 + 800749a: 430a orrs r2, r1 + 800749c: 33c0 adds r3, #192 ; 0xc0 + 800749e: 009b lsls r3, r3, #2 + 80074a0: 501a str r2, [r3, r0] else { SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); } } - 800721a: e031 b.n 8007280 <__NVIC_SetPriority+0xcc> + 80074a2: e031 b.n 8007508 <__NVIC_SetPriority+0xcc> SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 800721c: 4a1b ldr r2, [pc, #108] ; (800728c <__NVIC_SetPriority+0xd8>) - 800721e: 1dfb adds r3, r7, #7 - 8007220: 781b ldrb r3, [r3, #0] - 8007222: 0019 movs r1, r3 - 8007224: 230f movs r3, #15 - 8007226: 400b ands r3, r1 - 8007228: 3b08 subs r3, #8 - 800722a: 089b lsrs r3, r3, #2 - 800722c: 3306 adds r3, #6 - 800722e: 009b lsls r3, r3, #2 - 8007230: 18d3 adds r3, r2, r3 - 8007232: 3304 adds r3, #4 - 8007234: 681b ldr r3, [r3, #0] - 8007236: 1dfa adds r2, r7, #7 - 8007238: 7812 ldrb r2, [r2, #0] - 800723a: 0011 movs r1, r2 - 800723c: 2203 movs r2, #3 - 800723e: 400a ands r2, r1 - 8007240: 00d2 lsls r2, r2, #3 - 8007242: 21ff movs r1, #255 ; 0xff - 8007244: 4091 lsls r1, r2 - 8007246: 000a movs r2, r1 - 8007248: 43d2 mvns r2, r2 - 800724a: 401a ands r2, r3 - 800724c: 0011 movs r1, r2 + 80074a4: 4a1b ldr r2, [pc, #108] ; (8007514 <__NVIC_SetPriority+0xd8>) + 80074a6: 1dfb adds r3, r7, #7 + 80074a8: 781b ldrb r3, [r3, #0] + 80074aa: 0019 movs r1, r3 + 80074ac: 230f movs r3, #15 + 80074ae: 400b ands r3, r1 + 80074b0: 3b08 subs r3, #8 + 80074b2: 089b lsrs r3, r3, #2 + 80074b4: 3306 adds r3, #6 + 80074b6: 009b lsls r3, r3, #2 + 80074b8: 18d3 adds r3, r2, r3 + 80074ba: 3304 adds r3, #4 + 80074bc: 681b ldr r3, [r3, #0] + 80074be: 1dfa adds r2, r7, #7 + 80074c0: 7812 ldrb r2, [r2, #0] + 80074c2: 0011 movs r1, r2 + 80074c4: 2203 movs r2, #3 + 80074c6: 400a ands r2, r1 + 80074c8: 00d2 lsls r2, r2, #3 + 80074ca: 21ff movs r1, #255 ; 0xff + 80074cc: 4091 lsls r1, r2 + 80074ce: 000a movs r2, r1 + 80074d0: 43d2 mvns r2, r2 + 80074d2: 401a ands r2, r3 + 80074d4: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 800724e: 683b ldr r3, [r7, #0] - 8007250: 019b lsls r3, r3, #6 - 8007252: 22ff movs r2, #255 ; 0xff - 8007254: 401a ands r2, r3 - 8007256: 1dfb adds r3, r7, #7 - 8007258: 781b ldrb r3, [r3, #0] - 800725a: 0018 movs r0, r3 - 800725c: 2303 movs r3, #3 - 800725e: 4003 ands r3, r0 - 8007260: 00db lsls r3, r3, #3 - 8007262: 409a lsls r2, r3 + 80074d6: 683b ldr r3, [r7, #0] + 80074d8: 019b lsls r3, r3, #6 + 80074da: 22ff movs r2, #255 ; 0xff + 80074dc: 401a ands r2, r3 + 80074de: 1dfb adds r3, r7, #7 + 80074e0: 781b ldrb r3, [r3, #0] + 80074e2: 0018 movs r0, r3 + 80074e4: 2303 movs r3, #3 + 80074e6: 4003 ands r3, r0 + 80074e8: 00db lsls r3, r3, #3 + 80074ea: 409a lsls r2, r3 SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8007264: 4809 ldr r0, [pc, #36] ; (800728c <__NVIC_SetPriority+0xd8>) - 8007266: 1dfb adds r3, r7, #7 - 8007268: 781b ldrb r3, [r3, #0] - 800726a: 001c movs r4, r3 - 800726c: 230f movs r3, #15 - 800726e: 4023 ands r3, r4 - 8007270: 3b08 subs r3, #8 - 8007272: 089b lsrs r3, r3, #2 - 8007274: 430a orrs r2, r1 - 8007276: 3306 adds r3, #6 - 8007278: 009b lsls r3, r3, #2 - 800727a: 18c3 adds r3, r0, r3 - 800727c: 3304 adds r3, #4 - 800727e: 601a str r2, [r3, #0] + 80074ec: 4809 ldr r0, [pc, #36] ; (8007514 <__NVIC_SetPriority+0xd8>) + 80074ee: 1dfb adds r3, r7, #7 + 80074f0: 781b ldrb r3, [r3, #0] + 80074f2: 001c movs r4, r3 + 80074f4: 230f movs r3, #15 + 80074f6: 4023 ands r3, r4 + 80074f8: 3b08 subs r3, #8 + 80074fa: 089b lsrs r3, r3, #2 + 80074fc: 430a orrs r2, r1 + 80074fe: 3306 adds r3, #6 + 8007500: 009b lsls r3, r3, #2 + 8007502: 18c3 adds r3, r0, r3 + 8007504: 3304 adds r3, #4 + 8007506: 601a str r2, [r3, #0] } - 8007280: 46c0 nop ; (mov r8, r8) - 8007282: 46bd mov sp, r7 - 8007284: b003 add sp, #12 - 8007286: bd90 pop {r4, r7, pc} - 8007288: e000e100 .word 0xe000e100 - 800728c: e000ed00 .word 0xe000ed00 + 8007508: 46c0 nop ; (mov r8, r8) + 800750a: 46bd mov sp, r7 + 800750c: b003 add sp, #12 + 800750e: bd90 pop {r4, r7, pc} + 8007510: e000e100 .word 0xe000e100 + 8007514: e000ed00 .word 0xe000ed00 -08007290 : +08007518 : * with stm32g0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0+ based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8007290: b580 push {r7, lr} - 8007292: b084 sub sp, #16 - 8007294: af00 add r7, sp, #0 - 8007296: 60b9 str r1, [r7, #8] - 8007298: 607a str r2, [r7, #4] - 800729a: 210f movs r1, #15 - 800729c: 187b adds r3, r7, r1 - 800729e: 1c02 adds r2, r0, #0 - 80072a0: 701a strb r2, [r3, #0] + 8007518: b580 push {r7, lr} + 800751a: b084 sub sp, #16 + 800751c: af00 add r7, sp, #0 + 800751e: 60b9 str r1, [r7, #8] + 8007520: 607a str r2, [r7, #4] + 8007522: 210f movs r1, #15 + 8007524: 187b adds r3, r7, r1 + 8007526: 1c02 adds r2, r0, #0 + 8007528: 701a strb r2, [r3, #0] /* Prevent unused argument(s) compilation warning */ UNUSED(SubPriority); /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn, PreemptPriority); - 80072a2: 68ba ldr r2, [r7, #8] - 80072a4: 187b adds r3, r7, r1 - 80072a6: 781b ldrb r3, [r3, #0] - 80072a8: b25b sxtb r3, r3 - 80072aa: 0011 movs r1, r2 - 80072ac: 0018 movs r0, r3 - 80072ae: f7ff ff81 bl 80071b4 <__NVIC_SetPriority> + 800752a: 68ba ldr r2, [r7, #8] + 800752c: 187b adds r3, r7, r1 + 800752e: 781b ldrb r3, [r3, #0] + 8007530: b25b sxtb r3, r3 + 8007532: 0011 movs r1, r2 + 8007534: 0018 movs r0, r3 + 8007536: f7ff ff81 bl 800743c <__NVIC_SetPriority> } - 80072b2: 46c0 nop ; (mov r8, r8) - 80072b4: 46bd mov sp, r7 - 80072b6: b004 add sp, #16 - 80072b8: bd80 pop {r7, pc} + 800753a: 46c0 nop ; (mov r8, r8) + 800753c: 46bd mov sp, r7 + 800753e: b004 add sp, #16 + 8007540: bd80 pop {r7, pc} -080072ba : +08007542 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32g0xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 80072ba: b580 push {r7, lr} - 80072bc: b082 sub sp, #8 - 80072be: af00 add r7, sp, #0 - 80072c0: 0002 movs r2, r0 - 80072c2: 1dfb adds r3, r7, #7 - 80072c4: 701a strb r2, [r3, #0] + 8007542: b580 push {r7, lr} + 8007544: b082 sub sp, #8 + 8007546: af00 add r7, sp, #0 + 8007548: 0002 movs r2, r0 + 800754a: 1dfb adds r3, r7, #7 + 800754c: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 80072c6: 1dfb adds r3, r7, #7 - 80072c8: 781b ldrb r3, [r3, #0] - 80072ca: b25b sxtb r3, r3 - 80072cc: 0018 movs r0, r3 - 80072ce: f7ff ff57 bl 8007180 <__NVIC_EnableIRQ> + 800754e: 1dfb adds r3, r7, #7 + 8007550: 781b ldrb r3, [r3, #0] + 8007552: b25b sxtb r3, r3 + 8007554: 0018 movs r0, r3 + 8007556: f7ff ff57 bl 8007408 <__NVIC_EnableIRQ> } - 80072d2: 46c0 nop ; (mov r8, r8) - 80072d4: 46bd mov sp, r7 - 80072d6: b002 add sp, #8 - 80072d8: bd80 pop {r7, pc} + 800755a: 46c0 nop ; (mov r8, r8) + 800755c: 46bd mov sp, r7 + 800755e: b002 add sp, #8 + 8007560: bd80 pop {r7, pc} ... -080072dc : +08007564 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 80072dc: b580 push {r7, lr} - 80072de: b086 sub sp, #24 - 80072e0: af00 add r7, sp, #0 - 80072e2: 6078 str r0, [r7, #4] - 80072e4: 6039 str r1, [r7, #0] + 8007564: b580 push {r7, lr} + 8007566: b086 sub sp, #24 + 8007568: af00 add r7, sp, #0 + 800756a: 6078 str r0, [r7, #4] + 800756c: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 80072e6: 2300 movs r3, #0 - 80072e8: 617b str r3, [r7, #20] + 800756e: 2300 movs r3, #0 + 8007570: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 80072ea: e147 b.n 800757c + 8007572: e147 b.n 8007804 { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); - 80072ec: 683b ldr r3, [r7, #0] - 80072ee: 681b ldr r3, [r3, #0] - 80072f0: 2101 movs r1, #1 - 80072f2: 697a ldr r2, [r7, #20] - 80072f4: 4091 lsls r1, r2 - 80072f6: 000a movs r2, r1 - 80072f8: 4013 ands r3, r2 - 80072fa: 60fb str r3, [r7, #12] + 8007574: 683b ldr r3, [r7, #0] + 8007576: 681b ldr r3, [r3, #0] + 8007578: 2101 movs r1, #1 + 800757a: 697a ldr r2, [r7, #20] + 800757c: 4091 lsls r1, r2 + 800757e: 000a movs r2, r1 + 8007580: 4013 ands r3, r2 + 8007582: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) - 80072fc: 68fb ldr r3, [r7, #12] - 80072fe: 2b00 cmp r3, #0 - 8007300: d100 bne.n 8007304 - 8007302: e138 b.n 8007576 + 8007584: 68fb ldr r3, [r7, #12] + 8007586: 2b00 cmp r3, #0 + 8007588: d100 bne.n 800758c + 800758a: e138 b.n 80077fe { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 8007304: 683b ldr r3, [r7, #0] - 8007306: 685b ldr r3, [r3, #4] - 8007308: 2203 movs r2, #3 - 800730a: 4013 ands r3, r2 - 800730c: 2b01 cmp r3, #1 - 800730e: d005 beq.n 800731c - 8007310: 683b ldr r3, [r7, #0] - 8007312: 685b ldr r3, [r3, #4] - 8007314: 2203 movs r2, #3 - 8007316: 4013 ands r3, r2 - 8007318: 2b02 cmp r3, #2 - 800731a: d130 bne.n 800737e + 800758c: 683b ldr r3, [r7, #0] + 800758e: 685b ldr r3, [r3, #4] + 8007590: 2203 movs r2, #3 + 8007592: 4013 ands r3, r2 + 8007594: 2b01 cmp r3, #1 + 8007596: d005 beq.n 80075a4 + 8007598: 683b ldr r3, [r7, #0] + 800759a: 685b ldr r3, [r3, #4] + 800759c: 2203 movs r2, #3 + 800759e: 4013 ands r3, r2 + 80075a0: 2b02 cmp r3, #2 + 80075a2: d130 bne.n 8007606 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 800731c: 687b ldr r3, [r7, #4] - 800731e: 689b ldr r3, [r3, #8] - 8007320: 613b str r3, [r7, #16] + 80075a4: 687b ldr r3, [r7, #4] + 80075a6: 689b ldr r3, [r3, #8] + 80075a8: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2u)); - 8007322: 697b ldr r3, [r7, #20] - 8007324: 005b lsls r3, r3, #1 - 8007326: 2203 movs r2, #3 - 8007328: 409a lsls r2, r3 - 800732a: 0013 movs r3, r2 - 800732c: 43da mvns r2, r3 - 800732e: 693b ldr r3, [r7, #16] - 8007330: 4013 ands r3, r2 - 8007332: 613b str r3, [r7, #16] + 80075aa: 697b ldr r3, [r7, #20] + 80075ac: 005b lsls r3, r3, #1 + 80075ae: 2203 movs r2, #3 + 80075b0: 409a lsls r2, r3 + 80075b2: 0013 movs r3, r2 + 80075b4: 43da mvns r2, r3 + 80075b6: 693b ldr r3, [r7, #16] + 80075b8: 4013 ands r3, r2 + 80075ba: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); - 8007334: 683b ldr r3, [r7, #0] - 8007336: 68da ldr r2, [r3, #12] - 8007338: 697b ldr r3, [r7, #20] - 800733a: 005b lsls r3, r3, #1 - 800733c: 409a lsls r2, r3 - 800733e: 0013 movs r3, r2 - 8007340: 693a ldr r2, [r7, #16] - 8007342: 4313 orrs r3, r2 - 8007344: 613b str r3, [r7, #16] + 80075bc: 683b ldr r3, [r7, #0] + 80075be: 68da ldr r2, [r3, #12] + 80075c0: 697b ldr r3, [r7, #20] + 80075c2: 005b lsls r3, r3, #1 + 80075c4: 409a lsls r2, r3 + 80075c6: 0013 movs r3, r2 + 80075c8: 693a ldr r2, [r7, #16] + 80075ca: 4313 orrs r3, r2 + 80075cc: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; - 8007346: 687b ldr r3, [r7, #4] - 8007348: 693a ldr r2, [r7, #16] - 800734a: 609a str r2, [r3, #8] + 80075ce: 687b ldr r3, [r7, #4] + 80075d0: 693a ldr r2, [r7, #16] + 80075d2: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 800734c: 687b ldr r3, [r7, #4] - 800734e: 685b ldr r3, [r3, #4] - 8007350: 613b str r3, [r7, #16] + 80075d4: 687b ldr r3, [r7, #4] + 80075d6: 685b ldr r3, [r3, #4] + 80075d8: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT0 << position) ; - 8007352: 2201 movs r2, #1 - 8007354: 697b ldr r3, [r7, #20] - 8007356: 409a lsls r2, r3 - 8007358: 0013 movs r3, r2 - 800735a: 43da mvns r2, r3 - 800735c: 693b ldr r3, [r7, #16] - 800735e: 4013 ands r3, r2 - 8007360: 613b str r3, [r7, #16] + 80075da: 2201 movs r2, #1 + 80075dc: 697b ldr r3, [r7, #20] + 80075de: 409a lsls r2, r3 + 80075e0: 0013 movs r3, r2 + 80075e2: 43da mvns r2, r3 + 80075e4: 693b ldr r3, [r7, #16] + 80075e6: 4013 ands r3, r2 + 80075e8: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8007362: 683b ldr r3, [r7, #0] - 8007364: 685b ldr r3, [r3, #4] - 8007366: 091b lsrs r3, r3, #4 - 8007368: 2201 movs r2, #1 - 800736a: 401a ands r2, r3 - 800736c: 697b ldr r3, [r7, #20] - 800736e: 409a lsls r2, r3 - 8007370: 0013 movs r3, r2 - 8007372: 693a ldr r2, [r7, #16] - 8007374: 4313 orrs r3, r2 - 8007376: 613b str r3, [r7, #16] + 80075ea: 683b ldr r3, [r7, #0] + 80075ec: 685b ldr r3, [r3, #4] + 80075ee: 091b lsrs r3, r3, #4 + 80075f0: 2201 movs r2, #1 + 80075f2: 401a ands r2, r3 + 80075f4: 697b ldr r3, [r7, #20] + 80075f6: 409a lsls r2, r3 + 80075f8: 0013 movs r3, r2 + 80075fa: 693a ldr r2, [r7, #16] + 80075fc: 4313 orrs r3, r2 + 80075fe: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; - 8007378: 687b ldr r3, [r7, #4] - 800737a: 693a ldr r2, [r7, #16] - 800737c: 605a str r2, [r3, #4] + 8007600: 687b ldr r3, [r7, #4] + 8007602: 693a ldr r2, [r7, #16] + 8007604: 605a str r2, [r3, #4] } if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 800737e: 683b ldr r3, [r7, #0] - 8007380: 685b ldr r3, [r3, #4] - 8007382: 2203 movs r2, #3 - 8007384: 4013 ands r3, r2 - 8007386: 2b03 cmp r3, #3 - 8007388: d017 beq.n 80073ba + 8007606: 683b ldr r3, [r7, #0] + 8007608: 685b ldr r3, [r3, #4] + 800760a: 2203 movs r2, #3 + 800760c: 4013 ands r3, r2 + 800760e: 2b03 cmp r3, #3 + 8007610: d017 beq.n 8007642 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 800738a: 687b ldr r3, [r7, #4] - 800738c: 68db ldr r3, [r3, #12] - 800738e: 613b str r3, [r7, #16] + 8007612: 687b ldr r3, [r7, #4] + 8007614: 68db ldr r3, [r3, #12] + 8007616: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2u)); - 8007390: 697b ldr r3, [r7, #20] - 8007392: 005b lsls r3, r3, #1 - 8007394: 2203 movs r2, #3 - 8007396: 409a lsls r2, r3 - 8007398: 0013 movs r3, r2 - 800739a: 43da mvns r2, r3 - 800739c: 693b ldr r3, [r7, #16] - 800739e: 4013 ands r3, r2 - 80073a0: 613b str r3, [r7, #16] + 8007618: 697b ldr r3, [r7, #20] + 800761a: 005b lsls r3, r3, #1 + 800761c: 2203 movs r2, #3 + 800761e: 409a lsls r2, r3 + 8007620: 0013 movs r3, r2 + 8007622: 43da mvns r2, r3 + 8007624: 693b ldr r3, [r7, #16] + 8007626: 4013 ands r3, r2 + 8007628: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2u)); - 80073a2: 683b ldr r3, [r7, #0] - 80073a4: 689a ldr r2, [r3, #8] - 80073a6: 697b ldr r3, [r7, #20] - 80073a8: 005b lsls r3, r3, #1 - 80073aa: 409a lsls r2, r3 - 80073ac: 0013 movs r3, r2 - 80073ae: 693a ldr r2, [r7, #16] - 80073b0: 4313 orrs r3, r2 - 80073b2: 613b str r3, [r7, #16] + 800762a: 683b ldr r3, [r7, #0] + 800762c: 689a ldr r2, [r3, #8] + 800762e: 697b ldr r3, [r7, #20] + 8007630: 005b lsls r3, r3, #1 + 8007632: 409a lsls r2, r3 + 8007634: 0013 movs r3, r2 + 8007636: 693a ldr r2, [r7, #16] + 8007638: 4313 orrs r3, r2 + 800763a: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; - 80073b4: 687b ldr r3, [r7, #4] - 80073b6: 693a ldr r2, [r7, #16] - 80073b8: 60da str r2, [r3, #12] + 800763c: 687b ldr r3, [r7, #4] + 800763e: 693a ldr r2, [r7, #16] + 8007640: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 80073ba: 683b ldr r3, [r7, #0] - 80073bc: 685b ldr r3, [r3, #4] - 80073be: 2203 movs r2, #3 - 80073c0: 4013 ands r3, r2 - 80073c2: 2b02 cmp r3, #2 - 80073c4: d123 bne.n 800740e + 8007642: 683b ldr r3, [r7, #0] + 8007644: 685b ldr r3, [r3, #4] + 8007646: 2203 movs r2, #3 + 8007648: 4013 ands r3, r2 + 800764a: 2b02 cmp r3, #2 + 800764c: d123 bne.n 8007696 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; - 80073c6: 697b ldr r3, [r7, #20] - 80073c8: 08da lsrs r2, r3, #3 - 80073ca: 687b ldr r3, [r7, #4] - 80073cc: 3208 adds r2, #8 - 80073ce: 0092 lsls r2, r2, #2 - 80073d0: 58d3 ldr r3, [r2, r3] - 80073d2: 613b str r3, [r7, #16] + 800764e: 697b ldr r3, [r7, #20] + 8007650: 08da lsrs r2, r3, #3 + 8007652: 687b ldr r3, [r7, #4] + 8007654: 3208 adds r2, #8 + 8007656: 0092 lsls r2, r2, #2 + 8007658: 58d3 ldr r3, [r2, r3] + 800765a: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); - 80073d4: 697b ldr r3, [r7, #20] - 80073d6: 2207 movs r2, #7 - 80073d8: 4013 ands r3, r2 - 80073da: 009b lsls r3, r3, #2 - 80073dc: 220f movs r2, #15 - 80073de: 409a lsls r2, r3 - 80073e0: 0013 movs r3, r2 - 80073e2: 43da mvns r2, r3 - 80073e4: 693b ldr r3, [r7, #16] - 80073e6: 4013 ands r3, r2 - 80073e8: 613b str r3, [r7, #16] + 800765c: 697b ldr r3, [r7, #20] + 800765e: 2207 movs r2, #7 + 8007660: 4013 ands r3, r2 + 8007662: 009b lsls r3, r3, #2 + 8007664: 220f movs r2, #15 + 8007666: 409a lsls r2, r3 + 8007668: 0013 movs r3, r2 + 800766a: 43da mvns r2, r3 + 800766c: 693b ldr r3, [r7, #16] + 800766e: 4013 ands r3, r2 + 8007670: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); - 80073ea: 683b ldr r3, [r7, #0] - 80073ec: 691a ldr r2, [r3, #16] - 80073ee: 697b ldr r3, [r7, #20] - 80073f0: 2107 movs r1, #7 - 80073f2: 400b ands r3, r1 - 80073f4: 009b lsls r3, r3, #2 - 80073f6: 409a lsls r2, r3 - 80073f8: 0013 movs r3, r2 - 80073fa: 693a ldr r2, [r7, #16] - 80073fc: 4313 orrs r3, r2 - 80073fe: 613b str r3, [r7, #16] + 8007672: 683b ldr r3, [r7, #0] + 8007674: 691a ldr r2, [r3, #16] + 8007676: 697b ldr r3, [r7, #20] + 8007678: 2107 movs r1, #7 + 800767a: 400b ands r3, r1 + 800767c: 009b lsls r3, r3, #2 + 800767e: 409a lsls r2, r3 + 8007680: 0013 movs r3, r2 + 8007682: 693a ldr r2, [r7, #16] + 8007684: 4313 orrs r3, r2 + 8007686: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; - 8007400: 697b ldr r3, [r7, #20] - 8007402: 08da lsrs r2, r3, #3 - 8007404: 687b ldr r3, [r7, #4] - 8007406: 3208 adds r2, #8 - 8007408: 0092 lsls r2, r2, #2 - 800740a: 6939 ldr r1, [r7, #16] - 800740c: 50d1 str r1, [r2, r3] + 8007688: 697b ldr r3, [r7, #20] + 800768a: 08da lsrs r2, r3, #3 + 800768c: 687b ldr r3, [r7, #4] + 800768e: 3208 adds r2, #8 + 8007690: 0092 lsls r2, r2, #2 + 8007692: 6939 ldr r1, [r7, #16] + 8007694: 50d1 str r1, [r2, r3] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 800740e: 687b ldr r3, [r7, #4] - 8007410: 681b ldr r3, [r3, #0] - 8007412: 613b str r3, [r7, #16] + 8007696: 687b ldr r3, [r7, #4] + 8007698: 681b ldr r3, [r3, #0] + 800769a: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); - 8007414: 697b ldr r3, [r7, #20] - 8007416: 005b lsls r3, r3, #1 - 8007418: 2203 movs r2, #3 - 800741a: 409a lsls r2, r3 - 800741c: 0013 movs r3, r2 - 800741e: 43da mvns r2, r3 - 8007420: 693b ldr r3, [r7, #16] - 8007422: 4013 ands r3, r2 - 8007424: 613b str r3, [r7, #16] + 800769c: 697b ldr r3, [r7, #20] + 800769e: 005b lsls r3, r3, #1 + 80076a0: 2203 movs r2, #3 + 80076a2: 409a lsls r2, r3 + 80076a4: 0013 movs r3, r2 + 80076a6: 43da mvns r2, r3 + 80076a8: 693b ldr r3, [r7, #16] + 80076aa: 4013 ands r3, r2 + 80076ac: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); - 8007426: 683b ldr r3, [r7, #0] - 8007428: 685b ldr r3, [r3, #4] - 800742a: 2203 movs r2, #3 - 800742c: 401a ands r2, r3 - 800742e: 697b ldr r3, [r7, #20] - 8007430: 005b lsls r3, r3, #1 - 8007432: 409a lsls r2, r3 - 8007434: 0013 movs r3, r2 - 8007436: 693a ldr r2, [r7, #16] - 8007438: 4313 orrs r3, r2 - 800743a: 613b str r3, [r7, #16] + 80076ae: 683b ldr r3, [r7, #0] + 80076b0: 685b ldr r3, [r3, #4] + 80076b2: 2203 movs r2, #3 + 80076b4: 401a ands r2, r3 + 80076b6: 697b ldr r3, [r7, #20] + 80076b8: 005b lsls r3, r3, #1 + 80076ba: 409a lsls r2, r3 + 80076bc: 0013 movs r3, r2 + 80076be: 693a ldr r2, [r7, #16] + 80076c0: 4313 orrs r3, r2 + 80076c2: 613b str r3, [r7, #16] GPIOx->MODER = temp; - 800743c: 687b ldr r3, [r7, #4] - 800743e: 693a ldr r2, [r7, #16] - 8007440: 601a str r2, [r3, #0] + 80076c4: 687b ldr r3, [r7, #4] + 80076c6: 693a ldr r2, [r7, #16] + 80076c8: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) - 8007442: 683b ldr r3, [r7, #0] - 8007444: 685a ldr r2, [r3, #4] - 8007446: 23c0 movs r3, #192 ; 0xc0 - 8007448: 029b lsls r3, r3, #10 - 800744a: 4013 ands r3, r2 - 800744c: d100 bne.n 8007450 - 800744e: e092 b.n 8007576 + 80076ca: 683b ldr r3, [r7, #0] + 80076cc: 685a ldr r2, [r3, #4] + 80076ce: 23c0 movs r3, #192 ; 0xc0 + 80076d0: 029b lsls r3, r3, #10 + 80076d2: 4013 ands r3, r2 + 80076d4: d100 bne.n 80076d8 + 80076d6: e092 b.n 80077fe { temp = EXTI->EXTICR[position >> 2u]; - 8007450: 4a50 ldr r2, [pc, #320] ; (8007594 ) - 8007452: 697b ldr r3, [r7, #20] - 8007454: 089b lsrs r3, r3, #2 - 8007456: 3318 adds r3, #24 - 8007458: 009b lsls r3, r3, #2 - 800745a: 589b ldr r3, [r3, r2] - 800745c: 613b str r3, [r7, #16] + 80076d8: 4a50 ldr r2, [pc, #320] ; (800781c ) + 80076da: 697b ldr r3, [r7, #20] + 80076dc: 089b lsrs r3, r3, #2 + 80076de: 3318 adds r3, #24 + 80076e0: 009b lsls r3, r3, #2 + 80076e2: 589b ldr r3, [r3, r2] + 80076e4: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (8u * (position & 0x03u))); - 800745e: 697b ldr r3, [r7, #20] - 8007460: 2203 movs r2, #3 - 8007462: 4013 ands r3, r2 - 8007464: 00db lsls r3, r3, #3 - 8007466: 220f movs r2, #15 - 8007468: 409a lsls r2, r3 - 800746a: 0013 movs r3, r2 - 800746c: 43da mvns r2, r3 - 800746e: 693b ldr r3, [r7, #16] - 8007470: 4013 ands r3, r2 - 8007472: 613b str r3, [r7, #16] + 80076e6: 697b ldr r3, [r7, #20] + 80076e8: 2203 movs r2, #3 + 80076ea: 4013 ands r3, r2 + 80076ec: 00db lsls r3, r3, #3 + 80076ee: 220f movs r2, #15 + 80076f0: 409a lsls r2, r3 + 80076f2: 0013 movs r3, r2 + 80076f4: 43da mvns r2, r3 + 80076f6: 693b ldr r3, [r7, #16] + 80076f8: 4013 ands r3, r2 + 80076fa: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (8u * (position & 0x03u))); - 8007474: 687a ldr r2, [r7, #4] - 8007476: 23a0 movs r3, #160 ; 0xa0 - 8007478: 05db lsls r3, r3, #23 - 800747a: 429a cmp r2, r3 - 800747c: d013 beq.n 80074a6 - 800747e: 687b ldr r3, [r7, #4] - 8007480: 4a45 ldr r2, [pc, #276] ; (8007598 ) - 8007482: 4293 cmp r3, r2 - 8007484: d00d beq.n 80074a2 - 8007486: 687b ldr r3, [r7, #4] - 8007488: 4a44 ldr r2, [pc, #272] ; (800759c ) - 800748a: 4293 cmp r3, r2 - 800748c: d007 beq.n 800749e - 800748e: 687b ldr r3, [r7, #4] - 8007490: 4a43 ldr r2, [pc, #268] ; (80075a0 ) - 8007492: 4293 cmp r3, r2 - 8007494: d101 bne.n 800749a - 8007496: 2303 movs r3, #3 - 8007498: e006 b.n 80074a8 - 800749a: 2305 movs r3, #5 - 800749c: e004 b.n 80074a8 - 800749e: 2302 movs r3, #2 - 80074a0: e002 b.n 80074a8 - 80074a2: 2301 movs r3, #1 - 80074a4: e000 b.n 80074a8 - 80074a6: 2300 movs r3, #0 - 80074a8: 697a ldr r2, [r7, #20] - 80074aa: 2103 movs r1, #3 - 80074ac: 400a ands r2, r1 - 80074ae: 00d2 lsls r2, r2, #3 - 80074b0: 4093 lsls r3, r2 - 80074b2: 693a ldr r2, [r7, #16] - 80074b4: 4313 orrs r3, r2 - 80074b6: 613b str r3, [r7, #16] + 80076fc: 687a ldr r2, [r7, #4] + 80076fe: 23a0 movs r3, #160 ; 0xa0 + 8007700: 05db lsls r3, r3, #23 + 8007702: 429a cmp r2, r3 + 8007704: d013 beq.n 800772e + 8007706: 687b ldr r3, [r7, #4] + 8007708: 4a45 ldr r2, [pc, #276] ; (8007820 ) + 800770a: 4293 cmp r3, r2 + 800770c: d00d beq.n 800772a + 800770e: 687b ldr r3, [r7, #4] + 8007710: 4a44 ldr r2, [pc, #272] ; (8007824 ) + 8007712: 4293 cmp r3, r2 + 8007714: d007 beq.n 8007726 + 8007716: 687b ldr r3, [r7, #4] + 8007718: 4a43 ldr r2, [pc, #268] ; (8007828 ) + 800771a: 4293 cmp r3, r2 + 800771c: d101 bne.n 8007722 + 800771e: 2303 movs r3, #3 + 8007720: e006 b.n 8007730 + 8007722: 2305 movs r3, #5 + 8007724: e004 b.n 8007730 + 8007726: 2302 movs r3, #2 + 8007728: e002 b.n 8007730 + 800772a: 2301 movs r3, #1 + 800772c: e000 b.n 8007730 + 800772e: 2300 movs r3, #0 + 8007730: 697a ldr r2, [r7, #20] + 8007732: 2103 movs r1, #3 + 8007734: 400a ands r2, r1 + 8007736: 00d2 lsls r2, r2, #3 + 8007738: 4093 lsls r3, r2 + 800773a: 693a ldr r2, [r7, #16] + 800773c: 4313 orrs r3, r2 + 800773e: 613b str r3, [r7, #16] EXTI->EXTICR[position >> 2u] = temp; - 80074b8: 4936 ldr r1, [pc, #216] ; (8007594 ) - 80074ba: 697b ldr r3, [r7, #20] - 80074bc: 089b lsrs r3, r3, #2 - 80074be: 3318 adds r3, #24 - 80074c0: 009b lsls r3, r3, #2 - 80074c2: 693a ldr r2, [r7, #16] - 80074c4: 505a str r2, [r3, r1] + 8007740: 4936 ldr r1, [pc, #216] ; (800781c ) + 8007742: 697b ldr r3, [r7, #20] + 8007744: 089b lsrs r3, r3, #2 + 8007746: 3318 adds r3, #24 + 8007748: 009b lsls r3, r3, #2 + 800774a: 693a ldr r2, [r7, #16] + 800774c: 505a str r2, [r3, r1] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR1; - 80074c6: 4b33 ldr r3, [pc, #204] ; (8007594 ) - 80074c8: 681b ldr r3, [r3, #0] - 80074ca: 613b str r3, [r7, #16] + 800774e: 4b33 ldr r3, [pc, #204] ; (800781c ) + 8007750: 681b ldr r3, [r3, #0] + 8007752: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 80074cc: 68fb ldr r3, [r7, #12] - 80074ce: 43da mvns r2, r3 - 80074d0: 693b ldr r3, [r7, #16] - 80074d2: 4013 ands r3, r2 - 80074d4: 613b str r3, [r7, #16] + 8007754: 68fb ldr r3, [r7, #12] + 8007756: 43da mvns r2, r3 + 8007758: 693b ldr r3, [r7, #16] + 800775a: 4013 ands r3, r2 + 800775c: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) - 80074d6: 683b ldr r3, [r7, #0] - 80074d8: 685a ldr r2, [r3, #4] - 80074da: 2380 movs r3, #128 ; 0x80 - 80074dc: 035b lsls r3, r3, #13 - 80074de: 4013 ands r3, r2 - 80074e0: d003 beq.n 80074ea + 800775e: 683b ldr r3, [r7, #0] + 8007760: 685a ldr r2, [r3, #4] + 8007762: 2380 movs r3, #128 ; 0x80 + 8007764: 035b lsls r3, r3, #13 + 8007766: 4013 ands r3, r2 + 8007768: d003 beq.n 8007772 { temp |= iocurrent; - 80074e2: 693a ldr r2, [r7, #16] - 80074e4: 68fb ldr r3, [r7, #12] - 80074e6: 4313 orrs r3, r2 - 80074e8: 613b str r3, [r7, #16] + 800776a: 693a ldr r2, [r7, #16] + 800776c: 68fb ldr r3, [r7, #12] + 800776e: 4313 orrs r3, r2 + 8007770: 613b str r3, [r7, #16] } EXTI->RTSR1 = temp; - 80074ea: 4b2a ldr r3, [pc, #168] ; (8007594 ) - 80074ec: 693a ldr r2, [r7, #16] - 80074ee: 601a str r2, [r3, #0] + 8007772: 4b2a ldr r3, [pc, #168] ; (800781c ) + 8007774: 693a ldr r2, [r7, #16] + 8007776: 601a str r2, [r3, #0] temp = EXTI->FTSR1; - 80074f0: 4b28 ldr r3, [pc, #160] ; (8007594 ) - 80074f2: 685b ldr r3, [r3, #4] - 80074f4: 613b str r3, [r7, #16] + 8007778: 4b28 ldr r3, [pc, #160] ; (800781c ) + 800777a: 685b ldr r3, [r3, #4] + 800777c: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 80074f6: 68fb ldr r3, [r7, #12] - 80074f8: 43da mvns r2, r3 - 80074fa: 693b ldr r3, [r7, #16] - 80074fc: 4013 ands r3, r2 - 80074fe: 613b str r3, [r7, #16] + 800777e: 68fb ldr r3, [r7, #12] + 8007780: 43da mvns r2, r3 + 8007782: 693b ldr r3, [r7, #16] + 8007784: 4013 ands r3, r2 + 8007786: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) - 8007500: 683b ldr r3, [r7, #0] - 8007502: 685a ldr r2, [r3, #4] - 8007504: 2380 movs r3, #128 ; 0x80 - 8007506: 039b lsls r3, r3, #14 - 8007508: 4013 ands r3, r2 - 800750a: d003 beq.n 8007514 + 8007788: 683b ldr r3, [r7, #0] + 800778a: 685a ldr r2, [r3, #4] + 800778c: 2380 movs r3, #128 ; 0x80 + 800778e: 039b lsls r3, r3, #14 + 8007790: 4013 ands r3, r2 + 8007792: d003 beq.n 800779c { temp |= iocurrent; - 800750c: 693a ldr r2, [r7, #16] - 800750e: 68fb ldr r3, [r7, #12] - 8007510: 4313 orrs r3, r2 - 8007512: 613b str r3, [r7, #16] + 8007794: 693a ldr r2, [r7, #16] + 8007796: 68fb ldr r3, [r7, #12] + 8007798: 4313 orrs r3, r2 + 800779a: 613b str r3, [r7, #16] } EXTI->FTSR1 = temp; - 8007514: 4b1f ldr r3, [pc, #124] ; (8007594 ) - 8007516: 693a ldr r2, [r7, #16] - 8007518: 605a str r2, [r3, #4] + 800779c: 4b1f ldr r3, [pc, #124] ; (800781c ) + 800779e: 693a ldr r2, [r7, #16] + 80077a0: 605a str r2, [r3, #4] /* Clear EXTI line configuration */ temp = EXTI->EMR1; - 800751a: 4a1e ldr r2, [pc, #120] ; (8007594 ) - 800751c: 2384 movs r3, #132 ; 0x84 - 800751e: 58d3 ldr r3, [r2, r3] - 8007520: 613b str r3, [r7, #16] + 80077a2: 4a1e ldr r2, [pc, #120] ; (800781c ) + 80077a4: 2384 movs r3, #132 ; 0x84 + 80077a6: 58d3 ldr r3, [r2, r3] + 80077a8: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8007522: 68fb ldr r3, [r7, #12] - 8007524: 43da mvns r2, r3 - 8007526: 693b ldr r3, [r7, #16] - 8007528: 4013 ands r3, r2 - 800752a: 613b str r3, [r7, #16] + 80077aa: 68fb ldr r3, [r7, #12] + 80077ac: 43da mvns r2, r3 + 80077ae: 693b ldr r3, [r7, #16] + 80077b0: 4013 ands r3, r2 + 80077b2: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00u) - 800752c: 683b ldr r3, [r7, #0] - 800752e: 685a ldr r2, [r3, #4] - 8007530: 2380 movs r3, #128 ; 0x80 - 8007532: 029b lsls r3, r3, #10 - 8007534: 4013 ands r3, r2 - 8007536: d003 beq.n 8007540 + 80077b4: 683b ldr r3, [r7, #0] + 80077b6: 685a ldr r2, [r3, #4] + 80077b8: 2380 movs r3, #128 ; 0x80 + 80077ba: 029b lsls r3, r3, #10 + 80077bc: 4013 ands r3, r2 + 80077be: d003 beq.n 80077c8 { temp |= iocurrent; - 8007538: 693a ldr r2, [r7, #16] - 800753a: 68fb ldr r3, [r7, #12] - 800753c: 4313 orrs r3, r2 - 800753e: 613b str r3, [r7, #16] + 80077c0: 693a ldr r2, [r7, #16] + 80077c2: 68fb ldr r3, [r7, #12] + 80077c4: 4313 orrs r3, r2 + 80077c6: 613b str r3, [r7, #16] } EXTI->EMR1 = temp; - 8007540: 4914 ldr r1, [pc, #80] ; (8007594 ) - 8007542: 2284 movs r2, #132 ; 0x84 - 8007544: 693b ldr r3, [r7, #16] - 8007546: 508b str r3, [r1, r2] + 80077c8: 4914 ldr r1, [pc, #80] ; (800781c ) + 80077ca: 2284 movs r2, #132 ; 0x84 + 80077cc: 693b ldr r3, [r7, #16] + 80077ce: 508b str r3, [r1, r2] temp = EXTI->IMR1; - 8007548: 4a12 ldr r2, [pc, #72] ; (8007594 ) - 800754a: 2380 movs r3, #128 ; 0x80 - 800754c: 58d3 ldr r3, [r2, r3] - 800754e: 613b str r3, [r7, #16] + 80077d0: 4a12 ldr r2, [pc, #72] ; (800781c ) + 80077d2: 2380 movs r3, #128 ; 0x80 + 80077d4: 58d3 ldr r3, [r2, r3] + 80077d6: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8007550: 68fb ldr r3, [r7, #12] - 8007552: 43da mvns r2, r3 - 8007554: 693b ldr r3, [r7, #16] - 8007556: 4013 ands r3, r2 - 8007558: 613b str r3, [r7, #16] + 80077d8: 68fb ldr r3, [r7, #12] + 80077da: 43da mvns r2, r3 + 80077dc: 693b ldr r3, [r7, #16] + 80077de: 4013 ands r3, r2 + 80077e0: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_IT) != 0x00u) - 800755a: 683b ldr r3, [r7, #0] - 800755c: 685a ldr r2, [r3, #4] - 800755e: 2380 movs r3, #128 ; 0x80 - 8007560: 025b lsls r3, r3, #9 - 8007562: 4013 ands r3, r2 - 8007564: d003 beq.n 800756e + 80077e2: 683b ldr r3, [r7, #0] + 80077e4: 685a ldr r2, [r3, #4] + 80077e6: 2380 movs r3, #128 ; 0x80 + 80077e8: 025b lsls r3, r3, #9 + 80077ea: 4013 ands r3, r2 + 80077ec: d003 beq.n 80077f6 { temp |= iocurrent; - 8007566: 693a ldr r2, [r7, #16] - 8007568: 68fb ldr r3, [r7, #12] - 800756a: 4313 orrs r3, r2 - 800756c: 613b str r3, [r7, #16] + 80077ee: 693a ldr r2, [r7, #16] + 80077f0: 68fb ldr r3, [r7, #12] + 80077f2: 4313 orrs r3, r2 + 80077f4: 613b str r3, [r7, #16] } EXTI->IMR1 = temp; - 800756e: 4909 ldr r1, [pc, #36] ; (8007594 ) - 8007570: 2280 movs r2, #128 ; 0x80 - 8007572: 693b ldr r3, [r7, #16] - 8007574: 508b str r3, [r1, r2] + 80077f6: 4909 ldr r1, [pc, #36] ; (800781c ) + 80077f8: 2280 movs r2, #128 ; 0x80 + 80077fa: 693b ldr r3, [r7, #16] + 80077fc: 508b str r3, [r1, r2] } } position++; - 8007576: 697b ldr r3, [r7, #20] - 8007578: 3301 adds r3, #1 - 800757a: 617b str r3, [r7, #20] + 80077fe: 697b ldr r3, [r7, #20] + 8007800: 3301 adds r3, #1 + 8007802: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) - 800757c: 683b ldr r3, [r7, #0] - 800757e: 681a ldr r2, [r3, #0] - 8007580: 697b ldr r3, [r7, #20] - 8007582: 40da lsrs r2, r3 - 8007584: 1e13 subs r3, r2, #0 - 8007586: d000 beq.n 800758a - 8007588: e6b0 b.n 80072ec + 8007804: 683b ldr r3, [r7, #0] + 8007806: 681a ldr r2, [r3, #0] + 8007808: 697b ldr r3, [r7, #20] + 800780a: 40da lsrs r2, r3 + 800780c: 1e13 subs r3, r2, #0 + 800780e: d000 beq.n 8007812 + 8007810: e6b0 b.n 8007574 } } - 800758a: 46c0 nop ; (mov r8, r8) - 800758c: 46c0 nop ; (mov r8, r8) - 800758e: 46bd mov sp, r7 - 8007590: b006 add sp, #24 - 8007592: bd80 pop {r7, pc} - 8007594: 40021800 .word 0x40021800 - 8007598: 50000400 .word 0x50000400 - 800759c: 50000800 .word 0x50000800 - 80075a0: 50000c00 .word 0x50000c00 + 8007812: 46c0 nop ; (mov r8, r8) + 8007814: 46c0 nop ; (mov r8, r8) + 8007816: 46bd mov sp, r7 + 8007818: b006 add sp, #24 + 800781a: bd80 pop {r7, pc} + 800781c: 40021800 .word 0x40021800 + 8007820: 50000400 .word 0x50000400 + 8007824: 50000800 .word 0x50000800 + 8007828: 50000c00 .word 0x50000c00 -080075a4 : +0800782c : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 80075a4: b580 push {r7, lr} - 80075a6: b082 sub sp, #8 - 80075a8: af00 add r7, sp, #0 - 80075aa: 6078 str r0, [r7, #4] - 80075ac: 0008 movs r0, r1 - 80075ae: 0011 movs r1, r2 - 80075b0: 1cbb adds r3, r7, #2 - 80075b2: 1c02 adds r2, r0, #0 - 80075b4: 801a strh r2, [r3, #0] - 80075b6: 1c7b adds r3, r7, #1 - 80075b8: 1c0a adds r2, r1, #0 - 80075ba: 701a strb r2, [r3, #0] + 800782c: b580 push {r7, lr} + 800782e: b082 sub sp, #8 + 8007830: af00 add r7, sp, #0 + 8007832: 6078 str r0, [r7, #4] + 8007834: 0008 movs r0, r1 + 8007836: 0011 movs r1, r2 + 8007838: 1cbb adds r3, r7, #2 + 800783a: 1c02 adds r2, r0, #0 + 800783c: 801a strh r2, [r3, #0] + 800783e: 1c7b adds r3, r7, #1 + 8007840: 1c0a adds r2, r1, #0 + 8007842: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 80075bc: 1c7b adds r3, r7, #1 - 80075be: 781b ldrb r3, [r3, #0] - 80075c0: 2b00 cmp r3, #0 - 80075c2: d004 beq.n 80075ce + 8007844: 1c7b adds r3, r7, #1 + 8007846: 781b ldrb r3, [r3, #0] + 8007848: 2b00 cmp r3, #0 + 800784a: d004 beq.n 8007856 { GPIOx->BSRR = (uint32_t)GPIO_Pin; - 80075c4: 1cbb adds r3, r7, #2 - 80075c6: 881a ldrh r2, [r3, #0] - 80075c8: 687b ldr r3, [r7, #4] - 80075ca: 619a str r2, [r3, #24] + 800784c: 1cbb adds r3, r7, #2 + 800784e: 881a ldrh r2, [r3, #0] + 8007850: 687b ldr r3, [r7, #4] + 8007852: 619a str r2, [r3, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } - 80075cc: e003 b.n 80075d6 + 8007854: e003 b.n 800785e GPIOx->BRR = (uint32_t)GPIO_Pin; - 80075ce: 1cbb adds r3, r7, #2 - 80075d0: 881a ldrh r2, [r3, #0] - 80075d2: 687b ldr r3, [r7, #4] - 80075d4: 629a str r2, [r3, #40] ; 0x28 + 8007856: 1cbb adds r3, r7, #2 + 8007858: 881a ldrh r2, [r3, #0] + 800785a: 687b ldr r3, [r7, #4] + 800785c: 629a str r2, [r3, #40] ; 0x28 } - 80075d6: 46c0 nop ; (mov r8, r8) - 80075d8: 46bd mov sp, r7 - 80075da: b002 add sp, #8 - 80075dc: bd80 pop {r7, pc} + 800785e: 46c0 nop ; (mov r8, r8) + 8007860: 46bd mov sp, r7 + 8007862: b002 add sp, #8 + 8007864: bd80 pop {r7, pc} ... -080075e0 : +08007868 : * cleared before returning the status. If the flag is not cleared within * 6 microseconds, HAL_TIMEOUT status is reported. * @retval HAL Status */ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) { - 80075e0: b580 push {r7, lr} - 80075e2: b084 sub sp, #16 - 80075e4: af00 add r7, sp, #0 - 80075e6: 6078 str r0, [r7, #4] + 8007868: b580 push {r7, lr} + 800786a: b084 sub sp, #16 + 800786c: af00 add r7, sp, #0 + 800786e: 6078 str r0, [r7, #4] uint32_t wait_loop_index; assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); /* Modify voltage scaling range */ MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling); - 80075e8: 4b19 ldr r3, [pc, #100] ; (8007650 ) - 80075ea: 681b ldr r3, [r3, #0] - 80075ec: 4a19 ldr r2, [pc, #100] ; (8007654 ) - 80075ee: 4013 ands r3, r2 - 80075f0: 0019 movs r1, r3 - 80075f2: 4b17 ldr r3, [pc, #92] ; (8007650 ) - 80075f4: 687a ldr r2, [r7, #4] - 80075f6: 430a orrs r2, r1 - 80075f8: 601a str r2, [r3, #0] + 8007870: 4b19 ldr r3, [pc, #100] ; (80078d8 ) + 8007872: 681b ldr r3, [r3, #0] + 8007874: 4a19 ldr r2, [pc, #100] ; (80078dc ) + 8007876: 4013 ands r3, r2 + 8007878: 0019 movs r1, r3 + 800787a: 4b17 ldr r3, [pc, #92] ; (80078d8 ) + 800787c: 687a ldr r2, [r7, #4] + 800787e: 430a orrs r2, r1 + 8007880: 601a str r2, [r3, #0] /* In case of Range 1 selected, we need to ensure that main regulator reaches new value */ if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) - 80075fa: 687a ldr r2, [r7, #4] - 80075fc: 2380 movs r3, #128 ; 0x80 - 80075fe: 009b lsls r3, r3, #2 - 8007600: 429a cmp r2, r3 - 8007602: d11f bne.n 8007644 + 8007882: 687a ldr r2, [r7, #4] + 8007884: 2380 movs r3, #128 ; 0x80 + 8007886: 009b lsls r3, r3, #2 + 8007888: 429a cmp r2, r3 + 800788a: d11f bne.n 80078cc { /* Set timeout value */ wait_loop_index = ((PWR_VOSF_SETTING_DELAY_6_US * SystemCoreClock) / 1000000U) + 1U; - 8007604: 4b14 ldr r3, [pc, #80] ; (8007658 ) - 8007606: 681a ldr r2, [r3, #0] - 8007608: 0013 movs r3, r2 - 800760a: 005b lsls r3, r3, #1 - 800760c: 189b adds r3, r3, r2 - 800760e: 005b lsls r3, r3, #1 - 8007610: 4912 ldr r1, [pc, #72] ; (800765c ) - 8007612: 0018 movs r0, r3 - 8007614: f7f8 fd8a bl 800012c <__udivsi3> - 8007618: 0003 movs r3, r0 - 800761a: 3301 adds r3, #1 - 800761c: 60fb str r3, [r7, #12] + 800788c: 4b14 ldr r3, [pc, #80] ; (80078e0 ) + 800788e: 681a ldr r2, [r3, #0] + 8007890: 0013 movs r3, r2 + 8007892: 005b lsls r3, r3, #1 + 8007894: 189b adds r3, r3, r2 + 8007896: 005b lsls r3, r3, #1 + 8007898: 4912 ldr r1, [pc, #72] ; (80078e4 ) + 800789a: 0018 movs r0, r3 + 800789c: f7f8 fc46 bl 800012c <__udivsi3> + 80078a0: 0003 movs r3, r0 + 80078a2: 3301 adds r3, #1 + 80078a4: 60fb str r3, [r7, #12] /* Wait until VOSF is reset */ while (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - 800761e: e008 b.n 8007632 + 80078a6: e008 b.n 80078ba { if (wait_loop_index != 0U) - 8007620: 68fb ldr r3, [r7, #12] - 8007622: 2b00 cmp r3, #0 - 8007624: d003 beq.n 800762e + 80078a8: 68fb ldr r3, [r7, #12] + 80078aa: 2b00 cmp r3, #0 + 80078ac: d003 beq.n 80078b6 { wait_loop_index--; - 8007626: 68fb ldr r3, [r7, #12] - 8007628: 3b01 subs r3, #1 - 800762a: 60fb str r3, [r7, #12] - 800762c: e001 b.n 8007632 + 80078ae: 68fb ldr r3, [r7, #12] + 80078b0: 3b01 subs r3, #1 + 80078b2: 60fb str r3, [r7, #12] + 80078b4: e001 b.n 80078ba } else { return HAL_TIMEOUT; - 800762e: 2303 movs r3, #3 - 8007630: e009 b.n 8007646 + 80078b6: 2303 movs r3, #3 + 80078b8: e009 b.n 80078ce while (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - 8007632: 4b07 ldr r3, [pc, #28] ; (8007650 ) - 8007634: 695a ldr r2, [r3, #20] - 8007636: 2380 movs r3, #128 ; 0x80 - 8007638: 00db lsls r3, r3, #3 - 800763a: 401a ands r2, r3 - 800763c: 2380 movs r3, #128 ; 0x80 - 800763e: 00db lsls r3, r3, #3 - 8007640: 429a cmp r2, r3 - 8007642: d0ed beq.n 8007620 + 80078ba: 4b07 ldr r3, [pc, #28] ; (80078d8 ) + 80078bc: 695a ldr r2, [r3, #20] + 80078be: 2380 movs r3, #128 ; 0x80 + 80078c0: 00db lsls r3, r3, #3 + 80078c2: 401a ands r2, r3 + 80078c4: 2380 movs r3, #128 ; 0x80 + 80078c6: 00db lsls r3, r3, #3 + 80078c8: 429a cmp r2, r3 + 80078ca: d0ed beq.n 80078a8 } } } return HAL_OK; - 8007644: 2300 movs r3, #0 + 80078cc: 2300 movs r3, #0 } - 8007646: 0018 movs r0, r3 - 8007648: 46bd mov sp, r7 - 800764a: b004 add sp, #16 - 800764c: bd80 pop {r7, pc} - 800764e: 46c0 nop ; (mov r8, r8) - 8007650: 40007000 .word 0x40007000 - 8007654: fffff9ff .word 0xfffff9ff - 8007658: 20000040 .word 0x20000040 - 800765c: 000f4240 .word 0x000f4240 + 80078ce: 0018 movs r0, r3 + 80078d0: 46bd mov sp, r7 + 80078d2: b004 add sp, #16 + 80078d4: bd80 pop {r7, pc} + 80078d6: 46c0 nop ; (mov r8, r8) + 80078d8: 40007000 .word 0x40007000 + 80078dc: fffff9ff .word 0xfffff9ff + 80078e0: 20000040 .word 0x20000040 + 80078e4: 000f4240 .word 0x000f4240 -08007660 : +080078e8 : * @arg @ref LL_RCC_APB1_DIV_4 * @arg @ref LL_RCC_APB1_DIV_8 * @arg @ref LL_RCC_APB1_DIV_16 */ __STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void) { - 8007660: b580 push {r7, lr} - 8007662: af00 add r7, sp, #0 + 80078e8: b580 push {r7, lr} + 80078ea: af00 add r7, sp, #0 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE)); - 8007664: 4b03 ldr r3, [pc, #12] ; (8007674 ) - 8007666: 689a ldr r2, [r3, #8] - 8007668: 23e0 movs r3, #224 ; 0xe0 - 800766a: 01db lsls r3, r3, #7 - 800766c: 4013 ands r3, r2 + 80078ec: 4b03 ldr r3, [pc, #12] ; (80078fc ) + 80078ee: 689a ldr r2, [r3, #8] + 80078f0: 23e0 movs r3, #224 ; 0xe0 + 80078f2: 01db lsls r3, r3, #7 + 80078f4: 4013 ands r3, r2 } - 800766e: 0018 movs r0, r3 - 8007670: 46bd mov sp, r7 - 8007672: bd80 pop {r7, pc} - 8007674: 40021000 .word 0x40021000 + 80078f6: 0018 movs r0, r3 + 80078f8: 46bd mov sp, r7 + 80078fa: bd80 pop {r7, pc} + 80078fc: 40021000 .word 0x40021000 -08007678 : +08007900 : * supported by this function. User should request a transition to LSE Off * first and then to LSE On or LSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8007678: b580 push {r7, lr} - 800767a: b088 sub sp, #32 - 800767c: af00 add r7, sp, #0 - 800767e: 6078 str r0, [r7, #4] + 8007900: b580 push {r7, lr} + 8007902: b088 sub sp, #32 + 8007904: af00 add r7, sp, #0 + 8007906: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t temp_sysclksrc; uint32_t temp_pllckcfg; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 8007680: 687b ldr r3, [r7, #4] - 8007682: 2b00 cmp r3, #0 - 8007684: d101 bne.n 800768a + 8007908: 687b ldr r3, [r7, #4] + 800790a: 2b00 cmp r3, #0 + 800790c: d101 bne.n 8007912 { return HAL_ERROR; - 8007686: 2301 movs r3, #1 - 8007688: e2f3 b.n 8007c72 + 800790e: 2301 movs r3, #1 + 8007910: e2f3 b.n 8007efa /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 800768a: 687b ldr r3, [r7, #4] - 800768c: 681b ldr r3, [r3, #0] - 800768e: 2201 movs r2, #1 - 8007690: 4013 ands r3, r2 - 8007692: d100 bne.n 8007696 - 8007694: e07c b.n 8007790 + 8007912: 687b ldr r3, [r7, #4] + 8007914: 681b ldr r3, [r3, #0] + 8007916: 2201 movs r2, #1 + 8007918: 4013 ands r3, r2 + 800791a: d100 bne.n 800791e + 800791c: e07c b.n 8007a18 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 8007696: 4bc3 ldr r3, [pc, #780] ; (80079a4 ) - 8007698: 689b ldr r3, [r3, #8] - 800769a: 2238 movs r2, #56 ; 0x38 - 800769c: 4013 ands r3, r2 - 800769e: 61bb str r3, [r7, #24] + 800791e: 4bc3 ldr r3, [pc, #780] ; (8007c2c ) + 8007920: 689b ldr r3, [r3, #8] + 8007922: 2238 movs r2, #56 ; 0x38 + 8007924: 4013 ands r3, r2 + 8007926: 61bb str r3, [r7, #24] temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); - 80076a0: 4bc0 ldr r3, [pc, #768] ; (80079a4 ) - 80076a2: 68db ldr r3, [r3, #12] - 80076a4: 2203 movs r2, #3 - 80076a6: 4013 ands r3, r2 - 80076a8: 617b str r3, [r7, #20] + 8007928: 4bc0 ldr r3, [pc, #768] ; (8007c2c ) + 800792a: 68db ldr r3, [r3, #12] + 800792c: 2203 movs r2, #3 + 800792e: 4013 ands r3, r2 + 8007930: 617b str r3, [r7, #20] /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if (((temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (temp_pllckcfg == RCC_PLLSOURCE_HSE)) - 80076aa: 69bb ldr r3, [r7, #24] - 80076ac: 2b10 cmp r3, #16 - 80076ae: d102 bne.n 80076b6 - 80076b0: 697b ldr r3, [r7, #20] - 80076b2: 2b03 cmp r3, #3 - 80076b4: d002 beq.n 80076bc + 8007932: 69bb ldr r3, [r7, #24] + 8007934: 2b10 cmp r3, #16 + 8007936: d102 bne.n 800793e + 8007938: 697b ldr r3, [r7, #20] + 800793a: 2b03 cmp r3, #3 + 800793c: d002 beq.n 8007944 || (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSE)) - 80076b6: 69bb ldr r3, [r7, #24] - 80076b8: 2b08 cmp r3, #8 - 80076ba: d10b bne.n 80076d4 + 800793e: 69bb ldr r3, [r7, #24] + 8007940: 2b08 cmp r3, #8 + 8007942: d10b bne.n 800795c { if ((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 80076bc: 4bb9 ldr r3, [pc, #740] ; (80079a4 ) - 80076be: 681a ldr r2, [r3, #0] - 80076c0: 2380 movs r3, #128 ; 0x80 - 80076c2: 029b lsls r3, r3, #10 - 80076c4: 4013 ands r3, r2 - 80076c6: d062 beq.n 800778e - 80076c8: 687b ldr r3, [r7, #4] - 80076ca: 685b ldr r3, [r3, #4] - 80076cc: 2b00 cmp r3, #0 - 80076ce: d15e bne.n 800778e + 8007944: 4bb9 ldr r3, [pc, #740] ; (8007c2c ) + 8007946: 681a ldr r2, [r3, #0] + 8007948: 2380 movs r3, #128 ; 0x80 + 800794a: 029b lsls r3, r3, #10 + 800794c: 4013 ands r3, r2 + 800794e: d062 beq.n 8007a16 + 8007950: 687b ldr r3, [r7, #4] + 8007952: 685b ldr r3, [r3, #4] + 8007954: 2b00 cmp r3, #0 + 8007956: d15e bne.n 8007a16 { return HAL_ERROR; - 80076d0: 2301 movs r3, #1 - 80076d2: e2ce b.n 8007c72 + 8007958: 2301 movs r3, #1 + 800795a: e2ce b.n 8007efa } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 80076d4: 687b ldr r3, [r7, #4] - 80076d6: 685a ldr r2, [r3, #4] - 80076d8: 2380 movs r3, #128 ; 0x80 - 80076da: 025b lsls r3, r3, #9 - 80076dc: 429a cmp r2, r3 - 80076de: d107 bne.n 80076f0 - 80076e0: 4bb0 ldr r3, [pc, #704] ; (80079a4 ) - 80076e2: 681a ldr r2, [r3, #0] - 80076e4: 4baf ldr r3, [pc, #700] ; (80079a4 ) - 80076e6: 2180 movs r1, #128 ; 0x80 - 80076e8: 0249 lsls r1, r1, #9 - 80076ea: 430a orrs r2, r1 - 80076ec: 601a str r2, [r3, #0] - 80076ee: e020 b.n 8007732 - 80076f0: 687b ldr r3, [r7, #4] - 80076f2: 685a ldr r2, [r3, #4] - 80076f4: 23a0 movs r3, #160 ; 0xa0 - 80076f6: 02db lsls r3, r3, #11 - 80076f8: 429a cmp r2, r3 - 80076fa: d10e bne.n 800771a - 80076fc: 4ba9 ldr r3, [pc, #676] ; (80079a4 ) - 80076fe: 681a ldr r2, [r3, #0] - 8007700: 4ba8 ldr r3, [pc, #672] ; (80079a4 ) - 8007702: 2180 movs r1, #128 ; 0x80 - 8007704: 02c9 lsls r1, r1, #11 - 8007706: 430a orrs r2, r1 - 8007708: 601a str r2, [r3, #0] - 800770a: 4ba6 ldr r3, [pc, #664] ; (80079a4 ) - 800770c: 681a ldr r2, [r3, #0] - 800770e: 4ba5 ldr r3, [pc, #660] ; (80079a4 ) - 8007710: 2180 movs r1, #128 ; 0x80 - 8007712: 0249 lsls r1, r1, #9 - 8007714: 430a orrs r2, r1 - 8007716: 601a str r2, [r3, #0] - 8007718: e00b b.n 8007732 - 800771a: 4ba2 ldr r3, [pc, #648] ; (80079a4 ) - 800771c: 681a ldr r2, [r3, #0] - 800771e: 4ba1 ldr r3, [pc, #644] ; (80079a4 ) - 8007720: 49a1 ldr r1, [pc, #644] ; (80079a8 ) - 8007722: 400a ands r2, r1 - 8007724: 601a str r2, [r3, #0] - 8007726: 4b9f ldr r3, [pc, #636] ; (80079a4 ) - 8007728: 681a ldr r2, [r3, #0] - 800772a: 4b9e ldr r3, [pc, #632] ; (80079a4 ) - 800772c: 499f ldr r1, [pc, #636] ; (80079ac ) - 800772e: 400a ands r2, r1 - 8007730: 601a str r2, [r3, #0] + 800795c: 687b ldr r3, [r7, #4] + 800795e: 685a ldr r2, [r3, #4] + 8007960: 2380 movs r3, #128 ; 0x80 + 8007962: 025b lsls r3, r3, #9 + 8007964: 429a cmp r2, r3 + 8007966: d107 bne.n 8007978 + 8007968: 4bb0 ldr r3, [pc, #704] ; (8007c2c ) + 800796a: 681a ldr r2, [r3, #0] + 800796c: 4baf ldr r3, [pc, #700] ; (8007c2c ) + 800796e: 2180 movs r1, #128 ; 0x80 + 8007970: 0249 lsls r1, r1, #9 + 8007972: 430a orrs r2, r1 + 8007974: 601a str r2, [r3, #0] + 8007976: e020 b.n 80079ba + 8007978: 687b ldr r3, [r7, #4] + 800797a: 685a ldr r2, [r3, #4] + 800797c: 23a0 movs r3, #160 ; 0xa0 + 800797e: 02db lsls r3, r3, #11 + 8007980: 429a cmp r2, r3 + 8007982: d10e bne.n 80079a2 + 8007984: 4ba9 ldr r3, [pc, #676] ; (8007c2c ) + 8007986: 681a ldr r2, [r3, #0] + 8007988: 4ba8 ldr r3, [pc, #672] ; (8007c2c ) + 800798a: 2180 movs r1, #128 ; 0x80 + 800798c: 02c9 lsls r1, r1, #11 + 800798e: 430a orrs r2, r1 + 8007990: 601a str r2, [r3, #0] + 8007992: 4ba6 ldr r3, [pc, #664] ; (8007c2c ) + 8007994: 681a ldr r2, [r3, #0] + 8007996: 4ba5 ldr r3, [pc, #660] ; (8007c2c ) + 8007998: 2180 movs r1, #128 ; 0x80 + 800799a: 0249 lsls r1, r1, #9 + 800799c: 430a orrs r2, r1 + 800799e: 601a str r2, [r3, #0] + 80079a0: e00b b.n 80079ba + 80079a2: 4ba2 ldr r3, [pc, #648] ; (8007c2c ) + 80079a4: 681a ldr r2, [r3, #0] + 80079a6: 4ba1 ldr r3, [pc, #644] ; (8007c2c ) + 80079a8: 49a1 ldr r1, [pc, #644] ; (8007c30 ) + 80079aa: 400a ands r2, r1 + 80079ac: 601a str r2, [r3, #0] + 80079ae: 4b9f ldr r3, [pc, #636] ; (8007c2c ) + 80079b0: 681a ldr r2, [r3, #0] + 80079b2: 4b9e ldr r3, [pc, #632] ; (8007c2c ) + 80079b4: 499f ldr r1, [pc, #636] ; (8007c34 ) + 80079b6: 400a ands r2, r1 + 80079b8: 601a str r2, [r3, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8007732: 687b ldr r3, [r7, #4] - 8007734: 685b ldr r3, [r3, #4] - 8007736: 2b00 cmp r3, #0 - 8007738: d014 beq.n 8007764 + 80079ba: 687b ldr r3, [r7, #4] + 80079bc: 685b ldr r3, [r3, #4] + 80079be: 2b00 cmp r3, #0 + 80079c0: d014 beq.n 80079ec { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 800773a: f7fe fc4d bl 8005fd8 - 800773e: 0003 movs r3, r0 - 8007740: 613b str r3, [r7, #16] + 80079c2: f7fe fc4d bl 8006260 + 80079c6: 0003 movs r3, r0 + 80079c8: 613b str r3, [r7, #16] /* Wait till HSE is ready */ while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 8007742: e008 b.n 8007756 + 80079ca: e008 b.n 80079de { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8007744: f7fe fc48 bl 8005fd8 - 8007748: 0002 movs r2, r0 - 800774a: 693b ldr r3, [r7, #16] - 800774c: 1ad3 subs r3, r2, r3 - 800774e: 2b64 cmp r3, #100 ; 0x64 - 8007750: d901 bls.n 8007756 + 80079cc: f7fe fc48 bl 8006260 + 80079d0: 0002 movs r2, r0 + 80079d2: 693b ldr r3, [r7, #16] + 80079d4: 1ad3 subs r3, r2, r3 + 80079d6: 2b64 cmp r3, #100 ; 0x64 + 80079d8: d901 bls.n 80079de { return HAL_TIMEOUT; - 8007752: 2303 movs r3, #3 - 8007754: e28d b.n 8007c72 + 80079da: 2303 movs r3, #3 + 80079dc: e28d b.n 8007efa while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 8007756: 4b93 ldr r3, [pc, #588] ; (80079a4 ) - 8007758: 681a ldr r2, [r3, #0] - 800775a: 2380 movs r3, #128 ; 0x80 - 800775c: 029b lsls r3, r3, #10 - 800775e: 4013 ands r3, r2 - 8007760: d0f0 beq.n 8007744 - 8007762: e015 b.n 8007790 + 80079de: 4b93 ldr r3, [pc, #588] ; (8007c2c ) + 80079e0: 681a ldr r2, [r3, #0] + 80079e2: 2380 movs r3, #128 ; 0x80 + 80079e4: 029b lsls r3, r3, #10 + 80079e6: 4013 ands r3, r2 + 80079e8: d0f0 beq.n 80079cc + 80079ea: e015 b.n 8007a18 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007764: f7fe fc38 bl 8005fd8 - 8007768: 0003 movs r3, r0 - 800776a: 613b str r3, [r7, #16] + 80079ec: f7fe fc38 bl 8006260 + 80079f0: 0003 movs r3, r0 + 80079f2: 613b str r3, [r7, #16] /* Wait till HSE is disabled */ while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) - 800776c: e008 b.n 8007780 + 80079f4: e008 b.n 8007a08 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 800776e: f7fe fc33 bl 8005fd8 - 8007772: 0002 movs r2, r0 - 8007774: 693b ldr r3, [r7, #16] - 8007776: 1ad3 subs r3, r2, r3 - 8007778: 2b64 cmp r3, #100 ; 0x64 - 800777a: d901 bls.n 8007780 + 80079f6: f7fe fc33 bl 8006260 + 80079fa: 0002 movs r2, r0 + 80079fc: 693b ldr r3, [r7, #16] + 80079fe: 1ad3 subs r3, r2, r3 + 8007a00: 2b64 cmp r3, #100 ; 0x64 + 8007a02: d901 bls.n 8007a08 { return HAL_TIMEOUT; - 800777c: 2303 movs r3, #3 - 800777e: e278 b.n 8007c72 + 8007a04: 2303 movs r3, #3 + 8007a06: e278 b.n 8007efa while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) - 8007780: 4b88 ldr r3, [pc, #544] ; (80079a4 ) - 8007782: 681a ldr r2, [r3, #0] - 8007784: 2380 movs r3, #128 ; 0x80 - 8007786: 029b lsls r3, r3, #10 - 8007788: 4013 ands r3, r2 - 800778a: d1f0 bne.n 800776e - 800778c: e000 b.n 8007790 + 8007a08: 4b88 ldr r3, [pc, #544] ; (8007c2c ) + 8007a0a: 681a ldr r2, [r3, #0] + 8007a0c: 2380 movs r3, #128 ; 0x80 + 8007a0e: 029b lsls r3, r3, #10 + 8007a10: 4013 ands r3, r2 + 8007a12: d1f0 bne.n 80079f6 + 8007a14: e000 b.n 8007a18 if ((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 800778e: 46c0 nop ; (mov r8, r8) + 8007a16: 46c0 nop ; (mov r8, r8) } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8007790: 687b ldr r3, [r7, #4] - 8007792: 681b ldr r3, [r3, #0] - 8007794: 2202 movs r2, #2 - 8007796: 4013 ands r3, r2 - 8007798: d100 bne.n 800779c - 800779a: e099 b.n 80078d0 + 8007a18: 687b ldr r3, [r7, #4] + 8007a1a: 681b ldr r3, [r3, #0] + 8007a1c: 2202 movs r2, #2 + 8007a1e: 4013 ands r3, r2 + 8007a20: d100 bne.n 8007a24 + 8007a22: e099 b.n 8007b58 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_HSI_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); assert_param(IS_RCC_HSIDIV(RCC_OscInitStruct->HSIDiv)); /* Check if HSI16 is used as system clock or as PLL source when PLL is selected as system clock */ temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 800779c: 4b81 ldr r3, [pc, #516] ; (80079a4 ) - 800779e: 689b ldr r3, [r3, #8] - 80077a0: 2238 movs r2, #56 ; 0x38 - 80077a2: 4013 ands r3, r2 - 80077a4: 61bb str r3, [r7, #24] + 8007a24: 4b81 ldr r3, [pc, #516] ; (8007c2c ) + 8007a26: 689b ldr r3, [r3, #8] + 8007a28: 2238 movs r2, #56 ; 0x38 + 8007a2a: 4013 ands r3, r2 + 8007a2c: 61bb str r3, [r7, #24] temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); - 80077a6: 4b7f ldr r3, [pc, #508] ; (80079a4 ) - 80077a8: 68db ldr r3, [r3, #12] - 80077aa: 2203 movs r2, #3 - 80077ac: 4013 ands r3, r2 - 80077ae: 617b str r3, [r7, #20] + 8007a2e: 4b7f ldr r3, [pc, #508] ; (8007c2c ) + 8007a30: 68db ldr r3, [r3, #12] + 8007a32: 2203 movs r2, #3 + 8007a34: 4013 ands r3, r2 + 8007a36: 617b str r3, [r7, #20] if (((temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (temp_pllckcfg == RCC_PLLSOURCE_HSI)) - 80077b0: 69bb ldr r3, [r7, #24] - 80077b2: 2b10 cmp r3, #16 - 80077b4: d102 bne.n 80077bc - 80077b6: 697b ldr r3, [r7, #20] - 80077b8: 2b02 cmp r3, #2 - 80077ba: d002 beq.n 80077c2 + 8007a38: 69bb ldr r3, [r7, #24] + 8007a3a: 2b10 cmp r3, #16 + 8007a3c: d102 bne.n 8007a44 + 8007a3e: 697b ldr r3, [r7, #20] + 8007a40: 2b02 cmp r3, #2 + 8007a42: d002 beq.n 8007a4a || (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSI)) - 80077bc: 69bb ldr r3, [r7, #24] - 80077be: 2b00 cmp r3, #0 - 80077c0: d135 bne.n 800782e + 8007a44: 69bb ldr r3, [r7, #24] + 8007a46: 2b00 cmp r3, #0 + 8007a48: d135 bne.n 8007ab6 { /* When HSI is used as system clock or as PLL input clock it can not be disabled */ if ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 80077c2: 4b78 ldr r3, [pc, #480] ; (80079a4 ) - 80077c4: 681a ldr r2, [r3, #0] - 80077c6: 2380 movs r3, #128 ; 0x80 - 80077c8: 00db lsls r3, r3, #3 - 80077ca: 4013 ands r3, r2 - 80077cc: d005 beq.n 80077da - 80077ce: 687b ldr r3, [r7, #4] - 80077d0: 68db ldr r3, [r3, #12] - 80077d2: 2b00 cmp r3, #0 - 80077d4: d101 bne.n 80077da + 8007a4a: 4b78 ldr r3, [pc, #480] ; (8007c2c ) + 8007a4c: 681a ldr r2, [r3, #0] + 8007a4e: 2380 movs r3, #128 ; 0x80 + 8007a50: 00db lsls r3, r3, #3 + 8007a52: 4013 ands r3, r2 + 8007a54: d005 beq.n 8007a62 + 8007a56: 687b ldr r3, [r7, #4] + 8007a58: 68db ldr r3, [r3, #12] + 8007a5a: 2b00 cmp r3, #0 + 8007a5c: d101 bne.n 8007a62 { return HAL_ERROR; - 80077d6: 2301 movs r3, #1 - 80077d8: e24b b.n 8007c72 + 8007a5e: 2301 movs r3, #1 + 8007a60: e24b b.n 8007efa } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80077da: 4b72 ldr r3, [pc, #456] ; (80079a4 ) - 80077dc: 685b ldr r3, [r3, #4] - 80077de: 4a74 ldr r2, [pc, #464] ; (80079b0 ) - 80077e0: 4013 ands r3, r2 - 80077e2: 0019 movs r1, r3 - 80077e4: 687b ldr r3, [r7, #4] - 80077e6: 695b ldr r3, [r3, #20] - 80077e8: 021a lsls r2, r3, #8 - 80077ea: 4b6e ldr r3, [pc, #440] ; (80079a4 ) - 80077ec: 430a orrs r2, r1 - 80077ee: 605a str r2, [r3, #4] + 8007a62: 4b72 ldr r3, [pc, #456] ; (8007c2c ) + 8007a64: 685b ldr r3, [r3, #4] + 8007a66: 4a74 ldr r2, [pc, #464] ; (8007c38 ) + 8007a68: 4013 ands r3, r2 + 8007a6a: 0019 movs r1, r3 + 8007a6c: 687b ldr r3, [r7, #4] + 8007a6e: 695b ldr r3, [r3, #20] + 8007a70: 021a lsls r2, r3, #8 + 8007a72: 4b6e ldr r3, [pc, #440] ; (8007c2c ) + 8007a74: 430a orrs r2, r1 + 8007a76: 605a str r2, [r3, #4] if (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSI) - 80077f0: 69bb ldr r3, [r7, #24] - 80077f2: 2b00 cmp r3, #0 - 80077f4: d112 bne.n 800781c + 8007a78: 69bb ldr r3, [r7, #24] + 8007a7a: 2b00 cmp r3, #0 + 8007a7c: d112 bne.n 8007aa4 { /* Adjust the HSI16 division factor */ __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 80077f6: 4b6b ldr r3, [pc, #428] ; (80079a4 ) - 80077f8: 681b ldr r3, [r3, #0] - 80077fa: 4a6e ldr r2, [pc, #440] ; (80079b4 ) - 80077fc: 4013 ands r3, r2 - 80077fe: 0019 movs r1, r3 - 8007800: 687b ldr r3, [r7, #4] - 8007802: 691a ldr r2, [r3, #16] - 8007804: 4b67 ldr r3, [pc, #412] ; (80079a4 ) - 8007806: 430a orrs r2, r1 - 8007808: 601a str r2, [r3, #0] + 8007a7e: 4b6b ldr r3, [pc, #428] ; (8007c2c ) + 8007a80: 681b ldr r3, [r3, #0] + 8007a82: 4a6e ldr r2, [pc, #440] ; (8007c3c ) + 8007a84: 4013 ands r3, r2 + 8007a86: 0019 movs r1, r3 + 8007a88: 687b ldr r3, [r7, #4] + 8007a8a: 691a ldr r2, [r3, #16] + 8007a8c: 4b67 ldr r3, [pc, #412] ; (8007c2c ) + 8007a8e: 430a orrs r2, r1 + 8007a90: 601a str r2, [r3, #0] /* Update the SystemCoreClock global variable with HSISYS value */ SystemCoreClock = (HSI_VALUE / (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos))); - 800780a: 4b66 ldr r3, [pc, #408] ; (80079a4 ) - 800780c: 681b ldr r3, [r3, #0] - 800780e: 0adb lsrs r3, r3, #11 - 8007810: 2207 movs r2, #7 - 8007812: 4013 ands r3, r2 - 8007814: 4a68 ldr r2, [pc, #416] ; (80079b8 ) - 8007816: 40da lsrs r2, r3 - 8007818: 4b68 ldr r3, [pc, #416] ; (80079bc ) - 800781a: 601a str r2, [r3, #0] + 8007a92: 4b66 ldr r3, [pc, #408] ; (8007c2c ) + 8007a94: 681b ldr r3, [r3, #0] + 8007a96: 0adb lsrs r3, r3, #11 + 8007a98: 2207 movs r2, #7 + 8007a9a: 4013 ands r3, r2 + 8007a9c: 4a68 ldr r2, [pc, #416] ; (8007c40 ) + 8007a9e: 40da lsrs r2, r3 + 8007aa0: 4b68 ldr r3, [pc, #416] ; (8007c44 ) + 8007aa2: 601a str r2, [r3, #0] } /* Adapt Systick interrupt period */ if (HAL_InitTick(uwTickPrio) != HAL_OK) - 800781c: 4b68 ldr r3, [pc, #416] ; (80079c0 ) - 800781e: 681b ldr r3, [r3, #0] - 8007820: 0018 movs r0, r3 - 8007822: f7fd ffa1 bl 8005768 - 8007826: 1e03 subs r3, r0, #0 - 8007828: d051 beq.n 80078ce + 8007aa4: 4b68 ldr r3, [pc, #416] ; (8007c48 ) + 8007aa6: 681b ldr r3, [r3, #0] + 8007aa8: 0018 movs r0, r3 + 8007aaa: f7fd fe61 bl 8005770 + 8007aae: 1e03 subs r3, r0, #0 + 8007ab0: d051 beq.n 8007b56 { return HAL_ERROR; - 800782a: 2301 movs r3, #1 - 800782c: e221 b.n 8007c72 + 8007ab2: 2301 movs r3, #1 + 8007ab4: e221 b.n 8007efa } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 800782e: 687b ldr r3, [r7, #4] - 8007830: 68db ldr r3, [r3, #12] - 8007832: 2b00 cmp r3, #0 - 8007834: d030 beq.n 8007898 + 8007ab6: 687b ldr r3, [r7, #4] + 8007ab8: 68db ldr r3, [r3, #12] + 8007aba: 2b00 cmp r3, #0 + 8007abc: d030 beq.n 8007b20 { /* Configure the HSI16 division factor */ __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv); - 8007836: 4b5b ldr r3, [pc, #364] ; (80079a4 ) - 8007838: 681b ldr r3, [r3, #0] - 800783a: 4a5e ldr r2, [pc, #376] ; (80079b4 ) - 800783c: 4013 ands r3, r2 - 800783e: 0019 movs r1, r3 - 8007840: 687b ldr r3, [r7, #4] - 8007842: 691a ldr r2, [r3, #16] - 8007844: 4b57 ldr r3, [pc, #348] ; (80079a4 ) - 8007846: 430a orrs r2, r1 - 8007848: 601a str r2, [r3, #0] + 8007abe: 4b5b ldr r3, [pc, #364] ; (8007c2c ) + 8007ac0: 681b ldr r3, [r3, #0] + 8007ac2: 4a5e ldr r2, [pc, #376] ; (8007c3c ) + 8007ac4: 4013 ands r3, r2 + 8007ac6: 0019 movs r1, r3 + 8007ac8: 687b ldr r3, [r7, #4] + 8007aca: 691a ldr r2, [r3, #16] + 8007acc: 4b57 ldr r3, [pc, #348] ; (8007c2c ) + 8007ace: 430a orrs r2, r1 + 8007ad0: 601a str r2, [r3, #0] /* Enable the Internal High Speed oscillator (HSI16). */ __HAL_RCC_HSI_ENABLE(); - 800784a: 4b56 ldr r3, [pc, #344] ; (80079a4 ) - 800784c: 681a ldr r2, [r3, #0] - 800784e: 4b55 ldr r3, [pc, #340] ; (80079a4 ) - 8007850: 2180 movs r1, #128 ; 0x80 - 8007852: 0049 lsls r1, r1, #1 - 8007854: 430a orrs r2, r1 - 8007856: 601a str r2, [r3, #0] + 8007ad2: 4b56 ldr r3, [pc, #344] ; (8007c2c ) + 8007ad4: 681a ldr r2, [r3, #0] + 8007ad6: 4b55 ldr r3, [pc, #340] ; (8007c2c ) + 8007ad8: 2180 movs r1, #128 ; 0x80 + 8007ada: 0049 lsls r1, r1, #1 + 8007adc: 430a orrs r2, r1 + 8007ade: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007858: f7fe fbbe bl 8005fd8 - 800785c: 0003 movs r3, r0 - 800785e: 613b str r3, [r7, #16] + 8007ae0: f7fe fbbe bl 8006260 + 8007ae4: 0003 movs r3, r0 + 8007ae6: 613b str r3, [r7, #16] /* Wait till HSI is ready */ while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 8007860: e008 b.n 8007874 + 8007ae8: e008 b.n 8007afc { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8007862: f7fe fbb9 bl 8005fd8 - 8007866: 0002 movs r2, r0 - 8007868: 693b ldr r3, [r7, #16] - 800786a: 1ad3 subs r3, r2, r3 - 800786c: 2b02 cmp r3, #2 - 800786e: d901 bls.n 8007874 + 8007aea: f7fe fbb9 bl 8006260 + 8007aee: 0002 movs r2, r0 + 8007af0: 693b ldr r3, [r7, #16] + 8007af2: 1ad3 subs r3, r2, r3 + 8007af4: 2b02 cmp r3, #2 + 8007af6: d901 bls.n 8007afc { return HAL_TIMEOUT; - 8007870: 2303 movs r3, #3 - 8007872: e1fe b.n 8007c72 + 8007af8: 2303 movs r3, #3 + 8007afa: e1fe b.n 8007efa while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 8007874: 4b4b ldr r3, [pc, #300] ; (80079a4 ) - 8007876: 681a ldr r2, [r3, #0] - 8007878: 2380 movs r3, #128 ; 0x80 - 800787a: 00db lsls r3, r3, #3 - 800787c: 4013 ands r3, r2 - 800787e: d0f0 beq.n 8007862 + 8007afc: 4b4b ldr r3, [pc, #300] ; (8007c2c ) + 8007afe: 681a ldr r2, [r3, #0] + 8007b00: 2380 movs r3, #128 ; 0x80 + 8007b02: 00db lsls r3, r3, #3 + 8007b04: 4013 ands r3, r2 + 8007b06: d0f0 beq.n 8007aea } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8007880: 4b48 ldr r3, [pc, #288] ; (80079a4 ) - 8007882: 685b ldr r3, [r3, #4] - 8007884: 4a4a ldr r2, [pc, #296] ; (80079b0 ) - 8007886: 4013 ands r3, r2 - 8007888: 0019 movs r1, r3 - 800788a: 687b ldr r3, [r7, #4] - 800788c: 695b ldr r3, [r3, #20] - 800788e: 021a lsls r2, r3, #8 - 8007890: 4b44 ldr r3, [pc, #272] ; (80079a4 ) - 8007892: 430a orrs r2, r1 - 8007894: 605a str r2, [r3, #4] - 8007896: e01b b.n 80078d0 + 8007b08: 4b48 ldr r3, [pc, #288] ; (8007c2c ) + 8007b0a: 685b ldr r3, [r3, #4] + 8007b0c: 4a4a ldr r2, [pc, #296] ; (8007c38 ) + 8007b0e: 4013 ands r3, r2 + 8007b10: 0019 movs r1, r3 + 8007b12: 687b ldr r3, [r7, #4] + 8007b14: 695b ldr r3, [r3, #20] + 8007b16: 021a lsls r2, r3, #8 + 8007b18: 4b44 ldr r3, [pc, #272] ; (8007c2c ) + 8007b1a: 430a orrs r2, r1 + 8007b1c: 605a str r2, [r3, #4] + 8007b1e: e01b b.n 8007b58 } else { /* Disable the Internal High Speed oscillator (HSI16). */ __HAL_RCC_HSI_DISABLE(); - 8007898: 4b42 ldr r3, [pc, #264] ; (80079a4 ) - 800789a: 681a ldr r2, [r3, #0] - 800789c: 4b41 ldr r3, [pc, #260] ; (80079a4 ) - 800789e: 4949 ldr r1, [pc, #292] ; (80079c4 ) - 80078a0: 400a ands r2, r1 - 80078a2: 601a str r2, [r3, #0] + 8007b20: 4b42 ldr r3, [pc, #264] ; (8007c2c ) + 8007b22: 681a ldr r2, [r3, #0] + 8007b24: 4b41 ldr r3, [pc, #260] ; (8007c2c ) + 8007b26: 4949 ldr r1, [pc, #292] ; (8007c4c ) + 8007b28: 400a ands r2, r1 + 8007b2a: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80078a4: f7fe fb98 bl 8005fd8 - 80078a8: 0003 movs r3, r0 - 80078aa: 613b str r3, [r7, #16] + 8007b2c: f7fe fb98 bl 8006260 + 8007b30: 0003 movs r3, r0 + 8007b32: 613b str r3, [r7, #16] /* Wait till HSI is disabled */ while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) - 80078ac: e008 b.n 80078c0 + 8007b34: e008 b.n 8007b48 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 80078ae: f7fe fb93 bl 8005fd8 - 80078b2: 0002 movs r2, r0 - 80078b4: 693b ldr r3, [r7, #16] - 80078b6: 1ad3 subs r3, r2, r3 - 80078b8: 2b02 cmp r3, #2 - 80078ba: d901 bls.n 80078c0 + 8007b36: f7fe fb93 bl 8006260 + 8007b3a: 0002 movs r2, r0 + 8007b3c: 693b ldr r3, [r7, #16] + 8007b3e: 1ad3 subs r3, r2, r3 + 8007b40: 2b02 cmp r3, #2 + 8007b42: d901 bls.n 8007b48 { return HAL_TIMEOUT; - 80078bc: 2303 movs r3, #3 - 80078be: e1d8 b.n 8007c72 + 8007b44: 2303 movs r3, #3 + 8007b46: e1d8 b.n 8007efa while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) - 80078c0: 4b38 ldr r3, [pc, #224] ; (80079a4 ) - 80078c2: 681a ldr r2, [r3, #0] - 80078c4: 2380 movs r3, #128 ; 0x80 - 80078c6: 00db lsls r3, r3, #3 - 80078c8: 4013 ands r3, r2 - 80078ca: d1f0 bne.n 80078ae - 80078cc: e000 b.n 80078d0 + 8007b48: 4b38 ldr r3, [pc, #224] ; (8007c2c ) + 8007b4a: 681a ldr r2, [r3, #0] + 8007b4c: 2380 movs r3, #128 ; 0x80 + 8007b4e: 00db lsls r3, r3, #3 + 8007b50: 4013 ands r3, r2 + 8007b52: d1f0 bne.n 8007b36 + 8007b54: e000 b.n 8007b58 if ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 80078ce: 46c0 nop ; (mov r8, r8) + 8007b56: 46c0 nop ; (mov r8, r8) } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80078d0: 687b ldr r3, [r7, #4] - 80078d2: 681b ldr r3, [r3, #0] - 80078d4: 2208 movs r2, #8 - 80078d6: 4013 ands r3, r2 - 80078d8: d047 beq.n 800796a + 8007b58: 687b ldr r3, [r7, #4] + 8007b5a: 681b ldr r3, [r3, #0] + 8007b5c: 2208 movs r2, #8 + 8007b5e: 4013 ands r3, r2 + 8007b60: d047 beq.n 8007bf2 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check if LSI is used as system clock */ if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSI) - 80078da: 4b32 ldr r3, [pc, #200] ; (80079a4 ) - 80078dc: 689b ldr r3, [r3, #8] - 80078de: 2238 movs r2, #56 ; 0x38 - 80078e0: 4013 ands r3, r2 - 80078e2: 2b18 cmp r3, #24 - 80078e4: d10a bne.n 80078fc + 8007b62: 4b32 ldr r3, [pc, #200] ; (8007c2c ) + 8007b64: 689b ldr r3, [r3, #8] + 8007b66: 2238 movs r2, #56 ; 0x38 + 8007b68: 4013 ands r3, r2 + 8007b6a: 2b18 cmp r3, #24 + 8007b6c: d10a bne.n 8007b84 { /* When LSI is used as system clock it will not be disabled */ if ((((RCC->CSR) & RCC_CSR_LSIRDY) != 0U) && (RCC_OscInitStruct->LSIState == RCC_LSI_OFF)) - 80078e6: 4b2f ldr r3, [pc, #188] ; (80079a4 ) - 80078e8: 6e1b ldr r3, [r3, #96] ; 0x60 - 80078ea: 2202 movs r2, #2 - 80078ec: 4013 ands r3, r2 - 80078ee: d03c beq.n 800796a - 80078f0: 687b ldr r3, [r7, #4] - 80078f2: 699b ldr r3, [r3, #24] - 80078f4: 2b00 cmp r3, #0 - 80078f6: d138 bne.n 800796a + 8007b6e: 4b2f ldr r3, [pc, #188] ; (8007c2c ) + 8007b70: 6e1b ldr r3, [r3, #96] ; 0x60 + 8007b72: 2202 movs r2, #2 + 8007b74: 4013 ands r3, r2 + 8007b76: d03c beq.n 8007bf2 + 8007b78: 687b ldr r3, [r7, #4] + 8007b7a: 699b ldr r3, [r3, #24] + 8007b7c: 2b00 cmp r3, #0 + 8007b7e: d138 bne.n 8007bf2 { return HAL_ERROR; - 80078f8: 2301 movs r3, #1 - 80078fa: e1ba b.n 8007c72 + 8007b80: 2301 movs r3, #1 + 8007b82: e1ba b.n 8007efa } } else { /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 80078fc: 687b ldr r3, [r7, #4] - 80078fe: 699b ldr r3, [r3, #24] - 8007900: 2b00 cmp r3, #0 - 8007902: d019 beq.n 8007938 + 8007b84: 687b ldr r3, [r7, #4] + 8007b86: 699b ldr r3, [r3, #24] + 8007b88: 2b00 cmp r3, #0 + 8007b8a: d019 beq.n 8007bc0 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 8007904: 4b27 ldr r3, [pc, #156] ; (80079a4 ) - 8007906: 6e1a ldr r2, [r3, #96] ; 0x60 - 8007908: 4b26 ldr r3, [pc, #152] ; (80079a4 ) - 800790a: 2101 movs r1, #1 - 800790c: 430a orrs r2, r1 - 800790e: 661a str r2, [r3, #96] ; 0x60 + 8007b8c: 4b27 ldr r3, [pc, #156] ; (8007c2c ) + 8007b8e: 6e1a ldr r2, [r3, #96] ; 0x60 + 8007b90: 4b26 ldr r3, [pc, #152] ; (8007c2c ) + 8007b92: 2101 movs r1, #1 + 8007b94: 430a orrs r2, r1 + 8007b96: 661a str r2, [r3, #96] ; 0x60 /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007910: f7fe fb62 bl 8005fd8 - 8007914: 0003 movs r3, r0 - 8007916: 613b str r3, [r7, #16] + 8007b98: f7fe fb62 bl 8006260 + 8007b9c: 0003 movs r3, r0 + 8007b9e: 613b str r3, [r7, #16] /* Wait till LSI is ready */ while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) - 8007918: e008 b.n 800792c + 8007ba0: e008 b.n 8007bb4 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 800791a: f7fe fb5d bl 8005fd8 - 800791e: 0002 movs r2, r0 - 8007920: 693b ldr r3, [r7, #16] - 8007922: 1ad3 subs r3, r2, r3 - 8007924: 2b02 cmp r3, #2 - 8007926: d901 bls.n 800792c + 8007ba2: f7fe fb5d bl 8006260 + 8007ba6: 0002 movs r2, r0 + 8007ba8: 693b ldr r3, [r7, #16] + 8007baa: 1ad3 subs r3, r2, r3 + 8007bac: 2b02 cmp r3, #2 + 8007bae: d901 bls.n 8007bb4 { return HAL_TIMEOUT; - 8007928: 2303 movs r3, #3 - 800792a: e1a2 b.n 8007c72 + 8007bb0: 2303 movs r3, #3 + 8007bb2: e1a2 b.n 8007efa while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) - 800792c: 4b1d ldr r3, [pc, #116] ; (80079a4 ) - 800792e: 6e1b ldr r3, [r3, #96] ; 0x60 - 8007930: 2202 movs r2, #2 - 8007932: 4013 ands r3, r2 - 8007934: d0f1 beq.n 800791a - 8007936: e018 b.n 800796a + 8007bb4: 4b1d ldr r3, [pc, #116] ; (8007c2c ) + 8007bb6: 6e1b ldr r3, [r3, #96] ; 0x60 + 8007bb8: 2202 movs r2, #2 + 8007bba: 4013 ands r3, r2 + 8007bbc: d0f1 beq.n 8007ba2 + 8007bbe: e018 b.n 8007bf2 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8007938: 4b1a ldr r3, [pc, #104] ; (80079a4 ) - 800793a: 6e1a ldr r2, [r3, #96] ; 0x60 - 800793c: 4b19 ldr r3, [pc, #100] ; (80079a4 ) - 800793e: 2101 movs r1, #1 - 8007940: 438a bics r2, r1 - 8007942: 661a str r2, [r3, #96] ; 0x60 + 8007bc0: 4b1a ldr r3, [pc, #104] ; (8007c2c ) + 8007bc2: 6e1a ldr r2, [r3, #96] ; 0x60 + 8007bc4: 4b19 ldr r3, [pc, #100] ; (8007c2c ) + 8007bc6: 2101 movs r1, #1 + 8007bc8: 438a bics r2, r1 + 8007bca: 661a str r2, [r3, #96] ; 0x60 /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007944: f7fe fb48 bl 8005fd8 - 8007948: 0003 movs r3, r0 - 800794a: 613b str r3, [r7, #16] + 8007bcc: f7fe fb48 bl 8006260 + 8007bd0: 0003 movs r3, r0 + 8007bd2: 613b str r3, [r7, #16] /* Wait till LSI is disabled */ while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != 0U) - 800794c: e008 b.n 8007960 + 8007bd4: e008 b.n 8007be8 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 800794e: f7fe fb43 bl 8005fd8 - 8007952: 0002 movs r2, r0 - 8007954: 693b ldr r3, [r7, #16] - 8007956: 1ad3 subs r3, r2, r3 - 8007958: 2b02 cmp r3, #2 - 800795a: d901 bls.n 8007960 + 8007bd6: f7fe fb43 bl 8006260 + 8007bda: 0002 movs r2, r0 + 8007bdc: 693b ldr r3, [r7, #16] + 8007bde: 1ad3 subs r3, r2, r3 + 8007be0: 2b02 cmp r3, #2 + 8007be2: d901 bls.n 8007be8 { return HAL_TIMEOUT; - 800795c: 2303 movs r3, #3 - 800795e: e188 b.n 8007c72 + 8007be4: 2303 movs r3, #3 + 8007be6: e188 b.n 8007efa while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != 0U) - 8007960: 4b10 ldr r3, [pc, #64] ; (80079a4 ) - 8007962: 6e1b ldr r3, [r3, #96] ; 0x60 - 8007964: 2202 movs r2, #2 - 8007966: 4013 ands r3, r2 - 8007968: d1f1 bne.n 800794e + 8007be8: 4b10 ldr r3, [pc, #64] ; (8007c2c ) + 8007bea: 6e1b ldr r3, [r3, #96] ; 0x60 + 8007bec: 2202 movs r2, #2 + 8007bee: 4013 ands r3, r2 + 8007bf0: d1f1 bne.n 8007bd6 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 800796a: 687b ldr r3, [r7, #4] - 800796c: 681b ldr r3, [r3, #0] - 800796e: 2204 movs r2, #4 - 8007970: 4013 ands r3, r2 - 8007972: d100 bne.n 8007976 - 8007974: e0c6 b.n 8007b04 + 8007bf2: 687b ldr r3, [r7, #4] + 8007bf4: 681b ldr r3, [r3, #0] + 8007bf6: 2204 movs r2, #4 + 8007bf8: 4013 ands r3, r2 + 8007bfa: d100 bne.n 8007bfe + 8007bfc: e0c6 b.n 8007d8c { FlagStatus pwrclkchanged = RESET; - 8007976: 231f movs r3, #31 - 8007978: 18fb adds r3, r7, r3 - 800797a: 2200 movs r2, #0 - 800797c: 701a strb r2, [r3, #0] + 8007bfe: 231f movs r3, #31 + 8007c00: 18fb adds r3, r7, r3 + 8007c02: 2200 movs r2, #0 + 8007c04: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* When the LSE is used as system clock, it is not allowed disable it */ if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSE) - 800797e: 4b09 ldr r3, [pc, #36] ; (80079a4 ) - 8007980: 689b ldr r3, [r3, #8] - 8007982: 2238 movs r2, #56 ; 0x38 - 8007984: 4013 ands r3, r2 - 8007986: 2b20 cmp r3, #32 - 8007988: d11e bne.n 80079c8 + 8007c06: 4b09 ldr r3, [pc, #36] ; (8007c2c ) + 8007c08: 689b ldr r3, [r3, #8] + 8007c0a: 2238 movs r2, #56 ; 0x38 + 8007c0c: 4013 ands r3, r2 + 8007c0e: 2b20 cmp r3, #32 + 8007c10: d11e bne.n 8007c50 { if ((((RCC->BDCR) & RCC_BDCR_LSERDY) != 0U) && (RCC_OscInitStruct->LSEState == RCC_LSE_OFF)) - 800798a: 4b06 ldr r3, [pc, #24] ; (80079a4 ) - 800798c: 6ddb ldr r3, [r3, #92] ; 0x5c - 800798e: 2202 movs r2, #2 - 8007990: 4013 ands r3, r2 - 8007992: d100 bne.n 8007996 - 8007994: e0b6 b.n 8007b04 - 8007996: 687b ldr r3, [r7, #4] - 8007998: 689b ldr r3, [r3, #8] - 800799a: 2b00 cmp r3, #0 - 800799c: d000 beq.n 80079a0 - 800799e: e0b1 b.n 8007b04 + 8007c12: 4b06 ldr r3, [pc, #24] ; (8007c2c ) + 8007c14: 6ddb ldr r3, [r3, #92] ; 0x5c + 8007c16: 2202 movs r2, #2 + 8007c18: 4013 ands r3, r2 + 8007c1a: d100 bne.n 8007c1e + 8007c1c: e0b6 b.n 8007d8c + 8007c1e: 687b ldr r3, [r7, #4] + 8007c20: 689b ldr r3, [r3, #8] + 8007c22: 2b00 cmp r3, #0 + 8007c24: d000 beq.n 8007c28 + 8007c26: e0b1 b.n 8007d8c { return HAL_ERROR; - 80079a0: 2301 movs r3, #1 - 80079a2: e166 b.n 8007c72 - 80079a4: 40021000 .word 0x40021000 - 80079a8: fffeffff .word 0xfffeffff - 80079ac: fffbffff .word 0xfffbffff - 80079b0: ffff80ff .word 0xffff80ff - 80079b4: ffffc7ff .word 0xffffc7ff - 80079b8: 00f42400 .word 0x00f42400 - 80079bc: 20000040 .word 0x20000040 - 80079c0: 20000044 .word 0x20000044 - 80079c4: fffffeff .word 0xfffffeff + 8007c28: 2301 movs r3, #1 + 8007c2a: e166 b.n 8007efa + 8007c2c: 40021000 .word 0x40021000 + 8007c30: fffeffff .word 0xfffeffff + 8007c34: fffbffff .word 0xfffbffff + 8007c38: ffff80ff .word 0xffff80ff + 8007c3c: ffffc7ff .word 0xffffc7ff + 8007c40: 00f42400 .word 0x00f42400 + 8007c44: 20000040 .word 0x20000040 + 8007c48: 20000044 .word 0x20000044 + 8007c4c: fffffeff .word 0xfffffeff } else { /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED() != 0U) - 80079c8: 4bac ldr r3, [pc, #688] ; (8007c7c ) - 80079ca: 6bda ldr r2, [r3, #60] ; 0x3c - 80079cc: 2380 movs r3, #128 ; 0x80 - 80079ce: 055b lsls r3, r3, #21 - 80079d0: 4013 ands r3, r2 - 80079d2: d101 bne.n 80079d8 - 80079d4: 2301 movs r3, #1 - 80079d6: e000 b.n 80079da - 80079d8: 2300 movs r3, #0 - 80079da: 2b00 cmp r3, #0 - 80079dc: d011 beq.n 8007a02 + 8007c50: 4bac ldr r3, [pc, #688] ; (8007f04 ) + 8007c52: 6bda ldr r2, [r3, #60] ; 0x3c + 8007c54: 2380 movs r3, #128 ; 0x80 + 8007c56: 055b lsls r3, r3, #21 + 8007c58: 4013 ands r3, r2 + 8007c5a: d101 bne.n 8007c60 + 8007c5c: 2301 movs r3, #1 + 8007c5e: e000 b.n 8007c62 + 8007c60: 2300 movs r3, #0 + 8007c62: 2b00 cmp r3, #0 + 8007c64: d011 beq.n 8007c8a { __HAL_RCC_PWR_CLK_ENABLE(); - 80079de: 4ba7 ldr r3, [pc, #668] ; (8007c7c ) - 80079e0: 6bda ldr r2, [r3, #60] ; 0x3c - 80079e2: 4ba6 ldr r3, [pc, #664] ; (8007c7c ) - 80079e4: 2180 movs r1, #128 ; 0x80 - 80079e6: 0549 lsls r1, r1, #21 - 80079e8: 430a orrs r2, r1 - 80079ea: 63da str r2, [r3, #60] ; 0x3c - 80079ec: 4ba3 ldr r3, [pc, #652] ; (8007c7c ) - 80079ee: 6bda ldr r2, [r3, #60] ; 0x3c - 80079f0: 2380 movs r3, #128 ; 0x80 - 80079f2: 055b lsls r3, r3, #21 - 80079f4: 4013 ands r3, r2 - 80079f6: 60fb str r3, [r7, #12] - 80079f8: 68fb ldr r3, [r7, #12] + 8007c66: 4ba7 ldr r3, [pc, #668] ; (8007f04 ) + 8007c68: 6bda ldr r2, [r3, #60] ; 0x3c + 8007c6a: 4ba6 ldr r3, [pc, #664] ; (8007f04 ) + 8007c6c: 2180 movs r1, #128 ; 0x80 + 8007c6e: 0549 lsls r1, r1, #21 + 8007c70: 430a orrs r2, r1 + 8007c72: 63da str r2, [r3, #60] ; 0x3c + 8007c74: 4ba3 ldr r3, [pc, #652] ; (8007f04 ) + 8007c76: 6bda ldr r2, [r3, #60] ; 0x3c + 8007c78: 2380 movs r3, #128 ; 0x80 + 8007c7a: 055b lsls r3, r3, #21 + 8007c7c: 4013 ands r3, r2 + 8007c7e: 60fb str r3, [r7, #12] + 8007c80: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; - 80079fa: 231f movs r3, #31 - 80079fc: 18fb adds r3, r7, r3 - 80079fe: 2201 movs r2, #1 - 8007a00: 701a strb r2, [r3, #0] + 8007c82: 231f movs r3, #31 + 8007c84: 18fb adds r3, r7, r3 + 8007c86: 2201 movs r2, #1 + 8007c88: 701a strb r2, [r3, #0] } if (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 8007a02: 4b9f ldr r3, [pc, #636] ; (8007c80 ) - 8007a04: 681a ldr r2, [r3, #0] - 8007a06: 2380 movs r3, #128 ; 0x80 - 8007a08: 005b lsls r3, r3, #1 - 8007a0a: 4013 ands r3, r2 - 8007a0c: d11a bne.n 8007a44 + 8007c8a: 4b9f ldr r3, [pc, #636] ; (8007f08 ) + 8007c8c: 681a ldr r2, [r3, #0] + 8007c8e: 2380 movs r3, #128 ; 0x80 + 8007c90: 005b lsls r3, r3, #1 + 8007c92: 4013 ands r3, r2 + 8007c94: d11a bne.n 8007ccc { /* Enable write access to Backup domain */ SET_BIT(PWR->CR1, PWR_CR1_DBP); - 8007a0e: 4b9c ldr r3, [pc, #624] ; (8007c80 ) - 8007a10: 681a ldr r2, [r3, #0] - 8007a12: 4b9b ldr r3, [pc, #620] ; (8007c80 ) - 8007a14: 2180 movs r1, #128 ; 0x80 - 8007a16: 0049 lsls r1, r1, #1 - 8007a18: 430a orrs r2, r1 - 8007a1a: 601a str r2, [r3, #0] + 8007c96: 4b9c ldr r3, [pc, #624] ; (8007f08 ) + 8007c98: 681a ldr r2, [r3, #0] + 8007c9a: 4b9b ldr r3, [pc, #620] ; (8007f08 ) + 8007c9c: 2180 movs r1, #128 ; 0x80 + 8007c9e: 0049 lsls r1, r1, #1 + 8007ca0: 430a orrs r2, r1 + 8007ca2: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8007a1c: f7fe fadc bl 8005fd8 - 8007a20: 0003 movs r3, r0 - 8007a22: 613b str r3, [r7, #16] + 8007ca4: f7fe fadc bl 8006260 + 8007ca8: 0003 movs r3, r0 + 8007caa: 613b str r3, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 8007a24: e008 b.n 8007a38 + 8007cac: e008 b.n 8007cc0 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8007a26: f7fe fad7 bl 8005fd8 - 8007a2a: 0002 movs r2, r0 - 8007a2c: 693b ldr r3, [r7, #16] - 8007a2e: 1ad3 subs r3, r2, r3 - 8007a30: 2b02 cmp r3, #2 - 8007a32: d901 bls.n 8007a38 + 8007cae: f7fe fad7 bl 8006260 + 8007cb2: 0002 movs r2, r0 + 8007cb4: 693b ldr r3, [r7, #16] + 8007cb6: 1ad3 subs r3, r2, r3 + 8007cb8: 2b02 cmp r3, #2 + 8007cba: d901 bls.n 8007cc0 { return HAL_TIMEOUT; - 8007a34: 2303 movs r3, #3 - 8007a36: e11c b.n 8007c72 + 8007cbc: 2303 movs r3, #3 + 8007cbe: e11c b.n 8007efa while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - 8007a38: 4b91 ldr r3, [pc, #580] ; (8007c80 ) - 8007a3a: 681a ldr r2, [r3, #0] - 8007a3c: 2380 movs r3, #128 ; 0x80 - 8007a3e: 005b lsls r3, r3, #1 - 8007a40: 4013 ands r3, r2 - 8007a42: d0f0 beq.n 8007a26 + 8007cc0: 4b91 ldr r3, [pc, #580] ; (8007f08 ) + 8007cc2: 681a ldr r2, [r3, #0] + 8007cc4: 2380 movs r3, #128 ; 0x80 + 8007cc6: 005b lsls r3, r3, #1 + 8007cc8: 4013 ands r3, r2 + 8007cca: d0f0 beq.n 8007cae } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8007a44: 687b ldr r3, [r7, #4] - 8007a46: 689b ldr r3, [r3, #8] - 8007a48: 2b01 cmp r3, #1 - 8007a4a: d106 bne.n 8007a5a - 8007a4c: 4b8b ldr r3, [pc, #556] ; (8007c7c ) - 8007a4e: 6dda ldr r2, [r3, #92] ; 0x5c - 8007a50: 4b8a ldr r3, [pc, #552] ; (8007c7c ) - 8007a52: 2101 movs r1, #1 - 8007a54: 430a orrs r2, r1 - 8007a56: 65da str r2, [r3, #92] ; 0x5c - 8007a58: e01c b.n 8007a94 - 8007a5a: 687b ldr r3, [r7, #4] - 8007a5c: 689b ldr r3, [r3, #8] - 8007a5e: 2b05 cmp r3, #5 - 8007a60: d10c bne.n 8007a7c - 8007a62: 4b86 ldr r3, [pc, #536] ; (8007c7c ) - 8007a64: 6dda ldr r2, [r3, #92] ; 0x5c - 8007a66: 4b85 ldr r3, [pc, #532] ; (8007c7c ) - 8007a68: 2104 movs r1, #4 - 8007a6a: 430a orrs r2, r1 - 8007a6c: 65da str r2, [r3, #92] ; 0x5c - 8007a6e: 4b83 ldr r3, [pc, #524] ; (8007c7c ) - 8007a70: 6dda ldr r2, [r3, #92] ; 0x5c - 8007a72: 4b82 ldr r3, [pc, #520] ; (8007c7c ) - 8007a74: 2101 movs r1, #1 - 8007a76: 430a orrs r2, r1 - 8007a78: 65da str r2, [r3, #92] ; 0x5c - 8007a7a: e00b b.n 8007a94 - 8007a7c: 4b7f ldr r3, [pc, #508] ; (8007c7c ) - 8007a7e: 6dda ldr r2, [r3, #92] ; 0x5c - 8007a80: 4b7e ldr r3, [pc, #504] ; (8007c7c ) - 8007a82: 2101 movs r1, #1 - 8007a84: 438a bics r2, r1 - 8007a86: 65da str r2, [r3, #92] ; 0x5c - 8007a88: 4b7c ldr r3, [pc, #496] ; (8007c7c ) - 8007a8a: 6dda ldr r2, [r3, #92] ; 0x5c - 8007a8c: 4b7b ldr r3, [pc, #492] ; (8007c7c ) - 8007a8e: 2104 movs r1, #4 - 8007a90: 438a bics r2, r1 - 8007a92: 65da str r2, [r3, #92] ; 0x5c + 8007ccc: 687b ldr r3, [r7, #4] + 8007cce: 689b ldr r3, [r3, #8] + 8007cd0: 2b01 cmp r3, #1 + 8007cd2: d106 bne.n 8007ce2 + 8007cd4: 4b8b ldr r3, [pc, #556] ; (8007f04 ) + 8007cd6: 6dda ldr r2, [r3, #92] ; 0x5c + 8007cd8: 4b8a ldr r3, [pc, #552] ; (8007f04 ) + 8007cda: 2101 movs r1, #1 + 8007cdc: 430a orrs r2, r1 + 8007cde: 65da str r2, [r3, #92] ; 0x5c + 8007ce0: e01c b.n 8007d1c + 8007ce2: 687b ldr r3, [r7, #4] + 8007ce4: 689b ldr r3, [r3, #8] + 8007ce6: 2b05 cmp r3, #5 + 8007ce8: d10c bne.n 8007d04 + 8007cea: 4b86 ldr r3, [pc, #536] ; (8007f04 ) + 8007cec: 6dda ldr r2, [r3, #92] ; 0x5c + 8007cee: 4b85 ldr r3, [pc, #532] ; (8007f04 ) + 8007cf0: 2104 movs r1, #4 + 8007cf2: 430a orrs r2, r1 + 8007cf4: 65da str r2, [r3, #92] ; 0x5c + 8007cf6: 4b83 ldr r3, [pc, #524] ; (8007f04 ) + 8007cf8: 6dda ldr r2, [r3, #92] ; 0x5c + 8007cfa: 4b82 ldr r3, [pc, #520] ; (8007f04 ) + 8007cfc: 2101 movs r1, #1 + 8007cfe: 430a orrs r2, r1 + 8007d00: 65da str r2, [r3, #92] ; 0x5c + 8007d02: e00b b.n 8007d1c + 8007d04: 4b7f ldr r3, [pc, #508] ; (8007f04 ) + 8007d06: 6dda ldr r2, [r3, #92] ; 0x5c + 8007d08: 4b7e ldr r3, [pc, #504] ; (8007f04 ) + 8007d0a: 2101 movs r1, #1 + 8007d0c: 438a bics r2, r1 + 8007d0e: 65da str r2, [r3, #92] ; 0x5c + 8007d10: 4b7c ldr r3, [pc, #496] ; (8007f04 ) + 8007d12: 6dda ldr r2, [r3, #92] ; 0x5c + 8007d14: 4b7b ldr r3, [pc, #492] ; (8007f04 ) + 8007d16: 2104 movs r1, #4 + 8007d18: 438a bics r2, r1 + 8007d1a: 65da str r2, [r3, #92] ; 0x5c /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8007a94: 687b ldr r3, [r7, #4] - 8007a96: 689b ldr r3, [r3, #8] - 8007a98: 2b00 cmp r3, #0 - 8007a9a: d014 beq.n 8007ac6 + 8007d1c: 687b ldr r3, [r7, #4] + 8007d1e: 689b ldr r3, [r3, #8] + 8007d20: 2b00 cmp r3, #0 + 8007d22: d014 beq.n 8007d4e { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007a9c: f7fe fa9c bl 8005fd8 - 8007aa0: 0003 movs r3, r0 - 8007aa2: 613b str r3, [r7, #16] + 8007d24: f7fe fa9c bl 8006260 + 8007d28: 0003 movs r3, r0 + 8007d2a: 613b str r3, [r7, #16] /* Wait till LSE is ready */ while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8007aa4: e009 b.n 8007aba + 8007d2c: e009 b.n 8007d42 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8007aa6: f7fe fa97 bl 8005fd8 - 8007aaa: 0002 movs r2, r0 - 8007aac: 693b ldr r3, [r7, #16] - 8007aae: 1ad3 subs r3, r2, r3 - 8007ab0: 4a74 ldr r2, [pc, #464] ; (8007c84 ) - 8007ab2: 4293 cmp r3, r2 - 8007ab4: d901 bls.n 8007aba + 8007d2e: f7fe fa97 bl 8006260 + 8007d32: 0002 movs r2, r0 + 8007d34: 693b ldr r3, [r7, #16] + 8007d36: 1ad3 subs r3, r2, r3 + 8007d38: 4a74 ldr r2, [pc, #464] ; (8007f0c ) + 8007d3a: 4293 cmp r3, r2 + 8007d3c: d901 bls.n 8007d42 { return HAL_TIMEOUT; - 8007ab6: 2303 movs r3, #3 - 8007ab8: e0db b.n 8007c72 + 8007d3e: 2303 movs r3, #3 + 8007d40: e0db b.n 8007efa while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8007aba: 4b70 ldr r3, [pc, #448] ; (8007c7c ) - 8007abc: 6ddb ldr r3, [r3, #92] ; 0x5c - 8007abe: 2202 movs r2, #2 - 8007ac0: 4013 ands r3, r2 - 8007ac2: d0f0 beq.n 8007aa6 - 8007ac4: e013 b.n 8007aee + 8007d42: 4b70 ldr r3, [pc, #448] ; (8007f04 ) + 8007d44: 6ddb ldr r3, [r3, #92] ; 0x5c + 8007d46: 2202 movs r2, #2 + 8007d48: 4013 ands r3, r2 + 8007d4a: d0f0 beq.n 8007d2e + 8007d4c: e013 b.n 8007d76 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007ac6: f7fe fa87 bl 8005fd8 - 8007aca: 0003 movs r3, r0 - 8007acc: 613b str r3, [r7, #16] + 8007d4e: f7fe fa87 bl 8006260 + 8007d52: 0003 movs r3, r0 + 8007d54: 613b str r3, [r7, #16] /* Wait till LSE is disabled */ while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U) - 8007ace: e009 b.n 8007ae4 + 8007d56: e009 b.n 8007d6c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8007ad0: f7fe fa82 bl 8005fd8 - 8007ad4: 0002 movs r2, r0 - 8007ad6: 693b ldr r3, [r7, #16] - 8007ad8: 1ad3 subs r3, r2, r3 - 8007ada: 4a6a ldr r2, [pc, #424] ; (8007c84 ) - 8007adc: 4293 cmp r3, r2 - 8007ade: d901 bls.n 8007ae4 + 8007d58: f7fe fa82 bl 8006260 + 8007d5c: 0002 movs r2, r0 + 8007d5e: 693b ldr r3, [r7, #16] + 8007d60: 1ad3 subs r3, r2, r3 + 8007d62: 4a6a ldr r2, [pc, #424] ; (8007f0c ) + 8007d64: 4293 cmp r3, r2 + 8007d66: d901 bls.n 8007d6c { return HAL_TIMEOUT; - 8007ae0: 2303 movs r3, #3 - 8007ae2: e0c6 b.n 8007c72 + 8007d68: 2303 movs r3, #3 + 8007d6a: e0c6 b.n 8007efa while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U) - 8007ae4: 4b65 ldr r3, [pc, #404] ; (8007c7c ) - 8007ae6: 6ddb ldr r3, [r3, #92] ; 0x5c - 8007ae8: 2202 movs r2, #2 - 8007aea: 4013 ands r3, r2 - 8007aec: d1f0 bne.n 8007ad0 + 8007d6c: 4b65 ldr r3, [pc, #404] ; (8007f04 ) + 8007d6e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8007d70: 2202 movs r2, #2 + 8007d72: 4013 ands r3, r2 + 8007d74: d1f0 bne.n 8007d58 } } } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) - 8007aee: 231f movs r3, #31 - 8007af0: 18fb adds r3, r7, r3 - 8007af2: 781b ldrb r3, [r3, #0] - 8007af4: 2b01 cmp r3, #1 - 8007af6: d105 bne.n 8007b04 + 8007d76: 231f movs r3, #31 + 8007d78: 18fb adds r3, r7, r3 + 8007d7a: 781b ldrb r3, [r3, #0] + 8007d7c: 2b01 cmp r3, #1 + 8007d7e: d105 bne.n 8007d8c { __HAL_RCC_PWR_CLK_DISABLE(); - 8007af8: 4b60 ldr r3, [pc, #384] ; (8007c7c ) - 8007afa: 6bda ldr r2, [r3, #60] ; 0x3c - 8007afc: 4b5f ldr r3, [pc, #380] ; (8007c7c ) - 8007afe: 4962 ldr r1, [pc, #392] ; (8007c88 ) - 8007b00: 400a ands r2, r1 - 8007b02: 63da str r2, [r3, #60] ; 0x3c + 8007d80: 4b60 ldr r3, [pc, #384] ; (8007f04 ) + 8007d82: 6bda ldr r2, [r3, #60] ; 0x3c + 8007d84: 4b5f ldr r3, [pc, #380] ; (8007f04 ) + 8007d86: 4962 ldr r1, [pc, #392] ; (8007f10 ) + 8007d88: 400a ands r2, r1 + 8007d8a: 63da str r2, [r3, #60] ; 0x3c #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if (RCC_OscInitStruct->PLL.PLLState != RCC_PLL_NONE) - 8007b04: 687b ldr r3, [r7, #4] - 8007b06: 69db ldr r3, [r3, #28] - 8007b08: 2b00 cmp r3, #0 - 8007b0a: d100 bne.n 8007b0e - 8007b0c: e0b0 b.n 8007c70 + 8007d8c: 687b ldr r3, [r7, #4] + 8007d8e: 69db ldr r3, [r3, #28] + 8007d90: 2b00 cmp r3, #0 + 8007d92: d100 bne.n 8007d96 + 8007d94: e0b0 b.n 8007ef8 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8007b0e: 4b5b ldr r3, [pc, #364] ; (8007c7c ) - 8007b10: 689b ldr r3, [r3, #8] - 8007b12: 2238 movs r2, #56 ; 0x38 - 8007b14: 4013 ands r3, r2 - 8007b16: 2b10 cmp r3, #16 - 8007b18: d100 bne.n 8007b1c - 8007b1a: e078 b.n 8007c0e + 8007d96: 4b5b ldr r3, [pc, #364] ; (8007f04 ) + 8007d98: 689b ldr r3, [r3, #8] + 8007d9a: 2238 movs r2, #56 ; 0x38 + 8007d9c: 4013 ands r3, r2 + 8007d9e: 2b10 cmp r3, #16 + 8007da0: d100 bne.n 8007da4 + 8007da2: e078 b.n 8007e96 { if (RCC_OscInitStruct->PLL.PLLState == RCC_PLL_ON) - 8007b1c: 687b ldr r3, [r7, #4] - 8007b1e: 69db ldr r3, [r3, #28] - 8007b20: 2b02 cmp r3, #2 - 8007b22: d153 bne.n 8007bcc + 8007da4: 687b ldr r3, [r7, #4] + 8007da6: 69db ldr r3, [r3, #28] + 8007da8: 2b02 cmp r3, #2 + 8007daa: d153 bne.n 8007e54 assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); #endif /* RCC_PLLQ_SUPPORT */ assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8007b24: 4b55 ldr r3, [pc, #340] ; (8007c7c ) - 8007b26: 681a ldr r2, [r3, #0] - 8007b28: 4b54 ldr r3, [pc, #336] ; (8007c7c ) - 8007b2a: 4958 ldr r1, [pc, #352] ; (8007c8c ) - 8007b2c: 400a ands r2, r1 - 8007b2e: 601a str r2, [r3, #0] + 8007dac: 4b55 ldr r3, [pc, #340] ; (8007f04 ) + 8007dae: 681a ldr r2, [r3, #0] + 8007db0: 4b54 ldr r3, [pc, #336] ; (8007f04 ) + 8007db2: 4958 ldr r1, [pc, #352] ; (8007f14 ) + 8007db4: 400a ands r2, r1 + 8007db6: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007b30: f7fe fa52 bl 8005fd8 - 8007b34: 0003 movs r3, r0 - 8007b36: 613b str r3, [r7, #16] + 8007db8: f7fe fa52 bl 8006260 + 8007dbc: 0003 movs r3, r0 + 8007dbe: 613b str r3, [r7, #16] /* Wait till PLL is ready */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) - 8007b38: e008 b.n 8007b4c + 8007dc0: e008 b.n 8007dd4 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8007b3a: f7fe fa4d bl 8005fd8 - 8007b3e: 0002 movs r2, r0 - 8007b40: 693b ldr r3, [r7, #16] - 8007b42: 1ad3 subs r3, r2, r3 - 8007b44: 2b02 cmp r3, #2 - 8007b46: d901 bls.n 8007b4c + 8007dc2: f7fe fa4d bl 8006260 + 8007dc6: 0002 movs r2, r0 + 8007dc8: 693b ldr r3, [r7, #16] + 8007dca: 1ad3 subs r3, r2, r3 + 8007dcc: 2b02 cmp r3, #2 + 8007dce: d901 bls.n 8007dd4 { return HAL_TIMEOUT; - 8007b48: 2303 movs r3, #3 - 8007b4a: e092 b.n 8007c72 + 8007dd0: 2303 movs r3, #3 + 8007dd2: e092 b.n 8007efa while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) - 8007b4c: 4b4b ldr r3, [pc, #300] ; (8007c7c ) - 8007b4e: 681a ldr r2, [r3, #0] - 8007b50: 2380 movs r3, #128 ; 0x80 - 8007b52: 049b lsls r3, r3, #18 - 8007b54: 4013 ands r3, r2 - 8007b56: d1f0 bne.n 8007b3a + 8007dd4: 4b4b ldr r3, [pc, #300] ; (8007f04 ) + 8007dd6: 681a ldr r2, [r3, #0] + 8007dd8: 2380 movs r3, #128 ; 0x80 + 8007dda: 049b lsls r3, r3, #18 + 8007ddc: 4013 ands r3, r2 + 8007dde: d1f0 bne.n 8007dc2 RCC_OscInitStruct->PLL.PLLN, RCC_OscInitStruct->PLL.PLLP, RCC_OscInitStruct->PLL.PLLQ, RCC_OscInitStruct->PLL.PLLR); #else /* !RCC_PLLQ_SUPPORT */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8007b58: 4b48 ldr r3, [pc, #288] ; (8007c7c ) - 8007b5a: 68db ldr r3, [r3, #12] - 8007b5c: 4a4c ldr r2, [pc, #304] ; (8007c90 ) - 8007b5e: 4013 ands r3, r2 - 8007b60: 0019 movs r1, r3 - 8007b62: 687b ldr r3, [r7, #4] - 8007b64: 6a1a ldr r2, [r3, #32] - 8007b66: 687b ldr r3, [r7, #4] - 8007b68: 6a5b ldr r3, [r3, #36] ; 0x24 - 8007b6a: 431a orrs r2, r3 - 8007b6c: 687b ldr r3, [r7, #4] - 8007b6e: 6a9b ldr r3, [r3, #40] ; 0x28 - 8007b70: 021b lsls r3, r3, #8 - 8007b72: 431a orrs r2, r3 - 8007b74: 687b ldr r3, [r7, #4] - 8007b76: 6adb ldr r3, [r3, #44] ; 0x2c - 8007b78: 431a orrs r2, r3 - 8007b7a: 687b ldr r3, [r7, #4] - 8007b7c: 6b1b ldr r3, [r3, #48] ; 0x30 - 8007b7e: 431a orrs r2, r3 - 8007b80: 4b3e ldr r3, [pc, #248] ; (8007c7c ) - 8007b82: 430a orrs r2, r1 - 8007b84: 60da str r2, [r3, #12] + 8007de0: 4b48 ldr r3, [pc, #288] ; (8007f04 ) + 8007de2: 68db ldr r3, [r3, #12] + 8007de4: 4a4c ldr r2, [pc, #304] ; (8007f18 ) + 8007de6: 4013 ands r3, r2 + 8007de8: 0019 movs r1, r3 + 8007dea: 687b ldr r3, [r7, #4] + 8007dec: 6a1a ldr r2, [r3, #32] + 8007dee: 687b ldr r3, [r7, #4] + 8007df0: 6a5b ldr r3, [r3, #36] ; 0x24 + 8007df2: 431a orrs r2, r3 + 8007df4: 687b ldr r3, [r7, #4] + 8007df6: 6a9b ldr r3, [r3, #40] ; 0x28 + 8007df8: 021b lsls r3, r3, #8 + 8007dfa: 431a orrs r2, r3 + 8007dfc: 687b ldr r3, [r7, #4] + 8007dfe: 6adb ldr r3, [r3, #44] ; 0x2c + 8007e00: 431a orrs r2, r3 + 8007e02: 687b ldr r3, [r7, #4] + 8007e04: 6b1b ldr r3, [r3, #48] ; 0x30 + 8007e06: 431a orrs r2, r3 + 8007e08: 4b3e ldr r3, [pc, #248] ; (8007f04 ) + 8007e0a: 430a orrs r2, r1 + 8007e0c: 60da str r2, [r3, #12] RCC_OscInitStruct->PLL.PLLP, RCC_OscInitStruct->PLL.PLLR); #endif /* RCC_PLLQ_SUPPORT */ /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8007b86: 4b3d ldr r3, [pc, #244] ; (8007c7c ) - 8007b88: 681a ldr r2, [r3, #0] - 8007b8a: 4b3c ldr r3, [pc, #240] ; (8007c7c ) - 8007b8c: 2180 movs r1, #128 ; 0x80 - 8007b8e: 0449 lsls r1, r1, #17 - 8007b90: 430a orrs r2, r1 - 8007b92: 601a str r2, [r3, #0] + 8007e0e: 4b3d ldr r3, [pc, #244] ; (8007f04 ) + 8007e10: 681a ldr r2, [r3, #0] + 8007e12: 4b3c ldr r3, [pc, #240] ; (8007f04 ) + 8007e14: 2180 movs r1, #128 ; 0x80 + 8007e16: 0449 lsls r1, r1, #17 + 8007e18: 430a orrs r2, r1 + 8007e1a: 601a str r2, [r3, #0] /* Enable PLLR Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLRCLK); - 8007b94: 4b39 ldr r3, [pc, #228] ; (8007c7c ) - 8007b96: 68da ldr r2, [r3, #12] - 8007b98: 4b38 ldr r3, [pc, #224] ; (8007c7c ) - 8007b9a: 2180 movs r1, #128 ; 0x80 - 8007b9c: 0549 lsls r1, r1, #21 - 8007b9e: 430a orrs r2, r1 - 8007ba0: 60da str r2, [r3, #12] + 8007e1c: 4b39 ldr r3, [pc, #228] ; (8007f04 ) + 8007e1e: 68da ldr r2, [r3, #12] + 8007e20: 4b38 ldr r3, [pc, #224] ; (8007f04 ) + 8007e22: 2180 movs r1, #128 ; 0x80 + 8007e24: 0549 lsls r1, r1, #21 + 8007e26: 430a orrs r2, r1 + 8007e28: 60da str r2, [r3, #12] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007ba2: f7fe fa19 bl 8005fd8 - 8007ba6: 0003 movs r3, r0 - 8007ba8: 613b str r3, [r7, #16] + 8007e2a: f7fe fa19 bl 8006260 + 8007e2e: 0003 movs r3, r0 + 8007e30: 613b str r3, [r7, #16] /* Wait till PLL is ready */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) - 8007baa: e008 b.n 8007bbe + 8007e32: e008 b.n 8007e46 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8007bac: f7fe fa14 bl 8005fd8 - 8007bb0: 0002 movs r2, r0 - 8007bb2: 693b ldr r3, [r7, #16] - 8007bb4: 1ad3 subs r3, r2, r3 - 8007bb6: 2b02 cmp r3, #2 - 8007bb8: d901 bls.n 8007bbe + 8007e34: f7fe fa14 bl 8006260 + 8007e38: 0002 movs r2, r0 + 8007e3a: 693b ldr r3, [r7, #16] + 8007e3c: 1ad3 subs r3, r2, r3 + 8007e3e: 2b02 cmp r3, #2 + 8007e40: d901 bls.n 8007e46 { return HAL_TIMEOUT; - 8007bba: 2303 movs r3, #3 - 8007bbc: e059 b.n 8007c72 + 8007e42: 2303 movs r3, #3 + 8007e44: e059 b.n 8007efa while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) - 8007bbe: 4b2f ldr r3, [pc, #188] ; (8007c7c ) - 8007bc0: 681a ldr r2, [r3, #0] - 8007bc2: 2380 movs r3, #128 ; 0x80 - 8007bc4: 049b lsls r3, r3, #18 - 8007bc6: 4013 ands r3, r2 - 8007bc8: d0f0 beq.n 8007bac - 8007bca: e051 b.n 8007c70 + 8007e46: 4b2f ldr r3, [pc, #188] ; (8007f04 ) + 8007e48: 681a ldr r2, [r3, #0] + 8007e4a: 2380 movs r3, #128 ; 0x80 + 8007e4c: 049b lsls r3, r3, #18 + 8007e4e: 4013 ands r3, r2 + 8007e50: d0f0 beq.n 8007e34 + 8007e52: e051 b.n 8007ef8 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8007bcc: 4b2b ldr r3, [pc, #172] ; (8007c7c ) - 8007bce: 681a ldr r2, [r3, #0] - 8007bd0: 4b2a ldr r3, [pc, #168] ; (8007c7c ) - 8007bd2: 492e ldr r1, [pc, #184] ; (8007c8c ) - 8007bd4: 400a ands r2, r1 - 8007bd6: 601a str r2, [r3, #0] + 8007e54: 4b2b ldr r3, [pc, #172] ; (8007f04 ) + 8007e56: 681a ldr r2, [r3, #0] + 8007e58: 4b2a ldr r3, [pc, #168] ; (8007f04 ) + 8007e5a: 492e ldr r1, [pc, #184] ; (8007f14 ) + 8007e5c: 400a ands r2, r1 + 8007e5e: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007bd8: f7fe f9fe bl 8005fd8 - 8007bdc: 0003 movs r3, r0 - 8007bde: 613b str r3, [r7, #16] + 8007e60: f7fe f9fe bl 8006260 + 8007e64: 0003 movs r3, r0 + 8007e66: 613b str r3, [r7, #16] /* Wait till PLL is disabled */ while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) - 8007be0: e008 b.n 8007bf4 + 8007e68: e008 b.n 8007e7c { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8007be2: f7fe f9f9 bl 8005fd8 - 8007be6: 0002 movs r2, r0 - 8007be8: 693b ldr r3, [r7, #16] - 8007bea: 1ad3 subs r3, r2, r3 - 8007bec: 2b02 cmp r3, #2 - 8007bee: d901 bls.n 8007bf4 + 8007e6a: f7fe f9f9 bl 8006260 + 8007e6e: 0002 movs r2, r0 + 8007e70: 693b ldr r3, [r7, #16] + 8007e72: 1ad3 subs r3, r2, r3 + 8007e74: 2b02 cmp r3, #2 + 8007e76: d901 bls.n 8007e7c { return HAL_TIMEOUT; - 8007bf0: 2303 movs r3, #3 - 8007bf2: e03e b.n 8007c72 + 8007e78: 2303 movs r3, #3 + 8007e7a: e03e b.n 8007efa while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) - 8007bf4: 4b21 ldr r3, [pc, #132] ; (8007c7c ) - 8007bf6: 681a ldr r2, [r3, #0] - 8007bf8: 2380 movs r3, #128 ; 0x80 - 8007bfa: 049b lsls r3, r3, #18 - 8007bfc: 4013 ands r3, r2 - 8007bfe: d1f0 bne.n 8007be2 + 8007e7c: 4b21 ldr r3, [pc, #132] ; (8007f04 ) + 8007e7e: 681a ldr r2, [r3, #0] + 8007e80: 2380 movs r3, #128 ; 0x80 + 8007e82: 049b lsls r3, r3, #18 + 8007e84: 4013 ands r3, r2 + 8007e86: d1f0 bne.n 8007e6a } /* Unselect main PLL clock source and disable main PLL outputs to save power */ #if defined(RCC_PLLQ_SUPPORT) RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLQEN | RCC_PLLCFGR_PLLREN); #else RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLREN); - 8007c00: 4b1e ldr r3, [pc, #120] ; (8007c7c ) - 8007c02: 68da ldr r2, [r3, #12] - 8007c04: 4b1d ldr r3, [pc, #116] ; (8007c7c ) - 8007c06: 4923 ldr r1, [pc, #140] ; (8007c94 ) - 8007c08: 400a ands r2, r1 - 8007c0a: 60da str r2, [r3, #12] - 8007c0c: e030 b.n 8007c70 + 8007e88: 4b1e ldr r3, [pc, #120] ; (8007f04 ) + 8007e8a: 68da ldr r2, [r3, #12] + 8007e8c: 4b1d ldr r3, [pc, #116] ; (8007f04 ) + 8007e8e: 4923 ldr r1, [pc, #140] ; (8007f1c ) + 8007e90: 400a ands r2, r1 + 8007e92: 60da str r2, [r3, #12] + 8007e94: e030 b.n 8007ef8 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8007c0e: 687b ldr r3, [r7, #4] - 8007c10: 69db ldr r3, [r3, #28] - 8007c12: 2b01 cmp r3, #1 - 8007c14: d101 bne.n 8007c1a + 8007e96: 687b ldr r3, [r7, #4] + 8007e98: 69db ldr r3, [r3, #28] + 8007e9a: 2b01 cmp r3, #1 + 8007e9c: d101 bne.n 8007ea2 { return HAL_ERROR; - 8007c16: 2301 movs r3, #1 - 8007c18: e02b b.n 8007c72 + 8007e9e: 2301 movs r3, #1 + 8007ea0: e02b b.n 8007efa } else { /* Do not return HAL_ERROR if request repeats the current configuration */ temp_pllckcfg = RCC->PLLCFGR; - 8007c1a: 4b18 ldr r3, [pc, #96] ; (8007c7c ) - 8007c1c: 68db ldr r3, [r3, #12] - 8007c1e: 617b str r3, [r7, #20] + 8007ea2: 4b18 ldr r3, [pc, #96] ; (8007f04 ) + 8007ea4: 68db ldr r3, [r3, #12] + 8007ea6: 617b str r3, [r7, #20] if ((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8007c20: 697b ldr r3, [r7, #20] - 8007c22: 2203 movs r2, #3 - 8007c24: 401a ands r2, r3 - 8007c26: 687b ldr r3, [r7, #4] - 8007c28: 6a1b ldr r3, [r3, #32] - 8007c2a: 429a cmp r2, r3 - 8007c2c: d11e bne.n 8007c6c + 8007ea8: 697b ldr r3, [r7, #20] + 8007eaa: 2203 movs r2, #3 + 8007eac: 401a ands r2, r3 + 8007eae: 687b ldr r3, [r7, #4] + 8007eb0: 6a1b ldr r3, [r3, #32] + 8007eb2: 429a cmp r2, r3 + 8007eb4: d11e bne.n 8007ef4 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) || - 8007c2e: 697b ldr r3, [r7, #20] - 8007c30: 2270 movs r2, #112 ; 0x70 - 8007c32: 401a ands r2, r3 - 8007c34: 687b ldr r3, [r7, #4] - 8007c36: 6a5b ldr r3, [r3, #36] ; 0x24 + 8007eb6: 697b ldr r3, [r7, #20] + 8007eb8: 2270 movs r2, #112 ; 0x70 + 8007eba: 401a ands r2, r3 + 8007ebc: 687b ldr r3, [r7, #4] + 8007ebe: 6a5b ldr r3, [r3, #36] ; 0x24 if ((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8007c38: 429a cmp r2, r3 - 8007c3a: d117 bne.n 8007c6c + 8007ec0: 429a cmp r2, r3 + 8007ec2: d117 bne.n 8007ef4 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || - 8007c3c: 697a ldr r2, [r7, #20] - 8007c3e: 23fe movs r3, #254 ; 0xfe - 8007c40: 01db lsls r3, r3, #7 - 8007c42: 401a ands r2, r3 - 8007c44: 687b ldr r3, [r7, #4] - 8007c46: 6a9b ldr r3, [r3, #40] ; 0x28 - 8007c48: 021b lsls r3, r3, #8 + 8007ec4: 697a ldr r2, [r7, #20] + 8007ec6: 23fe movs r3, #254 ; 0xfe + 8007ec8: 01db lsls r3, r3, #7 + 8007eca: 401a ands r2, r3 + 8007ecc: 687b ldr r3, [r7, #4] + 8007ece: 6a9b ldr r3, [r3, #40] ; 0x28 + 8007ed0: 021b lsls r3, r3, #8 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) || - 8007c4a: 429a cmp r2, r3 - 8007c4c: d10e bne.n 8007c6c + 8007ed2: 429a cmp r2, r3 + 8007ed4: d10e bne.n 8007ef4 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) || - 8007c4e: 697a ldr r2, [r7, #20] - 8007c50: 23f8 movs r3, #248 ; 0xf8 - 8007c52: 039b lsls r3, r3, #14 - 8007c54: 401a ands r2, r3 - 8007c56: 687b ldr r3, [r7, #4] - 8007c58: 6adb ldr r3, [r3, #44] ; 0x2c + 8007ed6: 697a ldr r2, [r7, #20] + 8007ed8: 23f8 movs r3, #248 ; 0xf8 + 8007eda: 039b lsls r3, r3, #14 + 8007edc: 401a ands r2, r3 + 8007ede: 687b ldr r3, [r7, #4] + 8007ee0: 6adb ldr r3, [r3, #44] ; 0x2c (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || - 8007c5a: 429a cmp r2, r3 - 8007c5c: d106 bne.n 8007c6c + 8007ee2: 429a cmp r2, r3 + 8007ee4: d106 bne.n 8007ef4 #if defined (RCC_PLLQ_SUPPORT) (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ) || #endif /* RCC_PLLQ_SUPPORT */ (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLR) != RCC_OscInitStruct->PLL.PLLR)) - 8007c5e: 697b ldr r3, [r7, #20] - 8007c60: 0f5b lsrs r3, r3, #29 - 8007c62: 075a lsls r2, r3, #29 - 8007c64: 687b ldr r3, [r7, #4] - 8007c66: 6b1b ldr r3, [r3, #48] ; 0x30 + 8007ee6: 697b ldr r3, [r7, #20] + 8007ee8: 0f5b lsrs r3, r3, #29 + 8007eea: 075a lsls r2, r3, #29 + 8007eec: 687b ldr r3, [r7, #4] + 8007eee: 6b1b ldr r3, [r3, #48] ; 0x30 (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) || - 8007c68: 429a cmp r2, r3 - 8007c6a: d001 beq.n 8007c70 + 8007ef0: 429a cmp r2, r3 + 8007ef2: d001 beq.n 8007ef8 { return HAL_ERROR; - 8007c6c: 2301 movs r3, #1 - 8007c6e: e000 b.n 8007c72 + 8007ef4: 2301 movs r3, #1 + 8007ef6: e000 b.n 8007efa } } } } return HAL_OK; - 8007c70: 2300 movs r3, #0 + 8007ef8: 2300 movs r3, #0 } - 8007c72: 0018 movs r0, r3 - 8007c74: 46bd mov sp, r7 - 8007c76: b008 add sp, #32 - 8007c78: bd80 pop {r7, pc} - 8007c7a: 46c0 nop ; (mov r8, r8) - 8007c7c: 40021000 .word 0x40021000 - 8007c80: 40007000 .word 0x40007000 - 8007c84: 00001388 .word 0x00001388 - 8007c88: efffffff .word 0xefffffff - 8007c8c: feffffff .word 0xfeffffff - 8007c90: 1fc1808c .word 0x1fc1808c - 8007c94: effefffc .word 0xeffefffc + 8007efa: 0018 movs r0, r3 + 8007efc: 46bd mov sp, r7 + 8007efe: b008 add sp, #32 + 8007f00: bd80 pop {r7, pc} + 8007f02: 46c0 nop ; (mov r8, r8) + 8007f04: 40021000 .word 0x40021000 + 8007f08: 40007000 .word 0x40007000 + 8007f0c: 00001388 .word 0x00001388 + 8007f10: efffffff .word 0xefffffff + 8007f14: feffffff .word 0xfeffffff + 8007f18: 1fc1808c .word 0x1fc1808c + 8007f1c: effefffc .word 0xeffefffc -08007c98 : +08007f20 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8007c98: b580 push {r7, lr} - 8007c9a: b084 sub sp, #16 - 8007c9c: af00 add r7, sp, #0 - 8007c9e: 6078 str r0, [r7, #4] - 8007ca0: 6039 str r1, [r7, #0] + 8007f20: b580 push {r7, lr} + 8007f22: b084 sub sp, #16 + 8007f24: af00 add r7, sp, #0 + 8007f26: 6078 str r0, [r7, #4] + 8007f28: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) - 8007ca2: 687b ldr r3, [r7, #4] - 8007ca4: 2b00 cmp r3, #0 - 8007ca6: d101 bne.n 8007cac + 8007f2a: 687b ldr r3, [r7, #4] + 8007f2c: 2b00 cmp r3, #0 + 8007f2e: d101 bne.n 8007f34 { return HAL_ERROR; - 8007ca8: 2301 movs r3, #1 - 8007caa: e0e9 b.n 8007e80 + 8007f30: 2301 movs r3, #1 + 8007f32: e0e9 b.n 8008108 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the FLASH clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8007cac: 4b76 ldr r3, [pc, #472] ; (8007e88 ) - 8007cae: 681b ldr r3, [r3, #0] - 8007cb0: 2207 movs r2, #7 - 8007cb2: 4013 ands r3, r2 - 8007cb4: 683a ldr r2, [r7, #0] - 8007cb6: 429a cmp r2, r3 - 8007cb8: d91e bls.n 8007cf8 + 8007f34: 4b76 ldr r3, [pc, #472] ; (8008110 ) + 8007f36: 681b ldr r3, [r3, #0] + 8007f38: 2207 movs r2, #7 + 8007f3a: 4013 ands r3, r2 + 8007f3c: 683a ldr r2, [r7, #0] + 8007f3e: 429a cmp r2, r3 + 8007f40: d91e bls.n 8007f80 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8007cba: 4b73 ldr r3, [pc, #460] ; (8007e88 ) - 8007cbc: 681b ldr r3, [r3, #0] - 8007cbe: 2207 movs r2, #7 - 8007cc0: 4393 bics r3, r2 - 8007cc2: 0019 movs r1, r3 - 8007cc4: 4b70 ldr r3, [pc, #448] ; (8007e88 ) - 8007cc6: 683a ldr r2, [r7, #0] - 8007cc8: 430a orrs r2, r1 - 8007cca: 601a str r2, [r3, #0] + 8007f42: 4b73 ldr r3, [pc, #460] ; (8008110 ) + 8007f44: 681b ldr r3, [r3, #0] + 8007f46: 2207 movs r2, #7 + 8007f48: 4393 bics r3, r2 + 8007f4a: 0019 movs r1, r3 + 8007f4c: 4b70 ldr r3, [pc, #448] ; (8008110 ) + 8007f4e: 683a ldr r2, [r7, #0] + 8007f50: 430a orrs r2, r1 + 8007f52: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by polling the FLASH_ACR register */ tickstart = HAL_GetTick(); - 8007ccc: f7fe f984 bl 8005fd8 - 8007cd0: 0003 movs r3, r0 - 8007cd2: 60fb str r3, [r7, #12] + 8007f54: f7fe f984 bl 8006260 + 8007f58: 0003 movs r3, r0 + 8007f5a: 60fb str r3, [r7, #12] while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8007cd4: e009 b.n 8007cea + 8007f5c: e009 b.n 8007f72 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8007cd6: f7fe f97f bl 8005fd8 - 8007cda: 0002 movs r2, r0 - 8007cdc: 68fb ldr r3, [r7, #12] - 8007cde: 1ad3 subs r3, r2, r3 - 8007ce0: 4a6a ldr r2, [pc, #424] ; (8007e8c ) - 8007ce2: 4293 cmp r3, r2 - 8007ce4: d901 bls.n 8007cea + 8007f5e: f7fe f97f bl 8006260 + 8007f62: 0002 movs r2, r0 + 8007f64: 68fb ldr r3, [r7, #12] + 8007f66: 1ad3 subs r3, r2, r3 + 8007f68: 4a6a ldr r2, [pc, #424] ; (8008114 ) + 8007f6a: 4293 cmp r3, r2 + 8007f6c: d901 bls.n 8007f72 { return HAL_TIMEOUT; - 8007ce6: 2303 movs r3, #3 - 8007ce8: e0ca b.n 8007e80 + 8007f6e: 2303 movs r3, #3 + 8007f70: e0ca b.n 8008108 while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8007cea: 4b67 ldr r3, [pc, #412] ; (8007e88 ) - 8007cec: 681b ldr r3, [r3, #0] - 8007cee: 2207 movs r2, #7 - 8007cf0: 4013 ands r3, r2 - 8007cf2: 683a ldr r2, [r7, #0] - 8007cf4: 429a cmp r2, r3 - 8007cf6: d1ee bne.n 8007cd6 + 8007f72: 4b67 ldr r3, [pc, #412] ; (8008110 ) + 8007f74: 681b ldr r3, [r3, #0] + 8007f76: 2207 movs r2, #7 + 8007f78: 4013 ands r3, r2 + 8007f7a: 683a ldr r2, [r7, #0] + 8007f7c: 429a cmp r2, r3 + 8007f7e: d1ee bne.n 8007f5e } } } /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8007cf8: 687b ldr r3, [r7, #4] - 8007cfa: 681b ldr r3, [r3, #0] - 8007cfc: 2202 movs r2, #2 - 8007cfe: 4013 ands r3, r2 - 8007d00: d015 beq.n 8007d2e + 8007f80: 687b ldr r3, [r7, #4] + 8007f82: 681b ldr r3, [r3, #0] + 8007f84: 2202 movs r2, #2 + 8007f86: 4013 ands r3, r2 + 8007f88: d015 beq.n 8007fb6 { /* Set the highest APB divider in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8007d02: 687b ldr r3, [r7, #4] - 8007d04: 681b ldr r3, [r3, #0] - 8007d06: 2204 movs r2, #4 - 8007d08: 4013 ands r3, r2 - 8007d0a: d006 beq.n 8007d1a + 8007f8a: 687b ldr r3, [r7, #4] + 8007f8c: 681b ldr r3, [r3, #0] + 8007f8e: 2204 movs r2, #4 + 8007f90: 4013 ands r3, r2 + 8007f92: d006 beq.n 8007fa2 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); - 8007d0c: 4b60 ldr r3, [pc, #384] ; (8007e90 ) - 8007d0e: 689a ldr r2, [r3, #8] - 8007d10: 4b5f ldr r3, [pc, #380] ; (8007e90 ) - 8007d12: 21e0 movs r1, #224 ; 0xe0 - 8007d14: 01c9 lsls r1, r1, #7 - 8007d16: 430a orrs r2, r1 - 8007d18: 609a str r2, [r3, #8] + 8007f94: 4b60 ldr r3, [pc, #384] ; (8008118 ) + 8007f96: 689a ldr r2, [r3, #8] + 8007f98: 4b5f ldr r3, [pc, #380] ; (8008118 ) + 8007f9a: 21e0 movs r1, #224 ; 0xe0 + 8007f9c: 01c9 lsls r1, r1, #7 + 8007f9e: 430a orrs r2, r1 + 8007fa0: 609a str r2, [r3, #8] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8007d1a: 4b5d ldr r3, [pc, #372] ; (8007e90 ) - 8007d1c: 689b ldr r3, [r3, #8] - 8007d1e: 4a5d ldr r2, [pc, #372] ; (8007e94 ) - 8007d20: 4013 ands r3, r2 - 8007d22: 0019 movs r1, r3 - 8007d24: 687b ldr r3, [r7, #4] - 8007d26: 689a ldr r2, [r3, #8] - 8007d28: 4b59 ldr r3, [pc, #356] ; (8007e90 ) - 8007d2a: 430a orrs r2, r1 - 8007d2c: 609a str r2, [r3, #8] + 8007fa2: 4b5d ldr r3, [pc, #372] ; (8008118 ) + 8007fa4: 689b ldr r3, [r3, #8] + 8007fa6: 4a5d ldr r2, [pc, #372] ; (800811c ) + 8007fa8: 4013 ands r3, r2 + 8007faa: 0019 movs r1, r3 + 8007fac: 687b ldr r3, [r7, #4] + 8007fae: 689a ldr r2, [r3, #8] + 8007fb0: 4b59 ldr r3, [pc, #356] ; (8008118 ) + 8007fb2: 430a orrs r2, r1 + 8007fb4: 609a str r2, [r3, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8007d2e: 687b ldr r3, [r7, #4] - 8007d30: 681b ldr r3, [r3, #0] - 8007d32: 2201 movs r2, #1 - 8007d34: 4013 ands r3, r2 - 8007d36: d057 beq.n 8007de8 + 8007fb6: 687b ldr r3, [r7, #4] + 8007fb8: 681b ldr r3, [r3, #0] + 8007fba: 2201 movs r2, #1 + 8007fbc: 4013 ands r3, r2 + 8007fbe: d057 beq.n 8008070 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8007d38: 687b ldr r3, [r7, #4] - 8007d3a: 685b ldr r3, [r3, #4] - 8007d3c: 2b01 cmp r3, #1 - 8007d3e: d107 bne.n 8007d50 + 8007fc0: 687b ldr r3, [r7, #4] + 8007fc2: 685b ldr r3, [r3, #4] + 8007fc4: 2b01 cmp r3, #1 + 8007fc6: d107 bne.n 8007fd8 { /* Check the HSE ready flag */ if (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) - 8007d40: 4b53 ldr r3, [pc, #332] ; (8007e90 ) - 8007d42: 681a ldr r2, [r3, #0] - 8007d44: 2380 movs r3, #128 ; 0x80 - 8007d46: 029b lsls r3, r3, #10 - 8007d48: 4013 ands r3, r2 - 8007d4a: d12b bne.n 8007da4 + 8007fc8: 4b53 ldr r3, [pc, #332] ; (8008118 ) + 8007fca: 681a ldr r2, [r3, #0] + 8007fcc: 2380 movs r3, #128 ; 0x80 + 8007fce: 029b lsls r3, r3, #10 + 8007fd0: 4013 ands r3, r2 + 8007fd2: d12b bne.n 800802c { return HAL_ERROR; - 8007d4c: 2301 movs r3, #1 - 8007d4e: e097 b.n 8007e80 + 8007fd4: 2301 movs r3, #1 + 8007fd6: e097 b.n 8008108 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8007d50: 687b ldr r3, [r7, #4] - 8007d52: 685b ldr r3, [r3, #4] - 8007d54: 2b02 cmp r3, #2 - 8007d56: d107 bne.n 8007d68 + 8007fd8: 687b ldr r3, [r7, #4] + 8007fda: 685b ldr r3, [r3, #4] + 8007fdc: 2b02 cmp r3, #2 + 8007fde: d107 bne.n 8007ff0 { /* Check the PLL ready flag */ if (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) - 8007d58: 4b4d ldr r3, [pc, #308] ; (8007e90 ) - 8007d5a: 681a ldr r2, [r3, #0] - 8007d5c: 2380 movs r3, #128 ; 0x80 - 8007d5e: 049b lsls r3, r3, #18 - 8007d60: 4013 ands r3, r2 - 8007d62: d11f bne.n 8007da4 + 8007fe0: 4b4d ldr r3, [pc, #308] ; (8008118 ) + 8007fe2: 681a ldr r2, [r3, #0] + 8007fe4: 2380 movs r3, #128 ; 0x80 + 8007fe6: 049b lsls r3, r3, #18 + 8007fe8: 4013 ands r3, r2 + 8007fea: d11f bne.n 800802c { return HAL_ERROR; - 8007d64: 2301 movs r3, #1 - 8007d66: e08b b.n 8007e80 + 8007fec: 2301 movs r3, #1 + 8007fee: e08b b.n 8008108 } } /* HSI is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 8007d68: 687b ldr r3, [r7, #4] - 8007d6a: 685b ldr r3, [r3, #4] - 8007d6c: 2b00 cmp r3, #0 - 8007d6e: d107 bne.n 8007d80 + 8007ff0: 687b ldr r3, [r7, #4] + 8007ff2: 685b ldr r3, [r3, #4] + 8007ff4: 2b00 cmp r3, #0 + 8007ff6: d107 bne.n 8008008 { /* Check the HSI ready flag */ if (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) - 8007d70: 4b47 ldr r3, [pc, #284] ; (8007e90 ) - 8007d72: 681a ldr r2, [r3, #0] - 8007d74: 2380 movs r3, #128 ; 0x80 - 8007d76: 00db lsls r3, r3, #3 - 8007d78: 4013 ands r3, r2 - 8007d7a: d113 bne.n 8007da4 + 8007ff8: 4b47 ldr r3, [pc, #284] ; (8008118 ) + 8007ffa: 681a ldr r2, [r3, #0] + 8007ffc: 2380 movs r3, #128 ; 0x80 + 8007ffe: 00db lsls r3, r3, #3 + 8008000: 4013 ands r3, r2 + 8008002: d113 bne.n 800802c { return HAL_ERROR; - 8007d7c: 2301 movs r3, #1 - 8007d7e: e07f b.n 8007e80 + 8008004: 2301 movs r3, #1 + 8008006: e07f b.n 8008108 } } /* LSI is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_LSI) - 8007d80: 687b ldr r3, [r7, #4] - 8007d82: 685b ldr r3, [r3, #4] - 8007d84: 2b03 cmp r3, #3 - 8007d86: d106 bne.n 8007d96 + 8008008: 687b ldr r3, [r7, #4] + 800800a: 685b ldr r3, [r3, #4] + 800800c: 2b03 cmp r3, #3 + 800800e: d106 bne.n 800801e { /* Check the LSI ready flag */ if (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) - 8007d88: 4b41 ldr r3, [pc, #260] ; (8007e90 ) - 8007d8a: 6e1b ldr r3, [r3, #96] ; 0x60 - 8007d8c: 2202 movs r2, #2 - 8007d8e: 4013 ands r3, r2 - 8007d90: d108 bne.n 8007da4 + 8008010: 4b41 ldr r3, [pc, #260] ; (8008118 ) + 8008012: 6e1b ldr r3, [r3, #96] ; 0x60 + 8008014: 2202 movs r2, #2 + 8008016: 4013 ands r3, r2 + 8008018: d108 bne.n 800802c { return HAL_ERROR; - 8007d92: 2301 movs r3, #1 - 8007d94: e074 b.n 8007e80 + 800801a: 2301 movs r3, #1 + 800801c: e074 b.n 8008108 } /* LSE is selected as System Clock Source */ else { /* Check the LSE ready flag */ if (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8007d96: 4b3e ldr r3, [pc, #248] ; (8007e90 ) - 8007d98: 6ddb ldr r3, [r3, #92] ; 0x5c - 8007d9a: 2202 movs r2, #2 - 8007d9c: 4013 ands r3, r2 - 8007d9e: d101 bne.n 8007da4 + 800801e: 4b3e ldr r3, [pc, #248] ; (8008118 ) + 8008020: 6ddb ldr r3, [r3, #92] ; 0x5c + 8008022: 2202 movs r2, #2 + 8008024: 4013 ands r3, r2 + 8008026: d101 bne.n 800802c { return HAL_ERROR; - 8007da0: 2301 movs r3, #1 - 8007da2: e06d b.n 8007e80 + 8008028: 2301 movs r3, #1 + 800802a: e06d b.n 8008108 } } MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); - 8007da4: 4b3a ldr r3, [pc, #232] ; (8007e90 ) - 8007da6: 689b ldr r3, [r3, #8] - 8007da8: 2207 movs r2, #7 - 8007daa: 4393 bics r3, r2 - 8007dac: 0019 movs r1, r3 - 8007dae: 687b ldr r3, [r7, #4] - 8007db0: 685a ldr r2, [r3, #4] - 8007db2: 4b37 ldr r3, [pc, #220] ; (8007e90 ) - 8007db4: 430a orrs r2, r1 - 8007db6: 609a str r2, [r3, #8] + 800802c: 4b3a ldr r3, [pc, #232] ; (8008118 ) + 800802e: 689b ldr r3, [r3, #8] + 8008030: 2207 movs r2, #7 + 8008032: 4393 bics r3, r2 + 8008034: 0019 movs r1, r3 + 8008036: 687b ldr r3, [r7, #4] + 8008038: 685a ldr r2, [r3, #4] + 800803a: 4b37 ldr r3, [pc, #220] ; (8008118 ) + 800803c: 430a orrs r2, r1 + 800803e: 609a str r2, [r3, #8] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8007db8: f7fe f90e bl 8005fd8 - 8007dbc: 0003 movs r3, r0 - 8007dbe: 60fb str r3, [r7, #12] + 8008040: f7fe f90e bl 8006260 + 8008044: 0003 movs r3, r0 + 8008046: 60fb str r3, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8007dc0: e009 b.n 8007dd6 + 8008048: e009 b.n 800805e { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8007dc2: f7fe f909 bl 8005fd8 - 8007dc6: 0002 movs r2, r0 - 8007dc8: 68fb ldr r3, [r7, #12] - 8007dca: 1ad3 subs r3, r2, r3 - 8007dcc: 4a2f ldr r2, [pc, #188] ; (8007e8c ) - 8007dce: 4293 cmp r3, r2 - 8007dd0: d901 bls.n 8007dd6 + 800804a: f7fe f909 bl 8006260 + 800804e: 0002 movs r2, r0 + 8008050: 68fb ldr r3, [r7, #12] + 8008052: 1ad3 subs r3, r2, r3 + 8008054: 4a2f ldr r2, [pc, #188] ; (8008114 ) + 8008056: 4293 cmp r3, r2 + 8008058: d901 bls.n 800805e { return HAL_TIMEOUT; - 8007dd2: 2303 movs r3, #3 - 8007dd4: e054 b.n 8007e80 + 800805a: 2303 movs r3, #3 + 800805c: e054 b.n 8008108 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8007dd6: 4b2e ldr r3, [pc, #184] ; (8007e90 ) - 8007dd8: 689b ldr r3, [r3, #8] - 8007dda: 2238 movs r2, #56 ; 0x38 - 8007ddc: 401a ands r2, r3 - 8007dde: 687b ldr r3, [r7, #4] - 8007de0: 685b ldr r3, [r3, #4] - 8007de2: 00db lsls r3, r3, #3 - 8007de4: 429a cmp r2, r3 - 8007de6: d1ec bne.n 8007dc2 + 800805e: 4b2e ldr r3, [pc, #184] ; (8008118 ) + 8008060: 689b ldr r3, [r3, #8] + 8008062: 2238 movs r2, #56 ; 0x38 + 8008064: 401a ands r2, r3 + 8008066: 687b ldr r3, [r7, #4] + 8008068: 685b ldr r3, [r3, #4] + 800806a: 00db lsls r3, r3, #3 + 800806c: 429a cmp r2, r3 + 800806e: d1ec bne.n 800804a } } } /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) - 8007de8: 4b27 ldr r3, [pc, #156] ; (8007e88 ) - 8007dea: 681b ldr r3, [r3, #0] - 8007dec: 2207 movs r2, #7 - 8007dee: 4013 ands r3, r2 - 8007df0: 683a ldr r2, [r7, #0] - 8007df2: 429a cmp r2, r3 - 8007df4: d21e bcs.n 8007e34 + 8008070: 4b27 ldr r3, [pc, #156] ; (8008110 ) + 8008072: 681b ldr r3, [r3, #0] + 8008074: 2207 movs r2, #7 + 8008076: 4013 ands r3, r2 + 8008078: 683a ldr r2, [r7, #0] + 800807a: 429a cmp r2, r3 + 800807c: d21e bcs.n 80080bc { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8007df6: 4b24 ldr r3, [pc, #144] ; (8007e88 ) - 8007df8: 681b ldr r3, [r3, #0] - 8007dfa: 2207 movs r2, #7 - 8007dfc: 4393 bics r3, r2 - 8007dfe: 0019 movs r1, r3 - 8007e00: 4b21 ldr r3, [pc, #132] ; (8007e88 ) - 8007e02: 683a ldr r2, [r7, #0] - 8007e04: 430a orrs r2, r1 - 8007e06: 601a str r2, [r3, #0] + 800807e: 4b24 ldr r3, [pc, #144] ; (8008110 ) + 8008080: 681b ldr r3, [r3, #0] + 8008082: 2207 movs r2, #7 + 8008084: 4393 bics r3, r2 + 8008086: 0019 movs r1, r3 + 8008088: 4b21 ldr r3, [pc, #132] ; (8008110 ) + 800808a: 683a ldr r2, [r7, #0] + 800808c: 430a orrs r2, r1 + 800808e: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by polling the FLASH_ACR register */ tickstart = HAL_GetTick(); - 8007e08: f7fe f8e6 bl 8005fd8 - 8007e0c: 0003 movs r3, r0 - 8007e0e: 60fb str r3, [r7, #12] + 8008090: f7fe f8e6 bl 8006260 + 8008094: 0003 movs r3, r0 + 8008096: 60fb str r3, [r7, #12] while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8007e10: e009 b.n 8007e26 + 8008098: e009 b.n 80080ae { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8007e12: f7fe f8e1 bl 8005fd8 - 8007e16: 0002 movs r2, r0 - 8007e18: 68fb ldr r3, [r7, #12] - 8007e1a: 1ad3 subs r3, r2, r3 - 8007e1c: 4a1b ldr r2, [pc, #108] ; (8007e8c ) - 8007e1e: 4293 cmp r3, r2 - 8007e20: d901 bls.n 8007e26 + 800809a: f7fe f8e1 bl 8006260 + 800809e: 0002 movs r2, r0 + 80080a0: 68fb ldr r3, [r7, #12] + 80080a2: 1ad3 subs r3, r2, r3 + 80080a4: 4a1b ldr r2, [pc, #108] ; (8008114 ) + 80080a6: 4293 cmp r3, r2 + 80080a8: d901 bls.n 80080ae { return HAL_TIMEOUT; - 8007e22: 2303 movs r3, #3 - 8007e24: e02c b.n 8007e80 + 80080aa: 2303 movs r3, #3 + 80080ac: e02c b.n 8008108 while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) - 8007e26: 4b18 ldr r3, [pc, #96] ; (8007e88 ) - 8007e28: 681b ldr r3, [r3, #0] - 8007e2a: 2207 movs r2, #7 - 8007e2c: 4013 ands r3, r2 - 8007e2e: 683a ldr r2, [r7, #0] - 8007e30: 429a cmp r2, r3 - 8007e32: d1ee bne.n 8007e12 + 80080ae: 4b18 ldr r3, [pc, #96] ; (8008110 ) + 80080b0: 681b ldr r3, [r3, #0] + 80080b2: 2207 movs r2, #7 + 80080b4: 4013 ands r3, r2 + 80080b6: 683a ldr r2, [r7, #0] + 80080b8: 429a cmp r2, r3 + 80080ba: d1ee bne.n 800809a } } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8007e34: 687b ldr r3, [r7, #4] - 8007e36: 681b ldr r3, [r3, #0] - 8007e38: 2204 movs r2, #4 - 8007e3a: 4013 ands r3, r2 - 8007e3c: d009 beq.n 8007e52 + 80080bc: 687b ldr r3, [r7, #4] + 80080be: 681b ldr r3, [r3, #0] + 80080c0: 2204 movs r2, #4 + 80080c2: 4013 ands r3, r2 + 80080c4: d009 beq.n 80080da { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); - 8007e3e: 4b14 ldr r3, [pc, #80] ; (8007e90 ) - 8007e40: 689b ldr r3, [r3, #8] - 8007e42: 4a15 ldr r2, [pc, #84] ; (8007e98 ) - 8007e44: 4013 ands r3, r2 - 8007e46: 0019 movs r1, r3 - 8007e48: 687b ldr r3, [r7, #4] - 8007e4a: 68da ldr r2, [r3, #12] - 8007e4c: 4b10 ldr r3, [pc, #64] ; (8007e90 ) - 8007e4e: 430a orrs r2, r1 - 8007e50: 609a str r2, [r3, #8] + 80080c6: 4b14 ldr r3, [pc, #80] ; (8008118 ) + 80080c8: 689b ldr r3, [r3, #8] + 80080ca: 4a15 ldr r2, [pc, #84] ; (8008120 ) + 80080cc: 4013 ands r3, r2 + 80080ce: 0019 movs r1, r3 + 80080d0: 687b ldr r3, [r7, #4] + 80080d2: 68da ldr r2, [r3, #12] + 80080d4: 4b10 ldr r3, [pc, #64] ; (8008118 ) + 80080d6: 430a orrs r2, r1 + 80080d8: 609a str r2, [r3, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]) & 0x1FU)); - 8007e52: f000 f829 bl 8007ea8 - 8007e56: 0001 movs r1, r0 - 8007e58: 4b0d ldr r3, [pc, #52] ; (8007e90 ) - 8007e5a: 689b ldr r3, [r3, #8] - 8007e5c: 0a1b lsrs r3, r3, #8 - 8007e5e: 220f movs r2, #15 - 8007e60: 401a ands r2, r3 - 8007e62: 4b0e ldr r3, [pc, #56] ; (8007e9c ) - 8007e64: 0092 lsls r2, r2, #2 - 8007e66: 58d3 ldr r3, [r2, r3] - 8007e68: 221f movs r2, #31 - 8007e6a: 4013 ands r3, r2 - 8007e6c: 000a movs r2, r1 - 8007e6e: 40da lsrs r2, r3 - 8007e70: 4b0b ldr r3, [pc, #44] ; (8007ea0 ) - 8007e72: 601a str r2, [r3, #0] + 80080da: f000 f829 bl 8008130 + 80080de: 0001 movs r1, r0 + 80080e0: 4b0d ldr r3, [pc, #52] ; (8008118 ) + 80080e2: 689b ldr r3, [r3, #8] + 80080e4: 0a1b lsrs r3, r3, #8 + 80080e6: 220f movs r2, #15 + 80080e8: 401a ands r2, r3 + 80080ea: 4b0e ldr r3, [pc, #56] ; (8008124 ) + 80080ec: 0092 lsls r2, r2, #2 + 80080ee: 58d3 ldr r3, [r2, r3] + 80080f0: 221f movs r2, #31 + 80080f2: 4013 ands r3, r2 + 80080f4: 000a movs r2, r1 + 80080f6: 40da lsrs r2, r3 + 80080f8: 4b0b ldr r3, [pc, #44] ; (8008128 ) + 80080fa: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ return HAL_InitTick(uwTickPrio); - 8007e74: 4b0b ldr r3, [pc, #44] ; (8007ea4 ) - 8007e76: 681b ldr r3, [r3, #0] - 8007e78: 0018 movs r0, r3 - 8007e7a: f7fd fc75 bl 8005768 - 8007e7e: 0003 movs r3, r0 + 80080fc: 4b0b ldr r3, [pc, #44] ; (800812c ) + 80080fe: 681b ldr r3, [r3, #0] + 8008100: 0018 movs r0, r3 + 8008102: f7fd fb35 bl 8005770 + 8008106: 0003 movs r3, r0 } - 8007e80: 0018 movs r0, r3 - 8007e82: 46bd mov sp, r7 - 8007e84: b004 add sp, #16 - 8007e86: bd80 pop {r7, pc} - 8007e88: 40022000 .word 0x40022000 - 8007e8c: 00001388 .word 0x00001388 - 8007e90: 40021000 .word 0x40021000 - 8007e94: fffff0ff .word 0xfffff0ff - 8007e98: ffff8fff .word 0xffff8fff - 8007e9c: 08010240 .word 0x08010240 - 8007ea0: 20000040 .word 0x20000040 - 8007ea4: 20000044 .word 0x20000044 + 8008108: 0018 movs r0, r3 + 800810a: 46bd mov sp, r7 + 800810c: b004 add sp, #16 + 800810e: bd80 pop {r7, pc} + 8008110: 40022000 .word 0x40022000 + 8008114: 00001388 .word 0x00001388 + 8008118: 40021000 .word 0x40021000 + 800811c: fffff0ff .word 0xfffff0ff + 8008120: ffff8fff .word 0xffff8fff + 8008124: 08010e80 .word 0x08010e80 + 8008128: 20000040 .word 0x20000040 + 800812c: 20000044 .word 0x20000044 -08007ea8 : +08008130 : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 8007ea8: b580 push {r7, lr} - 8007eaa: b086 sub sp, #24 - 8007eac: af00 add r7, sp, #0 + 8008130: b580 push {r7, lr} + 8008132: b086 sub sp, #24 + 8008134: af00 add r7, sp, #0 uint32_t pllvco, pllsource, pllr, pllm, hsidiv; uint32_t sysclockfreq; if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 8007eae: 4b3c ldr r3, [pc, #240] ; (8007fa0 ) - 8007eb0: 689b ldr r3, [r3, #8] - 8007eb2: 2238 movs r2, #56 ; 0x38 - 8007eb4: 4013 ands r3, r2 - 8007eb6: d10f bne.n 8007ed8 + 8008136: 4b3c ldr r3, [pc, #240] ; (8008228 ) + 8008138: 689b ldr r3, [r3, #8] + 800813a: 2238 movs r2, #56 ; 0x38 + 800813c: 4013 ands r3, r2 + 800813e: d10f bne.n 8008160 { /* HSISYS can be derived for HSI16 */ hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos)); - 8007eb8: 4b39 ldr r3, [pc, #228] ; (8007fa0 ) - 8007eba: 681b ldr r3, [r3, #0] - 8007ebc: 0adb lsrs r3, r3, #11 - 8007ebe: 2207 movs r2, #7 - 8007ec0: 4013 ands r3, r2 - 8007ec2: 2201 movs r2, #1 - 8007ec4: 409a lsls r2, r3 - 8007ec6: 0013 movs r3, r2 - 8007ec8: 603b str r3, [r7, #0] + 8008140: 4b39 ldr r3, [pc, #228] ; (8008228 ) + 8008142: 681b ldr r3, [r3, #0] + 8008144: 0adb lsrs r3, r3, #11 + 8008146: 2207 movs r2, #7 + 8008148: 4013 ands r3, r2 + 800814a: 2201 movs r2, #1 + 800814c: 409a lsls r2, r3 + 800814e: 0013 movs r3, r2 + 8008150: 603b str r3, [r7, #0] /* HSI used as system clock source */ sysclockfreq = (HSI_VALUE / hsidiv); - 8007eca: 6839 ldr r1, [r7, #0] - 8007ecc: 4835 ldr r0, [pc, #212] ; (8007fa4 ) - 8007ece: f7f8 f92d bl 800012c <__udivsi3> - 8007ed2: 0003 movs r3, r0 - 8007ed4: 613b str r3, [r7, #16] - 8007ed6: e05d b.n 8007f94 + 8008152: 6839 ldr r1, [r7, #0] + 8008154: 4835 ldr r0, [pc, #212] ; (800822c ) + 8008156: f7f7 ffe9 bl 800012c <__udivsi3> + 800815a: 0003 movs r3, r0 + 800815c: 613b str r3, [r7, #16] + 800815e: e05d b.n 800821c } else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8007ed8: 4b31 ldr r3, [pc, #196] ; (8007fa0 ) - 8007eda: 689b ldr r3, [r3, #8] - 8007edc: 2238 movs r2, #56 ; 0x38 - 8007ede: 4013 ands r3, r2 - 8007ee0: 2b08 cmp r3, #8 - 8007ee2: d102 bne.n 8007eea + 8008160: 4b31 ldr r3, [pc, #196] ; (8008228 ) + 8008162: 689b ldr r3, [r3, #8] + 8008164: 2238 movs r2, #56 ; 0x38 + 8008166: 4013 ands r3, r2 + 8008168: 2b08 cmp r3, #8 + 800816a: d102 bne.n 8008172 { /* HSE used as system clock source */ sysclockfreq = HSE_VALUE; - 8007ee4: 4b2f ldr r3, [pc, #188] ; (8007fa4 ) - 8007ee6: 613b str r3, [r7, #16] - 8007ee8: e054 b.n 8007f94 + 800816c: 4b2f ldr r3, [pc, #188] ; (800822c ) + 800816e: 613b str r3, [r7, #16] + 8008170: e054 b.n 800821c } else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8007eea: 4b2d ldr r3, [pc, #180] ; (8007fa0 ) - 8007eec: 689b ldr r3, [r3, #8] - 8007eee: 2238 movs r2, #56 ; 0x38 - 8007ef0: 4013 ands r3, r2 - 8007ef2: 2b10 cmp r3, #16 - 8007ef4: d138 bne.n 8007f68 + 8008172: 4b2d ldr r3, [pc, #180] ; (8008228 ) + 8008174: 689b ldr r3, [r3, #8] + 8008176: 2238 movs r2, #56 ; 0x38 + 8008178: 4013 ands r3, r2 + 800817a: 2b10 cmp r3, #16 + 800817c: d138 bne.n 80081f0 /* PLL used as system clock source */ /* PLL_VCO = ((HSE_VALUE or HSI_VALUE)/ PLLM) * PLLN SYSCLK = PLL_VCO / PLLR */ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - 8007ef6: 4b2a ldr r3, [pc, #168] ; (8007fa0 ) - 8007ef8: 68db ldr r3, [r3, #12] - 8007efa: 2203 movs r2, #3 - 8007efc: 4013 ands r3, r2 - 8007efe: 60fb str r3, [r7, #12] + 800817e: 4b2a ldr r3, [pc, #168] ; (8008228 ) + 8008180: 68db ldr r3, [r3, #12] + 8008182: 2203 movs r2, #3 + 8008184: 4013 ands r3, r2 + 8008186: 60fb str r3, [r7, #12] pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; - 8007f00: 4b27 ldr r3, [pc, #156] ; (8007fa0 ) - 8007f02: 68db ldr r3, [r3, #12] - 8007f04: 091b lsrs r3, r3, #4 - 8007f06: 2207 movs r2, #7 - 8007f08: 4013 ands r3, r2 - 8007f0a: 3301 adds r3, #1 - 8007f0c: 60bb str r3, [r7, #8] + 8008188: 4b27 ldr r3, [pc, #156] ; (8008228 ) + 800818a: 68db ldr r3, [r3, #12] + 800818c: 091b lsrs r3, r3, #4 + 800818e: 2207 movs r2, #7 + 8008190: 4013 ands r3, r2 + 8008192: 3301 adds r3, #1 + 8008194: 60bb str r3, [r7, #8] switch (pllsource) - 8007f0e: 68fb ldr r3, [r7, #12] - 8007f10: 2b03 cmp r3, #3 - 8007f12: d10d bne.n 8007f30 + 8008196: 68fb ldr r3, [r7, #12] + 8008198: 2b03 cmp r3, #3 + 800819a: d10d bne.n 80081b8 { case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - 8007f14: 68b9 ldr r1, [r7, #8] - 8007f16: 4823 ldr r0, [pc, #140] ; (8007fa4 ) - 8007f18: f7f8 f908 bl 800012c <__udivsi3> - 8007f1c: 0003 movs r3, r0 - 8007f1e: 0019 movs r1, r3 - 8007f20: 4b1f ldr r3, [pc, #124] ; (8007fa0 ) - 8007f22: 68db ldr r3, [r3, #12] - 8007f24: 0a1b lsrs r3, r3, #8 - 8007f26: 227f movs r2, #127 ; 0x7f - 8007f28: 4013 ands r3, r2 - 8007f2a: 434b muls r3, r1 - 8007f2c: 617b str r3, [r7, #20] + 800819c: 68b9 ldr r1, [r7, #8] + 800819e: 4823 ldr r0, [pc, #140] ; (800822c ) + 80081a0: f7f7 ffc4 bl 800012c <__udivsi3> + 80081a4: 0003 movs r3, r0 + 80081a6: 0019 movs r1, r3 + 80081a8: 4b1f ldr r3, [pc, #124] ; (8008228 ) + 80081aa: 68db ldr r3, [r3, #12] + 80081ac: 0a1b lsrs r3, r3, #8 + 80081ae: 227f movs r2, #127 ; 0x7f + 80081b0: 4013 ands r3, r2 + 80081b2: 434b muls r3, r1 + 80081b4: 617b str r3, [r7, #20] break; - 8007f2e: e00d b.n 8007f4c + 80081b6: e00d b.n 80081d4 case RCC_PLLSOURCE_HSI: /* HSI16 used as PLL clock source */ default: /* HSI16 used as PLL clock source */ pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos) ; - 8007f30: 68b9 ldr r1, [r7, #8] - 8007f32: 481c ldr r0, [pc, #112] ; (8007fa4 ) - 8007f34: f7f8 f8fa bl 800012c <__udivsi3> - 8007f38: 0003 movs r3, r0 - 8007f3a: 0019 movs r1, r3 - 8007f3c: 4b18 ldr r3, [pc, #96] ; (8007fa0 ) - 8007f3e: 68db ldr r3, [r3, #12] - 8007f40: 0a1b lsrs r3, r3, #8 - 8007f42: 227f movs r2, #127 ; 0x7f - 8007f44: 4013 ands r3, r2 - 8007f46: 434b muls r3, r1 - 8007f48: 617b str r3, [r7, #20] + 80081b8: 68b9 ldr r1, [r7, #8] + 80081ba: 481c ldr r0, [pc, #112] ; (800822c ) + 80081bc: f7f7 ffb6 bl 800012c <__udivsi3> + 80081c0: 0003 movs r3, r0 + 80081c2: 0019 movs r1, r3 + 80081c4: 4b18 ldr r3, [pc, #96] ; (8008228 ) + 80081c6: 68db ldr r3, [r3, #12] + 80081c8: 0a1b lsrs r3, r3, #8 + 80081ca: 227f movs r2, #127 ; 0x7f + 80081cc: 4013 ands r3, r2 + 80081ce: 434b muls r3, r1 + 80081d0: 617b str r3, [r7, #20] break; - 8007f4a: 46c0 nop ; (mov r8, r8) + 80081d2: 46c0 nop ; (mov r8, r8) } pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U); - 8007f4c: 4b14 ldr r3, [pc, #80] ; (8007fa0 ) - 8007f4e: 68db ldr r3, [r3, #12] - 8007f50: 0f5b lsrs r3, r3, #29 - 8007f52: 2207 movs r2, #7 - 8007f54: 4013 ands r3, r2 - 8007f56: 3301 adds r3, #1 - 8007f58: 607b str r3, [r7, #4] + 80081d4: 4b14 ldr r3, [pc, #80] ; (8008228 ) + 80081d6: 68db ldr r3, [r3, #12] + 80081d8: 0f5b lsrs r3, r3, #29 + 80081da: 2207 movs r2, #7 + 80081dc: 4013 ands r3, r2 + 80081de: 3301 adds r3, #1 + 80081e0: 607b str r3, [r7, #4] sysclockfreq = pllvco / pllr; - 8007f5a: 6879 ldr r1, [r7, #4] - 8007f5c: 6978 ldr r0, [r7, #20] - 8007f5e: f7f8 f8e5 bl 800012c <__udivsi3> - 8007f62: 0003 movs r3, r0 - 8007f64: 613b str r3, [r7, #16] - 8007f66: e015 b.n 8007f94 + 80081e2: 6879 ldr r1, [r7, #4] + 80081e4: 6978 ldr r0, [r7, #20] + 80081e6: f7f7 ffa1 bl 800012c <__udivsi3> + 80081ea: 0003 movs r3, r0 + 80081ec: 613b str r3, [r7, #16] + 80081ee: e015 b.n 800821c } else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSE) - 8007f68: 4b0d ldr r3, [pc, #52] ; (8007fa0 ) - 8007f6a: 689b ldr r3, [r3, #8] - 8007f6c: 2238 movs r2, #56 ; 0x38 - 8007f6e: 4013 ands r3, r2 - 8007f70: 2b20 cmp r3, #32 - 8007f72: d103 bne.n 8007f7c + 80081f0: 4b0d ldr r3, [pc, #52] ; (8008228 ) + 80081f2: 689b ldr r3, [r3, #8] + 80081f4: 2238 movs r2, #56 ; 0x38 + 80081f6: 4013 ands r3, r2 + 80081f8: 2b20 cmp r3, #32 + 80081fa: d103 bne.n 8008204 { /* LSE used as system clock source */ sysclockfreq = LSE_VALUE; - 8007f74: 2380 movs r3, #128 ; 0x80 - 8007f76: 021b lsls r3, r3, #8 - 8007f78: 613b str r3, [r7, #16] - 8007f7a: e00b b.n 8007f94 + 80081fc: 2380 movs r3, #128 ; 0x80 + 80081fe: 021b lsls r3, r3, #8 + 8008200: 613b str r3, [r7, #16] + 8008202: e00b b.n 800821c } else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSI) - 8007f7c: 4b08 ldr r3, [pc, #32] ; (8007fa0 ) - 8007f7e: 689b ldr r3, [r3, #8] - 8007f80: 2238 movs r2, #56 ; 0x38 - 8007f82: 4013 ands r3, r2 - 8007f84: 2b18 cmp r3, #24 - 8007f86: d103 bne.n 8007f90 + 8008204: 4b08 ldr r3, [pc, #32] ; (8008228 ) + 8008206: 689b ldr r3, [r3, #8] + 8008208: 2238 movs r2, #56 ; 0x38 + 800820a: 4013 ands r3, r2 + 800820c: 2b18 cmp r3, #24 + 800820e: d103 bne.n 8008218 { /* LSI used as system clock source */ sysclockfreq = LSI_VALUE; - 8007f88: 23fa movs r3, #250 ; 0xfa - 8007f8a: 01db lsls r3, r3, #7 - 8007f8c: 613b str r3, [r7, #16] - 8007f8e: e001 b.n 8007f94 + 8008210: 23fa movs r3, #250 ; 0xfa + 8008212: 01db lsls r3, r3, #7 + 8008214: 613b str r3, [r7, #16] + 8008216: e001 b.n 800821c } else { sysclockfreq = 0U; - 8007f90: 2300 movs r3, #0 - 8007f92: 613b str r3, [r7, #16] + 8008218: 2300 movs r3, #0 + 800821a: 613b str r3, [r7, #16] } return sysclockfreq; - 8007f94: 693b ldr r3, [r7, #16] + 800821c: 693b ldr r3, [r7, #16] } - 8007f96: 0018 movs r0, r3 - 8007f98: 46bd mov sp, r7 - 8007f9a: b006 add sp, #24 - 8007f9c: bd80 pop {r7, pc} - 8007f9e: 46c0 nop ; (mov r8, r8) - 8007fa0: 40021000 .word 0x40021000 - 8007fa4: 00f42400 .word 0x00f42400 + 800821e: 0018 movs r0, r3 + 8008220: 46bd mov sp, r7 + 8008222: b006 add sp, #24 + 8008224: bd80 pop {r7, pc} + 8008226: 46c0 nop ; (mov r8, r8) + 8008228: 40021000 .word 0x40021000 + 800822c: 00f42400 .word 0x00f42400 -08007fa8 : +08008230 : * * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. * @retval HCLK frequency in Hz */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8007fa8: b580 push {r7, lr} - 8007faa: af00 add r7, sp, #0 + 8008230: b580 push {r7, lr} + 8008232: af00 add r7, sp, #0 return SystemCoreClock; - 8007fac: 4b02 ldr r3, [pc, #8] ; (8007fb8 ) - 8007fae: 681b ldr r3, [r3, #0] + 8008234: 4b02 ldr r3, [pc, #8] ; (8008240 ) + 8008236: 681b ldr r3, [r3, #0] } - 8007fb0: 0018 movs r0, r3 - 8007fb2: 46bd mov sp, r7 - 8007fb4: bd80 pop {r7, pc} - 8007fb6: 46c0 nop ; (mov r8, r8) - 8007fb8: 20000040 .word 0x20000040 + 8008238: 0018 movs r0, r3 + 800823a: 46bd mov sp, r7 + 800823c: bd80 pop {r7, pc} + 800823e: 46c0 nop ; (mov r8, r8) + 8008240: 20000040 .word 0x20000040 -08007fbc : +08008244 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency in Hz */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8007fbc: b5b0 push {r4, r5, r7, lr} - 8007fbe: af00 add r7, sp, #0 + 8008244: b5b0 push {r4, r5, r7, lr} + 8008246: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return ((uint32_t)(__LL_RCC_CALC_PCLK1_FREQ(HAL_RCC_GetHCLKFreq(), LL_RCC_GetAPB1Prescaler()))); - 8007fc0: f7ff fff2 bl 8007fa8 - 8007fc4: 0004 movs r4, r0 - 8007fc6: f7ff fb4b bl 8007660 - 8007fca: 0003 movs r3, r0 - 8007fcc: 0b1a lsrs r2, r3, #12 - 8007fce: 4b05 ldr r3, [pc, #20] ; (8007fe4 ) - 8007fd0: 0092 lsls r2, r2, #2 - 8007fd2: 58d3 ldr r3, [r2, r3] - 8007fd4: 221f movs r2, #31 - 8007fd6: 4013 ands r3, r2 - 8007fd8: 40dc lsrs r4, r3 - 8007fda: 0023 movs r3, r4 + 8008248: f7ff fff2 bl 8008230 + 800824c: 0004 movs r4, r0 + 800824e: f7ff fb4b bl 80078e8 + 8008252: 0003 movs r3, r0 + 8008254: 0b1a lsrs r2, r3, #12 + 8008256: 4b05 ldr r3, [pc, #20] ; (800826c ) + 8008258: 0092 lsls r2, r2, #2 + 800825a: 58d3 ldr r3, [r2, r3] + 800825c: 221f movs r2, #31 + 800825e: 4013 ands r3, r2 + 8008260: 40dc lsrs r4, r3 + 8008262: 0023 movs r3, r4 } - 8007fdc: 0018 movs r0, r3 - 8007fde: 46bd mov sp, r7 - 8007fe0: bdb0 pop {r4, r5, r7, pc} - 8007fe2: 46c0 nop ; (mov r8, r8) - 8007fe4: 08010280 .word 0x08010280 + 8008264: 0018 movs r0, r3 + 8008266: 46bd mov sp, r7 + 8008268: bdb0 pop {r4, r5, r7, pc} + 800826a: 46c0 nop ; (mov r8, r8) + 800826c: 08010ec0 .word 0x08010ec0 -08007fe8 : +08008270 : * will be configured. * @param pFLatency Pointer on the Flash Latency. * @retval None */ void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) { - 8007fe8: b580 push {r7, lr} - 8007fea: b082 sub sp, #8 - 8007fec: af00 add r7, sp, #0 - 8007fee: 6078 str r0, [r7, #4] - 8007ff0: 6039 str r1, [r7, #0] + 8008270: b580 push {r7, lr} + 8008272: b082 sub sp, #8 + 8008274: af00 add r7, sp, #0 + 8008276: 6078 str r0, [r7, #4] + 8008278: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(RCC_ClkInitStruct != (void *)NULL); assert_param(pFLatency != (void *)NULL); /* Set all possible values for the Clock type parameter --------------------*/ RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1; - 8007ff2: 687b ldr r3, [r7, #4] - 8007ff4: 2207 movs r2, #7 - 8007ff6: 601a str r2, [r3, #0] + 800827a: 687b ldr r3, [r7, #4] + 800827c: 2207 movs r2, #7 + 800827e: 601a str r2, [r3, #0] /* Get the SYSCLK configuration --------------------------------------------*/ RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); - 8007ff8: 4b0e ldr r3, [pc, #56] ; (8008034 ) - 8007ffa: 689b ldr r3, [r3, #8] - 8007ffc: 2207 movs r2, #7 - 8007ffe: 401a ands r2, r3 - 8008000: 687b ldr r3, [r7, #4] - 8008002: 605a str r2, [r3, #4] + 8008280: 4b0e ldr r3, [pc, #56] ; (80082bc ) + 8008282: 689b ldr r3, [r3, #8] + 8008284: 2207 movs r2, #7 + 8008286: 401a ands r2, r3 + 8008288: 687b ldr r3, [r7, #4] + 800828a: 605a str r2, [r3, #4] /* Get the HCLK configuration ----------------------------------------------*/ RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); - 8008004: 4b0b ldr r3, [pc, #44] ; (8008034 ) - 8008006: 689a ldr r2, [r3, #8] - 8008008: 23f0 movs r3, #240 ; 0xf0 - 800800a: 011b lsls r3, r3, #4 - 800800c: 401a ands r2, r3 - 800800e: 687b ldr r3, [r7, #4] - 8008010: 609a str r2, [r3, #8] + 800828c: 4b0b ldr r3, [pc, #44] ; (80082bc ) + 800828e: 689a ldr r2, [r3, #8] + 8008290: 23f0 movs r3, #240 ; 0xf0 + 8008292: 011b lsls r3, r3, #4 + 8008294: 401a ands r2, r3 + 8008296: 687b ldr r3, [r7, #4] + 8008298: 609a str r2, [r3, #8] /* Get the APB1 configuration ----------------------------------------------*/ RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); - 8008012: 4b08 ldr r3, [pc, #32] ; (8008034 ) - 8008014: 689a ldr r2, [r3, #8] - 8008016: 23e0 movs r3, #224 ; 0xe0 - 8008018: 01db lsls r3, r3, #7 - 800801a: 401a ands r2, r3 - 800801c: 687b ldr r3, [r7, #4] - 800801e: 60da str r2, [r3, #12] + 800829a: 4b08 ldr r3, [pc, #32] ; (80082bc ) + 800829c: 689a ldr r2, [r3, #8] + 800829e: 23e0 movs r3, #224 ; 0xe0 + 80082a0: 01db lsls r3, r3, #7 + 80082a2: 401a ands r2, r3 + 80082a4: 687b ldr r3, [r7, #4] + 80082a6: 60da str r2, [r3, #12] /* Get the Flash Wait State (Latency) configuration ------------------------*/ *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); - 8008020: 4b05 ldr r3, [pc, #20] ; (8008038 ) - 8008022: 681b ldr r3, [r3, #0] - 8008024: 2207 movs r2, #7 - 8008026: 401a ands r2, r3 - 8008028: 683b ldr r3, [r7, #0] - 800802a: 601a str r2, [r3, #0] + 80082a8: 4b05 ldr r3, [pc, #20] ; (80082c0 ) + 80082aa: 681b ldr r3, [r3, #0] + 80082ac: 2207 movs r2, #7 + 80082ae: 401a ands r2, r3 + 80082b0: 683b ldr r3, [r7, #0] + 80082b2: 601a str r2, [r3, #0] } - 800802c: 46c0 nop ; (mov r8, r8) - 800802e: 46bd mov sp, r7 - 8008030: b002 add sp, #8 - 8008032: bd80 pop {r7, pc} - 8008034: 40021000 .word 0x40021000 - 8008038: 40022000 .word 0x40022000 + 80082b4: 46c0 nop ; (mov r8, r8) + 80082b6: 46bd mov sp, r7 + 80082b8: b002 add sp, #8 + 80082ba: bd80 pop {r7, pc} + 80082bc: 40021000 .word 0x40021000 + 80082c0: 40022000 .word 0x40022000 -0800803c : +080082c4 : * the RTC clock source: in this case the access to Backup domain is enabled. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 800803c: b580 push {r7, lr} - 800803e: b086 sub sp, #24 - 8008040: af00 add r7, sp, #0 - 8008042: 6078 str r0, [r7, #4] + 80082c4: b580 push {r7, lr} + 80082c6: b086 sub sp, #24 + 80082c8: af00 add r7, sp, #0 + 80082ca: 6078 str r0, [r7, #4] uint32_t tmpregister; uint32_t tickstart; HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */ - 8008044: 2313 movs r3, #19 - 8008046: 18fb adds r3, r7, r3 - 8008048: 2200 movs r2, #0 - 800804a: 701a strb r2, [r3, #0] + 80082cc: 2313 movs r3, #19 + 80082ce: 18fb adds r3, r7, r3 + 80082d0: 2200 movs r2, #0 + 80082d2: 701a strb r2, [r3, #0] HAL_StatusTypeDef status = HAL_OK; /* Final status */ - 800804c: 2312 movs r3, #18 - 800804e: 18fb adds r3, r7, r3 - 8008050: 2200 movs r2, #0 - 8008052: 701a strb r2, [r3, #0] + 80082d4: 2312 movs r3, #18 + 80082d6: 18fb adds r3, r7, r3 + 80082d8: 2200 movs r2, #0 + 80082da: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*-------------------------- RTC clock source configuration ----------------------*/ if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 8008054: 687b ldr r3, [r7, #4] - 8008056: 681a ldr r2, [r3, #0] - 8008058: 2380 movs r3, #128 ; 0x80 - 800805a: 029b lsls r3, r3, #10 - 800805c: 4013 ands r3, r2 - 800805e: d100 bne.n 8008062 - 8008060: e0a3 b.n 80081aa + 80082dc: 687b ldr r3, [r7, #4] + 80082de: 681a ldr r2, [r3, #0] + 80082e0: 2380 movs r3, #128 ; 0x80 + 80082e2: 029b lsls r3, r3, #10 + 80082e4: 4013 ands r3, r2 + 80082e6: d100 bne.n 80082ea + 80082e8: e0a3 b.n 8008432 { FlagStatus pwrclkchanged = RESET; - 8008062: 2011 movs r0, #17 - 8008064: 183b adds r3, r7, r0 - 8008066: 2200 movs r2, #0 - 8008068: 701a strb r2, [r3, #0] + 80082ea: 2011 movs r0, #17 + 80082ec: 183b adds r3, r7, r0 + 80082ee: 2200 movs r2, #0 + 80082f0: 701a strb r2, [r3, #0] /* Check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable Power Clock */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 800806a: 4b86 ldr r3, [pc, #536] ; (8008284 ) - 800806c: 6bda ldr r2, [r3, #60] ; 0x3c - 800806e: 2380 movs r3, #128 ; 0x80 - 8008070: 055b lsls r3, r3, #21 - 8008072: 4013 ands r3, r2 - 8008074: d110 bne.n 8008098 + 80082f2: 4b86 ldr r3, [pc, #536] ; (800850c ) + 80082f4: 6bda ldr r2, [r3, #60] ; 0x3c + 80082f6: 2380 movs r3, #128 ; 0x80 + 80082f8: 055b lsls r3, r3, #21 + 80082fa: 4013 ands r3, r2 + 80082fc: d110 bne.n 8008320 { __HAL_RCC_PWR_CLK_ENABLE(); - 8008076: 4b83 ldr r3, [pc, #524] ; (8008284 ) - 8008078: 6bda ldr r2, [r3, #60] ; 0x3c - 800807a: 4b82 ldr r3, [pc, #520] ; (8008284 ) - 800807c: 2180 movs r1, #128 ; 0x80 - 800807e: 0549 lsls r1, r1, #21 - 8008080: 430a orrs r2, r1 - 8008082: 63da str r2, [r3, #60] ; 0x3c - 8008084: 4b7f ldr r3, [pc, #508] ; (8008284 ) - 8008086: 6bda ldr r2, [r3, #60] ; 0x3c - 8008088: 2380 movs r3, #128 ; 0x80 - 800808a: 055b lsls r3, r3, #21 - 800808c: 4013 ands r3, r2 - 800808e: 60bb str r3, [r7, #8] - 8008090: 68bb ldr r3, [r7, #8] + 80082fe: 4b83 ldr r3, [pc, #524] ; (800850c ) + 8008300: 6bda ldr r2, [r3, #60] ; 0x3c + 8008302: 4b82 ldr r3, [pc, #520] ; (800850c ) + 8008304: 2180 movs r1, #128 ; 0x80 + 8008306: 0549 lsls r1, r1, #21 + 8008308: 430a orrs r2, r1 + 800830a: 63da str r2, [r3, #60] ; 0x3c + 800830c: 4b7f ldr r3, [pc, #508] ; (800850c ) + 800830e: 6bda ldr r2, [r3, #60] ; 0x3c + 8008310: 2380 movs r3, #128 ; 0x80 + 8008312: 055b lsls r3, r3, #21 + 8008314: 4013 ands r3, r2 + 8008316: 60bb str r3, [r7, #8] + 8008318: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8008092: 183b adds r3, r7, r0 - 8008094: 2201 movs r2, #1 - 8008096: 701a strb r2, [r3, #0] + 800831a: 183b adds r3, r7, r0 + 800831c: 2201 movs r2, #1 + 800831e: 701a strb r2, [r3, #0] } /* Enable write access to Backup domain */ SET_BIT(PWR->CR1, PWR_CR1_DBP); - 8008098: 4b7b ldr r3, [pc, #492] ; (8008288 ) - 800809a: 681a ldr r2, [r3, #0] - 800809c: 4b7a ldr r3, [pc, #488] ; (8008288 ) - 800809e: 2180 movs r1, #128 ; 0x80 - 80080a0: 0049 lsls r1, r1, #1 - 80080a2: 430a orrs r2, r1 - 80080a4: 601a str r2, [r3, #0] + 8008320: 4b7b ldr r3, [pc, #492] ; (8008510 ) + 8008322: 681a ldr r2, [r3, #0] + 8008324: 4b7a ldr r3, [pc, #488] ; (8008510 ) + 8008326: 2180 movs r1, #128 ; 0x80 + 8008328: 0049 lsls r1, r1, #1 + 800832a: 430a orrs r2, r1 + 800832c: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80080a6: f7fd ff97 bl 8005fd8 - 80080aa: 0003 movs r3, r0 - 80080ac: 60fb str r3, [r7, #12] + 800832e: f7fd ff97 bl 8006260 + 8008332: 0003 movs r3, r0 + 8008334: 60fb str r3, [r7, #12] while ((PWR->CR1 & PWR_CR1_DBP) == 0U) - 80080ae: e00b b.n 80080c8 + 8008336: e00b b.n 8008350 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80080b0: f7fd ff92 bl 8005fd8 - 80080b4: 0002 movs r2, r0 - 80080b6: 68fb ldr r3, [r7, #12] - 80080b8: 1ad3 subs r3, r2, r3 - 80080ba: 2b02 cmp r3, #2 - 80080bc: d904 bls.n 80080c8 + 8008338: f7fd ff92 bl 8006260 + 800833c: 0002 movs r2, r0 + 800833e: 68fb ldr r3, [r7, #12] + 8008340: 1ad3 subs r3, r2, r3 + 8008342: 2b02 cmp r3, #2 + 8008344: d904 bls.n 8008350 { ret = HAL_TIMEOUT; - 80080be: 2313 movs r3, #19 - 80080c0: 18fb adds r3, r7, r3 - 80080c2: 2203 movs r2, #3 - 80080c4: 701a strb r2, [r3, #0] + 8008346: 2313 movs r3, #19 + 8008348: 18fb adds r3, r7, r3 + 800834a: 2203 movs r2, #3 + 800834c: 701a strb r2, [r3, #0] break; - 80080c6: e005 b.n 80080d4 + 800834e: e005 b.n 800835c while ((PWR->CR1 & PWR_CR1_DBP) == 0U) - 80080c8: 4b6f ldr r3, [pc, #444] ; (8008288 ) - 80080ca: 681a ldr r2, [r3, #0] - 80080cc: 2380 movs r3, #128 ; 0x80 - 80080ce: 005b lsls r3, r3, #1 - 80080d0: 4013 ands r3, r2 - 80080d2: d0ed beq.n 80080b0 + 8008350: 4b6f ldr r3, [pc, #444] ; (8008510 ) + 8008352: 681a ldr r2, [r3, #0] + 8008354: 2380 movs r3, #128 ; 0x80 + 8008356: 005b lsls r3, r3, #1 + 8008358: 4013 ands r3, r2 + 800835a: d0ed beq.n 8008338 } } if (ret == HAL_OK) - 80080d4: 2313 movs r3, #19 - 80080d6: 18fb adds r3, r7, r3 - 80080d8: 781b ldrb r3, [r3, #0] - 80080da: 2b00 cmp r3, #0 - 80080dc: d154 bne.n 8008188 + 800835c: 2313 movs r3, #19 + 800835e: 18fb adds r3, r7, r3 + 8008360: 781b ldrb r3, [r3, #0] + 8008362: 2b00 cmp r3, #0 + 8008364: d154 bne.n 8008410 { /* Reset the Backup domain only if the RTC Clock source selection is modified from default */ tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL); - 80080de: 4b69 ldr r3, [pc, #420] ; (8008284 ) - 80080e0: 6dda ldr r2, [r3, #92] ; 0x5c - 80080e2: 23c0 movs r3, #192 ; 0xc0 - 80080e4: 009b lsls r3, r3, #2 - 80080e6: 4013 ands r3, r2 - 80080e8: 617b str r3, [r7, #20] + 8008366: 4b69 ldr r3, [pc, #420] ; (800850c ) + 8008368: 6dda ldr r2, [r3, #92] ; 0x5c + 800836a: 23c0 movs r3, #192 ; 0xc0 + 800836c: 009b lsls r3, r3, #2 + 800836e: 4013 ands r3, r2 + 8008370: 617b str r3, [r7, #20] /* Reset the Backup domain only if the RTC Clock source selection is modified */ if ((tmpregister != RCC_RTCCLKSOURCE_NONE) && (tmpregister != PeriphClkInit->RTCClockSelection)) - 80080ea: 697b ldr r3, [r7, #20] - 80080ec: 2b00 cmp r3, #0 - 80080ee: d019 beq.n 8008124 - 80080f0: 687b ldr r3, [r7, #4] - 80080f2: 699b ldr r3, [r3, #24] - 80080f4: 697a ldr r2, [r7, #20] - 80080f6: 429a cmp r2, r3 - 80080f8: d014 beq.n 8008124 + 8008372: 697b ldr r3, [r7, #20] + 8008374: 2b00 cmp r3, #0 + 8008376: d019 beq.n 80083ac + 8008378: 687b ldr r3, [r7, #4] + 800837a: 699b ldr r3, [r3, #24] + 800837c: 697a ldr r2, [r7, #20] + 800837e: 429a cmp r2, r3 + 8008380: d014 beq.n 80083ac { /* Store the content of BDCR register before the reset of Backup Domain */ tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); - 80080fa: 4b62 ldr r3, [pc, #392] ; (8008284 ) - 80080fc: 6ddb ldr r3, [r3, #92] ; 0x5c - 80080fe: 4a63 ldr r2, [pc, #396] ; (800828c ) - 8008100: 4013 ands r3, r2 - 8008102: 617b str r3, [r7, #20] + 8008382: 4b62 ldr r3, [pc, #392] ; (800850c ) + 8008384: 6ddb ldr r3, [r3, #92] ; 0x5c + 8008386: 4a63 ldr r2, [pc, #396] ; (8008514 ) + 8008388: 4013 ands r3, r2 + 800838a: 617b str r3, [r7, #20] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 8008104: 4b5f ldr r3, [pc, #380] ; (8008284 ) - 8008106: 6dda ldr r2, [r3, #92] ; 0x5c - 8008108: 4b5e ldr r3, [pc, #376] ; (8008284 ) - 800810a: 2180 movs r1, #128 ; 0x80 - 800810c: 0249 lsls r1, r1, #9 - 800810e: 430a orrs r2, r1 - 8008110: 65da str r2, [r3, #92] ; 0x5c + 800838c: 4b5f ldr r3, [pc, #380] ; (800850c ) + 800838e: 6dda ldr r2, [r3, #92] ; 0x5c + 8008390: 4b5e ldr r3, [pc, #376] ; (800850c ) + 8008392: 2180 movs r1, #128 ; 0x80 + 8008394: 0249 lsls r1, r1, #9 + 8008396: 430a orrs r2, r1 + 8008398: 65da str r2, [r3, #92] ; 0x5c __HAL_RCC_BACKUPRESET_RELEASE(); - 8008112: 4b5c ldr r3, [pc, #368] ; (8008284 ) - 8008114: 6dda ldr r2, [r3, #92] ; 0x5c - 8008116: 4b5b ldr r3, [pc, #364] ; (8008284 ) - 8008118: 495d ldr r1, [pc, #372] ; (8008290 ) - 800811a: 400a ands r2, r1 - 800811c: 65da str r2, [r3, #92] ; 0x5c + 800839a: 4b5c ldr r3, [pc, #368] ; (800850c ) + 800839c: 6dda ldr r2, [r3, #92] ; 0x5c + 800839e: 4b5b ldr r3, [pc, #364] ; (800850c ) + 80083a0: 495d ldr r1, [pc, #372] ; (8008518 ) + 80083a2: 400a ands r2, r1 + 80083a4: 65da str r2, [r3, #92] ; 0x5c /* Restore the Content of BDCR register */ RCC->BDCR = tmpregister; - 800811e: 4b59 ldr r3, [pc, #356] ; (8008284 ) - 8008120: 697a ldr r2, [r7, #20] - 8008122: 65da str r2, [r3, #92] ; 0x5c + 80083a6: 4b59 ldr r3, [pc, #356] ; (800850c ) + 80083a8: 697a ldr r2, [r7, #20] + 80083aa: 65da str r2, [r3, #92] ; 0x5c } /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ if (HAL_IS_BIT_SET(tmpregister, RCC_BDCR_LSEON)) - 8008124: 697b ldr r3, [r7, #20] - 8008126: 2201 movs r2, #1 - 8008128: 4013 ands r3, r2 - 800812a: d016 beq.n 800815a + 80083ac: 697b ldr r3, [r7, #20] + 80083ae: 2201 movs r2, #1 + 80083b0: 4013 ands r3, r2 + 80083b2: d016 beq.n 80083e2 { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 800812c: f7fd ff54 bl 8005fd8 - 8008130: 0003 movs r3, r0 - 8008132: 60fb str r3, [r7, #12] + 80083b4: f7fd ff54 bl 8006260 + 80083b8: 0003 movs r3, r0 + 80083ba: 60fb str r3, [r7, #12] /* Wait till LSE is ready */ while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8008134: e00c b.n 8008150 + 80083bc: e00c b.n 80083d8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8008136: f7fd ff4f bl 8005fd8 - 800813a: 0002 movs r2, r0 - 800813c: 68fb ldr r3, [r7, #12] - 800813e: 1ad3 subs r3, r2, r3 - 8008140: 4a54 ldr r2, [pc, #336] ; (8008294 ) - 8008142: 4293 cmp r3, r2 - 8008144: d904 bls.n 8008150 + 80083be: f7fd ff4f bl 8006260 + 80083c2: 0002 movs r2, r0 + 80083c4: 68fb ldr r3, [r7, #12] + 80083c6: 1ad3 subs r3, r2, r3 + 80083c8: 4a54 ldr r2, [pc, #336] ; (800851c ) + 80083ca: 4293 cmp r3, r2 + 80083cc: d904 bls.n 80083d8 { ret = HAL_TIMEOUT; - 8008146: 2313 movs r3, #19 - 8008148: 18fb adds r3, r7, r3 - 800814a: 2203 movs r2, #3 - 800814c: 701a strb r2, [r3, #0] + 80083ce: 2313 movs r3, #19 + 80083d0: 18fb adds r3, r7, r3 + 80083d2: 2203 movs r2, #3 + 80083d4: 701a strb r2, [r3, #0] break; - 800814e: e004 b.n 800815a + 80083d6: e004 b.n 80083e2 while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) - 8008150: 4b4c ldr r3, [pc, #304] ; (8008284 ) - 8008152: 6ddb ldr r3, [r3, #92] ; 0x5c - 8008154: 2202 movs r2, #2 - 8008156: 4013 ands r3, r2 - 8008158: d0ed beq.n 8008136 + 80083d8: 4b4c ldr r3, [pc, #304] ; (800850c ) + 80083da: 6ddb ldr r3, [r3, #92] ; 0x5c + 80083dc: 2202 movs r2, #2 + 80083de: 4013 ands r3, r2 + 80083e0: d0ed beq.n 80083be } } } if (ret == HAL_OK) - 800815a: 2313 movs r3, #19 - 800815c: 18fb adds r3, r7, r3 - 800815e: 781b ldrb r3, [r3, #0] - 8008160: 2b00 cmp r3, #0 - 8008162: d10a bne.n 800817a + 80083e2: 2313 movs r3, #19 + 80083e4: 18fb adds r3, r7, r3 + 80083e6: 781b ldrb r3, [r3, #0] + 80083e8: 2b00 cmp r3, #0 + 80083ea: d10a bne.n 8008402 { /* Apply new RTC clock source selection */ __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8008164: 4b47 ldr r3, [pc, #284] ; (8008284 ) - 8008166: 6ddb ldr r3, [r3, #92] ; 0x5c - 8008168: 4a48 ldr r2, [pc, #288] ; (800828c ) - 800816a: 4013 ands r3, r2 - 800816c: 0019 movs r1, r3 - 800816e: 687b ldr r3, [r7, #4] - 8008170: 699a ldr r2, [r3, #24] - 8008172: 4b44 ldr r3, [pc, #272] ; (8008284 ) - 8008174: 430a orrs r2, r1 - 8008176: 65da str r2, [r3, #92] ; 0x5c - 8008178: e00c b.n 8008194 + 80083ec: 4b47 ldr r3, [pc, #284] ; (800850c ) + 80083ee: 6ddb ldr r3, [r3, #92] ; 0x5c + 80083f0: 4a48 ldr r2, [pc, #288] ; (8008514 ) + 80083f2: 4013 ands r3, r2 + 80083f4: 0019 movs r1, r3 + 80083f6: 687b ldr r3, [r7, #4] + 80083f8: 699a ldr r2, [r3, #24] + 80083fa: 4b44 ldr r3, [pc, #272] ; (800850c ) + 80083fc: 430a orrs r2, r1 + 80083fe: 65da str r2, [r3, #92] ; 0x5c + 8008400: e00c b.n 800841c } else { /* set overall return value */ status = ret; - 800817a: 2312 movs r3, #18 - 800817c: 18fb adds r3, r7, r3 - 800817e: 2213 movs r2, #19 - 8008180: 18ba adds r2, r7, r2 - 8008182: 7812 ldrb r2, [r2, #0] - 8008184: 701a strb r2, [r3, #0] - 8008186: e005 b.n 8008194 + 8008402: 2312 movs r3, #18 + 8008404: 18fb adds r3, r7, r3 + 8008406: 2213 movs r2, #19 + 8008408: 18ba adds r2, r7, r2 + 800840a: 7812 ldrb r2, [r2, #0] + 800840c: 701a strb r2, [r3, #0] + 800840e: e005 b.n 800841c } } else { /* set overall return value */ status = ret; - 8008188: 2312 movs r3, #18 - 800818a: 18fb adds r3, r7, r3 - 800818c: 2213 movs r2, #19 - 800818e: 18ba adds r2, r7, r2 - 8008190: 7812 ldrb r2, [r2, #0] - 8008192: 701a strb r2, [r3, #0] + 8008410: 2312 movs r3, #18 + 8008412: 18fb adds r3, r7, r3 + 8008414: 2213 movs r2, #19 + 8008416: 18ba adds r2, r7, r2 + 8008418: 7812 ldrb r2, [r2, #0] + 800841a: 701a strb r2, [r3, #0] } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) - 8008194: 2311 movs r3, #17 - 8008196: 18fb adds r3, r7, r3 - 8008198: 781b ldrb r3, [r3, #0] - 800819a: 2b01 cmp r3, #1 - 800819c: d105 bne.n 80081aa + 800841c: 2311 movs r3, #17 + 800841e: 18fb adds r3, r7, r3 + 8008420: 781b ldrb r3, [r3, #0] + 8008422: 2b01 cmp r3, #1 + 8008424: d105 bne.n 8008432 { __HAL_RCC_PWR_CLK_DISABLE(); - 800819e: 4b39 ldr r3, [pc, #228] ; (8008284 ) - 80081a0: 6bda ldr r2, [r3, #60] ; 0x3c - 80081a2: 4b38 ldr r3, [pc, #224] ; (8008284 ) - 80081a4: 493c ldr r1, [pc, #240] ; (8008298 ) - 80081a6: 400a ands r2, r1 - 80081a8: 63da str r2, [r3, #60] ; 0x3c + 8008426: 4b39 ldr r3, [pc, #228] ; (800850c ) + 8008428: 6bda ldr r2, [r3, #60] ; 0x3c + 800842a: 4b38 ldr r3, [pc, #224] ; (800850c ) + 800842c: 493c ldr r1, [pc, #240] ; (8008520 ) + 800842e: 400a ands r2, r1 + 8008430: 63da str r2, [r3, #60] ; 0x3c } } /*-------------------------- USART1 clock source configuration -------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - 80081aa: 687b ldr r3, [r7, #4] - 80081ac: 681b ldr r3, [r3, #0] - 80081ae: 2201 movs r2, #1 - 80081b0: 4013 ands r3, r2 - 80081b2: d009 beq.n 80081c8 + 8008432: 687b ldr r3, [r7, #4] + 8008434: 681b ldr r3, [r3, #0] + 8008436: 2201 movs r2, #1 + 8008438: 4013 ands r3, r2 + 800843a: d009 beq.n 8008450 { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - 80081b4: 4b33 ldr r3, [pc, #204] ; (8008284 ) - 80081b6: 6d5b ldr r3, [r3, #84] ; 0x54 - 80081b8: 2203 movs r2, #3 - 80081ba: 4393 bics r3, r2 - 80081bc: 0019 movs r1, r3 - 80081be: 687b ldr r3, [r7, #4] - 80081c0: 685a ldr r2, [r3, #4] - 80081c2: 4b30 ldr r3, [pc, #192] ; (8008284 ) - 80081c4: 430a orrs r2, r1 - 80081c6: 655a str r2, [r3, #84] ; 0x54 + 800843c: 4b33 ldr r3, [pc, #204] ; (800850c ) + 800843e: 6d5b ldr r3, [r3, #84] ; 0x54 + 8008440: 2203 movs r2, #3 + 8008442: 4393 bics r3, r2 + 8008444: 0019 movs r1, r3 + 8008446: 687b ldr r3, [r7, #4] + 8008448: 685a ldr r2, [r3, #4] + 800844a: 4b30 ldr r3, [pc, #192] ; (800850c ) + 800844c: 430a orrs r2, r1 + 800844e: 655a str r2, [r3, #84] ; 0x54 } #if defined(RCC_CCIPR_USART2SEL) /*-------------------------- USART2 clock source configuration -------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) - 80081c8: 687b ldr r3, [r7, #4] - 80081ca: 681b ldr r3, [r3, #0] - 80081cc: 2202 movs r2, #2 - 80081ce: 4013 ands r3, r2 - 80081d0: d009 beq.n 80081e6 + 8008450: 687b ldr r3, [r7, #4] + 8008452: 681b ldr r3, [r3, #0] + 8008454: 2202 movs r2, #2 + 8008456: 4013 ands r3, r2 + 8008458: d009 beq.n 800846e { /* Check the parameters */ assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); /* Configure the USART2 clock source */ __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); - 80081d2: 4b2c ldr r3, [pc, #176] ; (8008284 ) - 80081d4: 6d5b ldr r3, [r3, #84] ; 0x54 - 80081d6: 220c movs r2, #12 - 80081d8: 4393 bics r3, r2 - 80081da: 0019 movs r1, r3 - 80081dc: 687b ldr r3, [r7, #4] - 80081de: 689a ldr r2, [r3, #8] - 80081e0: 4b28 ldr r3, [pc, #160] ; (8008284 ) - 80081e2: 430a orrs r2, r1 - 80081e4: 655a str r2, [r3, #84] ; 0x54 + 800845a: 4b2c ldr r3, [pc, #176] ; (800850c ) + 800845c: 6d5b ldr r3, [r3, #84] ; 0x54 + 800845e: 220c movs r2, #12 + 8008460: 4393 bics r3, r2 + 8008462: 0019 movs r1, r3 + 8008464: 687b ldr r3, [r7, #4] + 8008466: 689a ldr r2, [r3, #8] + 8008468: 4b28 ldr r3, [pc, #160] ; (800850c ) + 800846a: 430a orrs r2, r1 + 800846c: 655a str r2, [r3, #84] ; 0x54 __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection); } #endif /* RCC_CCIPR_LPTIM2SEL */ /*-------------------------- I2C1 clock source configuration ---------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - 80081e6: 687b ldr r3, [r7, #4] - 80081e8: 681b ldr r3, [r3, #0] - 80081ea: 2220 movs r2, #32 - 80081ec: 4013 ands r3, r2 - 80081ee: d009 beq.n 8008204 + 800846e: 687b ldr r3, [r7, #4] + 8008470: 681b ldr r3, [r3, #0] + 8008472: 2220 movs r2, #32 + 8008474: 4013 ands r3, r2 + 8008476: d009 beq.n 800848c { /* Check the parameters */ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); /* Configure the I2C1 clock source */ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - 80081f0: 4b24 ldr r3, [pc, #144] ; (8008284 ) - 80081f2: 6d5b ldr r3, [r3, #84] ; 0x54 - 80081f4: 4a29 ldr r2, [pc, #164] ; (800829c ) - 80081f6: 4013 ands r3, r2 - 80081f8: 0019 movs r1, r3 - 80081fa: 687b ldr r3, [r7, #4] - 80081fc: 68da ldr r2, [r3, #12] - 80081fe: 4b21 ldr r3, [pc, #132] ; (8008284 ) - 8008200: 430a orrs r2, r1 - 8008202: 655a str r2, [r3, #84] ; 0x54 + 8008478: 4b24 ldr r3, [pc, #144] ; (800850c ) + 800847a: 6d5b ldr r3, [r3, #84] ; 0x54 + 800847c: 4a29 ldr r2, [pc, #164] ; (8008524 ) + 800847e: 4013 ands r3, r2 + 8008480: 0019 movs r1, r3 + 8008482: 687b ldr r3, [r7, #4] + 8008484: 68da ldr r2, [r3, #12] + 8008486: 4b21 ldr r3, [pc, #132] ; (800850c ) + 8008488: 430a orrs r2, r1 + 800848a: 655a str r2, [r3, #84] ; 0x54 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLQCLK); } } #endif /* RNG */ /*-------------------------- ADC clock source configuration ----------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8008204: 687b ldr r3, [r7, #4] - 8008206: 681a ldr r2, [r3, #0] - 8008208: 2380 movs r3, #128 ; 0x80 - 800820a: 01db lsls r3, r3, #7 - 800820c: 4013 ands r3, r2 - 800820e: d015 beq.n 800823c + 800848c: 687b ldr r3, [r7, #4] + 800848e: 681a ldr r2, [r3, #0] + 8008490: 2380 movs r3, #128 ; 0x80 + 8008492: 01db lsls r3, r3, #7 + 8008494: 4013 ands r3, r2 + 8008496: d015 beq.n 80084c4 { /* Check the parameters */ assert_param(IS_RCC_ADCCLKSOURCE(PeriphClkInit->AdcClockSelection)); /* Configure the ADC interface clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 8008210: 4b1c ldr r3, [pc, #112] ; (8008284 ) - 8008212: 6d5b ldr r3, [r3, #84] ; 0x54 - 8008214: 009b lsls r3, r3, #2 - 8008216: 0899 lsrs r1, r3, #2 - 8008218: 687b ldr r3, [r7, #4] - 800821a: 695a ldr r2, [r3, #20] - 800821c: 4b19 ldr r3, [pc, #100] ; (8008284 ) - 800821e: 430a orrs r2, r1 - 8008220: 655a str r2, [r3, #84] ; 0x54 + 8008498: 4b1c ldr r3, [pc, #112] ; (800850c ) + 800849a: 6d5b ldr r3, [r3, #84] ; 0x54 + 800849c: 009b lsls r3, r3, #2 + 800849e: 0899 lsrs r1, r3, #2 + 80084a0: 687b ldr r3, [r7, #4] + 80084a2: 695a ldr r2, [r3, #20] + 80084a4: 4b19 ldr r3, [pc, #100] ; (800850c ) + 80084a6: 430a orrs r2, r1 + 80084a8: 655a str r2, [r3, #84] ; 0x54 if (PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLADC) - 8008222: 687b ldr r3, [r7, #4] - 8008224: 695a ldr r2, [r3, #20] - 8008226: 2380 movs r3, #128 ; 0x80 - 8008228: 05db lsls r3, r3, #23 - 800822a: 429a cmp r2, r3 - 800822c: d106 bne.n 800823c + 80084aa: 687b ldr r3, [r7, #4] + 80084ac: 695a ldr r2, [r3, #20] + 80084ae: 2380 movs r3, #128 ; 0x80 + 80084b0: 05db lsls r3, r3, #23 + 80084b2: 429a cmp r2, r3 + 80084b4: d106 bne.n 80084c4 { /* Enable PLLPCLK output */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLPCLK); - 800822e: 4b15 ldr r3, [pc, #84] ; (8008284 ) - 8008230: 68da ldr r2, [r3, #12] - 8008232: 4b14 ldr r3, [pc, #80] ; (8008284 ) - 8008234: 2180 movs r1, #128 ; 0x80 - 8008236: 0249 lsls r1, r1, #9 - 8008238: 430a orrs r2, r1 - 800823a: 60da str r2, [r3, #12] + 80084b6: 4b15 ldr r3, [pc, #84] ; (800850c ) + 80084b8: 68da ldr r2, [r3, #12] + 80084ba: 4b14 ldr r3, [pc, #80] ; (800850c ) + 80084bc: 2180 movs r1, #128 ; 0x80 + 80084be: 0249 lsls r1, r1, #9 + 80084c0: 430a orrs r2, r1 + 80084c2: 60da str r2, [r3, #12] } } #endif /* RCC_CCIPR_TIM15SEL */ /*-------------------------- I2S1 clock source configuration ---------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S1) == RCC_PERIPHCLK_I2S1) - 800823c: 687b ldr r3, [r7, #4] - 800823e: 681a ldr r2, [r3, #0] - 8008240: 2380 movs r3, #128 ; 0x80 - 8008242: 011b lsls r3, r3, #4 - 8008244: 4013 ands r3, r2 - 8008246: d016 beq.n 8008276 + 80084c4: 687b ldr r3, [r7, #4] + 80084c6: 681a ldr r2, [r3, #0] + 80084c8: 2380 movs r3, #128 ; 0x80 + 80084ca: 011b lsls r3, r3, #4 + 80084cc: 4013 ands r3, r2 + 80084ce: d016 beq.n 80084fe { /* Check the parameters */ assert_param(IS_RCC_I2S1CLKSOURCE(PeriphClkInit->I2s1ClockSelection)); /* Configure the I2S1 clock source */ __HAL_RCC_I2S1_CONFIG(PeriphClkInit->I2s1ClockSelection); - 8008248: 4b0e ldr r3, [pc, #56] ; (8008284 ) - 800824a: 6d5b ldr r3, [r3, #84] ; 0x54 - 800824c: 4a14 ldr r2, [pc, #80] ; (80082a0 ) - 800824e: 4013 ands r3, r2 - 8008250: 0019 movs r1, r3 - 8008252: 687b ldr r3, [r7, #4] - 8008254: 691a ldr r2, [r3, #16] - 8008256: 4b0b ldr r3, [pc, #44] ; (8008284 ) - 8008258: 430a orrs r2, r1 - 800825a: 655a str r2, [r3, #84] ; 0x54 + 80084d0: 4b0e ldr r3, [pc, #56] ; (800850c ) + 80084d2: 6d5b ldr r3, [r3, #84] ; 0x54 + 80084d4: 4a14 ldr r2, [pc, #80] ; (8008528 ) + 80084d6: 4013 ands r3, r2 + 80084d8: 0019 movs r1, r3 + 80084da: 687b ldr r3, [r7, #4] + 80084dc: 691a ldr r2, [r3, #16] + 80084de: 4b0b ldr r3, [pc, #44] ; (800850c ) + 80084e0: 430a orrs r2, r1 + 80084e2: 655a str r2, [r3, #84] ; 0x54 if (PeriphClkInit->I2s1ClockSelection == RCC_I2S1CLKSOURCE_PLL) - 800825c: 687b ldr r3, [r7, #4] - 800825e: 691a ldr r2, [r3, #16] - 8008260: 2380 movs r3, #128 ; 0x80 - 8008262: 01db lsls r3, r3, #7 - 8008264: 429a cmp r2, r3 - 8008266: d106 bne.n 8008276 + 80084e4: 687b ldr r3, [r7, #4] + 80084e6: 691a ldr r2, [r3, #16] + 80084e8: 2380 movs r3, #128 ; 0x80 + 80084ea: 01db lsls r3, r3, #7 + 80084ec: 429a cmp r2, r3 + 80084ee: d106 bne.n 80084fe { /* Enable PLLPCLK output */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLPCLK); - 8008268: 4b06 ldr r3, [pc, #24] ; (8008284 ) - 800826a: 68da ldr r2, [r3, #12] - 800826c: 4b05 ldr r3, [pc, #20] ; (8008284 ) - 800826e: 2180 movs r1, #128 ; 0x80 - 8008270: 0249 lsls r1, r1, #9 - 8008272: 430a orrs r2, r1 - 8008274: 60da str r2, [r3, #12] + 80084f0: 4b06 ldr r3, [pc, #24] ; (800850c ) + 80084f2: 68da ldr r2, [r3, #12] + 80084f4: 4b05 ldr r3, [pc, #20] ; (800850c ) + 80084f6: 2180 movs r1, #128 ; 0x80 + 80084f8: 0249 lsls r1, r1, #9 + 80084fa: 430a orrs r2, r1 + 80084fc: 60da str r2, [r3, #12] __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLQCLK); } } #endif /* FDCAN1 || FDCAN2 */ return status; - 8008276: 2312 movs r3, #18 - 8008278: 18fb adds r3, r7, r3 - 800827a: 781b ldrb r3, [r3, #0] + 80084fe: 2312 movs r3, #18 + 8008500: 18fb adds r3, r7, r3 + 8008502: 781b ldrb r3, [r3, #0] } - 800827c: 0018 movs r0, r3 - 800827e: 46bd mov sp, r7 - 8008280: b006 add sp, #24 - 8008282: bd80 pop {r7, pc} - 8008284: 40021000 .word 0x40021000 - 8008288: 40007000 .word 0x40007000 - 800828c: fffffcff .word 0xfffffcff - 8008290: fffeffff .word 0xfffeffff - 8008294: 00001388 .word 0x00001388 - 8008298: efffffff .word 0xefffffff - 800829c: ffffcfff .word 0xffffcfff - 80082a0: ffff3fff .word 0xffff3fff + 8008504: 0018 movs r0, r3 + 8008506: 46bd mov sp, r7 + 8008508: b006 add sp, #24 + 800850a: bd80 pop {r7, pc} + 800850c: 40021000 .word 0x40021000 + 8008510: 40007000 .word 0x40007000 + 8008514: fffffcff .word 0xfffffcff + 8008518: fffeffff .word 0xfffeffff + 800851c: 00001388 .word 0x00001388 + 8008520: efffffff .word 0xefffffff + 8008524: ffffcfff .word 0xffffcfff + 8008528: ffff3fff .word 0xffff3fff -080082a4 : +0800852c : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { - 80082a4: b580 push {r7, lr} - 80082a6: b084 sub sp, #16 - 80082a8: af00 add r7, sp, #0 - 80082aa: 6078 str r0, [r7, #4] + 800852c: b580 push {r7, lr} + 800852e: b084 sub sp, #16 + 8008530: af00 add r7, sp, #0 + 8008532: 6078 str r0, [r7, #4] uint32_t frxth; /* Check the SPI handle allocation */ if (hspi == NULL) - 80082ac: 687b ldr r3, [r7, #4] - 80082ae: 2b00 cmp r3, #0 - 80082b0: d101 bne.n 80082b6 + 8008534: 687b ldr r3, [r7, #4] + 8008536: 2b00 cmp r3, #0 + 8008538: d101 bne.n 800853e { return HAL_ERROR; - 80082b2: 2301 movs r3, #1 - 80082b4: e0a8 b.n 8008408 + 800853a: 2301 movs r3, #1 + 800853c: e0a8 b.n 8008690 assert_param(IS_SPI_NSS(hspi->Init.NSS)); assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode)); assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) - 80082b6: 687b ldr r3, [r7, #4] - 80082b8: 6a5b ldr r3, [r3, #36] ; 0x24 - 80082ba: 2b00 cmp r3, #0 - 80082bc: d109 bne.n 80082d2 + 800853e: 687b ldr r3, [r7, #4] + 8008540: 6a5b ldr r3, [r3, #36] ; 0x24 + 8008542: 2b00 cmp r3, #0 + 8008544: d109 bne.n 800855a { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) - 80082be: 687b ldr r3, [r7, #4] - 80082c0: 685a ldr r2, [r3, #4] - 80082c2: 2382 movs r3, #130 ; 0x82 - 80082c4: 005b lsls r3, r3, #1 - 80082c6: 429a cmp r2, r3 - 80082c8: d009 beq.n 80082de + 8008546: 687b ldr r3, [r7, #4] + 8008548: 685a ldr r2, [r3, #4] + 800854a: 2382 movs r3, #130 ; 0x82 + 800854c: 005b lsls r3, r3, #1 + 800854e: 429a cmp r2, r3 + 8008550: d009 beq.n 8008566 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - 80082ca: 687b ldr r3, [r7, #4] - 80082cc: 2200 movs r2, #0 - 80082ce: 61da str r2, [r3, #28] - 80082d0: e005 b.n 80082de + 8008552: 687b ldr r3, [r7, #4] + 8008554: 2200 movs r2, #0 + 8008556: 61da str r2, [r3, #28] + 8008558: e005 b.n 8008566 else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; - 80082d2: 687b ldr r3, [r7, #4] - 80082d4: 2200 movs r2, #0 - 80082d6: 611a str r2, [r3, #16] + 800855a: 687b ldr r3, [r7, #4] + 800855c: 2200 movs r2, #0 + 800855e: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; - 80082d8: 687b ldr r3, [r7, #4] - 80082da: 2200 movs r2, #0 - 80082dc: 615a str r2, [r3, #20] + 8008560: 687b ldr r3, [r7, #4] + 8008562: 2200 movs r2, #0 + 8008564: 615a str r2, [r3, #20] { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 80082de: 687b ldr r3, [r7, #4] - 80082e0: 2200 movs r2, #0 - 80082e2: 629a str r2, [r3, #40] ; 0x28 + 8008566: 687b ldr r3, [r7, #4] + 8008568: 2200 movs r2, #0 + 800856a: 629a str r2, [r3, #40] ; 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) - 80082e4: 687b ldr r3, [r7, #4] - 80082e6: 225d movs r2, #93 ; 0x5d - 80082e8: 5c9b ldrb r3, [r3, r2] - 80082ea: b2db uxtb r3, r3 - 80082ec: 2b00 cmp r3, #0 - 80082ee: d107 bne.n 8008300 + 800856c: 687b ldr r3, [r7, #4] + 800856e: 225d movs r2, #93 ; 0x5d + 8008570: 5c9b ldrb r3, [r3, r2] + 8008572: b2db uxtb r3, r3 + 8008574: 2b00 cmp r3, #0 + 8008576: d107 bne.n 8008588 { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; - 80082f0: 687b ldr r3, [r7, #4] - 80082f2: 225c movs r2, #92 ; 0x5c - 80082f4: 2100 movs r1, #0 - 80082f6: 5499 strb r1, [r3, r2] + 8008578: 687b ldr r3, [r7, #4] + 800857a: 225c movs r2, #92 ; 0x5c + 800857c: 2100 movs r1, #0 + 800857e: 5499 strb r1, [r3, r2] /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); - 80082f8: 687b ldr r3, [r7, #4] - 80082fa: 0018 movs r0, r3 - 80082fc: f7fb fbea bl 8003ad4 + 8008580: 687b ldr r3, [r7, #4] + 8008582: 0018 movs r0, r3 + 8008584: f7fb faaa bl 8003adc #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; - 8008300: 687b ldr r3, [r7, #4] - 8008302: 225d movs r2, #93 ; 0x5d - 8008304: 2102 movs r1, #2 - 8008306: 5499 strb r1, [r3, r2] + 8008588: 687b ldr r3, [r7, #4] + 800858a: 225d movs r2, #93 ; 0x5d + 800858c: 2102 movs r1, #2 + 800858e: 5499 strb r1, [r3, r2] /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 8008308: 687b ldr r3, [r7, #4] - 800830a: 681b ldr r3, [r3, #0] - 800830c: 681a ldr r2, [r3, #0] - 800830e: 687b ldr r3, [r7, #4] - 8008310: 681b ldr r3, [r3, #0] - 8008312: 2140 movs r1, #64 ; 0x40 - 8008314: 438a bics r2, r1 - 8008316: 601a str r2, [r3, #0] + 8008590: 687b ldr r3, [r7, #4] + 8008592: 681b ldr r3, [r3, #0] + 8008594: 681a ldr r2, [r3, #0] + 8008596: 687b ldr r3, [r7, #4] + 8008598: 681b ldr r3, [r3, #0] + 800859a: 2140 movs r1, #64 ; 0x40 + 800859c: 438a bics r2, r1 + 800859e: 601a str r2, [r3, #0] /* Align by default the rs fifo threshold on the data size */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) - 8008318: 687b ldr r3, [r7, #4] - 800831a: 68da ldr r2, [r3, #12] - 800831c: 23e0 movs r3, #224 ; 0xe0 - 800831e: 00db lsls r3, r3, #3 - 8008320: 429a cmp r2, r3 - 8008322: d902 bls.n 800832a + 80085a0: 687b ldr r3, [r7, #4] + 80085a2: 68da ldr r2, [r3, #12] + 80085a4: 23e0 movs r3, #224 ; 0xe0 + 80085a6: 00db lsls r3, r3, #3 + 80085a8: 429a cmp r2, r3 + 80085aa: d902 bls.n 80085b2 { frxth = SPI_RXFIFO_THRESHOLD_HF; - 8008324: 2300 movs r3, #0 - 8008326: 60fb str r3, [r7, #12] - 8008328: e002 b.n 8008330 + 80085ac: 2300 movs r3, #0 + 80085ae: 60fb str r3, [r7, #12] + 80085b0: e002 b.n 80085b8 } else { frxth = SPI_RXFIFO_THRESHOLD_QF; - 800832a: 2380 movs r3, #128 ; 0x80 - 800832c: 015b lsls r3, r3, #5 - 800832e: 60fb str r3, [r7, #12] + 80085b2: 2380 movs r3, #128 ; 0x80 + 80085b4: 015b lsls r3, r3, #5 + 80085b6: 60fb str r3, [r7, #12] } /* CRC calculation is valid only for 16Bit and 8 Bit */ if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT)) - 8008330: 687b ldr r3, [r7, #4] - 8008332: 68da ldr r2, [r3, #12] - 8008334: 23f0 movs r3, #240 ; 0xf0 - 8008336: 011b lsls r3, r3, #4 - 8008338: 429a cmp r2, r3 - 800833a: d008 beq.n 800834e - 800833c: 687b ldr r3, [r7, #4] - 800833e: 68da ldr r2, [r3, #12] - 8008340: 23e0 movs r3, #224 ; 0xe0 - 8008342: 00db lsls r3, r3, #3 - 8008344: 429a cmp r2, r3 - 8008346: d002 beq.n 800834e + 80085b8: 687b ldr r3, [r7, #4] + 80085ba: 68da ldr r2, [r3, #12] + 80085bc: 23f0 movs r3, #240 ; 0xf0 + 80085be: 011b lsls r3, r3, #4 + 80085c0: 429a cmp r2, r3 + 80085c2: d008 beq.n 80085d6 + 80085c4: 687b ldr r3, [r7, #4] + 80085c6: 68da ldr r2, [r3, #12] + 80085c8: 23e0 movs r3, #224 ; 0xe0 + 80085ca: 00db lsls r3, r3, #3 + 80085cc: 429a cmp r2, r3 + 80085ce: d002 beq.n 80085d6 { /* CRC must be disabled */ hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 8008348: 687b ldr r3, [r7, #4] - 800834a: 2200 movs r2, #0 - 800834c: 629a str r2, [r3, #40] ; 0x28 + 80085d0: 687b ldr r3, [r7, #4] + 80085d2: 2200 movs r2, #0 + 80085d4: 629a str r2, [r3, #40] ; 0x28 } /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | - 800834e: 687b ldr r3, [r7, #4] - 8008350: 685a ldr r2, [r3, #4] - 8008352: 2382 movs r3, #130 ; 0x82 - 8008354: 005b lsls r3, r3, #1 - 8008356: 401a ands r2, r3 - 8008358: 687b ldr r3, [r7, #4] - 800835a: 6899 ldr r1, [r3, #8] - 800835c: 2384 movs r3, #132 ; 0x84 - 800835e: 021b lsls r3, r3, #8 - 8008360: 400b ands r3, r1 - 8008362: 431a orrs r2, r3 - 8008364: 687b ldr r3, [r7, #4] - 8008366: 691b ldr r3, [r3, #16] - 8008368: 2102 movs r1, #2 - 800836a: 400b ands r3, r1 - 800836c: 431a orrs r2, r3 - 800836e: 687b ldr r3, [r7, #4] - 8008370: 695b ldr r3, [r3, #20] - 8008372: 2101 movs r1, #1 - 8008374: 400b ands r3, r1 - 8008376: 431a orrs r2, r3 - 8008378: 687b ldr r3, [r7, #4] - 800837a: 6999 ldr r1, [r3, #24] - 800837c: 2380 movs r3, #128 ; 0x80 - 800837e: 009b lsls r3, r3, #2 - 8008380: 400b ands r3, r1 - 8008382: 431a orrs r2, r3 - 8008384: 687b ldr r3, [r7, #4] - 8008386: 69db ldr r3, [r3, #28] - 8008388: 2138 movs r1, #56 ; 0x38 - 800838a: 400b ands r3, r1 - 800838c: 431a orrs r2, r3 - 800838e: 687b ldr r3, [r7, #4] - 8008390: 6a1b ldr r3, [r3, #32] - 8008392: 2180 movs r1, #128 ; 0x80 - 8008394: 400b ands r3, r1 - 8008396: 431a orrs r2, r3 - 8008398: 0011 movs r1, r2 - 800839a: 687b ldr r3, [r7, #4] - 800839c: 6a9a ldr r2, [r3, #40] ; 0x28 - 800839e: 2380 movs r3, #128 ; 0x80 - 80083a0: 019b lsls r3, r3, #6 - 80083a2: 401a ands r2, r3 - 80083a4: 687b ldr r3, [r7, #4] - 80083a6: 681b ldr r3, [r3, #0] - 80083a8: 430a orrs r2, r1 - 80083aa: 601a str r2, [r3, #0] + 80085d6: 687b ldr r3, [r7, #4] + 80085d8: 685a ldr r2, [r3, #4] + 80085da: 2382 movs r3, #130 ; 0x82 + 80085dc: 005b lsls r3, r3, #1 + 80085de: 401a ands r2, r3 + 80085e0: 687b ldr r3, [r7, #4] + 80085e2: 6899 ldr r1, [r3, #8] + 80085e4: 2384 movs r3, #132 ; 0x84 + 80085e6: 021b lsls r3, r3, #8 + 80085e8: 400b ands r3, r1 + 80085ea: 431a orrs r2, r3 + 80085ec: 687b ldr r3, [r7, #4] + 80085ee: 691b ldr r3, [r3, #16] + 80085f0: 2102 movs r1, #2 + 80085f2: 400b ands r3, r1 + 80085f4: 431a orrs r2, r3 + 80085f6: 687b ldr r3, [r7, #4] + 80085f8: 695b ldr r3, [r3, #20] + 80085fa: 2101 movs r1, #1 + 80085fc: 400b ands r3, r1 + 80085fe: 431a orrs r2, r3 + 8008600: 687b ldr r3, [r7, #4] + 8008602: 6999 ldr r1, [r3, #24] + 8008604: 2380 movs r3, #128 ; 0x80 + 8008606: 009b lsls r3, r3, #2 + 8008608: 400b ands r3, r1 + 800860a: 431a orrs r2, r3 + 800860c: 687b ldr r3, [r7, #4] + 800860e: 69db ldr r3, [r3, #28] + 8008610: 2138 movs r1, #56 ; 0x38 + 8008612: 400b ands r3, r1 + 8008614: 431a orrs r2, r3 + 8008616: 687b ldr r3, [r7, #4] + 8008618: 6a1b ldr r3, [r3, #32] + 800861a: 2180 movs r1, #128 ; 0x80 + 800861c: 400b ands r3, r1 + 800861e: 431a orrs r2, r3 + 8008620: 0011 movs r1, r2 + 8008622: 687b ldr r3, [r7, #4] + 8008624: 6a9a ldr r2, [r3, #40] ; 0x28 + 8008626: 2380 movs r3, #128 ; 0x80 + 8008628: 019b lsls r3, r3, #6 + 800862a: 401a ands r2, r3 + 800862c: 687b ldr r3, [r7, #4] + 800862e: 681b ldr r3, [r3, #0] + 8008630: 430a orrs r2, r1 + 8008632: 601a str r2, [r3, #0] } } #endif /* USE_SPI_CRC */ /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo threshold */ WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | - 80083ac: 687b ldr r3, [r7, #4] - 80083ae: 699b ldr r3, [r3, #24] - 80083b0: 0c1b lsrs r3, r3, #16 - 80083b2: 2204 movs r2, #4 - 80083b4: 401a ands r2, r3 - 80083b6: 687b ldr r3, [r7, #4] - 80083b8: 6a5b ldr r3, [r3, #36] ; 0x24 - 80083ba: 2110 movs r1, #16 - 80083bc: 400b ands r3, r1 - 80083be: 431a orrs r2, r3 - 80083c0: 687b ldr r3, [r7, #4] - 80083c2: 6b5b ldr r3, [r3, #52] ; 0x34 - 80083c4: 2108 movs r1, #8 - 80083c6: 400b ands r3, r1 - 80083c8: 431a orrs r2, r3 - 80083ca: 687b ldr r3, [r7, #4] - 80083cc: 68d9 ldr r1, [r3, #12] - 80083ce: 23f0 movs r3, #240 ; 0xf0 - 80083d0: 011b lsls r3, r3, #4 - 80083d2: 400b ands r3, r1 - 80083d4: 431a orrs r2, r3 - 80083d6: 0011 movs r1, r2 - 80083d8: 68fa ldr r2, [r7, #12] - 80083da: 2380 movs r3, #128 ; 0x80 - 80083dc: 015b lsls r3, r3, #5 - 80083de: 401a ands r2, r3 - 80083e0: 687b ldr r3, [r7, #4] - 80083e2: 681b ldr r3, [r3, #0] - 80083e4: 430a orrs r2, r1 - 80083e6: 605a str r2, [r3, #4] + 8008634: 687b ldr r3, [r7, #4] + 8008636: 699b ldr r3, [r3, #24] + 8008638: 0c1b lsrs r3, r3, #16 + 800863a: 2204 movs r2, #4 + 800863c: 401a ands r2, r3 + 800863e: 687b ldr r3, [r7, #4] + 8008640: 6a5b ldr r3, [r3, #36] ; 0x24 + 8008642: 2110 movs r1, #16 + 8008644: 400b ands r3, r1 + 8008646: 431a orrs r2, r3 + 8008648: 687b ldr r3, [r7, #4] + 800864a: 6b5b ldr r3, [r3, #52] ; 0x34 + 800864c: 2108 movs r1, #8 + 800864e: 400b ands r3, r1 + 8008650: 431a orrs r2, r3 + 8008652: 687b ldr r3, [r7, #4] + 8008654: 68d9 ldr r1, [r3, #12] + 8008656: 23f0 movs r3, #240 ; 0xf0 + 8008658: 011b lsls r3, r3, #4 + 800865a: 400b ands r3, r1 + 800865c: 431a orrs r2, r3 + 800865e: 0011 movs r1, r2 + 8008660: 68fa ldr r2, [r7, #12] + 8008662: 2380 movs r3, #128 ; 0x80 + 8008664: 015b lsls r3, r3, #5 + 8008666: 401a ands r2, r3 + 8008668: 687b ldr r3, [r7, #4] + 800866a: 681b ldr r3, [r3, #0] + 800866c: 430a orrs r2, r1 + 800866e: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); - 80083e8: 687b ldr r3, [r7, #4] - 80083ea: 681b ldr r3, [r3, #0] - 80083ec: 69da ldr r2, [r3, #28] - 80083ee: 687b ldr r3, [r7, #4] - 80083f0: 681b ldr r3, [r3, #0] - 80083f2: 4907 ldr r1, [pc, #28] ; (8008410 ) - 80083f4: 400a ands r2, r1 - 80083f6: 61da str r2, [r3, #28] + 8008670: 687b ldr r3, [r7, #4] + 8008672: 681b ldr r3, [r3, #0] + 8008674: 69da ldr r2, [r3, #28] + 8008676: 687b ldr r3, [r7, #4] + 8008678: 681b ldr r3, [r3, #0] + 800867a: 4907 ldr r1, [pc, #28] ; (8008698 ) + 800867c: 400a ands r2, r1 + 800867e: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 80083f8: 687b ldr r3, [r7, #4] - 80083fa: 2200 movs r2, #0 - 80083fc: 661a str r2, [r3, #96] ; 0x60 + 8008680: 687b ldr r3, [r7, #4] + 8008682: 2200 movs r2, #0 + 8008684: 661a str r2, [r3, #96] ; 0x60 hspi->State = HAL_SPI_STATE_READY; - 80083fe: 687b ldr r3, [r7, #4] - 8008400: 225d movs r2, #93 ; 0x5d - 8008402: 2101 movs r1, #1 - 8008404: 5499 strb r1, [r3, r2] + 8008686: 687b ldr r3, [r7, #4] + 8008688: 225d movs r2, #93 ; 0x5d + 800868a: 2101 movs r1, #1 + 800868c: 5499 strb r1, [r3, r2] return HAL_OK; - 8008406: 2300 movs r3, #0 + 800868e: 2300 movs r3, #0 } - 8008408: 0018 movs r0, r3 - 800840a: 46bd mov sp, r7 - 800840c: b004 add sp, #16 - 800840e: bd80 pop {r7, pc} - 8008410: fffff7ff .word 0xfffff7ff + 8008690: 0018 movs r0, r3 + 8008692: 46bd mov sp, r7 + 8008694: b004 add sp, #16 + 8008696: bd80 pop {r7, pc} + 8008698: fffff7ff .word 0xfffff7ff -08008414 : +0800869c : * @param Size amount of data to be received * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8008414: b590 push {r4, r7, lr} - 8008416: b089 sub sp, #36 ; 0x24 - 8008418: af02 add r7, sp, #8 - 800841a: 60f8 str r0, [r7, #12] - 800841c: 60b9 str r1, [r7, #8] - 800841e: 603b str r3, [r7, #0] - 8008420: 1dbb adds r3, r7, #6 - 8008422: 801a strh r2, [r3, #0] + 800869c: b590 push {r4, r7, lr} + 800869e: b089 sub sp, #36 ; 0x24 + 80086a0: af02 add r7, sp, #8 + 80086a2: 60f8 str r0, [r7, #12] + 80086a4: 60b9 str r1, [r7, #8] + 80086a6: 603b str r3, [r7, #0] + 80086a8: 1dbb adds r3, r7, #6 + 80086aa: 801a strh r2, [r3, #0] __IO uint32_t tmpreg = 0U; __IO uint8_t *ptmpreg8; __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ uint32_t tickstart; HAL_StatusTypeDef errorcode = HAL_OK; - 8008424: 2317 movs r3, #23 - 8008426: 18fb adds r3, r7, r3 - 8008428: 2200 movs r2, #0 - 800842a: 701a strb r2, [r3, #0] + 80086ac: 2317 movs r3, #23 + 80086ae: 18fb adds r3, r7, r3 + 80086b0: 2200 movs r2, #0 + 80086b2: 701a strb r2, [r3, #0] if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) - 800842c: 68fb ldr r3, [r7, #12] - 800842e: 685a ldr r2, [r3, #4] - 8008430: 2382 movs r3, #130 ; 0x82 - 8008432: 005b lsls r3, r3, #1 - 8008434: 429a cmp r2, r3 - 8008436: d113 bne.n 8008460 - 8008438: 68fb ldr r3, [r7, #12] - 800843a: 689b ldr r3, [r3, #8] - 800843c: 2b00 cmp r3, #0 - 800843e: d10f bne.n 8008460 + 80086b4: 68fb ldr r3, [r7, #12] + 80086b6: 685a ldr r2, [r3, #4] + 80086b8: 2382 movs r3, #130 ; 0x82 + 80086ba: 005b lsls r3, r3, #1 + 80086bc: 429a cmp r2, r3 + 80086be: d113 bne.n 80086e8 + 80086c0: 68fb ldr r3, [r7, #12] + 80086c2: 689b ldr r3, [r3, #8] + 80086c4: 2b00 cmp r3, #0 + 80086c6: d10f bne.n 80086e8 { hspi->State = HAL_SPI_STATE_BUSY_RX; - 8008440: 68fb ldr r3, [r7, #12] - 8008442: 225d movs r2, #93 ; 0x5d - 8008444: 2104 movs r1, #4 - 8008446: 5499 strb r1, [r3, r2] + 80086c8: 68fb ldr r3, [r7, #12] + 80086ca: 225d movs r2, #93 ; 0x5d + 80086cc: 2104 movs r1, #4 + 80086ce: 5499 strb r1, [r3, r2] /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); - 8008448: 1dbb adds r3, r7, #6 - 800844a: 881c ldrh r4, [r3, #0] - 800844c: 68ba ldr r2, [r7, #8] - 800844e: 68b9 ldr r1, [r7, #8] - 8008450: 68f8 ldr r0, [r7, #12] - 8008452: 683b ldr r3, [r7, #0] - 8008454: 9300 str r3, [sp, #0] - 8008456: 0023 movs r3, r4 - 8008458: f000 f928 bl 80086ac - 800845c: 0003 movs r3, r0 - 800845e: e11c b.n 800869a + 80086d0: 1dbb adds r3, r7, #6 + 80086d2: 881c ldrh r4, [r3, #0] + 80086d4: 68ba ldr r2, [r7, #8] + 80086d6: 68b9 ldr r1, [r7, #8] + 80086d8: 68f8 ldr r0, [r7, #12] + 80086da: 683b ldr r3, [r7, #0] + 80086dc: 9300 str r3, [sp, #0] + 80086de: 0023 movs r3, r4 + 80086e0: f000 f928 bl 8008934 + 80086e4: 0003 movs r3, r0 + 80086e6: e11c b.n 8008922 } /* Process Locked */ __HAL_LOCK(hspi); - 8008460: 68fb ldr r3, [r7, #12] - 8008462: 225c movs r2, #92 ; 0x5c - 8008464: 5c9b ldrb r3, [r3, r2] - 8008466: 2b01 cmp r3, #1 - 8008468: d101 bne.n 800846e - 800846a: 2302 movs r3, #2 - 800846c: e115 b.n 800869a - 800846e: 68fb ldr r3, [r7, #12] - 8008470: 225c movs r2, #92 ; 0x5c - 8008472: 2101 movs r1, #1 - 8008474: 5499 strb r1, [r3, r2] + 80086e8: 68fb ldr r3, [r7, #12] + 80086ea: 225c movs r2, #92 ; 0x5c + 80086ec: 5c9b ldrb r3, [r3, r2] + 80086ee: 2b01 cmp r3, #1 + 80086f0: d101 bne.n 80086f6 + 80086f2: 2302 movs r3, #2 + 80086f4: e115 b.n 8008922 + 80086f6: 68fb ldr r3, [r7, #12] + 80086f8: 225c movs r2, #92 ; 0x5c + 80086fa: 2101 movs r1, #1 + 80086fc: 5499 strb r1, [r3, r2] /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - 8008476: f7fd fdaf bl 8005fd8 - 800847a: 0003 movs r3, r0 - 800847c: 613b str r3, [r7, #16] + 80086fe: f7fd fdaf bl 8006260 + 8008702: 0003 movs r3, r0 + 8008704: 613b str r3, [r7, #16] if (hspi->State != HAL_SPI_STATE_READY) - 800847e: 68fb ldr r3, [r7, #12] - 8008480: 225d movs r2, #93 ; 0x5d - 8008482: 5c9b ldrb r3, [r3, r2] - 8008484: b2db uxtb r3, r3 - 8008486: 2b01 cmp r3, #1 - 8008488: d004 beq.n 8008494 + 8008706: 68fb ldr r3, [r7, #12] + 8008708: 225d movs r2, #93 ; 0x5d + 800870a: 5c9b ldrb r3, [r3, r2] + 800870c: b2db uxtb r3, r3 + 800870e: 2b01 cmp r3, #1 + 8008710: d004 beq.n 800871c { errorcode = HAL_BUSY; - 800848a: 2317 movs r3, #23 - 800848c: 18fb adds r3, r7, r3 - 800848e: 2202 movs r2, #2 - 8008490: 701a strb r2, [r3, #0] + 8008712: 2317 movs r3, #23 + 8008714: 18fb adds r3, r7, r3 + 8008716: 2202 movs r2, #2 + 8008718: 701a strb r2, [r3, #0] goto error; - 8008492: e0f7 b.n 8008684 + 800871a: e0f7 b.n 800890c } if ((pData == NULL) || (Size == 0U)) - 8008494: 68bb ldr r3, [r7, #8] - 8008496: 2b00 cmp r3, #0 - 8008498: d003 beq.n 80084a2 - 800849a: 1dbb adds r3, r7, #6 - 800849c: 881b ldrh r3, [r3, #0] - 800849e: 2b00 cmp r3, #0 - 80084a0: d104 bne.n 80084ac + 800871c: 68bb ldr r3, [r7, #8] + 800871e: 2b00 cmp r3, #0 + 8008720: d003 beq.n 800872a + 8008722: 1dbb adds r3, r7, #6 + 8008724: 881b ldrh r3, [r3, #0] + 8008726: 2b00 cmp r3, #0 + 8008728: d104 bne.n 8008734 { errorcode = HAL_ERROR; - 80084a2: 2317 movs r3, #23 - 80084a4: 18fb adds r3, r7, r3 - 80084a6: 2201 movs r2, #1 - 80084a8: 701a strb r2, [r3, #0] + 800872a: 2317 movs r3, #23 + 800872c: 18fb adds r3, r7, r3 + 800872e: 2201 movs r2, #1 + 8008730: 701a strb r2, [r3, #0] goto error; - 80084aa: e0eb b.n 8008684 + 8008732: e0eb b.n 800890c } /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; - 80084ac: 68fb ldr r3, [r7, #12] - 80084ae: 225d movs r2, #93 ; 0x5d - 80084b0: 2104 movs r1, #4 - 80084b2: 5499 strb r1, [r3, r2] + 8008734: 68fb ldr r3, [r7, #12] + 8008736: 225d movs r2, #93 ; 0x5d + 8008738: 2104 movs r1, #4 + 800873a: 5499 strb r1, [r3, r2] hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 80084b4: 68fb ldr r3, [r7, #12] - 80084b6: 2200 movs r2, #0 - 80084b8: 661a str r2, [r3, #96] ; 0x60 + 800873c: 68fb ldr r3, [r7, #12] + 800873e: 2200 movs r2, #0 + 8008740: 661a str r2, [r3, #96] ; 0x60 hspi->pRxBuffPtr = (uint8_t *)pData; - 80084ba: 68fb ldr r3, [r7, #12] - 80084bc: 68ba ldr r2, [r7, #8] - 80084be: 641a str r2, [r3, #64] ; 0x40 + 8008742: 68fb ldr r3, [r7, #12] + 8008744: 68ba ldr r2, [r7, #8] + 8008746: 641a str r2, [r3, #64] ; 0x40 hspi->RxXferSize = Size; - 80084c0: 68fb ldr r3, [r7, #12] - 80084c2: 1dba adds r2, r7, #6 - 80084c4: 2144 movs r1, #68 ; 0x44 - 80084c6: 8812 ldrh r2, [r2, #0] - 80084c8: 525a strh r2, [r3, r1] + 8008748: 68fb ldr r3, [r7, #12] + 800874a: 1dba adds r2, r7, #6 + 800874c: 2144 movs r1, #68 ; 0x44 + 800874e: 8812 ldrh r2, [r2, #0] + 8008750: 525a strh r2, [r3, r1] hspi->RxXferCount = Size; - 80084ca: 68fb ldr r3, [r7, #12] - 80084cc: 1dba adds r2, r7, #6 - 80084ce: 2146 movs r1, #70 ; 0x46 - 80084d0: 8812 ldrh r2, [r2, #0] - 80084d2: 525a strh r2, [r3, r1] + 8008752: 68fb ldr r3, [r7, #12] + 8008754: 1dba adds r2, r7, #6 + 8008756: 2146 movs r1, #70 ; 0x46 + 8008758: 8812 ldrh r2, [r2, #0] + 800875a: 525a strh r2, [r3, r1] /*Init field not used in handle to zero */ hspi->pTxBuffPtr = (uint8_t *)NULL; - 80084d4: 68fb ldr r3, [r7, #12] - 80084d6: 2200 movs r2, #0 - 80084d8: 639a str r2, [r3, #56] ; 0x38 + 800875c: 68fb ldr r3, [r7, #12] + 800875e: 2200 movs r2, #0 + 8008760: 639a str r2, [r3, #56] ; 0x38 hspi->TxXferSize = 0U; - 80084da: 68fb ldr r3, [r7, #12] - 80084dc: 2200 movs r2, #0 - 80084de: 879a strh r2, [r3, #60] ; 0x3c + 8008762: 68fb ldr r3, [r7, #12] + 8008764: 2200 movs r2, #0 + 8008766: 879a strh r2, [r3, #60] ; 0x3c hspi->TxXferCount = 0U; - 80084e0: 68fb ldr r3, [r7, #12] - 80084e2: 2200 movs r2, #0 - 80084e4: 87da strh r2, [r3, #62] ; 0x3e + 8008768: 68fb ldr r3, [r7, #12] + 800876a: 2200 movs r2, #0 + 800876c: 87da strh r2, [r3, #62] ; 0x3e hspi->RxISR = NULL; - 80084e6: 68fb ldr r3, [r7, #12] - 80084e8: 2200 movs r2, #0 - 80084ea: 64da str r2, [r3, #76] ; 0x4c + 800876e: 68fb ldr r3, [r7, #12] + 8008770: 2200 movs r2, #0 + 8008772: 64da str r2, [r3, #76] ; 0x4c hspi->TxISR = NULL; - 80084ec: 68fb ldr r3, [r7, #12] - 80084ee: 2200 movs r2, #0 - 80084f0: 651a str r2, [r3, #80] ; 0x50 + 8008774: 68fb ldr r3, [r7, #12] + 8008776: 2200 movs r2, #0 + 8008778: 651a str r2, [r3, #80] ; 0x50 hspi->RxXferCount--; } #endif /* USE_SPI_CRC */ /* Set the Rx Fifo threshold */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) - 80084f2: 68fb ldr r3, [r7, #12] - 80084f4: 68da ldr r2, [r3, #12] - 80084f6: 23e0 movs r3, #224 ; 0xe0 - 80084f8: 00db lsls r3, r3, #3 - 80084fa: 429a cmp r2, r3 - 80084fc: d908 bls.n 8008510 + 800877a: 68fb ldr r3, [r7, #12] + 800877c: 68da ldr r2, [r3, #12] + 800877e: 23e0 movs r3, #224 ; 0xe0 + 8008780: 00db lsls r3, r3, #3 + 8008782: 429a cmp r2, r3 + 8008784: d908 bls.n 8008798 { /* Set RX Fifo threshold according the reception data length: 16bit */ CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); - 80084fe: 68fb ldr r3, [r7, #12] - 8008500: 681b ldr r3, [r3, #0] - 8008502: 685a ldr r2, [r3, #4] - 8008504: 68fb ldr r3, [r7, #12] - 8008506: 681b ldr r3, [r3, #0] - 8008508: 4966 ldr r1, [pc, #408] ; (80086a4 ) - 800850a: 400a ands r2, r1 - 800850c: 605a str r2, [r3, #4] - 800850e: e008 b.n 8008522 + 8008786: 68fb ldr r3, [r7, #12] + 8008788: 681b ldr r3, [r3, #0] + 800878a: 685a ldr r2, [r3, #4] + 800878c: 68fb ldr r3, [r7, #12] + 800878e: 681b ldr r3, [r3, #0] + 8008790: 4966 ldr r1, [pc, #408] ; (800892c ) + 8008792: 400a ands r2, r1 + 8008794: 605a str r2, [r3, #4] + 8008796: e008 b.n 80087aa } else { /* Set RX Fifo threshold according the reception data length: 8bit */ SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); - 8008510: 68fb ldr r3, [r7, #12] - 8008512: 681b ldr r3, [r3, #0] - 8008514: 685a ldr r2, [r3, #4] - 8008516: 68fb ldr r3, [r7, #12] - 8008518: 681b ldr r3, [r3, #0] - 800851a: 2180 movs r1, #128 ; 0x80 - 800851c: 0149 lsls r1, r1, #5 - 800851e: 430a orrs r2, r1 - 8008520: 605a str r2, [r3, #4] + 8008798: 68fb ldr r3, [r7, #12] + 800879a: 681b ldr r3, [r3, #0] + 800879c: 685a ldr r2, [r3, #4] + 800879e: 68fb ldr r3, [r7, #12] + 80087a0: 681b ldr r3, [r3, #0] + 80087a2: 2180 movs r1, #128 ; 0x80 + 80087a4: 0149 lsls r1, r1, #5 + 80087a6: 430a orrs r2, r1 + 80087a8: 605a str r2, [r3, #4] } /* Configure communication direction: 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - 8008522: 68fb ldr r3, [r7, #12] - 8008524: 689a ldr r2, [r3, #8] - 8008526: 2380 movs r3, #128 ; 0x80 - 8008528: 021b lsls r3, r3, #8 - 800852a: 429a cmp r2, r3 - 800852c: d10f bne.n 800854e + 80087aa: 68fb ldr r3, [r7, #12] + 80087ac: 689a ldr r2, [r3, #8] + 80087ae: 2380 movs r3, #128 ; 0x80 + 80087b0: 021b lsls r3, r3, #8 + 80087b2: 429a cmp r2, r3 + 80087b4: d10f bne.n 80087d6 { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); - 800852e: 68fb ldr r3, [r7, #12] - 8008530: 681b ldr r3, [r3, #0] - 8008532: 681a ldr r2, [r3, #0] - 8008534: 68fb ldr r3, [r7, #12] - 8008536: 681b ldr r3, [r3, #0] - 8008538: 2140 movs r1, #64 ; 0x40 - 800853a: 438a bics r2, r1 - 800853c: 601a str r2, [r3, #0] + 80087b6: 68fb ldr r3, [r7, #12] + 80087b8: 681b ldr r3, [r3, #0] + 80087ba: 681a ldr r2, [r3, #0] + 80087bc: 68fb ldr r3, [r7, #12] + 80087be: 681b ldr r3, [r3, #0] + 80087c0: 2140 movs r1, #64 ; 0x40 + 80087c2: 438a bics r2, r1 + 80087c4: 601a str r2, [r3, #0] SPI_1LINE_RX(hspi); - 800853e: 68fb ldr r3, [r7, #12] - 8008540: 681b ldr r3, [r3, #0] - 8008542: 681a ldr r2, [r3, #0] - 8008544: 68fb ldr r3, [r7, #12] - 8008546: 681b ldr r3, [r3, #0] - 8008548: 4957 ldr r1, [pc, #348] ; (80086a8 ) - 800854a: 400a ands r2, r1 - 800854c: 601a str r2, [r3, #0] + 80087c6: 68fb ldr r3, [r7, #12] + 80087c8: 681b ldr r3, [r3, #0] + 80087ca: 681a ldr r2, [r3, #0] + 80087cc: 68fb ldr r3, [r7, #12] + 80087ce: 681b ldr r3, [r3, #0] + 80087d0: 4957 ldr r1, [pc, #348] ; (8008930 ) + 80087d2: 400a ands r2, r1 + 80087d4: 601a str r2, [r3, #0] } /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - 800854e: 68fb ldr r3, [r7, #12] - 8008550: 681b ldr r3, [r3, #0] - 8008552: 681b ldr r3, [r3, #0] - 8008554: 2240 movs r2, #64 ; 0x40 - 8008556: 4013 ands r3, r2 - 8008558: 2b40 cmp r3, #64 ; 0x40 - 800855a: d007 beq.n 800856c + 80087d6: 68fb ldr r3, [r7, #12] + 80087d8: 681b ldr r3, [r3, #0] + 80087da: 681b ldr r3, [r3, #0] + 80087dc: 2240 movs r2, #64 ; 0x40 + 80087de: 4013 ands r3, r2 + 80087e0: 2b40 cmp r3, #64 ; 0x40 + 80087e2: d007 beq.n 80087f4 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); - 800855c: 68fb ldr r3, [r7, #12] - 800855e: 681b ldr r3, [r3, #0] - 8008560: 681a ldr r2, [r3, #0] - 8008562: 68fb ldr r3, [r7, #12] - 8008564: 681b ldr r3, [r3, #0] - 8008566: 2140 movs r1, #64 ; 0x40 - 8008568: 430a orrs r2, r1 - 800856a: 601a str r2, [r3, #0] + 80087e4: 68fb ldr r3, [r7, #12] + 80087e6: 681b ldr r3, [r3, #0] + 80087e8: 681a ldr r2, [r3, #0] + 80087ea: 68fb ldr r3, [r7, #12] + 80087ec: 681b ldr r3, [r3, #0] + 80087ee: 2140 movs r1, #64 ; 0x40 + 80087f0: 430a orrs r2, r1 + 80087f2: 601a str r2, [r3, #0] } /* Receive data in 8 Bit mode */ if (hspi->Init.DataSize <= SPI_DATASIZE_8BIT) - 800856c: 68fb ldr r3, [r7, #12] - 800856e: 68da ldr r2, [r3, #12] - 8008570: 23e0 movs r3, #224 ; 0xe0 - 8008572: 00db lsls r3, r3, #3 - 8008574: 429a cmp r2, r3 - 8008576: d900 bls.n 800857a - 8008578: e069 b.n 800864e + 80087f4: 68fb ldr r3, [r7, #12] + 80087f6: 68da ldr r2, [r3, #12] + 80087f8: 23e0 movs r3, #224 ; 0xe0 + 80087fa: 00db lsls r3, r3, #3 + 80087fc: 429a cmp r2, r3 + 80087fe: d900 bls.n 8008802 + 8008800: e069 b.n 80088d6 { /* Transfer loop */ while (hspi->RxXferCount > 0U) - 800857a: e031 b.n 80085e0 + 8008802: e031 b.n 8008868 { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) - 800857c: 68fb ldr r3, [r7, #12] - 800857e: 681b ldr r3, [r3, #0] - 8008580: 689b ldr r3, [r3, #8] - 8008582: 2201 movs r2, #1 - 8008584: 4013 ands r3, r2 - 8008586: 2b01 cmp r3, #1 - 8008588: d117 bne.n 80085ba + 8008804: 68fb ldr r3, [r7, #12] + 8008806: 681b ldr r3, [r3, #0] + 8008808: 689b ldr r3, [r3, #8] + 800880a: 2201 movs r2, #1 + 800880c: 4013 ands r3, r2 + 800880e: 2b01 cmp r3, #1 + 8008810: d117 bne.n 8008842 { /* read the received data */ (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; - 800858a: 68fb ldr r3, [r7, #12] - 800858c: 681b ldr r3, [r3, #0] - 800858e: 330c adds r3, #12 - 8008590: 001a movs r2, r3 - 8008592: 68fb ldr r3, [r7, #12] - 8008594: 6c1b ldr r3, [r3, #64] ; 0x40 - 8008596: 7812 ldrb r2, [r2, #0] - 8008598: b2d2 uxtb r2, r2 - 800859a: 701a strb r2, [r3, #0] + 8008812: 68fb ldr r3, [r7, #12] + 8008814: 681b ldr r3, [r3, #0] + 8008816: 330c adds r3, #12 + 8008818: 001a movs r2, r3 + 800881a: 68fb ldr r3, [r7, #12] + 800881c: 6c1b ldr r3, [r3, #64] ; 0x40 + 800881e: 7812 ldrb r2, [r2, #0] + 8008820: b2d2 uxtb r2, r2 + 8008822: 701a strb r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint8_t); - 800859c: 68fb ldr r3, [r7, #12] - 800859e: 6c1b ldr r3, [r3, #64] ; 0x40 - 80085a0: 1c5a adds r2, r3, #1 - 80085a2: 68fb ldr r3, [r7, #12] - 80085a4: 641a str r2, [r3, #64] ; 0x40 + 8008824: 68fb ldr r3, [r7, #12] + 8008826: 6c1b ldr r3, [r3, #64] ; 0x40 + 8008828: 1c5a adds r2, r3, #1 + 800882a: 68fb ldr r3, [r7, #12] + 800882c: 641a str r2, [r3, #64] ; 0x40 hspi->RxXferCount--; - 80085a6: 68fb ldr r3, [r7, #12] - 80085a8: 2246 movs r2, #70 ; 0x46 - 80085aa: 5a9b ldrh r3, [r3, r2] - 80085ac: b29b uxth r3, r3 - 80085ae: 3b01 subs r3, #1 - 80085b0: b299 uxth r1, r3 - 80085b2: 68fb ldr r3, [r7, #12] - 80085b4: 2246 movs r2, #70 ; 0x46 - 80085b6: 5299 strh r1, [r3, r2] - 80085b8: e012 b.n 80085e0 + 800882e: 68fb ldr r3, [r7, #12] + 8008830: 2246 movs r2, #70 ; 0x46 + 8008832: 5a9b ldrh r3, [r3, r2] + 8008834: b29b uxth r3, r3 + 8008836: 3b01 subs r3, #1 + 8008838: b299 uxth r1, r3 + 800883a: 68fb ldr r3, [r7, #12] + 800883c: 2246 movs r2, #70 ; 0x46 + 800883e: 5299 strh r1, [r3, r2] + 8008840: e012 b.n 8008868 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - 80085ba: f7fd fd0d bl 8005fd8 - 80085be: 0002 movs r2, r0 - 80085c0: 693b ldr r3, [r7, #16] - 80085c2: 1ad3 subs r3, r2, r3 - 80085c4: 683a ldr r2, [r7, #0] - 80085c6: 429a cmp r2, r3 - 80085c8: d802 bhi.n 80085d0 - 80085ca: 683b ldr r3, [r7, #0] - 80085cc: 3301 adds r3, #1 - 80085ce: d102 bne.n 80085d6 - 80085d0: 683b ldr r3, [r7, #0] - 80085d2: 2b00 cmp r3, #0 - 80085d4: d104 bne.n 80085e0 + 8008842: f7fd fd0d bl 8006260 + 8008846: 0002 movs r2, r0 + 8008848: 693b ldr r3, [r7, #16] + 800884a: 1ad3 subs r3, r2, r3 + 800884c: 683a ldr r2, [r7, #0] + 800884e: 429a cmp r2, r3 + 8008850: d802 bhi.n 8008858 + 8008852: 683b ldr r3, [r7, #0] + 8008854: 3301 adds r3, #1 + 8008856: d102 bne.n 800885e + 8008858: 683b ldr r3, [r7, #0] + 800885a: 2b00 cmp r3, #0 + 800885c: d104 bne.n 8008868 { errorcode = HAL_TIMEOUT; - 80085d6: 2317 movs r3, #23 - 80085d8: 18fb adds r3, r7, r3 - 80085da: 2203 movs r2, #3 - 80085dc: 701a strb r2, [r3, #0] + 800885e: 2317 movs r3, #23 + 8008860: 18fb adds r3, r7, r3 + 8008862: 2203 movs r2, #3 + 8008864: 701a strb r2, [r3, #0] goto error; - 80085de: e051 b.n 8008684 + 8008866: e051 b.n 800890c while (hspi->RxXferCount > 0U) - 80085e0: 68fb ldr r3, [r7, #12] - 80085e2: 2246 movs r2, #70 ; 0x46 - 80085e4: 5a9b ldrh r3, [r3, r2] - 80085e6: b29b uxth r3, r3 - 80085e8: 2b00 cmp r3, #0 - 80085ea: d1c7 bne.n 800857c - 80085ec: e035 b.n 800865a + 8008868: 68fb ldr r3, [r7, #12] + 800886a: 2246 movs r2, #70 ; 0x46 + 800886c: 5a9b ldrh r3, [r3, r2] + 800886e: b29b uxth r3, r3 + 8008870: 2b00 cmp r3, #0 + 8008872: d1c7 bne.n 8008804 + 8008874: e035 b.n 80088e2 { /* Transfer loop */ while (hspi->RxXferCount > 0U) { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) - 80085ee: 68fb ldr r3, [r7, #12] - 80085f0: 681b ldr r3, [r3, #0] - 80085f2: 689b ldr r3, [r3, #8] - 80085f4: 2201 movs r2, #1 - 80085f6: 4013 ands r3, r2 - 80085f8: 2b01 cmp r3, #1 - 80085fa: d115 bne.n 8008628 + 8008876: 68fb ldr r3, [r7, #12] + 8008878: 681b ldr r3, [r3, #0] + 800887a: 689b ldr r3, [r3, #8] + 800887c: 2201 movs r2, #1 + 800887e: 4013 ands r3, r2 + 8008880: 2b01 cmp r3, #1 + 8008882: d115 bne.n 80088b0 { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; - 80085fc: 68fb ldr r3, [r7, #12] - 80085fe: 681b ldr r3, [r3, #0] - 8008600: 68da ldr r2, [r3, #12] - 8008602: 68fb ldr r3, [r7, #12] - 8008604: 6c1b ldr r3, [r3, #64] ; 0x40 - 8008606: b292 uxth r2, r2 - 8008608: 801a strh r2, [r3, #0] + 8008884: 68fb ldr r3, [r7, #12] + 8008886: 681b ldr r3, [r3, #0] + 8008888: 68da ldr r2, [r3, #12] + 800888a: 68fb ldr r3, [r7, #12] + 800888c: 6c1b ldr r3, [r3, #64] ; 0x40 + 800888e: b292 uxth r2, r2 + 8008890: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); - 800860a: 68fb ldr r3, [r7, #12] - 800860c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800860e: 1c9a adds r2, r3, #2 - 8008610: 68fb ldr r3, [r7, #12] - 8008612: 641a str r2, [r3, #64] ; 0x40 + 8008892: 68fb ldr r3, [r7, #12] + 8008894: 6c1b ldr r3, [r3, #64] ; 0x40 + 8008896: 1c9a adds r2, r3, #2 + 8008898: 68fb ldr r3, [r7, #12] + 800889a: 641a str r2, [r3, #64] ; 0x40 hspi->RxXferCount--; - 8008614: 68fb ldr r3, [r7, #12] - 8008616: 2246 movs r2, #70 ; 0x46 - 8008618: 5a9b ldrh r3, [r3, r2] - 800861a: b29b uxth r3, r3 - 800861c: 3b01 subs r3, #1 - 800861e: b299 uxth r1, r3 - 8008620: 68fb ldr r3, [r7, #12] - 8008622: 2246 movs r2, #70 ; 0x46 - 8008624: 5299 strh r1, [r3, r2] - 8008626: e012 b.n 800864e + 800889c: 68fb ldr r3, [r7, #12] + 800889e: 2246 movs r2, #70 ; 0x46 + 80088a0: 5a9b ldrh r3, [r3, r2] + 80088a2: b29b uxth r3, r3 + 80088a4: 3b01 subs r3, #1 + 80088a6: b299 uxth r1, r3 + 80088a8: 68fb ldr r3, [r7, #12] + 80088aa: 2246 movs r2, #70 ; 0x46 + 80088ac: 5299 strh r1, [r3, r2] + 80088ae: e012 b.n 80088d6 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - 8008628: f7fd fcd6 bl 8005fd8 - 800862c: 0002 movs r2, r0 - 800862e: 693b ldr r3, [r7, #16] - 8008630: 1ad3 subs r3, r2, r3 - 8008632: 683a ldr r2, [r7, #0] - 8008634: 429a cmp r2, r3 - 8008636: d802 bhi.n 800863e - 8008638: 683b ldr r3, [r7, #0] - 800863a: 3301 adds r3, #1 - 800863c: d102 bne.n 8008644 - 800863e: 683b ldr r3, [r7, #0] - 8008640: 2b00 cmp r3, #0 - 8008642: d104 bne.n 800864e + 80088b0: f7fd fcd6 bl 8006260 + 80088b4: 0002 movs r2, r0 + 80088b6: 693b ldr r3, [r7, #16] + 80088b8: 1ad3 subs r3, r2, r3 + 80088ba: 683a ldr r2, [r7, #0] + 80088bc: 429a cmp r2, r3 + 80088be: d802 bhi.n 80088c6 + 80088c0: 683b ldr r3, [r7, #0] + 80088c2: 3301 adds r3, #1 + 80088c4: d102 bne.n 80088cc + 80088c6: 683b ldr r3, [r7, #0] + 80088c8: 2b00 cmp r3, #0 + 80088ca: d104 bne.n 80088d6 { errorcode = HAL_TIMEOUT; - 8008644: 2317 movs r3, #23 - 8008646: 18fb adds r3, r7, r3 - 8008648: 2203 movs r2, #3 - 800864a: 701a strb r2, [r3, #0] + 80088cc: 2317 movs r3, #23 + 80088ce: 18fb adds r3, r7, r3 + 80088d0: 2203 movs r2, #3 + 80088d2: 701a strb r2, [r3, #0] goto error; - 800864c: e01a b.n 8008684 + 80088d4: e01a b.n 800890c while (hspi->RxXferCount > 0U) - 800864e: 68fb ldr r3, [r7, #12] - 8008650: 2246 movs r2, #70 ; 0x46 - 8008652: 5a9b ldrh r3, [r3, r2] - 8008654: b29b uxth r3, r3 - 8008656: 2b00 cmp r3, #0 - 8008658: d1c9 bne.n 80085ee + 80088d6: 68fb ldr r3, [r7, #12] + 80088d8: 2246 movs r2, #70 ; 0x46 + 80088da: 5a9b ldrh r3, [r3, r2] + 80088dc: b29b uxth r3, r3 + 80088de: 2b00 cmp r3, #0 + 80088e0: d1c9 bne.n 8008876 } } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) - 800865a: 693a ldr r2, [r7, #16] - 800865c: 6839 ldr r1, [r7, #0] - 800865e: 68fb ldr r3, [r7, #12] - 8008660: 0018 movs r0, r3 - 8008662: f000 fb25 bl 8008cb0 - 8008666: 1e03 subs r3, r0, #0 - 8008668: d002 beq.n 8008670 + 80088e2: 693a ldr r2, [r7, #16] + 80088e4: 6839 ldr r1, [r7, #0] + 80088e6: 68fb ldr r3, [r7, #12] + 80088e8: 0018 movs r0, r3 + 80088ea: f000 fb25 bl 8008f38 + 80088ee: 1e03 subs r3, r0, #0 + 80088f0: d002 beq.n 80088f8 { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - 800866a: 68fb ldr r3, [r7, #12] - 800866c: 2220 movs r2, #32 - 800866e: 661a str r2, [r3, #96] ; 0x60 + 80088f2: 68fb ldr r3, [r7, #12] + 80088f4: 2220 movs r2, #32 + 80088f6: 661a str r2, [r3, #96] ; 0x60 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); __HAL_SPI_CLEAR_CRCERRFLAG(hspi); } #endif /* USE_SPI_CRC */ if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - 8008670: 68fb ldr r3, [r7, #12] - 8008672: 6e1b ldr r3, [r3, #96] ; 0x60 - 8008674: 2b00 cmp r3, #0 - 8008676: d004 beq.n 8008682 + 80088f8: 68fb ldr r3, [r7, #12] + 80088fa: 6e1b ldr r3, [r3, #96] ; 0x60 + 80088fc: 2b00 cmp r3, #0 + 80088fe: d004 beq.n 800890a { errorcode = HAL_ERROR; - 8008678: 2317 movs r3, #23 - 800867a: 18fb adds r3, r7, r3 - 800867c: 2201 movs r2, #1 - 800867e: 701a strb r2, [r3, #0] - 8008680: e000 b.n 8008684 + 8008900: 2317 movs r3, #23 + 8008902: 18fb adds r3, r7, r3 + 8008904: 2201 movs r2, #1 + 8008906: 701a strb r2, [r3, #0] + 8008908: e000 b.n 800890c } error : - 8008682: 46c0 nop ; (mov r8, r8) + 800890a: 46c0 nop ; (mov r8, r8) hspi->State = HAL_SPI_STATE_READY; - 8008684: 68fb ldr r3, [r7, #12] - 8008686: 225d movs r2, #93 ; 0x5d - 8008688: 2101 movs r1, #1 - 800868a: 5499 strb r1, [r3, r2] + 800890c: 68fb ldr r3, [r7, #12] + 800890e: 225d movs r2, #93 ; 0x5d + 8008910: 2101 movs r1, #1 + 8008912: 5499 strb r1, [r3, r2] __HAL_UNLOCK(hspi); - 800868c: 68fb ldr r3, [r7, #12] - 800868e: 225c movs r2, #92 ; 0x5c - 8008690: 2100 movs r1, #0 - 8008692: 5499 strb r1, [r3, r2] + 8008914: 68fb ldr r3, [r7, #12] + 8008916: 225c movs r2, #92 ; 0x5c + 8008918: 2100 movs r1, #0 + 800891a: 5499 strb r1, [r3, r2] return errorcode; - 8008694: 2317 movs r3, #23 - 8008696: 18fb adds r3, r7, r3 - 8008698: 781b ldrb r3, [r3, #0] + 800891c: 2317 movs r3, #23 + 800891e: 18fb adds r3, r7, r3 + 8008920: 781b ldrb r3, [r3, #0] } - 800869a: 0018 movs r0, r3 - 800869c: 46bd mov sp, r7 - 800869e: b007 add sp, #28 - 80086a0: bd90 pop {r4, r7, pc} - 80086a2: 46c0 nop ; (mov r8, r8) - 80086a4: ffffefff .word 0xffffefff - 80086a8: ffffbfff .word 0xffffbfff + 8008922: 0018 movs r0, r3 + 8008924: 46bd mov sp, r7 + 8008926: b007 add sp, #28 + 8008928: bd90 pop {r4, r7, pc} + 800892a: 46c0 nop ; (mov r8, r8) + 800892c: ffffefff .word 0xffffefff + 8008930: ffffbfff .word 0xffffbfff -080086ac : +08008934 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) { - 80086ac: b580 push {r7, lr} - 80086ae: b08a sub sp, #40 ; 0x28 - 80086b0: af00 add r7, sp, #0 - 80086b2: 60f8 str r0, [r7, #12] - 80086b4: 60b9 str r1, [r7, #8] - 80086b6: 607a str r2, [r7, #4] - 80086b8: 001a movs r2, r3 - 80086ba: 1cbb adds r3, r7, #2 - 80086bc: 801a strh r2, [r3, #0] + 8008934: b580 push {r7, lr} + 8008936: b08a sub sp, #40 ; 0x28 + 8008938: af00 add r7, sp, #0 + 800893a: 60f8 str r0, [r7, #12] + 800893c: 60b9 str r1, [r7, #8] + 800893e: 607a str r2, [r7, #4] + 8008940: 001a movs r2, r3 + 8008942: 1cbb adds r3, r7, #2 + 8008944: 801a strh r2, [r3, #0] __IO uint8_t *ptmpreg8; __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ /* Variable used to alternate Rx and Tx during transfer */ uint32_t txallowed = 1U; - 80086be: 2301 movs r3, #1 - 80086c0: 627b str r3, [r7, #36] ; 0x24 + 8008946: 2301 movs r3, #1 + 8008948: 627b str r3, [r7, #36] ; 0x24 HAL_StatusTypeDef errorcode = HAL_OK; - 80086c2: 2323 movs r3, #35 ; 0x23 - 80086c4: 18fb adds r3, r7, r3 - 80086c6: 2200 movs r2, #0 - 80086c8: 701a strb r2, [r3, #0] + 800894a: 2323 movs r3, #35 ; 0x23 + 800894c: 18fb adds r3, r7, r3 + 800894e: 2200 movs r2, #0 + 8008950: 701a strb r2, [r3, #0] /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); /* Process Locked */ __HAL_LOCK(hspi); - 80086ca: 68fb ldr r3, [r7, #12] - 80086cc: 225c movs r2, #92 ; 0x5c - 80086ce: 5c9b ldrb r3, [r3, r2] - 80086d0: 2b01 cmp r3, #1 - 80086d2: d101 bne.n 80086d8 - 80086d4: 2302 movs r3, #2 - 80086d6: e1b5 b.n 8008a44 - 80086d8: 68fb ldr r3, [r7, #12] - 80086da: 225c movs r2, #92 ; 0x5c - 80086dc: 2101 movs r1, #1 - 80086de: 5499 strb r1, [r3, r2] + 8008952: 68fb ldr r3, [r7, #12] + 8008954: 225c movs r2, #92 ; 0x5c + 8008956: 5c9b ldrb r3, [r3, r2] + 8008958: 2b01 cmp r3, #1 + 800895a: d101 bne.n 8008960 + 800895c: 2302 movs r3, #2 + 800895e: e1b5 b.n 8008ccc + 8008960: 68fb ldr r3, [r7, #12] + 8008962: 225c movs r2, #92 ; 0x5c + 8008964: 2101 movs r1, #1 + 8008966: 5499 strb r1, [r3, r2] /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - 80086e0: f7fd fc7a bl 8005fd8 - 80086e4: 0003 movs r3, r0 - 80086e6: 61fb str r3, [r7, #28] + 8008968: f7fd fc7a bl 8006260 + 800896c: 0003 movs r3, r0 + 800896e: 61fb str r3, [r7, #28] /* Init temporary variables */ tmp_state = hspi->State; - 80086e8: 201b movs r0, #27 - 80086ea: 183b adds r3, r7, r0 - 80086ec: 68fa ldr r2, [r7, #12] - 80086ee: 215d movs r1, #93 ; 0x5d - 80086f0: 5c52 ldrb r2, [r2, r1] - 80086f2: 701a strb r2, [r3, #0] + 8008970: 201b movs r0, #27 + 8008972: 183b adds r3, r7, r0 + 8008974: 68fa ldr r2, [r7, #12] + 8008976: 215d movs r1, #93 ; 0x5d + 8008978: 5c52 ldrb r2, [r2, r1] + 800897a: 701a strb r2, [r3, #0] tmp_mode = hspi->Init.Mode; - 80086f4: 68fb ldr r3, [r7, #12] - 80086f6: 685b ldr r3, [r3, #4] - 80086f8: 617b str r3, [r7, #20] + 800897c: 68fb ldr r3, [r7, #12] + 800897e: 685b ldr r3, [r3, #4] + 8008980: 617b str r3, [r7, #20] initial_TxXferCount = Size; - 80086fa: 2312 movs r3, #18 - 80086fc: 18fb adds r3, r7, r3 - 80086fe: 1cba adds r2, r7, #2 - 8008700: 8812 ldrh r2, [r2, #0] - 8008702: 801a strh r2, [r3, #0] + 8008982: 2312 movs r3, #18 + 8008984: 18fb adds r3, r7, r3 + 8008986: 1cba adds r2, r7, #2 + 8008988: 8812 ldrh r2, [r2, #0] + 800898a: 801a strh r2, [r3, #0] #if (USE_SPI_CRC != 0U) spi_cr1 = READ_REG(hspi->Instance->CR1); spi_cr2 = READ_REG(hspi->Instance->CR2); #endif /* USE_SPI_CRC */ if (!((tmp_state == HAL_SPI_STATE_READY) || \ - 8008704: 183b adds r3, r7, r0 - 8008706: 781b ldrb r3, [r3, #0] - 8008708: 2b01 cmp r3, #1 - 800870a: d011 beq.n 8008730 - 800870c: 697a ldr r2, [r7, #20] - 800870e: 2382 movs r3, #130 ; 0x82 - 8008710: 005b lsls r3, r3, #1 - 8008712: 429a cmp r2, r3 - 8008714: d107 bne.n 8008726 + 800898c: 183b adds r3, r7, r0 + 800898e: 781b ldrb r3, [r3, #0] + 8008990: 2b01 cmp r3, #1 + 8008992: d011 beq.n 80089b8 + 8008994: 697a ldr r2, [r7, #20] + 8008996: 2382 movs r3, #130 ; 0x82 + 8008998: 005b lsls r3, r3, #1 + 800899a: 429a cmp r2, r3 + 800899c: d107 bne.n 80089ae ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) - 8008716: 68fb ldr r3, [r7, #12] - 8008718: 689b ldr r3, [r3, #8] - 800871a: 2b00 cmp r3, #0 - 800871c: d103 bne.n 8008726 - 800871e: 183b adds r3, r7, r0 - 8008720: 781b ldrb r3, [r3, #0] - 8008722: 2b04 cmp r3, #4 - 8008724: d004 beq.n 8008730 + 800899e: 68fb ldr r3, [r7, #12] + 80089a0: 689b ldr r3, [r3, #8] + 80089a2: 2b00 cmp r3, #0 + 80089a4: d103 bne.n 80089ae + 80089a6: 183b adds r3, r7, r0 + 80089a8: 781b ldrb r3, [r3, #0] + 80089aa: 2b04 cmp r3, #4 + 80089ac: d004 beq.n 80089b8 { errorcode = HAL_BUSY; - 8008726: 2323 movs r3, #35 ; 0x23 - 8008728: 18fb adds r3, r7, r3 - 800872a: 2202 movs r2, #2 - 800872c: 701a strb r2, [r3, #0] + 80089ae: 2323 movs r3, #35 ; 0x23 + 80089b0: 18fb adds r3, r7, r3 + 80089b2: 2202 movs r2, #2 + 80089b4: 701a strb r2, [r3, #0] goto error; - 800872e: e17e b.n 8008a2e + 80089b6: e17e b.n 8008cb6 } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) - 8008730: 68bb ldr r3, [r7, #8] - 8008732: 2b00 cmp r3, #0 - 8008734: d006 beq.n 8008744 - 8008736: 687b ldr r3, [r7, #4] - 8008738: 2b00 cmp r3, #0 - 800873a: d003 beq.n 8008744 - 800873c: 1cbb adds r3, r7, #2 - 800873e: 881b ldrh r3, [r3, #0] - 8008740: 2b00 cmp r3, #0 - 8008742: d104 bne.n 800874e + 80089b8: 68bb ldr r3, [r7, #8] + 80089ba: 2b00 cmp r3, #0 + 80089bc: d006 beq.n 80089cc + 80089be: 687b ldr r3, [r7, #4] + 80089c0: 2b00 cmp r3, #0 + 80089c2: d003 beq.n 80089cc + 80089c4: 1cbb adds r3, r7, #2 + 80089c6: 881b ldrh r3, [r3, #0] + 80089c8: 2b00 cmp r3, #0 + 80089ca: d104 bne.n 80089d6 { errorcode = HAL_ERROR; - 8008744: 2323 movs r3, #35 ; 0x23 - 8008746: 18fb adds r3, r7, r3 - 8008748: 2201 movs r2, #1 - 800874a: 701a strb r2, [r3, #0] + 80089cc: 2323 movs r3, #35 ; 0x23 + 80089ce: 18fb adds r3, r7, r3 + 80089d0: 2201 movs r2, #1 + 80089d2: 701a strb r2, [r3, #0] goto error; - 800874c: e16f b.n 8008a2e + 80089d4: e16f b.n 8008cb6 } /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) - 800874e: 68fb ldr r3, [r7, #12] - 8008750: 225d movs r2, #93 ; 0x5d - 8008752: 5c9b ldrb r3, [r3, r2] - 8008754: b2db uxtb r3, r3 - 8008756: 2b04 cmp r3, #4 - 8008758: d003 beq.n 8008762 + 80089d6: 68fb ldr r3, [r7, #12] + 80089d8: 225d movs r2, #93 ; 0x5d + 80089da: 5c9b ldrb r3, [r3, r2] + 80089dc: b2db uxtb r3, r3 + 80089de: 2b04 cmp r3, #4 + 80089e0: d003 beq.n 80089ea { hspi->State = HAL_SPI_STATE_BUSY_TX_RX; - 800875a: 68fb ldr r3, [r7, #12] - 800875c: 225d movs r2, #93 ; 0x5d - 800875e: 2105 movs r1, #5 - 8008760: 5499 strb r1, [r3, r2] + 80089e2: 68fb ldr r3, [r7, #12] + 80089e4: 225d movs r2, #93 ; 0x5d + 80089e6: 2105 movs r1, #5 + 80089e8: 5499 strb r1, [r3, r2] } /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 8008762: 68fb ldr r3, [r7, #12] - 8008764: 2200 movs r2, #0 - 8008766: 661a str r2, [r3, #96] ; 0x60 + 80089ea: 68fb ldr r3, [r7, #12] + 80089ec: 2200 movs r2, #0 + 80089ee: 661a str r2, [r3, #96] ; 0x60 hspi->pRxBuffPtr = (uint8_t *)pRxData; - 8008768: 68fb ldr r3, [r7, #12] - 800876a: 687a ldr r2, [r7, #4] - 800876c: 641a str r2, [r3, #64] ; 0x40 + 80089f0: 68fb ldr r3, [r7, #12] + 80089f2: 687a ldr r2, [r7, #4] + 80089f4: 641a str r2, [r3, #64] ; 0x40 hspi->RxXferCount = Size; - 800876e: 68fb ldr r3, [r7, #12] - 8008770: 1cba adds r2, r7, #2 - 8008772: 2146 movs r1, #70 ; 0x46 - 8008774: 8812 ldrh r2, [r2, #0] - 8008776: 525a strh r2, [r3, r1] + 80089f6: 68fb ldr r3, [r7, #12] + 80089f8: 1cba adds r2, r7, #2 + 80089fa: 2146 movs r1, #70 ; 0x46 + 80089fc: 8812 ldrh r2, [r2, #0] + 80089fe: 525a strh r2, [r3, r1] hspi->RxXferSize = Size; - 8008778: 68fb ldr r3, [r7, #12] - 800877a: 1cba adds r2, r7, #2 - 800877c: 2144 movs r1, #68 ; 0x44 - 800877e: 8812 ldrh r2, [r2, #0] - 8008780: 525a strh r2, [r3, r1] + 8008a00: 68fb ldr r3, [r7, #12] + 8008a02: 1cba adds r2, r7, #2 + 8008a04: 2144 movs r1, #68 ; 0x44 + 8008a06: 8812 ldrh r2, [r2, #0] + 8008a08: 525a strh r2, [r3, r1] hspi->pTxBuffPtr = (uint8_t *)pTxData; - 8008782: 68fb ldr r3, [r7, #12] - 8008784: 68ba ldr r2, [r7, #8] - 8008786: 639a str r2, [r3, #56] ; 0x38 + 8008a0a: 68fb ldr r3, [r7, #12] + 8008a0c: 68ba ldr r2, [r7, #8] + 8008a0e: 639a str r2, [r3, #56] ; 0x38 hspi->TxXferCount = Size; - 8008788: 68fb ldr r3, [r7, #12] - 800878a: 1cba adds r2, r7, #2 - 800878c: 8812 ldrh r2, [r2, #0] - 800878e: 87da strh r2, [r3, #62] ; 0x3e + 8008a10: 68fb ldr r3, [r7, #12] + 8008a12: 1cba adds r2, r7, #2 + 8008a14: 8812 ldrh r2, [r2, #0] + 8008a16: 87da strh r2, [r3, #62] ; 0x3e hspi->TxXferSize = Size; - 8008790: 68fb ldr r3, [r7, #12] - 8008792: 1cba adds r2, r7, #2 - 8008794: 8812 ldrh r2, [r2, #0] - 8008796: 879a strh r2, [r3, #60] ; 0x3c + 8008a18: 68fb ldr r3, [r7, #12] + 8008a1a: 1cba adds r2, r7, #2 + 8008a1c: 8812 ldrh r2, [r2, #0] + 8008a1e: 879a strh r2, [r3, #60] ; 0x3c /*Init field not used in handle to zero */ hspi->RxISR = NULL; - 8008798: 68fb ldr r3, [r7, #12] - 800879a: 2200 movs r2, #0 - 800879c: 64da str r2, [r3, #76] ; 0x4c + 8008a20: 68fb ldr r3, [r7, #12] + 8008a22: 2200 movs r2, #0 + 8008a24: 64da str r2, [r3, #76] ; 0x4c hspi->TxISR = NULL; - 800879e: 68fb ldr r3, [r7, #12] - 80087a0: 2200 movs r2, #0 - 80087a2: 651a str r2, [r3, #80] ; 0x50 + 8008a26: 68fb ldr r3, [r7, #12] + 8008a28: 2200 movs r2, #0 + 8008a2a: 651a str r2, [r3, #80] ; 0x50 SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Set the Rx Fifo threshold */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) - 80087a4: 68fb ldr r3, [r7, #12] - 80087a6: 68da ldr r2, [r3, #12] - 80087a8: 23e0 movs r3, #224 ; 0xe0 - 80087aa: 00db lsls r3, r3, #3 - 80087ac: 429a cmp r2, r3 - 80087ae: d908 bls.n 80087c2 + 8008a2c: 68fb ldr r3, [r7, #12] + 8008a2e: 68da ldr r2, [r3, #12] + 8008a30: 23e0 movs r3, #224 ; 0xe0 + 8008a32: 00db lsls r3, r3, #3 + 8008a34: 429a cmp r2, r3 + 8008a36: d908 bls.n 8008a4a { /* Set fiforxthreshold according the reception data length: 16bit */ CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); - 80087b0: 68fb ldr r3, [r7, #12] - 80087b2: 681b ldr r3, [r3, #0] - 80087b4: 685a ldr r2, [r3, #4] - 80087b6: 68fb ldr r3, [r7, #12] - 80087b8: 681b ldr r3, [r3, #0] - 80087ba: 49a4 ldr r1, [pc, #656] ; (8008a4c ) - 80087bc: 400a ands r2, r1 - 80087be: 605a str r2, [r3, #4] - 80087c0: e008 b.n 80087d4 + 8008a38: 68fb ldr r3, [r7, #12] + 8008a3a: 681b ldr r3, [r3, #0] + 8008a3c: 685a ldr r2, [r3, #4] + 8008a3e: 68fb ldr r3, [r7, #12] + 8008a40: 681b ldr r3, [r3, #0] + 8008a42: 49a4 ldr r1, [pc, #656] ; (8008cd4 ) + 8008a44: 400a ands r2, r1 + 8008a46: 605a str r2, [r3, #4] + 8008a48: e008 b.n 8008a5c } else { /* Set fiforxthreshold according the reception data length: 8bit */ SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); - 80087c2: 68fb ldr r3, [r7, #12] - 80087c4: 681b ldr r3, [r3, #0] - 80087c6: 685a ldr r2, [r3, #4] - 80087c8: 68fb ldr r3, [r7, #12] - 80087ca: 681b ldr r3, [r3, #0] - 80087cc: 2180 movs r1, #128 ; 0x80 - 80087ce: 0149 lsls r1, r1, #5 - 80087d0: 430a orrs r2, r1 - 80087d2: 605a str r2, [r3, #4] + 8008a4a: 68fb ldr r3, [r7, #12] + 8008a4c: 681b ldr r3, [r3, #0] + 8008a4e: 685a ldr r2, [r3, #4] + 8008a50: 68fb ldr r3, [r7, #12] + 8008a52: 681b ldr r3, [r3, #0] + 8008a54: 2180 movs r1, #128 ; 0x80 + 8008a56: 0149 lsls r1, r1, #5 + 8008a58: 430a orrs r2, r1 + 8008a5a: 605a str r2, [r3, #4] } /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - 80087d4: 68fb ldr r3, [r7, #12] - 80087d6: 681b ldr r3, [r3, #0] - 80087d8: 681b ldr r3, [r3, #0] - 80087da: 2240 movs r2, #64 ; 0x40 - 80087dc: 4013 ands r3, r2 - 80087de: 2b40 cmp r3, #64 ; 0x40 - 80087e0: d007 beq.n 80087f2 + 8008a5c: 68fb ldr r3, [r7, #12] + 8008a5e: 681b ldr r3, [r3, #0] + 8008a60: 681b ldr r3, [r3, #0] + 8008a62: 2240 movs r2, #64 ; 0x40 + 8008a64: 4013 ands r3, r2 + 8008a66: 2b40 cmp r3, #64 ; 0x40 + 8008a68: d007 beq.n 8008a7a { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); - 80087e2: 68fb ldr r3, [r7, #12] - 80087e4: 681b ldr r3, [r3, #0] - 80087e6: 681a ldr r2, [r3, #0] - 80087e8: 68fb ldr r3, [r7, #12] - 80087ea: 681b ldr r3, [r3, #0] - 80087ec: 2140 movs r1, #64 ; 0x40 - 80087ee: 430a orrs r2, r1 - 80087f0: 601a str r2, [r3, #0] + 8008a6a: 68fb ldr r3, [r7, #12] + 8008a6c: 681b ldr r3, [r3, #0] + 8008a6e: 681a ldr r2, [r3, #0] + 8008a70: 68fb ldr r3, [r7, #12] + 8008a72: 681b ldr r3, [r3, #0] + 8008a74: 2140 movs r1, #64 ; 0x40 + 8008a76: 430a orrs r2, r1 + 8008a78: 601a str r2, [r3, #0] } /* Transmit and Receive data in 16 Bit mode */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) - 80087f2: 68fb ldr r3, [r7, #12] - 80087f4: 68da ldr r2, [r3, #12] - 80087f6: 23e0 movs r3, #224 ; 0xe0 - 80087f8: 00db lsls r3, r3, #3 - 80087fa: 429a cmp r2, r3 - 80087fc: d800 bhi.n 8008800 - 80087fe: e07f b.n 8008900 + 8008a7a: 68fb ldr r3, [r7, #12] + 8008a7c: 68da ldr r2, [r3, #12] + 8008a7e: 23e0 movs r3, #224 ; 0xe0 + 8008a80: 00db lsls r3, r3, #3 + 8008a82: 429a cmp r2, r3 + 8008a84: d800 bhi.n 8008a88 + 8008a86: e07f b.n 8008b88 { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - 8008800: 68fb ldr r3, [r7, #12] - 8008802: 685b ldr r3, [r3, #4] - 8008804: 2b00 cmp r3, #0 - 8008806: d005 beq.n 8008814 - 8008808: 2312 movs r3, #18 - 800880a: 18fb adds r3, r7, r3 - 800880c: 881b ldrh r3, [r3, #0] - 800880e: 2b01 cmp r3, #1 - 8008810: d000 beq.n 8008814 - 8008812: e069 b.n 80088e8 + 8008a88: 68fb ldr r3, [r7, #12] + 8008a8a: 685b ldr r3, [r3, #4] + 8008a8c: 2b00 cmp r3, #0 + 8008a8e: d005 beq.n 8008a9c + 8008a90: 2312 movs r3, #18 + 8008a92: 18fb adds r3, r7, r3 + 8008a94: 881b ldrh r3, [r3, #0] + 8008a96: 2b01 cmp r3, #1 + 8008a98: d000 beq.n 8008a9c + 8008a9a: e069 b.n 8008b70 { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); - 8008814: 68fb ldr r3, [r7, #12] - 8008816: 6b9b ldr r3, [r3, #56] ; 0x38 - 8008818: 881a ldrh r2, [r3, #0] - 800881a: 68fb ldr r3, [r7, #12] - 800881c: 681b ldr r3, [r3, #0] - 800881e: 60da str r2, [r3, #12] + 8008a9c: 68fb ldr r3, [r7, #12] + 8008a9e: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008aa0: 881a ldrh r2, [r3, #0] + 8008aa2: 68fb ldr r3, [r7, #12] + 8008aa4: 681b ldr r3, [r3, #0] + 8008aa6: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); - 8008820: 68fb ldr r3, [r7, #12] - 8008822: 6b9b ldr r3, [r3, #56] ; 0x38 - 8008824: 1c9a adds r2, r3, #2 - 8008826: 68fb ldr r3, [r7, #12] - 8008828: 639a str r2, [r3, #56] ; 0x38 + 8008aa8: 68fb ldr r3, [r7, #12] + 8008aaa: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008aac: 1c9a adds r2, r3, #2 + 8008aae: 68fb ldr r3, [r7, #12] + 8008ab0: 639a str r2, [r3, #56] ; 0x38 hspi->TxXferCount--; - 800882a: 68fb ldr r3, [r7, #12] - 800882c: 8fdb ldrh r3, [r3, #62] ; 0x3e - 800882e: b29b uxth r3, r3 - 8008830: 3b01 subs r3, #1 - 8008832: b29a uxth r2, r3 - 8008834: 68fb ldr r3, [r7, #12] - 8008836: 87da strh r2, [r3, #62] ; 0x3e + 8008ab2: 68fb ldr r3, [r7, #12] + 8008ab4: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8008ab6: b29b uxth r3, r3 + 8008ab8: 3b01 subs r3, #1 + 8008aba: b29a uxth r2, r3 + 8008abc: 68fb ldr r3, [r7, #12] + 8008abe: 87da strh r2, [r3, #62] ; 0x3e } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - 8008838: e056 b.n 80088e8 + 8008ac0: e056 b.n 8008b70 { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) - 800883a: 68fb ldr r3, [r7, #12] - 800883c: 681b ldr r3, [r3, #0] - 800883e: 689b ldr r3, [r3, #8] - 8008840: 2202 movs r2, #2 - 8008842: 4013 ands r3, r2 - 8008844: 2b02 cmp r3, #2 - 8008846: d11b bne.n 8008880 - 8008848: 68fb ldr r3, [r7, #12] - 800884a: 8fdb ldrh r3, [r3, #62] ; 0x3e - 800884c: b29b uxth r3, r3 - 800884e: 2b00 cmp r3, #0 - 8008850: d016 beq.n 8008880 - 8008852: 6a7b ldr r3, [r7, #36] ; 0x24 - 8008854: 2b01 cmp r3, #1 - 8008856: d113 bne.n 8008880 + 8008ac2: 68fb ldr r3, [r7, #12] + 8008ac4: 681b ldr r3, [r3, #0] + 8008ac6: 689b ldr r3, [r3, #8] + 8008ac8: 2202 movs r2, #2 + 8008aca: 4013 ands r3, r2 + 8008acc: 2b02 cmp r3, #2 + 8008ace: d11b bne.n 8008b08 + 8008ad0: 68fb ldr r3, [r7, #12] + 8008ad2: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8008ad4: b29b uxth r3, r3 + 8008ad6: 2b00 cmp r3, #0 + 8008ad8: d016 beq.n 8008b08 + 8008ada: 6a7b ldr r3, [r7, #36] ; 0x24 + 8008adc: 2b01 cmp r3, #1 + 8008ade: d113 bne.n 8008b08 { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); - 8008858: 68fb ldr r3, [r7, #12] - 800885a: 6b9b ldr r3, [r3, #56] ; 0x38 - 800885c: 881a ldrh r2, [r3, #0] - 800885e: 68fb ldr r3, [r7, #12] - 8008860: 681b ldr r3, [r3, #0] - 8008862: 60da str r2, [r3, #12] + 8008ae0: 68fb ldr r3, [r7, #12] + 8008ae2: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008ae4: 881a ldrh r2, [r3, #0] + 8008ae6: 68fb ldr r3, [r7, #12] + 8008ae8: 681b ldr r3, [r3, #0] + 8008aea: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); - 8008864: 68fb ldr r3, [r7, #12] - 8008866: 6b9b ldr r3, [r3, #56] ; 0x38 - 8008868: 1c9a adds r2, r3, #2 - 800886a: 68fb ldr r3, [r7, #12] - 800886c: 639a str r2, [r3, #56] ; 0x38 + 8008aec: 68fb ldr r3, [r7, #12] + 8008aee: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008af0: 1c9a adds r2, r3, #2 + 8008af2: 68fb ldr r3, [r7, #12] + 8008af4: 639a str r2, [r3, #56] ; 0x38 hspi->TxXferCount--; - 800886e: 68fb ldr r3, [r7, #12] - 8008870: 8fdb ldrh r3, [r3, #62] ; 0x3e - 8008872: b29b uxth r3, r3 - 8008874: 3b01 subs r3, #1 - 8008876: b29a uxth r2, r3 - 8008878: 68fb ldr r3, [r7, #12] - 800887a: 87da strh r2, [r3, #62] ; 0x3e + 8008af6: 68fb ldr r3, [r7, #12] + 8008af8: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8008afa: b29b uxth r3, r3 + 8008afc: 3b01 subs r3, #1 + 8008afe: b29a uxth r2, r3 + 8008b00: 68fb ldr r3, [r7, #12] + 8008b02: 87da strh r2, [r3, #62] ; 0x3e /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; - 800887c: 2300 movs r3, #0 - 800887e: 627b str r3, [r7, #36] ; 0x24 + 8008b04: 2300 movs r3, #0 + 8008b06: 627b str r3, [r7, #36] ; 0x24 } #endif /* USE_SPI_CRC */ } /* Check RXNE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) - 8008880: 68fb ldr r3, [r7, #12] - 8008882: 681b ldr r3, [r3, #0] - 8008884: 689b ldr r3, [r3, #8] - 8008886: 2201 movs r2, #1 - 8008888: 4013 ands r3, r2 - 800888a: 2b01 cmp r3, #1 - 800888c: d11c bne.n 80088c8 - 800888e: 68fb ldr r3, [r7, #12] - 8008890: 2246 movs r2, #70 ; 0x46 - 8008892: 5a9b ldrh r3, [r3, r2] - 8008894: b29b uxth r3, r3 - 8008896: 2b00 cmp r3, #0 - 8008898: d016 beq.n 80088c8 + 8008b08: 68fb ldr r3, [r7, #12] + 8008b0a: 681b ldr r3, [r3, #0] + 8008b0c: 689b ldr r3, [r3, #8] + 8008b0e: 2201 movs r2, #1 + 8008b10: 4013 ands r3, r2 + 8008b12: 2b01 cmp r3, #1 + 8008b14: d11c bne.n 8008b50 + 8008b16: 68fb ldr r3, [r7, #12] + 8008b18: 2246 movs r2, #70 ; 0x46 + 8008b1a: 5a9b ldrh r3, [r3, r2] + 8008b1c: b29b uxth r3, r3 + 8008b1e: 2b00 cmp r3, #0 + 8008b20: d016 beq.n 8008b50 { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; - 800889a: 68fb ldr r3, [r7, #12] - 800889c: 681b ldr r3, [r3, #0] - 800889e: 68da ldr r2, [r3, #12] - 80088a0: 68fb ldr r3, [r7, #12] - 80088a2: 6c1b ldr r3, [r3, #64] ; 0x40 - 80088a4: b292 uxth r2, r2 - 80088a6: 801a strh r2, [r3, #0] + 8008b22: 68fb ldr r3, [r7, #12] + 8008b24: 681b ldr r3, [r3, #0] + 8008b26: 68da ldr r2, [r3, #12] + 8008b28: 68fb ldr r3, [r7, #12] + 8008b2a: 6c1b ldr r3, [r3, #64] ; 0x40 + 8008b2c: b292 uxth r2, r2 + 8008b2e: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); - 80088a8: 68fb ldr r3, [r7, #12] - 80088aa: 6c1b ldr r3, [r3, #64] ; 0x40 - 80088ac: 1c9a adds r2, r3, #2 - 80088ae: 68fb ldr r3, [r7, #12] - 80088b0: 641a str r2, [r3, #64] ; 0x40 + 8008b30: 68fb ldr r3, [r7, #12] + 8008b32: 6c1b ldr r3, [r3, #64] ; 0x40 + 8008b34: 1c9a adds r2, r3, #2 + 8008b36: 68fb ldr r3, [r7, #12] + 8008b38: 641a str r2, [r3, #64] ; 0x40 hspi->RxXferCount--; - 80088b2: 68fb ldr r3, [r7, #12] - 80088b4: 2246 movs r2, #70 ; 0x46 - 80088b6: 5a9b ldrh r3, [r3, r2] - 80088b8: b29b uxth r3, r3 - 80088ba: 3b01 subs r3, #1 - 80088bc: b299 uxth r1, r3 - 80088be: 68fb ldr r3, [r7, #12] - 80088c0: 2246 movs r2, #70 ; 0x46 - 80088c2: 5299 strh r1, [r3, r2] + 8008b3a: 68fb ldr r3, [r7, #12] + 8008b3c: 2246 movs r2, #70 ; 0x46 + 8008b3e: 5a9b ldrh r3, [r3, r2] + 8008b40: b29b uxth r3, r3 + 8008b42: 3b01 subs r3, #1 + 8008b44: b299 uxth r1, r3 + 8008b46: 68fb ldr r3, [r7, #12] + 8008b48: 2246 movs r2, #70 ; 0x46 + 8008b4a: 5299 strh r1, [r3, r2] /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; - 80088c4: 2301 movs r3, #1 - 80088c6: 627b str r3, [r7, #36] ; 0x24 + 8008b4c: 2301 movs r3, #1 + 8008b4e: 627b str r3, [r7, #36] ; 0x24 } if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) - 80088c8: f7fd fb86 bl 8005fd8 - 80088cc: 0002 movs r2, r0 - 80088ce: 69fb ldr r3, [r7, #28] - 80088d0: 1ad3 subs r3, r2, r3 - 80088d2: 6b3a ldr r2, [r7, #48] ; 0x30 - 80088d4: 429a cmp r2, r3 - 80088d6: d807 bhi.n 80088e8 - 80088d8: 6b3b ldr r3, [r7, #48] ; 0x30 - 80088da: 3301 adds r3, #1 - 80088dc: d004 beq.n 80088e8 + 8008b50: f7fd fb86 bl 8006260 + 8008b54: 0002 movs r2, r0 + 8008b56: 69fb ldr r3, [r7, #28] + 8008b58: 1ad3 subs r3, r2, r3 + 8008b5a: 6b3a ldr r2, [r7, #48] ; 0x30 + 8008b5c: 429a cmp r2, r3 + 8008b5e: d807 bhi.n 8008b70 + 8008b60: 6b3b ldr r3, [r7, #48] ; 0x30 + 8008b62: 3301 adds r3, #1 + 8008b64: d004 beq.n 8008b70 { errorcode = HAL_TIMEOUT; - 80088de: 2323 movs r3, #35 ; 0x23 - 80088e0: 18fb adds r3, r7, r3 - 80088e2: 2203 movs r2, #3 - 80088e4: 701a strb r2, [r3, #0] + 8008b66: 2323 movs r3, #35 ; 0x23 + 8008b68: 18fb adds r3, r7, r3 + 8008b6a: 2203 movs r2, #3 + 8008b6c: 701a strb r2, [r3, #0] goto error; - 80088e6: e0a2 b.n 8008a2e + 8008b6e: e0a2 b.n 8008cb6 while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - 80088e8: 68fb ldr r3, [r7, #12] - 80088ea: 8fdb ldrh r3, [r3, #62] ; 0x3e - 80088ec: b29b uxth r3, r3 - 80088ee: 2b00 cmp r3, #0 - 80088f0: d1a3 bne.n 800883a - 80088f2: 68fb ldr r3, [r7, #12] - 80088f4: 2246 movs r2, #70 ; 0x46 - 80088f6: 5a9b ldrh r3, [r3, r2] - 80088f8: b29b uxth r3, r3 - 80088fa: 2b00 cmp r3, #0 - 80088fc: d19d bne.n 800883a - 80088fe: e085 b.n 8008a0c + 8008b70: 68fb ldr r3, [r7, #12] + 8008b72: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8008b74: b29b uxth r3, r3 + 8008b76: 2b00 cmp r3, #0 + 8008b78: d1a3 bne.n 8008ac2 + 8008b7a: 68fb ldr r3, [r7, #12] + 8008b7c: 2246 movs r2, #70 ; 0x46 + 8008b7e: 5a9b ldrh r3, [r3, r2] + 8008b80: b29b uxth r3, r3 + 8008b82: 2b00 cmp r3, #0 + 8008b84: d19d bne.n 8008ac2 + 8008b86: e085 b.n 8008c94 } } /* Transmit and Receive data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - 8008900: 68fb ldr r3, [r7, #12] - 8008902: 685b ldr r3, [r3, #4] - 8008904: 2b00 cmp r3, #0 - 8008906: d005 beq.n 8008914 - 8008908: 2312 movs r3, #18 - 800890a: 18fb adds r3, r7, r3 - 800890c: 881b ldrh r3, [r3, #0] - 800890e: 2b01 cmp r3, #1 - 8008910: d000 beq.n 8008914 - 8008912: e070 b.n 80089f6 + 8008b88: 68fb ldr r3, [r7, #12] + 8008b8a: 685b ldr r3, [r3, #4] + 8008b8c: 2b00 cmp r3, #0 + 8008b8e: d005 beq.n 8008b9c + 8008b90: 2312 movs r3, #18 + 8008b92: 18fb adds r3, r7, r3 + 8008b94: 881b ldrh r3, [r3, #0] + 8008b96: 2b01 cmp r3, #1 + 8008b98: d000 beq.n 8008b9c + 8008b9a: e070 b.n 8008c7e { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); - 8008914: 68fb ldr r3, [r7, #12] - 8008916: 6b9a ldr r2, [r3, #56] ; 0x38 - 8008918: 68fb ldr r3, [r7, #12] - 800891a: 681b ldr r3, [r3, #0] - 800891c: 330c adds r3, #12 - 800891e: 7812 ldrb r2, [r2, #0] - 8008920: 701a strb r2, [r3, #0] + 8008b9c: 68fb ldr r3, [r7, #12] + 8008b9e: 6b9a ldr r2, [r3, #56] ; 0x38 + 8008ba0: 68fb ldr r3, [r7, #12] + 8008ba2: 681b ldr r3, [r3, #0] + 8008ba4: 330c adds r3, #12 + 8008ba6: 7812 ldrb r2, [r2, #0] + 8008ba8: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); - 8008922: 68fb ldr r3, [r7, #12] - 8008924: 6b9b ldr r3, [r3, #56] ; 0x38 - 8008926: 1c5a adds r2, r3, #1 - 8008928: 68fb ldr r3, [r7, #12] - 800892a: 639a str r2, [r3, #56] ; 0x38 + 8008baa: 68fb ldr r3, [r7, #12] + 8008bac: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008bae: 1c5a adds r2, r3, #1 + 8008bb0: 68fb ldr r3, [r7, #12] + 8008bb2: 639a str r2, [r3, #56] ; 0x38 hspi->TxXferCount--; - 800892c: 68fb ldr r3, [r7, #12] - 800892e: 8fdb ldrh r3, [r3, #62] ; 0x3e - 8008930: b29b uxth r3, r3 - 8008932: 3b01 subs r3, #1 - 8008934: b29a uxth r2, r3 - 8008936: 68fb ldr r3, [r7, #12] - 8008938: 87da strh r2, [r3, #62] ; 0x3e + 8008bb4: 68fb ldr r3, [r7, #12] + 8008bb6: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8008bb8: b29b uxth r3, r3 + 8008bba: 3b01 subs r3, #1 + 8008bbc: b29a uxth r2, r3 + 8008bbe: 68fb ldr r3, [r7, #12] + 8008bc0: 87da strh r2, [r3, #62] ; 0x3e } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - 800893a: e05c b.n 80089f6 + 8008bc2: e05c b.n 8008c7e { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) - 800893c: 68fb ldr r3, [r7, #12] - 800893e: 681b ldr r3, [r3, #0] - 8008940: 689b ldr r3, [r3, #8] - 8008942: 2202 movs r2, #2 - 8008944: 4013 ands r3, r2 - 8008946: 2b02 cmp r3, #2 - 8008948: d11c bne.n 8008984 - 800894a: 68fb ldr r3, [r7, #12] - 800894c: 8fdb ldrh r3, [r3, #62] ; 0x3e - 800894e: b29b uxth r3, r3 - 8008950: 2b00 cmp r3, #0 - 8008952: d017 beq.n 8008984 - 8008954: 6a7b ldr r3, [r7, #36] ; 0x24 - 8008956: 2b01 cmp r3, #1 - 8008958: d114 bne.n 8008984 + 8008bc4: 68fb ldr r3, [r7, #12] + 8008bc6: 681b ldr r3, [r3, #0] + 8008bc8: 689b ldr r3, [r3, #8] + 8008bca: 2202 movs r2, #2 + 8008bcc: 4013 ands r3, r2 + 8008bce: 2b02 cmp r3, #2 + 8008bd0: d11c bne.n 8008c0c + 8008bd2: 68fb ldr r3, [r7, #12] + 8008bd4: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8008bd6: b29b uxth r3, r3 + 8008bd8: 2b00 cmp r3, #0 + 8008bda: d017 beq.n 8008c0c + 8008bdc: 6a7b ldr r3, [r7, #36] ; 0x24 + 8008bde: 2b01 cmp r3, #1 + 8008be0: d114 bne.n 8008c0c { *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); - 800895a: 68fb ldr r3, [r7, #12] - 800895c: 6b9a ldr r2, [r3, #56] ; 0x38 - 800895e: 68fb ldr r3, [r7, #12] - 8008960: 681b ldr r3, [r3, #0] - 8008962: 330c adds r3, #12 - 8008964: 7812 ldrb r2, [r2, #0] - 8008966: 701a strb r2, [r3, #0] + 8008be2: 68fb ldr r3, [r7, #12] + 8008be4: 6b9a ldr r2, [r3, #56] ; 0x38 + 8008be6: 68fb ldr r3, [r7, #12] + 8008be8: 681b ldr r3, [r3, #0] + 8008bea: 330c adds r3, #12 + 8008bec: 7812 ldrb r2, [r2, #0] + 8008bee: 701a strb r2, [r3, #0] hspi->pTxBuffPtr++; - 8008968: 68fb ldr r3, [r7, #12] - 800896a: 6b9b ldr r3, [r3, #56] ; 0x38 - 800896c: 1c5a adds r2, r3, #1 - 800896e: 68fb ldr r3, [r7, #12] - 8008970: 639a str r2, [r3, #56] ; 0x38 + 8008bf0: 68fb ldr r3, [r7, #12] + 8008bf2: 6b9b ldr r3, [r3, #56] ; 0x38 + 8008bf4: 1c5a adds r2, r3, #1 + 8008bf6: 68fb ldr r3, [r7, #12] + 8008bf8: 639a str r2, [r3, #56] ; 0x38 hspi->TxXferCount--; - 8008972: 68fb ldr r3, [r7, #12] - 8008974: 8fdb ldrh r3, [r3, #62] ; 0x3e - 8008976: b29b uxth r3, r3 - 8008978: 3b01 subs r3, #1 - 800897a: b29a uxth r2, r3 - 800897c: 68fb ldr r3, [r7, #12] - 800897e: 87da strh r2, [r3, #62] ; 0x3e + 8008bfa: 68fb ldr r3, [r7, #12] + 8008bfc: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8008bfe: b29b uxth r3, r3 + 8008c00: 3b01 subs r3, #1 + 8008c02: b29a uxth r2, r3 + 8008c04: 68fb ldr r3, [r7, #12] + 8008c06: 87da strh r2, [r3, #62] ; 0x3e /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; - 8008980: 2300 movs r3, #0 - 8008982: 627b str r3, [r7, #36] ; 0x24 + 8008c08: 2300 movs r3, #0 + 8008c0a: 627b str r3, [r7, #36] ; 0x24 } #endif /* USE_SPI_CRC */ } /* Wait until RXNE flag is reset */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) - 8008984: 68fb ldr r3, [r7, #12] - 8008986: 681b ldr r3, [r3, #0] - 8008988: 689b ldr r3, [r3, #8] - 800898a: 2201 movs r2, #1 - 800898c: 4013 ands r3, r2 - 800898e: 2b01 cmp r3, #1 - 8008990: d11e bne.n 80089d0 - 8008992: 68fb ldr r3, [r7, #12] - 8008994: 2246 movs r2, #70 ; 0x46 - 8008996: 5a9b ldrh r3, [r3, r2] - 8008998: b29b uxth r3, r3 - 800899a: 2b00 cmp r3, #0 - 800899c: d018 beq.n 80089d0 + 8008c0c: 68fb ldr r3, [r7, #12] + 8008c0e: 681b ldr r3, [r3, #0] + 8008c10: 689b ldr r3, [r3, #8] + 8008c12: 2201 movs r2, #1 + 8008c14: 4013 ands r3, r2 + 8008c16: 2b01 cmp r3, #1 + 8008c18: d11e bne.n 8008c58 + 8008c1a: 68fb ldr r3, [r7, #12] + 8008c1c: 2246 movs r2, #70 ; 0x46 + 8008c1e: 5a9b ldrh r3, [r3, r2] + 8008c20: b29b uxth r3, r3 + 8008c22: 2b00 cmp r3, #0 + 8008c24: d018 beq.n 8008c58 { (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; - 800899e: 68fb ldr r3, [r7, #12] - 80089a0: 681b ldr r3, [r3, #0] - 80089a2: 330c adds r3, #12 - 80089a4: 001a movs r2, r3 - 80089a6: 68fb ldr r3, [r7, #12] - 80089a8: 6c1b ldr r3, [r3, #64] ; 0x40 - 80089aa: 7812 ldrb r2, [r2, #0] - 80089ac: b2d2 uxtb r2, r2 - 80089ae: 701a strb r2, [r3, #0] + 8008c26: 68fb ldr r3, [r7, #12] + 8008c28: 681b ldr r3, [r3, #0] + 8008c2a: 330c adds r3, #12 + 8008c2c: 001a movs r2, r3 + 8008c2e: 68fb ldr r3, [r7, #12] + 8008c30: 6c1b ldr r3, [r3, #64] ; 0x40 + 8008c32: 7812 ldrb r2, [r2, #0] + 8008c34: b2d2 uxtb r2, r2 + 8008c36: 701a strb r2, [r3, #0] hspi->pRxBuffPtr++; - 80089b0: 68fb ldr r3, [r7, #12] - 80089b2: 6c1b ldr r3, [r3, #64] ; 0x40 - 80089b4: 1c5a adds r2, r3, #1 - 80089b6: 68fb ldr r3, [r7, #12] - 80089b8: 641a str r2, [r3, #64] ; 0x40 + 8008c38: 68fb ldr r3, [r7, #12] + 8008c3a: 6c1b ldr r3, [r3, #64] ; 0x40 + 8008c3c: 1c5a adds r2, r3, #1 + 8008c3e: 68fb ldr r3, [r7, #12] + 8008c40: 641a str r2, [r3, #64] ; 0x40 hspi->RxXferCount--; - 80089ba: 68fb ldr r3, [r7, #12] - 80089bc: 2246 movs r2, #70 ; 0x46 - 80089be: 5a9b ldrh r3, [r3, r2] - 80089c0: b29b uxth r3, r3 - 80089c2: 3b01 subs r3, #1 - 80089c4: b299 uxth r1, r3 - 80089c6: 68fb ldr r3, [r7, #12] - 80089c8: 2246 movs r2, #70 ; 0x46 - 80089ca: 5299 strh r1, [r3, r2] + 8008c42: 68fb ldr r3, [r7, #12] + 8008c44: 2246 movs r2, #70 ; 0x46 + 8008c46: 5a9b ldrh r3, [r3, r2] + 8008c48: b29b uxth r3, r3 + 8008c4a: 3b01 subs r3, #1 + 8008c4c: b299 uxth r1, r3 + 8008c4e: 68fb ldr r3, [r7, #12] + 8008c50: 2246 movs r2, #70 ; 0x46 + 8008c52: 5299 strh r1, [r3, r2] /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; - 80089cc: 2301 movs r3, #1 - 80089ce: 627b str r3, [r7, #36] ; 0x24 + 8008c54: 2301 movs r3, #1 + 8008c56: 627b str r3, [r7, #36] ; 0x24 } if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) - 80089d0: f7fd fb02 bl 8005fd8 - 80089d4: 0002 movs r2, r0 - 80089d6: 69fb ldr r3, [r7, #28] - 80089d8: 1ad3 subs r3, r2, r3 - 80089da: 6b3a ldr r2, [r7, #48] ; 0x30 - 80089dc: 429a cmp r2, r3 - 80089de: d802 bhi.n 80089e6 - 80089e0: 6b3b ldr r3, [r7, #48] ; 0x30 - 80089e2: 3301 adds r3, #1 - 80089e4: d102 bne.n 80089ec - 80089e6: 6b3b ldr r3, [r7, #48] ; 0x30 - 80089e8: 2b00 cmp r3, #0 - 80089ea: d104 bne.n 80089f6 + 8008c58: f7fd fb02 bl 8006260 + 8008c5c: 0002 movs r2, r0 + 8008c5e: 69fb ldr r3, [r7, #28] + 8008c60: 1ad3 subs r3, r2, r3 + 8008c62: 6b3a ldr r2, [r7, #48] ; 0x30 + 8008c64: 429a cmp r2, r3 + 8008c66: d802 bhi.n 8008c6e + 8008c68: 6b3b ldr r3, [r7, #48] ; 0x30 + 8008c6a: 3301 adds r3, #1 + 8008c6c: d102 bne.n 8008c74 + 8008c6e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8008c70: 2b00 cmp r3, #0 + 8008c72: d104 bne.n 8008c7e { errorcode = HAL_TIMEOUT; - 80089ec: 2323 movs r3, #35 ; 0x23 - 80089ee: 18fb adds r3, r7, r3 - 80089f0: 2203 movs r2, #3 - 80089f2: 701a strb r2, [r3, #0] + 8008c74: 2323 movs r3, #35 ; 0x23 + 8008c76: 18fb adds r3, r7, r3 + 8008c78: 2203 movs r2, #3 + 8008c7a: 701a strb r2, [r3, #0] goto error; - 80089f4: e01b b.n 8008a2e + 8008c7c: e01b b.n 8008cb6 while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - 80089f6: 68fb ldr r3, [r7, #12] - 80089f8: 8fdb ldrh r3, [r3, #62] ; 0x3e - 80089fa: b29b uxth r3, r3 - 80089fc: 2b00 cmp r3, #0 - 80089fe: d19d bne.n 800893c - 8008a00: 68fb ldr r3, [r7, #12] - 8008a02: 2246 movs r2, #70 ; 0x46 - 8008a04: 5a9b ldrh r3, [r3, r2] - 8008a06: b29b uxth r3, r3 - 8008a08: 2b00 cmp r3, #0 - 8008a0a: d197 bne.n 800893c + 8008c7e: 68fb ldr r3, [r7, #12] + 8008c80: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8008c82: b29b uxth r3, r3 + 8008c84: 2b00 cmp r3, #0 + 8008c86: d19d bne.n 8008bc4 + 8008c88: 68fb ldr r3, [r7, #12] + 8008c8a: 2246 movs r2, #70 ; 0x46 + 8008c8c: 5a9b ldrh r3, [r3, r2] + 8008c8e: b29b uxth r3, r3 + 8008c90: 2b00 cmp r3, #0 + 8008c92: d197 bne.n 8008bc4 errorcode = HAL_ERROR; } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) - 8008a0c: 69fa ldr r2, [r7, #28] - 8008a0e: 6b39 ldr r1, [r7, #48] ; 0x30 - 8008a10: 68fb ldr r3, [r7, #12] - 8008a12: 0018 movs r0, r3 - 8008a14: f000 f9aa bl 8008d6c - 8008a18: 1e03 subs r3, r0, #0 - 8008a1a: d007 beq.n 8008a2c + 8008c94: 69fa ldr r2, [r7, #28] + 8008c96: 6b39 ldr r1, [r7, #48] ; 0x30 + 8008c98: 68fb ldr r3, [r7, #12] + 8008c9a: 0018 movs r0, r3 + 8008c9c: f000 f9aa bl 8008ff4 + 8008ca0: 1e03 subs r3, r0, #0 + 8008ca2: d007 beq.n 8008cb4 { errorcode = HAL_ERROR; - 8008a1c: 2323 movs r3, #35 ; 0x23 - 8008a1e: 18fb adds r3, r7, r3 - 8008a20: 2201 movs r2, #1 - 8008a22: 701a strb r2, [r3, #0] + 8008ca4: 2323 movs r3, #35 ; 0x23 + 8008ca6: 18fb adds r3, r7, r3 + 8008ca8: 2201 movs r2, #1 + 8008caa: 701a strb r2, [r3, #0] hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - 8008a24: 68fb ldr r3, [r7, #12] - 8008a26: 2220 movs r2, #32 - 8008a28: 661a str r2, [r3, #96] ; 0x60 - 8008a2a: e000 b.n 8008a2e + 8008cac: 68fb ldr r3, [r7, #12] + 8008cae: 2220 movs r2, #32 + 8008cb0: 661a str r2, [r3, #96] ; 0x60 + 8008cb2: e000 b.n 8008cb6 } error : - 8008a2c: 46c0 nop ; (mov r8, r8) + 8008cb4: 46c0 nop ; (mov r8, r8) hspi->State = HAL_SPI_STATE_READY; - 8008a2e: 68fb ldr r3, [r7, #12] - 8008a30: 225d movs r2, #93 ; 0x5d - 8008a32: 2101 movs r1, #1 - 8008a34: 5499 strb r1, [r3, r2] + 8008cb6: 68fb ldr r3, [r7, #12] + 8008cb8: 225d movs r2, #93 ; 0x5d + 8008cba: 2101 movs r1, #1 + 8008cbc: 5499 strb r1, [r3, r2] __HAL_UNLOCK(hspi); - 8008a36: 68fb ldr r3, [r7, #12] - 8008a38: 225c movs r2, #92 ; 0x5c - 8008a3a: 2100 movs r1, #0 - 8008a3c: 5499 strb r1, [r3, r2] + 8008cbe: 68fb ldr r3, [r7, #12] + 8008cc0: 225c movs r2, #92 ; 0x5c + 8008cc2: 2100 movs r1, #0 + 8008cc4: 5499 strb r1, [r3, r2] return errorcode; - 8008a3e: 2323 movs r3, #35 ; 0x23 - 8008a40: 18fb adds r3, r7, r3 - 8008a42: 781b ldrb r3, [r3, #0] + 8008cc6: 2323 movs r3, #35 ; 0x23 + 8008cc8: 18fb adds r3, r7, r3 + 8008cca: 781b ldrb r3, [r3, #0] } - 8008a44: 0018 movs r0, r3 - 8008a46: 46bd mov sp, r7 - 8008a48: b00a add sp, #40 ; 0x28 - 8008a4a: bd80 pop {r7, pc} - 8008a4c: ffffefff .word 0xffffefff + 8008ccc: 0018 movs r0, r3 + 8008cce: 46bd mov sp, r7 + 8008cd0: b00a add sp, #40 ; 0x28 + 8008cd2: bd80 pop {r7, pc} + 8008cd4: ffffefff .word 0xffffefff -08008a50 : +08008cd8 : * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, uint32_t Timeout, uint32_t Tickstart) { - 8008a50: b580 push {r7, lr} - 8008a52: b088 sub sp, #32 - 8008a54: af00 add r7, sp, #0 - 8008a56: 60f8 str r0, [r7, #12] - 8008a58: 60b9 str r1, [r7, #8] - 8008a5a: 603b str r3, [r7, #0] - 8008a5c: 1dfb adds r3, r7, #7 - 8008a5e: 701a strb r2, [r3, #0] + 8008cd8: b580 push {r7, lr} + 8008cda: b088 sub sp, #32 + 8008cdc: af00 add r7, sp, #0 + 8008cde: 60f8 str r0, [r7, #12] + 8008ce0: 60b9 str r1, [r7, #8] + 8008ce2: 603b str r3, [r7, #0] + 8008ce4: 1dfb adds r3, r7, #7 + 8008ce6: 701a strb r2, [r3, #0] __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); - 8008a60: f7fd faba bl 8005fd8 - 8008a64: 0002 movs r2, r0 - 8008a66: 6abb ldr r3, [r7, #40] ; 0x28 - 8008a68: 1a9b subs r3, r3, r2 - 8008a6a: 683a ldr r2, [r7, #0] - 8008a6c: 18d3 adds r3, r2, r3 - 8008a6e: 61fb str r3, [r7, #28] + 8008ce8: f7fd faba bl 8006260 + 8008cec: 0002 movs r2, r0 + 8008cee: 6abb ldr r3, [r7, #40] ; 0x28 + 8008cf0: 1a9b subs r3, r3, r2 + 8008cf2: 683a ldr r2, [r7, #0] + 8008cf4: 18d3 adds r3, r2, r3 + 8008cf6: 61fb str r3, [r7, #28] tmp_tickstart = HAL_GetTick(); - 8008a70: f7fd fab2 bl 8005fd8 - 8008a74: 0003 movs r3, r0 - 8008a76: 61bb str r3, [r7, #24] + 8008cf8: f7fd fab2 bl 8006260 + 8008cfc: 0003 movs r3, r0 + 8008cfe: 61bb str r3, [r7, #24] /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); - 8008a78: 4b3a ldr r3, [pc, #232] ; (8008b64 ) - 8008a7a: 681b ldr r3, [r3, #0] - 8008a7c: 015b lsls r3, r3, #5 - 8008a7e: 0d1b lsrs r3, r3, #20 - 8008a80: 69fa ldr r2, [r7, #28] - 8008a82: 4353 muls r3, r2 - 8008a84: 617b str r3, [r7, #20] + 8008d00: 4b3a ldr r3, [pc, #232] ; (8008dec ) + 8008d02: 681b ldr r3, [r3, #0] + 8008d04: 015b lsls r3, r3, #5 + 8008d06: 0d1b lsrs r3, r3, #20 + 8008d08: 69fa ldr r2, [r7, #28] + 8008d0a: 4353 muls r3, r2 + 8008d0c: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) - 8008a86: e058 b.n 8008b3a + 8008d0e: e058 b.n 8008dc2 { if (Timeout != HAL_MAX_DELAY) - 8008a88: 683b ldr r3, [r7, #0] - 8008a8a: 3301 adds r3, #1 - 8008a8c: d055 beq.n 8008b3a + 8008d10: 683b ldr r3, [r7, #0] + 8008d12: 3301 adds r3, #1 + 8008d14: d055 beq.n 8008dc2 { if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) - 8008a8e: f7fd faa3 bl 8005fd8 - 8008a92: 0002 movs r2, r0 - 8008a94: 69bb ldr r3, [r7, #24] - 8008a96: 1ad3 subs r3, r2, r3 - 8008a98: 69fa ldr r2, [r7, #28] - 8008a9a: 429a cmp r2, r3 - 8008a9c: d902 bls.n 8008aa4 - 8008a9e: 69fb ldr r3, [r7, #28] - 8008aa0: 2b00 cmp r3, #0 - 8008aa2: d142 bne.n 8008b2a + 8008d16: f7fd faa3 bl 8006260 + 8008d1a: 0002 movs r2, r0 + 8008d1c: 69bb ldr r3, [r7, #24] + 8008d1e: 1ad3 subs r3, r2, r3 + 8008d20: 69fa ldr r2, [r7, #28] + 8008d22: 429a cmp r2, r3 + 8008d24: d902 bls.n 8008d2c + 8008d26: 69fb ldr r3, [r7, #28] + 8008d28: 2b00 cmp r3, #0 + 8008d2a: d142 bne.n 8008db2 /* Disable the SPI and reset the CRC: the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation */ /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); - 8008aa4: 68fb ldr r3, [r7, #12] - 8008aa6: 681b ldr r3, [r3, #0] - 8008aa8: 685a ldr r2, [r3, #4] - 8008aaa: 68fb ldr r3, [r7, #12] - 8008aac: 681b ldr r3, [r3, #0] - 8008aae: 21e0 movs r1, #224 ; 0xe0 - 8008ab0: 438a bics r2, r1 - 8008ab2: 605a str r2, [r3, #4] + 8008d2c: 68fb ldr r3, [r7, #12] + 8008d2e: 681b ldr r3, [r3, #0] + 8008d30: 685a ldr r2, [r3, #4] + 8008d32: 68fb ldr r3, [r7, #12] + 8008d34: 681b ldr r3, [r3, #0] + 8008d36: 21e0 movs r1, #224 ; 0xe0 + 8008d38: 438a bics r2, r1 + 8008d3a: 605a str r2, [r3, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - 8008ab4: 68fb ldr r3, [r7, #12] - 8008ab6: 685a ldr r2, [r3, #4] - 8008ab8: 2382 movs r3, #130 ; 0x82 - 8008aba: 005b lsls r3, r3, #1 - 8008abc: 429a cmp r2, r3 - 8008abe: d113 bne.n 8008ae8 - 8008ac0: 68fb ldr r3, [r7, #12] - 8008ac2: 689a ldr r2, [r3, #8] - 8008ac4: 2380 movs r3, #128 ; 0x80 - 8008ac6: 021b lsls r3, r3, #8 - 8008ac8: 429a cmp r2, r3 - 8008aca: d005 beq.n 8008ad8 + 8008d3c: 68fb ldr r3, [r7, #12] + 8008d3e: 685a ldr r2, [r3, #4] + 8008d40: 2382 movs r3, #130 ; 0x82 + 8008d42: 005b lsls r3, r3, #1 + 8008d44: 429a cmp r2, r3 + 8008d46: d113 bne.n 8008d70 + 8008d48: 68fb ldr r3, [r7, #12] + 8008d4a: 689a ldr r2, [r3, #8] + 8008d4c: 2380 movs r3, #128 ; 0x80 + 8008d4e: 021b lsls r3, r3, #8 + 8008d50: 429a cmp r2, r3 + 8008d52: d005 beq.n 8008d60 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - 8008acc: 68fb ldr r3, [r7, #12] - 8008ace: 689a ldr r2, [r3, #8] - 8008ad0: 2380 movs r3, #128 ; 0x80 - 8008ad2: 00db lsls r3, r3, #3 - 8008ad4: 429a cmp r2, r3 - 8008ad6: d107 bne.n 8008ae8 + 8008d54: 68fb ldr r3, [r7, #12] + 8008d56: 689a ldr r2, [r3, #8] + 8008d58: 2380 movs r3, #128 ; 0x80 + 8008d5a: 00db lsls r3, r3, #3 + 8008d5c: 429a cmp r2, r3 + 8008d5e: d107 bne.n 8008d70 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 8008ad8: 68fb ldr r3, [r7, #12] - 8008ada: 681b ldr r3, [r3, #0] - 8008adc: 681a ldr r2, [r3, #0] - 8008ade: 68fb ldr r3, [r7, #12] - 8008ae0: 681b ldr r3, [r3, #0] - 8008ae2: 2140 movs r1, #64 ; 0x40 - 8008ae4: 438a bics r2, r1 - 8008ae6: 601a str r2, [r3, #0] + 8008d60: 68fb ldr r3, [r7, #12] + 8008d62: 681b ldr r3, [r3, #0] + 8008d64: 681a ldr r2, [r3, #0] + 8008d66: 68fb ldr r3, [r7, #12] + 8008d68: 681b ldr r3, [r3, #0] + 8008d6a: 2140 movs r1, #64 ; 0x40 + 8008d6c: 438a bics r2, r1 + 8008d6e: 601a str r2, [r3, #0] } /* Reset CRC Calculation */ if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - 8008ae8: 68fb ldr r3, [r7, #12] - 8008aea: 6a9a ldr r2, [r3, #40] ; 0x28 - 8008aec: 2380 movs r3, #128 ; 0x80 - 8008aee: 019b lsls r3, r3, #6 - 8008af0: 429a cmp r2, r3 - 8008af2: d110 bne.n 8008b16 + 8008d70: 68fb ldr r3, [r7, #12] + 8008d72: 6a9a ldr r2, [r3, #40] ; 0x28 + 8008d74: 2380 movs r3, #128 ; 0x80 + 8008d76: 019b lsls r3, r3, #6 + 8008d78: 429a cmp r2, r3 + 8008d7a: d110 bne.n 8008d9e { SPI_RESET_CRC(hspi); - 8008af4: 68fb ldr r3, [r7, #12] - 8008af6: 681b ldr r3, [r3, #0] - 8008af8: 681a ldr r2, [r3, #0] - 8008afa: 68fb ldr r3, [r7, #12] - 8008afc: 681b ldr r3, [r3, #0] - 8008afe: 491a ldr r1, [pc, #104] ; (8008b68 ) - 8008b00: 400a ands r2, r1 - 8008b02: 601a str r2, [r3, #0] - 8008b04: 68fb ldr r3, [r7, #12] - 8008b06: 681b ldr r3, [r3, #0] - 8008b08: 681a ldr r2, [r3, #0] - 8008b0a: 68fb ldr r3, [r7, #12] - 8008b0c: 681b ldr r3, [r3, #0] - 8008b0e: 2180 movs r1, #128 ; 0x80 - 8008b10: 0189 lsls r1, r1, #6 - 8008b12: 430a orrs r2, r1 - 8008b14: 601a str r2, [r3, #0] + 8008d7c: 68fb ldr r3, [r7, #12] + 8008d7e: 681b ldr r3, [r3, #0] + 8008d80: 681a ldr r2, [r3, #0] + 8008d82: 68fb ldr r3, [r7, #12] + 8008d84: 681b ldr r3, [r3, #0] + 8008d86: 491a ldr r1, [pc, #104] ; (8008df0 ) + 8008d88: 400a ands r2, r1 + 8008d8a: 601a str r2, [r3, #0] + 8008d8c: 68fb ldr r3, [r7, #12] + 8008d8e: 681b ldr r3, [r3, #0] + 8008d90: 681a ldr r2, [r3, #0] + 8008d92: 68fb ldr r3, [r7, #12] + 8008d94: 681b ldr r3, [r3, #0] + 8008d96: 2180 movs r1, #128 ; 0x80 + 8008d98: 0189 lsls r1, r1, #6 + 8008d9a: 430a orrs r2, r1 + 8008d9c: 601a str r2, [r3, #0] } hspi->State = HAL_SPI_STATE_READY; - 8008b16: 68fb ldr r3, [r7, #12] - 8008b18: 225d movs r2, #93 ; 0x5d - 8008b1a: 2101 movs r1, #1 - 8008b1c: 5499 strb r1, [r3, r2] + 8008d9e: 68fb ldr r3, [r7, #12] + 8008da0: 225d movs r2, #93 ; 0x5d + 8008da2: 2101 movs r1, #1 + 8008da4: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hspi); - 8008b1e: 68fb ldr r3, [r7, #12] - 8008b20: 225c movs r2, #92 ; 0x5c - 8008b22: 2100 movs r1, #0 - 8008b24: 5499 strb r1, [r3, r2] + 8008da6: 68fb ldr r3, [r7, #12] + 8008da8: 225c movs r2, #92 ; 0x5c + 8008daa: 2100 movs r1, #0 + 8008dac: 5499 strb r1, [r3, r2] return HAL_TIMEOUT; - 8008b26: 2303 movs r3, #3 - 8008b28: e017 b.n 8008b5a + 8008dae: 2303 movs r3, #3 + 8008db0: e017 b.n 8008de2 } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ if (count == 0U) - 8008b2a: 697b ldr r3, [r7, #20] - 8008b2c: 2b00 cmp r3, #0 - 8008b2e: d101 bne.n 8008b34 + 8008db2: 697b ldr r3, [r7, #20] + 8008db4: 2b00 cmp r3, #0 + 8008db6: d101 bne.n 8008dbc { tmp_timeout = 0U; - 8008b30: 2300 movs r3, #0 - 8008b32: 61fb str r3, [r7, #28] + 8008db8: 2300 movs r3, #0 + 8008dba: 61fb str r3, [r7, #28] } count--; - 8008b34: 697b ldr r3, [r7, #20] - 8008b36: 3b01 subs r3, #1 - 8008b38: 617b str r3, [r7, #20] + 8008dbc: 697b ldr r3, [r7, #20] + 8008dbe: 3b01 subs r3, #1 + 8008dc0: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) - 8008b3a: 68fb ldr r3, [r7, #12] - 8008b3c: 681b ldr r3, [r3, #0] - 8008b3e: 689b ldr r3, [r3, #8] - 8008b40: 68ba ldr r2, [r7, #8] - 8008b42: 4013 ands r3, r2 - 8008b44: 68ba ldr r2, [r7, #8] - 8008b46: 1ad3 subs r3, r2, r3 - 8008b48: 425a negs r2, r3 - 8008b4a: 4153 adcs r3, r2 - 8008b4c: b2db uxtb r3, r3 - 8008b4e: 001a movs r2, r3 - 8008b50: 1dfb adds r3, r7, #7 - 8008b52: 781b ldrb r3, [r3, #0] - 8008b54: 429a cmp r2, r3 - 8008b56: d197 bne.n 8008a88 + 8008dc2: 68fb ldr r3, [r7, #12] + 8008dc4: 681b ldr r3, [r3, #0] + 8008dc6: 689b ldr r3, [r3, #8] + 8008dc8: 68ba ldr r2, [r7, #8] + 8008dca: 4013 ands r3, r2 + 8008dcc: 68ba ldr r2, [r7, #8] + 8008dce: 1ad3 subs r3, r2, r3 + 8008dd0: 425a negs r2, r3 + 8008dd2: 4153 adcs r3, r2 + 8008dd4: b2db uxtb r3, r3 + 8008dd6: 001a movs r2, r3 + 8008dd8: 1dfb adds r3, r7, #7 + 8008dda: 781b ldrb r3, [r3, #0] + 8008ddc: 429a cmp r2, r3 + 8008dde: d197 bne.n 8008d10 } } return HAL_OK; - 8008b58: 2300 movs r3, #0 + 8008de0: 2300 movs r3, #0 } - 8008b5a: 0018 movs r0, r3 - 8008b5c: 46bd mov sp, r7 - 8008b5e: b008 add sp, #32 - 8008b60: bd80 pop {r7, pc} - 8008b62: 46c0 nop ; (mov r8, r8) - 8008b64: 20000040 .word 0x20000040 - 8008b68: ffffdfff .word 0xffffdfff + 8008de2: 0018 movs r0, r3 + 8008de4: 46bd mov sp, r7 + 8008de6: b008 add sp, #32 + 8008de8: bd80 pop {r7, pc} + 8008dea: 46c0 nop ; (mov r8, r8) + 8008dec: 20000040 .word 0x20000040 + 8008df0: ffffdfff .word 0xffffdfff -08008b6c : +08008df4 : * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout, uint32_t Tickstart) { - 8008b6c: b580 push {r7, lr} - 8008b6e: b08a sub sp, #40 ; 0x28 - 8008b70: af00 add r7, sp, #0 - 8008b72: 60f8 str r0, [r7, #12] - 8008b74: 60b9 str r1, [r7, #8] - 8008b76: 607a str r2, [r7, #4] - 8008b78: 603b str r3, [r7, #0] + 8008df4: b580 push {r7, lr} + 8008df6: b08a sub sp, #40 ; 0x28 + 8008df8: af00 add r7, sp, #0 + 8008dfa: 60f8 str r0, [r7, #12] + 8008dfc: 60b9 str r1, [r7, #8] + 8008dfe: 607a str r2, [r7, #4] + 8008e00: 603b str r3, [r7, #0] __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; __IO uint8_t *ptmpreg8; __IO uint8_t tmpreg8 = 0; - 8008b7a: 2317 movs r3, #23 - 8008b7c: 18fb adds r3, r7, r3 - 8008b7e: 2200 movs r2, #0 - 8008b80: 701a strb r2, [r3, #0] + 8008e02: 2317 movs r3, #23 + 8008e04: 18fb adds r3, r7, r3 + 8008e06: 2200 movs r2, #0 + 8008e08: 701a strb r2, [r3, #0] /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); - 8008b82: f7fd fa29 bl 8005fd8 - 8008b86: 0002 movs r2, r0 - 8008b88: 6b3b ldr r3, [r7, #48] ; 0x30 - 8008b8a: 1a9b subs r3, r3, r2 - 8008b8c: 683a ldr r2, [r7, #0] - 8008b8e: 18d3 adds r3, r2, r3 - 8008b90: 627b str r3, [r7, #36] ; 0x24 + 8008e0a: f7fd fa29 bl 8006260 + 8008e0e: 0002 movs r2, r0 + 8008e10: 6b3b ldr r3, [r7, #48] ; 0x30 + 8008e12: 1a9b subs r3, r3, r2 + 8008e14: 683a ldr r2, [r7, #0] + 8008e16: 18d3 adds r3, r2, r3 + 8008e18: 627b str r3, [r7, #36] ; 0x24 tmp_tickstart = HAL_GetTick(); - 8008b92: f7fd fa21 bl 8005fd8 - 8008b96: 0003 movs r3, r0 - 8008b98: 623b str r3, [r7, #32] + 8008e1a: f7fd fa21 bl 8006260 + 8008e1e: 0003 movs r3, r0 + 8008e20: 623b str r3, [r7, #32] /* Initialize the 8bit temporary pointer */ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; - 8008b9a: 68fb ldr r3, [r7, #12] - 8008b9c: 681b ldr r3, [r3, #0] - 8008b9e: 330c adds r3, #12 - 8008ba0: 61fb str r3, [r7, #28] + 8008e22: 68fb ldr r3, [r7, #12] + 8008e24: 681b ldr r3, [r3, #0] + 8008e26: 330c adds r3, #12 + 8008e28: 61fb str r3, [r7, #28] /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U); - 8008ba2: 4b41 ldr r3, [pc, #260] ; (8008ca8 ) - 8008ba4: 681a ldr r2, [r3, #0] - 8008ba6: 0013 movs r3, r2 - 8008ba8: 009b lsls r3, r3, #2 - 8008baa: 189b adds r3, r3, r2 - 8008bac: 00da lsls r2, r3, #3 - 8008bae: 1ad3 subs r3, r2, r3 - 8008bb0: 0d1b lsrs r3, r3, #20 - 8008bb2: 6a7a ldr r2, [r7, #36] ; 0x24 - 8008bb4: 4353 muls r3, r2 - 8008bb6: 61bb str r3, [r7, #24] + 8008e2a: 4b41 ldr r3, [pc, #260] ; (8008f30 ) + 8008e2c: 681a ldr r2, [r3, #0] + 8008e2e: 0013 movs r3, r2 + 8008e30: 009b lsls r3, r3, #2 + 8008e32: 189b adds r3, r3, r2 + 8008e34: 00da lsls r2, r3, #3 + 8008e36: 1ad3 subs r3, r2, r3 + 8008e38: 0d1b lsrs r3, r3, #20 + 8008e3a: 6a7a ldr r2, [r7, #36] ; 0x24 + 8008e3c: 4353 muls r3, r2 + 8008e3e: 61bb str r3, [r7, #24] while ((hspi->Instance->SR & Fifo) != State) - 8008bb8: e068 b.n 8008c8c + 8008e40: e068 b.n 8008f14 { if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY)) - 8008bba: 68ba ldr r2, [r7, #8] - 8008bbc: 23c0 movs r3, #192 ; 0xc0 - 8008bbe: 00db lsls r3, r3, #3 - 8008bc0: 429a cmp r2, r3 - 8008bc2: d10a bne.n 8008bda - 8008bc4: 687b ldr r3, [r7, #4] - 8008bc6: 2b00 cmp r3, #0 - 8008bc8: d107 bne.n 8008bda + 8008e42: 68ba ldr r2, [r7, #8] + 8008e44: 23c0 movs r3, #192 ; 0xc0 + 8008e46: 00db lsls r3, r3, #3 + 8008e48: 429a cmp r2, r3 + 8008e4a: d10a bne.n 8008e62 + 8008e4c: 687b ldr r3, [r7, #4] + 8008e4e: 2b00 cmp r3, #0 + 8008e50: d107 bne.n 8008e62 { /* Flush Data Register by a blank read */ tmpreg8 = *ptmpreg8; - 8008bca: 69fb ldr r3, [r7, #28] - 8008bcc: 781b ldrb r3, [r3, #0] - 8008bce: b2da uxtb r2, r3 - 8008bd0: 2117 movs r1, #23 - 8008bd2: 187b adds r3, r7, r1 - 8008bd4: 701a strb r2, [r3, #0] + 8008e52: 69fb ldr r3, [r7, #28] + 8008e54: 781b ldrb r3, [r3, #0] + 8008e56: b2da uxtb r2, r3 + 8008e58: 2117 movs r1, #23 + 8008e5a: 187b adds r3, r7, r1 + 8008e5c: 701a strb r2, [r3, #0] /* To avoid GCC warning */ UNUSED(tmpreg8); - 8008bd6: 187b adds r3, r7, r1 - 8008bd8: 781b ldrb r3, [r3, #0] + 8008e5e: 187b adds r3, r7, r1 + 8008e60: 781b ldrb r3, [r3, #0] } if (Timeout != HAL_MAX_DELAY) - 8008bda: 683b ldr r3, [r7, #0] - 8008bdc: 3301 adds r3, #1 - 8008bde: d055 beq.n 8008c8c + 8008e62: 683b ldr r3, [r7, #0] + 8008e64: 3301 adds r3, #1 + 8008e66: d055 beq.n 8008f14 { if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) - 8008be0: f7fd f9fa bl 8005fd8 - 8008be4: 0002 movs r2, r0 - 8008be6: 6a3b ldr r3, [r7, #32] - 8008be8: 1ad3 subs r3, r2, r3 - 8008bea: 6a7a ldr r2, [r7, #36] ; 0x24 - 8008bec: 429a cmp r2, r3 - 8008bee: d902 bls.n 8008bf6 - 8008bf0: 6a7b ldr r3, [r7, #36] ; 0x24 - 8008bf2: 2b00 cmp r3, #0 - 8008bf4: d142 bne.n 8008c7c + 8008e68: f7fd f9fa bl 8006260 + 8008e6c: 0002 movs r2, r0 + 8008e6e: 6a3b ldr r3, [r7, #32] + 8008e70: 1ad3 subs r3, r2, r3 + 8008e72: 6a7a ldr r2, [r7, #36] ; 0x24 + 8008e74: 429a cmp r2, r3 + 8008e76: d902 bls.n 8008e7e + 8008e78: 6a7b ldr r3, [r7, #36] ; 0x24 + 8008e7a: 2b00 cmp r3, #0 + 8008e7c: d142 bne.n 8008f04 /* Disable the SPI and reset the CRC: the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation */ /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); - 8008bf6: 68fb ldr r3, [r7, #12] - 8008bf8: 681b ldr r3, [r3, #0] - 8008bfa: 685a ldr r2, [r3, #4] - 8008bfc: 68fb ldr r3, [r7, #12] - 8008bfe: 681b ldr r3, [r3, #0] - 8008c00: 21e0 movs r1, #224 ; 0xe0 - 8008c02: 438a bics r2, r1 - 8008c04: 605a str r2, [r3, #4] + 8008e7e: 68fb ldr r3, [r7, #12] + 8008e80: 681b ldr r3, [r3, #0] + 8008e82: 685a ldr r2, [r3, #4] + 8008e84: 68fb ldr r3, [r7, #12] + 8008e86: 681b ldr r3, [r3, #0] + 8008e88: 21e0 movs r1, #224 ; 0xe0 + 8008e8a: 438a bics r2, r1 + 8008e8c: 605a str r2, [r3, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - 8008c06: 68fb ldr r3, [r7, #12] - 8008c08: 685a ldr r2, [r3, #4] - 8008c0a: 2382 movs r3, #130 ; 0x82 - 8008c0c: 005b lsls r3, r3, #1 - 8008c0e: 429a cmp r2, r3 - 8008c10: d113 bne.n 8008c3a - 8008c12: 68fb ldr r3, [r7, #12] - 8008c14: 689a ldr r2, [r3, #8] - 8008c16: 2380 movs r3, #128 ; 0x80 - 8008c18: 021b lsls r3, r3, #8 - 8008c1a: 429a cmp r2, r3 - 8008c1c: d005 beq.n 8008c2a + 8008e8e: 68fb ldr r3, [r7, #12] + 8008e90: 685a ldr r2, [r3, #4] + 8008e92: 2382 movs r3, #130 ; 0x82 + 8008e94: 005b lsls r3, r3, #1 + 8008e96: 429a cmp r2, r3 + 8008e98: d113 bne.n 8008ec2 + 8008e9a: 68fb ldr r3, [r7, #12] + 8008e9c: 689a ldr r2, [r3, #8] + 8008e9e: 2380 movs r3, #128 ; 0x80 + 8008ea0: 021b lsls r3, r3, #8 + 8008ea2: 429a cmp r2, r3 + 8008ea4: d005 beq.n 8008eb2 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - 8008c1e: 68fb ldr r3, [r7, #12] - 8008c20: 689a ldr r2, [r3, #8] - 8008c22: 2380 movs r3, #128 ; 0x80 - 8008c24: 00db lsls r3, r3, #3 - 8008c26: 429a cmp r2, r3 - 8008c28: d107 bne.n 8008c3a + 8008ea6: 68fb ldr r3, [r7, #12] + 8008ea8: 689a ldr r2, [r3, #8] + 8008eaa: 2380 movs r3, #128 ; 0x80 + 8008eac: 00db lsls r3, r3, #3 + 8008eae: 429a cmp r2, r3 + 8008eb0: d107 bne.n 8008ec2 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 8008c2a: 68fb ldr r3, [r7, #12] - 8008c2c: 681b ldr r3, [r3, #0] - 8008c2e: 681a ldr r2, [r3, #0] - 8008c30: 68fb ldr r3, [r7, #12] - 8008c32: 681b ldr r3, [r3, #0] - 8008c34: 2140 movs r1, #64 ; 0x40 - 8008c36: 438a bics r2, r1 - 8008c38: 601a str r2, [r3, #0] + 8008eb2: 68fb ldr r3, [r7, #12] + 8008eb4: 681b ldr r3, [r3, #0] + 8008eb6: 681a ldr r2, [r3, #0] + 8008eb8: 68fb ldr r3, [r7, #12] + 8008eba: 681b ldr r3, [r3, #0] + 8008ebc: 2140 movs r1, #64 ; 0x40 + 8008ebe: 438a bics r2, r1 + 8008ec0: 601a str r2, [r3, #0] } /* Reset CRC Calculation */ if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - 8008c3a: 68fb ldr r3, [r7, #12] - 8008c3c: 6a9a ldr r2, [r3, #40] ; 0x28 - 8008c3e: 2380 movs r3, #128 ; 0x80 - 8008c40: 019b lsls r3, r3, #6 - 8008c42: 429a cmp r2, r3 - 8008c44: d110 bne.n 8008c68 + 8008ec2: 68fb ldr r3, [r7, #12] + 8008ec4: 6a9a ldr r2, [r3, #40] ; 0x28 + 8008ec6: 2380 movs r3, #128 ; 0x80 + 8008ec8: 019b lsls r3, r3, #6 + 8008eca: 429a cmp r2, r3 + 8008ecc: d110 bne.n 8008ef0 { SPI_RESET_CRC(hspi); - 8008c46: 68fb ldr r3, [r7, #12] - 8008c48: 681b ldr r3, [r3, #0] - 8008c4a: 681a ldr r2, [r3, #0] - 8008c4c: 68fb ldr r3, [r7, #12] - 8008c4e: 681b ldr r3, [r3, #0] - 8008c50: 4916 ldr r1, [pc, #88] ; (8008cac ) - 8008c52: 400a ands r2, r1 - 8008c54: 601a str r2, [r3, #0] - 8008c56: 68fb ldr r3, [r7, #12] - 8008c58: 681b ldr r3, [r3, #0] - 8008c5a: 681a ldr r2, [r3, #0] - 8008c5c: 68fb ldr r3, [r7, #12] - 8008c5e: 681b ldr r3, [r3, #0] - 8008c60: 2180 movs r1, #128 ; 0x80 - 8008c62: 0189 lsls r1, r1, #6 - 8008c64: 430a orrs r2, r1 - 8008c66: 601a str r2, [r3, #0] + 8008ece: 68fb ldr r3, [r7, #12] + 8008ed0: 681b ldr r3, [r3, #0] + 8008ed2: 681a ldr r2, [r3, #0] + 8008ed4: 68fb ldr r3, [r7, #12] + 8008ed6: 681b ldr r3, [r3, #0] + 8008ed8: 4916 ldr r1, [pc, #88] ; (8008f34 ) + 8008eda: 400a ands r2, r1 + 8008edc: 601a str r2, [r3, #0] + 8008ede: 68fb ldr r3, [r7, #12] + 8008ee0: 681b ldr r3, [r3, #0] + 8008ee2: 681a ldr r2, [r3, #0] + 8008ee4: 68fb ldr r3, [r7, #12] + 8008ee6: 681b ldr r3, [r3, #0] + 8008ee8: 2180 movs r1, #128 ; 0x80 + 8008eea: 0189 lsls r1, r1, #6 + 8008eec: 430a orrs r2, r1 + 8008eee: 601a str r2, [r3, #0] } hspi->State = HAL_SPI_STATE_READY; - 8008c68: 68fb ldr r3, [r7, #12] - 8008c6a: 225d movs r2, #93 ; 0x5d - 8008c6c: 2101 movs r1, #1 - 8008c6e: 5499 strb r1, [r3, r2] + 8008ef0: 68fb ldr r3, [r7, #12] + 8008ef2: 225d movs r2, #93 ; 0x5d + 8008ef4: 2101 movs r1, #1 + 8008ef6: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hspi); - 8008c70: 68fb ldr r3, [r7, #12] - 8008c72: 225c movs r2, #92 ; 0x5c - 8008c74: 2100 movs r1, #0 - 8008c76: 5499 strb r1, [r3, r2] + 8008ef8: 68fb ldr r3, [r7, #12] + 8008efa: 225c movs r2, #92 ; 0x5c + 8008efc: 2100 movs r1, #0 + 8008efe: 5499 strb r1, [r3, r2] return HAL_TIMEOUT; - 8008c78: 2303 movs r3, #3 - 8008c7a: e010 b.n 8008c9e + 8008f00: 2303 movs r3, #3 + 8008f02: e010 b.n 8008f26 } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ if (count == 0U) - 8008c7c: 69bb ldr r3, [r7, #24] - 8008c7e: 2b00 cmp r3, #0 - 8008c80: d101 bne.n 8008c86 + 8008f04: 69bb ldr r3, [r7, #24] + 8008f06: 2b00 cmp r3, #0 + 8008f08: d101 bne.n 8008f0e { tmp_timeout = 0U; - 8008c82: 2300 movs r3, #0 - 8008c84: 627b str r3, [r7, #36] ; 0x24 + 8008f0a: 2300 movs r3, #0 + 8008f0c: 627b str r3, [r7, #36] ; 0x24 } count--; - 8008c86: 69bb ldr r3, [r7, #24] - 8008c88: 3b01 subs r3, #1 - 8008c8a: 61bb str r3, [r7, #24] + 8008f0e: 69bb ldr r3, [r7, #24] + 8008f10: 3b01 subs r3, #1 + 8008f12: 61bb str r3, [r7, #24] while ((hspi->Instance->SR & Fifo) != State) - 8008c8c: 68fb ldr r3, [r7, #12] - 8008c8e: 681b ldr r3, [r3, #0] - 8008c90: 689b ldr r3, [r3, #8] - 8008c92: 68ba ldr r2, [r7, #8] - 8008c94: 4013 ands r3, r2 - 8008c96: 687a ldr r2, [r7, #4] - 8008c98: 429a cmp r2, r3 - 8008c9a: d18e bne.n 8008bba + 8008f14: 68fb ldr r3, [r7, #12] + 8008f16: 681b ldr r3, [r3, #0] + 8008f18: 689b ldr r3, [r3, #8] + 8008f1a: 68ba ldr r2, [r7, #8] + 8008f1c: 4013 ands r3, r2 + 8008f1e: 687a ldr r2, [r7, #4] + 8008f20: 429a cmp r2, r3 + 8008f22: d18e bne.n 8008e42 } } return HAL_OK; - 8008c9c: 2300 movs r3, #0 + 8008f24: 2300 movs r3, #0 } - 8008c9e: 0018 movs r0, r3 - 8008ca0: 46bd mov sp, r7 - 8008ca2: b00a add sp, #40 ; 0x28 - 8008ca4: bd80 pop {r7, pc} - 8008ca6: 46c0 nop ; (mov r8, r8) - 8008ca8: 20000040 .word 0x20000040 - 8008cac: ffffdfff .word 0xffffdfff + 8008f26: 0018 movs r0, r3 + 8008f28: 46bd mov sp, r7 + 8008f2a: b00a add sp, #40 ; 0x28 + 8008f2c: bd80 pop {r7, pc} + 8008f2e: 46c0 nop ; (mov r8, r8) + 8008f30: 20000040 .word 0x20000040 + 8008f34: ffffdfff .word 0xffffdfff -08008cb0 : +08008f38 : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { - 8008cb0: b580 push {r7, lr} - 8008cb2: b086 sub sp, #24 - 8008cb4: af02 add r7, sp, #8 - 8008cb6: 60f8 str r0, [r7, #12] - 8008cb8: 60b9 str r1, [r7, #8] - 8008cba: 607a str r2, [r7, #4] + 8008f38: b580 push {r7, lr} + 8008f3a: b086 sub sp, #24 + 8008f3c: af02 add r7, sp, #8 + 8008f3e: 60f8 str r0, [r7, #12] + 8008f40: 60b9 str r1, [r7, #8] + 8008f42: 607a str r2, [r7, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - 8008cbc: 68fb ldr r3, [r7, #12] - 8008cbe: 685a ldr r2, [r3, #4] - 8008cc0: 2382 movs r3, #130 ; 0x82 - 8008cc2: 005b lsls r3, r3, #1 - 8008cc4: 429a cmp r2, r3 - 8008cc6: d113 bne.n 8008cf0 - 8008cc8: 68fb ldr r3, [r7, #12] - 8008cca: 689a ldr r2, [r3, #8] - 8008ccc: 2380 movs r3, #128 ; 0x80 - 8008cce: 021b lsls r3, r3, #8 - 8008cd0: 429a cmp r2, r3 - 8008cd2: d005 beq.n 8008ce0 + 8008f44: 68fb ldr r3, [r7, #12] + 8008f46: 685a ldr r2, [r3, #4] + 8008f48: 2382 movs r3, #130 ; 0x82 + 8008f4a: 005b lsls r3, r3, #1 + 8008f4c: 429a cmp r2, r3 + 8008f4e: d113 bne.n 8008f78 + 8008f50: 68fb ldr r3, [r7, #12] + 8008f52: 689a ldr r2, [r3, #8] + 8008f54: 2380 movs r3, #128 ; 0x80 + 8008f56: 021b lsls r3, r3, #8 + 8008f58: 429a cmp r2, r3 + 8008f5a: d005 beq.n 8008f68 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - 8008cd4: 68fb ldr r3, [r7, #12] - 8008cd6: 689a ldr r2, [r3, #8] - 8008cd8: 2380 movs r3, #128 ; 0x80 - 8008cda: 00db lsls r3, r3, #3 - 8008cdc: 429a cmp r2, r3 - 8008cde: d107 bne.n 8008cf0 + 8008f5c: 68fb ldr r3, [r7, #12] + 8008f5e: 689a ldr r2, [r3, #8] + 8008f60: 2380 movs r3, #128 ; 0x80 + 8008f62: 00db lsls r3, r3, #3 + 8008f64: 429a cmp r2, r3 + 8008f66: d107 bne.n 8008f78 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 8008ce0: 68fb ldr r3, [r7, #12] - 8008ce2: 681b ldr r3, [r3, #0] - 8008ce4: 681a ldr r2, [r3, #0] - 8008ce6: 68fb ldr r3, [r7, #12] - 8008ce8: 681b ldr r3, [r3, #0] - 8008cea: 2140 movs r1, #64 ; 0x40 - 8008cec: 438a bics r2, r1 - 8008cee: 601a str r2, [r3, #0] + 8008f68: 68fb ldr r3, [r7, #12] + 8008f6a: 681b ldr r3, [r3, #0] + 8008f6c: 681a ldr r2, [r3, #0] + 8008f6e: 68fb ldr r3, [r7, #12] + 8008f70: 681b ldr r3, [r3, #0] + 8008f72: 2140 movs r1, #64 ; 0x40 + 8008f74: 438a bics r2, r1 + 8008f76: 601a str r2, [r3, #0] } /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) - 8008cf0: 68ba ldr r2, [r7, #8] - 8008cf2: 68f8 ldr r0, [r7, #12] - 8008cf4: 687b ldr r3, [r7, #4] - 8008cf6: 9300 str r3, [sp, #0] - 8008cf8: 0013 movs r3, r2 - 8008cfa: 2200 movs r2, #0 - 8008cfc: 2180 movs r1, #128 ; 0x80 - 8008cfe: f7ff fea7 bl 8008a50 - 8008d02: 1e03 subs r3, r0, #0 - 8008d04: d007 beq.n 8008d16 + 8008f78: 68ba ldr r2, [r7, #8] + 8008f7a: 68f8 ldr r0, [r7, #12] + 8008f7c: 687b ldr r3, [r7, #4] + 8008f7e: 9300 str r3, [sp, #0] + 8008f80: 0013 movs r3, r2 + 8008f82: 2200 movs r2, #0 + 8008f84: 2180 movs r1, #128 ; 0x80 + 8008f86: f7ff fea7 bl 8008cd8 + 8008f8a: 1e03 subs r3, r0, #0 + 8008f8c: d007 beq.n 8008f9e { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 8008d06: 68fb ldr r3, [r7, #12] - 8008d08: 6e1b ldr r3, [r3, #96] ; 0x60 - 8008d0a: 2220 movs r2, #32 - 8008d0c: 431a orrs r2, r3 - 8008d0e: 68fb ldr r3, [r7, #12] - 8008d10: 661a str r2, [r3, #96] ; 0x60 + 8008f8e: 68fb ldr r3, [r7, #12] + 8008f90: 6e1b ldr r3, [r3, #96] ; 0x60 + 8008f92: 2220 movs r2, #32 + 8008f94: 431a orrs r2, r3 + 8008f96: 68fb ldr r3, [r7, #12] + 8008f98: 661a str r2, [r3, #96] ; 0x60 return HAL_TIMEOUT; - 8008d12: 2303 movs r3, #3 - 8008d14: e026 b.n 8008d64 + 8008f9a: 2303 movs r3, #3 + 8008f9c: e026 b.n 8008fec } if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - 8008d16: 68fb ldr r3, [r7, #12] - 8008d18: 685a ldr r2, [r3, #4] - 8008d1a: 2382 movs r3, #130 ; 0x82 - 8008d1c: 005b lsls r3, r3, #1 - 8008d1e: 429a cmp r2, r3 - 8008d20: d11f bne.n 8008d62 - 8008d22: 68fb ldr r3, [r7, #12] - 8008d24: 689a ldr r2, [r3, #8] - 8008d26: 2380 movs r3, #128 ; 0x80 - 8008d28: 021b lsls r3, r3, #8 - 8008d2a: 429a cmp r2, r3 - 8008d2c: d005 beq.n 8008d3a + 8008f9e: 68fb ldr r3, [r7, #12] + 8008fa0: 685a ldr r2, [r3, #4] + 8008fa2: 2382 movs r3, #130 ; 0x82 + 8008fa4: 005b lsls r3, r3, #1 + 8008fa6: 429a cmp r2, r3 + 8008fa8: d11f bne.n 8008fea + 8008faa: 68fb ldr r3, [r7, #12] + 8008fac: 689a ldr r2, [r3, #8] + 8008fae: 2380 movs r3, #128 ; 0x80 + 8008fb0: 021b lsls r3, r3, #8 + 8008fb2: 429a cmp r2, r3 + 8008fb4: d005 beq.n 8008fc2 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - 8008d2e: 68fb ldr r3, [r7, #12] - 8008d30: 689a ldr r2, [r3, #8] - 8008d32: 2380 movs r3, #128 ; 0x80 - 8008d34: 00db lsls r3, r3, #3 - 8008d36: 429a cmp r2, r3 - 8008d38: d113 bne.n 8008d62 + 8008fb6: 68fb ldr r3, [r7, #12] + 8008fb8: 689a ldr r2, [r3, #8] + 8008fba: 2380 movs r3, #128 ; 0x80 + 8008fbc: 00db lsls r3, r3, #3 + 8008fbe: 429a cmp r2, r3 + 8008fc0: d113 bne.n 8008fea { /* Empty the FRLVL fifo */ if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK) - 8008d3a: 68ba ldr r2, [r7, #8] - 8008d3c: 23c0 movs r3, #192 ; 0xc0 - 8008d3e: 00d9 lsls r1, r3, #3 - 8008d40: 68f8 ldr r0, [r7, #12] - 8008d42: 687b ldr r3, [r7, #4] - 8008d44: 9300 str r3, [sp, #0] - 8008d46: 0013 movs r3, r2 - 8008d48: 2200 movs r2, #0 - 8008d4a: f7ff ff0f bl 8008b6c - 8008d4e: 1e03 subs r3, r0, #0 - 8008d50: d007 beq.n 8008d62 + 8008fc2: 68ba ldr r2, [r7, #8] + 8008fc4: 23c0 movs r3, #192 ; 0xc0 + 8008fc6: 00d9 lsls r1, r3, #3 + 8008fc8: 68f8 ldr r0, [r7, #12] + 8008fca: 687b ldr r3, [r7, #4] + 8008fcc: 9300 str r3, [sp, #0] + 8008fce: 0013 movs r3, r2 + 8008fd0: 2200 movs r2, #0 + 8008fd2: f7ff ff0f bl 8008df4 + 8008fd6: 1e03 subs r3, r0, #0 + 8008fd8: d007 beq.n 8008fea { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 8008d52: 68fb ldr r3, [r7, #12] - 8008d54: 6e1b ldr r3, [r3, #96] ; 0x60 - 8008d56: 2220 movs r2, #32 - 8008d58: 431a orrs r2, r3 - 8008d5a: 68fb ldr r3, [r7, #12] - 8008d5c: 661a str r2, [r3, #96] ; 0x60 + 8008fda: 68fb ldr r3, [r7, #12] + 8008fdc: 6e1b ldr r3, [r3, #96] ; 0x60 + 8008fde: 2220 movs r2, #32 + 8008fe0: 431a orrs r2, r3 + 8008fe2: 68fb ldr r3, [r7, #12] + 8008fe4: 661a str r2, [r3, #96] ; 0x60 return HAL_TIMEOUT; - 8008d5e: 2303 movs r3, #3 - 8008d60: e000 b.n 8008d64 + 8008fe6: 2303 movs r3, #3 + 8008fe8: e000 b.n 8008fec } } return HAL_OK; - 8008d62: 2300 movs r3, #0 + 8008fea: 2300 movs r3, #0 } - 8008d64: 0018 movs r0, r3 - 8008d66: 46bd mov sp, r7 - 8008d68: b004 add sp, #16 - 8008d6a: bd80 pop {r7, pc} + 8008fec: 0018 movs r0, r3 + 8008fee: 46bd mov sp, r7 + 8008ff0: b004 add sp, #16 + 8008ff2: bd80 pop {r7, pc} -08008d6c : +08008ff4 : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { - 8008d6c: b580 push {r7, lr} - 8008d6e: b086 sub sp, #24 - 8008d70: af02 add r7, sp, #8 - 8008d72: 60f8 str r0, [r7, #12] - 8008d74: 60b9 str r1, [r7, #8] - 8008d76: 607a str r2, [r7, #4] + 8008ff4: b580 push {r7, lr} + 8008ff6: b086 sub sp, #24 + 8008ff8: af02 add r7, sp, #8 + 8008ffa: 60f8 str r0, [r7, #12] + 8008ffc: 60b9 str r1, [r7, #8] + 8008ffe: 607a str r2, [r7, #4] /* Control if the TX fifo is empty */ if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != HAL_OK) - 8008d78: 68ba ldr r2, [r7, #8] - 8008d7a: 23c0 movs r3, #192 ; 0xc0 - 8008d7c: 0159 lsls r1, r3, #5 - 8008d7e: 68f8 ldr r0, [r7, #12] - 8008d80: 687b ldr r3, [r7, #4] - 8008d82: 9300 str r3, [sp, #0] - 8008d84: 0013 movs r3, r2 - 8008d86: 2200 movs r2, #0 - 8008d88: f7ff fef0 bl 8008b6c - 8008d8c: 1e03 subs r3, r0, #0 - 8008d8e: d007 beq.n 8008da0 + 8009000: 68ba ldr r2, [r7, #8] + 8009002: 23c0 movs r3, #192 ; 0xc0 + 8009004: 0159 lsls r1, r3, #5 + 8009006: 68f8 ldr r0, [r7, #12] + 8009008: 687b ldr r3, [r7, #4] + 800900a: 9300 str r3, [sp, #0] + 800900c: 0013 movs r3, r2 + 800900e: 2200 movs r2, #0 + 8009010: f7ff fef0 bl 8008df4 + 8009014: 1e03 subs r3, r0, #0 + 8009016: d007 beq.n 8009028 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 8008d90: 68fb ldr r3, [r7, #12] - 8008d92: 6e1b ldr r3, [r3, #96] ; 0x60 - 8008d94: 2220 movs r2, #32 - 8008d96: 431a orrs r2, r3 - 8008d98: 68fb ldr r3, [r7, #12] - 8008d9a: 661a str r2, [r3, #96] ; 0x60 + 8009018: 68fb ldr r3, [r7, #12] + 800901a: 6e1b ldr r3, [r3, #96] ; 0x60 + 800901c: 2220 movs r2, #32 + 800901e: 431a orrs r2, r3 + 8009020: 68fb ldr r3, [r7, #12] + 8009022: 661a str r2, [r3, #96] ; 0x60 return HAL_TIMEOUT; - 8008d9c: 2303 movs r3, #3 - 8008d9e: e027 b.n 8008df0 + 8009024: 2303 movs r3, #3 + 8009026: e027 b.n 8009078 } /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) - 8008da0: 68ba ldr r2, [r7, #8] - 8008da2: 68f8 ldr r0, [r7, #12] - 8008da4: 687b ldr r3, [r7, #4] - 8008da6: 9300 str r3, [sp, #0] - 8008da8: 0013 movs r3, r2 - 8008daa: 2200 movs r2, #0 - 8008dac: 2180 movs r1, #128 ; 0x80 - 8008dae: f7ff fe4f bl 8008a50 - 8008db2: 1e03 subs r3, r0, #0 - 8008db4: d007 beq.n 8008dc6 + 8009028: 68ba ldr r2, [r7, #8] + 800902a: 68f8 ldr r0, [r7, #12] + 800902c: 687b ldr r3, [r7, #4] + 800902e: 9300 str r3, [sp, #0] + 8009030: 0013 movs r3, r2 + 8009032: 2200 movs r2, #0 + 8009034: 2180 movs r1, #128 ; 0x80 + 8009036: f7ff fe4f bl 8008cd8 + 800903a: 1e03 subs r3, r0, #0 + 800903c: d007 beq.n 800904e { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 8008db6: 68fb ldr r3, [r7, #12] - 8008db8: 6e1b ldr r3, [r3, #96] ; 0x60 - 8008dba: 2220 movs r2, #32 - 8008dbc: 431a orrs r2, r3 - 8008dbe: 68fb ldr r3, [r7, #12] - 8008dc0: 661a str r2, [r3, #96] ; 0x60 + 800903e: 68fb ldr r3, [r7, #12] + 8009040: 6e1b ldr r3, [r3, #96] ; 0x60 + 8009042: 2220 movs r2, #32 + 8009044: 431a orrs r2, r3 + 8009046: 68fb ldr r3, [r7, #12] + 8009048: 661a str r2, [r3, #96] ; 0x60 return HAL_TIMEOUT; - 8008dc2: 2303 movs r3, #3 - 8008dc4: e014 b.n 8008df0 + 800904a: 2303 movs r3, #3 + 800904c: e014 b.n 8009078 } /* Control if the RX fifo is empty */ if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK) - 8008dc6: 68ba ldr r2, [r7, #8] - 8008dc8: 23c0 movs r3, #192 ; 0xc0 - 8008dca: 00d9 lsls r1, r3, #3 - 8008dcc: 68f8 ldr r0, [r7, #12] - 8008dce: 687b ldr r3, [r7, #4] - 8008dd0: 9300 str r3, [sp, #0] - 8008dd2: 0013 movs r3, r2 - 8008dd4: 2200 movs r2, #0 - 8008dd6: f7ff fec9 bl 8008b6c - 8008dda: 1e03 subs r3, r0, #0 - 8008ddc: d007 beq.n 8008dee + 800904e: 68ba ldr r2, [r7, #8] + 8009050: 23c0 movs r3, #192 ; 0xc0 + 8009052: 00d9 lsls r1, r3, #3 + 8009054: 68f8 ldr r0, [r7, #12] + 8009056: 687b ldr r3, [r7, #4] + 8009058: 9300 str r3, [sp, #0] + 800905a: 0013 movs r3, r2 + 800905c: 2200 movs r2, #0 + 800905e: f7ff fec9 bl 8008df4 + 8009062: 1e03 subs r3, r0, #0 + 8009064: d007 beq.n 8009076 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 8008dde: 68fb ldr r3, [r7, #12] - 8008de0: 6e1b ldr r3, [r3, #96] ; 0x60 - 8008de2: 2220 movs r2, #32 - 8008de4: 431a orrs r2, r3 - 8008de6: 68fb ldr r3, [r7, #12] - 8008de8: 661a str r2, [r3, #96] ; 0x60 + 8009066: 68fb ldr r3, [r7, #12] + 8009068: 6e1b ldr r3, [r3, #96] ; 0x60 + 800906a: 2220 movs r2, #32 + 800906c: 431a orrs r2, r3 + 800906e: 68fb ldr r3, [r7, #12] + 8009070: 661a str r2, [r3, #96] ; 0x60 return HAL_TIMEOUT; - 8008dea: 2303 movs r3, #3 - 8008dec: e000 b.n 8008df0 + 8009072: 2303 movs r3, #3 + 8009074: e000 b.n 8009078 } return HAL_OK; - 8008dee: 2300 movs r3, #0 + 8009076: 2300 movs r3, #0 } - 8008df0: 0018 movs r0, r3 - 8008df2: 46bd mov sp, r7 - 8008df4: b004 add sp, #16 - 8008df6: bd80 pop {r7, pc} + 8009078: 0018 movs r0, r3 + 800907a: 46bd mov sp, r7 + 800907c: b004 add sp, #16 + 800907e: bd80 pop {r7, pc} -08008df8 : +08009080 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 8008df8: b580 push {r7, lr} - 8008dfa: b082 sub sp, #8 - 8008dfc: af00 add r7, sp, #0 - 8008dfe: 6078 str r0, [r7, #4] + 8009080: b580 push {r7, lr} + 8009082: b082 sub sp, #8 + 8009084: af00 add r7, sp, #0 + 8009086: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) - 8008e00: 687b ldr r3, [r7, #4] - 8008e02: 2b00 cmp r3, #0 - 8008e04: d101 bne.n 8008e0a + 8009088: 687b ldr r3, [r7, #4] + 800908a: 2b00 cmp r3, #0 + 800908c: d101 bne.n 8009092 { return HAL_ERROR; - 8008e06: 2301 movs r3, #1 - 8008e08: e04a b.n 8008ea0 + 800908e: 2301 movs r3, #1 + 8009090: e04a b.n 8009128 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 8008e0a: 687b ldr r3, [r7, #4] - 8008e0c: 223d movs r2, #61 ; 0x3d - 8008e0e: 5c9b ldrb r3, [r3, r2] - 8008e10: b2db uxtb r3, r3 - 8008e12: 2b00 cmp r3, #0 - 8008e14: d107 bne.n 8008e26 + 8009092: 687b ldr r3, [r7, #4] + 8009094: 223d movs r2, #61 ; 0x3d + 8009096: 5c9b ldrb r3, [r3, r2] + 8009098: b2db uxtb r3, r3 + 800909a: 2b00 cmp r3, #0 + 800909c: d107 bne.n 80090ae { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 8008e16: 687b ldr r3, [r7, #4] - 8008e18: 223c movs r2, #60 ; 0x3c - 8008e1a: 2100 movs r1, #0 - 8008e1c: 5499 strb r1, [r3, r2] + 800909e: 687b ldr r3, [r7, #4] + 80090a0: 223c movs r2, #60 ; 0x3c + 80090a2: 2100 movs r1, #0 + 80090a4: 5499 strb r1, [r3, r2] } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); - 8008e1e: 687b ldr r3, [r7, #4] - 8008e20: 0018 movs r0, r3 - 8008e22: f7fc ff93 bl 8005d4c + 80090a6: 687b ldr r3, [r7, #4] + 80090a8: 0018 movs r0, r3 + 80090aa: f7fc fea3 bl 8005df4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8008e26: 687b ldr r3, [r7, #4] - 8008e28: 223d movs r2, #61 ; 0x3d - 8008e2a: 2102 movs r1, #2 - 8008e2c: 5499 strb r1, [r3, r2] + 80090ae: 687b ldr r3, [r7, #4] + 80090b0: 223d movs r2, #61 ; 0x3d + 80090b2: 2102 movs r1, #2 + 80090b4: 5499 strb r1, [r3, r2] /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8008e2e: 687b ldr r3, [r7, #4] - 8008e30: 681a ldr r2, [r3, #0] - 8008e32: 687b ldr r3, [r7, #4] - 8008e34: 3304 adds r3, #4 - 8008e36: 0019 movs r1, r3 - 8008e38: 0010 movs r0, r2 - 8008e3a: f000 ff45 bl 8009cc8 + 80090b6: 687b ldr r3, [r7, #4] + 80090b8: 681a ldr r2, [r3, #0] + 80090ba: 687b ldr r3, [r7, #4] + 80090bc: 3304 adds r3, #4 + 80090be: 0019 movs r1, r3 + 80090c0: 0010 movs r0, r2 + 80090c2: f000 ff45 bl 8009f50 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8008e3e: 687b ldr r3, [r7, #4] - 8008e40: 2248 movs r2, #72 ; 0x48 - 8008e42: 2101 movs r1, #1 - 8008e44: 5499 strb r1, [r3, r2] + 80090c6: 687b ldr r3, [r7, #4] + 80090c8: 2248 movs r2, #72 ; 0x48 + 80090ca: 2101 movs r1, #1 + 80090cc: 5499 strb r1, [r3, r2] /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8008e46: 687b ldr r3, [r7, #4] - 8008e48: 223e movs r2, #62 ; 0x3e - 8008e4a: 2101 movs r1, #1 - 8008e4c: 5499 strb r1, [r3, r2] - 8008e4e: 687b ldr r3, [r7, #4] - 8008e50: 223f movs r2, #63 ; 0x3f - 8008e52: 2101 movs r1, #1 - 8008e54: 5499 strb r1, [r3, r2] - 8008e56: 687b ldr r3, [r7, #4] - 8008e58: 2240 movs r2, #64 ; 0x40 - 8008e5a: 2101 movs r1, #1 - 8008e5c: 5499 strb r1, [r3, r2] - 8008e5e: 687b ldr r3, [r7, #4] - 8008e60: 2241 movs r2, #65 ; 0x41 - 8008e62: 2101 movs r1, #1 - 8008e64: 5499 strb r1, [r3, r2] - 8008e66: 687b ldr r3, [r7, #4] - 8008e68: 2242 movs r2, #66 ; 0x42 - 8008e6a: 2101 movs r1, #1 - 8008e6c: 5499 strb r1, [r3, r2] - 8008e6e: 687b ldr r3, [r7, #4] - 8008e70: 2243 movs r2, #67 ; 0x43 - 8008e72: 2101 movs r1, #1 - 8008e74: 5499 strb r1, [r3, r2] + 80090ce: 687b ldr r3, [r7, #4] + 80090d0: 223e movs r2, #62 ; 0x3e + 80090d2: 2101 movs r1, #1 + 80090d4: 5499 strb r1, [r3, r2] + 80090d6: 687b ldr r3, [r7, #4] + 80090d8: 223f movs r2, #63 ; 0x3f + 80090da: 2101 movs r1, #1 + 80090dc: 5499 strb r1, [r3, r2] + 80090de: 687b ldr r3, [r7, #4] + 80090e0: 2240 movs r2, #64 ; 0x40 + 80090e2: 2101 movs r1, #1 + 80090e4: 5499 strb r1, [r3, r2] + 80090e6: 687b ldr r3, [r7, #4] + 80090e8: 2241 movs r2, #65 ; 0x41 + 80090ea: 2101 movs r1, #1 + 80090ec: 5499 strb r1, [r3, r2] + 80090ee: 687b ldr r3, [r7, #4] + 80090f0: 2242 movs r2, #66 ; 0x42 + 80090f2: 2101 movs r1, #1 + 80090f4: 5499 strb r1, [r3, r2] + 80090f6: 687b ldr r3, [r7, #4] + 80090f8: 2243 movs r2, #67 ; 0x43 + 80090fa: 2101 movs r1, #1 + 80090fc: 5499 strb r1, [r3, r2] TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8008e76: 687b ldr r3, [r7, #4] - 8008e78: 2244 movs r2, #68 ; 0x44 - 8008e7a: 2101 movs r1, #1 - 8008e7c: 5499 strb r1, [r3, r2] - 8008e7e: 687b ldr r3, [r7, #4] - 8008e80: 2245 movs r2, #69 ; 0x45 - 8008e82: 2101 movs r1, #1 - 8008e84: 5499 strb r1, [r3, r2] - 8008e86: 687b ldr r3, [r7, #4] - 8008e88: 2246 movs r2, #70 ; 0x46 - 8008e8a: 2101 movs r1, #1 - 8008e8c: 5499 strb r1, [r3, r2] - 8008e8e: 687b ldr r3, [r7, #4] - 8008e90: 2247 movs r2, #71 ; 0x47 - 8008e92: 2101 movs r1, #1 - 8008e94: 5499 strb r1, [r3, r2] + 80090fe: 687b ldr r3, [r7, #4] + 8009100: 2244 movs r2, #68 ; 0x44 + 8009102: 2101 movs r1, #1 + 8009104: 5499 strb r1, [r3, r2] + 8009106: 687b ldr r3, [r7, #4] + 8009108: 2245 movs r2, #69 ; 0x45 + 800910a: 2101 movs r1, #1 + 800910c: 5499 strb r1, [r3, r2] + 800910e: 687b ldr r3, [r7, #4] + 8009110: 2246 movs r2, #70 ; 0x46 + 8009112: 2101 movs r1, #1 + 8009114: 5499 strb r1, [r3, r2] + 8009116: 687b ldr r3, [r7, #4] + 8009118: 2247 movs r2, #71 ; 0x47 + 800911a: 2101 movs r1, #1 + 800911c: 5499 strb r1, [r3, r2] /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8008e96: 687b ldr r3, [r7, #4] - 8008e98: 223d movs r2, #61 ; 0x3d - 8008e9a: 2101 movs r1, #1 - 8008e9c: 5499 strb r1, [r3, r2] + 800911e: 687b ldr r3, [r7, #4] + 8009120: 223d movs r2, #61 ; 0x3d + 8009122: 2101 movs r1, #1 + 8009124: 5499 strb r1, [r3, r2] return HAL_OK; - 8008e9e: 2300 movs r3, #0 + 8009126: 2300 movs r3, #0 } - 8008ea0: 0018 movs r0, r3 - 8008ea2: 46bd mov sp, r7 - 8008ea4: b002 add sp, #8 - 8008ea6: bd80 pop {r7, pc} + 8009128: 0018 movs r0, r3 + 800912a: 46bd mov sp, r7 + 800912c: b002 add sp, #8 + 800912e: bd80 pop {r7, pc} -08008ea8 : +08009130 : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { - 8008ea8: b580 push {r7, lr} - 8008eaa: b084 sub sp, #16 - 8008eac: af00 add r7, sp, #0 - 8008eae: 6078 str r0, [r7, #4] + 8009130: b580 push {r7, lr} + 8009132: b084 sub sp, #16 + 8009134: af00 add r7, sp, #0 + 8009136: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) - 8008eb0: 687b ldr r3, [r7, #4] - 8008eb2: 223d movs r2, #61 ; 0x3d - 8008eb4: 5c9b ldrb r3, [r3, r2] - 8008eb6: b2db uxtb r3, r3 - 8008eb8: 2b01 cmp r3, #1 - 8008eba: d001 beq.n 8008ec0 + 8009138: 687b ldr r3, [r7, #4] + 800913a: 223d movs r2, #61 ; 0x3d + 800913c: 5c9b ldrb r3, [r3, r2] + 800913e: b2db uxtb r3, r3 + 8009140: 2b01 cmp r3, #1 + 8009142: d001 beq.n 8009148 { return HAL_ERROR; - 8008ebc: 2301 movs r3, #1 - 8008ebe: e03c b.n 8008f3a + 8009144: 2301 movs r3, #1 + 8009146: e03c b.n 80091c2 } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8008ec0: 687b ldr r3, [r7, #4] - 8008ec2: 223d movs r2, #61 ; 0x3d - 8008ec4: 2102 movs r1, #2 - 8008ec6: 5499 strb r1, [r3, r2] + 8009148: 687b ldr r3, [r7, #4] + 800914a: 223d movs r2, #61 ; 0x3d + 800914c: 2102 movs r1, #2 + 800914e: 5499 strb r1, [r3, r2] /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 8008ec8: 687b ldr r3, [r7, #4] - 8008eca: 681b ldr r3, [r3, #0] - 8008ecc: 68da ldr r2, [r3, #12] - 8008ece: 687b ldr r3, [r7, #4] - 8008ed0: 681b ldr r3, [r3, #0] - 8008ed2: 2101 movs r1, #1 - 8008ed4: 430a orrs r2, r1 - 8008ed6: 60da str r2, [r3, #12] + 8009150: 687b ldr r3, [r7, #4] + 8009152: 681b ldr r3, [r3, #0] + 8009154: 68da ldr r2, [r3, #12] + 8009156: 687b ldr r3, [r7, #4] + 8009158: 681b ldr r3, [r3, #0] + 800915a: 2101 movs r1, #1 + 800915c: 430a orrs r2, r1 + 800915e: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8008ed8: 687b ldr r3, [r7, #4] - 8008eda: 681b ldr r3, [r3, #0] - 8008edc: 4a19 ldr r2, [pc, #100] ; (8008f44 ) - 8008ede: 4293 cmp r3, r2 - 8008ee0: d009 beq.n 8008ef6 - 8008ee2: 687b ldr r3, [r7, #4] - 8008ee4: 681b ldr r3, [r3, #0] - 8008ee6: 4a18 ldr r2, [pc, #96] ; (8008f48 ) - 8008ee8: 4293 cmp r3, r2 - 8008eea: d004 beq.n 8008ef6 - 8008eec: 687b ldr r3, [r7, #4] - 8008eee: 681b ldr r3, [r3, #0] - 8008ef0: 4a16 ldr r2, [pc, #88] ; (8008f4c ) - 8008ef2: 4293 cmp r3, r2 - 8008ef4: d116 bne.n 8008f24 + 8009160: 687b ldr r3, [r7, #4] + 8009162: 681b ldr r3, [r3, #0] + 8009164: 4a19 ldr r2, [pc, #100] ; (80091cc ) + 8009166: 4293 cmp r3, r2 + 8009168: d009 beq.n 800917e + 800916a: 687b ldr r3, [r7, #4] + 800916c: 681b ldr r3, [r3, #0] + 800916e: 4a18 ldr r2, [pc, #96] ; (80091d0 ) + 8009170: 4293 cmp r3, r2 + 8009172: d004 beq.n 800917e + 8009174: 687b ldr r3, [r7, #4] + 8009176: 681b ldr r3, [r3, #0] + 8009178: 4a16 ldr r2, [pc, #88] ; (80091d4 ) + 800917a: 4293 cmp r3, r2 + 800917c: d116 bne.n 80091ac { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8008ef6: 687b ldr r3, [r7, #4] - 8008ef8: 681b ldr r3, [r3, #0] - 8008efa: 689b ldr r3, [r3, #8] - 8008efc: 4a14 ldr r2, [pc, #80] ; (8008f50 ) - 8008efe: 4013 ands r3, r2 - 8008f00: 60fb str r3, [r7, #12] + 800917e: 687b ldr r3, [r7, #4] + 8009180: 681b ldr r3, [r3, #0] + 8009182: 689b ldr r3, [r3, #8] + 8009184: 4a14 ldr r2, [pc, #80] ; (80091d8 ) + 8009186: 4013 ands r3, r2 + 8009188: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8008f02: 68fb ldr r3, [r7, #12] - 8008f04: 2b06 cmp r3, #6 - 8008f06: d016 beq.n 8008f36 - 8008f08: 68fa ldr r2, [r7, #12] - 8008f0a: 2380 movs r3, #128 ; 0x80 - 8008f0c: 025b lsls r3, r3, #9 - 8008f0e: 429a cmp r2, r3 - 8008f10: d011 beq.n 8008f36 + 800918a: 68fb ldr r3, [r7, #12] + 800918c: 2b06 cmp r3, #6 + 800918e: d016 beq.n 80091be + 8009190: 68fa ldr r2, [r7, #12] + 8009192: 2380 movs r3, #128 ; 0x80 + 8009194: 025b lsls r3, r3, #9 + 8009196: 429a cmp r2, r3 + 8009198: d011 beq.n 80091be { __HAL_TIM_ENABLE(htim); - 8008f12: 687b ldr r3, [r7, #4] - 8008f14: 681b ldr r3, [r3, #0] - 8008f16: 681a ldr r2, [r3, #0] - 8008f18: 687b ldr r3, [r7, #4] - 8008f1a: 681b ldr r3, [r3, #0] - 8008f1c: 2101 movs r1, #1 - 8008f1e: 430a orrs r2, r1 - 8008f20: 601a str r2, [r3, #0] + 800919a: 687b ldr r3, [r7, #4] + 800919c: 681b ldr r3, [r3, #0] + 800919e: 681a ldr r2, [r3, #0] + 80091a0: 687b ldr r3, [r7, #4] + 80091a2: 681b ldr r3, [r3, #0] + 80091a4: 2101 movs r1, #1 + 80091a6: 430a orrs r2, r1 + 80091a8: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8008f22: e008 b.n 8008f36 + 80091aa: e008 b.n 80091be } } else { __HAL_TIM_ENABLE(htim); - 8008f24: 687b ldr r3, [r7, #4] - 8008f26: 681b ldr r3, [r3, #0] - 8008f28: 681a ldr r2, [r3, #0] - 8008f2a: 687b ldr r3, [r7, #4] - 8008f2c: 681b ldr r3, [r3, #0] - 8008f2e: 2101 movs r1, #1 - 8008f30: 430a orrs r2, r1 - 8008f32: 601a str r2, [r3, #0] - 8008f34: e000 b.n 8008f38 + 80091ac: 687b ldr r3, [r7, #4] + 80091ae: 681b ldr r3, [r3, #0] + 80091b0: 681a ldr r2, [r3, #0] + 80091b2: 687b ldr r3, [r7, #4] + 80091b4: 681b ldr r3, [r3, #0] + 80091b6: 2101 movs r1, #1 + 80091b8: 430a orrs r2, r1 + 80091ba: 601a str r2, [r3, #0] + 80091bc: e000 b.n 80091c0 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8008f36: 46c0 nop ; (mov r8, r8) + 80091be: 46c0 nop ; (mov r8, r8) } /* Return function status */ return HAL_OK; - 8008f38: 2300 movs r3, #0 + 80091c0: 2300 movs r3, #0 } - 8008f3a: 0018 movs r0, r3 - 8008f3c: 46bd mov sp, r7 - 8008f3e: b004 add sp, #16 - 8008f40: bd80 pop {r7, pc} - 8008f42: 46c0 nop ; (mov r8, r8) - 8008f44: 40012c00 .word 0x40012c00 - 8008f48: 40000400 .word 0x40000400 - 8008f4c: 40014000 .word 0x40014000 - 8008f50: 00010007 .word 0x00010007 + 80091c2: 0018 movs r0, r3 + 80091c4: 46bd mov sp, r7 + 80091c6: b004 add sp, #16 + 80091c8: bd80 pop {r7, pc} + 80091ca: 46c0 nop ; (mov r8, r8) + 80091cc: 40012c00 .word 0x40012c00 + 80091d0: 40000400 .word 0x40000400 + 80091d4: 40014000 .word 0x40014000 + 80091d8: 00010007 .word 0x00010007 -08008f54 : +080091dc : * @brief Stops the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) { - 8008f54: b580 push {r7, lr} - 8008f56: b082 sub sp, #8 - 8008f58: af00 add r7, sp, #0 - 8008f5a: 6078 str r0, [r7, #4] + 80091dc: b580 push {r7, lr} + 80091de: b082 sub sp, #8 + 80091e0: af00 add r7, sp, #0 + 80091e2: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Disable the TIM Update interrupt */ __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); - 8008f5c: 687b ldr r3, [r7, #4] - 8008f5e: 681b ldr r3, [r3, #0] - 8008f60: 68da ldr r2, [r3, #12] - 8008f62: 687b ldr r3, [r7, #4] - 8008f64: 681b ldr r3, [r3, #0] - 8008f66: 2101 movs r1, #1 - 8008f68: 438a bics r2, r1 - 8008f6a: 60da str r2, [r3, #12] + 80091e4: 687b ldr r3, [r7, #4] + 80091e6: 681b ldr r3, [r3, #0] + 80091e8: 68da ldr r2, [r3, #12] + 80091ea: 687b ldr r3, [r7, #4] + 80091ec: 681b ldr r3, [r3, #0] + 80091ee: 2101 movs r1, #1 + 80091f0: 438a bics r2, r1 + 80091f2: 60da str r2, [r3, #12] /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); - 8008f6c: 687b ldr r3, [r7, #4] - 8008f6e: 681b ldr r3, [r3, #0] - 8008f70: 6a1b ldr r3, [r3, #32] - 8008f72: 4a0d ldr r2, [pc, #52] ; (8008fa8 ) - 8008f74: 4013 ands r3, r2 - 8008f76: d10d bne.n 8008f94 - 8008f78: 687b ldr r3, [r7, #4] - 8008f7a: 681b ldr r3, [r3, #0] - 8008f7c: 6a1b ldr r3, [r3, #32] - 8008f7e: 4a0b ldr r2, [pc, #44] ; (8008fac ) - 8008f80: 4013 ands r3, r2 - 8008f82: d107 bne.n 8008f94 - 8008f84: 687b ldr r3, [r7, #4] - 8008f86: 681b ldr r3, [r3, #0] - 8008f88: 681a ldr r2, [r3, #0] - 8008f8a: 687b ldr r3, [r7, #4] - 8008f8c: 681b ldr r3, [r3, #0] - 8008f8e: 2101 movs r1, #1 - 8008f90: 438a bics r2, r1 - 8008f92: 601a str r2, [r3, #0] + 80091f4: 687b ldr r3, [r7, #4] + 80091f6: 681b ldr r3, [r3, #0] + 80091f8: 6a1b ldr r3, [r3, #32] + 80091fa: 4a0d ldr r2, [pc, #52] ; (8009230 ) + 80091fc: 4013 ands r3, r2 + 80091fe: d10d bne.n 800921c + 8009200: 687b ldr r3, [r7, #4] + 8009202: 681b ldr r3, [r3, #0] + 8009204: 6a1b ldr r3, [r3, #32] + 8009206: 4a0b ldr r2, [pc, #44] ; (8009234 ) + 8009208: 4013 ands r3, r2 + 800920a: d107 bne.n 800921c + 800920c: 687b ldr r3, [r7, #4] + 800920e: 681b ldr r3, [r3, #0] + 8009210: 681a ldr r2, [r3, #0] + 8009212: 687b ldr r3, [r7, #4] + 8009214: 681b ldr r3, [r3, #0] + 8009216: 2101 movs r1, #1 + 8009218: 438a bics r2, r1 + 800921a: 601a str r2, [r3, #0] /* Set the TIM state */ htim->State = HAL_TIM_STATE_READY; - 8008f94: 687b ldr r3, [r7, #4] - 8008f96: 223d movs r2, #61 ; 0x3d - 8008f98: 2101 movs r1, #1 - 8008f9a: 5499 strb r1, [r3, r2] + 800921c: 687b ldr r3, [r7, #4] + 800921e: 223d movs r2, #61 ; 0x3d + 8009220: 2101 movs r1, #1 + 8009222: 5499 strb r1, [r3, r2] /* Return function status */ return HAL_OK; - 8008f9c: 2300 movs r3, #0 + 8009224: 2300 movs r3, #0 } - 8008f9e: 0018 movs r0, r3 - 8008fa0: 46bd mov sp, r7 - 8008fa2: b002 add sp, #8 - 8008fa4: bd80 pop {r7, pc} - 8008fa6: 46c0 nop ; (mov r8, r8) - 8008fa8: 00001111 .word 0x00001111 - 8008fac: 00000444 .word 0x00000444 + 8009226: 0018 movs r0, r3 + 8009228: 46bd mov sp, r7 + 800922a: b002 add sp, #8 + 800922c: bd80 pop {r7, pc} + 800922e: 46c0 nop ; (mov r8, r8) + 8009230: 00001111 .word 0x00001111 + 8009234: 00000444 .word 0x00000444 -08008fb0 : +08009238 : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) -{ - 8008fb0: b580 push {r7, lr} - 8008fb2: b082 sub sp, #8 - 8008fb4: af00 add r7, sp, #0 - 8008fb6: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 8008fb8: 687b ldr r3, [r7, #4] - 8008fba: 2b00 cmp r3, #0 - 8008fbc: d101 bne.n 8008fc2 - { - return HAL_ERROR; - 8008fbe: 2301 movs r3, #1 - 8008fc0: e04a b.n 8009058 - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if (htim->State == HAL_TIM_STATE_RESET) - 8008fc2: 687b ldr r3, [r7, #4] - 8008fc4: 223d movs r2, #61 ; 0x3d - 8008fc6: 5c9b ldrb r3, [r3, r2] - 8008fc8: b2db uxtb r3, r3 - 8008fca: 2b00 cmp r3, #0 - 8008fcc: d107 bne.n 8008fde - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 8008fce: 687b ldr r3, [r7, #4] - 8008fd0: 223c movs r2, #60 ; 0x3c - 8008fd2: 2100 movs r1, #0 - 8008fd4: 5499 strb r1, [r3, r2] - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->PWM_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspInit(htim); - 8008fd6: 687b ldr r3, [r7, #4] - 8008fd8: 0018 movs r0, r3 - 8008fda: f000 f841 bl 8009060 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 8008fde: 687b ldr r3, [r7, #4] - 8008fe0: 223d movs r2, #61 ; 0x3d - 8008fe2: 2102 movs r1, #2 - 8008fe4: 5499 strb r1, [r3, r2] - - /* Init the base time for the PWM */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8008fe6: 687b ldr r3, [r7, #4] - 8008fe8: 681a ldr r2, [r3, #0] - 8008fea: 687b ldr r3, [r7, #4] - 8008fec: 3304 adds r3, #4 - 8008fee: 0019 movs r1, r3 - 8008ff0: 0010 movs r0, r2 - 8008ff2: f000 fe69 bl 8009cc8 - - /* Initialize the DMA burst operation state */ - htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8008ff6: 687b ldr r3, [r7, #4] - 8008ff8: 2248 movs r2, #72 ; 0x48 - 8008ffa: 2101 movs r1, #1 - 8008ffc: 5499 strb r1, [r3, r2] - - /* Initialize the TIM channels state */ - TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8008ffe: 687b ldr r3, [r7, #4] - 8009000: 223e movs r2, #62 ; 0x3e - 8009002: 2101 movs r1, #1 - 8009004: 5499 strb r1, [r3, r2] - 8009006: 687b ldr r3, [r7, #4] - 8009008: 223f movs r2, #63 ; 0x3f - 800900a: 2101 movs r1, #1 - 800900c: 5499 strb r1, [r3, r2] - 800900e: 687b ldr r3, [r7, #4] - 8009010: 2240 movs r2, #64 ; 0x40 - 8009012: 2101 movs r1, #1 - 8009014: 5499 strb r1, [r3, r2] - 8009016: 687b ldr r3, [r7, #4] - 8009018: 2241 movs r2, #65 ; 0x41 - 800901a: 2101 movs r1, #1 - 800901c: 5499 strb r1, [r3, r2] - 800901e: 687b ldr r3, [r7, #4] - 8009020: 2242 movs r2, #66 ; 0x42 - 8009022: 2101 movs r1, #1 - 8009024: 5499 strb r1, [r3, r2] - 8009026: 687b ldr r3, [r7, #4] - 8009028: 2243 movs r2, #67 ; 0x43 - 800902a: 2101 movs r1, #1 - 800902c: 5499 strb r1, [r3, r2] - TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 800902e: 687b ldr r3, [r7, #4] - 8009030: 2244 movs r2, #68 ; 0x44 - 8009032: 2101 movs r1, #1 - 8009034: 5499 strb r1, [r3, r2] - 8009036: 687b ldr r3, [r7, #4] - 8009038: 2245 movs r2, #69 ; 0x45 - 800903a: 2101 movs r1, #1 - 800903c: 5499 strb r1, [r3, r2] - 800903e: 687b ldr r3, [r7, #4] - 8009040: 2246 movs r2, #70 ; 0x46 - 8009042: 2101 movs r1, #1 - 8009044: 5499 strb r1, [r3, r2] - 8009046: 687b ldr r3, [r7, #4] - 8009048: 2247 movs r2, #71 ; 0x47 - 800904a: 2101 movs r1, #1 - 800904c: 5499 strb r1, [r3, r2] - - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 800904e: 687b ldr r3, [r7, #4] - 8009050: 223d movs r2, #61 ; 0x3d - 8009052: 2101 movs r1, #1 - 8009054: 5499 strb r1, [r3, r2] - - return HAL_OK; - 8009056: 2300 movs r3, #0 -} - 8009058: 0018 movs r0, r3 - 800905a: 46bd mov sp, r7 - 800905c: b002 add sp, #8 - 800905e: bd80 pop {r7, pc} - -08009060 : - * @brief Initializes the TIM PWM MSP. - * @param htim TIM PWM handle - * @retval None - */ -__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) -{ - 8009060: b580 push {r7, lr} - 8009062: b082 sub sp, #8 - 8009064: af00 add r7, sp, #0 - 8009066: 6078 str r0, [r7, #4] - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_MspInit could be implemented in the user file - */ -} - 8009068: 46c0 nop ; (mov r8, r8) - 800906a: 46bd mov sp, r7 - 800906c: b002 add sp, #8 - 800906e: bd80 pop {r7, pc} - -08009070 : - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - 8009070: b580 push {r7, lr} - 8009072: b084 sub sp, #16 - 8009074: af00 add r7, sp, #0 - 8009076: 6078 str r0, [r7, #4] - 8009078: 6039 str r1, [r7, #0] - - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Check the TIM channel state */ - if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) - 800907a: 683b ldr r3, [r7, #0] - 800907c: 2b00 cmp r3, #0 - 800907e: d108 bne.n 8009092 - 8009080: 687b ldr r3, [r7, #4] - 8009082: 223e movs r2, #62 ; 0x3e - 8009084: 5c9b ldrb r3, [r3, r2] - 8009086: b2db uxtb r3, r3 - 8009088: 3b01 subs r3, #1 - 800908a: 1e5a subs r2, r3, #1 - 800908c: 4193 sbcs r3, r2 - 800908e: b2db uxtb r3, r3 - 8009090: e037 b.n 8009102 - 8009092: 683b ldr r3, [r7, #0] - 8009094: 2b04 cmp r3, #4 - 8009096: d108 bne.n 80090aa - 8009098: 687b ldr r3, [r7, #4] - 800909a: 223f movs r2, #63 ; 0x3f - 800909c: 5c9b ldrb r3, [r3, r2] - 800909e: b2db uxtb r3, r3 - 80090a0: 3b01 subs r3, #1 - 80090a2: 1e5a subs r2, r3, #1 - 80090a4: 4193 sbcs r3, r2 - 80090a6: b2db uxtb r3, r3 - 80090a8: e02b b.n 8009102 - 80090aa: 683b ldr r3, [r7, #0] - 80090ac: 2b08 cmp r3, #8 - 80090ae: d108 bne.n 80090c2 - 80090b0: 687b ldr r3, [r7, #4] - 80090b2: 2240 movs r2, #64 ; 0x40 - 80090b4: 5c9b ldrb r3, [r3, r2] - 80090b6: b2db uxtb r3, r3 - 80090b8: 3b01 subs r3, #1 - 80090ba: 1e5a subs r2, r3, #1 - 80090bc: 4193 sbcs r3, r2 - 80090be: b2db uxtb r3, r3 - 80090c0: e01f b.n 8009102 - 80090c2: 683b ldr r3, [r7, #0] - 80090c4: 2b0c cmp r3, #12 - 80090c6: d108 bne.n 80090da - 80090c8: 687b ldr r3, [r7, #4] - 80090ca: 2241 movs r2, #65 ; 0x41 - 80090cc: 5c9b ldrb r3, [r3, r2] - 80090ce: b2db uxtb r3, r3 - 80090d0: 3b01 subs r3, #1 - 80090d2: 1e5a subs r2, r3, #1 - 80090d4: 4193 sbcs r3, r2 - 80090d6: b2db uxtb r3, r3 - 80090d8: e013 b.n 8009102 - 80090da: 683b ldr r3, [r7, #0] - 80090dc: 2b10 cmp r3, #16 - 80090de: d108 bne.n 80090f2 - 80090e0: 687b ldr r3, [r7, #4] - 80090e2: 2242 movs r2, #66 ; 0x42 - 80090e4: 5c9b ldrb r3, [r3, r2] - 80090e6: b2db uxtb r3, r3 - 80090e8: 3b01 subs r3, #1 - 80090ea: 1e5a subs r2, r3, #1 - 80090ec: 4193 sbcs r3, r2 - 80090ee: b2db uxtb r3, r3 - 80090f0: e007 b.n 8009102 - 80090f2: 687b ldr r3, [r7, #4] - 80090f4: 2243 movs r2, #67 ; 0x43 - 80090f6: 5c9b ldrb r3, [r3, r2] - 80090f8: b2db uxtb r3, r3 - 80090fa: 3b01 subs r3, #1 - 80090fc: 1e5a subs r2, r3, #1 - 80090fe: 4193 sbcs r3, r2 - 8009100: b2db uxtb r3, r3 - 8009102: 2b00 cmp r3, #0 - 8009104: d001 beq.n 800910a - { - return HAL_ERROR; - 8009106: 2301 movs r3, #1 - 8009108: e085 b.n 8009216 - } - - /* Set the TIM channel state */ - TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); - 800910a: 683b ldr r3, [r7, #0] - 800910c: 2b00 cmp r3, #0 - 800910e: d104 bne.n 800911a - 8009110: 687b ldr r3, [r7, #4] - 8009112: 223e movs r2, #62 ; 0x3e - 8009114: 2102 movs r1, #2 - 8009116: 5499 strb r1, [r3, r2] - 8009118: e023 b.n 8009162 - 800911a: 683b ldr r3, [r7, #0] - 800911c: 2b04 cmp r3, #4 - 800911e: d104 bne.n 800912a - 8009120: 687b ldr r3, [r7, #4] - 8009122: 223f movs r2, #63 ; 0x3f - 8009124: 2102 movs r1, #2 - 8009126: 5499 strb r1, [r3, r2] - 8009128: e01b b.n 8009162 - 800912a: 683b ldr r3, [r7, #0] - 800912c: 2b08 cmp r3, #8 - 800912e: d104 bne.n 800913a - 8009130: 687b ldr r3, [r7, #4] - 8009132: 2240 movs r2, #64 ; 0x40 - 8009134: 2102 movs r1, #2 - 8009136: 5499 strb r1, [r3, r2] - 8009138: e013 b.n 8009162 - 800913a: 683b ldr r3, [r7, #0] - 800913c: 2b0c cmp r3, #12 - 800913e: d104 bne.n 800914a - 8009140: 687b ldr r3, [r7, #4] - 8009142: 2241 movs r2, #65 ; 0x41 - 8009144: 2102 movs r1, #2 - 8009146: 5499 strb r1, [r3, r2] - 8009148: e00b b.n 8009162 - 800914a: 683b ldr r3, [r7, #0] - 800914c: 2b10 cmp r3, #16 - 800914e: d104 bne.n 800915a - 8009150: 687b ldr r3, [r7, #4] - 8009152: 2242 movs r2, #66 ; 0x42 - 8009154: 2102 movs r1, #2 - 8009156: 5499 strb r1, [r3, r2] - 8009158: e003 b.n 8009162 - 800915a: 687b ldr r3, [r7, #4] - 800915c: 2243 movs r2, #67 ; 0x43 - 800915e: 2102 movs r1, #2 - 8009160: 5499 strb r1, [r3, r2] - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - 8009162: 687b ldr r3, [r7, #4] - 8009164: 681b ldr r3, [r3, #0] - 8009166: 6839 ldr r1, [r7, #0] - 8009168: 2201 movs r2, #1 - 800916a: 0018 movs r0, r3 - 800916c: f001 fb38 bl 800a7e0 - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - 8009170: 687b ldr r3, [r7, #4] - 8009172: 681b ldr r3, [r3, #0] - 8009174: 4a2a ldr r2, [pc, #168] ; (8009220 ) - 8009176: 4293 cmp r3, r2 - 8009178: d00e beq.n 8009198 - 800917a: 687b ldr r3, [r7, #4] - 800917c: 681b ldr r3, [r3, #0] - 800917e: 4a29 ldr r2, [pc, #164] ; (8009224 ) - 8009180: 4293 cmp r3, r2 - 8009182: d009 beq.n 8009198 - 8009184: 687b ldr r3, [r7, #4] - 8009186: 681b ldr r3, [r3, #0] - 8009188: 4a27 ldr r2, [pc, #156] ; (8009228 ) - 800918a: 4293 cmp r3, r2 - 800918c: d004 beq.n 8009198 - 800918e: 687b ldr r3, [r7, #4] - 8009190: 681b ldr r3, [r3, #0] - 8009192: 4a26 ldr r2, [pc, #152] ; (800922c ) - 8009194: 4293 cmp r3, r2 - 8009196: d101 bne.n 800919c - 8009198: 2301 movs r3, #1 - 800919a: e000 b.n 800919e - 800919c: 2300 movs r3, #0 - 800919e: 2b00 cmp r3, #0 - 80091a0: d008 beq.n 80091b4 - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - 80091a2: 687b ldr r3, [r7, #4] - 80091a4: 681b ldr r3, [r3, #0] - 80091a6: 6c5a ldr r2, [r3, #68] ; 0x44 - 80091a8: 687b ldr r3, [r7, #4] - 80091aa: 681b ldr r3, [r3, #0] - 80091ac: 2180 movs r1, #128 ; 0x80 - 80091ae: 0209 lsls r1, r1, #8 - 80091b0: 430a orrs r2, r1 - 80091b2: 645a str r2, [r3, #68] ; 0x44 - } - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 80091b4: 687b ldr r3, [r7, #4] - 80091b6: 681b ldr r3, [r3, #0] - 80091b8: 4a19 ldr r2, [pc, #100] ; (8009220 ) - 80091ba: 4293 cmp r3, r2 - 80091bc: d009 beq.n 80091d2 - 80091be: 687b ldr r3, [r7, #4] - 80091c0: 681b ldr r3, [r3, #0] - 80091c2: 4a1b ldr r2, [pc, #108] ; (8009230 ) - 80091c4: 4293 cmp r3, r2 - 80091c6: d004 beq.n 80091d2 - 80091c8: 687b ldr r3, [r7, #4] - 80091ca: 681b ldr r3, [r3, #0] - 80091cc: 4a15 ldr r2, [pc, #84] ; (8009224 ) - 80091ce: 4293 cmp r3, r2 - 80091d0: d116 bne.n 8009200 - { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 80091d2: 687b ldr r3, [r7, #4] - 80091d4: 681b ldr r3, [r3, #0] - 80091d6: 689b ldr r3, [r3, #8] - 80091d8: 4a16 ldr r2, [pc, #88] ; (8009234 ) - 80091da: 4013 ands r3, r2 - 80091dc: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 80091de: 68fb ldr r3, [r7, #12] - 80091e0: 2b06 cmp r3, #6 - 80091e2: d016 beq.n 8009212 - 80091e4: 68fa ldr r2, [r7, #12] - 80091e6: 2380 movs r3, #128 ; 0x80 - 80091e8: 025b lsls r3, r3, #9 - 80091ea: 429a cmp r2, r3 - 80091ec: d011 beq.n 8009212 - { - __HAL_TIM_ENABLE(htim); - 80091ee: 687b ldr r3, [r7, #4] - 80091f0: 681b ldr r3, [r3, #0] - 80091f2: 681a ldr r2, [r3, #0] - 80091f4: 687b ldr r3, [r7, #4] - 80091f6: 681b ldr r3, [r3, #0] - 80091f8: 2101 movs r1, #1 - 80091fa: 430a orrs r2, r1 - 80091fc: 601a str r2, [r3, #0] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 80091fe: e008 b.n 8009212 - } - } - else - { - __HAL_TIM_ENABLE(htim); - 8009200: 687b ldr r3, [r7, #4] - 8009202: 681b ldr r3, [r3, #0] - 8009204: 681a ldr r2, [r3, #0] - 8009206: 687b ldr r3, [r7, #4] - 8009208: 681b ldr r3, [r3, #0] - 800920a: 2101 movs r1, #1 - 800920c: 430a orrs r2, r1 - 800920e: 601a str r2, [r3, #0] - 8009210: e000 b.n 8009214 - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8009212: 46c0 nop ; (mov r8, r8) - } - - /* Return function status */ - return HAL_OK; - 8009214: 2300 movs r3, #0 -} - 8009216: 0018 movs r0, r3 - 8009218: 46bd mov sp, r7 - 800921a: b004 add sp, #16 - 800921c: bd80 pop {r7, pc} - 800921e: 46c0 nop ; (mov r8, r8) - 8009220: 40012c00 .word 0x40012c00 - 8009224: 40014000 .word 0x40014000 - 8009228: 40014400 .word 0x40014400 - 800922c: 40014800 .word 0x40014800 - 8009230: 40000400 .word 0x40000400 - 8009234: 00010007 .word 0x00010007 - -08009238 : - * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init() - * @param htim TIM Input Capture handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) { 8009238: b580 push {r7, lr} 800923a: b082 sub sp, #8 @@ -23063,11 +23070,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) if (htim == NULL) 8009240: 687b ldr r3, [r7, #4] 8009242: 2b00 cmp r3, #0 - 8009244: d101 bne.n 800924a + 8009244: d101 bne.n 800924a { return HAL_ERROR; 8009246: 2301 movs r3, #1 - 8009248: e04a b.n 80092e0 + 8009248: e04a b.n 80092e0 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); @@ -23079,7 +23086,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) 800924e: 5c9b ldrb r3, [r3, r2] 8009250: b2db uxtb r3, r3 8009252: 2b00 cmp r3, #0 - 8009254: d107 bne.n 8009266 + 8009254: d107 bne.n 8009266 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; @@ -23089,13 +23096,13 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) 800925c: 5499 strb r1, [r3, r2] } /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->IC_MspInitCallback(htim); + htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_IC_MspInit(htim); + HAL_TIM_PWM_MspInit(htim); 800925e: 687b ldr r3, [r7, #4] 8009260: 0018 movs r0, r3 - 8009262: f000 f841 bl 80092e8 + 8009262: f000 f841 bl 80092e8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } @@ -23106,7 +23113,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) 800926a: 2102 movs r1, #2 800926c: 5499 strb r1, [r3, r2] - /* Init the base time for the input capture */ + /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 800926e: 687b ldr r3, [r7, #4] 8009270: 681a ldr r2, [r3, #0] @@ -23114,7 +23121,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) 8009274: 3304 adds r3, #4 8009276: 0019 movs r1, r3 8009278: 0010 movs r0, r2 - 800927a: f000 fd25 bl 8009cc8 + 800927a: f000 fe69 bl 8009f50 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; @@ -23182,12 +23189,12 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) 80092e4: b002 add sp, #8 80092e6: bd80 pop {r7, pc} -080092e8 : - * @brief Initializes the TIM Input Capture MSP. - * @param htim TIM Input Capture handle +080092e8 : + * @brief Initializes the TIM PWM MSP. + * @param htim TIM PWM handle * @retval None */ -__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) +__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 80092e8: b580 push {r7, lr} 80092ea: b082 sub sp, #8 @@ -23196,7 +23203,7 @@ __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_MspInit could be implemented in the user file + the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 80092f0: 46c0 nop ; (mov r8, r8) @@ -23204,3954 +23211,3895 @@ __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) 80092f4: b002 add sp, #8 80092f6: bd80 pop {r7, pc} -080092f8 : +080092f8 : + * @arg TIM_CHANNEL_5: TIM Channel 5 selected + * @arg TIM_CHANNEL_6: TIM Channel 6 selected + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +{ + 80092f8: b580 push {r7, lr} + 80092fa: b084 sub sp, #16 + 80092fc: af00 add r7, sp, #0 + 80092fe: 6078 str r0, [r7, #4] + 8009300: 6039 str r1, [r7, #0] + + /* Check the parameters */ + assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + + /* Check the TIM channel state */ + if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 8009302: 683b ldr r3, [r7, #0] + 8009304: 2b00 cmp r3, #0 + 8009306: d108 bne.n 800931a + 8009308: 687b ldr r3, [r7, #4] + 800930a: 223e movs r2, #62 ; 0x3e + 800930c: 5c9b ldrb r3, [r3, r2] + 800930e: b2db uxtb r3, r3 + 8009310: 3b01 subs r3, #1 + 8009312: 1e5a subs r2, r3, #1 + 8009314: 4193 sbcs r3, r2 + 8009316: b2db uxtb r3, r3 + 8009318: e037 b.n 800938a + 800931a: 683b ldr r3, [r7, #0] + 800931c: 2b04 cmp r3, #4 + 800931e: d108 bne.n 8009332 + 8009320: 687b ldr r3, [r7, #4] + 8009322: 223f movs r2, #63 ; 0x3f + 8009324: 5c9b ldrb r3, [r3, r2] + 8009326: b2db uxtb r3, r3 + 8009328: 3b01 subs r3, #1 + 800932a: 1e5a subs r2, r3, #1 + 800932c: 4193 sbcs r3, r2 + 800932e: b2db uxtb r3, r3 + 8009330: e02b b.n 800938a + 8009332: 683b ldr r3, [r7, #0] + 8009334: 2b08 cmp r3, #8 + 8009336: d108 bne.n 800934a + 8009338: 687b ldr r3, [r7, #4] + 800933a: 2240 movs r2, #64 ; 0x40 + 800933c: 5c9b ldrb r3, [r3, r2] + 800933e: b2db uxtb r3, r3 + 8009340: 3b01 subs r3, #1 + 8009342: 1e5a subs r2, r3, #1 + 8009344: 4193 sbcs r3, r2 + 8009346: b2db uxtb r3, r3 + 8009348: e01f b.n 800938a + 800934a: 683b ldr r3, [r7, #0] + 800934c: 2b0c cmp r3, #12 + 800934e: d108 bne.n 8009362 + 8009350: 687b ldr r3, [r7, #4] + 8009352: 2241 movs r2, #65 ; 0x41 + 8009354: 5c9b ldrb r3, [r3, r2] + 8009356: b2db uxtb r3, r3 + 8009358: 3b01 subs r3, #1 + 800935a: 1e5a subs r2, r3, #1 + 800935c: 4193 sbcs r3, r2 + 800935e: b2db uxtb r3, r3 + 8009360: e013 b.n 800938a + 8009362: 683b ldr r3, [r7, #0] + 8009364: 2b10 cmp r3, #16 + 8009366: d108 bne.n 800937a + 8009368: 687b ldr r3, [r7, #4] + 800936a: 2242 movs r2, #66 ; 0x42 + 800936c: 5c9b ldrb r3, [r3, r2] + 800936e: b2db uxtb r3, r3 + 8009370: 3b01 subs r3, #1 + 8009372: 1e5a subs r2, r3, #1 + 8009374: 4193 sbcs r3, r2 + 8009376: b2db uxtb r3, r3 + 8009378: e007 b.n 800938a + 800937a: 687b ldr r3, [r7, #4] + 800937c: 2243 movs r2, #67 ; 0x43 + 800937e: 5c9b ldrb r3, [r3, r2] + 8009380: b2db uxtb r3, r3 + 8009382: 3b01 subs r3, #1 + 8009384: 1e5a subs r2, r3, #1 + 8009386: 4193 sbcs r3, r2 + 8009388: b2db uxtb r3, r3 + 800938a: 2b00 cmp r3, #0 + 800938c: d001 beq.n 8009392 + { + return HAL_ERROR; + 800938e: 2301 movs r3, #1 + 8009390: e085 b.n 800949e + } + + /* Set the TIM channel state */ + TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 8009392: 683b ldr r3, [r7, #0] + 8009394: 2b00 cmp r3, #0 + 8009396: d104 bne.n 80093a2 + 8009398: 687b ldr r3, [r7, #4] + 800939a: 223e movs r2, #62 ; 0x3e + 800939c: 2102 movs r1, #2 + 800939e: 5499 strb r1, [r3, r2] + 80093a0: e023 b.n 80093ea + 80093a2: 683b ldr r3, [r7, #0] + 80093a4: 2b04 cmp r3, #4 + 80093a6: d104 bne.n 80093b2 + 80093a8: 687b ldr r3, [r7, #4] + 80093aa: 223f movs r2, #63 ; 0x3f + 80093ac: 2102 movs r1, #2 + 80093ae: 5499 strb r1, [r3, r2] + 80093b0: e01b b.n 80093ea + 80093b2: 683b ldr r3, [r7, #0] + 80093b4: 2b08 cmp r3, #8 + 80093b6: d104 bne.n 80093c2 + 80093b8: 687b ldr r3, [r7, #4] + 80093ba: 2240 movs r2, #64 ; 0x40 + 80093bc: 2102 movs r1, #2 + 80093be: 5499 strb r1, [r3, r2] + 80093c0: e013 b.n 80093ea + 80093c2: 683b ldr r3, [r7, #0] + 80093c4: 2b0c cmp r3, #12 + 80093c6: d104 bne.n 80093d2 + 80093c8: 687b ldr r3, [r7, #4] + 80093ca: 2241 movs r2, #65 ; 0x41 + 80093cc: 2102 movs r1, #2 + 80093ce: 5499 strb r1, [r3, r2] + 80093d0: e00b b.n 80093ea + 80093d2: 683b ldr r3, [r7, #0] + 80093d4: 2b10 cmp r3, #16 + 80093d6: d104 bne.n 80093e2 + 80093d8: 687b ldr r3, [r7, #4] + 80093da: 2242 movs r2, #66 ; 0x42 + 80093dc: 2102 movs r1, #2 + 80093de: 5499 strb r1, [r3, r2] + 80093e0: e003 b.n 80093ea + 80093e2: 687b ldr r3, [r7, #4] + 80093e4: 2243 movs r2, #67 ; 0x43 + 80093e6: 2102 movs r1, #2 + 80093e8: 5499 strb r1, [r3, r2] + + /* Enable the Capture compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + 80093ea: 687b ldr r3, [r7, #4] + 80093ec: 681b ldr r3, [r3, #0] + 80093ee: 6839 ldr r1, [r7, #0] + 80093f0: 2201 movs r2, #1 + 80093f2: 0018 movs r0, r3 + 80093f4: f001 fb38 bl 800aa68 + + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 80093f8: 687b ldr r3, [r7, #4] + 80093fa: 681b ldr r3, [r3, #0] + 80093fc: 4a2a ldr r2, [pc, #168] ; (80094a8 ) + 80093fe: 4293 cmp r3, r2 + 8009400: d00e beq.n 8009420 + 8009402: 687b ldr r3, [r7, #4] + 8009404: 681b ldr r3, [r3, #0] + 8009406: 4a29 ldr r2, [pc, #164] ; (80094ac ) + 8009408: 4293 cmp r3, r2 + 800940a: d009 beq.n 8009420 + 800940c: 687b ldr r3, [r7, #4] + 800940e: 681b ldr r3, [r3, #0] + 8009410: 4a27 ldr r2, [pc, #156] ; (80094b0 ) + 8009412: 4293 cmp r3, r2 + 8009414: d004 beq.n 8009420 + 8009416: 687b ldr r3, [r7, #4] + 8009418: 681b ldr r3, [r3, #0] + 800941a: 4a26 ldr r2, [pc, #152] ; (80094b4 ) + 800941c: 4293 cmp r3, r2 + 800941e: d101 bne.n 8009424 + 8009420: 2301 movs r3, #1 + 8009422: e000 b.n 8009426 + 8009424: 2300 movs r3, #0 + 8009426: 2b00 cmp r3, #0 + 8009428: d008 beq.n 800943c + { + /* Enable the main output */ + __HAL_TIM_MOE_ENABLE(htim); + 800942a: 687b ldr r3, [r7, #4] + 800942c: 681b ldr r3, [r3, #0] + 800942e: 6c5a ldr r2, [r3, #68] ; 0x44 + 8009430: 687b ldr r3, [r7, #4] + 8009432: 681b ldr r3, [r3, #0] + 8009434: 2180 movs r1, #128 ; 0x80 + 8009436: 0209 lsls r1, r1, #8 + 8009438: 430a orrs r2, r1 + 800943a: 645a str r2, [r3, #68] ; 0x44 + } + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 800943c: 687b ldr r3, [r7, #4] + 800943e: 681b ldr r3, [r3, #0] + 8009440: 4a19 ldr r2, [pc, #100] ; (80094a8 ) + 8009442: 4293 cmp r3, r2 + 8009444: d009 beq.n 800945a + 8009446: 687b ldr r3, [r7, #4] + 8009448: 681b ldr r3, [r3, #0] + 800944a: 4a1b ldr r2, [pc, #108] ; (80094b8 ) + 800944c: 4293 cmp r3, r2 + 800944e: d004 beq.n 800945a + 8009450: 687b ldr r3, [r7, #4] + 8009452: 681b ldr r3, [r3, #0] + 8009454: 4a15 ldr r2, [pc, #84] ; (80094ac ) + 8009456: 4293 cmp r3, r2 + 8009458: d116 bne.n 8009488 + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 800945a: 687b ldr r3, [r7, #4] + 800945c: 681b ldr r3, [r3, #0] + 800945e: 689b ldr r3, [r3, #8] + 8009460: 4a16 ldr r2, [pc, #88] ; (80094bc ) + 8009462: 4013 ands r3, r2 + 8009464: 60fb str r3, [r7, #12] + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8009466: 68fb ldr r3, [r7, #12] + 8009468: 2b06 cmp r3, #6 + 800946a: d016 beq.n 800949a + 800946c: 68fa ldr r2, [r7, #12] + 800946e: 2380 movs r3, #128 ; 0x80 + 8009470: 025b lsls r3, r3, #9 + 8009472: 429a cmp r2, r3 + 8009474: d011 beq.n 800949a + { + __HAL_TIM_ENABLE(htim); + 8009476: 687b ldr r3, [r7, #4] + 8009478: 681b ldr r3, [r3, #0] + 800947a: 681a ldr r2, [r3, #0] + 800947c: 687b ldr r3, [r7, #4] + 800947e: 681b ldr r3, [r3, #0] + 8009480: 2101 movs r1, #1 + 8009482: 430a orrs r2, r1 + 8009484: 601a str r2, [r3, #0] + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8009486: e008 b.n 800949a + } + } + else + { + __HAL_TIM_ENABLE(htim); + 8009488: 687b ldr r3, [r7, #4] + 800948a: 681b ldr r3, [r3, #0] + 800948c: 681a ldr r2, [r3, #0] + 800948e: 687b ldr r3, [r7, #4] + 8009490: 681b ldr r3, [r3, #0] + 8009492: 2101 movs r1, #1 + 8009494: 430a orrs r2, r1 + 8009496: 601a str r2, [r3, #0] + 8009498: e000 b.n 800949c + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 800949a: 46c0 nop ; (mov r8, r8) + } + + /* Return function status */ + return HAL_OK; + 800949c: 2300 movs r3, #0 +} + 800949e: 0018 movs r0, r3 + 80094a0: 46bd mov sp, r7 + 80094a2: b004 add sp, #16 + 80094a4: bd80 pop {r7, pc} + 80094a6: 46c0 nop ; (mov r8, r8) + 80094a8: 40012c00 .word 0x40012c00 + 80094ac: 40014000 .word 0x40014000 + 80094b0: 40014400 .word 0x40014400 + 80094b4: 40014800 .word 0x40014800 + 80094b8: 40000400 .word 0x40000400 + 80094bc: 00010007 .word 0x00010007 + +080094c0 : + * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init() + * @param htim TIM Input Capture handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) +{ + 80094c0: b580 push {r7, lr} + 80094c2: b082 sub sp, #8 + 80094c4: af00 add r7, sp, #0 + 80094c6: 6078 str r0, [r7, #4] + /* Check the TIM handle allocation */ + if (htim == NULL) + 80094c8: 687b ldr r3, [r7, #4] + 80094ca: 2b00 cmp r3, #0 + 80094cc: d101 bne.n 80094d2 + { + return HAL_ERROR; + 80094ce: 2301 movs r3, #1 + 80094d0: e04a b.n 8009568 + assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + + if (htim->State == HAL_TIM_STATE_RESET) + 80094d2: 687b ldr r3, [r7, #4] + 80094d4: 223d movs r2, #61 ; 0x3d + 80094d6: 5c9b ldrb r3, [r3, r2] + 80094d8: b2db uxtb r3, r3 + 80094da: 2b00 cmp r3, #0 + 80094dc: d107 bne.n 80094ee + { + /* Allocate lock resource and initialize it */ + htim->Lock = HAL_UNLOCKED; + 80094de: 687b ldr r3, [r7, #4] + 80094e0: 223c movs r2, #60 ; 0x3c + 80094e2: 2100 movs r1, #0 + 80094e4: 5499 strb r1, [r3, r2] + } + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + htim->IC_MspInitCallback(htim); +#else + /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + HAL_TIM_IC_MspInit(htim); + 80094e6: 687b ldr r3, [r7, #4] + 80094e8: 0018 movs r0, r3 + 80094ea: f000 f841 bl 8009570 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + + /* Set the TIM state */ + htim->State = HAL_TIM_STATE_BUSY; + 80094ee: 687b ldr r3, [r7, #4] + 80094f0: 223d movs r2, #61 ; 0x3d + 80094f2: 2102 movs r1, #2 + 80094f4: 5499 strb r1, [r3, r2] + + /* Init the base time for the input capture */ + TIM_Base_SetConfig(htim->Instance, &htim->Init); + 80094f6: 687b ldr r3, [r7, #4] + 80094f8: 681a ldr r2, [r3, #0] + 80094fa: 687b ldr r3, [r7, #4] + 80094fc: 3304 adds r3, #4 + 80094fe: 0019 movs r1, r3 + 8009500: 0010 movs r0, r2 + 8009502: f000 fd25 bl 8009f50 + + /* Initialize the DMA burst operation state */ + htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 8009506: 687b ldr r3, [r7, #4] + 8009508: 2248 movs r2, #72 ; 0x48 + 800950a: 2101 movs r1, #1 + 800950c: 5499 strb r1, [r3, r2] + + /* Initialize the TIM channels state */ + TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 800950e: 687b ldr r3, [r7, #4] + 8009510: 223e movs r2, #62 ; 0x3e + 8009512: 2101 movs r1, #1 + 8009514: 5499 strb r1, [r3, r2] + 8009516: 687b ldr r3, [r7, #4] + 8009518: 223f movs r2, #63 ; 0x3f + 800951a: 2101 movs r1, #1 + 800951c: 5499 strb r1, [r3, r2] + 800951e: 687b ldr r3, [r7, #4] + 8009520: 2240 movs r2, #64 ; 0x40 + 8009522: 2101 movs r1, #1 + 8009524: 5499 strb r1, [r3, r2] + 8009526: 687b ldr r3, [r7, #4] + 8009528: 2241 movs r2, #65 ; 0x41 + 800952a: 2101 movs r1, #1 + 800952c: 5499 strb r1, [r3, r2] + 800952e: 687b ldr r3, [r7, #4] + 8009530: 2242 movs r2, #66 ; 0x42 + 8009532: 2101 movs r1, #1 + 8009534: 5499 strb r1, [r3, r2] + 8009536: 687b ldr r3, [r7, #4] + 8009538: 2243 movs r2, #67 ; 0x43 + 800953a: 2101 movs r1, #1 + 800953c: 5499 strb r1, [r3, r2] + TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 800953e: 687b ldr r3, [r7, #4] + 8009540: 2244 movs r2, #68 ; 0x44 + 8009542: 2101 movs r1, #1 + 8009544: 5499 strb r1, [r3, r2] + 8009546: 687b ldr r3, [r7, #4] + 8009548: 2245 movs r2, #69 ; 0x45 + 800954a: 2101 movs r1, #1 + 800954c: 5499 strb r1, [r3, r2] + 800954e: 687b ldr r3, [r7, #4] + 8009550: 2246 movs r2, #70 ; 0x46 + 8009552: 2101 movs r1, #1 + 8009554: 5499 strb r1, [r3, r2] + 8009556: 687b ldr r3, [r7, #4] + 8009558: 2247 movs r2, #71 ; 0x47 + 800955a: 2101 movs r1, #1 + 800955c: 5499 strb r1, [r3, r2] + + /* Initialize the TIM state*/ + htim->State = HAL_TIM_STATE_READY; + 800955e: 687b ldr r3, [r7, #4] + 8009560: 223d movs r2, #61 ; 0x3d + 8009562: 2101 movs r1, #1 + 8009564: 5499 strb r1, [r3, r2] + + return HAL_OK; + 8009566: 2300 movs r3, #0 +} + 8009568: 0018 movs r0, r3 + 800956a: 46bd mov sp, r7 + 800956c: b002 add sp, #8 + 800956e: bd80 pop {r7, pc} + +08009570 : + * @brief Initializes the TIM Input Capture MSP. + * @param htim TIM Input Capture handle + * @retval None + */ +__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) +{ + 8009570: b580 push {r7, lr} + 8009572: b082 sub sp, #8 + 8009574: af00 add r7, sp, #0 + 8009576: 6078 str r0, [r7, #4] + UNUSED(htim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_IC_MspInit could be implemented in the user file + */ +} + 8009578: 46c0 nop ; (mov r8, r8) + 800957a: 46bd mov sp, r7 + 800957c: b002 add sp, #8 + 800957e: bd80 pop {r7, pc} + +08009580 : * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated. * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) { - 80092f8: b580 push {r7, lr} - 80092fa: b082 sub sp, #8 - 80092fc: af00 add r7, sp, #0 - 80092fe: 6078 str r0, [r7, #4] - 8009300: 6039 str r1, [r7, #0] + 8009580: b580 push {r7, lr} + 8009582: b082 sub sp, #8 + 8009584: af00 add r7, sp, #0 + 8009586: 6078 str r0, [r7, #4] + 8009588: 6039 str r1, [r7, #0] /* Check the TIM handle allocation */ if (htim == NULL) - 8009302: 687b ldr r3, [r7, #4] - 8009304: 2b00 cmp r3, #0 - 8009306: d101 bne.n 800930c + 800958a: 687b ldr r3, [r7, #4] + 800958c: 2b00 cmp r3, #0 + 800958e: d101 bne.n 8009594 { return HAL_ERROR; - 8009308: 2301 movs r3, #1 - 800930a: e042 b.n 8009392 + 8009590: 2301 movs r3, #1 + 8009592: e042 b.n 800961a assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_OPM_MODE(OnePulseMode)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 800930c: 687b ldr r3, [r7, #4] - 800930e: 223d movs r2, #61 ; 0x3d - 8009310: 5c9b ldrb r3, [r3, r2] - 8009312: b2db uxtb r3, r3 - 8009314: 2b00 cmp r3, #0 - 8009316: d107 bne.n 8009328 + 8009594: 687b ldr r3, [r7, #4] + 8009596: 223d movs r2, #61 ; 0x3d + 8009598: 5c9b ldrb r3, [r3, r2] + 800959a: b2db uxtb r3, r3 + 800959c: 2b00 cmp r3, #0 + 800959e: d107 bne.n 80095b0 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 8009318: 687b ldr r3, [r7, #4] - 800931a: 223c movs r2, #60 ; 0x3c - 800931c: 2100 movs r1, #0 - 800931e: 5499 strb r1, [r3, r2] + 80095a0: 687b ldr r3, [r7, #4] + 80095a2: 223c movs r2, #60 ; 0x3c + 80095a4: 2100 movs r1, #0 + 80095a6: 5499 strb r1, [r3, r2] } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->OnePulse_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_OnePulse_MspInit(htim); - 8009320: 687b ldr r3, [r7, #4] - 8009322: 0018 movs r0, r3 - 8009324: f000 f839 bl 800939a + 80095a8: 687b ldr r3, [r7, #4] + 80095aa: 0018 movs r0, r3 + 80095ac: f000 f839 bl 8009622 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8009328: 687b ldr r3, [r7, #4] - 800932a: 223d movs r2, #61 ; 0x3d - 800932c: 2102 movs r1, #2 - 800932e: 5499 strb r1, [r3, r2] + 80095b0: 687b ldr r3, [r7, #4] + 80095b2: 223d movs r2, #61 ; 0x3d + 80095b4: 2102 movs r1, #2 + 80095b6: 5499 strb r1, [r3, r2] /* Configure the Time base in the One Pulse Mode */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8009330: 687b ldr r3, [r7, #4] - 8009332: 681a ldr r2, [r3, #0] - 8009334: 687b ldr r3, [r7, #4] - 8009336: 3304 adds r3, #4 - 8009338: 0019 movs r1, r3 - 800933a: 0010 movs r0, r2 - 800933c: f000 fcc4 bl 8009cc8 + 80095b8: 687b ldr r3, [r7, #4] + 80095ba: 681a ldr r2, [r3, #0] + 80095bc: 687b ldr r3, [r7, #4] + 80095be: 3304 adds r3, #4 + 80095c0: 0019 movs r1, r3 + 80095c2: 0010 movs r0, r2 + 80095c4: f000 fcc4 bl 8009f50 /* Reset the OPM Bit */ htim->Instance->CR1 &= ~TIM_CR1_OPM; - 8009340: 687b ldr r3, [r7, #4] - 8009342: 681b ldr r3, [r3, #0] - 8009344: 681a ldr r2, [r3, #0] - 8009346: 687b ldr r3, [r7, #4] - 8009348: 681b ldr r3, [r3, #0] - 800934a: 2108 movs r1, #8 - 800934c: 438a bics r2, r1 - 800934e: 601a str r2, [r3, #0] + 80095c8: 687b ldr r3, [r7, #4] + 80095ca: 681b ldr r3, [r3, #0] + 80095cc: 681a ldr r2, [r3, #0] + 80095ce: 687b ldr r3, [r7, #4] + 80095d0: 681b ldr r3, [r3, #0] + 80095d2: 2108 movs r1, #8 + 80095d4: 438a bics r2, r1 + 80095d6: 601a str r2, [r3, #0] /* Configure the OPM Mode */ htim->Instance->CR1 |= OnePulseMode; - 8009350: 687b ldr r3, [r7, #4] - 8009352: 681b ldr r3, [r3, #0] - 8009354: 6819 ldr r1, [r3, #0] - 8009356: 687b ldr r3, [r7, #4] - 8009358: 681b ldr r3, [r3, #0] - 800935a: 683a ldr r2, [r7, #0] - 800935c: 430a orrs r2, r1 - 800935e: 601a str r2, [r3, #0] + 80095d8: 687b ldr r3, [r7, #4] + 80095da: 681b ldr r3, [r3, #0] + 80095dc: 6819 ldr r1, [r3, #0] + 80095de: 687b ldr r3, [r7, #4] + 80095e0: 681b ldr r3, [r3, #0] + 80095e2: 683a ldr r2, [r7, #0] + 80095e4: 430a orrs r2, r1 + 80095e6: 601a str r2, [r3, #0] /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8009360: 687b ldr r3, [r7, #4] - 8009362: 2248 movs r2, #72 ; 0x48 - 8009364: 2101 movs r1, #1 - 8009366: 5499 strb r1, [r3, r2] + 80095e8: 687b ldr r3, [r7, #4] + 80095ea: 2248 movs r2, #72 ; 0x48 + 80095ec: 2101 movs r1, #1 + 80095ee: 5499 strb r1, [r3, r2] /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); - 8009368: 687b ldr r3, [r7, #4] - 800936a: 223e movs r2, #62 ; 0x3e - 800936c: 2101 movs r1, #1 - 800936e: 5499 strb r1, [r3, r2] + 80095f0: 687b ldr r3, [r7, #4] + 80095f2: 223e movs r2, #62 ; 0x3e + 80095f4: 2101 movs r1, #1 + 80095f6: 5499 strb r1, [r3, r2] TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); - 8009370: 687b ldr r3, [r7, #4] - 8009372: 223f movs r2, #63 ; 0x3f - 8009374: 2101 movs r1, #1 - 8009376: 5499 strb r1, [r3, r2] + 80095f8: 687b ldr r3, [r7, #4] + 80095fa: 223f movs r2, #63 ; 0x3f + 80095fc: 2101 movs r1, #1 + 80095fe: 5499 strb r1, [r3, r2] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); - 8009378: 687b ldr r3, [r7, #4] - 800937a: 2244 movs r2, #68 ; 0x44 - 800937c: 2101 movs r1, #1 - 800937e: 5499 strb r1, [r3, r2] + 8009600: 687b ldr r3, [r7, #4] + 8009602: 2244 movs r2, #68 ; 0x44 + 8009604: 2101 movs r1, #1 + 8009606: 5499 strb r1, [r3, r2] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); - 8009380: 687b ldr r3, [r7, #4] - 8009382: 2245 movs r2, #69 ; 0x45 - 8009384: 2101 movs r1, #1 - 8009386: 5499 strb r1, [r3, r2] + 8009608: 687b ldr r3, [r7, #4] + 800960a: 2245 movs r2, #69 ; 0x45 + 800960c: 2101 movs r1, #1 + 800960e: 5499 strb r1, [r3, r2] /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8009388: 687b ldr r3, [r7, #4] - 800938a: 223d movs r2, #61 ; 0x3d - 800938c: 2101 movs r1, #1 - 800938e: 5499 strb r1, [r3, r2] + 8009610: 687b ldr r3, [r7, #4] + 8009612: 223d movs r2, #61 ; 0x3d + 8009614: 2101 movs r1, #1 + 8009616: 5499 strb r1, [r3, r2] return HAL_OK; - 8009390: 2300 movs r3, #0 + 8009618: 2300 movs r3, #0 } - 8009392: 0018 movs r0, r3 - 8009394: 46bd mov sp, r7 - 8009396: b002 add sp, #8 - 8009398: bd80 pop {r7, pc} + 800961a: 0018 movs r0, r3 + 800961c: 46bd mov sp, r7 + 800961e: b002 add sp, #8 + 8009620: bd80 pop {r7, pc} -0800939a : +08009622 : * @brief Initializes the TIM One Pulse MSP. * @param htim TIM One Pulse handle * @retval None */ __weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim) { - 800939a: b580 push {r7, lr} - 800939c: b082 sub sp, #8 - 800939e: af00 add r7, sp, #0 - 80093a0: 6078 str r0, [r7, #4] + 8009622: b580 push {r7, lr} + 8009624: b082 sub sp, #8 + 8009626: af00 add r7, sp, #0 + 8009628: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OnePulse_MspInit could be implemented in the user file */ } - 80093a2: 46c0 nop ; (mov r8, r8) - 80093a4: 46bd mov sp, r7 - 80093a6: b002 add sp, #8 - 80093a8: bd80 pop {r7, pc} + 800962a: 46c0 nop ; (mov r8, r8) + 800962c: 46bd mov sp, r7 + 800962e: b002 add sp, #8 + 8009630: bd80 pop {r7, pc} ... -080093ac : +08009634 : * @param htim TIM One Pulse handle * @param OutputChannel See note above * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) { - 80093ac: b5f0 push {r4, r5, r6, r7, lr} - 80093ae: b085 sub sp, #20 - 80093b0: af00 add r7, sp, #0 - 80093b2: 6078 str r0, [r7, #4] - 80093b4: 6039 str r1, [r7, #0] + 8009634: b5f0 push {r4, r5, r6, r7, lr} + 8009636: b085 sub sp, #20 + 8009638: af00 add r7, sp, #0 + 800963a: 6078 str r0, [r7, #4] + 800963c: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); - 80093b6: 200f movs r0, #15 - 80093b8: 183b adds r3, r7, r0 - 80093ba: 687a ldr r2, [r7, #4] - 80093bc: 213e movs r1, #62 ; 0x3e - 80093be: 5c52 ldrb r2, [r2, r1] - 80093c0: 701a strb r2, [r3, #0] + 800963e: 200f movs r0, #15 + 8009640: 183b adds r3, r7, r0 + 8009642: 687a ldr r2, [r7, #4] + 8009644: 213e movs r1, #62 ; 0x3e + 8009646: 5c52 ldrb r2, [r2, r1] + 8009648: 701a strb r2, [r3, #0] HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); - 80093c2: 240e movs r4, #14 - 80093c4: 193b adds r3, r7, r4 - 80093c6: 687a ldr r2, [r7, #4] - 80093c8: 213f movs r1, #63 ; 0x3f - 80093ca: 5c52 ldrb r2, [r2, r1] - 80093cc: 701a strb r2, [r3, #0] + 800964a: 240e movs r4, #14 + 800964c: 193b adds r3, r7, r4 + 800964e: 687a ldr r2, [r7, #4] + 8009650: 213f movs r1, #63 ; 0x3f + 8009652: 5c52 ldrb r2, [r2, r1] + 8009654: 701a strb r2, [r3, #0] HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); - 80093ce: 250d movs r5, #13 - 80093d0: 197b adds r3, r7, r5 - 80093d2: 687a ldr r2, [r7, #4] - 80093d4: 2144 movs r1, #68 ; 0x44 - 80093d6: 5c52 ldrb r2, [r2, r1] - 80093d8: 701a strb r2, [r3, #0] + 8009656: 250d movs r5, #13 + 8009658: 197b adds r3, r7, r5 + 800965a: 687a ldr r2, [r7, #4] + 800965c: 2144 movs r1, #68 ; 0x44 + 800965e: 5c52 ldrb r2, [r2, r1] + 8009660: 701a strb r2, [r3, #0] HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); - 80093da: 260c movs r6, #12 - 80093dc: 19bb adds r3, r7, r6 - 80093de: 687a ldr r2, [r7, #4] - 80093e0: 2145 movs r1, #69 ; 0x45 - 80093e2: 5c52 ldrb r2, [r2, r1] - 80093e4: 701a strb r2, [r3, #0] + 8009662: 260c movs r6, #12 + 8009664: 19bb adds r3, r7, r6 + 8009666: 687a ldr r2, [r7, #4] + 8009668: 2145 movs r1, #69 ; 0x45 + 800966a: 5c52 ldrb r2, [r2, r1] + 800966c: 701a strb r2, [r3, #0] /* Prevent unused argument(s) compilation warning */ UNUSED(OutputChannel); /* Check the TIM channels state */ if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) - 80093e6: 183b adds r3, r7, r0 - 80093e8: 781b ldrb r3, [r3, #0] - 80093ea: 2b01 cmp r3, #1 - 80093ec: d10b bne.n 8009406 + 800966e: 183b adds r3, r7, r0 + 8009670: 781b ldrb r3, [r3, #0] + 8009672: 2b01 cmp r3, #1 + 8009674: d10b bne.n 800968e || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) - 80093ee: 193b adds r3, r7, r4 - 80093f0: 781b ldrb r3, [r3, #0] - 80093f2: 2b01 cmp r3, #1 - 80093f4: d107 bne.n 8009406 + 8009676: 193b adds r3, r7, r4 + 8009678: 781b ldrb r3, [r3, #0] + 800967a: 2b01 cmp r3, #1 + 800967c: d107 bne.n 800968e || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) - 80093f6: 197b adds r3, r7, r5 - 80093f8: 781b ldrb r3, [r3, #0] - 80093fa: 2b01 cmp r3, #1 - 80093fc: d103 bne.n 8009406 + 800967e: 197b adds r3, r7, r5 + 8009680: 781b ldrb r3, [r3, #0] + 8009682: 2b01 cmp r3, #1 + 8009684: d103 bne.n 800968e || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) - 80093fe: 19bb adds r3, r7, r6 - 8009400: 781b ldrb r3, [r3, #0] - 8009402: 2b01 cmp r3, #1 - 8009404: d001 beq.n 800940a + 8009686: 19bb adds r3, r7, r6 + 8009688: 781b ldrb r3, [r3, #0] + 800968a: 2b01 cmp r3, #1 + 800968c: d001 beq.n 8009692 { return HAL_ERROR; - 8009406: 2301 movs r3, #1 - 8009408: e040 b.n 800948c + 800968e: 2301 movs r3, #1 + 8009690: e040 b.n 8009714 } /* Set the TIM channels state */ TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 800940a: 687b ldr r3, [r7, #4] - 800940c: 223e movs r2, #62 ; 0x3e - 800940e: 2102 movs r1, #2 - 8009410: 5499 strb r1, [r3, r2] + 8009692: 687b ldr r3, [r7, #4] + 8009694: 223e movs r2, #62 ; 0x3e + 8009696: 2102 movs r1, #2 + 8009698: 5499 strb r1, [r3, r2] TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8009412: 687b ldr r3, [r7, #4] - 8009414: 223f movs r2, #63 ; 0x3f - 8009416: 2102 movs r1, #2 - 8009418: 5499 strb r1, [r3, r2] + 800969a: 687b ldr r3, [r7, #4] + 800969c: 223f movs r2, #63 ; 0x3f + 800969e: 2102 movs r1, #2 + 80096a0: 5499 strb r1, [r3, r2] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); - 800941a: 687b ldr r3, [r7, #4] - 800941c: 2244 movs r2, #68 ; 0x44 - 800941e: 2102 movs r1, #2 - 8009420: 5499 strb r1, [r3, r2] + 80096a2: 687b ldr r3, [r7, #4] + 80096a4: 2244 movs r2, #68 ; 0x44 + 80096a6: 2102 movs r1, #2 + 80096a8: 5499 strb r1, [r3, r2] TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); - 8009422: 687b ldr r3, [r7, #4] - 8009424: 2245 movs r2, #69 ; 0x45 - 8009426: 2102 movs r1, #2 - 8009428: 5499 strb r1, [r3, r2] + 80096aa: 687b ldr r3, [r7, #4] + 80096ac: 2245 movs r2, #69 ; 0x45 + 80096ae: 2102 movs r1, #2 + 80096b0: 5499 strb r1, [r3, r2] whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together No need to enable the counter, it's enabled automatically by hardware (the counter starts in response to a stimulus and generate a pulse */ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - 800942a: 687b ldr r3, [r7, #4] - 800942c: 681b ldr r3, [r3, #0] - 800942e: 2201 movs r2, #1 - 8009430: 2100 movs r1, #0 - 8009432: 0018 movs r0, r3 - 8009434: f001 f9d4 bl 800a7e0 + 80096b2: 687b ldr r3, [r7, #4] + 80096b4: 681b ldr r3, [r3, #0] + 80096b6: 2201 movs r2, #1 + 80096b8: 2100 movs r1, #0 + 80096ba: 0018 movs r0, r3 + 80096bc: f001 f9d4 bl 800aa68 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - 8009438: 687b ldr r3, [r7, #4] - 800943a: 681b ldr r3, [r3, #0] - 800943c: 2201 movs r2, #1 - 800943e: 2104 movs r1, #4 - 8009440: 0018 movs r0, r3 - 8009442: f001 f9cd bl 800a7e0 + 80096c0: 687b ldr r3, [r7, #4] + 80096c2: 681b ldr r3, [r3, #0] + 80096c4: 2201 movs r2, #1 + 80096c6: 2104 movs r1, #4 + 80096c8: 0018 movs r0, r3 + 80096ca: f001 f9cd bl 800aa68 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - 8009446: 687b ldr r3, [r7, #4] - 8009448: 681b ldr r3, [r3, #0] - 800944a: 4a12 ldr r2, [pc, #72] ; (8009494 ) - 800944c: 4293 cmp r3, r2 - 800944e: d00e beq.n 800946e - 8009450: 687b ldr r3, [r7, #4] - 8009452: 681b ldr r3, [r3, #0] - 8009454: 4a10 ldr r2, [pc, #64] ; (8009498 ) - 8009456: 4293 cmp r3, r2 - 8009458: d009 beq.n 800946e - 800945a: 687b ldr r3, [r7, #4] - 800945c: 681b ldr r3, [r3, #0] - 800945e: 4a0f ldr r2, [pc, #60] ; (800949c ) - 8009460: 4293 cmp r3, r2 - 8009462: d004 beq.n 800946e - 8009464: 687b ldr r3, [r7, #4] - 8009466: 681b ldr r3, [r3, #0] - 8009468: 4a0d ldr r2, [pc, #52] ; (80094a0 ) - 800946a: 4293 cmp r3, r2 - 800946c: d101 bne.n 8009472 - 800946e: 2301 movs r3, #1 - 8009470: e000 b.n 8009474 - 8009472: 2300 movs r3, #0 - 8009474: 2b00 cmp r3, #0 - 8009476: d008 beq.n 800948a + 80096ce: 687b ldr r3, [r7, #4] + 80096d0: 681b ldr r3, [r3, #0] + 80096d2: 4a12 ldr r2, [pc, #72] ; (800971c ) + 80096d4: 4293 cmp r3, r2 + 80096d6: d00e beq.n 80096f6 + 80096d8: 687b ldr r3, [r7, #4] + 80096da: 681b ldr r3, [r3, #0] + 80096dc: 4a10 ldr r2, [pc, #64] ; (8009720 ) + 80096de: 4293 cmp r3, r2 + 80096e0: d009 beq.n 80096f6 + 80096e2: 687b ldr r3, [r7, #4] + 80096e4: 681b ldr r3, [r3, #0] + 80096e6: 4a0f ldr r2, [pc, #60] ; (8009724 ) + 80096e8: 4293 cmp r3, r2 + 80096ea: d004 beq.n 80096f6 + 80096ec: 687b ldr r3, [r7, #4] + 80096ee: 681b ldr r3, [r3, #0] + 80096f0: 4a0d ldr r2, [pc, #52] ; (8009728 ) + 80096f2: 4293 cmp r3, r2 + 80096f4: d101 bne.n 80096fa + 80096f6: 2301 movs r3, #1 + 80096f8: e000 b.n 80096fc + 80096fa: 2300 movs r3, #0 + 80096fc: 2b00 cmp r3, #0 + 80096fe: d008 beq.n 8009712 { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); - 8009478: 687b ldr r3, [r7, #4] - 800947a: 681b ldr r3, [r3, #0] - 800947c: 6c5a ldr r2, [r3, #68] ; 0x44 - 800947e: 687b ldr r3, [r7, #4] - 8009480: 681b ldr r3, [r3, #0] - 8009482: 2180 movs r1, #128 ; 0x80 - 8009484: 0209 lsls r1, r1, #8 - 8009486: 430a orrs r2, r1 - 8009488: 645a str r2, [r3, #68] ; 0x44 + 8009700: 687b ldr r3, [r7, #4] + 8009702: 681b ldr r3, [r3, #0] + 8009704: 6c5a ldr r2, [r3, #68] ; 0x44 + 8009706: 687b ldr r3, [r7, #4] + 8009708: 681b ldr r3, [r3, #0] + 800970a: 2180 movs r1, #128 ; 0x80 + 800970c: 0209 lsls r1, r1, #8 + 800970e: 430a orrs r2, r1 + 8009710: 645a str r2, [r3, #68] ; 0x44 } /* Return function status */ return HAL_OK; - 800948a: 2300 movs r3, #0 + 8009712: 2300 movs r3, #0 } - 800948c: 0018 movs r0, r3 - 800948e: 46bd mov sp, r7 - 8009490: b005 add sp, #20 - 8009492: bdf0 pop {r4, r5, r6, r7, pc} - 8009494: 40012c00 .word 0x40012c00 - 8009498: 40014000 .word 0x40014000 - 800949c: 40014400 .word 0x40014400 - 80094a0: 40014800 .word 0x40014800 + 8009714: 0018 movs r0, r3 + 8009716: 46bd mov sp, r7 + 8009718: b005 add sp, #20 + 800971a: bdf0 pop {r4, r5, r6, r7, pc} + 800971c: 40012c00 .word 0x40012c00 + 8009720: 40014000 .word 0x40014000 + 8009724: 40014400 .word 0x40014400 + 8009728: 40014800 .word 0x40014800 -080094a4 : +0800972c : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 80094a4: b580 push {r7, lr} - 80094a6: b082 sub sp, #8 - 80094a8: af00 add r7, sp, #0 - 80094aa: 6078 str r0, [r7, #4] + 800972c: b580 push {r7, lr} + 800972e: b082 sub sp, #8 + 8009730: af00 add r7, sp, #0 + 8009732: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 80094ac: 687b ldr r3, [r7, #4] - 80094ae: 681b ldr r3, [r3, #0] - 80094b0: 691b ldr r3, [r3, #16] - 80094b2: 2202 movs r2, #2 - 80094b4: 4013 ands r3, r2 - 80094b6: 2b02 cmp r3, #2 - 80094b8: d124 bne.n 8009504 + 8009734: 687b ldr r3, [r7, #4] + 8009736: 681b ldr r3, [r3, #0] + 8009738: 691b ldr r3, [r3, #16] + 800973a: 2202 movs r2, #2 + 800973c: 4013 ands r3, r2 + 800973e: 2b02 cmp r3, #2 + 8009740: d124 bne.n 800978c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 80094ba: 687b ldr r3, [r7, #4] - 80094bc: 681b ldr r3, [r3, #0] - 80094be: 68db ldr r3, [r3, #12] - 80094c0: 2202 movs r2, #2 - 80094c2: 4013 ands r3, r2 - 80094c4: 2b02 cmp r3, #2 - 80094c6: d11d bne.n 8009504 + 8009742: 687b ldr r3, [r7, #4] + 8009744: 681b ldr r3, [r3, #0] + 8009746: 68db ldr r3, [r3, #12] + 8009748: 2202 movs r2, #2 + 800974a: 4013 ands r3, r2 + 800974c: 2b02 cmp r3, #2 + 800974e: d11d bne.n 800978c { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 80094c8: 687b ldr r3, [r7, #4] - 80094ca: 681b ldr r3, [r3, #0] - 80094cc: 2203 movs r2, #3 - 80094ce: 4252 negs r2, r2 - 80094d0: 611a str r2, [r3, #16] + 8009750: 687b ldr r3, [r7, #4] + 8009752: 681b ldr r3, [r3, #0] + 8009754: 2203 movs r2, #3 + 8009756: 4252 negs r2, r2 + 8009758: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 80094d2: 687b ldr r3, [r7, #4] - 80094d4: 2201 movs r2, #1 - 80094d6: 771a strb r2, [r3, #28] + 800975a: 687b ldr r3, [r7, #4] + 800975c: 2201 movs r2, #1 + 800975e: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 80094d8: 687b ldr r3, [r7, #4] - 80094da: 681b ldr r3, [r3, #0] - 80094dc: 699b ldr r3, [r3, #24] - 80094de: 2203 movs r2, #3 - 80094e0: 4013 ands r3, r2 - 80094e2: d004 beq.n 80094ee + 8009760: 687b ldr r3, [r7, #4] + 8009762: 681b ldr r3, [r3, #0] + 8009764: 699b ldr r3, [r3, #24] + 8009766: 2203 movs r2, #3 + 8009768: 4013 ands r3, r2 + 800976a: d004 beq.n 8009776 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80094e4: 687b ldr r3, [r7, #4] - 80094e6: 0018 movs r0, r3 - 80094e8: f000 fbd6 bl 8009c98 - 80094ec: e007 b.n 80094fe + 800976c: 687b ldr r3, [r7, #4] + 800976e: 0018 movs r0, r3 + 8009770: f000 fbd6 bl 8009f20 + 8009774: e007 b.n 8009786 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80094ee: 687b ldr r3, [r7, #4] - 80094f0: 0018 movs r0, r3 - 80094f2: f000 fbc9 bl 8009c88 + 8009776: 687b ldr r3, [r7, #4] + 8009778: 0018 movs r0, r3 + 800977a: f000 fbc9 bl 8009f10 HAL_TIM_PWM_PulseFinishedCallback(htim); - 80094f6: 687b ldr r3, [r7, #4] - 80094f8: 0018 movs r0, r3 - 80094fa: f000 fbd5 bl 8009ca8 + 800977e: 687b ldr r3, [r7, #4] + 8009780: 0018 movs r0, r3 + 8009782: f000 fbd5 bl 8009f30 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80094fe: 687b ldr r3, [r7, #4] - 8009500: 2200 movs r2, #0 - 8009502: 771a strb r2, [r3, #28] + 8009786: 687b ldr r3, [r7, #4] + 8009788: 2200 movs r2, #0 + 800978a: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 8009504: 687b ldr r3, [r7, #4] - 8009506: 681b ldr r3, [r3, #0] - 8009508: 691b ldr r3, [r3, #16] - 800950a: 2204 movs r2, #4 - 800950c: 4013 ands r3, r2 - 800950e: 2b04 cmp r3, #4 - 8009510: d125 bne.n 800955e + 800978c: 687b ldr r3, [r7, #4] + 800978e: 681b ldr r3, [r3, #0] + 8009790: 691b ldr r3, [r3, #16] + 8009792: 2204 movs r2, #4 + 8009794: 4013 ands r3, r2 + 8009796: 2b04 cmp r3, #4 + 8009798: d125 bne.n 80097e6 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 8009512: 687b ldr r3, [r7, #4] - 8009514: 681b ldr r3, [r3, #0] - 8009516: 68db ldr r3, [r3, #12] - 8009518: 2204 movs r2, #4 - 800951a: 4013 ands r3, r2 - 800951c: 2b04 cmp r3, #4 - 800951e: d11e bne.n 800955e + 800979a: 687b ldr r3, [r7, #4] + 800979c: 681b ldr r3, [r3, #0] + 800979e: 68db ldr r3, [r3, #12] + 80097a0: 2204 movs r2, #4 + 80097a2: 4013 ands r3, r2 + 80097a4: 2b04 cmp r3, #4 + 80097a6: d11e bne.n 80097e6 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 8009520: 687b ldr r3, [r7, #4] - 8009522: 681b ldr r3, [r3, #0] - 8009524: 2205 movs r2, #5 - 8009526: 4252 negs r2, r2 - 8009528: 611a str r2, [r3, #16] + 80097a8: 687b ldr r3, [r7, #4] + 80097aa: 681b ldr r3, [r3, #0] + 80097ac: 2205 movs r2, #5 + 80097ae: 4252 negs r2, r2 + 80097b0: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 800952a: 687b ldr r3, [r7, #4] - 800952c: 2202 movs r2, #2 - 800952e: 771a strb r2, [r3, #28] + 80097b2: 687b ldr r3, [r7, #4] + 80097b4: 2202 movs r2, #2 + 80097b6: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8009530: 687b ldr r3, [r7, #4] - 8009532: 681b ldr r3, [r3, #0] - 8009534: 699a ldr r2, [r3, #24] - 8009536: 23c0 movs r3, #192 ; 0xc0 - 8009538: 009b lsls r3, r3, #2 - 800953a: 4013 ands r3, r2 - 800953c: d004 beq.n 8009548 + 80097b8: 687b ldr r3, [r7, #4] + 80097ba: 681b ldr r3, [r3, #0] + 80097bc: 699a ldr r2, [r3, #24] + 80097be: 23c0 movs r3, #192 ; 0xc0 + 80097c0: 009b lsls r3, r3, #2 + 80097c2: 4013 ands r3, r2 + 80097c4: d004 beq.n 80097d0 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 800953e: 687b ldr r3, [r7, #4] - 8009540: 0018 movs r0, r3 - 8009542: f000 fba9 bl 8009c98 - 8009546: e007 b.n 8009558 + 80097c6: 687b ldr r3, [r7, #4] + 80097c8: 0018 movs r0, r3 + 80097ca: f000 fba9 bl 8009f20 + 80097ce: e007 b.n 80097e0 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8009548: 687b ldr r3, [r7, #4] - 800954a: 0018 movs r0, r3 - 800954c: f000 fb9c bl 8009c88 + 80097d0: 687b ldr r3, [r7, #4] + 80097d2: 0018 movs r0, r3 + 80097d4: f000 fb9c bl 8009f10 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8009550: 687b ldr r3, [r7, #4] - 8009552: 0018 movs r0, r3 - 8009554: f000 fba8 bl 8009ca8 + 80097d8: 687b ldr r3, [r7, #4] + 80097da: 0018 movs r0, r3 + 80097dc: f000 fba8 bl 8009f30 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8009558: 687b ldr r3, [r7, #4] - 800955a: 2200 movs r2, #0 - 800955c: 771a strb r2, [r3, #28] + 80097e0: 687b ldr r3, [r7, #4] + 80097e2: 2200 movs r2, #0 + 80097e4: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 800955e: 687b ldr r3, [r7, #4] - 8009560: 681b ldr r3, [r3, #0] - 8009562: 691b ldr r3, [r3, #16] - 8009564: 2208 movs r2, #8 - 8009566: 4013 ands r3, r2 - 8009568: 2b08 cmp r3, #8 - 800956a: d124 bne.n 80095b6 + 80097e6: 687b ldr r3, [r7, #4] + 80097e8: 681b ldr r3, [r3, #0] + 80097ea: 691b ldr r3, [r3, #16] + 80097ec: 2208 movs r2, #8 + 80097ee: 4013 ands r3, r2 + 80097f0: 2b08 cmp r3, #8 + 80097f2: d124 bne.n 800983e { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 800956c: 687b ldr r3, [r7, #4] - 800956e: 681b ldr r3, [r3, #0] - 8009570: 68db ldr r3, [r3, #12] - 8009572: 2208 movs r2, #8 - 8009574: 4013 ands r3, r2 - 8009576: 2b08 cmp r3, #8 - 8009578: d11d bne.n 80095b6 + 80097f4: 687b ldr r3, [r7, #4] + 80097f6: 681b ldr r3, [r3, #0] + 80097f8: 68db ldr r3, [r3, #12] + 80097fa: 2208 movs r2, #8 + 80097fc: 4013 ands r3, r2 + 80097fe: 2b08 cmp r3, #8 + 8009800: d11d bne.n 800983e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 800957a: 687b ldr r3, [r7, #4] - 800957c: 681b ldr r3, [r3, #0] - 800957e: 2209 movs r2, #9 - 8009580: 4252 negs r2, r2 - 8009582: 611a str r2, [r3, #16] + 8009802: 687b ldr r3, [r7, #4] + 8009804: 681b ldr r3, [r3, #0] + 8009806: 2209 movs r2, #9 + 8009808: 4252 negs r2, r2 + 800980a: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8009584: 687b ldr r3, [r7, #4] - 8009586: 2204 movs r2, #4 - 8009588: 771a strb r2, [r3, #28] + 800980c: 687b ldr r3, [r7, #4] + 800980e: 2204 movs r2, #4 + 8009810: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 800958a: 687b ldr r3, [r7, #4] - 800958c: 681b ldr r3, [r3, #0] - 800958e: 69db ldr r3, [r3, #28] - 8009590: 2203 movs r2, #3 - 8009592: 4013 ands r3, r2 - 8009594: d004 beq.n 80095a0 + 8009812: 687b ldr r3, [r7, #4] + 8009814: 681b ldr r3, [r3, #0] + 8009816: 69db ldr r3, [r3, #28] + 8009818: 2203 movs r2, #3 + 800981a: 4013 ands r3, r2 + 800981c: d004 beq.n 8009828 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8009596: 687b ldr r3, [r7, #4] - 8009598: 0018 movs r0, r3 - 800959a: f000 fb7d bl 8009c98 - 800959e: e007 b.n 80095b0 + 800981e: 687b ldr r3, [r7, #4] + 8009820: 0018 movs r0, r3 + 8009822: f000 fb7d bl 8009f20 + 8009826: e007 b.n 8009838 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80095a0: 687b ldr r3, [r7, #4] - 80095a2: 0018 movs r0, r3 - 80095a4: f000 fb70 bl 8009c88 + 8009828: 687b ldr r3, [r7, #4] + 800982a: 0018 movs r0, r3 + 800982c: f000 fb70 bl 8009f10 HAL_TIM_PWM_PulseFinishedCallback(htim); - 80095a8: 687b ldr r3, [r7, #4] - 80095aa: 0018 movs r0, r3 - 80095ac: f000 fb7c bl 8009ca8 + 8009830: 687b ldr r3, [r7, #4] + 8009832: 0018 movs r0, r3 + 8009834: f000 fb7c bl 8009f30 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80095b0: 687b ldr r3, [r7, #4] - 80095b2: 2200 movs r2, #0 - 80095b4: 771a strb r2, [r3, #28] + 8009838: 687b ldr r3, [r7, #4] + 800983a: 2200 movs r2, #0 + 800983c: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 80095b6: 687b ldr r3, [r7, #4] - 80095b8: 681b ldr r3, [r3, #0] - 80095ba: 691b ldr r3, [r3, #16] - 80095bc: 2210 movs r2, #16 - 80095be: 4013 ands r3, r2 - 80095c0: 2b10 cmp r3, #16 - 80095c2: d125 bne.n 8009610 + 800983e: 687b ldr r3, [r7, #4] + 8009840: 681b ldr r3, [r3, #0] + 8009842: 691b ldr r3, [r3, #16] + 8009844: 2210 movs r2, #16 + 8009846: 4013 ands r3, r2 + 8009848: 2b10 cmp r3, #16 + 800984a: d125 bne.n 8009898 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 80095c4: 687b ldr r3, [r7, #4] - 80095c6: 681b ldr r3, [r3, #0] - 80095c8: 68db ldr r3, [r3, #12] - 80095ca: 2210 movs r2, #16 - 80095cc: 4013 ands r3, r2 - 80095ce: 2b10 cmp r3, #16 - 80095d0: d11e bne.n 8009610 + 800984c: 687b ldr r3, [r7, #4] + 800984e: 681b ldr r3, [r3, #0] + 8009850: 68db ldr r3, [r3, #12] + 8009852: 2210 movs r2, #16 + 8009854: 4013 ands r3, r2 + 8009856: 2b10 cmp r3, #16 + 8009858: d11e bne.n 8009898 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 80095d2: 687b ldr r3, [r7, #4] - 80095d4: 681b ldr r3, [r3, #0] - 80095d6: 2211 movs r2, #17 - 80095d8: 4252 negs r2, r2 - 80095da: 611a str r2, [r3, #16] + 800985a: 687b ldr r3, [r7, #4] + 800985c: 681b ldr r3, [r3, #0] + 800985e: 2211 movs r2, #17 + 8009860: 4252 negs r2, r2 + 8009862: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 80095dc: 687b ldr r3, [r7, #4] - 80095de: 2208 movs r2, #8 - 80095e0: 771a strb r2, [r3, #28] + 8009864: 687b ldr r3, [r7, #4] + 8009866: 2208 movs r2, #8 + 8009868: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 80095e2: 687b ldr r3, [r7, #4] - 80095e4: 681b ldr r3, [r3, #0] - 80095e6: 69da ldr r2, [r3, #28] - 80095e8: 23c0 movs r3, #192 ; 0xc0 - 80095ea: 009b lsls r3, r3, #2 - 80095ec: 4013 ands r3, r2 - 80095ee: d004 beq.n 80095fa + 800986a: 687b ldr r3, [r7, #4] + 800986c: 681b ldr r3, [r3, #0] + 800986e: 69da ldr r2, [r3, #28] + 8009870: 23c0 movs r3, #192 ; 0xc0 + 8009872: 009b lsls r3, r3, #2 + 8009874: 4013 ands r3, r2 + 8009876: d004 beq.n 8009882 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80095f0: 687b ldr r3, [r7, #4] - 80095f2: 0018 movs r0, r3 - 80095f4: f000 fb50 bl 8009c98 - 80095f8: e007 b.n 800960a + 8009878: 687b ldr r3, [r7, #4] + 800987a: 0018 movs r0, r3 + 800987c: f000 fb50 bl 8009f20 + 8009880: e007 b.n 8009892 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80095fa: 687b ldr r3, [r7, #4] - 80095fc: 0018 movs r0, r3 - 80095fe: f000 fb43 bl 8009c88 + 8009882: 687b ldr r3, [r7, #4] + 8009884: 0018 movs r0, r3 + 8009886: f000 fb43 bl 8009f10 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8009602: 687b ldr r3, [r7, #4] - 8009604: 0018 movs r0, r3 - 8009606: f000 fb4f bl 8009ca8 + 800988a: 687b ldr r3, [r7, #4] + 800988c: 0018 movs r0, r3 + 800988e: f000 fb4f bl 8009f30 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 800960a: 687b ldr r3, [r7, #4] - 800960c: 2200 movs r2, #0 - 800960e: 771a strb r2, [r3, #28] + 8009892: 687b ldr r3, [r7, #4] + 8009894: 2200 movs r2, #0 + 8009896: 771a strb r2, [r3, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 8009610: 687b ldr r3, [r7, #4] - 8009612: 681b ldr r3, [r3, #0] - 8009614: 691b ldr r3, [r3, #16] - 8009616: 2201 movs r2, #1 - 8009618: 4013 ands r3, r2 - 800961a: 2b01 cmp r3, #1 - 800961c: d10f bne.n 800963e + 8009898: 687b ldr r3, [r7, #4] + 800989a: 681b ldr r3, [r3, #0] + 800989c: 691b ldr r3, [r3, #16] + 800989e: 2201 movs r2, #1 + 80098a0: 4013 ands r3, r2 + 80098a2: 2b01 cmp r3, #1 + 80098a4: d10f bne.n 80098c6 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 800961e: 687b ldr r3, [r7, #4] - 8009620: 681b ldr r3, [r3, #0] - 8009622: 68db ldr r3, [r3, #12] - 8009624: 2201 movs r2, #1 - 8009626: 4013 ands r3, r2 - 8009628: 2b01 cmp r3, #1 - 800962a: d108 bne.n 800963e + 80098a6: 687b ldr r3, [r7, #4] + 80098a8: 681b ldr r3, [r3, #0] + 80098aa: 68db ldr r3, [r3, #12] + 80098ac: 2201 movs r2, #1 + 80098ae: 4013 ands r3, r2 + 80098b0: 2b01 cmp r3, #1 + 80098b2: d108 bne.n 80098c6 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 800962c: 687b ldr r3, [r7, #4] - 800962e: 681b ldr r3, [r3, #0] - 8009630: 2202 movs r2, #2 - 8009632: 4252 negs r2, r2 - 8009634: 611a str r2, [r3, #16] + 80098b4: 687b ldr r3, [r7, #4] + 80098b6: 681b ldr r3, [r3, #0] + 80098b8: 2202 movs r2, #2 + 80098ba: 4252 negs r2, r2 + 80098bc: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 8009636: 687b ldr r3, [r7, #4] - 8009638: 0018 movs r0, r3 - 800963a: f7fa f875 bl 8003728 + 80098be: 687b ldr r3, [r7, #4] + 80098c0: 0018 movs r0, r3 + 80098c2: f7f9 ff35 bl 8003730 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - 800963e: 687b ldr r3, [r7, #4] - 8009640: 681b ldr r3, [r3, #0] - 8009642: 691b ldr r3, [r3, #16] - 8009644: 2280 movs r2, #128 ; 0x80 - 8009646: 4013 ands r3, r2 - 8009648: 2b80 cmp r3, #128 ; 0x80 - 800964a: d10f bne.n 800966c + 80098c6: 687b ldr r3, [r7, #4] + 80098c8: 681b ldr r3, [r3, #0] + 80098ca: 691b ldr r3, [r3, #16] + 80098cc: 2280 movs r2, #128 ; 0x80 + 80098ce: 4013 ands r3, r2 + 80098d0: 2b80 cmp r3, #128 ; 0x80 + 80098d2: d10f bne.n 80098f4 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 800964c: 687b ldr r3, [r7, #4] - 800964e: 681b ldr r3, [r3, #0] - 8009650: 68db ldr r3, [r3, #12] - 8009652: 2280 movs r2, #128 ; 0x80 - 8009654: 4013 ands r3, r2 - 8009656: 2b80 cmp r3, #128 ; 0x80 - 8009658: d108 bne.n 800966c + 80098d4: 687b ldr r3, [r7, #4] + 80098d6: 681b ldr r3, [r3, #0] + 80098d8: 68db ldr r3, [r3, #12] + 80098da: 2280 movs r2, #128 ; 0x80 + 80098dc: 4013 ands r3, r2 + 80098de: 2b80 cmp r3, #128 ; 0x80 + 80098e0: d108 bne.n 80098f4 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - 800965a: 687b ldr r3, [r7, #4] - 800965c: 681b ldr r3, [r3, #0] - 800965e: 2281 movs r2, #129 ; 0x81 - 8009660: 4252 negs r2, r2 - 8009662: 611a str r2, [r3, #16] + 80098e2: 687b ldr r3, [r7, #4] + 80098e4: 681b ldr r3, [r3, #0] + 80098e6: 2281 movs r2, #129 ; 0x81 + 80098e8: 4252 negs r2, r2 + 80098ea: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); - 8009664: 687b ldr r3, [r7, #4] - 8009666: 0018 movs r0, r3 - 8009668: f001 f9f4 bl 800aa54 + 80098ec: 687b ldr r3, [r7, #4] + 80098ee: 0018 movs r0, r3 + 80098f0: f001 f9f4 bl 800acdc #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break2 input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) - 800966c: 687b ldr r3, [r7, #4] - 800966e: 681b ldr r3, [r3, #0] - 8009670: 691a ldr r2, [r3, #16] - 8009672: 2380 movs r3, #128 ; 0x80 - 8009674: 005b lsls r3, r3, #1 - 8009676: 401a ands r2, r3 - 8009678: 2380 movs r3, #128 ; 0x80 - 800967a: 005b lsls r3, r3, #1 - 800967c: 429a cmp r2, r3 - 800967e: d10e bne.n 800969e + 80098f4: 687b ldr r3, [r7, #4] + 80098f6: 681b ldr r3, [r3, #0] + 80098f8: 691a ldr r2, [r3, #16] + 80098fa: 2380 movs r3, #128 ; 0x80 + 80098fc: 005b lsls r3, r3, #1 + 80098fe: 401a ands r2, r3 + 8009900: 2380 movs r3, #128 ; 0x80 + 8009902: 005b lsls r3, r3, #1 + 8009904: 429a cmp r2, r3 + 8009906: d10e bne.n 8009926 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 8009680: 687b ldr r3, [r7, #4] - 8009682: 681b ldr r3, [r3, #0] - 8009684: 68db ldr r3, [r3, #12] - 8009686: 2280 movs r2, #128 ; 0x80 - 8009688: 4013 ands r3, r2 - 800968a: 2b80 cmp r3, #128 ; 0x80 - 800968c: d107 bne.n 800969e + 8009908: 687b ldr r3, [r7, #4] + 800990a: 681b ldr r3, [r3, #0] + 800990c: 68db ldr r3, [r3, #12] + 800990e: 2280 movs r2, #128 ; 0x80 + 8009910: 4013 ands r3, r2 + 8009912: 2b80 cmp r3, #128 ; 0x80 + 8009914: d107 bne.n 8009926 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); - 800968e: 687b ldr r3, [r7, #4] - 8009690: 681b ldr r3, [r3, #0] - 8009692: 4a1c ldr r2, [pc, #112] ; (8009704 ) - 8009694: 611a str r2, [r3, #16] + 8009916: 687b ldr r3, [r7, #4] + 8009918: 681b ldr r3, [r3, #0] + 800991a: 4a1c ldr r2, [pc, #112] ; (800998c ) + 800991c: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->Break2Callback(htim); #else HAL_TIMEx_Break2Callback(htim); - 8009696: 687b ldr r3, [r7, #4] - 8009698: 0018 movs r0, r3 - 800969a: f001 f9e3 bl 800aa64 + 800991e: 687b ldr r3, [r7, #4] + 8009920: 0018 movs r0, r3 + 8009922: f001 f9e3 bl 800acec #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 800969e: 687b ldr r3, [r7, #4] - 80096a0: 681b ldr r3, [r3, #0] - 80096a2: 691b ldr r3, [r3, #16] - 80096a4: 2240 movs r2, #64 ; 0x40 - 80096a6: 4013 ands r3, r2 - 80096a8: 2b40 cmp r3, #64 ; 0x40 - 80096aa: d10f bne.n 80096cc + 8009926: 687b ldr r3, [r7, #4] + 8009928: 681b ldr r3, [r3, #0] + 800992a: 691b ldr r3, [r3, #16] + 800992c: 2240 movs r2, #64 ; 0x40 + 800992e: 4013 ands r3, r2 + 8009930: 2b40 cmp r3, #64 ; 0x40 + 8009932: d10f bne.n 8009954 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 80096ac: 687b ldr r3, [r7, #4] - 80096ae: 681b ldr r3, [r3, #0] - 80096b0: 68db ldr r3, [r3, #12] - 80096b2: 2240 movs r2, #64 ; 0x40 - 80096b4: 4013 ands r3, r2 - 80096b6: 2b40 cmp r3, #64 ; 0x40 - 80096b8: d108 bne.n 80096cc + 8009934: 687b ldr r3, [r7, #4] + 8009936: 681b ldr r3, [r3, #0] + 8009938: 68db ldr r3, [r3, #12] + 800993a: 2240 movs r2, #64 ; 0x40 + 800993c: 4013 ands r3, r2 + 800993e: 2b40 cmp r3, #64 ; 0x40 + 8009940: d108 bne.n 8009954 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 80096ba: 687b ldr r3, [r7, #4] - 80096bc: 681b ldr r3, [r3, #0] - 80096be: 2241 movs r2, #65 ; 0x41 - 80096c0: 4252 negs r2, r2 - 80096c2: 611a str r2, [r3, #16] + 8009942: 687b ldr r3, [r7, #4] + 8009944: 681b ldr r3, [r3, #0] + 8009946: 2241 movs r2, #65 ; 0x41 + 8009948: 4252 negs r2, r2 + 800994a: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 80096c4: 687b ldr r3, [r7, #4] - 80096c6: 0018 movs r0, r3 - 80096c8: f000 faf6 bl 8009cb8 + 800994c: 687b ldr r3, [r7, #4] + 800994e: 0018 movs r0, r3 + 8009950: f000 faf6 bl 8009f40 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - 80096cc: 687b ldr r3, [r7, #4] - 80096ce: 681b ldr r3, [r3, #0] - 80096d0: 691b ldr r3, [r3, #16] - 80096d2: 2220 movs r2, #32 - 80096d4: 4013 ands r3, r2 - 80096d6: 2b20 cmp r3, #32 - 80096d8: d10f bne.n 80096fa + 8009954: 687b ldr r3, [r7, #4] + 8009956: 681b ldr r3, [r3, #0] + 8009958: 691b ldr r3, [r3, #16] + 800995a: 2220 movs r2, #32 + 800995c: 4013 ands r3, r2 + 800995e: 2b20 cmp r3, #32 + 8009960: d10f bne.n 8009982 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) - 80096da: 687b ldr r3, [r7, #4] - 80096dc: 681b ldr r3, [r3, #0] - 80096de: 68db ldr r3, [r3, #12] - 80096e0: 2220 movs r2, #32 - 80096e2: 4013 ands r3, r2 - 80096e4: 2b20 cmp r3, #32 - 80096e6: d108 bne.n 80096fa + 8009962: 687b ldr r3, [r7, #4] + 8009964: 681b ldr r3, [r3, #0] + 8009966: 68db ldr r3, [r3, #12] + 8009968: 2220 movs r2, #32 + 800996a: 4013 ands r3, r2 + 800996c: 2b20 cmp r3, #32 + 800996e: d108 bne.n 8009982 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - 80096e8: 687b ldr r3, [r7, #4] - 80096ea: 681b ldr r3, [r3, #0] - 80096ec: 2221 movs r2, #33 ; 0x21 - 80096ee: 4252 negs r2, r2 - 80096f0: 611a str r2, [r3, #16] + 8009970: 687b ldr r3, [r7, #4] + 8009972: 681b ldr r3, [r3, #0] + 8009974: 2221 movs r2, #33 ; 0x21 + 8009976: 4252 negs r2, r2 + 8009978: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); - 80096f2: 687b ldr r3, [r7, #4] - 80096f4: 0018 movs r0, r3 - 80096f6: f001 f9a5 bl 800aa44 + 800997a: 687b ldr r3, [r7, #4] + 800997c: 0018 movs r0, r3 + 800997e: f001 f9a5 bl 800accc #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 80096fa: 46c0 nop ; (mov r8, r8) - 80096fc: 46bd mov sp, r7 - 80096fe: b002 add sp, #8 - 8009700: bd80 pop {r7, pc} - 8009702: 46c0 nop ; (mov r8, r8) - 8009704: fffffeff .word 0xfffffeff + 8009982: 46c0 nop ; (mov r8, r8) + 8009984: 46bd mov sp, r7 + 8009986: b002 add sp, #8 + 8009988: bd80 pop {r7, pc} + 800998a: 46c0 nop ; (mov r8, r8) + 800998c: fffffeff .word 0xfffffeff -08009708 : +08009990 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConfig, uint32_t Channel) { - 8009708: b580 push {r7, lr} - 800970a: b086 sub sp, #24 - 800970c: af00 add r7, sp, #0 - 800970e: 60f8 str r0, [r7, #12] - 8009710: 60b9 str r1, [r7, #8] - 8009712: 607a str r2, [r7, #4] + 8009990: b580 push {r7, lr} + 8009992: b086 sub sp, #24 + 8009994: af00 add r7, sp, #0 + 8009996: 60f8 str r0, [r7, #12] + 8009998: 60b9 str r1, [r7, #8] + 800999a: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8009714: 2317 movs r3, #23 - 8009716: 18fb adds r3, r7, r3 - 8009718: 2200 movs r2, #0 - 800971a: 701a strb r2, [r3, #0] + 800999c: 2317 movs r3, #23 + 800999e: 18fb adds r3, r7, r3 + 80099a0: 2200 movs r2, #0 + 80099a2: 701a strb r2, [r3, #0] assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); /* Process Locked */ __HAL_LOCK(htim); - 800971c: 68fb ldr r3, [r7, #12] - 800971e: 223c movs r2, #60 ; 0x3c - 8009720: 5c9b ldrb r3, [r3, r2] - 8009722: 2b01 cmp r3, #1 - 8009724: d101 bne.n 800972a - 8009726: 2302 movs r3, #2 - 8009728: e08c b.n 8009844 - 800972a: 68fb ldr r3, [r7, #12] - 800972c: 223c movs r2, #60 ; 0x3c - 800972e: 2101 movs r1, #1 - 8009730: 5499 strb r1, [r3, r2] + 80099a4: 68fb ldr r3, [r7, #12] + 80099a6: 223c movs r2, #60 ; 0x3c + 80099a8: 5c9b ldrb r3, [r3, r2] + 80099aa: 2b01 cmp r3, #1 + 80099ac: d101 bne.n 80099b2 + 80099ae: 2302 movs r3, #2 + 80099b0: e08c b.n 8009acc + 80099b2: 68fb ldr r3, [r7, #12] + 80099b4: 223c movs r2, #60 ; 0x3c + 80099b6: 2101 movs r1, #1 + 80099b8: 5499 strb r1, [r3, r2] if (Channel == TIM_CHANNEL_1) - 8009732: 687b ldr r3, [r7, #4] - 8009734: 2b00 cmp r3, #0 - 8009736: d11b bne.n 8009770 + 80099ba: 687b ldr r3, [r7, #4] + 80099bc: 2b00 cmp r3, #0 + 80099be: d11b bne.n 80099f8 { /* TI1 Configuration */ TIM_TI1_SetConfig(htim->Instance, - 8009738: 68fb ldr r3, [r7, #12] - 800973a: 6818 ldr r0, [r3, #0] - 800973c: 68bb ldr r3, [r7, #8] - 800973e: 6819 ldr r1, [r3, #0] - 8009740: 68bb ldr r3, [r7, #8] - 8009742: 685a ldr r2, [r3, #4] - 8009744: 68bb ldr r3, [r7, #8] - 8009746: 68db ldr r3, [r3, #12] - 8009748: f000 fe8e bl 800a468 + 80099c0: 68fb ldr r3, [r7, #12] + 80099c2: 6818 ldr r0, [r3, #0] + 80099c4: 68bb ldr r3, [r7, #8] + 80099c6: 6819 ldr r1, [r3, #0] + 80099c8: 68bb ldr r3, [r7, #8] + 80099ca: 685a ldr r2, [r3, #4] + 80099cc: 68bb ldr r3, [r7, #8] + 80099ce: 68db ldr r3, [r3, #12] + 80099d0: f000 fe8e bl 800a6f0 sConfig->ICPolarity, sConfig->ICSelection, sConfig->ICFilter); /* Reset the IC1PSC Bits */ htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - 800974c: 68fb ldr r3, [r7, #12] - 800974e: 681b ldr r3, [r3, #0] - 8009750: 699a ldr r2, [r3, #24] - 8009752: 68fb ldr r3, [r7, #12] - 8009754: 681b ldr r3, [r3, #0] - 8009756: 210c movs r1, #12 - 8009758: 438a bics r2, r1 - 800975a: 619a str r2, [r3, #24] + 80099d4: 68fb ldr r3, [r7, #12] + 80099d6: 681b ldr r3, [r3, #0] + 80099d8: 699a ldr r2, [r3, #24] + 80099da: 68fb ldr r3, [r7, #12] + 80099dc: 681b ldr r3, [r3, #0] + 80099de: 210c movs r1, #12 + 80099e0: 438a bics r2, r1 + 80099e2: 619a str r2, [r3, #24] /* Set the IC1PSC value */ htim->Instance->CCMR1 |= sConfig->ICPrescaler; - 800975c: 68fb ldr r3, [r7, #12] - 800975e: 681b ldr r3, [r3, #0] - 8009760: 6999 ldr r1, [r3, #24] - 8009762: 68bb ldr r3, [r7, #8] - 8009764: 689a ldr r2, [r3, #8] - 8009766: 68fb ldr r3, [r7, #12] - 8009768: 681b ldr r3, [r3, #0] - 800976a: 430a orrs r2, r1 - 800976c: 619a str r2, [r3, #24] - 800976e: e062 b.n 8009836 + 80099e4: 68fb ldr r3, [r7, #12] + 80099e6: 681b ldr r3, [r3, #0] + 80099e8: 6999 ldr r1, [r3, #24] + 80099ea: 68bb ldr r3, [r7, #8] + 80099ec: 689a ldr r2, [r3, #8] + 80099ee: 68fb ldr r3, [r7, #12] + 80099f0: 681b ldr r3, [r3, #0] + 80099f2: 430a orrs r2, r1 + 80099f4: 619a str r2, [r3, #24] + 80099f6: e062 b.n 8009abe } else if (Channel == TIM_CHANNEL_2) - 8009770: 687b ldr r3, [r7, #4] - 8009772: 2b04 cmp r3, #4 - 8009774: d11c bne.n 80097b0 + 80099f8: 687b ldr r3, [r7, #4] + 80099fa: 2b04 cmp r3, #4 + 80099fc: d11c bne.n 8009a38 { /* TI2 Configuration */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); TIM_TI2_SetConfig(htim->Instance, - 8009776: 68fb ldr r3, [r7, #12] - 8009778: 6818 ldr r0, [r3, #0] - 800977a: 68bb ldr r3, [r7, #8] - 800977c: 6819 ldr r1, [r3, #0] - 800977e: 68bb ldr r3, [r7, #8] - 8009780: 685a ldr r2, [r3, #4] - 8009782: 68bb ldr r3, [r7, #8] - 8009784: 68db ldr r3, [r3, #12] - 8009786: f000 fef5 bl 800a574 + 80099fe: 68fb ldr r3, [r7, #12] + 8009a00: 6818 ldr r0, [r3, #0] + 8009a02: 68bb ldr r3, [r7, #8] + 8009a04: 6819 ldr r1, [r3, #0] + 8009a06: 68bb ldr r3, [r7, #8] + 8009a08: 685a ldr r2, [r3, #4] + 8009a0a: 68bb ldr r3, [r7, #8] + 8009a0c: 68db ldr r3, [r3, #12] + 8009a0e: f000 fef5 bl 800a7fc sConfig->ICPolarity, sConfig->ICSelection, sConfig->ICFilter); /* Reset the IC2PSC Bits */ htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - 800978a: 68fb ldr r3, [r7, #12] - 800978c: 681b ldr r3, [r3, #0] - 800978e: 699a ldr r2, [r3, #24] - 8009790: 68fb ldr r3, [r7, #12] - 8009792: 681b ldr r3, [r3, #0] - 8009794: 492d ldr r1, [pc, #180] ; (800984c ) - 8009796: 400a ands r2, r1 - 8009798: 619a str r2, [r3, #24] + 8009a12: 68fb ldr r3, [r7, #12] + 8009a14: 681b ldr r3, [r3, #0] + 8009a16: 699a ldr r2, [r3, #24] + 8009a18: 68fb ldr r3, [r7, #12] + 8009a1a: 681b ldr r3, [r3, #0] + 8009a1c: 492d ldr r1, [pc, #180] ; (8009ad4 ) + 8009a1e: 400a ands r2, r1 + 8009a20: 619a str r2, [r3, #24] /* Set the IC2PSC value */ htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U); - 800979a: 68fb ldr r3, [r7, #12] - 800979c: 681b ldr r3, [r3, #0] - 800979e: 6999 ldr r1, [r3, #24] - 80097a0: 68bb ldr r3, [r7, #8] - 80097a2: 689b ldr r3, [r3, #8] - 80097a4: 021a lsls r2, r3, #8 - 80097a6: 68fb ldr r3, [r7, #12] - 80097a8: 681b ldr r3, [r3, #0] - 80097aa: 430a orrs r2, r1 - 80097ac: 619a str r2, [r3, #24] - 80097ae: e042 b.n 8009836 + 8009a22: 68fb ldr r3, [r7, #12] + 8009a24: 681b ldr r3, [r3, #0] + 8009a26: 6999 ldr r1, [r3, #24] + 8009a28: 68bb ldr r3, [r7, #8] + 8009a2a: 689b ldr r3, [r3, #8] + 8009a2c: 021a lsls r2, r3, #8 + 8009a2e: 68fb ldr r3, [r7, #12] + 8009a30: 681b ldr r3, [r3, #0] + 8009a32: 430a orrs r2, r1 + 8009a34: 619a str r2, [r3, #24] + 8009a36: e042 b.n 8009abe } else if (Channel == TIM_CHANNEL_3) - 80097b0: 687b ldr r3, [r7, #4] - 80097b2: 2b08 cmp r3, #8 - 80097b4: d11b bne.n 80097ee + 8009a38: 687b ldr r3, [r7, #4] + 8009a3a: 2b08 cmp r3, #8 + 8009a3c: d11b bne.n 8009a76 { /* TI3 Configuration */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); TIM_TI3_SetConfig(htim->Instance, - 80097b6: 68fb ldr r3, [r7, #12] - 80097b8: 6818 ldr r0, [r3, #0] - 80097ba: 68bb ldr r3, [r7, #8] - 80097bc: 6819 ldr r1, [r3, #0] - 80097be: 68bb ldr r3, [r7, #8] - 80097c0: 685a ldr r2, [r3, #4] - 80097c2: 68bb ldr r3, [r7, #8] - 80097c4: 68db ldr r3, [r3, #12] - 80097c6: f000 ff49 bl 800a65c + 8009a3e: 68fb ldr r3, [r7, #12] + 8009a40: 6818 ldr r0, [r3, #0] + 8009a42: 68bb ldr r3, [r7, #8] + 8009a44: 6819 ldr r1, [r3, #0] + 8009a46: 68bb ldr r3, [r7, #8] + 8009a48: 685a ldr r2, [r3, #4] + 8009a4a: 68bb ldr r3, [r7, #8] + 8009a4c: 68db ldr r3, [r3, #12] + 8009a4e: f000 ff49 bl 800a8e4 sConfig->ICPolarity, sConfig->ICSelection, sConfig->ICFilter); /* Reset the IC3PSC Bits */ htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; - 80097ca: 68fb ldr r3, [r7, #12] - 80097cc: 681b ldr r3, [r3, #0] - 80097ce: 69da ldr r2, [r3, #28] - 80097d0: 68fb ldr r3, [r7, #12] - 80097d2: 681b ldr r3, [r3, #0] - 80097d4: 210c movs r1, #12 - 80097d6: 438a bics r2, r1 - 80097d8: 61da str r2, [r3, #28] + 8009a52: 68fb ldr r3, [r7, #12] + 8009a54: 681b ldr r3, [r3, #0] + 8009a56: 69da ldr r2, [r3, #28] + 8009a58: 68fb ldr r3, [r7, #12] + 8009a5a: 681b ldr r3, [r3, #0] + 8009a5c: 210c movs r1, #12 + 8009a5e: 438a bics r2, r1 + 8009a60: 61da str r2, [r3, #28] /* Set the IC3PSC value */ htim->Instance->CCMR2 |= sConfig->ICPrescaler; - 80097da: 68fb ldr r3, [r7, #12] - 80097dc: 681b ldr r3, [r3, #0] - 80097de: 69d9 ldr r1, [r3, #28] - 80097e0: 68bb ldr r3, [r7, #8] - 80097e2: 689a ldr r2, [r3, #8] - 80097e4: 68fb ldr r3, [r7, #12] - 80097e6: 681b ldr r3, [r3, #0] - 80097e8: 430a orrs r2, r1 - 80097ea: 61da str r2, [r3, #28] - 80097ec: e023 b.n 8009836 + 8009a62: 68fb ldr r3, [r7, #12] + 8009a64: 681b ldr r3, [r3, #0] + 8009a66: 69d9 ldr r1, [r3, #28] + 8009a68: 68bb ldr r3, [r7, #8] + 8009a6a: 689a ldr r2, [r3, #8] + 8009a6c: 68fb ldr r3, [r7, #12] + 8009a6e: 681b ldr r3, [r3, #0] + 8009a70: 430a orrs r2, r1 + 8009a72: 61da str r2, [r3, #28] + 8009a74: e023 b.n 8009abe } else if (Channel == TIM_CHANNEL_4) - 80097ee: 687b ldr r3, [r7, #4] - 80097f0: 2b0c cmp r3, #12 - 80097f2: d11c bne.n 800982e + 8009a76: 687b ldr r3, [r7, #4] + 8009a78: 2b0c cmp r3, #12 + 8009a7a: d11c bne.n 8009ab6 { /* TI4 Configuration */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); TIM_TI4_SetConfig(htim->Instance, - 80097f4: 68fb ldr r3, [r7, #12] - 80097f6: 6818 ldr r0, [r3, #0] - 80097f8: 68bb ldr r3, [r7, #8] - 80097fa: 6819 ldr r1, [r3, #0] - 80097fc: 68bb ldr r3, [r7, #8] - 80097fe: 685a ldr r2, [r3, #4] - 8009800: 68bb ldr r3, [r7, #8] - 8009802: 68db ldr r3, [r3, #12] - 8009804: f000 ff6a bl 800a6dc + 8009a7c: 68fb ldr r3, [r7, #12] + 8009a7e: 6818 ldr r0, [r3, #0] + 8009a80: 68bb ldr r3, [r7, #8] + 8009a82: 6819 ldr r1, [r3, #0] + 8009a84: 68bb ldr r3, [r7, #8] + 8009a86: 685a ldr r2, [r3, #4] + 8009a88: 68bb ldr r3, [r7, #8] + 8009a8a: 68db ldr r3, [r3, #12] + 8009a8c: f000 ff6a bl 800a964 sConfig->ICPolarity, sConfig->ICSelection, sConfig->ICFilter); /* Reset the IC4PSC Bits */ htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; - 8009808: 68fb ldr r3, [r7, #12] - 800980a: 681b ldr r3, [r3, #0] - 800980c: 69da ldr r2, [r3, #28] - 800980e: 68fb ldr r3, [r7, #12] - 8009810: 681b ldr r3, [r3, #0] - 8009812: 490e ldr r1, [pc, #56] ; (800984c ) - 8009814: 400a ands r2, r1 - 8009816: 61da str r2, [r3, #28] + 8009a90: 68fb ldr r3, [r7, #12] + 8009a92: 681b ldr r3, [r3, #0] + 8009a94: 69da ldr r2, [r3, #28] + 8009a96: 68fb ldr r3, [r7, #12] + 8009a98: 681b ldr r3, [r3, #0] + 8009a9a: 490e ldr r1, [pc, #56] ; (8009ad4 ) + 8009a9c: 400a ands r2, r1 + 8009a9e: 61da str r2, [r3, #28] /* Set the IC4PSC value */ htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); - 8009818: 68fb ldr r3, [r7, #12] - 800981a: 681b ldr r3, [r3, #0] - 800981c: 69d9 ldr r1, [r3, #28] - 800981e: 68bb ldr r3, [r7, #8] - 8009820: 689b ldr r3, [r3, #8] - 8009822: 021a lsls r2, r3, #8 - 8009824: 68fb ldr r3, [r7, #12] - 8009826: 681b ldr r3, [r3, #0] - 8009828: 430a orrs r2, r1 - 800982a: 61da str r2, [r3, #28] - 800982c: e003 b.n 8009836 + 8009aa0: 68fb ldr r3, [r7, #12] + 8009aa2: 681b ldr r3, [r3, #0] + 8009aa4: 69d9 ldr r1, [r3, #28] + 8009aa6: 68bb ldr r3, [r7, #8] + 8009aa8: 689b ldr r3, [r3, #8] + 8009aaa: 021a lsls r2, r3, #8 + 8009aac: 68fb ldr r3, [r7, #12] + 8009aae: 681b ldr r3, [r3, #0] + 8009ab0: 430a orrs r2, r1 + 8009ab2: 61da str r2, [r3, #28] + 8009ab4: e003 b.n 8009abe } else { status = HAL_ERROR; - 800982e: 2317 movs r3, #23 - 8009830: 18fb adds r3, r7, r3 - 8009832: 2201 movs r2, #1 - 8009834: 701a strb r2, [r3, #0] + 8009ab6: 2317 movs r3, #23 + 8009ab8: 18fb adds r3, r7, r3 + 8009aba: 2201 movs r2, #1 + 8009abc: 701a strb r2, [r3, #0] } __HAL_UNLOCK(htim); - 8009836: 68fb ldr r3, [r7, #12] - 8009838: 223c movs r2, #60 ; 0x3c - 800983a: 2100 movs r1, #0 - 800983c: 5499 strb r1, [r3, r2] + 8009abe: 68fb ldr r3, [r7, #12] + 8009ac0: 223c movs r2, #60 ; 0x3c + 8009ac2: 2100 movs r1, #0 + 8009ac4: 5499 strb r1, [r3, r2] return status; - 800983e: 2317 movs r3, #23 - 8009840: 18fb adds r3, r7, r3 - 8009842: 781b ldrb r3, [r3, #0] + 8009ac6: 2317 movs r3, #23 + 8009ac8: 18fb adds r3, r7, r3 + 8009aca: 781b ldrb r3, [r3, #0] } - 8009844: 0018 movs r0, r3 - 8009846: 46bd mov sp, r7 - 8009848: b006 add sp, #24 - 800984a: bd80 pop {r7, pc} - 800984c: fffff3ff .word 0xfffff3ff + 8009acc: 0018 movs r0, r3 + 8009ace: 46bd mov sp, r7 + 8009ad0: b006 add sp, #24 + 8009ad2: bd80 pop {r7, pc} + 8009ad4: fffff3ff .word 0xfffff3ff -08009850 : +08009ad8 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { - 8009850: b580 push {r7, lr} - 8009852: b086 sub sp, #24 - 8009854: af00 add r7, sp, #0 - 8009856: 60f8 str r0, [r7, #12] - 8009858: 60b9 str r1, [r7, #8] - 800985a: 607a str r2, [r7, #4] + 8009ad8: b580 push {r7, lr} + 8009ada: b086 sub sp, #24 + 8009adc: af00 add r7, sp, #0 + 8009ade: 60f8 str r0, [r7, #12] + 8009ae0: 60b9 str r1, [r7, #8] + 8009ae2: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 800985c: 2317 movs r3, #23 - 800985e: 18fb adds r3, r7, r3 - 8009860: 2200 movs r2, #0 - 8009862: 701a strb r2, [r3, #0] + 8009ae4: 2317 movs r3, #23 + 8009ae6: 18fb adds r3, r7, r3 + 8009ae8: 2200 movs r2, #0 + 8009aea: 701a strb r2, [r3, #0] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); - 8009864: 68fb ldr r3, [r7, #12] - 8009866: 223c movs r2, #60 ; 0x3c - 8009868: 5c9b ldrb r3, [r3, r2] - 800986a: 2b01 cmp r3, #1 - 800986c: d101 bne.n 8009872 - 800986e: 2302 movs r3, #2 - 8009870: e0e5 b.n 8009a3e - 8009872: 68fb ldr r3, [r7, #12] - 8009874: 223c movs r2, #60 ; 0x3c - 8009876: 2101 movs r1, #1 - 8009878: 5499 strb r1, [r3, r2] + 8009aec: 68fb ldr r3, [r7, #12] + 8009aee: 223c movs r2, #60 ; 0x3c + 8009af0: 5c9b ldrb r3, [r3, r2] + 8009af2: 2b01 cmp r3, #1 + 8009af4: d101 bne.n 8009afa + 8009af6: 2302 movs r3, #2 + 8009af8: e0e5 b.n 8009cc6 + 8009afa: 68fb ldr r3, [r7, #12] + 8009afc: 223c movs r2, #60 ; 0x3c + 8009afe: 2101 movs r1, #1 + 8009b00: 5499 strb r1, [r3, r2] switch (Channel) - 800987a: 687b ldr r3, [r7, #4] - 800987c: 2b14 cmp r3, #20 - 800987e: d900 bls.n 8009882 - 8009880: e0d1 b.n 8009a26 - 8009882: 687b ldr r3, [r7, #4] - 8009884: 009a lsls r2, r3, #2 - 8009886: 4b70 ldr r3, [pc, #448] ; (8009a48 ) - 8009888: 18d3 adds r3, r2, r3 - 800988a: 681b ldr r3, [r3, #0] - 800988c: 469f mov pc, r3 + 8009b02: 687b ldr r3, [r7, #4] + 8009b04: 2b14 cmp r3, #20 + 8009b06: d900 bls.n 8009b0a + 8009b08: e0d1 b.n 8009cae + 8009b0a: 687b ldr r3, [r7, #4] + 8009b0c: 009a lsls r2, r3, #2 + 8009b0e: 4b70 ldr r3, [pc, #448] ; (8009cd0 ) + 8009b10: 18d3 adds r3, r2, r3 + 8009b12: 681b ldr r3, [r3, #0] + 8009b14: 469f mov pc, r3 { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); - 800988e: 68fb ldr r3, [r7, #12] - 8009890: 681b ldr r3, [r3, #0] - 8009892: 68ba ldr r2, [r7, #8] - 8009894: 0011 movs r1, r2 - 8009896: 0018 movs r0, r3 - 8009898: f000 fa8c bl 8009db4 + 8009b16: 68fb ldr r3, [r7, #12] + 8009b18: 681b ldr r3, [r3, #0] + 8009b1a: 68ba ldr r2, [r7, #8] + 8009b1c: 0011 movs r1, r2 + 8009b1e: 0018 movs r0, r3 + 8009b20: f000 fa8c bl 800a03c /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - 800989c: 68fb ldr r3, [r7, #12] - 800989e: 681b ldr r3, [r3, #0] - 80098a0: 699a ldr r2, [r3, #24] - 80098a2: 68fb ldr r3, [r7, #12] - 80098a4: 681b ldr r3, [r3, #0] - 80098a6: 2108 movs r1, #8 - 80098a8: 430a orrs r2, r1 - 80098aa: 619a str r2, [r3, #24] + 8009b24: 68fb ldr r3, [r7, #12] + 8009b26: 681b ldr r3, [r3, #0] + 8009b28: 699a ldr r2, [r3, #24] + 8009b2a: 68fb ldr r3, [r7, #12] + 8009b2c: 681b ldr r3, [r3, #0] + 8009b2e: 2108 movs r1, #8 + 8009b30: 430a orrs r2, r1 + 8009b32: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - 80098ac: 68fb ldr r3, [r7, #12] - 80098ae: 681b ldr r3, [r3, #0] - 80098b0: 699a ldr r2, [r3, #24] - 80098b2: 68fb ldr r3, [r7, #12] - 80098b4: 681b ldr r3, [r3, #0] - 80098b6: 2104 movs r1, #4 - 80098b8: 438a bics r2, r1 - 80098ba: 619a str r2, [r3, #24] + 8009b34: 68fb ldr r3, [r7, #12] + 8009b36: 681b ldr r3, [r3, #0] + 8009b38: 699a ldr r2, [r3, #24] + 8009b3a: 68fb ldr r3, [r7, #12] + 8009b3c: 681b ldr r3, [r3, #0] + 8009b3e: 2104 movs r1, #4 + 8009b40: 438a bics r2, r1 + 8009b42: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; - 80098bc: 68fb ldr r3, [r7, #12] - 80098be: 681b ldr r3, [r3, #0] - 80098c0: 6999 ldr r1, [r3, #24] - 80098c2: 68bb ldr r3, [r7, #8] - 80098c4: 691a ldr r2, [r3, #16] - 80098c6: 68fb ldr r3, [r7, #12] - 80098c8: 681b ldr r3, [r3, #0] - 80098ca: 430a orrs r2, r1 - 80098cc: 619a str r2, [r3, #24] + 8009b44: 68fb ldr r3, [r7, #12] + 8009b46: 681b ldr r3, [r3, #0] + 8009b48: 6999 ldr r1, [r3, #24] + 8009b4a: 68bb ldr r3, [r7, #8] + 8009b4c: 691a ldr r2, [r3, #16] + 8009b4e: 68fb ldr r3, [r7, #12] + 8009b50: 681b ldr r3, [r3, #0] + 8009b52: 430a orrs r2, r1 + 8009b54: 619a str r2, [r3, #24] break; - 80098ce: e0af b.n 8009a30 + 8009b56: e0af b.n 8009cb8 { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); - 80098d0: 68fb ldr r3, [r7, #12] - 80098d2: 681b ldr r3, [r3, #0] - 80098d4: 68ba ldr r2, [r7, #8] - 80098d6: 0011 movs r1, r2 - 80098d8: 0018 movs r0, r3 - 80098da: f000 faf5 bl 8009ec8 + 8009b58: 68fb ldr r3, [r7, #12] + 8009b5a: 681b ldr r3, [r3, #0] + 8009b5c: 68ba ldr r2, [r7, #8] + 8009b5e: 0011 movs r1, r2 + 8009b60: 0018 movs r0, r3 + 8009b62: f000 faf5 bl 800a150 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - 80098de: 68fb ldr r3, [r7, #12] - 80098e0: 681b ldr r3, [r3, #0] - 80098e2: 699a ldr r2, [r3, #24] - 80098e4: 68fb ldr r3, [r7, #12] - 80098e6: 681b ldr r3, [r3, #0] - 80098e8: 2180 movs r1, #128 ; 0x80 - 80098ea: 0109 lsls r1, r1, #4 - 80098ec: 430a orrs r2, r1 - 80098ee: 619a str r2, [r3, #24] + 8009b66: 68fb ldr r3, [r7, #12] + 8009b68: 681b ldr r3, [r3, #0] + 8009b6a: 699a ldr r2, [r3, #24] + 8009b6c: 68fb ldr r3, [r7, #12] + 8009b6e: 681b ldr r3, [r3, #0] + 8009b70: 2180 movs r1, #128 ; 0x80 + 8009b72: 0109 lsls r1, r1, #4 + 8009b74: 430a orrs r2, r1 + 8009b76: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - 80098f0: 68fb ldr r3, [r7, #12] - 80098f2: 681b ldr r3, [r3, #0] - 80098f4: 699a ldr r2, [r3, #24] - 80098f6: 68fb ldr r3, [r7, #12] - 80098f8: 681b ldr r3, [r3, #0] - 80098fa: 4954 ldr r1, [pc, #336] ; (8009a4c ) - 80098fc: 400a ands r2, r1 - 80098fe: 619a str r2, [r3, #24] + 8009b78: 68fb ldr r3, [r7, #12] + 8009b7a: 681b ldr r3, [r3, #0] + 8009b7c: 699a ldr r2, [r3, #24] + 8009b7e: 68fb ldr r3, [r7, #12] + 8009b80: 681b ldr r3, [r3, #0] + 8009b82: 4954 ldr r1, [pc, #336] ; (8009cd4 ) + 8009b84: 400a ands r2, r1 + 8009b86: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; - 8009900: 68fb ldr r3, [r7, #12] - 8009902: 681b ldr r3, [r3, #0] - 8009904: 6999 ldr r1, [r3, #24] - 8009906: 68bb ldr r3, [r7, #8] - 8009908: 691b ldr r3, [r3, #16] - 800990a: 021a lsls r2, r3, #8 - 800990c: 68fb ldr r3, [r7, #12] - 800990e: 681b ldr r3, [r3, #0] - 8009910: 430a orrs r2, r1 - 8009912: 619a str r2, [r3, #24] + 8009b88: 68fb ldr r3, [r7, #12] + 8009b8a: 681b ldr r3, [r3, #0] + 8009b8c: 6999 ldr r1, [r3, #24] + 8009b8e: 68bb ldr r3, [r7, #8] + 8009b90: 691b ldr r3, [r3, #16] + 8009b92: 021a lsls r2, r3, #8 + 8009b94: 68fb ldr r3, [r7, #12] + 8009b96: 681b ldr r3, [r3, #0] + 8009b98: 430a orrs r2, r1 + 8009b9a: 619a str r2, [r3, #24] break; - 8009914: e08c b.n 8009a30 + 8009b9c: e08c b.n 8009cb8 { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); - 8009916: 68fb ldr r3, [r7, #12] - 8009918: 681b ldr r3, [r3, #0] - 800991a: 68ba ldr r2, [r7, #8] - 800991c: 0011 movs r1, r2 - 800991e: 0018 movs r0, r3 - 8009920: f000 fb56 bl 8009fd0 + 8009b9e: 68fb ldr r3, [r7, #12] + 8009ba0: 681b ldr r3, [r3, #0] + 8009ba2: 68ba ldr r2, [r7, #8] + 8009ba4: 0011 movs r1, r2 + 8009ba6: 0018 movs r0, r3 + 8009ba8: f000 fb56 bl 800a258 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - 8009924: 68fb ldr r3, [r7, #12] - 8009926: 681b ldr r3, [r3, #0] - 8009928: 69da ldr r2, [r3, #28] - 800992a: 68fb ldr r3, [r7, #12] - 800992c: 681b ldr r3, [r3, #0] - 800992e: 2108 movs r1, #8 - 8009930: 430a orrs r2, r1 - 8009932: 61da str r2, [r3, #28] + 8009bac: 68fb ldr r3, [r7, #12] + 8009bae: 681b ldr r3, [r3, #0] + 8009bb0: 69da ldr r2, [r3, #28] + 8009bb2: 68fb ldr r3, [r7, #12] + 8009bb4: 681b ldr r3, [r3, #0] + 8009bb6: 2108 movs r1, #8 + 8009bb8: 430a orrs r2, r1 + 8009bba: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - 8009934: 68fb ldr r3, [r7, #12] - 8009936: 681b ldr r3, [r3, #0] - 8009938: 69da ldr r2, [r3, #28] - 800993a: 68fb ldr r3, [r7, #12] - 800993c: 681b ldr r3, [r3, #0] - 800993e: 2104 movs r1, #4 - 8009940: 438a bics r2, r1 - 8009942: 61da str r2, [r3, #28] + 8009bbc: 68fb ldr r3, [r7, #12] + 8009bbe: 681b ldr r3, [r3, #0] + 8009bc0: 69da ldr r2, [r3, #28] + 8009bc2: 68fb ldr r3, [r7, #12] + 8009bc4: 681b ldr r3, [r3, #0] + 8009bc6: 2104 movs r1, #4 + 8009bc8: 438a bics r2, r1 + 8009bca: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; - 8009944: 68fb ldr r3, [r7, #12] - 8009946: 681b ldr r3, [r3, #0] - 8009948: 69d9 ldr r1, [r3, #28] - 800994a: 68bb ldr r3, [r7, #8] - 800994c: 691a ldr r2, [r3, #16] - 800994e: 68fb ldr r3, [r7, #12] - 8009950: 681b ldr r3, [r3, #0] - 8009952: 430a orrs r2, r1 - 8009954: 61da str r2, [r3, #28] + 8009bcc: 68fb ldr r3, [r7, #12] + 8009bce: 681b ldr r3, [r3, #0] + 8009bd0: 69d9 ldr r1, [r3, #28] + 8009bd2: 68bb ldr r3, [r7, #8] + 8009bd4: 691a ldr r2, [r3, #16] + 8009bd6: 68fb ldr r3, [r7, #12] + 8009bd8: 681b ldr r3, [r3, #0] + 8009bda: 430a orrs r2, r1 + 8009bdc: 61da str r2, [r3, #28] break; - 8009956: e06b b.n 8009a30 + 8009bde: e06b b.n 8009cb8 { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); - 8009958: 68fb ldr r3, [r7, #12] - 800995a: 681b ldr r3, [r3, #0] - 800995c: 68ba ldr r2, [r7, #8] - 800995e: 0011 movs r1, r2 - 8009960: 0018 movs r0, r3 - 8009962: f000 fbbd bl 800a0e0 + 8009be0: 68fb ldr r3, [r7, #12] + 8009be2: 681b ldr r3, [r3, #0] + 8009be4: 68ba ldr r2, [r7, #8] + 8009be6: 0011 movs r1, r2 + 8009be8: 0018 movs r0, r3 + 8009bea: f000 fbbd bl 800a368 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - 8009966: 68fb ldr r3, [r7, #12] - 8009968: 681b ldr r3, [r3, #0] - 800996a: 69da ldr r2, [r3, #28] - 800996c: 68fb ldr r3, [r7, #12] - 800996e: 681b ldr r3, [r3, #0] - 8009970: 2180 movs r1, #128 ; 0x80 - 8009972: 0109 lsls r1, r1, #4 - 8009974: 430a orrs r2, r1 - 8009976: 61da str r2, [r3, #28] + 8009bee: 68fb ldr r3, [r7, #12] + 8009bf0: 681b ldr r3, [r3, #0] + 8009bf2: 69da ldr r2, [r3, #28] + 8009bf4: 68fb ldr r3, [r7, #12] + 8009bf6: 681b ldr r3, [r3, #0] + 8009bf8: 2180 movs r1, #128 ; 0x80 + 8009bfa: 0109 lsls r1, r1, #4 + 8009bfc: 430a orrs r2, r1 + 8009bfe: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - 8009978: 68fb ldr r3, [r7, #12] - 800997a: 681b ldr r3, [r3, #0] - 800997c: 69da ldr r2, [r3, #28] - 800997e: 68fb ldr r3, [r7, #12] - 8009980: 681b ldr r3, [r3, #0] - 8009982: 4932 ldr r1, [pc, #200] ; (8009a4c ) - 8009984: 400a ands r2, r1 - 8009986: 61da str r2, [r3, #28] + 8009c00: 68fb ldr r3, [r7, #12] + 8009c02: 681b ldr r3, [r3, #0] + 8009c04: 69da ldr r2, [r3, #28] + 8009c06: 68fb ldr r3, [r7, #12] + 8009c08: 681b ldr r3, [r3, #0] + 8009c0a: 4932 ldr r1, [pc, #200] ; (8009cd4 ) + 8009c0c: 400a ands r2, r1 + 8009c0e: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; - 8009988: 68fb ldr r3, [r7, #12] - 800998a: 681b ldr r3, [r3, #0] - 800998c: 69d9 ldr r1, [r3, #28] - 800998e: 68bb ldr r3, [r7, #8] - 8009990: 691b ldr r3, [r3, #16] - 8009992: 021a lsls r2, r3, #8 - 8009994: 68fb ldr r3, [r7, #12] - 8009996: 681b ldr r3, [r3, #0] - 8009998: 430a orrs r2, r1 - 800999a: 61da str r2, [r3, #28] + 8009c10: 68fb ldr r3, [r7, #12] + 8009c12: 681b ldr r3, [r3, #0] + 8009c14: 69d9 ldr r1, [r3, #28] + 8009c16: 68bb ldr r3, [r7, #8] + 8009c18: 691b ldr r3, [r3, #16] + 8009c1a: 021a lsls r2, r3, #8 + 8009c1c: 68fb ldr r3, [r7, #12] + 8009c1e: 681b ldr r3, [r3, #0] + 8009c20: 430a orrs r2, r1 + 8009c22: 61da str r2, [r3, #28] break; - 800999c: e048 b.n 8009a30 + 8009c24: e048 b.n 8009cb8 { /* Check the parameters */ assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); /* Configure the Channel 5 in PWM mode */ TIM_OC5_SetConfig(htim->Instance, sConfig); - 800999e: 68fb ldr r3, [r7, #12] - 80099a0: 681b ldr r3, [r3, #0] - 80099a2: 68ba ldr r2, [r7, #8] - 80099a4: 0011 movs r1, r2 - 80099a6: 0018 movs r0, r3 - 80099a8: f000 fc04 bl 800a1b4 + 8009c26: 68fb ldr r3, [r7, #12] + 8009c28: 681b ldr r3, [r3, #0] + 8009c2a: 68ba ldr r2, [r7, #8] + 8009c2c: 0011 movs r1, r2 + 8009c2e: 0018 movs r0, r3 + 8009c30: f000 fc04 bl 800a43c /* Set the Preload enable bit for channel5*/ htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; - 80099ac: 68fb ldr r3, [r7, #12] - 80099ae: 681b ldr r3, [r3, #0] - 80099b0: 6d5a ldr r2, [r3, #84] ; 0x54 - 80099b2: 68fb ldr r3, [r7, #12] - 80099b4: 681b ldr r3, [r3, #0] - 80099b6: 2108 movs r1, #8 - 80099b8: 430a orrs r2, r1 - 80099ba: 655a str r2, [r3, #84] ; 0x54 + 8009c34: 68fb ldr r3, [r7, #12] + 8009c36: 681b ldr r3, [r3, #0] + 8009c38: 6d5a ldr r2, [r3, #84] ; 0x54 + 8009c3a: 68fb ldr r3, [r7, #12] + 8009c3c: 681b ldr r3, [r3, #0] + 8009c3e: 2108 movs r1, #8 + 8009c40: 430a orrs r2, r1 + 8009c42: 655a str r2, [r3, #84] ; 0x54 /* Configure the Output Fast mode */ htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; - 80099bc: 68fb ldr r3, [r7, #12] - 80099be: 681b ldr r3, [r3, #0] - 80099c0: 6d5a ldr r2, [r3, #84] ; 0x54 - 80099c2: 68fb ldr r3, [r7, #12] - 80099c4: 681b ldr r3, [r3, #0] - 80099c6: 2104 movs r1, #4 - 80099c8: 438a bics r2, r1 - 80099ca: 655a str r2, [r3, #84] ; 0x54 + 8009c44: 68fb ldr r3, [r7, #12] + 8009c46: 681b ldr r3, [r3, #0] + 8009c48: 6d5a ldr r2, [r3, #84] ; 0x54 + 8009c4a: 68fb ldr r3, [r7, #12] + 8009c4c: 681b ldr r3, [r3, #0] + 8009c4e: 2104 movs r1, #4 + 8009c50: 438a bics r2, r1 + 8009c52: 655a str r2, [r3, #84] ; 0x54 htim->Instance->CCMR3 |= sConfig->OCFastMode; - 80099cc: 68fb ldr r3, [r7, #12] - 80099ce: 681b ldr r3, [r3, #0] - 80099d0: 6d59 ldr r1, [r3, #84] ; 0x54 - 80099d2: 68bb ldr r3, [r7, #8] - 80099d4: 691a ldr r2, [r3, #16] - 80099d6: 68fb ldr r3, [r7, #12] - 80099d8: 681b ldr r3, [r3, #0] - 80099da: 430a orrs r2, r1 - 80099dc: 655a str r2, [r3, #84] ; 0x54 + 8009c54: 68fb ldr r3, [r7, #12] + 8009c56: 681b ldr r3, [r3, #0] + 8009c58: 6d59 ldr r1, [r3, #84] ; 0x54 + 8009c5a: 68bb ldr r3, [r7, #8] + 8009c5c: 691a ldr r2, [r3, #16] + 8009c5e: 68fb ldr r3, [r7, #12] + 8009c60: 681b ldr r3, [r3, #0] + 8009c62: 430a orrs r2, r1 + 8009c64: 655a str r2, [r3, #84] ; 0x54 break; - 80099de: e027 b.n 8009a30 + 8009c66: e027 b.n 8009cb8 { /* Check the parameters */ assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); /* Configure the Channel 6 in PWM mode */ TIM_OC6_SetConfig(htim->Instance, sConfig); - 80099e0: 68fb ldr r3, [r7, #12] - 80099e2: 681b ldr r3, [r3, #0] - 80099e4: 68ba ldr r2, [r7, #8] - 80099e6: 0011 movs r1, r2 - 80099e8: 0018 movs r0, r3 - 80099ea: f000 fc43 bl 800a274 + 8009c68: 68fb ldr r3, [r7, #12] + 8009c6a: 681b ldr r3, [r3, #0] + 8009c6c: 68ba ldr r2, [r7, #8] + 8009c6e: 0011 movs r1, r2 + 8009c70: 0018 movs r0, r3 + 8009c72: f000 fc43 bl 800a4fc /* Set the Preload enable bit for channel6 */ htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; - 80099ee: 68fb ldr r3, [r7, #12] - 80099f0: 681b ldr r3, [r3, #0] - 80099f2: 6d5a ldr r2, [r3, #84] ; 0x54 - 80099f4: 68fb ldr r3, [r7, #12] - 80099f6: 681b ldr r3, [r3, #0] - 80099f8: 2180 movs r1, #128 ; 0x80 - 80099fa: 0109 lsls r1, r1, #4 - 80099fc: 430a orrs r2, r1 - 80099fe: 655a str r2, [r3, #84] ; 0x54 + 8009c76: 68fb ldr r3, [r7, #12] + 8009c78: 681b ldr r3, [r3, #0] + 8009c7a: 6d5a ldr r2, [r3, #84] ; 0x54 + 8009c7c: 68fb ldr r3, [r7, #12] + 8009c7e: 681b ldr r3, [r3, #0] + 8009c80: 2180 movs r1, #128 ; 0x80 + 8009c82: 0109 lsls r1, r1, #4 + 8009c84: 430a orrs r2, r1 + 8009c86: 655a str r2, [r3, #84] ; 0x54 /* Configure the Output Fast mode */ htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; - 8009a00: 68fb ldr r3, [r7, #12] - 8009a02: 681b ldr r3, [r3, #0] - 8009a04: 6d5a ldr r2, [r3, #84] ; 0x54 - 8009a06: 68fb ldr r3, [r7, #12] - 8009a08: 681b ldr r3, [r3, #0] - 8009a0a: 4910 ldr r1, [pc, #64] ; (8009a4c ) - 8009a0c: 400a ands r2, r1 - 8009a0e: 655a str r2, [r3, #84] ; 0x54 + 8009c88: 68fb ldr r3, [r7, #12] + 8009c8a: 681b ldr r3, [r3, #0] + 8009c8c: 6d5a ldr r2, [r3, #84] ; 0x54 + 8009c8e: 68fb ldr r3, [r7, #12] + 8009c90: 681b ldr r3, [r3, #0] + 8009c92: 4910 ldr r1, [pc, #64] ; (8009cd4 ) + 8009c94: 400a ands r2, r1 + 8009c96: 655a str r2, [r3, #84] ; 0x54 htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; - 8009a10: 68fb ldr r3, [r7, #12] - 8009a12: 681b ldr r3, [r3, #0] - 8009a14: 6d59 ldr r1, [r3, #84] ; 0x54 - 8009a16: 68bb ldr r3, [r7, #8] - 8009a18: 691b ldr r3, [r3, #16] - 8009a1a: 021a lsls r2, r3, #8 - 8009a1c: 68fb ldr r3, [r7, #12] - 8009a1e: 681b ldr r3, [r3, #0] - 8009a20: 430a orrs r2, r1 - 8009a22: 655a str r2, [r3, #84] ; 0x54 + 8009c98: 68fb ldr r3, [r7, #12] + 8009c9a: 681b ldr r3, [r3, #0] + 8009c9c: 6d59 ldr r1, [r3, #84] ; 0x54 + 8009c9e: 68bb ldr r3, [r7, #8] + 8009ca0: 691b ldr r3, [r3, #16] + 8009ca2: 021a lsls r2, r3, #8 + 8009ca4: 68fb ldr r3, [r7, #12] + 8009ca6: 681b ldr r3, [r3, #0] + 8009ca8: 430a orrs r2, r1 + 8009caa: 655a str r2, [r3, #84] ; 0x54 break; - 8009a24: e004 b.n 8009a30 + 8009cac: e004 b.n 8009cb8 } default: status = HAL_ERROR; - 8009a26: 2317 movs r3, #23 - 8009a28: 18fb adds r3, r7, r3 - 8009a2a: 2201 movs r2, #1 - 8009a2c: 701a strb r2, [r3, #0] + 8009cae: 2317 movs r3, #23 + 8009cb0: 18fb adds r3, r7, r3 + 8009cb2: 2201 movs r2, #1 + 8009cb4: 701a strb r2, [r3, #0] break; - 8009a2e: 46c0 nop ; (mov r8, r8) + 8009cb6: 46c0 nop ; (mov r8, r8) } __HAL_UNLOCK(htim); - 8009a30: 68fb ldr r3, [r7, #12] - 8009a32: 223c movs r2, #60 ; 0x3c - 8009a34: 2100 movs r1, #0 - 8009a36: 5499 strb r1, [r3, r2] + 8009cb8: 68fb ldr r3, [r7, #12] + 8009cba: 223c movs r2, #60 ; 0x3c + 8009cbc: 2100 movs r1, #0 + 8009cbe: 5499 strb r1, [r3, r2] return status; - 8009a38: 2317 movs r3, #23 - 8009a3a: 18fb adds r3, r7, r3 - 8009a3c: 781b ldrb r3, [r3, #0] + 8009cc0: 2317 movs r3, #23 + 8009cc2: 18fb adds r3, r7, r3 + 8009cc4: 781b ldrb r3, [r3, #0] } - 8009a3e: 0018 movs r0, r3 - 8009a40: 46bd mov sp, r7 - 8009a42: b006 add sp, #24 - 8009a44: bd80 pop {r7, pc} - 8009a46: 46c0 nop ; (mov r8, r8) - 8009a48: 080102a0 .word 0x080102a0 - 8009a4c: fffffbff .word 0xfffffbff + 8009cc6: 0018 movs r0, r3 + 8009cc8: 46bd mov sp, r7 + 8009cca: b006 add sp, #24 + 8009ccc: bd80 pop {r7, pc} + 8009cce: 46c0 nop ; (mov r8, r8) + 8009cd0: 08010ee0 .word 0x08010ee0 + 8009cd4: fffffbff .word 0xfffffbff -08009a50 : +08009cd8 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { - 8009a50: b580 push {r7, lr} - 8009a52: b084 sub sp, #16 - 8009a54: af00 add r7, sp, #0 - 8009a56: 6078 str r0, [r7, #4] - 8009a58: 6039 str r1, [r7, #0] + 8009cd8: b580 push {r7, lr} + 8009cda: b084 sub sp, #16 + 8009cdc: af00 add r7, sp, #0 + 8009cde: 6078 str r0, [r7, #4] + 8009ce0: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 8009a5a: 230f movs r3, #15 - 8009a5c: 18fb adds r3, r7, r3 - 8009a5e: 2200 movs r2, #0 - 8009a60: 701a strb r2, [r3, #0] + 8009ce2: 230f movs r3, #15 + 8009ce4: 18fb adds r3, r7, r3 + 8009ce6: 2200 movs r2, #0 + 8009ce8: 701a strb r2, [r3, #0] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); - 8009a62: 687b ldr r3, [r7, #4] - 8009a64: 223c movs r2, #60 ; 0x3c - 8009a66: 5c9b ldrb r3, [r3, r2] - 8009a68: 2b01 cmp r3, #1 - 8009a6a: d101 bne.n 8009a70 - 8009a6c: 2302 movs r3, #2 - 8009a6e: e0bc b.n 8009bea - 8009a70: 687b ldr r3, [r7, #4] - 8009a72: 223c movs r2, #60 ; 0x3c - 8009a74: 2101 movs r1, #1 - 8009a76: 5499 strb r1, [r3, r2] + 8009cea: 687b ldr r3, [r7, #4] + 8009cec: 223c movs r2, #60 ; 0x3c + 8009cee: 5c9b ldrb r3, [r3, r2] + 8009cf0: 2b01 cmp r3, #1 + 8009cf2: d101 bne.n 8009cf8 + 8009cf4: 2302 movs r3, #2 + 8009cf6: e0bc b.n 8009e72 + 8009cf8: 687b ldr r3, [r7, #4] + 8009cfa: 223c movs r2, #60 ; 0x3c + 8009cfc: 2101 movs r1, #1 + 8009cfe: 5499 strb r1, [r3, r2] htim->State = HAL_TIM_STATE_BUSY; - 8009a78: 687b ldr r3, [r7, #4] - 8009a7a: 223d movs r2, #61 ; 0x3d - 8009a7c: 2102 movs r1, #2 - 8009a7e: 5499 strb r1, [r3, r2] + 8009d00: 687b ldr r3, [r7, #4] + 8009d02: 223d movs r2, #61 ; 0x3d + 8009d04: 2102 movs r1, #2 + 8009d06: 5499 strb r1, [r3, r2] /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; - 8009a80: 687b ldr r3, [r7, #4] - 8009a82: 681b ldr r3, [r3, #0] - 8009a84: 689b ldr r3, [r3, #8] - 8009a86: 60bb str r3, [r7, #8] + 8009d08: 687b ldr r3, [r7, #4] + 8009d0a: 681b ldr r3, [r3, #0] + 8009d0c: 689b ldr r3, [r3, #8] + 8009d0e: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 8009a88: 68bb ldr r3, [r7, #8] - 8009a8a: 4a5a ldr r2, [pc, #360] ; (8009bf4 ) - 8009a8c: 4013 ands r3, r2 - 8009a8e: 60bb str r3, [r7, #8] + 8009d10: 68bb ldr r3, [r7, #8] + 8009d12: 4a5a ldr r2, [pc, #360] ; (8009e7c ) + 8009d14: 4013 ands r3, r2 + 8009d16: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8009a90: 68bb ldr r3, [r7, #8] - 8009a92: 4a59 ldr r2, [pc, #356] ; (8009bf8 ) - 8009a94: 4013 ands r3, r2 - 8009a96: 60bb str r3, [r7, #8] + 8009d18: 68bb ldr r3, [r7, #8] + 8009d1a: 4a59 ldr r2, [pc, #356] ; (8009e80 ) + 8009d1c: 4013 ands r3, r2 + 8009d1e: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; - 8009a98: 687b ldr r3, [r7, #4] - 8009a9a: 681b ldr r3, [r3, #0] - 8009a9c: 68ba ldr r2, [r7, #8] - 8009a9e: 609a str r2, [r3, #8] + 8009d20: 687b ldr r3, [r7, #4] + 8009d22: 681b ldr r3, [r3, #0] + 8009d24: 68ba ldr r2, [r7, #8] + 8009d26: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) - 8009aa0: 683b ldr r3, [r7, #0] - 8009aa2: 681b ldr r3, [r3, #0] - 8009aa4: 2280 movs r2, #128 ; 0x80 - 8009aa6: 0192 lsls r2, r2, #6 - 8009aa8: 4293 cmp r3, r2 - 8009aaa: d040 beq.n 8009b2e - 8009aac: 2280 movs r2, #128 ; 0x80 - 8009aae: 0192 lsls r2, r2, #6 - 8009ab0: 4293 cmp r3, r2 - 8009ab2: d900 bls.n 8009ab6 - 8009ab4: e088 b.n 8009bc8 - 8009ab6: 2280 movs r2, #128 ; 0x80 - 8009ab8: 0152 lsls r2, r2, #5 - 8009aba: 4293 cmp r3, r2 - 8009abc: d100 bne.n 8009ac0 - 8009abe: e088 b.n 8009bd2 - 8009ac0: 2280 movs r2, #128 ; 0x80 - 8009ac2: 0152 lsls r2, r2, #5 - 8009ac4: 4293 cmp r3, r2 - 8009ac6: d900 bls.n 8009aca - 8009ac8: e07e b.n 8009bc8 - 8009aca: 2b70 cmp r3, #112 ; 0x70 - 8009acc: d018 beq.n 8009b00 - 8009ace: d900 bls.n 8009ad2 - 8009ad0: e07a b.n 8009bc8 - 8009ad2: 2b60 cmp r3, #96 ; 0x60 - 8009ad4: d04f beq.n 8009b76 - 8009ad6: d900 bls.n 8009ada - 8009ad8: e076 b.n 8009bc8 - 8009ada: 2b50 cmp r3, #80 ; 0x50 - 8009adc: d03b beq.n 8009b56 - 8009ade: d900 bls.n 8009ae2 - 8009ae0: e072 b.n 8009bc8 - 8009ae2: 2b40 cmp r3, #64 ; 0x40 - 8009ae4: d057 beq.n 8009b96 - 8009ae6: d900 bls.n 8009aea - 8009ae8: e06e b.n 8009bc8 - 8009aea: 2b30 cmp r3, #48 ; 0x30 - 8009aec: d063 beq.n 8009bb6 - 8009aee: d86b bhi.n 8009bc8 - 8009af0: 2b20 cmp r3, #32 - 8009af2: d060 beq.n 8009bb6 - 8009af4: d868 bhi.n 8009bc8 - 8009af6: 2b00 cmp r3, #0 - 8009af8: d05d beq.n 8009bb6 - 8009afa: 2b10 cmp r3, #16 - 8009afc: d05b beq.n 8009bb6 - 8009afe: e063 b.n 8009bc8 + 8009d28: 683b ldr r3, [r7, #0] + 8009d2a: 681b ldr r3, [r3, #0] + 8009d2c: 2280 movs r2, #128 ; 0x80 + 8009d2e: 0192 lsls r2, r2, #6 + 8009d30: 4293 cmp r3, r2 + 8009d32: d040 beq.n 8009db6 + 8009d34: 2280 movs r2, #128 ; 0x80 + 8009d36: 0192 lsls r2, r2, #6 + 8009d38: 4293 cmp r3, r2 + 8009d3a: d900 bls.n 8009d3e + 8009d3c: e088 b.n 8009e50 + 8009d3e: 2280 movs r2, #128 ; 0x80 + 8009d40: 0152 lsls r2, r2, #5 + 8009d42: 4293 cmp r3, r2 + 8009d44: d100 bne.n 8009d48 + 8009d46: e088 b.n 8009e5a + 8009d48: 2280 movs r2, #128 ; 0x80 + 8009d4a: 0152 lsls r2, r2, #5 + 8009d4c: 4293 cmp r3, r2 + 8009d4e: d900 bls.n 8009d52 + 8009d50: e07e b.n 8009e50 + 8009d52: 2b70 cmp r3, #112 ; 0x70 + 8009d54: d018 beq.n 8009d88 + 8009d56: d900 bls.n 8009d5a + 8009d58: e07a b.n 8009e50 + 8009d5a: 2b60 cmp r3, #96 ; 0x60 + 8009d5c: d04f beq.n 8009dfe + 8009d5e: d900 bls.n 8009d62 + 8009d60: e076 b.n 8009e50 + 8009d62: 2b50 cmp r3, #80 ; 0x50 + 8009d64: d03b beq.n 8009dde + 8009d66: d900 bls.n 8009d6a + 8009d68: e072 b.n 8009e50 + 8009d6a: 2b40 cmp r3, #64 ; 0x40 + 8009d6c: d057 beq.n 8009e1e + 8009d6e: d900 bls.n 8009d72 + 8009d70: e06e b.n 8009e50 + 8009d72: 2b30 cmp r3, #48 ; 0x30 + 8009d74: d063 beq.n 8009e3e + 8009d76: d86b bhi.n 8009e50 + 8009d78: 2b20 cmp r3, #32 + 8009d7a: d060 beq.n 8009e3e + 8009d7c: d868 bhi.n 8009e50 + 8009d7e: 2b00 cmp r3, #0 + 8009d80: d05d beq.n 8009e3e + 8009d82: 2b10 cmp r3, #16 + 8009d84: d05b beq.n 8009e3e + 8009d86: e063 b.n 8009e50 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 8009b00: 687b ldr r3, [r7, #4] - 8009b02: 6818 ldr r0, [r3, #0] - 8009b04: 683b ldr r3, [r7, #0] - 8009b06: 6899 ldr r1, [r3, #8] - 8009b08: 683b ldr r3, [r7, #0] - 8009b0a: 685a ldr r2, [r3, #4] - 8009b0c: 683b ldr r3, [r7, #0] - 8009b0e: 68db ldr r3, [r3, #12] - 8009b10: f000 fe46 bl 800a7a0 + 8009d88: 687b ldr r3, [r7, #4] + 8009d8a: 6818 ldr r0, [r3, #0] + 8009d8c: 683b ldr r3, [r7, #0] + 8009d8e: 6899 ldr r1, [r3, #8] + 8009d90: 683b ldr r3, [r7, #0] + 8009d92: 685a ldr r2, [r3, #4] + 8009d94: 683b ldr r3, [r7, #0] + 8009d96: 68db ldr r3, [r3, #12] + 8009d98: f000 fe46 bl 800aa28 sClockSourceConfig->ClockPrescaler, sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; - 8009b14: 687b ldr r3, [r7, #4] - 8009b16: 681b ldr r3, [r3, #0] - 8009b18: 689b ldr r3, [r3, #8] - 8009b1a: 60bb str r3, [r7, #8] + 8009d9c: 687b ldr r3, [r7, #4] + 8009d9e: 681b ldr r3, [r3, #0] + 8009da0: 689b ldr r3, [r3, #8] + 8009da2: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 8009b1c: 68bb ldr r3, [r7, #8] - 8009b1e: 2277 movs r2, #119 ; 0x77 - 8009b20: 4313 orrs r3, r2 - 8009b22: 60bb str r3, [r7, #8] + 8009da4: 68bb ldr r3, [r7, #8] + 8009da6: 2277 movs r2, #119 ; 0x77 + 8009da8: 4313 orrs r3, r2 + 8009daa: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 8009b24: 687b ldr r3, [r7, #4] - 8009b26: 681b ldr r3, [r3, #0] - 8009b28: 68ba ldr r2, [r7, #8] - 8009b2a: 609a str r2, [r3, #8] + 8009dac: 687b ldr r3, [r7, #4] + 8009dae: 681b ldr r3, [r3, #0] + 8009db0: 68ba ldr r2, [r7, #8] + 8009db2: 609a str r2, [r3, #8] break; - 8009b2c: e052 b.n 8009bd4 + 8009db4: e052 b.n 8009e5c assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 8009b2e: 687b ldr r3, [r7, #4] - 8009b30: 6818 ldr r0, [r3, #0] - 8009b32: 683b ldr r3, [r7, #0] - 8009b34: 6899 ldr r1, [r3, #8] - 8009b36: 683b ldr r3, [r7, #0] - 8009b38: 685a ldr r2, [r3, #4] - 8009b3a: 683b ldr r3, [r7, #0] - 8009b3c: 68db ldr r3, [r3, #12] - 8009b3e: f000 fe2f bl 800a7a0 + 8009db6: 687b ldr r3, [r7, #4] + 8009db8: 6818 ldr r0, [r3, #0] + 8009dba: 683b ldr r3, [r7, #0] + 8009dbc: 6899 ldr r1, [r3, #8] + 8009dbe: 683b ldr r3, [r7, #0] + 8009dc0: 685a ldr r2, [r3, #4] + 8009dc2: 683b ldr r3, [r7, #0] + 8009dc4: 68db ldr r3, [r3, #12] + 8009dc6: f000 fe2f bl 800aa28 sClockSourceConfig->ClockPrescaler, sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; - 8009b42: 687b ldr r3, [r7, #4] - 8009b44: 681b ldr r3, [r3, #0] - 8009b46: 689a ldr r2, [r3, #8] - 8009b48: 687b ldr r3, [r7, #4] - 8009b4a: 681b ldr r3, [r3, #0] - 8009b4c: 2180 movs r1, #128 ; 0x80 - 8009b4e: 01c9 lsls r1, r1, #7 - 8009b50: 430a orrs r2, r1 - 8009b52: 609a str r2, [r3, #8] + 8009dca: 687b ldr r3, [r7, #4] + 8009dcc: 681b ldr r3, [r3, #0] + 8009dce: 689a ldr r2, [r3, #8] + 8009dd0: 687b ldr r3, [r7, #4] + 8009dd2: 681b ldr r3, [r3, #0] + 8009dd4: 2180 movs r1, #128 ; 0x80 + 8009dd6: 01c9 lsls r1, r1, #7 + 8009dd8: 430a orrs r2, r1 + 8009dda: 609a str r2, [r3, #8] break; - 8009b54: e03e b.n 8009bd4 + 8009ddc: e03e b.n 8009e5c /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 8009b56: 687b ldr r3, [r7, #4] - 8009b58: 6818 ldr r0, [r3, #0] - 8009b5a: 683b ldr r3, [r7, #0] - 8009b5c: 6859 ldr r1, [r3, #4] - 8009b5e: 683b ldr r3, [r7, #0] - 8009b60: 68db ldr r3, [r3, #12] - 8009b62: 001a movs r2, r3 - 8009b64: f000 fcd8 bl 800a518 + 8009dde: 687b ldr r3, [r7, #4] + 8009de0: 6818 ldr r0, [r3, #0] + 8009de2: 683b ldr r3, [r7, #0] + 8009de4: 6859 ldr r1, [r3, #4] + 8009de6: 683b ldr r3, [r7, #0] + 8009de8: 68db ldr r3, [r3, #12] + 8009dea: 001a movs r2, r3 + 8009dec: f000 fcd8 bl 800a7a0 sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 8009b68: 687b ldr r3, [r7, #4] - 8009b6a: 681b ldr r3, [r3, #0] - 8009b6c: 2150 movs r1, #80 ; 0x50 - 8009b6e: 0018 movs r0, r3 - 8009b70: f000 fdfa bl 800a768 + 8009df0: 687b ldr r3, [r7, #4] + 8009df2: 681b ldr r3, [r3, #0] + 8009df4: 2150 movs r1, #80 ; 0x50 + 8009df6: 0018 movs r0, r3 + 8009df8: f000 fdfa bl 800a9f0 break; - 8009b74: e02e b.n 8009bd4 + 8009dfc: e02e b.n 8009e5c /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, - 8009b76: 687b ldr r3, [r7, #4] - 8009b78: 6818 ldr r0, [r3, #0] - 8009b7a: 683b ldr r3, [r7, #0] - 8009b7c: 6859 ldr r1, [r3, #4] - 8009b7e: 683b ldr r3, [r7, #0] - 8009b80: 68db ldr r3, [r3, #12] - 8009b82: 001a movs r2, r3 - 8009b84: f000 fd38 bl 800a5f8 + 8009dfe: 687b ldr r3, [r7, #4] + 8009e00: 6818 ldr r0, [r3, #0] + 8009e02: 683b ldr r3, [r7, #0] + 8009e04: 6859 ldr r1, [r3, #4] + 8009e06: 683b ldr r3, [r7, #0] + 8009e08: 68db ldr r3, [r3, #12] + 8009e0a: 001a movs r2, r3 + 8009e0c: f000 fd38 bl 800a880 sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 8009b88: 687b ldr r3, [r7, #4] - 8009b8a: 681b ldr r3, [r3, #0] - 8009b8c: 2160 movs r1, #96 ; 0x60 - 8009b8e: 0018 movs r0, r3 - 8009b90: f000 fdea bl 800a768 + 8009e10: 687b ldr r3, [r7, #4] + 8009e12: 681b ldr r3, [r3, #0] + 8009e14: 2160 movs r1, #96 ; 0x60 + 8009e16: 0018 movs r0, r3 + 8009e18: f000 fdea bl 800a9f0 break; - 8009b94: e01e b.n 8009bd4 + 8009e1c: e01e b.n 8009e5c /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 8009b96: 687b ldr r3, [r7, #4] - 8009b98: 6818 ldr r0, [r3, #0] - 8009b9a: 683b ldr r3, [r7, #0] - 8009b9c: 6859 ldr r1, [r3, #4] - 8009b9e: 683b ldr r3, [r7, #0] - 8009ba0: 68db ldr r3, [r3, #12] - 8009ba2: 001a movs r2, r3 - 8009ba4: f000 fcb8 bl 800a518 + 8009e1e: 687b ldr r3, [r7, #4] + 8009e20: 6818 ldr r0, [r3, #0] + 8009e22: 683b ldr r3, [r7, #0] + 8009e24: 6859 ldr r1, [r3, #4] + 8009e26: 683b ldr r3, [r7, #0] + 8009e28: 68db ldr r3, [r3, #12] + 8009e2a: 001a movs r2, r3 + 8009e2c: f000 fcb8 bl 800a7a0 sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8009ba8: 687b ldr r3, [r7, #4] - 8009baa: 681b ldr r3, [r3, #0] - 8009bac: 2140 movs r1, #64 ; 0x40 - 8009bae: 0018 movs r0, r3 - 8009bb0: f000 fdda bl 800a768 + 8009e30: 687b ldr r3, [r7, #4] + 8009e32: 681b ldr r3, [r3, #0] + 8009e34: 2140 movs r1, #64 ; 0x40 + 8009e36: 0018 movs r0, r3 + 8009e38: f000 fdda bl 800a9f0 break; - 8009bb4: e00e b.n 8009bd4 + 8009e3c: e00e b.n 8009e5c case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 8009bb6: 687b ldr r3, [r7, #4] - 8009bb8: 681a ldr r2, [r3, #0] - 8009bba: 683b ldr r3, [r7, #0] - 8009bbc: 681b ldr r3, [r3, #0] - 8009bbe: 0019 movs r1, r3 - 8009bc0: 0010 movs r0, r2 - 8009bc2: f000 fdd1 bl 800a768 + 8009e3e: 687b ldr r3, [r7, #4] + 8009e40: 681a ldr r2, [r3, #0] + 8009e42: 683b ldr r3, [r7, #0] + 8009e44: 681b ldr r3, [r3, #0] + 8009e46: 0019 movs r1, r3 + 8009e48: 0010 movs r0, r2 + 8009e4a: f000 fdd1 bl 800a9f0 break; - 8009bc6: e005 b.n 8009bd4 + 8009e4e: e005 b.n 8009e5c } default: status = HAL_ERROR; - 8009bc8: 230f movs r3, #15 - 8009bca: 18fb adds r3, r7, r3 - 8009bcc: 2201 movs r2, #1 - 8009bce: 701a strb r2, [r3, #0] + 8009e50: 230f movs r3, #15 + 8009e52: 18fb adds r3, r7, r3 + 8009e54: 2201 movs r2, #1 + 8009e56: 701a strb r2, [r3, #0] break; - 8009bd0: e000 b.n 8009bd4 + 8009e58: e000 b.n 8009e5c break; - 8009bd2: 46c0 nop ; (mov r8, r8) + 8009e5a: 46c0 nop ; (mov r8, r8) } htim->State = HAL_TIM_STATE_READY; - 8009bd4: 687b ldr r3, [r7, #4] - 8009bd6: 223d movs r2, #61 ; 0x3d - 8009bd8: 2101 movs r1, #1 - 8009bda: 5499 strb r1, [r3, r2] + 8009e5c: 687b ldr r3, [r7, #4] + 8009e5e: 223d movs r2, #61 ; 0x3d + 8009e60: 2101 movs r1, #1 + 8009e62: 5499 strb r1, [r3, r2] __HAL_UNLOCK(htim); - 8009bdc: 687b ldr r3, [r7, #4] - 8009bde: 223c movs r2, #60 ; 0x3c - 8009be0: 2100 movs r1, #0 - 8009be2: 5499 strb r1, [r3, r2] + 8009e64: 687b ldr r3, [r7, #4] + 8009e66: 223c movs r2, #60 ; 0x3c + 8009e68: 2100 movs r1, #0 + 8009e6a: 5499 strb r1, [r3, r2] return status; - 8009be4: 230f movs r3, #15 - 8009be6: 18fb adds r3, r7, r3 - 8009be8: 781b ldrb r3, [r3, #0] + 8009e6c: 230f movs r3, #15 + 8009e6e: 18fb adds r3, r7, r3 + 8009e70: 781b ldrb r3, [r3, #0] } - 8009bea: 0018 movs r0, r3 - 8009bec: 46bd mov sp, r7 - 8009bee: b004 add sp, #16 - 8009bf0: bd80 pop {r7, pc} - 8009bf2: 46c0 nop ; (mov r8, r8) - 8009bf4: ffceff88 .word 0xffceff88 - 8009bf8: ffff00ff .word 0xffff00ff + 8009e72: 0018 movs r0, r3 + 8009e74: 46bd mov sp, r7 + 8009e76: b004 add sp, #16 + 8009e78: bd80 pop {r7, pc} + 8009e7a: 46c0 nop ; (mov r8, r8) + 8009e7c: ffceff88 .word 0xffceff88 + 8009e80: ffff00ff .word 0xffff00ff -08009bfc : +08009e84 : * timer input or external trigger input) and the Slave mode * (Disable, Reset, Gated, Trigger, External clock mode 1). * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig) { - 8009bfc: b580 push {r7, lr} - 8009bfe: b082 sub sp, #8 - 8009c00: af00 add r7, sp, #0 - 8009c02: 6078 str r0, [r7, #4] - 8009c04: 6039 str r1, [r7, #0] + 8009e84: b580 push {r7, lr} + 8009e86: b082 sub sp, #8 + 8009e88: af00 add r7, sp, #0 + 8009e8a: 6078 str r0, [r7, #4] + 8009e8c: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); __HAL_LOCK(htim); - 8009c06: 687b ldr r3, [r7, #4] - 8009c08: 223c movs r2, #60 ; 0x3c - 8009c0a: 5c9b ldrb r3, [r3, r2] - 8009c0c: 2b01 cmp r3, #1 - 8009c0e: d101 bne.n 8009c14 - 8009c10: 2302 movs r3, #2 - 8009c12: e032 b.n 8009c7a - 8009c14: 687b ldr r3, [r7, #4] - 8009c16: 223c movs r2, #60 ; 0x3c - 8009c18: 2101 movs r1, #1 - 8009c1a: 5499 strb r1, [r3, r2] + 8009e8e: 687b ldr r3, [r7, #4] + 8009e90: 223c movs r2, #60 ; 0x3c + 8009e92: 5c9b ldrb r3, [r3, r2] + 8009e94: 2b01 cmp r3, #1 + 8009e96: d101 bne.n 8009e9c + 8009e98: 2302 movs r3, #2 + 8009e9a: e032 b.n 8009f02 + 8009e9c: 687b ldr r3, [r7, #4] + 8009e9e: 223c movs r2, #60 ; 0x3c + 8009ea0: 2101 movs r1, #1 + 8009ea2: 5499 strb r1, [r3, r2] htim->State = HAL_TIM_STATE_BUSY; - 8009c1c: 687b ldr r3, [r7, #4] - 8009c1e: 223d movs r2, #61 ; 0x3d - 8009c20: 2102 movs r1, #2 - 8009c22: 5499 strb r1, [r3, r2] + 8009ea4: 687b ldr r3, [r7, #4] + 8009ea6: 223d movs r2, #61 ; 0x3d + 8009ea8: 2102 movs r1, #2 + 8009eaa: 5499 strb r1, [r3, r2] if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) - 8009c24: 683a ldr r2, [r7, #0] - 8009c26: 687b ldr r3, [r7, #4] - 8009c28: 0011 movs r1, r2 - 8009c2a: 0018 movs r0, r3 - 8009c2c: f000 fb86 bl 800a33c - 8009c30: 1e03 subs r3, r0, #0 - 8009c32: d009 beq.n 8009c48 + 8009eac: 683a ldr r2, [r7, #0] + 8009eae: 687b ldr r3, [r7, #4] + 8009eb0: 0011 movs r1, r2 + 8009eb2: 0018 movs r0, r3 + 8009eb4: f000 fb86 bl 800a5c4 + 8009eb8: 1e03 subs r3, r0, #0 + 8009eba: d009 beq.n 8009ed0 { htim->State = HAL_TIM_STATE_READY; - 8009c34: 687b ldr r3, [r7, #4] - 8009c36: 223d movs r2, #61 ; 0x3d - 8009c38: 2101 movs r1, #1 - 8009c3a: 5499 strb r1, [r3, r2] + 8009ebc: 687b ldr r3, [r7, #4] + 8009ebe: 223d movs r2, #61 ; 0x3d + 8009ec0: 2101 movs r1, #1 + 8009ec2: 5499 strb r1, [r3, r2] __HAL_UNLOCK(htim); - 8009c3c: 687b ldr r3, [r7, #4] - 8009c3e: 223c movs r2, #60 ; 0x3c - 8009c40: 2100 movs r1, #0 - 8009c42: 5499 strb r1, [r3, r2] + 8009ec4: 687b ldr r3, [r7, #4] + 8009ec6: 223c movs r2, #60 ; 0x3c + 8009ec8: 2100 movs r1, #0 + 8009eca: 5499 strb r1, [r3, r2] return HAL_ERROR; - 8009c44: 2301 movs r3, #1 - 8009c46: e018 b.n 8009c7a + 8009ecc: 2301 movs r3, #1 + 8009ece: e018 b.n 8009f02 } /* Disable Trigger Interrupt */ __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); - 8009c48: 687b ldr r3, [r7, #4] - 8009c4a: 681b ldr r3, [r3, #0] - 8009c4c: 68da ldr r2, [r3, #12] - 8009c4e: 687b ldr r3, [r7, #4] - 8009c50: 681b ldr r3, [r3, #0] - 8009c52: 2140 movs r1, #64 ; 0x40 - 8009c54: 438a bics r2, r1 - 8009c56: 60da str r2, [r3, #12] + 8009ed0: 687b ldr r3, [r7, #4] + 8009ed2: 681b ldr r3, [r3, #0] + 8009ed4: 68da ldr r2, [r3, #12] + 8009ed6: 687b ldr r3, [r7, #4] + 8009ed8: 681b ldr r3, [r3, #0] + 8009eda: 2140 movs r1, #64 ; 0x40 + 8009edc: 438a bics r2, r1 + 8009ede: 60da str r2, [r3, #12] /* Disable Trigger DMA request */ __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); - 8009c58: 687b ldr r3, [r7, #4] - 8009c5a: 681b ldr r3, [r3, #0] - 8009c5c: 68da ldr r2, [r3, #12] - 8009c5e: 687b ldr r3, [r7, #4] - 8009c60: 681b ldr r3, [r3, #0] - 8009c62: 4908 ldr r1, [pc, #32] ; (8009c84 ) - 8009c64: 400a ands r2, r1 - 8009c66: 60da str r2, [r3, #12] + 8009ee0: 687b ldr r3, [r7, #4] + 8009ee2: 681b ldr r3, [r3, #0] + 8009ee4: 68da ldr r2, [r3, #12] + 8009ee6: 687b ldr r3, [r7, #4] + 8009ee8: 681b ldr r3, [r3, #0] + 8009eea: 4908 ldr r1, [pc, #32] ; (8009f0c ) + 8009eec: 400a ands r2, r1 + 8009eee: 60da str r2, [r3, #12] htim->State = HAL_TIM_STATE_READY; - 8009c68: 687b ldr r3, [r7, #4] - 8009c6a: 223d movs r2, #61 ; 0x3d - 8009c6c: 2101 movs r1, #1 - 8009c6e: 5499 strb r1, [r3, r2] + 8009ef0: 687b ldr r3, [r7, #4] + 8009ef2: 223d movs r2, #61 ; 0x3d + 8009ef4: 2101 movs r1, #1 + 8009ef6: 5499 strb r1, [r3, r2] __HAL_UNLOCK(htim); - 8009c70: 687b ldr r3, [r7, #4] - 8009c72: 223c movs r2, #60 ; 0x3c - 8009c74: 2100 movs r1, #0 - 8009c76: 5499 strb r1, [r3, r2] + 8009ef8: 687b ldr r3, [r7, #4] + 8009efa: 223c movs r2, #60 ; 0x3c + 8009efc: 2100 movs r1, #0 + 8009efe: 5499 strb r1, [r3, r2] return HAL_OK; - 8009c78: 2300 movs r3, #0 + 8009f00: 2300 movs r3, #0 } - 8009c7a: 0018 movs r0, r3 - 8009c7c: 46bd mov sp, r7 - 8009c7e: b002 add sp, #8 - 8009c80: bd80 pop {r7, pc} - 8009c82: 46c0 nop ; (mov r8, r8) - 8009c84: ffffbfff .word 0xffffbfff + 8009f02: 0018 movs r0, r3 + 8009f04: 46bd mov sp, r7 + 8009f06: b002 add sp, #8 + 8009f08: bd80 pop {r7, pc} + 8009f0a: 46c0 nop ; (mov r8, r8) + 8009f0c: ffffbfff .word 0xffffbfff -08009c88 : +08009f10 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 8009c88: b580 push {r7, lr} - 8009c8a: b082 sub sp, #8 - 8009c8c: af00 add r7, sp, #0 - 8009c8e: 6078 str r0, [r7, #4] + 8009f10: b580 push {r7, lr} + 8009f12: b082 sub sp, #8 + 8009f14: af00 add r7, sp, #0 + 8009f16: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 8009c90: 46c0 nop ; (mov r8, r8) - 8009c92: 46bd mov sp, r7 - 8009c94: b002 add sp, #8 - 8009c96: bd80 pop {r7, pc} + 8009f18: 46c0 nop ; (mov r8, r8) + 8009f1a: 46bd mov sp, r7 + 8009f1c: b002 add sp, #8 + 8009f1e: bd80 pop {r7, pc} -08009c98 : +08009f20 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 8009c98: b580 push {r7, lr} - 8009c9a: b082 sub sp, #8 - 8009c9c: af00 add r7, sp, #0 - 8009c9e: 6078 str r0, [r7, #4] + 8009f20: b580 push {r7, lr} + 8009f22: b082 sub sp, #8 + 8009f24: af00 add r7, sp, #0 + 8009f26: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 8009ca0: 46c0 nop ; (mov r8, r8) - 8009ca2: 46bd mov sp, r7 - 8009ca4: b002 add sp, #8 - 8009ca6: bd80 pop {r7, pc} + 8009f28: 46c0 nop ; (mov r8, r8) + 8009f2a: 46bd mov sp, r7 + 8009f2c: b002 add sp, #8 + 8009f2e: bd80 pop {r7, pc} -08009ca8 : +08009f30 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 8009ca8: b580 push {r7, lr} - 8009caa: b082 sub sp, #8 - 8009cac: af00 add r7, sp, #0 - 8009cae: 6078 str r0, [r7, #4] + 8009f30: b580 push {r7, lr} + 8009f32: b082 sub sp, #8 + 8009f34: af00 add r7, sp, #0 + 8009f36: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 8009cb0: 46c0 nop ; (mov r8, r8) - 8009cb2: 46bd mov sp, r7 - 8009cb4: b002 add sp, #8 - 8009cb6: bd80 pop {r7, pc} + 8009f38: 46c0 nop ; (mov r8, r8) + 8009f3a: 46bd mov sp, r7 + 8009f3c: b002 add sp, #8 + 8009f3e: bd80 pop {r7, pc} -08009cb8 : +08009f40 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 8009cb8: b580 push {r7, lr} - 8009cba: b082 sub sp, #8 - 8009cbc: af00 add r7, sp, #0 - 8009cbe: 6078 str r0, [r7, #4] + 8009f40: b580 push {r7, lr} + 8009f42: b082 sub sp, #8 + 8009f44: af00 add r7, sp, #0 + 8009f46: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 8009cc0: 46c0 nop ; (mov r8, r8) - 8009cc2: 46bd mov sp, r7 - 8009cc4: b002 add sp, #8 - 8009cc6: bd80 pop {r7, pc} + 8009f48: 46c0 nop ; (mov r8, r8) + 8009f4a: 46bd mov sp, r7 + 8009f4c: b002 add sp, #8 + 8009f4e: bd80 pop {r7, pc} -08009cc8 : +08009f50 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { - 8009cc8: b580 push {r7, lr} - 8009cca: b084 sub sp, #16 - 8009ccc: af00 add r7, sp, #0 - 8009cce: 6078 str r0, [r7, #4] - 8009cd0: 6039 str r1, [r7, #0] + 8009f50: b580 push {r7, lr} + 8009f52: b084 sub sp, #16 + 8009f54: af00 add r7, sp, #0 + 8009f56: 6078 str r0, [r7, #4] + 8009f58: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 8009cd2: 687b ldr r3, [r7, #4] - 8009cd4: 681b ldr r3, [r3, #0] - 8009cd6: 60fb str r3, [r7, #12] + 8009f5a: 687b ldr r3, [r7, #4] + 8009f5c: 681b ldr r3, [r3, #0] + 8009f5e: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8009cd8: 687b ldr r3, [r7, #4] - 8009cda: 4a2f ldr r2, [pc, #188] ; (8009d98 ) - 8009cdc: 4293 cmp r3, r2 - 8009cde: d003 beq.n 8009ce8 - 8009ce0: 687b ldr r3, [r7, #4] - 8009ce2: 4a2e ldr r2, [pc, #184] ; (8009d9c ) - 8009ce4: 4293 cmp r3, r2 - 8009ce6: d108 bne.n 8009cfa + 8009f60: 687b ldr r3, [r7, #4] + 8009f62: 4a2f ldr r2, [pc, #188] ; (800a020 ) + 8009f64: 4293 cmp r3, r2 + 8009f66: d003 beq.n 8009f70 + 8009f68: 687b ldr r3, [r7, #4] + 8009f6a: 4a2e ldr r2, [pc, #184] ; (800a024 ) + 8009f6c: 4293 cmp r3, r2 + 8009f6e: d108 bne.n 8009f82 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8009ce8: 68fb ldr r3, [r7, #12] - 8009cea: 2270 movs r2, #112 ; 0x70 - 8009cec: 4393 bics r3, r2 - 8009cee: 60fb str r3, [r7, #12] + 8009f70: 68fb ldr r3, [r7, #12] + 8009f72: 2270 movs r2, #112 ; 0x70 + 8009f74: 4393 bics r3, r2 + 8009f76: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 8009cf0: 683b ldr r3, [r7, #0] - 8009cf2: 685b ldr r3, [r3, #4] - 8009cf4: 68fa ldr r2, [r7, #12] - 8009cf6: 4313 orrs r3, r2 - 8009cf8: 60fb str r3, [r7, #12] + 8009f78: 683b ldr r3, [r7, #0] + 8009f7a: 685b ldr r3, [r3, #4] + 8009f7c: 68fa ldr r2, [r7, #12] + 8009f7e: 4313 orrs r3, r2 + 8009f80: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 8009cfa: 687b ldr r3, [r7, #4] - 8009cfc: 4a26 ldr r2, [pc, #152] ; (8009d98 ) - 8009cfe: 4293 cmp r3, r2 - 8009d00: d013 beq.n 8009d2a - 8009d02: 687b ldr r3, [r7, #4] - 8009d04: 4a25 ldr r2, [pc, #148] ; (8009d9c ) - 8009d06: 4293 cmp r3, r2 - 8009d08: d00f beq.n 8009d2a - 8009d0a: 687b ldr r3, [r7, #4] - 8009d0c: 4a24 ldr r2, [pc, #144] ; (8009da0 ) - 8009d0e: 4293 cmp r3, r2 - 8009d10: d00b beq.n 8009d2a - 8009d12: 687b ldr r3, [r7, #4] - 8009d14: 4a23 ldr r2, [pc, #140] ; (8009da4 ) - 8009d16: 4293 cmp r3, r2 - 8009d18: d007 beq.n 8009d2a - 8009d1a: 687b ldr r3, [r7, #4] - 8009d1c: 4a22 ldr r2, [pc, #136] ; (8009da8 ) - 8009d1e: 4293 cmp r3, r2 - 8009d20: d003 beq.n 8009d2a - 8009d22: 687b ldr r3, [r7, #4] - 8009d24: 4a21 ldr r2, [pc, #132] ; (8009dac ) - 8009d26: 4293 cmp r3, r2 - 8009d28: d108 bne.n 8009d3c + 8009f82: 687b ldr r3, [r7, #4] + 8009f84: 4a26 ldr r2, [pc, #152] ; (800a020 ) + 8009f86: 4293 cmp r3, r2 + 8009f88: d013 beq.n 8009fb2 + 8009f8a: 687b ldr r3, [r7, #4] + 8009f8c: 4a25 ldr r2, [pc, #148] ; (800a024 ) + 8009f8e: 4293 cmp r3, r2 + 8009f90: d00f beq.n 8009fb2 + 8009f92: 687b ldr r3, [r7, #4] + 8009f94: 4a24 ldr r2, [pc, #144] ; (800a028 ) + 8009f96: 4293 cmp r3, r2 + 8009f98: d00b beq.n 8009fb2 + 8009f9a: 687b ldr r3, [r7, #4] + 8009f9c: 4a23 ldr r2, [pc, #140] ; (800a02c ) + 8009f9e: 4293 cmp r3, r2 + 8009fa0: d007 beq.n 8009fb2 + 8009fa2: 687b ldr r3, [r7, #4] + 8009fa4: 4a22 ldr r2, [pc, #136] ; (800a030 ) + 8009fa6: 4293 cmp r3, r2 + 8009fa8: d003 beq.n 8009fb2 + 8009faa: 687b ldr r3, [r7, #4] + 8009fac: 4a21 ldr r2, [pc, #132] ; (800a034 ) + 8009fae: 4293 cmp r3, r2 + 8009fb0: d108 bne.n 8009fc4 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 8009d2a: 68fb ldr r3, [r7, #12] - 8009d2c: 4a20 ldr r2, [pc, #128] ; (8009db0 ) - 8009d2e: 4013 ands r3, r2 - 8009d30: 60fb str r3, [r7, #12] + 8009fb2: 68fb ldr r3, [r7, #12] + 8009fb4: 4a20 ldr r2, [pc, #128] ; (800a038 ) + 8009fb6: 4013 ands r3, r2 + 8009fb8: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 8009d32: 683b ldr r3, [r7, #0] - 8009d34: 68db ldr r3, [r3, #12] - 8009d36: 68fa ldr r2, [r7, #12] - 8009d38: 4313 orrs r3, r2 - 8009d3a: 60fb str r3, [r7, #12] + 8009fba: 683b ldr r3, [r7, #0] + 8009fbc: 68db ldr r3, [r3, #12] + 8009fbe: 68fa ldr r2, [r7, #12] + 8009fc0: 4313 orrs r3, r2 + 8009fc2: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8009d3c: 68fb ldr r3, [r7, #12] - 8009d3e: 2280 movs r2, #128 ; 0x80 - 8009d40: 4393 bics r3, r2 - 8009d42: 001a movs r2, r3 - 8009d44: 683b ldr r3, [r7, #0] - 8009d46: 695b ldr r3, [r3, #20] - 8009d48: 4313 orrs r3, r2 - 8009d4a: 60fb str r3, [r7, #12] + 8009fc4: 68fb ldr r3, [r7, #12] + 8009fc6: 2280 movs r2, #128 ; 0x80 + 8009fc8: 4393 bics r3, r2 + 8009fca: 001a movs r2, r3 + 8009fcc: 683b ldr r3, [r7, #0] + 8009fce: 695b ldr r3, [r3, #20] + 8009fd0: 4313 orrs r3, r2 + 8009fd2: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 8009d4c: 687b ldr r3, [r7, #4] - 8009d4e: 68fa ldr r2, [r7, #12] - 8009d50: 601a str r2, [r3, #0] + 8009fd4: 687b ldr r3, [r7, #4] + 8009fd6: 68fa ldr r2, [r7, #12] + 8009fd8: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 8009d52: 683b ldr r3, [r7, #0] - 8009d54: 689a ldr r2, [r3, #8] - 8009d56: 687b ldr r3, [r7, #4] - 8009d58: 62da str r2, [r3, #44] ; 0x2c + 8009fda: 683b ldr r3, [r7, #0] + 8009fdc: 689a ldr r2, [r3, #8] + 8009fde: 687b ldr r3, [r7, #4] + 8009fe0: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 8009d5a: 683b ldr r3, [r7, #0] - 8009d5c: 681a ldr r2, [r3, #0] - 8009d5e: 687b ldr r3, [r7, #4] - 8009d60: 629a str r2, [r3, #40] ; 0x28 + 8009fe2: 683b ldr r3, [r7, #0] + 8009fe4: 681a ldr r2, [r3, #0] + 8009fe6: 687b ldr r3, [r7, #4] + 8009fe8: 629a str r2, [r3, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 8009d62: 687b ldr r3, [r7, #4] - 8009d64: 4a0c ldr r2, [pc, #48] ; (8009d98 ) - 8009d66: 4293 cmp r3, r2 - 8009d68: d00b beq.n 8009d82 - 8009d6a: 687b ldr r3, [r7, #4] - 8009d6c: 4a0d ldr r2, [pc, #52] ; (8009da4 ) - 8009d6e: 4293 cmp r3, r2 - 8009d70: d007 beq.n 8009d82 - 8009d72: 687b ldr r3, [r7, #4] - 8009d74: 4a0c ldr r2, [pc, #48] ; (8009da8 ) - 8009d76: 4293 cmp r3, r2 - 8009d78: d003 beq.n 8009d82 - 8009d7a: 687b ldr r3, [r7, #4] - 8009d7c: 4a0b ldr r2, [pc, #44] ; (8009dac ) - 8009d7e: 4293 cmp r3, r2 - 8009d80: d103 bne.n 8009d8a + 8009fea: 687b ldr r3, [r7, #4] + 8009fec: 4a0c ldr r2, [pc, #48] ; (800a020 ) + 8009fee: 4293 cmp r3, r2 + 8009ff0: d00b beq.n 800a00a + 8009ff2: 687b ldr r3, [r7, #4] + 8009ff4: 4a0d ldr r2, [pc, #52] ; (800a02c ) + 8009ff6: 4293 cmp r3, r2 + 8009ff8: d007 beq.n 800a00a + 8009ffa: 687b ldr r3, [r7, #4] + 8009ffc: 4a0c ldr r2, [pc, #48] ; (800a030 ) + 8009ffe: 4293 cmp r3, r2 + 800a000: d003 beq.n 800a00a + 800a002: 687b ldr r3, [r7, #4] + 800a004: 4a0b ldr r2, [pc, #44] ; (800a034 ) + 800a006: 4293 cmp r3, r2 + 800a008: d103 bne.n 800a012 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; - 8009d82: 683b ldr r3, [r7, #0] - 8009d84: 691a ldr r2, [r3, #16] - 8009d86: 687b ldr r3, [r7, #4] - 8009d88: 631a str r2, [r3, #48] ; 0x30 + 800a00a: 683b ldr r3, [r7, #0] + 800a00c: 691a ldr r2, [r3, #16] + 800a00e: 687b ldr r3, [r7, #4] + 800a010: 631a str r2, [r3, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 8009d8a: 687b ldr r3, [r7, #4] - 8009d8c: 2201 movs r2, #1 - 8009d8e: 615a str r2, [r3, #20] + 800a012: 687b ldr r3, [r7, #4] + 800a014: 2201 movs r2, #1 + 800a016: 615a str r2, [r3, #20] } - 8009d90: 46c0 nop ; (mov r8, r8) - 8009d92: 46bd mov sp, r7 - 8009d94: b004 add sp, #16 - 8009d96: bd80 pop {r7, pc} - 8009d98: 40012c00 .word 0x40012c00 - 8009d9c: 40000400 .word 0x40000400 - 8009da0: 40002000 .word 0x40002000 - 8009da4: 40014000 .word 0x40014000 - 8009da8: 40014400 .word 0x40014400 - 8009dac: 40014800 .word 0x40014800 - 8009db0: fffffcff .word 0xfffffcff + 800a018: 46c0 nop ; (mov r8, r8) + 800a01a: 46bd mov sp, r7 + 800a01c: b004 add sp, #16 + 800a01e: bd80 pop {r7, pc} + 800a020: 40012c00 .word 0x40012c00 + 800a024: 40000400 .word 0x40000400 + 800a028: 40002000 .word 0x40002000 + 800a02c: 40014000 .word 0x40014000 + 800a030: 40014400 .word 0x40014400 + 800a034: 40014800 .word 0x40014800 + 800a038: fffffcff .word 0xfffffcff -08009db4 : +0800a03c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 8009db4: b580 push {r7, lr} - 8009db6: b086 sub sp, #24 - 8009db8: af00 add r7, sp, #0 - 8009dba: 6078 str r0, [r7, #4] - 8009dbc: 6039 str r1, [r7, #0] + 800a03c: b580 push {r7, lr} + 800a03e: b086 sub sp, #24 + 800a040: af00 add r7, sp, #0 + 800a042: 6078 str r0, [r7, #4] + 800a044: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; - 8009dbe: 687b ldr r3, [r7, #4] - 8009dc0: 6a1b ldr r3, [r3, #32] - 8009dc2: 2201 movs r2, #1 - 8009dc4: 4393 bics r3, r2 - 8009dc6: 001a movs r2, r3 - 8009dc8: 687b ldr r3, [r7, #4] - 8009dca: 621a str r2, [r3, #32] + 800a046: 687b ldr r3, [r7, #4] + 800a048: 6a1b ldr r3, [r3, #32] + 800a04a: 2201 movs r2, #1 + 800a04c: 4393 bics r3, r2 + 800a04e: 001a movs r2, r3 + 800a050: 687b ldr r3, [r7, #4] + 800a052: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; - 8009dcc: 687b ldr r3, [r7, #4] - 8009dce: 6a1b ldr r3, [r3, #32] - 8009dd0: 617b str r3, [r7, #20] + 800a054: 687b ldr r3, [r7, #4] + 800a056: 6a1b ldr r3, [r3, #32] + 800a058: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; - 8009dd2: 687b ldr r3, [r7, #4] - 8009dd4: 685b ldr r3, [r3, #4] - 8009dd6: 613b str r3, [r7, #16] + 800a05a: 687b ldr r3, [r7, #4] + 800a05c: 685b ldr r3, [r3, #4] + 800a05e: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; - 8009dd8: 687b ldr r3, [r7, #4] - 8009dda: 699b ldr r3, [r3, #24] - 8009ddc: 60fb str r3, [r7, #12] + 800a060: 687b ldr r3, [r7, #4] + 800a062: 699b ldr r3, [r3, #24] + 800a064: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; - 8009dde: 68fb ldr r3, [r7, #12] - 8009de0: 4a32 ldr r2, [pc, #200] ; (8009eac ) - 8009de2: 4013 ands r3, r2 - 8009de4: 60fb str r3, [r7, #12] + 800a066: 68fb ldr r3, [r7, #12] + 800a068: 4a32 ldr r2, [pc, #200] ; (800a134 ) + 800a06a: 4013 ands r3, r2 + 800a06c: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; - 8009de6: 68fb ldr r3, [r7, #12] - 8009de8: 2203 movs r2, #3 - 8009dea: 4393 bics r3, r2 - 8009dec: 60fb str r3, [r7, #12] + 800a06e: 68fb ldr r3, [r7, #12] + 800a070: 2203 movs r2, #3 + 800a072: 4393 bics r3, r2 + 800a074: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; - 8009dee: 683b ldr r3, [r7, #0] - 8009df0: 681b ldr r3, [r3, #0] - 8009df2: 68fa ldr r2, [r7, #12] - 8009df4: 4313 orrs r3, r2 - 8009df6: 60fb str r3, [r7, #12] + 800a076: 683b ldr r3, [r7, #0] + 800a078: 681b ldr r3, [r3, #0] + 800a07a: 68fa ldr r2, [r7, #12] + 800a07c: 4313 orrs r3, r2 + 800a07e: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; - 8009df8: 697b ldr r3, [r7, #20] - 8009dfa: 2202 movs r2, #2 - 8009dfc: 4393 bics r3, r2 - 8009dfe: 617b str r3, [r7, #20] + 800a080: 697b ldr r3, [r7, #20] + 800a082: 2202 movs r2, #2 + 800a084: 4393 bics r3, r2 + 800a086: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; - 8009e00: 683b ldr r3, [r7, #0] - 8009e02: 689b ldr r3, [r3, #8] - 8009e04: 697a ldr r2, [r7, #20] - 8009e06: 4313 orrs r3, r2 - 8009e08: 617b str r3, [r7, #20] + 800a088: 683b ldr r3, [r7, #0] + 800a08a: 689b ldr r3, [r3, #8] + 800a08c: 697a ldr r2, [r7, #20] + 800a08e: 4313 orrs r3, r2 + 800a090: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) - 8009e0a: 687b ldr r3, [r7, #4] - 8009e0c: 4a28 ldr r2, [pc, #160] ; (8009eb0 ) - 8009e0e: 4293 cmp r3, r2 - 8009e10: d00b beq.n 8009e2a - 8009e12: 687b ldr r3, [r7, #4] - 8009e14: 4a27 ldr r2, [pc, #156] ; (8009eb4 ) - 8009e16: 4293 cmp r3, r2 - 8009e18: d007 beq.n 8009e2a - 8009e1a: 687b ldr r3, [r7, #4] - 8009e1c: 4a26 ldr r2, [pc, #152] ; (8009eb8 ) - 8009e1e: 4293 cmp r3, r2 - 8009e20: d003 beq.n 8009e2a - 8009e22: 687b ldr r3, [r7, #4] - 8009e24: 4a25 ldr r2, [pc, #148] ; (8009ebc ) - 8009e26: 4293 cmp r3, r2 - 8009e28: d10c bne.n 8009e44 + 800a092: 687b ldr r3, [r7, #4] + 800a094: 4a28 ldr r2, [pc, #160] ; (800a138 ) + 800a096: 4293 cmp r3, r2 + 800a098: d00b beq.n 800a0b2 + 800a09a: 687b ldr r3, [r7, #4] + 800a09c: 4a27 ldr r2, [pc, #156] ; (800a13c ) + 800a09e: 4293 cmp r3, r2 + 800a0a0: d007 beq.n 800a0b2 + 800a0a2: 687b ldr r3, [r7, #4] + 800a0a4: 4a26 ldr r2, [pc, #152] ; (800a140 ) + 800a0a6: 4293 cmp r3, r2 + 800a0a8: d003 beq.n 800a0b2 + 800a0aa: 687b ldr r3, [r7, #4] + 800a0ac: 4a25 ldr r2, [pc, #148] ; (800a144 ) + 800a0ae: 4293 cmp r3, r2 + 800a0b0: d10c bne.n 800a0cc { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; - 8009e2a: 697b ldr r3, [r7, #20] - 8009e2c: 2208 movs r2, #8 - 8009e2e: 4393 bics r3, r2 - 8009e30: 617b str r3, [r7, #20] + 800a0b2: 697b ldr r3, [r7, #20] + 800a0b4: 2208 movs r2, #8 + 800a0b6: 4393 bics r3, r2 + 800a0b8: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; - 8009e32: 683b ldr r3, [r7, #0] - 8009e34: 68db ldr r3, [r3, #12] - 8009e36: 697a ldr r2, [r7, #20] - 8009e38: 4313 orrs r3, r2 - 8009e3a: 617b str r3, [r7, #20] + 800a0ba: 683b ldr r3, [r7, #0] + 800a0bc: 68db ldr r3, [r3, #12] + 800a0be: 697a ldr r2, [r7, #20] + 800a0c0: 4313 orrs r3, r2 + 800a0c2: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; - 8009e3c: 697b ldr r3, [r7, #20] - 8009e3e: 2204 movs r2, #4 - 8009e40: 4393 bics r3, r2 - 8009e42: 617b str r3, [r7, #20] + 800a0c4: 697b ldr r3, [r7, #20] + 800a0c6: 2204 movs r2, #4 + 800a0c8: 4393 bics r3, r2 + 800a0ca: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8009e44: 687b ldr r3, [r7, #4] - 8009e46: 4a1a ldr r2, [pc, #104] ; (8009eb0 ) - 8009e48: 4293 cmp r3, r2 - 8009e4a: d00b beq.n 8009e64 - 8009e4c: 687b ldr r3, [r7, #4] - 8009e4e: 4a19 ldr r2, [pc, #100] ; (8009eb4 ) - 8009e50: 4293 cmp r3, r2 - 8009e52: d007 beq.n 8009e64 - 8009e54: 687b ldr r3, [r7, #4] - 8009e56: 4a18 ldr r2, [pc, #96] ; (8009eb8 ) - 8009e58: 4293 cmp r3, r2 - 8009e5a: d003 beq.n 8009e64 - 8009e5c: 687b ldr r3, [r7, #4] - 8009e5e: 4a17 ldr r2, [pc, #92] ; (8009ebc ) - 8009e60: 4293 cmp r3, r2 - 8009e62: d111 bne.n 8009e88 + 800a0cc: 687b ldr r3, [r7, #4] + 800a0ce: 4a1a ldr r2, [pc, #104] ; (800a138 ) + 800a0d0: 4293 cmp r3, r2 + 800a0d2: d00b beq.n 800a0ec + 800a0d4: 687b ldr r3, [r7, #4] + 800a0d6: 4a19 ldr r2, [pc, #100] ; (800a13c ) + 800a0d8: 4293 cmp r3, r2 + 800a0da: d007 beq.n 800a0ec + 800a0dc: 687b ldr r3, [r7, #4] + 800a0de: 4a18 ldr r2, [pc, #96] ; (800a140 ) + 800a0e0: 4293 cmp r3, r2 + 800a0e2: d003 beq.n 800a0ec + 800a0e4: 687b ldr r3, [r7, #4] + 800a0e6: 4a17 ldr r2, [pc, #92] ; (800a144 ) + 800a0e8: 4293 cmp r3, r2 + 800a0ea: d111 bne.n 800a110 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; - 8009e64: 693b ldr r3, [r7, #16] - 8009e66: 4a16 ldr r2, [pc, #88] ; (8009ec0 ) - 8009e68: 4013 ands r3, r2 - 8009e6a: 613b str r3, [r7, #16] + 800a0ec: 693b ldr r3, [r7, #16] + 800a0ee: 4a16 ldr r2, [pc, #88] ; (800a148 ) + 800a0f0: 4013 ands r3, r2 + 800a0f2: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; - 8009e6c: 693b ldr r3, [r7, #16] - 8009e6e: 4a15 ldr r2, [pc, #84] ; (8009ec4 ) - 8009e70: 4013 ands r3, r2 - 8009e72: 613b str r3, [r7, #16] + 800a0f4: 693b ldr r3, [r7, #16] + 800a0f6: 4a15 ldr r2, [pc, #84] ; (800a14c ) + 800a0f8: 4013 ands r3, r2 + 800a0fa: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; - 8009e74: 683b ldr r3, [r7, #0] - 8009e76: 695b ldr r3, [r3, #20] - 8009e78: 693a ldr r2, [r7, #16] - 8009e7a: 4313 orrs r3, r2 - 8009e7c: 613b str r3, [r7, #16] + 800a0fc: 683b ldr r3, [r7, #0] + 800a0fe: 695b ldr r3, [r3, #20] + 800a100: 693a ldr r2, [r7, #16] + 800a102: 4313 orrs r3, r2 + 800a104: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; - 8009e7e: 683b ldr r3, [r7, #0] - 8009e80: 699b ldr r3, [r3, #24] - 8009e82: 693a ldr r2, [r7, #16] - 8009e84: 4313 orrs r3, r2 - 8009e86: 613b str r3, [r7, #16] + 800a106: 683b ldr r3, [r7, #0] + 800a108: 699b ldr r3, [r3, #24] + 800a10a: 693a ldr r2, [r7, #16] + 800a10c: 4313 orrs r3, r2 + 800a10e: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 8009e88: 687b ldr r3, [r7, #4] - 8009e8a: 693a ldr r2, [r7, #16] - 8009e8c: 605a str r2, [r3, #4] + 800a110: 687b ldr r3, [r7, #4] + 800a112: 693a ldr r2, [r7, #16] + 800a114: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; - 8009e8e: 687b ldr r3, [r7, #4] - 8009e90: 68fa ldr r2, [r7, #12] - 8009e92: 619a str r2, [r3, #24] + 800a116: 687b ldr r3, [r7, #4] + 800a118: 68fa ldr r2, [r7, #12] + 800a11a: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; - 8009e94: 683b ldr r3, [r7, #0] - 8009e96: 685a ldr r2, [r3, #4] - 8009e98: 687b ldr r3, [r7, #4] - 8009e9a: 635a str r2, [r3, #52] ; 0x34 + 800a11c: 683b ldr r3, [r7, #0] + 800a11e: 685a ldr r2, [r3, #4] + 800a120: 687b ldr r3, [r7, #4] + 800a122: 635a str r2, [r3, #52] ; 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 8009e9c: 687b ldr r3, [r7, #4] - 8009e9e: 697a ldr r2, [r7, #20] - 8009ea0: 621a str r2, [r3, #32] + 800a124: 687b ldr r3, [r7, #4] + 800a126: 697a ldr r2, [r7, #20] + 800a128: 621a str r2, [r3, #32] } - 8009ea2: 46c0 nop ; (mov r8, r8) - 8009ea4: 46bd mov sp, r7 - 8009ea6: b006 add sp, #24 - 8009ea8: bd80 pop {r7, pc} - 8009eaa: 46c0 nop ; (mov r8, r8) - 8009eac: fffeff8f .word 0xfffeff8f - 8009eb0: 40012c00 .word 0x40012c00 - 8009eb4: 40014000 .word 0x40014000 - 8009eb8: 40014400 .word 0x40014400 - 8009ebc: 40014800 .word 0x40014800 - 8009ec0: fffffeff .word 0xfffffeff - 8009ec4: fffffdff .word 0xfffffdff + 800a12a: 46c0 nop ; (mov r8, r8) + 800a12c: 46bd mov sp, r7 + 800a12e: b006 add sp, #24 + 800a130: bd80 pop {r7, pc} + 800a132: 46c0 nop ; (mov r8, r8) + 800a134: fffeff8f .word 0xfffeff8f + 800a138: 40012c00 .word 0x40012c00 + 800a13c: 40014000 .word 0x40014000 + 800a140: 40014400 .word 0x40014400 + 800a144: 40014800 .word 0x40014800 + 800a148: fffffeff .word 0xfffffeff + 800a14c: fffffdff .word 0xfffffdff -08009ec8 : +0800a150 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 8009ec8: b580 push {r7, lr} - 8009eca: b086 sub sp, #24 - 8009ecc: af00 add r7, sp, #0 - 8009ece: 6078 str r0, [r7, #4] - 8009ed0: 6039 str r1, [r7, #0] + 800a150: b580 push {r7, lr} + 800a152: b086 sub sp, #24 + 800a154: af00 add r7, sp, #0 + 800a156: 6078 str r0, [r7, #4] + 800a158: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; - 8009ed2: 687b ldr r3, [r7, #4] - 8009ed4: 6a1b ldr r3, [r3, #32] - 8009ed6: 2210 movs r2, #16 - 8009ed8: 4393 bics r3, r2 - 8009eda: 001a movs r2, r3 - 8009edc: 687b ldr r3, [r7, #4] - 8009ede: 621a str r2, [r3, #32] + 800a15a: 687b ldr r3, [r7, #4] + 800a15c: 6a1b ldr r3, [r3, #32] + 800a15e: 2210 movs r2, #16 + 800a160: 4393 bics r3, r2 + 800a162: 001a movs r2, r3 + 800a164: 687b ldr r3, [r7, #4] + 800a166: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; - 8009ee0: 687b ldr r3, [r7, #4] - 8009ee2: 6a1b ldr r3, [r3, #32] - 8009ee4: 617b str r3, [r7, #20] + 800a168: 687b ldr r3, [r7, #4] + 800a16a: 6a1b ldr r3, [r3, #32] + 800a16c: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; - 8009ee6: 687b ldr r3, [r7, #4] - 8009ee8: 685b ldr r3, [r3, #4] - 8009eea: 613b str r3, [r7, #16] + 800a16e: 687b ldr r3, [r7, #4] + 800a170: 685b ldr r3, [r3, #4] + 800a172: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; - 8009eec: 687b ldr r3, [r7, #4] - 8009eee: 699b ldr r3, [r3, #24] - 8009ef0: 60fb str r3, [r7, #12] + 800a174: 687b ldr r3, [r7, #4] + 800a176: 699b ldr r3, [r3, #24] + 800a178: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; - 8009ef2: 68fb ldr r3, [r7, #12] - 8009ef4: 4a2e ldr r2, [pc, #184] ; (8009fb0 ) - 8009ef6: 4013 ands r3, r2 - 8009ef8: 60fb str r3, [r7, #12] + 800a17a: 68fb ldr r3, [r7, #12] + 800a17c: 4a2e ldr r2, [pc, #184] ; (800a238 ) + 800a17e: 4013 ands r3, r2 + 800a180: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; - 8009efa: 68fb ldr r3, [r7, #12] - 8009efc: 4a2d ldr r2, [pc, #180] ; (8009fb4 ) - 8009efe: 4013 ands r3, r2 - 8009f00: 60fb str r3, [r7, #12] + 800a182: 68fb ldr r3, [r7, #12] + 800a184: 4a2d ldr r2, [pc, #180] ; (800a23c ) + 800a186: 4013 ands r3, r2 + 800a188: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); - 8009f02: 683b ldr r3, [r7, #0] - 8009f04: 681b ldr r3, [r3, #0] - 8009f06: 021b lsls r3, r3, #8 - 8009f08: 68fa ldr r2, [r7, #12] - 8009f0a: 4313 orrs r3, r2 - 8009f0c: 60fb str r3, [r7, #12] + 800a18a: 683b ldr r3, [r7, #0] + 800a18c: 681b ldr r3, [r3, #0] + 800a18e: 021b lsls r3, r3, #8 + 800a190: 68fa ldr r2, [r7, #12] + 800a192: 4313 orrs r3, r2 + 800a194: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; - 8009f0e: 697b ldr r3, [r7, #20] - 8009f10: 2220 movs r2, #32 - 8009f12: 4393 bics r3, r2 - 8009f14: 617b str r3, [r7, #20] + 800a196: 697b ldr r3, [r7, #20] + 800a198: 2220 movs r2, #32 + 800a19a: 4393 bics r3, r2 + 800a19c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); - 8009f16: 683b ldr r3, [r7, #0] - 8009f18: 689b ldr r3, [r3, #8] - 8009f1a: 011b lsls r3, r3, #4 - 8009f1c: 697a ldr r2, [r7, #20] - 8009f1e: 4313 orrs r3, r2 - 8009f20: 617b str r3, [r7, #20] + 800a19e: 683b ldr r3, [r7, #0] + 800a1a0: 689b ldr r3, [r3, #8] + 800a1a2: 011b lsls r3, r3, #4 + 800a1a4: 697a ldr r2, [r7, #20] + 800a1a6: 4313 orrs r3, r2 + 800a1a8: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) - 8009f22: 687b ldr r3, [r7, #4] - 8009f24: 4a24 ldr r2, [pc, #144] ; (8009fb8 ) - 8009f26: 4293 cmp r3, r2 - 8009f28: d10d bne.n 8009f46 + 800a1aa: 687b ldr r3, [r7, #4] + 800a1ac: 4a24 ldr r2, [pc, #144] ; (800a240 ) + 800a1ae: 4293 cmp r3, r2 + 800a1b0: d10d bne.n 800a1ce { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; - 8009f2a: 697b ldr r3, [r7, #20] - 8009f2c: 2280 movs r2, #128 ; 0x80 - 8009f2e: 4393 bics r3, r2 - 8009f30: 617b str r3, [r7, #20] + 800a1b2: 697b ldr r3, [r7, #20] + 800a1b4: 2280 movs r2, #128 ; 0x80 + 800a1b6: 4393 bics r3, r2 + 800a1b8: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); - 8009f32: 683b ldr r3, [r7, #0] - 8009f34: 68db ldr r3, [r3, #12] - 8009f36: 011b lsls r3, r3, #4 - 8009f38: 697a ldr r2, [r7, #20] - 8009f3a: 4313 orrs r3, r2 - 8009f3c: 617b str r3, [r7, #20] + 800a1ba: 683b ldr r3, [r7, #0] + 800a1bc: 68db ldr r3, [r3, #12] + 800a1be: 011b lsls r3, r3, #4 + 800a1c0: 697a ldr r2, [r7, #20] + 800a1c2: 4313 orrs r3, r2 + 800a1c4: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; - 8009f3e: 697b ldr r3, [r7, #20] - 8009f40: 2240 movs r2, #64 ; 0x40 - 8009f42: 4393 bics r3, r2 - 8009f44: 617b str r3, [r7, #20] + 800a1c6: 697b ldr r3, [r7, #20] + 800a1c8: 2240 movs r2, #64 ; 0x40 + 800a1ca: 4393 bics r3, r2 + 800a1cc: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) - 8009f46: 687b ldr r3, [r7, #4] - 8009f48: 4a1b ldr r2, [pc, #108] ; (8009fb8 ) - 8009f4a: 4293 cmp r3, r2 - 8009f4c: d00b beq.n 8009f66 - 8009f4e: 687b ldr r3, [r7, #4] - 8009f50: 4a1a ldr r2, [pc, #104] ; (8009fbc ) - 8009f52: 4293 cmp r3, r2 - 8009f54: d007 beq.n 8009f66 - 8009f56: 687b ldr r3, [r7, #4] - 8009f58: 4a19 ldr r2, [pc, #100] ; (8009fc0 ) - 8009f5a: 4293 cmp r3, r2 - 8009f5c: d003 beq.n 8009f66 - 8009f5e: 687b ldr r3, [r7, #4] - 8009f60: 4a18 ldr r2, [pc, #96] ; (8009fc4 ) - 8009f62: 4293 cmp r3, r2 - 8009f64: d113 bne.n 8009f8e + 800a1ce: 687b ldr r3, [r7, #4] + 800a1d0: 4a1b ldr r2, [pc, #108] ; (800a240 ) + 800a1d2: 4293 cmp r3, r2 + 800a1d4: d00b beq.n 800a1ee + 800a1d6: 687b ldr r3, [r7, #4] + 800a1d8: 4a1a ldr r2, [pc, #104] ; (800a244 ) + 800a1da: 4293 cmp r3, r2 + 800a1dc: d007 beq.n 800a1ee + 800a1de: 687b ldr r3, [r7, #4] + 800a1e0: 4a19 ldr r2, [pc, #100] ; (800a248 ) + 800a1e2: 4293 cmp r3, r2 + 800a1e4: d003 beq.n 800a1ee + 800a1e6: 687b ldr r3, [r7, #4] + 800a1e8: 4a18 ldr r2, [pc, #96] ; (800a24c ) + 800a1ea: 4293 cmp r3, r2 + 800a1ec: d113 bne.n 800a216 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; - 8009f66: 693b ldr r3, [r7, #16] - 8009f68: 4a17 ldr r2, [pc, #92] ; (8009fc8 ) - 8009f6a: 4013 ands r3, r2 - 8009f6c: 613b str r3, [r7, #16] + 800a1ee: 693b ldr r3, [r7, #16] + 800a1f0: 4a17 ldr r2, [pc, #92] ; (800a250 ) + 800a1f2: 4013 ands r3, r2 + 800a1f4: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; - 8009f6e: 693b ldr r3, [r7, #16] - 8009f70: 4a16 ldr r2, [pc, #88] ; (8009fcc ) - 8009f72: 4013 ands r3, r2 - 8009f74: 613b str r3, [r7, #16] + 800a1f6: 693b ldr r3, [r7, #16] + 800a1f8: 4a16 ldr r2, [pc, #88] ; (800a254 ) + 800a1fa: 4013 ands r3, r2 + 800a1fc: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); - 8009f76: 683b ldr r3, [r7, #0] - 8009f78: 695b ldr r3, [r3, #20] - 8009f7a: 009b lsls r3, r3, #2 - 8009f7c: 693a ldr r2, [r7, #16] - 8009f7e: 4313 orrs r3, r2 - 8009f80: 613b str r3, [r7, #16] + 800a1fe: 683b ldr r3, [r7, #0] + 800a200: 695b ldr r3, [r3, #20] + 800a202: 009b lsls r3, r3, #2 + 800a204: 693a ldr r2, [r7, #16] + 800a206: 4313 orrs r3, r2 + 800a208: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); - 8009f82: 683b ldr r3, [r7, #0] - 8009f84: 699b ldr r3, [r3, #24] - 8009f86: 009b lsls r3, r3, #2 - 8009f88: 693a ldr r2, [r7, #16] - 8009f8a: 4313 orrs r3, r2 - 8009f8c: 613b str r3, [r7, #16] + 800a20a: 683b ldr r3, [r7, #0] + 800a20c: 699b ldr r3, [r3, #24] + 800a20e: 009b lsls r3, r3, #2 + 800a210: 693a ldr r2, [r7, #16] + 800a212: 4313 orrs r3, r2 + 800a214: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 8009f8e: 687b ldr r3, [r7, #4] - 8009f90: 693a ldr r2, [r7, #16] - 8009f92: 605a str r2, [r3, #4] + 800a216: 687b ldr r3, [r7, #4] + 800a218: 693a ldr r2, [r7, #16] + 800a21a: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; - 8009f94: 687b ldr r3, [r7, #4] - 8009f96: 68fa ldr r2, [r7, #12] - 8009f98: 619a str r2, [r3, #24] + 800a21c: 687b ldr r3, [r7, #4] + 800a21e: 68fa ldr r2, [r7, #12] + 800a220: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; - 8009f9a: 683b ldr r3, [r7, #0] - 8009f9c: 685a ldr r2, [r3, #4] - 8009f9e: 687b ldr r3, [r7, #4] - 8009fa0: 639a str r2, [r3, #56] ; 0x38 + 800a222: 683b ldr r3, [r7, #0] + 800a224: 685a ldr r2, [r3, #4] + 800a226: 687b ldr r3, [r7, #4] + 800a228: 639a str r2, [r3, #56] ; 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 8009fa2: 687b ldr r3, [r7, #4] - 8009fa4: 697a ldr r2, [r7, #20] - 8009fa6: 621a str r2, [r3, #32] + 800a22a: 687b ldr r3, [r7, #4] + 800a22c: 697a ldr r2, [r7, #20] + 800a22e: 621a str r2, [r3, #32] } - 8009fa8: 46c0 nop ; (mov r8, r8) - 8009faa: 46bd mov sp, r7 - 8009fac: b006 add sp, #24 - 8009fae: bd80 pop {r7, pc} - 8009fb0: feff8fff .word 0xfeff8fff - 8009fb4: fffffcff .word 0xfffffcff - 8009fb8: 40012c00 .word 0x40012c00 - 8009fbc: 40014000 .word 0x40014000 - 8009fc0: 40014400 .word 0x40014400 - 8009fc4: 40014800 .word 0x40014800 - 8009fc8: fffffbff .word 0xfffffbff - 8009fcc: fffff7ff .word 0xfffff7ff + 800a230: 46c0 nop ; (mov r8, r8) + 800a232: 46bd mov sp, r7 + 800a234: b006 add sp, #24 + 800a236: bd80 pop {r7, pc} + 800a238: feff8fff .word 0xfeff8fff + 800a23c: fffffcff .word 0xfffffcff + 800a240: 40012c00 .word 0x40012c00 + 800a244: 40014000 .word 0x40014000 + 800a248: 40014400 .word 0x40014400 + 800a24c: 40014800 .word 0x40014800 + 800a250: fffffbff .word 0xfffffbff + 800a254: fffff7ff .word 0xfffff7ff -08009fd0 : +0800a258 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 8009fd0: b580 push {r7, lr} - 8009fd2: b086 sub sp, #24 - 8009fd4: af00 add r7, sp, #0 - 8009fd6: 6078 str r0, [r7, #4] - 8009fd8: 6039 str r1, [r7, #0] + 800a258: b580 push {r7, lr} + 800a25a: b086 sub sp, #24 + 800a25c: af00 add r7, sp, #0 + 800a25e: 6078 str r0, [r7, #4] + 800a260: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; - 8009fda: 687b ldr r3, [r7, #4] - 8009fdc: 6a1b ldr r3, [r3, #32] - 8009fde: 4a35 ldr r2, [pc, #212] ; (800a0b4 ) - 8009fe0: 401a ands r2, r3 - 8009fe2: 687b ldr r3, [r7, #4] - 8009fe4: 621a str r2, [r3, #32] + 800a262: 687b ldr r3, [r7, #4] + 800a264: 6a1b ldr r3, [r3, #32] + 800a266: 4a35 ldr r2, [pc, #212] ; (800a33c ) + 800a268: 401a ands r2, r3 + 800a26a: 687b ldr r3, [r7, #4] + 800a26c: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; - 8009fe6: 687b ldr r3, [r7, #4] - 8009fe8: 6a1b ldr r3, [r3, #32] - 8009fea: 617b str r3, [r7, #20] + 800a26e: 687b ldr r3, [r7, #4] + 800a270: 6a1b ldr r3, [r3, #32] + 800a272: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; - 8009fec: 687b ldr r3, [r7, #4] - 8009fee: 685b ldr r3, [r3, #4] - 8009ff0: 613b str r3, [r7, #16] + 800a274: 687b ldr r3, [r7, #4] + 800a276: 685b ldr r3, [r3, #4] + 800a278: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; - 8009ff2: 687b ldr r3, [r7, #4] - 8009ff4: 69db ldr r3, [r3, #28] - 8009ff6: 60fb str r3, [r7, #12] + 800a27a: 687b ldr r3, [r7, #4] + 800a27c: 69db ldr r3, [r3, #28] + 800a27e: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; - 8009ff8: 68fb ldr r3, [r7, #12] - 8009ffa: 4a2f ldr r2, [pc, #188] ; (800a0b8 ) - 8009ffc: 4013 ands r3, r2 - 8009ffe: 60fb str r3, [r7, #12] + 800a280: 68fb ldr r3, [r7, #12] + 800a282: 4a2f ldr r2, [pc, #188] ; (800a340 ) + 800a284: 4013 ands r3, r2 + 800a286: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; - 800a000: 68fb ldr r3, [r7, #12] - 800a002: 2203 movs r2, #3 - 800a004: 4393 bics r3, r2 - 800a006: 60fb str r3, [r7, #12] + 800a288: 68fb ldr r3, [r7, #12] + 800a28a: 2203 movs r2, #3 + 800a28c: 4393 bics r3, r2 + 800a28e: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; - 800a008: 683b ldr r3, [r7, #0] - 800a00a: 681b ldr r3, [r3, #0] - 800a00c: 68fa ldr r2, [r7, #12] - 800a00e: 4313 orrs r3, r2 - 800a010: 60fb str r3, [r7, #12] + 800a290: 683b ldr r3, [r7, #0] + 800a292: 681b ldr r3, [r3, #0] + 800a294: 68fa ldr r2, [r7, #12] + 800a296: 4313 orrs r3, r2 + 800a298: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; - 800a012: 697b ldr r3, [r7, #20] - 800a014: 4a29 ldr r2, [pc, #164] ; (800a0bc ) - 800a016: 4013 ands r3, r2 - 800a018: 617b str r3, [r7, #20] + 800a29a: 697b ldr r3, [r7, #20] + 800a29c: 4a29 ldr r2, [pc, #164] ; (800a344 ) + 800a29e: 4013 ands r3, r2 + 800a2a0: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); - 800a01a: 683b ldr r3, [r7, #0] - 800a01c: 689b ldr r3, [r3, #8] - 800a01e: 021b lsls r3, r3, #8 - 800a020: 697a ldr r2, [r7, #20] - 800a022: 4313 orrs r3, r2 - 800a024: 617b str r3, [r7, #20] + 800a2a2: 683b ldr r3, [r7, #0] + 800a2a4: 689b ldr r3, [r3, #8] + 800a2a6: 021b lsls r3, r3, #8 + 800a2a8: 697a ldr r2, [r7, #20] + 800a2aa: 4313 orrs r3, r2 + 800a2ac: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) - 800a026: 687b ldr r3, [r7, #4] - 800a028: 4a25 ldr r2, [pc, #148] ; (800a0c0 ) - 800a02a: 4293 cmp r3, r2 - 800a02c: d10d bne.n 800a04a + 800a2ae: 687b ldr r3, [r7, #4] + 800a2b0: 4a25 ldr r2, [pc, #148] ; (800a348 ) + 800a2b2: 4293 cmp r3, r2 + 800a2b4: d10d bne.n 800a2d2 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; - 800a02e: 697b ldr r3, [r7, #20] - 800a030: 4a24 ldr r2, [pc, #144] ; (800a0c4 ) - 800a032: 4013 ands r3, r2 - 800a034: 617b str r3, [r7, #20] + 800a2b6: 697b ldr r3, [r7, #20] + 800a2b8: 4a24 ldr r2, [pc, #144] ; (800a34c ) + 800a2ba: 4013 ands r3, r2 + 800a2bc: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); - 800a036: 683b ldr r3, [r7, #0] - 800a038: 68db ldr r3, [r3, #12] - 800a03a: 021b lsls r3, r3, #8 - 800a03c: 697a ldr r2, [r7, #20] - 800a03e: 4313 orrs r3, r2 - 800a040: 617b str r3, [r7, #20] + 800a2be: 683b ldr r3, [r7, #0] + 800a2c0: 68db ldr r3, [r3, #12] + 800a2c2: 021b lsls r3, r3, #8 + 800a2c4: 697a ldr r2, [r7, #20] + 800a2c6: 4313 orrs r3, r2 + 800a2c8: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; - 800a042: 697b ldr r3, [r7, #20] - 800a044: 4a20 ldr r2, [pc, #128] ; (800a0c8 ) - 800a046: 4013 ands r3, r2 - 800a048: 617b str r3, [r7, #20] + 800a2ca: 697b ldr r3, [r7, #20] + 800a2cc: 4a20 ldr r2, [pc, #128] ; (800a350 ) + 800a2ce: 4013 ands r3, r2 + 800a2d0: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800a04a: 687b ldr r3, [r7, #4] - 800a04c: 4a1c ldr r2, [pc, #112] ; (800a0c0 ) - 800a04e: 4293 cmp r3, r2 - 800a050: d00b beq.n 800a06a - 800a052: 687b ldr r3, [r7, #4] - 800a054: 4a1d ldr r2, [pc, #116] ; (800a0cc ) - 800a056: 4293 cmp r3, r2 - 800a058: d007 beq.n 800a06a - 800a05a: 687b ldr r3, [r7, #4] - 800a05c: 4a1c ldr r2, [pc, #112] ; (800a0d0 ) - 800a05e: 4293 cmp r3, r2 - 800a060: d003 beq.n 800a06a - 800a062: 687b ldr r3, [r7, #4] - 800a064: 4a1b ldr r2, [pc, #108] ; (800a0d4 ) - 800a066: 4293 cmp r3, r2 - 800a068: d113 bne.n 800a092 + 800a2d2: 687b ldr r3, [r7, #4] + 800a2d4: 4a1c ldr r2, [pc, #112] ; (800a348 ) + 800a2d6: 4293 cmp r3, r2 + 800a2d8: d00b beq.n 800a2f2 + 800a2da: 687b ldr r3, [r7, #4] + 800a2dc: 4a1d ldr r2, [pc, #116] ; (800a354 ) + 800a2de: 4293 cmp r3, r2 + 800a2e0: d007 beq.n 800a2f2 + 800a2e2: 687b ldr r3, [r7, #4] + 800a2e4: 4a1c ldr r2, [pc, #112] ; (800a358 ) + 800a2e6: 4293 cmp r3, r2 + 800a2e8: d003 beq.n 800a2f2 + 800a2ea: 687b ldr r3, [r7, #4] + 800a2ec: 4a1b ldr r2, [pc, #108] ; (800a35c ) + 800a2ee: 4293 cmp r3, r2 + 800a2f0: d113 bne.n 800a31a /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; - 800a06a: 693b ldr r3, [r7, #16] - 800a06c: 4a1a ldr r2, [pc, #104] ; (800a0d8 ) - 800a06e: 4013 ands r3, r2 - 800a070: 613b str r3, [r7, #16] + 800a2f2: 693b ldr r3, [r7, #16] + 800a2f4: 4a1a ldr r2, [pc, #104] ; (800a360 ) + 800a2f6: 4013 ands r3, r2 + 800a2f8: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; - 800a072: 693b ldr r3, [r7, #16] - 800a074: 4a19 ldr r2, [pc, #100] ; (800a0dc ) - 800a076: 4013 ands r3, r2 - 800a078: 613b str r3, [r7, #16] + 800a2fa: 693b ldr r3, [r7, #16] + 800a2fc: 4a19 ldr r2, [pc, #100] ; (800a364 ) + 800a2fe: 4013 ands r3, r2 + 800a300: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); - 800a07a: 683b ldr r3, [r7, #0] - 800a07c: 695b ldr r3, [r3, #20] - 800a07e: 011b lsls r3, r3, #4 - 800a080: 693a ldr r2, [r7, #16] - 800a082: 4313 orrs r3, r2 - 800a084: 613b str r3, [r7, #16] + 800a302: 683b ldr r3, [r7, #0] + 800a304: 695b ldr r3, [r3, #20] + 800a306: 011b lsls r3, r3, #4 + 800a308: 693a ldr r2, [r7, #16] + 800a30a: 4313 orrs r3, r2 + 800a30c: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); - 800a086: 683b ldr r3, [r7, #0] - 800a088: 699b ldr r3, [r3, #24] - 800a08a: 011b lsls r3, r3, #4 - 800a08c: 693a ldr r2, [r7, #16] - 800a08e: 4313 orrs r3, r2 - 800a090: 613b str r3, [r7, #16] + 800a30e: 683b ldr r3, [r7, #0] + 800a310: 699b ldr r3, [r3, #24] + 800a312: 011b lsls r3, r3, #4 + 800a314: 693a ldr r2, [r7, #16] + 800a316: 4313 orrs r3, r2 + 800a318: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 800a092: 687b ldr r3, [r7, #4] - 800a094: 693a ldr r2, [r7, #16] - 800a096: 605a str r2, [r3, #4] + 800a31a: 687b ldr r3, [r7, #4] + 800a31c: 693a ldr r2, [r7, #16] + 800a31e: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; - 800a098: 687b ldr r3, [r7, #4] - 800a09a: 68fa ldr r2, [r7, #12] - 800a09c: 61da str r2, [r3, #28] + 800a320: 687b ldr r3, [r7, #4] + 800a322: 68fa ldr r2, [r7, #12] + 800a324: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; - 800a09e: 683b ldr r3, [r7, #0] - 800a0a0: 685a ldr r2, [r3, #4] - 800a0a2: 687b ldr r3, [r7, #4] - 800a0a4: 63da str r2, [r3, #60] ; 0x3c + 800a326: 683b ldr r3, [r7, #0] + 800a328: 685a ldr r2, [r3, #4] + 800a32a: 687b ldr r3, [r7, #4] + 800a32c: 63da str r2, [r3, #60] ; 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 800a0a6: 687b ldr r3, [r7, #4] - 800a0a8: 697a ldr r2, [r7, #20] - 800a0aa: 621a str r2, [r3, #32] + 800a32e: 687b ldr r3, [r7, #4] + 800a330: 697a ldr r2, [r7, #20] + 800a332: 621a str r2, [r3, #32] } - 800a0ac: 46c0 nop ; (mov r8, r8) - 800a0ae: 46bd mov sp, r7 - 800a0b0: b006 add sp, #24 - 800a0b2: bd80 pop {r7, pc} - 800a0b4: fffffeff .word 0xfffffeff - 800a0b8: fffeff8f .word 0xfffeff8f - 800a0bc: fffffdff .word 0xfffffdff - 800a0c0: 40012c00 .word 0x40012c00 - 800a0c4: fffff7ff .word 0xfffff7ff - 800a0c8: fffffbff .word 0xfffffbff - 800a0cc: 40014000 .word 0x40014000 - 800a0d0: 40014400 .word 0x40014400 - 800a0d4: 40014800 .word 0x40014800 - 800a0d8: ffffefff .word 0xffffefff - 800a0dc: ffffdfff .word 0xffffdfff + 800a334: 46c0 nop ; (mov r8, r8) + 800a336: 46bd mov sp, r7 + 800a338: b006 add sp, #24 + 800a33a: bd80 pop {r7, pc} + 800a33c: fffffeff .word 0xfffffeff + 800a340: fffeff8f .word 0xfffeff8f + 800a344: fffffdff .word 0xfffffdff + 800a348: 40012c00 .word 0x40012c00 + 800a34c: fffff7ff .word 0xfffff7ff + 800a350: fffffbff .word 0xfffffbff + 800a354: 40014000 .word 0x40014000 + 800a358: 40014400 .word 0x40014400 + 800a35c: 40014800 .word 0x40014800 + 800a360: ffffefff .word 0xffffefff + 800a364: ffffdfff .word 0xffffdfff -0800a0e0 : +0800a368 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 800a0e0: b580 push {r7, lr} - 800a0e2: b086 sub sp, #24 - 800a0e4: af00 add r7, sp, #0 - 800a0e6: 6078 str r0, [r7, #4] - 800a0e8: 6039 str r1, [r7, #0] + 800a368: b580 push {r7, lr} + 800a36a: b086 sub sp, #24 + 800a36c: af00 add r7, sp, #0 + 800a36e: 6078 str r0, [r7, #4] + 800a370: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; - 800a0ea: 687b ldr r3, [r7, #4] - 800a0ec: 6a1b ldr r3, [r3, #32] - 800a0ee: 4a28 ldr r2, [pc, #160] ; (800a190 ) - 800a0f0: 401a ands r2, r3 - 800a0f2: 687b ldr r3, [r7, #4] - 800a0f4: 621a str r2, [r3, #32] + 800a372: 687b ldr r3, [r7, #4] + 800a374: 6a1b ldr r3, [r3, #32] + 800a376: 4a28 ldr r2, [pc, #160] ; (800a418 ) + 800a378: 401a ands r2, r3 + 800a37a: 687b ldr r3, [r7, #4] + 800a37c: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; - 800a0f6: 687b ldr r3, [r7, #4] - 800a0f8: 6a1b ldr r3, [r3, #32] - 800a0fa: 613b str r3, [r7, #16] + 800a37e: 687b ldr r3, [r7, #4] + 800a380: 6a1b ldr r3, [r3, #32] + 800a382: 613b str r3, [r7, #16] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; - 800a0fc: 687b ldr r3, [r7, #4] - 800a0fe: 685b ldr r3, [r3, #4] - 800a100: 617b str r3, [r7, #20] + 800a384: 687b ldr r3, [r7, #4] + 800a386: 685b ldr r3, [r3, #4] + 800a388: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; - 800a102: 687b ldr r3, [r7, #4] - 800a104: 69db ldr r3, [r3, #28] - 800a106: 60fb str r3, [r7, #12] + 800a38a: 687b ldr r3, [r7, #4] + 800a38c: 69db ldr r3, [r3, #28] + 800a38e: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; - 800a108: 68fb ldr r3, [r7, #12] - 800a10a: 4a22 ldr r2, [pc, #136] ; (800a194 ) - 800a10c: 4013 ands r3, r2 - 800a10e: 60fb str r3, [r7, #12] + 800a390: 68fb ldr r3, [r7, #12] + 800a392: 4a22 ldr r2, [pc, #136] ; (800a41c ) + 800a394: 4013 ands r3, r2 + 800a396: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; - 800a110: 68fb ldr r3, [r7, #12] - 800a112: 4a21 ldr r2, [pc, #132] ; (800a198 ) - 800a114: 4013 ands r3, r2 - 800a116: 60fb str r3, [r7, #12] + 800a398: 68fb ldr r3, [r7, #12] + 800a39a: 4a21 ldr r2, [pc, #132] ; (800a420 ) + 800a39c: 4013 ands r3, r2 + 800a39e: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); - 800a118: 683b ldr r3, [r7, #0] - 800a11a: 681b ldr r3, [r3, #0] - 800a11c: 021b lsls r3, r3, #8 - 800a11e: 68fa ldr r2, [r7, #12] - 800a120: 4313 orrs r3, r2 - 800a122: 60fb str r3, [r7, #12] + 800a3a0: 683b ldr r3, [r7, #0] + 800a3a2: 681b ldr r3, [r3, #0] + 800a3a4: 021b lsls r3, r3, #8 + 800a3a6: 68fa ldr r2, [r7, #12] + 800a3a8: 4313 orrs r3, r2 + 800a3aa: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; - 800a124: 693b ldr r3, [r7, #16] - 800a126: 4a1d ldr r2, [pc, #116] ; (800a19c ) - 800a128: 4013 ands r3, r2 - 800a12a: 613b str r3, [r7, #16] + 800a3ac: 693b ldr r3, [r7, #16] + 800a3ae: 4a1d ldr r2, [pc, #116] ; (800a424 ) + 800a3b0: 4013 ands r3, r2 + 800a3b2: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); - 800a12c: 683b ldr r3, [r7, #0] - 800a12e: 689b ldr r3, [r3, #8] - 800a130: 031b lsls r3, r3, #12 - 800a132: 693a ldr r2, [r7, #16] - 800a134: 4313 orrs r3, r2 - 800a136: 613b str r3, [r7, #16] + 800a3b4: 683b ldr r3, [r7, #0] + 800a3b6: 689b ldr r3, [r3, #8] + 800a3b8: 031b lsls r3, r3, #12 + 800a3ba: 693a ldr r2, [r7, #16] + 800a3bc: 4313 orrs r3, r2 + 800a3be: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800a138: 687b ldr r3, [r7, #4] - 800a13a: 4a19 ldr r2, [pc, #100] ; (800a1a0 ) - 800a13c: 4293 cmp r3, r2 - 800a13e: d00b beq.n 800a158 - 800a140: 687b ldr r3, [r7, #4] - 800a142: 4a18 ldr r2, [pc, #96] ; (800a1a4 ) - 800a144: 4293 cmp r3, r2 - 800a146: d007 beq.n 800a158 - 800a148: 687b ldr r3, [r7, #4] - 800a14a: 4a17 ldr r2, [pc, #92] ; (800a1a8 ) - 800a14c: 4293 cmp r3, r2 - 800a14e: d003 beq.n 800a158 - 800a150: 687b ldr r3, [r7, #4] - 800a152: 4a16 ldr r2, [pc, #88] ; (800a1ac ) - 800a154: 4293 cmp r3, r2 - 800a156: d109 bne.n 800a16c + 800a3c0: 687b ldr r3, [r7, #4] + 800a3c2: 4a19 ldr r2, [pc, #100] ; (800a428 ) + 800a3c4: 4293 cmp r3, r2 + 800a3c6: d00b beq.n 800a3e0 + 800a3c8: 687b ldr r3, [r7, #4] + 800a3ca: 4a18 ldr r2, [pc, #96] ; (800a42c ) + 800a3cc: 4293 cmp r3, r2 + 800a3ce: d007 beq.n 800a3e0 + 800a3d0: 687b ldr r3, [r7, #4] + 800a3d2: 4a17 ldr r2, [pc, #92] ; (800a430 ) + 800a3d4: 4293 cmp r3, r2 + 800a3d6: d003 beq.n 800a3e0 + 800a3d8: 687b ldr r3, [r7, #4] + 800a3da: 4a16 ldr r2, [pc, #88] ; (800a434 ) + 800a3dc: 4293 cmp r3, r2 + 800a3de: d109 bne.n 800a3f4 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; - 800a158: 697b ldr r3, [r7, #20] - 800a15a: 4a15 ldr r2, [pc, #84] ; (800a1b0 ) - 800a15c: 4013 ands r3, r2 - 800a15e: 617b str r3, [r7, #20] + 800a3e0: 697b ldr r3, [r7, #20] + 800a3e2: 4a15 ldr r2, [pc, #84] ; (800a438 ) + 800a3e4: 4013 ands r3, r2 + 800a3e6: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); - 800a160: 683b ldr r3, [r7, #0] - 800a162: 695b ldr r3, [r3, #20] - 800a164: 019b lsls r3, r3, #6 - 800a166: 697a ldr r2, [r7, #20] - 800a168: 4313 orrs r3, r2 - 800a16a: 617b str r3, [r7, #20] + 800a3e8: 683b ldr r3, [r7, #0] + 800a3ea: 695b ldr r3, [r3, #20] + 800a3ec: 019b lsls r3, r3, #6 + 800a3ee: 697a ldr r2, [r7, #20] + 800a3f0: 4313 orrs r3, r2 + 800a3f2: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 800a16c: 687b ldr r3, [r7, #4] - 800a16e: 697a ldr r2, [r7, #20] - 800a170: 605a str r2, [r3, #4] + 800a3f4: 687b ldr r3, [r7, #4] + 800a3f6: 697a ldr r2, [r7, #20] + 800a3f8: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; - 800a172: 687b ldr r3, [r7, #4] - 800a174: 68fa ldr r2, [r7, #12] - 800a176: 61da str r2, [r3, #28] + 800a3fa: 687b ldr r3, [r7, #4] + 800a3fc: 68fa ldr r2, [r7, #12] + 800a3fe: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; - 800a178: 683b ldr r3, [r7, #0] - 800a17a: 685a ldr r2, [r3, #4] - 800a17c: 687b ldr r3, [r7, #4] - 800a17e: 641a str r2, [r3, #64] ; 0x40 + 800a400: 683b ldr r3, [r7, #0] + 800a402: 685a ldr r2, [r3, #4] + 800a404: 687b ldr r3, [r7, #4] + 800a406: 641a str r2, [r3, #64] ; 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 800a180: 687b ldr r3, [r7, #4] - 800a182: 693a ldr r2, [r7, #16] - 800a184: 621a str r2, [r3, #32] + 800a408: 687b ldr r3, [r7, #4] + 800a40a: 693a ldr r2, [r7, #16] + 800a40c: 621a str r2, [r3, #32] } - 800a186: 46c0 nop ; (mov r8, r8) - 800a188: 46bd mov sp, r7 - 800a18a: b006 add sp, #24 - 800a18c: bd80 pop {r7, pc} - 800a18e: 46c0 nop ; (mov r8, r8) - 800a190: ffffefff .word 0xffffefff - 800a194: feff8fff .word 0xfeff8fff - 800a198: fffffcff .word 0xfffffcff - 800a19c: ffffdfff .word 0xffffdfff - 800a1a0: 40012c00 .word 0x40012c00 - 800a1a4: 40014000 .word 0x40014000 - 800a1a8: 40014400 .word 0x40014400 - 800a1ac: 40014800 .word 0x40014800 - 800a1b0: ffffbfff .word 0xffffbfff + 800a40e: 46c0 nop ; (mov r8, r8) + 800a410: 46bd mov sp, r7 + 800a412: b006 add sp, #24 + 800a414: bd80 pop {r7, pc} + 800a416: 46c0 nop ; (mov r8, r8) + 800a418: ffffefff .word 0xffffefff + 800a41c: feff8fff .word 0xfeff8fff + 800a420: fffffcff .word 0xfffffcff + 800a424: ffffdfff .word 0xffffdfff + 800a428: 40012c00 .word 0x40012c00 + 800a42c: 40014000 .word 0x40014000 + 800a430: 40014400 .word 0x40014400 + 800a434: 40014800 .word 0x40014800 + 800a438: ffffbfff .word 0xffffbfff -0800a1b4 : +0800a43c : * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 800a1b4: b580 push {r7, lr} - 800a1b6: b086 sub sp, #24 - 800a1b8: af00 add r7, sp, #0 - 800a1ba: 6078 str r0, [r7, #4] - 800a1bc: 6039 str r1, [r7, #0] + 800a43c: b580 push {r7, lr} + 800a43e: b086 sub sp, #24 + 800a440: af00 add r7, sp, #0 + 800a442: 6078 str r0, [r7, #4] + 800a444: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the output: Reset the CCxE Bit */ TIMx->CCER &= ~TIM_CCER_CC5E; - 800a1be: 687b ldr r3, [r7, #4] - 800a1c0: 6a1b ldr r3, [r3, #32] - 800a1c2: 4a25 ldr r2, [pc, #148] ; (800a258 ) - 800a1c4: 401a ands r2, r3 - 800a1c6: 687b ldr r3, [r7, #4] - 800a1c8: 621a str r2, [r3, #32] + 800a446: 687b ldr r3, [r7, #4] + 800a448: 6a1b ldr r3, [r3, #32] + 800a44a: 4a25 ldr r2, [pc, #148] ; (800a4e0 ) + 800a44c: 401a ands r2, r3 + 800a44e: 687b ldr r3, [r7, #4] + 800a450: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; - 800a1ca: 687b ldr r3, [r7, #4] - 800a1cc: 6a1b ldr r3, [r3, #32] - 800a1ce: 613b str r3, [r7, #16] + 800a452: 687b ldr r3, [r7, #4] + 800a454: 6a1b ldr r3, [r3, #32] + 800a456: 613b str r3, [r7, #16] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; - 800a1d0: 687b ldr r3, [r7, #4] - 800a1d2: 685b ldr r3, [r3, #4] - 800a1d4: 617b str r3, [r7, #20] + 800a458: 687b ldr r3, [r7, #4] + 800a45a: 685b ldr r3, [r3, #4] + 800a45c: 617b str r3, [r7, #20] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR3; - 800a1d6: 687b ldr r3, [r7, #4] - 800a1d8: 6d5b ldr r3, [r3, #84] ; 0x54 - 800a1da: 60fb str r3, [r7, #12] + 800a45e: 687b ldr r3, [r7, #4] + 800a460: 6d5b ldr r3, [r3, #84] ; 0x54 + 800a462: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~(TIM_CCMR3_OC5M); - 800a1dc: 68fb ldr r3, [r7, #12] - 800a1de: 4a1f ldr r2, [pc, #124] ; (800a25c ) - 800a1e0: 4013 ands r3, r2 - 800a1e2: 60fb str r3, [r7, #12] + 800a464: 68fb ldr r3, [r7, #12] + 800a466: 4a1f ldr r2, [pc, #124] ; (800a4e4 ) + 800a468: 4013 ands r3, r2 + 800a46a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; - 800a1e4: 683b ldr r3, [r7, #0] - 800a1e6: 681b ldr r3, [r3, #0] - 800a1e8: 68fa ldr r2, [r7, #12] - 800a1ea: 4313 orrs r3, r2 - 800a1ec: 60fb str r3, [r7, #12] + 800a46c: 683b ldr r3, [r7, #0] + 800a46e: 681b ldr r3, [r3, #0] + 800a470: 68fa ldr r2, [r7, #12] + 800a472: 4313 orrs r3, r2 + 800a474: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC5P; - 800a1ee: 693b ldr r3, [r7, #16] - 800a1f0: 4a1b ldr r2, [pc, #108] ; (800a260 ) - 800a1f2: 4013 ands r3, r2 - 800a1f4: 613b str r3, [r7, #16] + 800a476: 693b ldr r3, [r7, #16] + 800a478: 4a1b ldr r2, [pc, #108] ; (800a4e8 ) + 800a47a: 4013 ands r3, r2 + 800a47c: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 16U); - 800a1f6: 683b ldr r3, [r7, #0] - 800a1f8: 689b ldr r3, [r3, #8] - 800a1fa: 041b lsls r3, r3, #16 - 800a1fc: 693a ldr r2, [r7, #16] - 800a1fe: 4313 orrs r3, r2 - 800a200: 613b str r3, [r7, #16] + 800a47e: 683b ldr r3, [r7, #0] + 800a480: 689b ldr r3, [r3, #8] + 800a482: 041b lsls r3, r3, #16 + 800a484: 693a ldr r2, [r7, #16] + 800a486: 4313 orrs r3, r2 + 800a488: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800a202: 687b ldr r3, [r7, #4] - 800a204: 4a17 ldr r2, [pc, #92] ; (800a264 ) - 800a206: 4293 cmp r3, r2 - 800a208: d00b beq.n 800a222 - 800a20a: 687b ldr r3, [r7, #4] - 800a20c: 4a16 ldr r2, [pc, #88] ; (800a268 ) - 800a20e: 4293 cmp r3, r2 - 800a210: d007 beq.n 800a222 - 800a212: 687b ldr r3, [r7, #4] - 800a214: 4a15 ldr r2, [pc, #84] ; (800a26c ) - 800a216: 4293 cmp r3, r2 - 800a218: d003 beq.n 800a222 - 800a21a: 687b ldr r3, [r7, #4] - 800a21c: 4a14 ldr r2, [pc, #80] ; (800a270 ) - 800a21e: 4293 cmp r3, r2 - 800a220: d109 bne.n 800a236 + 800a48a: 687b ldr r3, [r7, #4] + 800a48c: 4a17 ldr r2, [pc, #92] ; (800a4ec ) + 800a48e: 4293 cmp r3, r2 + 800a490: d00b beq.n 800a4aa + 800a492: 687b ldr r3, [r7, #4] + 800a494: 4a16 ldr r2, [pc, #88] ; (800a4f0 ) + 800a496: 4293 cmp r3, r2 + 800a498: d007 beq.n 800a4aa + 800a49a: 687b ldr r3, [r7, #4] + 800a49c: 4a15 ldr r2, [pc, #84] ; (800a4f4 ) + 800a49e: 4293 cmp r3, r2 + 800a4a0: d003 beq.n 800a4aa + 800a4a2: 687b ldr r3, [r7, #4] + 800a4a4: 4a14 ldr r2, [pc, #80] ; (800a4f8 ) + 800a4a6: 4293 cmp r3, r2 + 800a4a8: d109 bne.n 800a4be { /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS5; - 800a222: 697b ldr r3, [r7, #20] - 800a224: 4a0c ldr r2, [pc, #48] ; (800a258 ) - 800a226: 4013 ands r3, r2 - 800a228: 617b str r3, [r7, #20] + 800a4aa: 697b ldr r3, [r7, #20] + 800a4ac: 4a0c ldr r2, [pc, #48] ; (800a4e0 ) + 800a4ae: 4013 ands r3, r2 + 800a4b0: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 8U); - 800a22a: 683b ldr r3, [r7, #0] - 800a22c: 695b ldr r3, [r3, #20] - 800a22e: 021b lsls r3, r3, #8 - 800a230: 697a ldr r2, [r7, #20] - 800a232: 4313 orrs r3, r2 - 800a234: 617b str r3, [r7, #20] + 800a4b2: 683b ldr r3, [r7, #0] + 800a4b4: 695b ldr r3, [r3, #20] + 800a4b6: 021b lsls r3, r3, #8 + 800a4b8: 697a ldr r2, [r7, #20] + 800a4ba: 4313 orrs r3, r2 + 800a4bc: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 800a236: 687b ldr r3, [r7, #4] - 800a238: 697a ldr r2, [r7, #20] - 800a23a: 605a str r2, [r3, #4] + 800a4be: 687b ldr r3, [r7, #4] + 800a4c0: 697a ldr r2, [r7, #20] + 800a4c2: 605a str r2, [r3, #4] /* Write to TIMx CCMR3 */ TIMx->CCMR3 = tmpccmrx; - 800a23c: 687b ldr r3, [r7, #4] - 800a23e: 68fa ldr r2, [r7, #12] - 800a240: 655a str r2, [r3, #84] ; 0x54 + 800a4c4: 687b ldr r3, [r7, #4] + 800a4c6: 68fa ldr r2, [r7, #12] + 800a4c8: 655a str r2, [r3, #84] ; 0x54 /* Set the Capture Compare Register value */ TIMx->CCR5 = OC_Config->Pulse; - 800a242: 683b ldr r3, [r7, #0] - 800a244: 685a ldr r2, [r3, #4] - 800a246: 687b ldr r3, [r7, #4] - 800a248: 659a str r2, [r3, #88] ; 0x58 + 800a4ca: 683b ldr r3, [r7, #0] + 800a4cc: 685a ldr r2, [r3, #4] + 800a4ce: 687b ldr r3, [r7, #4] + 800a4d0: 659a str r2, [r3, #88] ; 0x58 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 800a24a: 687b ldr r3, [r7, #4] - 800a24c: 693a ldr r2, [r7, #16] - 800a24e: 621a str r2, [r3, #32] + 800a4d2: 687b ldr r3, [r7, #4] + 800a4d4: 693a ldr r2, [r7, #16] + 800a4d6: 621a str r2, [r3, #32] } - 800a250: 46c0 nop ; (mov r8, r8) - 800a252: 46bd mov sp, r7 - 800a254: b006 add sp, #24 - 800a256: bd80 pop {r7, pc} - 800a258: fffeffff .word 0xfffeffff - 800a25c: fffeff8f .word 0xfffeff8f - 800a260: fffdffff .word 0xfffdffff - 800a264: 40012c00 .word 0x40012c00 - 800a268: 40014000 .word 0x40014000 - 800a26c: 40014400 .word 0x40014400 - 800a270: 40014800 .word 0x40014800 + 800a4d8: 46c0 nop ; (mov r8, r8) + 800a4da: 46bd mov sp, r7 + 800a4dc: b006 add sp, #24 + 800a4de: bd80 pop {r7, pc} + 800a4e0: fffeffff .word 0xfffeffff + 800a4e4: fffeff8f .word 0xfffeff8f + 800a4e8: fffdffff .word 0xfffdffff + 800a4ec: 40012c00 .word 0x40012c00 + 800a4f0: 40014000 .word 0x40014000 + 800a4f4: 40014400 .word 0x40014400 + 800a4f8: 40014800 .word 0x40014800 -0800a274 : +0800a4fc : * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { - 800a274: b580 push {r7, lr} - 800a276: b086 sub sp, #24 - 800a278: af00 add r7, sp, #0 - 800a27a: 6078 str r0, [r7, #4] - 800a27c: 6039 str r1, [r7, #0] + 800a4fc: b580 push {r7, lr} + 800a4fe: b086 sub sp, #24 + 800a500: af00 add r7, sp, #0 + 800a502: 6078 str r0, [r7, #4] + 800a504: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the output: Reset the CCxE Bit */ TIMx->CCER &= ~TIM_CCER_CC6E; - 800a27e: 687b ldr r3, [r7, #4] - 800a280: 6a1b ldr r3, [r3, #32] - 800a282: 4a26 ldr r2, [pc, #152] ; (800a31c ) - 800a284: 401a ands r2, r3 - 800a286: 687b ldr r3, [r7, #4] - 800a288: 621a str r2, [r3, #32] + 800a506: 687b ldr r3, [r7, #4] + 800a508: 6a1b ldr r3, [r3, #32] + 800a50a: 4a26 ldr r2, [pc, #152] ; (800a5a4 ) + 800a50c: 401a ands r2, r3 + 800a50e: 687b ldr r3, [r7, #4] + 800a510: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; - 800a28a: 687b ldr r3, [r7, #4] - 800a28c: 6a1b ldr r3, [r3, #32] - 800a28e: 613b str r3, [r7, #16] + 800a512: 687b ldr r3, [r7, #4] + 800a514: 6a1b ldr r3, [r3, #32] + 800a516: 613b str r3, [r7, #16] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; - 800a290: 687b ldr r3, [r7, #4] - 800a292: 685b ldr r3, [r3, #4] - 800a294: 617b str r3, [r7, #20] + 800a518: 687b ldr r3, [r7, #4] + 800a51a: 685b ldr r3, [r3, #4] + 800a51c: 617b str r3, [r7, #20] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR3; - 800a296: 687b ldr r3, [r7, #4] - 800a298: 6d5b ldr r3, [r3, #84] ; 0x54 - 800a29a: 60fb str r3, [r7, #12] + 800a51e: 687b ldr r3, [r7, #4] + 800a520: 6d5b ldr r3, [r3, #84] ; 0x54 + 800a522: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~(TIM_CCMR3_OC6M); - 800a29c: 68fb ldr r3, [r7, #12] - 800a29e: 4a20 ldr r2, [pc, #128] ; (800a320 ) - 800a2a0: 4013 ands r3, r2 - 800a2a2: 60fb str r3, [r7, #12] + 800a524: 68fb ldr r3, [r7, #12] + 800a526: 4a20 ldr r2, [pc, #128] ; (800a5a8 ) + 800a528: 4013 ands r3, r2 + 800a52a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); - 800a2a4: 683b ldr r3, [r7, #0] - 800a2a6: 681b ldr r3, [r3, #0] - 800a2a8: 021b lsls r3, r3, #8 - 800a2aa: 68fa ldr r2, [r7, #12] - 800a2ac: 4313 orrs r3, r2 - 800a2ae: 60fb str r3, [r7, #12] + 800a52c: 683b ldr r3, [r7, #0] + 800a52e: 681b ldr r3, [r3, #0] + 800a530: 021b lsls r3, r3, #8 + 800a532: 68fa ldr r2, [r7, #12] + 800a534: 4313 orrs r3, r2 + 800a536: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= (uint32_t)~TIM_CCER_CC6P; - 800a2b0: 693b ldr r3, [r7, #16] - 800a2b2: 4a1c ldr r2, [pc, #112] ; (800a324 ) - 800a2b4: 4013 ands r3, r2 - 800a2b6: 613b str r3, [r7, #16] + 800a538: 693b ldr r3, [r7, #16] + 800a53a: 4a1c ldr r2, [pc, #112] ; (800a5ac ) + 800a53c: 4013 ands r3, r2 + 800a53e: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 20U); - 800a2b8: 683b ldr r3, [r7, #0] - 800a2ba: 689b ldr r3, [r3, #8] - 800a2bc: 051b lsls r3, r3, #20 - 800a2be: 693a ldr r2, [r7, #16] - 800a2c0: 4313 orrs r3, r2 - 800a2c2: 613b str r3, [r7, #16] + 800a540: 683b ldr r3, [r7, #0] + 800a542: 689b ldr r3, [r3, #8] + 800a544: 051b lsls r3, r3, #20 + 800a546: 693a ldr r2, [r7, #16] + 800a548: 4313 orrs r3, r2 + 800a54a: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) - 800a2c4: 687b ldr r3, [r7, #4] - 800a2c6: 4a18 ldr r2, [pc, #96] ; (800a328 ) - 800a2c8: 4293 cmp r3, r2 - 800a2ca: d00b beq.n 800a2e4 - 800a2cc: 687b ldr r3, [r7, #4] - 800a2ce: 4a17 ldr r2, [pc, #92] ; (800a32c ) - 800a2d0: 4293 cmp r3, r2 - 800a2d2: d007 beq.n 800a2e4 - 800a2d4: 687b ldr r3, [r7, #4] - 800a2d6: 4a16 ldr r2, [pc, #88] ; (800a330 ) - 800a2d8: 4293 cmp r3, r2 - 800a2da: d003 beq.n 800a2e4 - 800a2dc: 687b ldr r3, [r7, #4] - 800a2de: 4a15 ldr r2, [pc, #84] ; (800a334 ) - 800a2e0: 4293 cmp r3, r2 - 800a2e2: d109 bne.n 800a2f8 + 800a54c: 687b ldr r3, [r7, #4] + 800a54e: 4a18 ldr r2, [pc, #96] ; (800a5b0 ) + 800a550: 4293 cmp r3, r2 + 800a552: d00b beq.n 800a56c + 800a554: 687b ldr r3, [r7, #4] + 800a556: 4a17 ldr r2, [pc, #92] ; (800a5b4 ) + 800a558: 4293 cmp r3, r2 + 800a55a: d007 beq.n 800a56c + 800a55c: 687b ldr r3, [r7, #4] + 800a55e: 4a16 ldr r2, [pc, #88] ; (800a5b8 ) + 800a560: 4293 cmp r3, r2 + 800a562: d003 beq.n 800a56c + 800a564: 687b ldr r3, [r7, #4] + 800a566: 4a15 ldr r2, [pc, #84] ; (800a5bc ) + 800a568: 4293 cmp r3, r2 + 800a56a: d109 bne.n 800a580 { /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS6; - 800a2e4: 697b ldr r3, [r7, #20] - 800a2e6: 4a14 ldr r2, [pc, #80] ; (800a338 ) - 800a2e8: 4013 ands r3, r2 - 800a2ea: 617b str r3, [r7, #20] + 800a56c: 697b ldr r3, [r7, #20] + 800a56e: 4a14 ldr r2, [pc, #80] ; (800a5c0 ) + 800a570: 4013 ands r3, r2 + 800a572: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 10U); - 800a2ec: 683b ldr r3, [r7, #0] - 800a2ee: 695b ldr r3, [r3, #20] - 800a2f0: 029b lsls r3, r3, #10 - 800a2f2: 697a ldr r2, [r7, #20] - 800a2f4: 4313 orrs r3, r2 - 800a2f6: 617b str r3, [r7, #20] + 800a574: 683b ldr r3, [r7, #0] + 800a576: 695b ldr r3, [r3, #20] + 800a578: 029b lsls r3, r3, #10 + 800a57a: 697a ldr r2, [r7, #20] + 800a57c: 4313 orrs r3, r2 + 800a57e: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; - 800a2f8: 687b ldr r3, [r7, #4] - 800a2fa: 697a ldr r2, [r7, #20] - 800a2fc: 605a str r2, [r3, #4] + 800a580: 687b ldr r3, [r7, #4] + 800a582: 697a ldr r2, [r7, #20] + 800a584: 605a str r2, [r3, #4] /* Write to TIMx CCMR3 */ TIMx->CCMR3 = tmpccmrx; - 800a2fe: 687b ldr r3, [r7, #4] - 800a300: 68fa ldr r2, [r7, #12] - 800a302: 655a str r2, [r3, #84] ; 0x54 + 800a586: 687b ldr r3, [r7, #4] + 800a588: 68fa ldr r2, [r7, #12] + 800a58a: 655a str r2, [r3, #84] ; 0x54 /* Set the Capture Compare Register value */ TIMx->CCR6 = OC_Config->Pulse; - 800a304: 683b ldr r3, [r7, #0] - 800a306: 685a ldr r2, [r3, #4] - 800a308: 687b ldr r3, [r7, #4] - 800a30a: 65da str r2, [r3, #92] ; 0x5c + 800a58c: 683b ldr r3, [r7, #0] + 800a58e: 685a ldr r2, [r3, #4] + 800a590: 687b ldr r3, [r7, #4] + 800a592: 65da str r2, [r3, #92] ; 0x5c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; - 800a30c: 687b ldr r3, [r7, #4] - 800a30e: 693a ldr r2, [r7, #16] - 800a310: 621a str r2, [r3, #32] + 800a594: 687b ldr r3, [r7, #4] + 800a596: 693a ldr r2, [r7, #16] + 800a598: 621a str r2, [r3, #32] } - 800a312: 46c0 nop ; (mov r8, r8) - 800a314: 46bd mov sp, r7 - 800a316: b006 add sp, #24 - 800a318: bd80 pop {r7, pc} - 800a31a: 46c0 nop ; (mov r8, r8) - 800a31c: ffefffff .word 0xffefffff - 800a320: feff8fff .word 0xfeff8fff - 800a324: ffdfffff .word 0xffdfffff - 800a328: 40012c00 .word 0x40012c00 - 800a32c: 40014000 .word 0x40014000 - 800a330: 40014400 .word 0x40014400 - 800a334: 40014800 .word 0x40014800 - 800a338: fffbffff .word 0xfffbffff + 800a59a: 46c0 nop ; (mov r8, r8) + 800a59c: 46bd mov sp, r7 + 800a59e: b006 add sp, #24 + 800a5a0: bd80 pop {r7, pc} + 800a5a2: 46c0 nop ; (mov r8, r8) + 800a5a4: ffefffff .word 0xffefffff + 800a5a8: feff8fff .word 0xfeff8fff + 800a5ac: ffdfffff .word 0xffdfffff + 800a5b0: 40012c00 .word 0x40012c00 + 800a5b4: 40014000 .word 0x40014000 + 800a5b8: 40014400 .word 0x40014400 + 800a5bc: 40014800 .word 0x40014800 + 800a5c0: fffbffff .word 0xfffbffff -0800a33c : +0800a5c4 : * @param sSlaveConfig Slave timer configuration * @retval None */ static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig) { - 800a33c: b580 push {r7, lr} - 800a33e: b086 sub sp, #24 - 800a340: af00 add r7, sp, #0 - 800a342: 6078 str r0, [r7, #4] - 800a344: 6039 str r1, [r7, #0] + 800a5c4: b580 push {r7, lr} + 800a5c6: b086 sub sp, #24 + 800a5c8: af00 add r7, sp, #0 + 800a5ca: 6078 str r0, [r7, #4] + 800a5cc: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 800a346: 2317 movs r3, #23 - 800a348: 18fb adds r3, r7, r3 - 800a34a: 2200 movs r2, #0 - 800a34c: 701a strb r2, [r3, #0] + 800a5ce: 2317 movs r3, #23 + 800a5d0: 18fb adds r3, r7, r3 + 800a5d2: 2200 movs r2, #0 + 800a5d4: 701a strb r2, [r3, #0] uint32_t tmpsmcr; uint32_t tmpccmr1; uint32_t tmpccer; /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 800a34e: 687b ldr r3, [r7, #4] - 800a350: 681b ldr r3, [r3, #0] - 800a352: 689b ldr r3, [r3, #8] - 800a354: 613b str r3, [r7, #16] + 800a5d6: 687b ldr r3, [r7, #4] + 800a5d8: 681b ldr r3, [r3, #0] + 800a5da: 689b ldr r3, [r3, #8] + 800a5dc: 613b str r3, [r7, #16] /* Reset the Trigger Selection Bits */ tmpsmcr &= ~TIM_SMCR_TS; - 800a356: 693b ldr r3, [r7, #16] - 800a358: 4a41 ldr r2, [pc, #260] ; (800a460 ) - 800a35a: 4013 ands r3, r2 - 800a35c: 613b str r3, [r7, #16] + 800a5de: 693b ldr r3, [r7, #16] + 800a5e0: 4a41 ldr r2, [pc, #260] ; (800a6e8 ) + 800a5e2: 4013 ands r3, r2 + 800a5e4: 613b str r3, [r7, #16] /* Set the Input Trigger source */ tmpsmcr |= sSlaveConfig->InputTrigger; - 800a35e: 683b ldr r3, [r7, #0] - 800a360: 685b ldr r3, [r3, #4] - 800a362: 693a ldr r2, [r7, #16] - 800a364: 4313 orrs r3, r2 - 800a366: 613b str r3, [r7, #16] + 800a5e6: 683b ldr r3, [r7, #0] + 800a5e8: 685b ldr r3, [r3, #4] + 800a5ea: 693a ldr r2, [r7, #16] + 800a5ec: 4313 orrs r3, r2 + 800a5ee: 613b str r3, [r7, #16] /* Reset the slave mode Bits */ tmpsmcr &= ~TIM_SMCR_SMS; - 800a368: 693b ldr r3, [r7, #16] - 800a36a: 4a3e ldr r2, [pc, #248] ; (800a464 ) - 800a36c: 4013 ands r3, r2 - 800a36e: 613b str r3, [r7, #16] + 800a5f0: 693b ldr r3, [r7, #16] + 800a5f2: 4a3e ldr r2, [pc, #248] ; (800a6ec ) + 800a5f4: 4013 ands r3, r2 + 800a5f6: 613b str r3, [r7, #16] /* Set the slave mode */ tmpsmcr |= sSlaveConfig->SlaveMode; - 800a370: 683b ldr r3, [r7, #0] - 800a372: 681b ldr r3, [r3, #0] - 800a374: 693a ldr r2, [r7, #16] - 800a376: 4313 orrs r3, r2 - 800a378: 613b str r3, [r7, #16] + 800a5f8: 683b ldr r3, [r7, #0] + 800a5fa: 681b ldr r3, [r3, #0] + 800a5fc: 693a ldr r2, [r7, #16] + 800a5fe: 4313 orrs r3, r2 + 800a600: 613b str r3, [r7, #16] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 800a37a: 687b ldr r3, [r7, #4] - 800a37c: 681b ldr r3, [r3, #0] - 800a37e: 693a ldr r2, [r7, #16] - 800a380: 609a str r2, [r3, #8] + 800a602: 687b ldr r3, [r7, #4] + 800a604: 681b ldr r3, [r3, #0] + 800a606: 693a ldr r2, [r7, #16] + 800a608: 609a str r2, [r3, #8] /* Configure the trigger prescaler, filter, and polarity */ switch (sSlaveConfig->InputTrigger) - 800a382: 683b ldr r3, [r7, #0] - 800a384: 685b ldr r3, [r3, #4] - 800a386: 2b70 cmp r3, #112 ; 0x70 - 800a388: d015 beq.n 800a3b6 - 800a38a: d900 bls.n 800a38e - 800a38c: e05b b.n 800a446 - 800a38e: 2b60 cmp r3, #96 ; 0x60 - 800a390: d04f beq.n 800a432 - 800a392: d858 bhi.n 800a446 - 800a394: 2b50 cmp r3, #80 ; 0x50 - 800a396: d042 beq.n 800a41e - 800a398: d855 bhi.n 800a446 - 800a39a: 2b40 cmp r3, #64 ; 0x40 - 800a39c: d016 beq.n 800a3cc - 800a39e: d852 bhi.n 800a446 - 800a3a0: 2b30 cmp r3, #48 ; 0x30 - 800a3a2: d055 beq.n 800a450 - 800a3a4: d84f bhi.n 800a446 - 800a3a6: 2b20 cmp r3, #32 - 800a3a8: d052 beq.n 800a450 - 800a3aa: d84c bhi.n 800a446 - 800a3ac: 2b00 cmp r3, #0 - 800a3ae: d04f beq.n 800a450 - 800a3b0: 2b10 cmp r3, #16 - 800a3b2: d04d beq.n 800a450 - 800a3b4: e047 b.n 800a446 + 800a60a: 683b ldr r3, [r7, #0] + 800a60c: 685b ldr r3, [r3, #4] + 800a60e: 2b70 cmp r3, #112 ; 0x70 + 800a610: d015 beq.n 800a63e + 800a612: d900 bls.n 800a616 + 800a614: e05b b.n 800a6ce + 800a616: 2b60 cmp r3, #96 ; 0x60 + 800a618: d04f beq.n 800a6ba + 800a61a: d858 bhi.n 800a6ce + 800a61c: 2b50 cmp r3, #80 ; 0x50 + 800a61e: d042 beq.n 800a6a6 + 800a620: d855 bhi.n 800a6ce + 800a622: 2b40 cmp r3, #64 ; 0x40 + 800a624: d016 beq.n 800a654 + 800a626: d852 bhi.n 800a6ce + 800a628: 2b30 cmp r3, #48 ; 0x30 + 800a62a: d055 beq.n 800a6d8 + 800a62c: d84f bhi.n 800a6ce + 800a62e: 2b20 cmp r3, #32 + 800a630: d052 beq.n 800a6d8 + 800a632: d84c bhi.n 800a6ce + 800a634: 2b00 cmp r3, #0 + 800a636: d04f beq.n 800a6d8 + 800a638: 2b10 cmp r3, #16 + 800a63a: d04d beq.n 800a6d8 + 800a63c: e047 b.n 800a6ce assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); /* Configure the ETR Trigger source */ TIM_ETR_SetConfig(htim->Instance, - 800a3b6: 687b ldr r3, [r7, #4] - 800a3b8: 6818 ldr r0, [r3, #0] - 800a3ba: 683b ldr r3, [r7, #0] - 800a3bc: 68d9 ldr r1, [r3, #12] - 800a3be: 683b ldr r3, [r7, #0] - 800a3c0: 689a ldr r2, [r3, #8] - 800a3c2: 683b ldr r3, [r7, #0] - 800a3c4: 691b ldr r3, [r3, #16] - 800a3c6: f000 f9eb bl 800a7a0 + 800a63e: 687b ldr r3, [r7, #4] + 800a640: 6818 ldr r0, [r3, #0] + 800a642: 683b ldr r3, [r7, #0] + 800a644: 68d9 ldr r1, [r3, #12] + 800a646: 683b ldr r3, [r7, #0] + 800a648: 689a ldr r2, [r3, #8] + 800a64a: 683b ldr r3, [r7, #0] + 800a64c: 691b ldr r3, [r3, #16] + 800a64e: f000 f9eb bl 800aa28 sSlaveConfig->TriggerPrescaler, sSlaveConfig->TriggerPolarity, sSlaveConfig->TriggerFilter); break; - 800a3ca: e042 b.n 800a452 + 800a652: e042 b.n 800a6da { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); if (sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED) - 800a3cc: 683b ldr r3, [r7, #0] - 800a3ce: 681b ldr r3, [r3, #0] - 800a3d0: 2b05 cmp r3, #5 - 800a3d2: d101 bne.n 800a3d8 + 800a654: 683b ldr r3, [r7, #0] + 800a656: 681b ldr r3, [r3, #0] + 800a658: 2b05 cmp r3, #5 + 800a65a: d101 bne.n 800a660 { return HAL_ERROR; - 800a3d4: 2301 movs r3, #1 - 800a3d6: e03f b.n 800a458 + 800a65c: 2301 movs r3, #1 + 800a65e: e03f b.n 800a6e0 } /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = htim->Instance->CCER; - 800a3d8: 687b ldr r3, [r7, #4] - 800a3da: 681b ldr r3, [r3, #0] - 800a3dc: 6a1b ldr r3, [r3, #32] - 800a3de: 60fb str r3, [r7, #12] + 800a660: 687b ldr r3, [r7, #4] + 800a662: 681b ldr r3, [r3, #0] + 800a664: 6a1b ldr r3, [r3, #32] + 800a666: 60fb str r3, [r7, #12] htim->Instance->CCER &= ~TIM_CCER_CC1E; - 800a3e0: 687b ldr r3, [r7, #4] - 800a3e2: 681b ldr r3, [r3, #0] - 800a3e4: 6a1a ldr r2, [r3, #32] - 800a3e6: 687b ldr r3, [r7, #4] - 800a3e8: 681b ldr r3, [r3, #0] - 800a3ea: 2101 movs r1, #1 - 800a3ec: 438a bics r2, r1 - 800a3ee: 621a str r2, [r3, #32] + 800a668: 687b ldr r3, [r7, #4] + 800a66a: 681b ldr r3, [r3, #0] + 800a66c: 6a1a ldr r2, [r3, #32] + 800a66e: 687b ldr r3, [r7, #4] + 800a670: 681b ldr r3, [r3, #0] + 800a672: 2101 movs r1, #1 + 800a674: 438a bics r2, r1 + 800a676: 621a str r2, [r3, #32] tmpccmr1 = htim->Instance->CCMR1; - 800a3f0: 687b ldr r3, [r7, #4] - 800a3f2: 681b ldr r3, [r3, #0] - 800a3f4: 699b ldr r3, [r3, #24] - 800a3f6: 60bb str r3, [r7, #8] + 800a678: 687b ldr r3, [r7, #4] + 800a67a: 681b ldr r3, [r3, #0] + 800a67c: 699b ldr r3, [r3, #24] + 800a67e: 60bb str r3, [r7, #8] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 800a3f8: 68bb ldr r3, [r7, #8] - 800a3fa: 22f0 movs r2, #240 ; 0xf0 - 800a3fc: 4393 bics r3, r2 - 800a3fe: 60bb str r3, [r7, #8] + 800a680: 68bb ldr r3, [r7, #8] + 800a682: 22f0 movs r2, #240 ; 0xf0 + 800a684: 4393 bics r3, r2 + 800a686: 60bb str r3, [r7, #8] tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); - 800a400: 683b ldr r3, [r7, #0] - 800a402: 691b ldr r3, [r3, #16] - 800a404: 011b lsls r3, r3, #4 - 800a406: 68ba ldr r2, [r7, #8] - 800a408: 4313 orrs r3, r2 - 800a40a: 60bb str r3, [r7, #8] + 800a688: 683b ldr r3, [r7, #0] + 800a68a: 691b ldr r3, [r3, #16] + 800a68c: 011b lsls r3, r3, #4 + 800a68e: 68ba ldr r2, [r7, #8] + 800a690: 4313 orrs r3, r2 + 800a692: 60bb str r3, [r7, #8] /* Write to TIMx CCMR1 and CCER registers */ htim->Instance->CCMR1 = tmpccmr1; - 800a40c: 687b ldr r3, [r7, #4] - 800a40e: 681b ldr r3, [r3, #0] - 800a410: 68ba ldr r2, [r7, #8] - 800a412: 619a str r2, [r3, #24] + 800a694: 687b ldr r3, [r7, #4] + 800a696: 681b ldr r3, [r3, #0] + 800a698: 68ba ldr r2, [r7, #8] + 800a69a: 619a str r2, [r3, #24] htim->Instance->CCER = tmpccer; - 800a414: 687b ldr r3, [r7, #4] - 800a416: 681b ldr r3, [r3, #0] - 800a418: 68fa ldr r2, [r7, #12] - 800a41a: 621a str r2, [r3, #32] + 800a69c: 687b ldr r3, [r7, #4] + 800a69e: 681b ldr r3, [r3, #0] + 800a6a0: 68fa ldr r2, [r7, #12] + 800a6a2: 621a str r2, [r3, #32] break; - 800a41c: e019 b.n 800a452 + 800a6a4: e019 b.n 800a6da assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); /* Configure TI1 Filter and Polarity */ TIM_TI1_ConfigInputStage(htim->Instance, - 800a41e: 687b ldr r3, [r7, #4] - 800a420: 6818 ldr r0, [r3, #0] - 800a422: 683b ldr r3, [r7, #0] - 800a424: 6899 ldr r1, [r3, #8] - 800a426: 683b ldr r3, [r7, #0] - 800a428: 691b ldr r3, [r3, #16] - 800a42a: 001a movs r2, r3 - 800a42c: f000 f874 bl 800a518 + 800a6a6: 687b ldr r3, [r7, #4] + 800a6a8: 6818 ldr r0, [r3, #0] + 800a6aa: 683b ldr r3, [r7, #0] + 800a6ac: 6899 ldr r1, [r3, #8] + 800a6ae: 683b ldr r3, [r7, #0] + 800a6b0: 691b ldr r3, [r3, #16] + 800a6b2: 001a movs r2, r3 + 800a6b4: f000 f874 bl 800a7a0 sSlaveConfig->TriggerPolarity, sSlaveConfig->TriggerFilter); break; - 800a430: e00f b.n 800a452 + 800a6b8: e00f b.n 800a6da assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); /* Configure TI2 Filter and Polarity */ TIM_TI2_ConfigInputStage(htim->Instance, - 800a432: 687b ldr r3, [r7, #4] - 800a434: 6818 ldr r0, [r3, #0] - 800a436: 683b ldr r3, [r7, #0] - 800a438: 6899 ldr r1, [r3, #8] - 800a43a: 683b ldr r3, [r7, #0] - 800a43c: 691b ldr r3, [r3, #16] - 800a43e: 001a movs r2, r3 - 800a440: f000 f8da bl 800a5f8 + 800a6ba: 687b ldr r3, [r7, #4] + 800a6bc: 6818 ldr r0, [r3, #0] + 800a6be: 683b ldr r3, [r7, #0] + 800a6c0: 6899 ldr r1, [r3, #8] + 800a6c2: 683b ldr r3, [r7, #0] + 800a6c4: 691b ldr r3, [r3, #16] + 800a6c6: 001a movs r2, r3 + 800a6c8: f000 f8da bl 800a880 sSlaveConfig->TriggerPolarity, sSlaveConfig->TriggerFilter); break; - 800a444: e005 b.n 800a452 + 800a6cc: e005 b.n 800a6da assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); break; } default: status = HAL_ERROR; - 800a446: 2317 movs r3, #23 - 800a448: 18fb adds r3, r7, r3 - 800a44a: 2201 movs r2, #1 - 800a44c: 701a strb r2, [r3, #0] + 800a6ce: 2317 movs r3, #23 + 800a6d0: 18fb adds r3, r7, r3 + 800a6d2: 2201 movs r2, #1 + 800a6d4: 701a strb r2, [r3, #0] break; - 800a44e: e000 b.n 800a452 + 800a6d6: e000 b.n 800a6da break; - 800a450: 46c0 nop ; (mov r8, r8) + 800a6d8: 46c0 nop ; (mov r8, r8) } return status; - 800a452: 2317 movs r3, #23 - 800a454: 18fb adds r3, r7, r3 - 800a456: 781b ldrb r3, [r3, #0] + 800a6da: 2317 movs r3, #23 + 800a6dc: 18fb adds r3, r7, r3 + 800a6de: 781b ldrb r3, [r3, #0] } - 800a458: 0018 movs r0, r3 - 800a45a: 46bd mov sp, r7 - 800a45c: b006 add sp, #24 - 800a45e: bd80 pop {r7, pc} - 800a460: ffcfff8f .word 0xffcfff8f - 800a464: fffefff8 .word 0xfffefff8 + 800a6e0: 0018 movs r0, r3 + 800a6e2: 46bd mov sp, r7 + 800a6e4: b006 add sp, #24 + 800a6e6: bd80 pop {r7, pc} + 800a6e8: ffcfff8f .word 0xffcfff8f + 800a6ec: fffefff8 .word 0xfffefff8 -0800a468 : +0800a6f0 : * (on channel2 path) is used as the input signal. Therefore CCMR1 must be * protected against un-initialized filter and polarity values. */ void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter) { - 800a468: b580 push {r7, lr} - 800a46a: b086 sub sp, #24 - 800a46c: af00 add r7, sp, #0 - 800a46e: 60f8 str r0, [r7, #12] - 800a470: 60b9 str r1, [r7, #8] - 800a472: 607a str r2, [r7, #4] - 800a474: 603b str r3, [r7, #0] + 800a6f0: b580 push {r7, lr} + 800a6f2: b086 sub sp, #24 + 800a6f4: af00 add r7, sp, #0 + 800a6f6: 60f8 str r0, [r7, #12] + 800a6f8: 60b9 str r1, [r7, #8] + 800a6fa: 607a str r2, [r7, #4] + 800a6fc: 603b str r3, [r7, #0] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; - 800a476: 68fb ldr r3, [r7, #12] - 800a478: 6a1b ldr r3, [r3, #32] - 800a47a: 2201 movs r2, #1 - 800a47c: 4393 bics r3, r2 - 800a47e: 001a movs r2, r3 - 800a480: 68fb ldr r3, [r7, #12] - 800a482: 621a str r2, [r3, #32] + 800a6fe: 68fb ldr r3, [r7, #12] + 800a700: 6a1b ldr r3, [r3, #32] + 800a702: 2201 movs r2, #1 + 800a704: 4393 bics r3, r2 + 800a706: 001a movs r2, r3 + 800a708: 68fb ldr r3, [r7, #12] + 800a70a: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 800a484: 68fb ldr r3, [r7, #12] - 800a486: 699b ldr r3, [r3, #24] - 800a488: 617b str r3, [r7, #20] + 800a70c: 68fb ldr r3, [r7, #12] + 800a70e: 699b ldr r3, [r3, #24] + 800a710: 617b str r3, [r7, #20] tmpccer = TIMx->CCER; - 800a48a: 68fb ldr r3, [r7, #12] - 800a48c: 6a1b ldr r3, [r3, #32] - 800a48e: 613b str r3, [r7, #16] + 800a712: 68fb ldr r3, [r7, #12] + 800a714: 6a1b ldr r3, [r3, #32] + 800a716: 613b str r3, [r7, #16] /* Select the Input */ if (IS_TIM_CC2_INSTANCE(TIMx) != RESET) - 800a490: 68fb ldr r3, [r7, #12] - 800a492: 4a1e ldr r2, [pc, #120] ; (800a50c ) - 800a494: 4293 cmp r3, r2 - 800a496: d007 beq.n 800a4a8 - 800a498: 68fb ldr r3, [r7, #12] - 800a49a: 4a1d ldr r2, [pc, #116] ; (800a510 ) - 800a49c: 4293 cmp r3, r2 - 800a49e: d003 beq.n 800a4a8 - 800a4a0: 68fb ldr r3, [r7, #12] - 800a4a2: 4a1c ldr r2, [pc, #112] ; (800a514 ) - 800a4a4: 4293 cmp r3, r2 - 800a4a6: d101 bne.n 800a4ac - 800a4a8: 2301 movs r3, #1 - 800a4aa: e000 b.n 800a4ae - 800a4ac: 2300 movs r3, #0 - 800a4ae: 2b00 cmp r3, #0 - 800a4b0: d008 beq.n 800a4c4 + 800a718: 68fb ldr r3, [r7, #12] + 800a71a: 4a1e ldr r2, [pc, #120] ; (800a794 ) + 800a71c: 4293 cmp r3, r2 + 800a71e: d007 beq.n 800a730 + 800a720: 68fb ldr r3, [r7, #12] + 800a722: 4a1d ldr r2, [pc, #116] ; (800a798 ) + 800a724: 4293 cmp r3, r2 + 800a726: d003 beq.n 800a730 + 800a728: 68fb ldr r3, [r7, #12] + 800a72a: 4a1c ldr r2, [pc, #112] ; (800a79c ) + 800a72c: 4293 cmp r3, r2 + 800a72e: d101 bne.n 800a734 + 800a730: 2301 movs r3, #1 + 800a732: e000 b.n 800a736 + 800a734: 2300 movs r3, #0 + 800a736: 2b00 cmp r3, #0 + 800a738: d008 beq.n 800a74c { tmpccmr1 &= ~TIM_CCMR1_CC1S; - 800a4b2: 697b ldr r3, [r7, #20] - 800a4b4: 2203 movs r2, #3 - 800a4b6: 4393 bics r3, r2 - 800a4b8: 617b str r3, [r7, #20] + 800a73a: 697b ldr r3, [r7, #20] + 800a73c: 2203 movs r2, #3 + 800a73e: 4393 bics r3, r2 + 800a740: 617b str r3, [r7, #20] tmpccmr1 |= TIM_ICSelection; - 800a4ba: 697a ldr r2, [r7, #20] - 800a4bc: 687b ldr r3, [r7, #4] - 800a4be: 4313 orrs r3, r2 - 800a4c0: 617b str r3, [r7, #20] - 800a4c2: e003 b.n 800a4cc + 800a742: 697a ldr r2, [r7, #20] + 800a744: 687b ldr r3, [r7, #4] + 800a746: 4313 orrs r3, r2 + 800a748: 617b str r3, [r7, #20] + 800a74a: e003 b.n 800a754 } else { tmpccmr1 |= TIM_CCMR1_CC1S_0; - 800a4c4: 697b ldr r3, [r7, #20] - 800a4c6: 2201 movs r2, #1 - 800a4c8: 4313 orrs r3, r2 - 800a4ca: 617b str r3, [r7, #20] + 800a74c: 697b ldr r3, [r7, #20] + 800a74e: 2201 movs r2, #1 + 800a750: 4313 orrs r3, r2 + 800a752: 617b str r3, [r7, #20] } /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 800a4cc: 697b ldr r3, [r7, #20] - 800a4ce: 22f0 movs r2, #240 ; 0xf0 - 800a4d0: 4393 bics r3, r2 - 800a4d2: 617b str r3, [r7, #20] + 800a754: 697b ldr r3, [r7, #20] + 800a756: 22f0 movs r2, #240 ; 0xf0 + 800a758: 4393 bics r3, r2 + 800a75a: 617b str r3, [r7, #20] tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); - 800a4d4: 683b ldr r3, [r7, #0] - 800a4d6: 011b lsls r3, r3, #4 - 800a4d8: 22ff movs r2, #255 ; 0xff - 800a4da: 4013 ands r3, r2 - 800a4dc: 697a ldr r2, [r7, #20] - 800a4de: 4313 orrs r3, r2 - 800a4e0: 617b str r3, [r7, #20] + 800a75c: 683b ldr r3, [r7, #0] + 800a75e: 011b lsls r3, r3, #4 + 800a760: 22ff movs r2, #255 ; 0xff + 800a762: 4013 ands r3, r2 + 800a764: 697a ldr r2, [r7, #20] + 800a766: 4313 orrs r3, r2 + 800a768: 617b str r3, [r7, #20] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 800a4e2: 693b ldr r3, [r7, #16] - 800a4e4: 220a movs r2, #10 - 800a4e6: 4393 bics r3, r2 - 800a4e8: 613b str r3, [r7, #16] + 800a76a: 693b ldr r3, [r7, #16] + 800a76c: 220a movs r2, #10 + 800a76e: 4393 bics r3, r2 + 800a770: 613b str r3, [r7, #16] tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); - 800a4ea: 68bb ldr r3, [r7, #8] - 800a4ec: 220a movs r2, #10 - 800a4ee: 4013 ands r3, r2 - 800a4f0: 693a ldr r2, [r7, #16] - 800a4f2: 4313 orrs r3, r2 - 800a4f4: 613b str r3, [r7, #16] + 800a772: 68bb ldr r3, [r7, #8] + 800a774: 220a movs r2, #10 + 800a776: 4013 ands r3, r2 + 800a778: 693a ldr r2, [r7, #16] + 800a77a: 4313 orrs r3, r2 + 800a77c: 613b str r3, [r7, #16] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; - 800a4f6: 68fb ldr r3, [r7, #12] - 800a4f8: 697a ldr r2, [r7, #20] - 800a4fa: 619a str r2, [r3, #24] + 800a77e: 68fb ldr r3, [r7, #12] + 800a780: 697a ldr r2, [r7, #20] + 800a782: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 800a4fc: 68fb ldr r3, [r7, #12] - 800a4fe: 693a ldr r2, [r7, #16] - 800a500: 621a str r2, [r3, #32] + 800a784: 68fb ldr r3, [r7, #12] + 800a786: 693a ldr r2, [r7, #16] + 800a788: 621a str r2, [r3, #32] } - 800a502: 46c0 nop ; (mov r8, r8) - 800a504: 46bd mov sp, r7 - 800a506: b006 add sp, #24 - 800a508: bd80 pop {r7, pc} - 800a50a: 46c0 nop ; (mov r8, r8) - 800a50c: 40012c00 .word 0x40012c00 - 800a510: 40000400 .word 0x40000400 - 800a514: 40014000 .word 0x40014000 + 800a78a: 46c0 nop ; (mov r8, r8) + 800a78c: 46bd mov sp, r7 + 800a78e: b006 add sp, #24 + 800a790: bd80 pop {r7, pc} + 800a792: 46c0 nop ; (mov r8, r8) + 800a794: 40012c00 .word 0x40012c00 + 800a798: 40000400 .word 0x40000400 + 800a79c: 40014000 .word 0x40014000 -0800a518 : +0800a7a0 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - 800a518: b580 push {r7, lr} - 800a51a: b086 sub sp, #24 - 800a51c: af00 add r7, sp, #0 - 800a51e: 60f8 str r0, [r7, #12] - 800a520: 60b9 str r1, [r7, #8] - 800a522: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = TIMx->CCER; - 800a524: 68fb ldr r3, [r7, #12] - 800a526: 6a1b ldr r3, [r3, #32] - 800a528: 617b str r3, [r7, #20] - TIMx->CCER &= ~TIM_CCER_CC1E; - 800a52a: 68fb ldr r3, [r7, #12] - 800a52c: 6a1b ldr r3, [r3, #32] - 800a52e: 2201 movs r2, #1 - 800a530: 4393 bics r3, r2 - 800a532: 001a movs r2, r3 - 800a534: 68fb ldr r3, [r7, #12] - 800a536: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 800a538: 68fb ldr r3, [r7, #12] - 800a53a: 699b ldr r3, [r3, #24] - 800a53c: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - 800a53e: 693b ldr r3, [r7, #16] - 800a540: 22f0 movs r2, #240 ; 0xf0 - 800a542: 4393 bics r3, r2 - 800a544: 613b str r3, [r7, #16] - tmpccmr1 |= (TIM_ICFilter << 4U); - 800a546: 687b ldr r3, [r7, #4] - 800a548: 011b lsls r3, r3, #4 - 800a54a: 693a ldr r2, [r7, #16] - 800a54c: 4313 orrs r3, r2 - 800a54e: 613b str r3, [r7, #16] - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 800a550: 697b ldr r3, [r7, #20] - 800a552: 220a movs r2, #10 - 800a554: 4393 bics r3, r2 - 800a556: 617b str r3, [r7, #20] - tmpccer |= TIM_ICPolarity; - 800a558: 697a ldr r2, [r7, #20] - 800a55a: 68bb ldr r3, [r7, #8] - 800a55c: 4313 orrs r3, r2 - 800a55e: 617b str r3, [r7, #20] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - 800a560: 68fb ldr r3, [r7, #12] - 800a562: 693a ldr r2, [r7, #16] - 800a564: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 800a566: 68fb ldr r3, [r7, #12] - 800a568: 697a ldr r2, [r7, #20] - 800a56a: 621a str r2, [r3, #32] -} - 800a56c: 46c0 nop ; (mov r8, r8) - 800a56e: 46bd mov sp, r7 - 800a570: b006 add sp, #24 - 800a572: bd80 pop {r7, pc} - -0800a574 : - * (on channel1 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - 800a574: b580 push {r7, lr} - 800a576: b086 sub sp, #24 - 800a578: af00 add r7, sp, #0 - 800a57a: 60f8 str r0, [r7, #12] - 800a57c: 60b9 str r1, [r7, #8] - 800a57e: 607a str r2, [r7, #4] - 800a580: 603b str r3, [r7, #0] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 800a582: 68fb ldr r3, [r7, #12] - 800a584: 6a1b ldr r3, [r3, #32] - 800a586: 2210 movs r2, #16 - 800a588: 4393 bics r3, r2 - 800a58a: 001a movs r2, r3 - 800a58c: 68fb ldr r3, [r7, #12] - 800a58e: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 800a590: 68fb ldr r3, [r7, #12] - 800a592: 699b ldr r3, [r3, #24] - 800a594: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 800a596: 68fb ldr r3, [r7, #12] - 800a598: 6a1b ldr r3, [r3, #32] - 800a59a: 613b str r3, [r7, #16] - - /* Select the Input */ - tmpccmr1 &= ~TIM_CCMR1_CC2S; - 800a59c: 697b ldr r3, [r7, #20] - 800a59e: 4a14 ldr r2, [pc, #80] ; (800a5f0 ) - 800a5a0: 4013 ands r3, r2 - 800a5a2: 617b str r3, [r7, #20] - tmpccmr1 |= (TIM_ICSelection << 8U); - 800a5a4: 687b ldr r3, [r7, #4] - 800a5a6: 021b lsls r3, r3, #8 - 800a5a8: 697a ldr r2, [r7, #20] - 800a5aa: 4313 orrs r3, r2 - 800a5ac: 617b str r3, [r7, #20] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 800a5ae: 697b ldr r3, [r7, #20] - 800a5b0: 4a10 ldr r2, [pc, #64] ; (800a5f4 ) - 800a5b2: 4013 ands r3, r2 - 800a5b4: 617b str r3, [r7, #20] - tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F); - 800a5b6: 683b ldr r3, [r7, #0] - 800a5b8: 031b lsls r3, r3, #12 - 800a5ba: 041b lsls r3, r3, #16 - 800a5bc: 0c1b lsrs r3, r3, #16 - 800a5be: 697a ldr r2, [r7, #20] - 800a5c0: 4313 orrs r3, r2 - 800a5c2: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 800a5c4: 693b ldr r3, [r7, #16] - 800a5c6: 22a0 movs r2, #160 ; 0xa0 - 800a5c8: 4393 bics r3, r2 - 800a5ca: 613b str r3, [r7, #16] - tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); - 800a5cc: 68bb ldr r3, [r7, #8] - 800a5ce: 011b lsls r3, r3, #4 - 800a5d0: 22a0 movs r2, #160 ; 0xa0 - 800a5d2: 4013 ands r3, r2 - 800a5d4: 693a ldr r2, [r7, #16] - 800a5d6: 4313 orrs r3, r2 - 800a5d8: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - 800a5da: 68fb ldr r3, [r7, #12] - 800a5dc: 697a ldr r2, [r7, #20] - 800a5de: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 800a5e0: 68fb ldr r3, [r7, #12] - 800a5e2: 693a ldr r2, [r7, #16] - 800a5e4: 621a str r2, [r3, #32] -} - 800a5e6: 46c0 nop ; (mov r8, r8) - 800a5e8: 46bd mov sp, r7 - 800a5ea: b006 add sp, #24 - 800a5ec: bd80 pop {r7, pc} - 800a5ee: 46c0 nop ; (mov r8, r8) - 800a5f0: fffffcff .word 0xfffffcff - 800a5f4: ffff0fff .word 0xffff0fff - -0800a5f8 : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - 800a5f8: b580 push {r7, lr} - 800a5fa: b086 sub sp, #24 - 800a5fc: af00 add r7, sp, #0 - 800a5fe: 60f8 str r0, [r7, #12] - 800a600: 60b9 str r1, [r7, #8] - 800a602: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - 800a604: 68fb ldr r3, [r7, #12] - 800a606: 6a1b ldr r3, [r3, #32] - 800a608: 2210 movs r2, #16 - 800a60a: 4393 bics r3, r2 - 800a60c: 001a movs r2, r3 - 800a60e: 68fb ldr r3, [r7, #12] - 800a610: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 800a612: 68fb ldr r3, [r7, #12] - 800a614: 699b ldr r3, [r3, #24] - 800a616: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 800a618: 68fb ldr r3, [r7, #12] - 800a61a: 6a1b ldr r3, [r3, #32] - 800a61c: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 800a61e: 697b ldr r3, [r7, #20] - 800a620: 4a0d ldr r2, [pc, #52] ; (800a658 ) - 800a622: 4013 ands r3, r2 - 800a624: 617b str r3, [r7, #20] - tmpccmr1 |= (TIM_ICFilter << 12U); - 800a626: 687b ldr r3, [r7, #4] - 800a628: 031b lsls r3, r3, #12 - 800a62a: 697a ldr r2, [r7, #20] - 800a62c: 4313 orrs r3, r2 - 800a62e: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 800a630: 693b ldr r3, [r7, #16] - 800a632: 22a0 movs r2, #160 ; 0xa0 - 800a634: 4393 bics r3, r2 - 800a636: 613b str r3, [r7, #16] - tmpccer |= (TIM_ICPolarity << 4U); - 800a638: 68bb ldr r3, [r7, #8] - 800a63a: 011b lsls r3, r3, #4 - 800a63c: 693a ldr r2, [r7, #16] - 800a63e: 4313 orrs r3, r2 - 800a640: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - 800a642: 68fb ldr r3, [r7, #12] - 800a644: 697a ldr r2, [r7, #20] - 800a646: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 800a648: 68fb ldr r3, [r7, #12] - 800a64a: 693a ldr r2, [r7, #16] - 800a64c: 621a str r2, [r3, #32] -} - 800a64e: 46c0 nop ; (mov r8, r8) - 800a650: 46bd mov sp, r7 - 800a652: b006 add sp, #24 - 800a654: bd80 pop {r7, pc} - 800a656: 46c0 nop ; (mov r8, r8) - 800a658: ffff0fff .word 0xffff0fff - -0800a65c : - * (on channel1 path) is used as the input signal. Therefore CCMR2 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - 800a65c: b580 push {r7, lr} - 800a65e: b086 sub sp, #24 - 800a660: af00 add r7, sp, #0 - 800a662: 60f8 str r0, [r7, #12] - 800a664: 60b9 str r1, [r7, #8] - 800a666: 607a str r2, [r7, #4] - 800a668: 603b str r3, [r7, #0] - uint32_t tmpccmr2; - uint32_t tmpccer; - - /* Disable the Channel 3: Reset the CC3E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - 800a66a: 68fb ldr r3, [r7, #12] - 800a66c: 6a1b ldr r3, [r3, #32] - 800a66e: 4a19 ldr r2, [pc, #100] ; (800a6d4 ) - 800a670: 401a ands r2, r3 - 800a672: 68fb ldr r3, [r7, #12] - 800a674: 621a str r2, [r3, #32] - tmpccmr2 = TIMx->CCMR2; - 800a676: 68fb ldr r3, [r7, #12] - 800a678: 69db ldr r3, [r3, #28] - 800a67a: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 800a67c: 68fb ldr r3, [r7, #12] - 800a67e: 6a1b ldr r3, [r3, #32] - 800a680: 613b str r3, [r7, #16] - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC3S; - 800a682: 697b ldr r3, [r7, #20] - 800a684: 2203 movs r2, #3 - 800a686: 4393 bics r3, r2 - 800a688: 617b str r3, [r7, #20] - tmpccmr2 |= TIM_ICSelection; - 800a68a: 697a ldr r2, [r7, #20] - 800a68c: 687b ldr r3, [r7, #4] - 800a68e: 4313 orrs r3, r2 - 800a690: 617b str r3, [r7, #20] - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC3F; - 800a692: 697b ldr r3, [r7, #20] - 800a694: 22f0 movs r2, #240 ; 0xf0 - 800a696: 4393 bics r3, r2 - 800a698: 617b str r3, [r7, #20] - tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F); - 800a69a: 683b ldr r3, [r7, #0] - 800a69c: 011b lsls r3, r3, #4 - 800a69e: 22ff movs r2, #255 ; 0xff - 800a6a0: 4013 ands r3, r2 - 800a6a2: 697a ldr r2, [r7, #20] - 800a6a4: 4313 orrs r3, r2 - 800a6a6: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC3E Bit */ - tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); - 800a6a8: 693b ldr r3, [r7, #16] - 800a6aa: 4a0b ldr r2, [pc, #44] ; (800a6d8 ) - 800a6ac: 4013 ands r3, r2 - 800a6ae: 613b str r3, [r7, #16] - tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); - 800a6b0: 68bb ldr r3, [r7, #8] - 800a6b2: 021a lsls r2, r3, #8 - 800a6b4: 23a0 movs r3, #160 ; 0xa0 - 800a6b6: 011b lsls r3, r3, #4 - 800a6b8: 4013 ands r3, r2 - 800a6ba: 693a ldr r2, [r7, #16] - 800a6bc: 4313 orrs r3, r2 - 800a6be: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - 800a6c0: 68fb ldr r3, [r7, #12] - 800a6c2: 697a ldr r2, [r7, #20] - 800a6c4: 61da str r2, [r3, #28] - TIMx->CCER = tmpccer; - 800a6c6: 68fb ldr r3, [r7, #12] - 800a6c8: 693a ldr r2, [r7, #16] - 800a6ca: 621a str r2, [r3, #32] -} - 800a6cc: 46c0 nop ; (mov r8, r8) - 800a6ce: 46bd mov sp, r7 - 800a6d0: b006 add sp, #24 - 800a6d2: bd80 pop {r7, pc} - 800a6d4: fffffeff .word 0xfffffeff - 800a6d8: fffff5ff .word 0xfffff5ff - -0800a6dc : - * protected against un-initialized filter and polarity values. - * @retval None - */ -static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - 800a6dc: b580 push {r7, lr} - 800a6de: b086 sub sp, #24 - 800a6e0: af00 add r7, sp, #0 - 800a6e2: 60f8 str r0, [r7, #12] - 800a6e4: 60b9 str r1, [r7, #8] - 800a6e6: 607a str r2, [r7, #4] - 800a6e8: 603b str r3, [r7, #0] - uint32_t tmpccmr2; - uint32_t tmpccer; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - 800a6ea: 68fb ldr r3, [r7, #12] - 800a6ec: 6a1b ldr r3, [r3, #32] - 800a6ee: 4a1a ldr r2, [pc, #104] ; (800a758 ) - 800a6f0: 401a ands r2, r3 - 800a6f2: 68fb ldr r3, [r7, #12] - 800a6f4: 621a str r2, [r3, #32] - tmpccmr2 = TIMx->CCMR2; - 800a6f6: 68fb ldr r3, [r7, #12] - 800a6f8: 69db ldr r3, [r3, #28] - 800a6fa: 617b str r3, [r7, #20] - tmpccer = TIMx->CCER; - 800a6fc: 68fb ldr r3, [r7, #12] - 800a6fe: 6a1b ldr r3, [r3, #32] - 800a700: 613b str r3, [r7, #16] - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC4S; - 800a702: 697b ldr r3, [r7, #20] - 800a704: 4a15 ldr r2, [pc, #84] ; (800a75c ) - 800a706: 4013 ands r3, r2 - 800a708: 617b str r3, [r7, #20] - tmpccmr2 |= (TIM_ICSelection << 8U); - 800a70a: 687b ldr r3, [r7, #4] - 800a70c: 021b lsls r3, r3, #8 - 800a70e: 697a ldr r2, [r7, #20] - 800a710: 4313 orrs r3, r2 - 800a712: 617b str r3, [r7, #20] - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC4F; - 800a714: 697b ldr r3, [r7, #20] - 800a716: 4a12 ldr r2, [pc, #72] ; (800a760 ) - 800a718: 4013 ands r3, r2 - 800a71a: 617b str r3, [r7, #20] - tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F); - 800a71c: 683b ldr r3, [r7, #0] - 800a71e: 031b lsls r3, r3, #12 - 800a720: 041b lsls r3, r3, #16 - 800a722: 0c1b lsrs r3, r3, #16 - 800a724: 697a ldr r2, [r7, #20] - 800a726: 4313 orrs r3, r2 - 800a728: 617b str r3, [r7, #20] - - /* Select the Polarity and set the CC4E Bit */ - tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); - 800a72a: 693b ldr r3, [r7, #16] - 800a72c: 4a0d ldr r2, [pc, #52] ; (800a764 ) - 800a72e: 4013 ands r3, r2 - 800a730: 613b str r3, [r7, #16] - tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); - 800a732: 68bb ldr r3, [r7, #8] - 800a734: 031a lsls r2, r3, #12 - 800a736: 23a0 movs r3, #160 ; 0xa0 - 800a738: 021b lsls r3, r3, #8 - 800a73a: 4013 ands r3, r2 - 800a73c: 693a ldr r2, [r7, #16] - 800a73e: 4313 orrs r3, r2 - 800a740: 613b str r3, [r7, #16] - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - 800a742: 68fb ldr r3, [r7, #12] - 800a744: 697a ldr r2, [r7, #20] - 800a746: 61da str r2, [r3, #28] - TIMx->CCER = tmpccer ; - 800a748: 68fb ldr r3, [r7, #12] - 800a74a: 693a ldr r2, [r7, #16] - 800a74c: 621a str r2, [r3, #32] -} - 800a74e: 46c0 nop ; (mov r8, r8) - 800a750: 46bd mov sp, r7 - 800a752: b006 add sp, #24 - 800a754: bd80 pop {r7, pc} - 800a756: 46c0 nop ; (mov r8, r8) - 800a758: ffffefff .word 0xffffefff - 800a75c: fffffcff .word 0xfffffcff - 800a760: ffff0fff .word 0xffff0fff - 800a764: ffff5fff .word 0xffff5fff - -0800a768 : - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input - * @retval None - */ -static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) -{ - 800a768: b580 push {r7, lr} - 800a76a: b084 sub sp, #16 - 800a76c: af00 add r7, sp, #0 - 800a76e: 6078 str r0, [r7, #4] - 800a770: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - 800a772: 687b ldr r3, [r7, #4] - 800a774: 689b ldr r3, [r3, #8] - 800a776: 60fb str r3, [r7, #12] - /* Reset the TS Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - 800a778: 68fb ldr r3, [r7, #12] - 800a77a: 4a08 ldr r2, [pc, #32] ; (800a79c ) - 800a77c: 4013 ands r3, r2 - 800a77e: 60fb str r3, [r7, #12] - /* Set the Input Trigger source and the slave mode*/ - tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 800a780: 683a ldr r2, [r7, #0] - 800a782: 68fb ldr r3, [r7, #12] - 800a784: 4313 orrs r3, r2 - 800a786: 2207 movs r2, #7 - 800a788: 4313 orrs r3, r2 - 800a78a: 60fb str r3, [r7, #12] - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - 800a78c: 687b ldr r3, [r7, #4] - 800a78e: 68fa ldr r2, [r7, #12] - 800a790: 609a str r2, [r3, #8] -} - 800a792: 46c0 nop ; (mov r8, r8) - 800a794: 46bd mov sp, r7 - 800a796: b004 add sp, #16 - 800a798: bd80 pop {r7, pc} - 800a79a: 46c0 nop ; (mov r8, r8) - 800a79c: ffcfff8f .word 0xffcfff8f - -0800a7a0 : - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 800a7a0: b580 push {r7, lr} 800a7a2: b086 sub sp, #24 @@ -27159,12686 +27107,14908 @@ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, 800a7a6: 60f8 str r0, [r7, #12] 800a7a8: 60b9 str r1, [r7, #8] 800a7aa: 607a str r2, [r7, #4] - 800a7ac: 603b str r3, [r7, #0] + uint32_t tmpccmr1; + uint32_t tmpccer; + + /* Disable the Channel 1: Reset the CC1E Bit */ + tmpccer = TIMx->CCER; + 800a7ac: 68fb ldr r3, [r7, #12] + 800a7ae: 6a1b ldr r3, [r3, #32] + 800a7b0: 617b str r3, [r7, #20] + TIMx->CCER &= ~TIM_CCER_CC1E; + 800a7b2: 68fb ldr r3, [r7, #12] + 800a7b4: 6a1b ldr r3, [r3, #32] + 800a7b6: 2201 movs r2, #1 + 800a7b8: 4393 bics r3, r2 + 800a7ba: 001a movs r2, r3 + 800a7bc: 68fb ldr r3, [r7, #12] + 800a7be: 621a str r2, [r3, #32] + tmpccmr1 = TIMx->CCMR1; + 800a7c0: 68fb ldr r3, [r7, #12] + 800a7c2: 699b ldr r3, [r3, #24] + 800a7c4: 613b str r3, [r7, #16] + + /* Set the filter */ + tmpccmr1 &= ~TIM_CCMR1_IC1F; + 800a7c6: 693b ldr r3, [r7, #16] + 800a7c8: 22f0 movs r2, #240 ; 0xf0 + 800a7ca: 4393 bics r3, r2 + 800a7cc: 613b str r3, [r7, #16] + tmpccmr1 |= (TIM_ICFilter << 4U); + 800a7ce: 687b ldr r3, [r7, #4] + 800a7d0: 011b lsls r3, r3, #4 + 800a7d2: 693a ldr r2, [r7, #16] + 800a7d4: 4313 orrs r3, r2 + 800a7d6: 613b str r3, [r7, #16] + + /* Select the Polarity and set the CC1E Bit */ + tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); + 800a7d8: 697b ldr r3, [r7, #20] + 800a7da: 220a movs r2, #10 + 800a7dc: 4393 bics r3, r2 + 800a7de: 617b str r3, [r7, #20] + tmpccer |= TIM_ICPolarity; + 800a7e0: 697a ldr r2, [r7, #20] + 800a7e2: 68bb ldr r3, [r7, #8] + 800a7e4: 4313 orrs r3, r2 + 800a7e6: 617b str r3, [r7, #20] + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1; + 800a7e8: 68fb ldr r3, [r7, #12] + 800a7ea: 693a ldr r2, [r7, #16] + 800a7ec: 619a str r2, [r3, #24] + TIMx->CCER = tmpccer; + 800a7ee: 68fb ldr r3, [r7, #12] + 800a7f0: 697a ldr r2, [r7, #20] + 800a7f2: 621a str r2, [r3, #32] +} + 800a7f4: 46c0 nop ; (mov r8, r8) + 800a7f6: 46bd mov sp, r7 + 800a7f8: b006 add sp, #24 + 800a7fa: bd80 pop {r7, pc} + +0800a7fc : + * (on channel1 path) is used as the input signal. Therefore CCMR1 must be + * protected against un-initialized filter and polarity values. + */ +static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + uint32_t TIM_ICFilter) +{ + 800a7fc: b580 push {r7, lr} + 800a7fe: b086 sub sp, #24 + 800a800: af00 add r7, sp, #0 + 800a802: 60f8 str r0, [r7, #12] + 800a804: 60b9 str r1, [r7, #8] + 800a806: 607a str r2, [r7, #4] + 800a808: 603b str r3, [r7, #0] + uint32_t tmpccmr1; + uint32_t tmpccer; + + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= ~TIM_CCER_CC2E; + 800a80a: 68fb ldr r3, [r7, #12] + 800a80c: 6a1b ldr r3, [r3, #32] + 800a80e: 2210 movs r2, #16 + 800a810: 4393 bics r3, r2 + 800a812: 001a movs r2, r3 + 800a814: 68fb ldr r3, [r7, #12] + 800a816: 621a str r2, [r3, #32] + tmpccmr1 = TIMx->CCMR1; + 800a818: 68fb ldr r3, [r7, #12] + 800a81a: 699b ldr r3, [r3, #24] + 800a81c: 617b str r3, [r7, #20] + tmpccer = TIMx->CCER; + 800a81e: 68fb ldr r3, [r7, #12] + 800a820: 6a1b ldr r3, [r3, #32] + 800a822: 613b str r3, [r7, #16] + + /* Select the Input */ + tmpccmr1 &= ~TIM_CCMR1_CC2S; + 800a824: 697b ldr r3, [r7, #20] + 800a826: 4a14 ldr r2, [pc, #80] ; (800a878 ) + 800a828: 4013 ands r3, r2 + 800a82a: 617b str r3, [r7, #20] + tmpccmr1 |= (TIM_ICSelection << 8U); + 800a82c: 687b ldr r3, [r7, #4] + 800a82e: 021b lsls r3, r3, #8 + 800a830: 697a ldr r2, [r7, #20] + 800a832: 4313 orrs r3, r2 + 800a834: 617b str r3, [r7, #20] + + /* Set the filter */ + tmpccmr1 &= ~TIM_CCMR1_IC2F; + 800a836: 697b ldr r3, [r7, #20] + 800a838: 4a10 ldr r2, [pc, #64] ; (800a87c ) + 800a83a: 4013 ands r3, r2 + 800a83c: 617b str r3, [r7, #20] + tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F); + 800a83e: 683b ldr r3, [r7, #0] + 800a840: 031b lsls r3, r3, #12 + 800a842: 041b lsls r3, r3, #16 + 800a844: 0c1b lsrs r3, r3, #16 + 800a846: 697a ldr r2, [r7, #20] + 800a848: 4313 orrs r3, r2 + 800a84a: 617b str r3, [r7, #20] + + /* Select the Polarity and set the CC2E Bit */ + tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 800a84c: 693b ldr r3, [r7, #16] + 800a84e: 22a0 movs r2, #160 ; 0xa0 + 800a850: 4393 bics r3, r2 + 800a852: 613b str r3, [r7, #16] + tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); + 800a854: 68bb ldr r3, [r7, #8] + 800a856: 011b lsls r3, r3, #4 + 800a858: 22a0 movs r2, #160 ; 0xa0 + 800a85a: 4013 ands r3, r2 + 800a85c: 693a ldr r2, [r7, #16] + 800a85e: 4313 orrs r3, r2 + 800a860: 613b str r3, [r7, #16] + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1 ; + 800a862: 68fb ldr r3, [r7, #12] + 800a864: 697a ldr r2, [r7, #20] + 800a866: 619a str r2, [r3, #24] + TIMx->CCER = tmpccer; + 800a868: 68fb ldr r3, [r7, #12] + 800a86a: 693a ldr r2, [r7, #16] + 800a86c: 621a str r2, [r3, #32] +} + 800a86e: 46c0 nop ; (mov r8, r8) + 800a870: 46bd mov sp, r7 + 800a872: b006 add sp, #24 + 800a874: bd80 pop {r7, pc} + 800a876: 46c0 nop ; (mov r8, r8) + 800a878: fffffcff .word 0xfffffcff + 800a87c: ffff0fff .word 0xffff0fff + +0800a880 : + * @param TIM_ICFilter Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) +{ + 800a880: b580 push {r7, lr} + 800a882: b086 sub sp, #24 + 800a884: af00 add r7, sp, #0 + 800a886: 60f8 str r0, [r7, #12] + 800a888: 60b9 str r1, [r7, #8] + 800a88a: 607a str r2, [r7, #4] + uint32_t tmpccmr1; + uint32_t tmpccer; + + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= ~TIM_CCER_CC2E; + 800a88c: 68fb ldr r3, [r7, #12] + 800a88e: 6a1b ldr r3, [r3, #32] + 800a890: 2210 movs r2, #16 + 800a892: 4393 bics r3, r2 + 800a894: 001a movs r2, r3 + 800a896: 68fb ldr r3, [r7, #12] + 800a898: 621a str r2, [r3, #32] + tmpccmr1 = TIMx->CCMR1; + 800a89a: 68fb ldr r3, [r7, #12] + 800a89c: 699b ldr r3, [r3, #24] + 800a89e: 617b str r3, [r7, #20] + tmpccer = TIMx->CCER; + 800a8a0: 68fb ldr r3, [r7, #12] + 800a8a2: 6a1b ldr r3, [r3, #32] + 800a8a4: 613b str r3, [r7, #16] + + /* Set the filter */ + tmpccmr1 &= ~TIM_CCMR1_IC2F; + 800a8a6: 697b ldr r3, [r7, #20] + 800a8a8: 4a0d ldr r2, [pc, #52] ; (800a8e0 ) + 800a8aa: 4013 ands r3, r2 + 800a8ac: 617b str r3, [r7, #20] + tmpccmr1 |= (TIM_ICFilter << 12U); + 800a8ae: 687b ldr r3, [r7, #4] + 800a8b0: 031b lsls r3, r3, #12 + 800a8b2: 697a ldr r2, [r7, #20] + 800a8b4: 4313 orrs r3, r2 + 800a8b6: 617b str r3, [r7, #20] + + /* Select the Polarity and set the CC2E Bit */ + tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 800a8b8: 693b ldr r3, [r7, #16] + 800a8ba: 22a0 movs r2, #160 ; 0xa0 + 800a8bc: 4393 bics r3, r2 + 800a8be: 613b str r3, [r7, #16] + tmpccer |= (TIM_ICPolarity << 4U); + 800a8c0: 68bb ldr r3, [r7, #8] + 800a8c2: 011b lsls r3, r3, #4 + 800a8c4: 693a ldr r2, [r7, #16] + 800a8c6: 4313 orrs r3, r2 + 800a8c8: 613b str r3, [r7, #16] + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1 ; + 800a8ca: 68fb ldr r3, [r7, #12] + 800a8cc: 697a ldr r2, [r7, #20] + 800a8ce: 619a str r2, [r3, #24] + TIMx->CCER = tmpccer; + 800a8d0: 68fb ldr r3, [r7, #12] + 800a8d2: 693a ldr r2, [r7, #16] + 800a8d4: 621a str r2, [r3, #32] +} + 800a8d6: 46c0 nop ; (mov r8, r8) + 800a8d8: 46bd mov sp, r7 + 800a8da: b006 add sp, #24 + 800a8dc: bd80 pop {r7, pc} + 800a8de: 46c0 nop ; (mov r8, r8) + 800a8e0: ffff0fff .word 0xffff0fff + +0800a8e4 : + * (on channel1 path) is used as the input signal. Therefore CCMR2 must be + * protected against un-initialized filter and polarity values. + */ +static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + uint32_t TIM_ICFilter) +{ + 800a8e4: b580 push {r7, lr} + 800a8e6: b086 sub sp, #24 + 800a8e8: af00 add r7, sp, #0 + 800a8ea: 60f8 str r0, [r7, #12] + 800a8ec: 60b9 str r1, [r7, #8] + 800a8ee: 607a str r2, [r7, #4] + 800a8f0: 603b str r3, [r7, #0] + uint32_t tmpccmr2; + uint32_t tmpccer; + + /* Disable the Channel 3: Reset the CC3E Bit */ + TIMx->CCER &= ~TIM_CCER_CC3E; + 800a8f2: 68fb ldr r3, [r7, #12] + 800a8f4: 6a1b ldr r3, [r3, #32] + 800a8f6: 4a19 ldr r2, [pc, #100] ; (800a95c ) + 800a8f8: 401a ands r2, r3 + 800a8fa: 68fb ldr r3, [r7, #12] + 800a8fc: 621a str r2, [r3, #32] + tmpccmr2 = TIMx->CCMR2; + 800a8fe: 68fb ldr r3, [r7, #12] + 800a900: 69db ldr r3, [r3, #28] + 800a902: 617b str r3, [r7, #20] + tmpccer = TIMx->CCER; + 800a904: 68fb ldr r3, [r7, #12] + 800a906: 6a1b ldr r3, [r3, #32] + 800a908: 613b str r3, [r7, #16] + + /* Select the Input */ + tmpccmr2 &= ~TIM_CCMR2_CC3S; + 800a90a: 697b ldr r3, [r7, #20] + 800a90c: 2203 movs r2, #3 + 800a90e: 4393 bics r3, r2 + 800a910: 617b str r3, [r7, #20] + tmpccmr2 |= TIM_ICSelection; + 800a912: 697a ldr r2, [r7, #20] + 800a914: 687b ldr r3, [r7, #4] + 800a916: 4313 orrs r3, r2 + 800a918: 617b str r3, [r7, #20] + + /* Set the filter */ + tmpccmr2 &= ~TIM_CCMR2_IC3F; + 800a91a: 697b ldr r3, [r7, #20] + 800a91c: 22f0 movs r2, #240 ; 0xf0 + 800a91e: 4393 bics r3, r2 + 800a920: 617b str r3, [r7, #20] + tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F); + 800a922: 683b ldr r3, [r7, #0] + 800a924: 011b lsls r3, r3, #4 + 800a926: 22ff movs r2, #255 ; 0xff + 800a928: 4013 ands r3, r2 + 800a92a: 697a ldr r2, [r7, #20] + 800a92c: 4313 orrs r3, r2 + 800a92e: 617b str r3, [r7, #20] + + /* Select the Polarity and set the CC3E Bit */ + tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); + 800a930: 693b ldr r3, [r7, #16] + 800a932: 4a0b ldr r2, [pc, #44] ; (800a960 ) + 800a934: 4013 ands r3, r2 + 800a936: 613b str r3, [r7, #16] + tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); + 800a938: 68bb ldr r3, [r7, #8] + 800a93a: 021a lsls r2, r3, #8 + 800a93c: 23a0 movs r3, #160 ; 0xa0 + 800a93e: 011b lsls r3, r3, #4 + 800a940: 4013 ands r3, r2 + 800a942: 693a ldr r2, [r7, #16] + 800a944: 4313 orrs r3, r2 + 800a946: 613b str r3, [r7, #16] + + /* Write to TIMx CCMR2 and CCER registers */ + TIMx->CCMR2 = tmpccmr2; + 800a948: 68fb ldr r3, [r7, #12] + 800a94a: 697a ldr r2, [r7, #20] + 800a94c: 61da str r2, [r3, #28] + TIMx->CCER = tmpccer; + 800a94e: 68fb ldr r3, [r7, #12] + 800a950: 693a ldr r2, [r7, #16] + 800a952: 621a str r2, [r3, #32] +} + 800a954: 46c0 nop ; (mov r8, r8) + 800a956: 46bd mov sp, r7 + 800a958: b006 add sp, #24 + 800a95a: bd80 pop {r7, pc} + 800a95c: fffffeff .word 0xfffffeff + 800a960: fffff5ff .word 0xfffff5ff + +0800a964 : + * protected against un-initialized filter and polarity values. + * @retval None + */ +static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + uint32_t TIM_ICFilter) +{ + 800a964: b580 push {r7, lr} + 800a966: b086 sub sp, #24 + 800a968: af00 add r7, sp, #0 + 800a96a: 60f8 str r0, [r7, #12] + 800a96c: 60b9 str r1, [r7, #8] + 800a96e: 607a str r2, [r7, #4] + 800a970: 603b str r3, [r7, #0] + uint32_t tmpccmr2; + uint32_t tmpccer; + + /* Disable the Channel 4: Reset the CC4E Bit */ + TIMx->CCER &= ~TIM_CCER_CC4E; + 800a972: 68fb ldr r3, [r7, #12] + 800a974: 6a1b ldr r3, [r3, #32] + 800a976: 4a1a ldr r2, [pc, #104] ; (800a9e0 ) + 800a978: 401a ands r2, r3 + 800a97a: 68fb ldr r3, [r7, #12] + 800a97c: 621a str r2, [r3, #32] + tmpccmr2 = TIMx->CCMR2; + 800a97e: 68fb ldr r3, [r7, #12] + 800a980: 69db ldr r3, [r3, #28] + 800a982: 617b str r3, [r7, #20] + tmpccer = TIMx->CCER; + 800a984: 68fb ldr r3, [r7, #12] + 800a986: 6a1b ldr r3, [r3, #32] + 800a988: 613b str r3, [r7, #16] + + /* Select the Input */ + tmpccmr2 &= ~TIM_CCMR2_CC4S; + 800a98a: 697b ldr r3, [r7, #20] + 800a98c: 4a15 ldr r2, [pc, #84] ; (800a9e4 ) + 800a98e: 4013 ands r3, r2 + 800a990: 617b str r3, [r7, #20] + tmpccmr2 |= (TIM_ICSelection << 8U); + 800a992: 687b ldr r3, [r7, #4] + 800a994: 021b lsls r3, r3, #8 + 800a996: 697a ldr r2, [r7, #20] + 800a998: 4313 orrs r3, r2 + 800a99a: 617b str r3, [r7, #20] + + /* Set the filter */ + tmpccmr2 &= ~TIM_CCMR2_IC4F; + 800a99c: 697b ldr r3, [r7, #20] + 800a99e: 4a12 ldr r2, [pc, #72] ; (800a9e8 ) + 800a9a0: 4013 ands r3, r2 + 800a9a2: 617b str r3, [r7, #20] + tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F); + 800a9a4: 683b ldr r3, [r7, #0] + 800a9a6: 031b lsls r3, r3, #12 + 800a9a8: 041b lsls r3, r3, #16 + 800a9aa: 0c1b lsrs r3, r3, #16 + 800a9ac: 697a ldr r2, [r7, #20] + 800a9ae: 4313 orrs r3, r2 + 800a9b0: 617b str r3, [r7, #20] + + /* Select the Polarity and set the CC4E Bit */ + tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); + 800a9b2: 693b ldr r3, [r7, #16] + 800a9b4: 4a0d ldr r2, [pc, #52] ; (800a9ec ) + 800a9b6: 4013 ands r3, r2 + 800a9b8: 613b str r3, [r7, #16] + tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); + 800a9ba: 68bb ldr r3, [r7, #8] + 800a9bc: 031a lsls r2, r3, #12 + 800a9be: 23a0 movs r3, #160 ; 0xa0 + 800a9c0: 021b lsls r3, r3, #8 + 800a9c2: 4013 ands r3, r2 + 800a9c4: 693a ldr r2, [r7, #16] + 800a9c6: 4313 orrs r3, r2 + 800a9c8: 613b str r3, [r7, #16] + + /* Write to TIMx CCMR2 and CCER registers */ + TIMx->CCMR2 = tmpccmr2; + 800a9ca: 68fb ldr r3, [r7, #12] + 800a9cc: 697a ldr r2, [r7, #20] + 800a9ce: 61da str r2, [r3, #28] + TIMx->CCER = tmpccer ; + 800a9d0: 68fb ldr r3, [r7, #12] + 800a9d2: 693a ldr r2, [r7, #16] + 800a9d4: 621a str r2, [r3, #32] +} + 800a9d6: 46c0 nop ; (mov r8, r8) + 800a9d8: 46bd mov sp, r7 + 800a9da: b006 add sp, #24 + 800a9dc: bd80 pop {r7, pc} + 800a9de: 46c0 nop ; (mov r8, r8) + 800a9e0: ffffefff .word 0xffffefff + 800a9e4: fffffcff .word 0xfffffcff + 800a9e8: ffff0fff .word 0xffff0fff + 800a9ec: ffff5fff .word 0xffff5fff + +0800a9f0 : + * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 + * @arg TIM_TS_ETRF: External Trigger input + * @retval None + */ +static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) +{ + 800a9f0: b580 push {r7, lr} + 800a9f2: b084 sub sp, #16 + 800a9f4: af00 add r7, sp, #0 + 800a9f6: 6078 str r0, [r7, #4] + 800a9f8: 6039 str r1, [r7, #0] + uint32_t tmpsmcr; + + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + 800a9fa: 687b ldr r3, [r7, #4] + 800a9fc: 689b ldr r3, [r3, #8] + 800a9fe: 60fb str r3, [r7, #12] + /* Reset the TS Bits */ + tmpsmcr &= ~TIM_SMCR_TS; + 800aa00: 68fb ldr r3, [r7, #12] + 800aa02: 4a08 ldr r2, [pc, #32] ; (800aa24 ) + 800aa04: 4013 ands r3, r2 + 800aa06: 60fb str r3, [r7, #12] + /* Set the Input Trigger source and the slave mode*/ + tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); + 800aa08: 683a ldr r2, [r7, #0] + 800aa0a: 68fb ldr r3, [r7, #12] + 800aa0c: 4313 orrs r3, r2 + 800aa0e: 2207 movs r2, #7 + 800aa10: 4313 orrs r3, r2 + 800aa12: 60fb str r3, [r7, #12] + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; + 800aa14: 687b ldr r3, [r7, #4] + 800aa16: 68fa ldr r2, [r7, #12] + 800aa18: 609a str r2, [r3, #8] +} + 800aa1a: 46c0 nop ; (mov r8, r8) + 800aa1c: 46bd mov sp, r7 + 800aa1e: b004 add sp, #16 + 800aa20: bd80 pop {r7, pc} + 800aa22: 46c0 nop ; (mov r8, r8) + 800aa24: ffcfff8f .word 0xffcfff8f + +0800aa28 : + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, + uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) +{ + 800aa28: b580 push {r7, lr} + 800aa2a: b086 sub sp, #24 + 800aa2c: af00 add r7, sp, #0 + 800aa2e: 60f8 str r0, [r7, #12] + 800aa30: 60b9 str r1, [r7, #8] + 800aa32: 607a str r2, [r7, #4] + 800aa34: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; - 800a7ae: 68fb ldr r3, [r7, #12] - 800a7b0: 689b ldr r3, [r3, #8] - 800a7b2: 617b str r3, [r7, #20] + 800aa36: 68fb ldr r3, [r7, #12] + 800aa38: 689b ldr r3, [r3, #8] + 800aa3a: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 800a7b4: 697b ldr r3, [r7, #20] - 800a7b6: 4a09 ldr r2, [pc, #36] ; (800a7dc ) - 800a7b8: 4013 ands r3, r2 - 800a7ba: 617b str r3, [r7, #20] + 800aa3c: 697b ldr r3, [r7, #20] + 800aa3e: 4a09 ldr r2, [pc, #36] ; (800aa64 ) + 800aa40: 4013 ands r3, r2 + 800aa42: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 800a7bc: 683b ldr r3, [r7, #0] - 800a7be: 021a lsls r2, r3, #8 - 800a7c0: 687b ldr r3, [r7, #4] - 800a7c2: 431a orrs r2, r3 - 800a7c4: 68bb ldr r3, [r7, #8] - 800a7c6: 4313 orrs r3, r2 - 800a7c8: 697a ldr r2, [r7, #20] - 800a7ca: 4313 orrs r3, r2 - 800a7cc: 617b str r3, [r7, #20] + 800aa44: 683b ldr r3, [r7, #0] + 800aa46: 021a lsls r2, r3, #8 + 800aa48: 687b ldr r3, [r7, #4] + 800aa4a: 431a orrs r2, r3 + 800aa4c: 68bb ldr r3, [r7, #8] + 800aa4e: 4313 orrs r3, r2 + 800aa50: 697a ldr r2, [r7, #20] + 800aa52: 4313 orrs r3, r2 + 800aa54: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 800a7ce: 68fb ldr r3, [r7, #12] - 800a7d0: 697a ldr r2, [r7, #20] - 800a7d2: 609a str r2, [r3, #8] + 800aa56: 68fb ldr r3, [r7, #12] + 800aa58: 697a ldr r2, [r7, #20] + 800aa5a: 609a str r2, [r3, #8] } - 800a7d4: 46c0 nop ; (mov r8, r8) - 800a7d6: 46bd mov sp, r7 - 800a7d8: b006 add sp, #24 - 800a7da: bd80 pop {r7, pc} - 800a7dc: ffff00ff .word 0xffff00ff + 800aa5c: 46c0 nop ; (mov r8, r8) + 800aa5e: 46bd mov sp, r7 + 800aa60: b006 add sp, #24 + 800aa62: bd80 pop {r7, pc} + 800aa64: ffff00ff .word 0xffff00ff -0800a7e0 : +0800aa68 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { - 800a7e0: b580 push {r7, lr} - 800a7e2: b086 sub sp, #24 - 800a7e4: af00 add r7, sp, #0 - 800a7e6: 60f8 str r0, [r7, #12] - 800a7e8: 60b9 str r1, [r7, #8] - 800a7ea: 607a str r2, [r7, #4] + 800aa68: b580 push {r7, lr} + 800aa6a: b086 sub sp, #24 + 800aa6c: af00 add r7, sp, #0 + 800aa6e: 60f8 str r0, [r7, #12] + 800aa70: 60b9 str r1, [r7, #8] + 800aa72: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ - 800a7ec: 68bb ldr r3, [r7, #8] - 800a7ee: 221f movs r2, #31 - 800a7f0: 4013 ands r3, r2 - 800a7f2: 2201 movs r2, #1 - 800a7f4: 409a lsls r2, r3 - 800a7f6: 0013 movs r3, r2 - 800a7f8: 617b str r3, [r7, #20] + 800aa74: 68bb ldr r3, [r7, #8] + 800aa76: 221f movs r2, #31 + 800aa78: 4013 ands r3, r2 + 800aa7a: 2201 movs r2, #1 + 800aa7c: 409a lsls r2, r3 + 800aa7e: 0013 movs r3, r2 + 800aa80: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; - 800a7fa: 68fb ldr r3, [r7, #12] - 800a7fc: 6a1b ldr r3, [r3, #32] - 800a7fe: 697a ldr r2, [r7, #20] - 800a800: 43d2 mvns r2, r2 - 800a802: 401a ands r2, r3 - 800a804: 68fb ldr r3, [r7, #12] - 800a806: 621a str r2, [r3, #32] + 800aa82: 68fb ldr r3, [r7, #12] + 800aa84: 6a1b ldr r3, [r3, #32] + 800aa86: 697a ldr r2, [r7, #20] + 800aa88: 43d2 mvns r2, r2 + 800aa8a: 401a ands r2, r3 + 800aa8c: 68fb ldr r3, [r7, #12] + 800aa8e: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ - 800a808: 68fb ldr r3, [r7, #12] - 800a80a: 6a1a ldr r2, [r3, #32] - 800a80c: 68bb ldr r3, [r7, #8] - 800a80e: 211f movs r1, #31 - 800a810: 400b ands r3, r1 - 800a812: 6879 ldr r1, [r7, #4] - 800a814: 4099 lsls r1, r3 - 800a816: 000b movs r3, r1 - 800a818: 431a orrs r2, r3 - 800a81a: 68fb ldr r3, [r7, #12] - 800a81c: 621a str r2, [r3, #32] + 800aa90: 68fb ldr r3, [r7, #12] + 800aa92: 6a1a ldr r2, [r3, #32] + 800aa94: 68bb ldr r3, [r7, #8] + 800aa96: 211f movs r1, #31 + 800aa98: 400b ands r3, r1 + 800aa9a: 6879 ldr r1, [r7, #4] + 800aa9c: 4099 lsls r1, r3 + 800aa9e: 000b movs r3, r1 + 800aaa0: 431a orrs r2, r3 + 800aaa2: 68fb ldr r3, [r7, #12] + 800aaa4: 621a str r2, [r3, #32] } - 800a81e: 46c0 nop ; (mov r8, r8) - 800a820: 46bd mov sp, r7 - 800a822: b006 add sp, #24 - 800a824: bd80 pop {r7, pc} + 800aaa6: 46c0 nop ; (mov r8, r8) + 800aaa8: 46bd mov sp, r7 + 800aaaa: b006 add sp, #24 + 800aaac: bd80 pop {r7, pc} ... -0800a828 : +0800aab0 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { - 800a828: b580 push {r7, lr} - 800a82a: b084 sub sp, #16 - 800a82c: af00 add r7, sp, #0 - 800a82e: 6078 str r0, [r7, #4] - 800a830: 6039 str r1, [r7, #0] + 800aab0: b580 push {r7, lr} + 800aab2: b084 sub sp, #16 + 800aab4: af00 add r7, sp, #0 + 800aab6: 6078 str r0, [r7, #4] + 800aab8: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 800a832: 687b ldr r3, [r7, #4] - 800a834: 223c movs r2, #60 ; 0x3c - 800a836: 5c9b ldrb r3, [r3, r2] - 800a838: 2b01 cmp r3, #1 - 800a83a: d101 bne.n 800a840 - 800a83c: 2302 movs r3, #2 - 800a83e: e04f b.n 800a8e0 - 800a840: 687b ldr r3, [r7, #4] - 800a842: 223c movs r2, #60 ; 0x3c - 800a844: 2101 movs r1, #1 - 800a846: 5499 strb r1, [r3, r2] + 800aaba: 687b ldr r3, [r7, #4] + 800aabc: 223c movs r2, #60 ; 0x3c + 800aabe: 5c9b ldrb r3, [r3, r2] + 800aac0: 2b01 cmp r3, #1 + 800aac2: d101 bne.n 800aac8 + 800aac4: 2302 movs r3, #2 + 800aac6: e04f b.n 800ab68 + 800aac8: 687b ldr r3, [r7, #4] + 800aaca: 223c movs r2, #60 ; 0x3c + 800aacc: 2101 movs r1, #1 + 800aace: 5499 strb r1, [r3, r2] /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 800a848: 687b ldr r3, [r7, #4] - 800a84a: 223d movs r2, #61 ; 0x3d - 800a84c: 2102 movs r1, #2 - 800a84e: 5499 strb r1, [r3, r2] + 800aad0: 687b ldr r3, [r7, #4] + 800aad2: 223d movs r2, #61 ; 0x3d + 800aad4: 2102 movs r1, #2 + 800aad6: 5499 strb r1, [r3, r2] /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 800a850: 687b ldr r3, [r7, #4] - 800a852: 681b ldr r3, [r3, #0] - 800a854: 685b ldr r3, [r3, #4] - 800a856: 60fb str r3, [r7, #12] + 800aad8: 687b ldr r3, [r7, #4] + 800aada: 681b ldr r3, [r3, #0] + 800aadc: 685b ldr r3, [r3, #4] + 800aade: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 800a858: 687b ldr r3, [r7, #4] - 800a85a: 681b ldr r3, [r3, #0] - 800a85c: 689b ldr r3, [r3, #8] - 800a85e: 60bb str r3, [r7, #8] + 800aae0: 687b ldr r3, [r7, #4] + 800aae2: 681b ldr r3, [r3, #0] + 800aae4: 689b ldr r3, [r3, #8] + 800aae6: 60bb str r3, [r7, #8] /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - 800a860: 687b ldr r3, [r7, #4] - 800a862: 681b ldr r3, [r3, #0] - 800a864: 4a20 ldr r2, [pc, #128] ; (800a8e8 ) - 800a866: 4293 cmp r3, r2 - 800a868: d108 bne.n 800a87c + 800aae8: 687b ldr r3, [r7, #4] + 800aaea: 681b ldr r3, [r3, #0] + 800aaec: 4a20 ldr r2, [pc, #128] ; (800ab70 ) + 800aaee: 4293 cmp r3, r2 + 800aaf0: d108 bne.n 800ab04 { /* Check the parameters */ assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); /* Clear the MMS2 bits */ tmpcr2 &= ~TIM_CR2_MMS2; - 800a86a: 68fb ldr r3, [r7, #12] - 800a86c: 4a1f ldr r2, [pc, #124] ; (800a8ec ) - 800a86e: 4013 ands r3, r2 - 800a870: 60fb str r3, [r7, #12] + 800aaf2: 68fb ldr r3, [r7, #12] + 800aaf4: 4a1f ldr r2, [pc, #124] ; (800ab74 ) + 800aaf6: 4013 ands r3, r2 + 800aaf8: 60fb str r3, [r7, #12] /* Select the TRGO2 source*/ tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - 800a872: 683b ldr r3, [r7, #0] - 800a874: 685b ldr r3, [r3, #4] - 800a876: 68fa ldr r2, [r7, #12] - 800a878: 4313 orrs r3, r2 - 800a87a: 60fb str r3, [r7, #12] + 800aafa: 683b ldr r3, [r7, #0] + 800aafc: 685b ldr r3, [r3, #4] + 800aafe: 68fa ldr r2, [r7, #12] + 800ab00: 4313 orrs r3, r2 + 800ab02: 60fb str r3, [r7, #12] } /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 800a87c: 68fb ldr r3, [r7, #12] - 800a87e: 2270 movs r2, #112 ; 0x70 - 800a880: 4393 bics r3, r2 - 800a882: 60fb str r3, [r7, #12] + 800ab04: 68fb ldr r3, [r7, #12] + 800ab06: 2270 movs r2, #112 ; 0x70 + 800ab08: 4393 bics r3, r2 + 800ab0a: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 800a884: 683b ldr r3, [r7, #0] - 800a886: 681b ldr r3, [r3, #0] - 800a888: 68fa ldr r2, [r7, #12] - 800a88a: 4313 orrs r3, r2 - 800a88c: 60fb str r3, [r7, #12] + 800ab0c: 683b ldr r3, [r7, #0] + 800ab0e: 681b ldr r3, [r3, #0] + 800ab10: 68fa ldr r2, [r7, #12] + 800ab12: 4313 orrs r3, r2 + 800ab14: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 800a88e: 687b ldr r3, [r7, #4] - 800a890: 681b ldr r3, [r3, #0] - 800a892: 68fa ldr r2, [r7, #12] - 800a894: 605a str r2, [r3, #4] + 800ab16: 687b ldr r3, [r7, #4] + 800ab18: 681b ldr r3, [r3, #0] + 800ab1a: 68fa ldr r2, [r7, #12] + 800ab1c: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 800a896: 687b ldr r3, [r7, #4] - 800a898: 681b ldr r3, [r3, #0] - 800a89a: 4a13 ldr r2, [pc, #76] ; (800a8e8 ) - 800a89c: 4293 cmp r3, r2 - 800a89e: d009 beq.n 800a8b4 - 800a8a0: 687b ldr r3, [r7, #4] - 800a8a2: 681b ldr r3, [r3, #0] - 800a8a4: 4a12 ldr r2, [pc, #72] ; (800a8f0 ) - 800a8a6: 4293 cmp r3, r2 - 800a8a8: d004 beq.n 800a8b4 - 800a8aa: 687b ldr r3, [r7, #4] - 800a8ac: 681b ldr r3, [r3, #0] - 800a8ae: 4a11 ldr r2, [pc, #68] ; (800a8f4 ) - 800a8b0: 4293 cmp r3, r2 - 800a8b2: d10c bne.n 800a8ce + 800ab1e: 687b ldr r3, [r7, #4] + 800ab20: 681b ldr r3, [r3, #0] + 800ab22: 4a13 ldr r2, [pc, #76] ; (800ab70 ) + 800ab24: 4293 cmp r3, r2 + 800ab26: d009 beq.n 800ab3c + 800ab28: 687b ldr r3, [r7, #4] + 800ab2a: 681b ldr r3, [r3, #0] + 800ab2c: 4a12 ldr r2, [pc, #72] ; (800ab78 ) + 800ab2e: 4293 cmp r3, r2 + 800ab30: d004 beq.n 800ab3c + 800ab32: 687b ldr r3, [r7, #4] + 800ab34: 681b ldr r3, [r3, #0] + 800ab36: 4a11 ldr r2, [pc, #68] ; (800ab7c ) + 800ab38: 4293 cmp r3, r2 + 800ab3a: d10c bne.n 800ab56 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 800a8b4: 68bb ldr r3, [r7, #8] - 800a8b6: 2280 movs r2, #128 ; 0x80 - 800a8b8: 4393 bics r3, r2 - 800a8ba: 60bb str r3, [r7, #8] + 800ab3c: 68bb ldr r3, [r7, #8] + 800ab3e: 2280 movs r2, #128 ; 0x80 + 800ab40: 4393 bics r3, r2 + 800ab42: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 800a8bc: 683b ldr r3, [r7, #0] - 800a8be: 689b ldr r3, [r3, #8] - 800a8c0: 68ba ldr r2, [r7, #8] - 800a8c2: 4313 orrs r3, r2 - 800a8c4: 60bb str r3, [r7, #8] + 800ab44: 683b ldr r3, [r7, #0] + 800ab46: 689b ldr r3, [r3, #8] + 800ab48: 68ba ldr r2, [r7, #8] + 800ab4a: 4313 orrs r3, r2 + 800ab4c: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 800a8c6: 687b ldr r3, [r7, #4] - 800a8c8: 681b ldr r3, [r3, #0] - 800a8ca: 68ba ldr r2, [r7, #8] - 800a8cc: 609a str r2, [r3, #8] + 800ab4e: 687b ldr r3, [r7, #4] + 800ab50: 681b ldr r3, [r3, #0] + 800ab52: 68ba ldr r2, [r7, #8] + 800ab54: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 800a8ce: 687b ldr r3, [r7, #4] - 800a8d0: 223d movs r2, #61 ; 0x3d - 800a8d2: 2101 movs r1, #1 - 800a8d4: 5499 strb r1, [r3, r2] + 800ab56: 687b ldr r3, [r7, #4] + 800ab58: 223d movs r2, #61 ; 0x3d + 800ab5a: 2101 movs r1, #1 + 800ab5c: 5499 strb r1, [r3, r2] __HAL_UNLOCK(htim); - 800a8d6: 687b ldr r3, [r7, #4] - 800a8d8: 223c movs r2, #60 ; 0x3c - 800a8da: 2100 movs r1, #0 - 800a8dc: 5499 strb r1, [r3, r2] + 800ab5e: 687b ldr r3, [r7, #4] + 800ab60: 223c movs r2, #60 ; 0x3c + 800ab62: 2100 movs r1, #0 + 800ab64: 5499 strb r1, [r3, r2] return HAL_OK; - 800a8de: 2300 movs r3, #0 + 800ab66: 2300 movs r3, #0 } - 800a8e0: 0018 movs r0, r3 - 800a8e2: 46bd mov sp, r7 - 800a8e4: b004 add sp, #16 - 800a8e6: bd80 pop {r7, pc} - 800a8e8: 40012c00 .word 0x40012c00 - 800a8ec: ff0fffff .word 0xff0fffff - 800a8f0: 40000400 .word 0x40000400 - 800a8f4: 40014000 .word 0x40014000 + 800ab68: 0018 movs r0, r3 + 800ab6a: 46bd mov sp, r7 + 800ab6c: b004 add sp, #16 + 800ab6e: bd80 pop {r7, pc} + 800ab70: 40012c00 .word 0x40012c00 + 800ab74: ff0fffff .word 0xff0fffff + 800ab78: 40000400 .word 0x40000400 + 800ab7c: 40014000 .word 0x40014000 -0800a8f8 : +0800ab80 : * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) { - 800a8f8: b580 push {r7, lr} - 800a8fa: b084 sub sp, #16 - 800a8fc: af00 add r7, sp, #0 - 800a8fe: 6078 str r0, [r7, #4] - 800a900: 6039 str r1, [r7, #0] + 800ab80: b580 push {r7, lr} + 800ab82: b084 sub sp, #16 + 800ab84: af00 add r7, sp, #0 + 800ab86: 6078 str r0, [r7, #4] + 800ab88: 6039 str r1, [r7, #0] /* Keep this variable initialized to 0 as it is used to configure BDTR register */ uint32_t tmpbdtr = 0U; - 800a902: 2300 movs r3, #0 - 800a904: 60fb str r3, [r7, #12] + 800ab8a: 2300 movs r3, #0 + 800ab8c: 60fb str r3, [r7, #12] assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); /* Check input state */ __HAL_LOCK(htim); - 800a906: 687b ldr r3, [r7, #4] - 800a908: 223c movs r2, #60 ; 0x3c - 800a90a: 5c9b ldrb r3, [r3, r2] - 800a90c: 2b01 cmp r3, #1 - 800a90e: d101 bne.n 800a914 - 800a910: 2302 movs r3, #2 - 800a912: e079 b.n 800aa08 - 800a914: 687b ldr r3, [r7, #4] - 800a916: 223c movs r2, #60 ; 0x3c - 800a918: 2101 movs r1, #1 - 800a91a: 5499 strb r1, [r3, r2] + 800ab8e: 687b ldr r3, [r7, #4] + 800ab90: 223c movs r2, #60 ; 0x3c + 800ab92: 5c9b ldrb r3, [r3, r2] + 800ab94: 2b01 cmp r3, #1 + 800ab96: d101 bne.n 800ab9c + 800ab98: 2302 movs r3, #2 + 800ab9a: e079 b.n 800ac90 + 800ab9c: 687b ldr r3, [r7, #4] + 800ab9e: 223c movs r2, #60 ; 0x3c + 800aba0: 2101 movs r1, #1 + 800aba2: 5499 strb r1, [r3, r2] /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, the OSSI State, the dead time value and the Automatic Output Enable Bit */ /* Set the BDTR bits */ MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); - 800a91c: 68fb ldr r3, [r7, #12] - 800a91e: 22ff movs r2, #255 ; 0xff - 800a920: 4393 bics r3, r2 - 800a922: 001a movs r2, r3 - 800a924: 683b ldr r3, [r7, #0] - 800a926: 68db ldr r3, [r3, #12] - 800a928: 4313 orrs r3, r2 - 800a92a: 60fb str r3, [r7, #12] + 800aba4: 68fb ldr r3, [r7, #12] + 800aba6: 22ff movs r2, #255 ; 0xff + 800aba8: 4393 bics r3, r2 + 800abaa: 001a movs r2, r3 + 800abac: 683b ldr r3, [r7, #0] + 800abae: 68db ldr r3, [r3, #12] + 800abb0: 4313 orrs r3, r2 + 800abb2: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); - 800a92c: 68fb ldr r3, [r7, #12] - 800a92e: 4a38 ldr r2, [pc, #224] ; (800aa10 ) - 800a930: 401a ands r2, r3 - 800a932: 683b ldr r3, [r7, #0] - 800a934: 689b ldr r3, [r3, #8] - 800a936: 4313 orrs r3, r2 - 800a938: 60fb str r3, [r7, #12] + 800abb4: 68fb ldr r3, [r7, #12] + 800abb6: 4a38 ldr r2, [pc, #224] ; (800ac98 ) + 800abb8: 401a ands r2, r3 + 800abba: 683b ldr r3, [r7, #0] + 800abbc: 689b ldr r3, [r3, #8] + 800abbe: 4313 orrs r3, r2 + 800abc0: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); - 800a93a: 68fb ldr r3, [r7, #12] - 800a93c: 4a35 ldr r2, [pc, #212] ; (800aa14 ) - 800a93e: 401a ands r2, r3 - 800a940: 683b ldr r3, [r7, #0] - 800a942: 685b ldr r3, [r3, #4] - 800a944: 4313 orrs r3, r2 - 800a946: 60fb str r3, [r7, #12] + 800abc2: 68fb ldr r3, [r7, #12] + 800abc4: 4a35 ldr r2, [pc, #212] ; (800ac9c ) + 800abc6: 401a ands r2, r3 + 800abc8: 683b ldr r3, [r7, #0] + 800abca: 685b ldr r3, [r3, #4] + 800abcc: 4313 orrs r3, r2 + 800abce: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); - 800a948: 68fb ldr r3, [r7, #12] - 800a94a: 4a33 ldr r2, [pc, #204] ; (800aa18 ) - 800a94c: 401a ands r2, r3 - 800a94e: 683b ldr r3, [r7, #0] - 800a950: 681b ldr r3, [r3, #0] - 800a952: 4313 orrs r3, r2 - 800a954: 60fb str r3, [r7, #12] + 800abd0: 68fb ldr r3, [r7, #12] + 800abd2: 4a33 ldr r2, [pc, #204] ; (800aca0 ) + 800abd4: 401a ands r2, r3 + 800abd6: 683b ldr r3, [r7, #0] + 800abd8: 681b ldr r3, [r3, #0] + 800abda: 4313 orrs r3, r2 + 800abdc: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); - 800a956: 68fb ldr r3, [r7, #12] - 800a958: 4a30 ldr r2, [pc, #192] ; (800aa1c ) - 800a95a: 401a ands r2, r3 - 800a95c: 683b ldr r3, [r7, #0] - 800a95e: 691b ldr r3, [r3, #16] - 800a960: 4313 orrs r3, r2 - 800a962: 60fb str r3, [r7, #12] + 800abde: 68fb ldr r3, [r7, #12] + 800abe0: 4a30 ldr r2, [pc, #192] ; (800aca4 ) + 800abe2: 401a ands r2, r3 + 800abe4: 683b ldr r3, [r7, #0] + 800abe6: 691b ldr r3, [r3, #16] + 800abe8: 4313 orrs r3, r2 + 800abea: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); - 800a964: 68fb ldr r3, [r7, #12] - 800a966: 4a2e ldr r2, [pc, #184] ; (800aa20 ) - 800a968: 401a ands r2, r3 - 800a96a: 683b ldr r3, [r7, #0] - 800a96c: 695b ldr r3, [r3, #20] - 800a96e: 4313 orrs r3, r2 - 800a970: 60fb str r3, [r7, #12] + 800abec: 68fb ldr r3, [r7, #12] + 800abee: 4a2e ldr r2, [pc, #184] ; (800aca8 ) + 800abf0: 401a ands r2, r3 + 800abf2: 683b ldr r3, [r7, #0] + 800abf4: 695b ldr r3, [r3, #20] + 800abf6: 4313 orrs r3, r2 + 800abf8: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); - 800a972: 68fb ldr r3, [r7, #12] - 800a974: 4a2b ldr r2, [pc, #172] ; (800aa24 ) - 800a976: 401a ands r2, r3 - 800a978: 683b ldr r3, [r7, #0] - 800a97a: 6b1b ldr r3, [r3, #48] ; 0x30 - 800a97c: 4313 orrs r3, r2 - 800a97e: 60fb str r3, [r7, #12] + 800abfa: 68fb ldr r3, [r7, #12] + 800abfc: 4a2b ldr r2, [pc, #172] ; (800acac ) + 800abfe: 401a ands r2, r3 + 800ac00: 683b ldr r3, [r7, #0] + 800ac02: 6b1b ldr r3, [r3, #48] ; 0x30 + 800ac04: 4313 orrs r3, r2 + 800ac06: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); - 800a980: 68fb ldr r3, [r7, #12] - 800a982: 4a29 ldr r2, [pc, #164] ; (800aa28 ) - 800a984: 401a ands r2, r3 - 800a986: 683b ldr r3, [r7, #0] - 800a988: 699b ldr r3, [r3, #24] - 800a98a: 041b lsls r3, r3, #16 - 800a98c: 4313 orrs r3, r2 - 800a98e: 60fb str r3, [r7, #12] + 800ac08: 68fb ldr r3, [r7, #12] + 800ac0a: 4a29 ldr r2, [pc, #164] ; (800acb0 ) + 800ac0c: 401a ands r2, r3 + 800ac0e: 683b ldr r3, [r7, #0] + 800ac10: 699b ldr r3, [r3, #24] + 800ac12: 041b lsls r3, r3, #16 + 800ac14: 4313 orrs r3, r2 + 800ac16: 60fb str r3, [r7, #12] if (IS_TIM_ADVANCED_INSTANCE(htim->Instance)) - 800a990: 687b ldr r3, [r7, #4] - 800a992: 681b ldr r3, [r3, #0] - 800a994: 4a25 ldr r2, [pc, #148] ; (800aa2c ) - 800a996: 4293 cmp r3, r2 - 800a998: d106 bne.n 800a9a8 + 800ac18: 687b ldr r3, [r7, #4] + 800ac1a: 681b ldr r3, [r3, #0] + 800ac1c: 4a25 ldr r2, [pc, #148] ; (800acb4 ) + 800ac1e: 4293 cmp r3, r2 + 800ac20: d106 bne.n 800ac30 { /* Check the parameters */ assert_param(IS_TIM_BREAK_AFMODE(sBreakDeadTimeConfig->BreakAFMode)); /* Set BREAK AF mode */ MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode); - 800a99a: 68fb ldr r3, [r7, #12] - 800a99c: 4a24 ldr r2, [pc, #144] ; (800aa30 ) - 800a99e: 401a ands r2, r3 - 800a9a0: 683b ldr r3, [r7, #0] - 800a9a2: 69db ldr r3, [r3, #28] - 800a9a4: 4313 orrs r3, r2 - 800a9a6: 60fb str r3, [r7, #12] + 800ac22: 68fb ldr r3, [r7, #12] + 800ac24: 4a24 ldr r2, [pc, #144] ; (800acb8 ) + 800ac26: 401a ands r2, r3 + 800ac28: 683b ldr r3, [r7, #0] + 800ac2a: 69db ldr r3, [r3, #28] + 800ac2c: 4313 orrs r3, r2 + 800ac2e: 60fb str r3, [r7, #12] } if (IS_TIM_BKIN2_INSTANCE(htim->Instance)) - 800a9a8: 687b ldr r3, [r7, #4] - 800a9aa: 681b ldr r3, [r3, #0] - 800a9ac: 4a1f ldr r2, [pc, #124] ; (800aa2c ) - 800a9ae: 4293 cmp r3, r2 - 800a9b0: d121 bne.n 800a9f6 + 800ac30: 687b ldr r3, [r7, #4] + 800ac32: 681b ldr r3, [r3, #0] + 800ac34: 4a1f ldr r2, [pc, #124] ; (800acb4 ) + 800ac36: 4293 cmp r3, r2 + 800ac38: d121 bne.n 800ac7e assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); /* Set the BREAK2 input related BDTR bits */ MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos)); - 800a9b2: 68fb ldr r3, [r7, #12] - 800a9b4: 4a1f ldr r2, [pc, #124] ; (800aa34 ) - 800a9b6: 401a ands r2, r3 - 800a9b8: 683b ldr r3, [r7, #0] - 800a9ba: 6a9b ldr r3, [r3, #40] ; 0x28 - 800a9bc: 051b lsls r3, r3, #20 - 800a9be: 4313 orrs r3, r2 - 800a9c0: 60fb str r3, [r7, #12] + 800ac3a: 68fb ldr r3, [r7, #12] + 800ac3c: 4a1f ldr r2, [pc, #124] ; (800acbc ) + 800ac3e: 401a ands r2, r3 + 800ac40: 683b ldr r3, [r7, #0] + 800ac42: 6a9b ldr r3, [r3, #40] ; 0x28 + 800ac44: 051b lsls r3, r3, #20 + 800ac46: 4313 orrs r3, r2 + 800ac48: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State); - 800a9c2: 68fb ldr r3, [r7, #12] - 800a9c4: 4a1c ldr r2, [pc, #112] ; (800aa38 ) - 800a9c6: 401a ands r2, r3 - 800a9c8: 683b ldr r3, [r7, #0] - 800a9ca: 6a1b ldr r3, [r3, #32] - 800a9cc: 4313 orrs r3, r2 - 800a9ce: 60fb str r3, [r7, #12] + 800ac4a: 68fb ldr r3, [r7, #12] + 800ac4c: 4a1c ldr r2, [pc, #112] ; (800acc0 ) + 800ac4e: 401a ands r2, r3 + 800ac50: 683b ldr r3, [r7, #0] + 800ac52: 6a1b ldr r3, [r3, #32] + 800ac54: 4313 orrs r3, r2 + 800ac56: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); - 800a9d0: 68fb ldr r3, [r7, #12] - 800a9d2: 4a1a ldr r2, [pc, #104] ; (800aa3c ) - 800a9d4: 401a ands r2, r3 - 800a9d6: 683b ldr r3, [r7, #0] - 800a9d8: 6a5b ldr r3, [r3, #36] ; 0x24 - 800a9da: 4313 orrs r3, r2 - 800a9dc: 60fb str r3, [r7, #12] + 800ac58: 68fb ldr r3, [r7, #12] + 800ac5a: 4a1a ldr r2, [pc, #104] ; (800acc4 ) + 800ac5c: 401a ands r2, r3 + 800ac5e: 683b ldr r3, [r7, #0] + 800ac60: 6a5b ldr r3, [r3, #36] ; 0x24 + 800ac62: 4313 orrs r3, r2 + 800ac64: 60fb str r3, [r7, #12] if (IS_TIM_ADVANCED_INSTANCE(htim->Instance)) - 800a9de: 687b ldr r3, [r7, #4] - 800a9e0: 681b ldr r3, [r3, #0] - 800a9e2: 4a12 ldr r2, [pc, #72] ; (800aa2c ) - 800a9e4: 4293 cmp r3, r2 - 800a9e6: d106 bne.n 800a9f6 + 800ac66: 687b ldr r3, [r7, #4] + 800ac68: 681b ldr r3, [r3, #0] + 800ac6a: 4a12 ldr r2, [pc, #72] ; (800acb4 ) + 800ac6c: 4293 cmp r3, r2 + 800ac6e: d106 bne.n 800ac7e { /* Check the parameters */ assert_param(IS_TIM_BREAK2_AFMODE(sBreakDeadTimeConfig->Break2AFMode)); /* Set BREAK2 AF mode */ MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, sBreakDeadTimeConfig->Break2AFMode); - 800a9e8: 68fb ldr r3, [r7, #12] - 800a9ea: 4a15 ldr r2, [pc, #84] ; (800aa40 ) - 800a9ec: 401a ands r2, r3 - 800a9ee: 683b ldr r3, [r7, #0] - 800a9f0: 6adb ldr r3, [r3, #44] ; 0x2c - 800a9f2: 4313 orrs r3, r2 - 800a9f4: 60fb str r3, [r7, #12] + 800ac70: 68fb ldr r3, [r7, #12] + 800ac72: 4a15 ldr r2, [pc, #84] ; (800acc8 ) + 800ac74: 401a ands r2, r3 + 800ac76: 683b ldr r3, [r7, #0] + 800ac78: 6adb ldr r3, [r3, #44] ; 0x2c + 800ac7a: 4313 orrs r3, r2 + 800ac7c: 60fb str r3, [r7, #12] } } /* Set TIMx_BDTR */ htim->Instance->BDTR = tmpbdtr; - 800a9f6: 687b ldr r3, [r7, #4] - 800a9f8: 681b ldr r3, [r3, #0] - 800a9fa: 68fa ldr r2, [r7, #12] - 800a9fc: 645a str r2, [r3, #68] ; 0x44 + 800ac7e: 687b ldr r3, [r7, #4] + 800ac80: 681b ldr r3, [r3, #0] + 800ac82: 68fa ldr r2, [r7, #12] + 800ac84: 645a str r2, [r3, #68] ; 0x44 __HAL_UNLOCK(htim); - 800a9fe: 687b ldr r3, [r7, #4] - 800aa00: 223c movs r2, #60 ; 0x3c - 800aa02: 2100 movs r1, #0 - 800aa04: 5499 strb r1, [r3, r2] + 800ac86: 687b ldr r3, [r7, #4] + 800ac88: 223c movs r2, #60 ; 0x3c + 800ac8a: 2100 movs r1, #0 + 800ac8c: 5499 strb r1, [r3, r2] return HAL_OK; - 800aa06: 2300 movs r3, #0 + 800ac8e: 2300 movs r3, #0 } - 800aa08: 0018 movs r0, r3 - 800aa0a: 46bd mov sp, r7 - 800aa0c: b004 add sp, #16 - 800aa0e: bd80 pop {r7, pc} - 800aa10: fffffcff .word 0xfffffcff - 800aa14: fffffbff .word 0xfffffbff - 800aa18: fffff7ff .word 0xfffff7ff - 800aa1c: ffffefff .word 0xffffefff - 800aa20: ffffdfff .word 0xffffdfff - 800aa24: ffffbfff .word 0xffffbfff - 800aa28: fff0ffff .word 0xfff0ffff - 800aa2c: 40012c00 .word 0x40012c00 - 800aa30: efffffff .word 0xefffffff - 800aa34: ff0fffff .word 0xff0fffff - 800aa38: feffffff .word 0xfeffffff - 800aa3c: fdffffff .word 0xfdffffff - 800aa40: dfffffff .word 0xdfffffff + 800ac90: 0018 movs r0, r3 + 800ac92: 46bd mov sp, r7 + 800ac94: b004 add sp, #16 + 800ac96: bd80 pop {r7, pc} + 800ac98: fffffcff .word 0xfffffcff + 800ac9c: fffffbff .word 0xfffffbff + 800aca0: fffff7ff .word 0xfffff7ff + 800aca4: ffffefff .word 0xffffefff + 800aca8: ffffdfff .word 0xffffdfff + 800acac: ffffbfff .word 0xffffbfff + 800acb0: fff0ffff .word 0xfff0ffff + 800acb4: 40012c00 .word 0x40012c00 + 800acb8: efffffff .word 0xefffffff + 800acbc: ff0fffff .word 0xff0fffff + 800acc0: feffffff .word 0xfeffffff + 800acc4: fdffffff .word 0xfdffffff + 800acc8: dfffffff .word 0xdfffffff -0800aa44 : +0800accc : * @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { - 800aa44: b580 push {r7, lr} - 800aa46: b082 sub sp, #8 - 800aa48: af00 add r7, sp, #0 - 800aa4a: 6078 str r0, [r7, #4] + 800accc: b580 push {r7, lr} + 800acce: b082 sub sp, #8 + 800acd0: af00 add r7, sp, #0 + 800acd2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } - 800aa4c: 46c0 nop ; (mov r8, r8) - 800aa4e: 46bd mov sp, r7 - 800aa50: b002 add sp, #8 - 800aa52: bd80 pop {r7, pc} + 800acd4: 46c0 nop ; (mov r8, r8) + 800acd6: 46bd mov sp, r7 + 800acd8: b002 add sp, #8 + 800acda: bd80 pop {r7, pc} -0800aa54 : +0800acdc : * @brief Hall Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { - 800aa54: b580 push {r7, lr} - 800aa56: b082 sub sp, #8 - 800aa58: af00 add r7, sp, #0 - 800aa5a: 6078 str r0, [r7, #4] + 800acdc: b580 push {r7, lr} + 800acde: b082 sub sp, #8 + 800ace0: af00 add r7, sp, #0 + 800ace2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } - 800aa5c: 46c0 nop ; (mov r8, r8) - 800aa5e: 46bd mov sp, r7 - 800aa60: b002 add sp, #8 - 800aa62: bd80 pop {r7, pc} + 800ace4: 46c0 nop ; (mov r8, r8) + 800ace6: 46bd mov sp, r7 + 800ace8: b002 add sp, #8 + 800acea: bd80 pop {r7, pc} -0800aa64 : +0800acec : * @brief Hall Break2 detection callback in non blocking mode * @param htim: TIM handle * @retval None */ __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) { - 800aa64: b580 push {r7, lr} - 800aa66: b082 sub sp, #8 - 800aa68: af00 add r7, sp, #0 - 800aa6a: 6078 str r0, [r7, #4] + 800acec: b580 push {r7, lr} + 800acee: b082 sub sp, #8 + 800acf0: af00 add r7, sp, #0 + 800acf2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_TIMEx_Break2Callback could be implemented in the user file */ } - 800aa6c: 46c0 nop ; (mov r8, r8) - 800aa6e: 46bd mov sp, r7 - 800aa70: b002 add sp, #8 - 800aa72: bd80 pop {r7, pc} + 800acf4: 46c0 nop ; (mov r8, r8) + 800acf6: 46bd mov sp, r7 + 800acf8: b002 add sp, #8 + 800acfa: bd80 pop {r7, pc} -0800aa74 <__NVIC_SetPriority>: +0800acfc : + * parameters in the UART_InitTypeDef and initialize the associated handle. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 800aa74: b590 push {r4, r7, lr} - 800aa76: b083 sub sp, #12 - 800aa78: af00 add r7, sp, #0 - 800aa7a: 0002 movs r2, r0 - 800aa7c: 6039 str r1, [r7, #0] - 800aa7e: 1dfb adds r3, r7, #7 - 800aa80: 701a strb r2, [r3, #0] - if ((int32_t)(IRQn) >= 0) - 800aa82: 1dfb adds r3, r7, #7 - 800aa84: 781b ldrb r3, [r3, #0] - 800aa86: 2b7f cmp r3, #127 ; 0x7f - 800aa88: d828 bhi.n 800aadc <__NVIC_SetPriority+0x68> - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 800aa8a: 4a2f ldr r2, [pc, #188] ; (800ab48 <__NVIC_SetPriority+0xd4>) - 800aa8c: 1dfb adds r3, r7, #7 - 800aa8e: 781b ldrb r3, [r3, #0] - 800aa90: b25b sxtb r3, r3 - 800aa92: 089b lsrs r3, r3, #2 - 800aa94: 33c0 adds r3, #192 ; 0xc0 - 800aa96: 009b lsls r3, r3, #2 - 800aa98: 589b ldr r3, [r3, r2] - 800aa9a: 1dfa adds r2, r7, #7 - 800aa9c: 7812 ldrb r2, [r2, #0] - 800aa9e: 0011 movs r1, r2 - 800aaa0: 2203 movs r2, #3 - 800aaa2: 400a ands r2, r1 - 800aaa4: 00d2 lsls r2, r2, #3 - 800aaa6: 21ff movs r1, #255 ; 0xff - 800aaa8: 4091 lsls r1, r2 - 800aaaa: 000a movs r2, r1 - 800aaac: 43d2 mvns r2, r2 - 800aaae: 401a ands r2, r3 - 800aab0: 0011 movs r1, r2 - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 800aab2: 683b ldr r3, [r7, #0] - 800aab4: 019b lsls r3, r3, #6 - 800aab6: 22ff movs r2, #255 ; 0xff - 800aab8: 401a ands r2, r3 - 800aaba: 1dfb adds r3, r7, #7 - 800aabc: 781b ldrb r3, [r3, #0] - 800aabe: 0018 movs r0, r3 - 800aac0: 2303 movs r3, #3 - 800aac2: 4003 ands r3, r0 - 800aac4: 00db lsls r3, r3, #3 - 800aac6: 409a lsls r2, r3 - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 800aac8: 481f ldr r0, [pc, #124] ; (800ab48 <__NVIC_SetPriority+0xd4>) - 800aaca: 1dfb adds r3, r7, #7 - 800aacc: 781b ldrb r3, [r3, #0] - 800aace: b25b sxtb r3, r3 - 800aad0: 089b lsrs r3, r3, #2 - 800aad2: 430a orrs r2, r1 - 800aad4: 33c0 adds r3, #192 ; 0xc0 - 800aad6: 009b lsls r3, r3, #2 - 800aad8: 501a str r2, [r3, r0] -} - 800aada: e031 b.n 800ab40 <__NVIC_SetPriority+0xcc> - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 800aadc: 4a1b ldr r2, [pc, #108] ; (800ab4c <__NVIC_SetPriority+0xd8>) - 800aade: 1dfb adds r3, r7, #7 - 800aae0: 781b ldrb r3, [r3, #0] - 800aae2: 0019 movs r1, r3 - 800aae4: 230f movs r3, #15 - 800aae6: 400b ands r3, r1 - 800aae8: 3b08 subs r3, #8 - 800aaea: 089b lsrs r3, r3, #2 - 800aaec: 3306 adds r3, #6 - 800aaee: 009b lsls r3, r3, #2 - 800aaf0: 18d3 adds r3, r2, r3 - 800aaf2: 3304 adds r3, #4 - 800aaf4: 681b ldr r3, [r3, #0] - 800aaf6: 1dfa adds r2, r7, #7 - 800aaf8: 7812 ldrb r2, [r2, #0] - 800aafa: 0011 movs r1, r2 - 800aafc: 2203 movs r2, #3 - 800aafe: 400a ands r2, r1 - 800ab00: 00d2 lsls r2, r2, #3 - 800ab02: 21ff movs r1, #255 ; 0xff - 800ab04: 4091 lsls r1, r2 - 800ab06: 000a movs r2, r1 - 800ab08: 43d2 mvns r2, r2 - 800ab0a: 401a ands r2, r3 - 800ab0c: 0011 movs r1, r2 - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 800ab0e: 683b ldr r3, [r7, #0] - 800ab10: 019b lsls r3, r3, #6 - 800ab12: 22ff movs r2, #255 ; 0xff - 800ab14: 401a ands r2, r3 - 800ab16: 1dfb adds r3, r7, #7 - 800ab18: 781b ldrb r3, [r3, #0] - 800ab1a: 0018 movs r0, r3 - 800ab1c: 2303 movs r3, #3 - 800ab1e: 4003 ands r3, r0 - 800ab20: 00db lsls r3, r3, #3 - 800ab22: 409a lsls r2, r3 - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 800ab24: 4809 ldr r0, [pc, #36] ; (800ab4c <__NVIC_SetPriority+0xd8>) - 800ab26: 1dfb adds r3, r7, #7 - 800ab28: 781b ldrb r3, [r3, #0] - 800ab2a: 001c movs r4, r3 - 800ab2c: 230f movs r3, #15 - 800ab2e: 4023 ands r3, r4 - 800ab30: 3b08 subs r3, #8 - 800ab32: 089b lsrs r3, r3, #2 - 800ab34: 430a orrs r2, r1 - 800ab36: 3306 adds r3, #6 - 800ab38: 009b lsls r3, r3, #2 - 800ab3a: 18c3 adds r3, r0, r3 - 800ab3c: 3304 adds r3, #4 - 800ab3e: 601a str r2, [r3, #0] -} - 800ab40: 46c0 nop ; (mov r8, r8) - 800ab42: 46bd mov sp, r7 - 800ab44: b003 add sp, #12 - 800ab46: bd90 pop {r4, r7, pc} - 800ab48: e000e100 .word 0xe000e100 - 800ab4c: e000ed00 .word 0xe000ed00 + 800acfc: b580 push {r7, lr} + 800acfe: b082 sub sp, #8 + 800ad00: af00 add r7, sp, #0 + 800ad02: 6078 str r0, [r7, #4] + /* Check the UART handle allocation */ + if (huart == NULL) + 800ad04: 687b ldr r3, [r7, #4] + 800ad06: 2b00 cmp r3, #0 + 800ad08: d101 bne.n 800ad0e + { + return HAL_ERROR; + 800ad0a: 2301 movs r3, #1 + 800ad0c: e046 b.n 800ad9c + { + /* Check the parameters */ + assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); + } -0800ab50 : + if (huart->gState == HAL_UART_STATE_RESET) + 800ad0e: 687b ldr r3, [r7, #4] + 800ad10: 2288 movs r2, #136 ; 0x88 + 800ad12: 589b ldr r3, [r3, r2] + 800ad14: 2b00 cmp r3, #0 + 800ad16: d107 bne.n 800ad28 + { + /* Allocate lock resource and initialize it */ + huart->Lock = HAL_UNLOCKED; + 800ad18: 687b ldr r3, [r7, #4] + 800ad1a: 2284 movs r2, #132 ; 0x84 + 800ad1c: 2100 movs r1, #0 + 800ad1e: 5499 strb r1, [r3, r2] + + /* Init the low level hardware */ + huart->MspInitCallback(huart); +#else + /* Init the low level hardware : GPIO, CLOCK */ + HAL_UART_MspInit(huart); + 800ad20: 687b ldr r3, [r7, #4] + 800ad22: 0018 movs r0, r3 + 800ad24: f7fb f9de bl 80060e4 +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + + huart->gState = HAL_UART_STATE_BUSY; + 800ad28: 687b ldr r3, [r7, #4] + 800ad2a: 2288 movs r2, #136 ; 0x88 + 800ad2c: 2124 movs r1, #36 ; 0x24 + 800ad2e: 5099 str r1, [r3, r2] + + __HAL_UART_DISABLE(huart); + 800ad30: 687b ldr r3, [r7, #4] + 800ad32: 681b ldr r3, [r3, #0] + 800ad34: 681a ldr r2, [r3, #0] + 800ad36: 687b ldr r3, [r7, #4] + 800ad38: 681b ldr r3, [r3, #0] + 800ad3a: 2101 movs r1, #1 + 800ad3c: 438a bics r2, r1 + 800ad3e: 601a str r2, [r3, #0] + + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) + 800ad40: 687b ldr r3, [r7, #4] + 800ad42: 0018 movs r0, r3 + 800ad44: f000 f830 bl 800ada8 + 800ad48: 0003 movs r3, r0 + 800ad4a: 2b01 cmp r3, #1 + 800ad4c: d101 bne.n 800ad52 + { + return HAL_ERROR; + 800ad4e: 2301 movs r3, #1 + 800ad50: e024 b.n 800ad9c + } + + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + 800ad52: 687b ldr r3, [r7, #4] + 800ad54: 6a9b ldr r3, [r3, #40] ; 0x28 + 800ad56: 2b00 cmp r3, #0 + 800ad58: d003 beq.n 800ad62 + { + UART_AdvFeatureConfig(huart); + 800ad5a: 687b ldr r3, [r7, #4] + 800ad5c: 0018 movs r0, r3 + 800ad5e: f000 f9c7 bl 800b0f0 + } + + /* In asynchronous mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ + CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + 800ad62: 687b ldr r3, [r7, #4] + 800ad64: 681b ldr r3, [r3, #0] + 800ad66: 685a ldr r2, [r3, #4] + 800ad68: 687b ldr r3, [r7, #4] + 800ad6a: 681b ldr r3, [r3, #0] + 800ad6c: 490d ldr r1, [pc, #52] ; (800ada4 ) + 800ad6e: 400a ands r2, r1 + 800ad70: 605a str r2, [r3, #4] + CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); + 800ad72: 687b ldr r3, [r7, #4] + 800ad74: 681b ldr r3, [r3, #0] + 800ad76: 689a ldr r2, [r3, #8] + 800ad78: 687b ldr r3, [r7, #4] + 800ad7a: 681b ldr r3, [r3, #0] + 800ad7c: 212a movs r1, #42 ; 0x2a + 800ad7e: 438a bics r2, r1 + 800ad80: 609a str r2, [r3, #8] + + __HAL_UART_ENABLE(huart); + 800ad82: 687b ldr r3, [r7, #4] + 800ad84: 681b ldr r3, [r3, #0] + 800ad86: 681a ldr r2, [r3, #0] + 800ad88: 687b ldr r3, [r7, #4] + 800ad8a: 681b ldr r3, [r3, #0] + 800ad8c: 2101 movs r1, #1 + 800ad8e: 430a orrs r2, r1 + 800ad90: 601a str r2, [r3, #0] + + /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + return (UART_CheckIdleState(huart)); + 800ad92: 687b ldr r3, [r7, #4] + 800ad94: 0018 movs r0, r3 + 800ad96: f000 fa5f bl 800b258 + 800ad9a: 0003 movs r3, r0 +} + 800ad9c: 0018 movs r0, r3 + 800ad9e: 46bd mov sp, r7 + 800ada0: b002 add sp, #8 + 800ada2: bd80 pop {r7, pc} + 800ada4: ffffb7ff .word 0xffffb7ff + +0800ada8 : + * @brief Configure the UART peripheral. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) +{ + 800ada8: b580 push {r7, lr} + 800adaa: b088 sub sp, #32 + 800adac: af00 add r7, sp, #0 + 800adae: 6078 str r0, [r7, #4] + uint32_t tmpreg; + uint16_t brrtemp; + UART_ClockSourceTypeDef clocksource; + uint32_t usartdiv; + HAL_StatusTypeDef ret = HAL_OK; + 800adb0: 231a movs r3, #26 + 800adb2: 18fb adds r3, r7, r3 + 800adb4: 2200 movs r2, #0 + 800adb6: 701a strb r2, [r3, #0] + * the UART Word Length, Parity, Mode and oversampling: + * set the M bits according to huart->Init.WordLength value + * set PCE and PS bits according to huart->Init.Parity value + * set TE and RE bits according to huart->Init.Mode value + * set OVER8 bit according to huart->Init.OverSampling value */ + tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; + 800adb8: 687b ldr r3, [r7, #4] + 800adba: 689a ldr r2, [r3, #8] + 800adbc: 687b ldr r3, [r7, #4] + 800adbe: 691b ldr r3, [r3, #16] + 800adc0: 431a orrs r2, r3 + 800adc2: 687b ldr r3, [r7, #4] + 800adc4: 695b ldr r3, [r3, #20] + 800adc6: 431a orrs r2, r3 + 800adc8: 687b ldr r3, [r7, #4] + 800adca: 69db ldr r3, [r3, #28] + 800adcc: 4313 orrs r3, r2 + 800adce: 61fb str r3, [r7, #28] + MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 800add0: 687b ldr r3, [r7, #4] + 800add2: 681b ldr r3, [r3, #0] + 800add4: 681b ldr r3, [r3, #0] + 800add6: 4abc ldr r2, [pc, #752] ; (800b0c8 ) + 800add8: 4013 ands r3, r2 + 800adda: 0019 movs r1, r3 + 800addc: 687b ldr r3, [r7, #4] + 800adde: 681b ldr r3, [r3, #0] + 800ade0: 69fa ldr r2, [r7, #28] + 800ade2: 430a orrs r2, r1 + 800ade4: 601a str r2, [r3, #0] + + /*-------------------------- USART CR2 Configuration -----------------------*/ + /* Configure the UART Stop Bits: Set STOP[13:12] bits according + * to huart->Init.StopBits value */ + MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); + 800ade6: 687b ldr r3, [r7, #4] + 800ade8: 681b ldr r3, [r3, #0] + 800adea: 685b ldr r3, [r3, #4] + 800adec: 4ab7 ldr r2, [pc, #732] ; (800b0cc ) + 800adee: 4013 ands r3, r2 + 800adf0: 0019 movs r1, r3 + 800adf2: 687b ldr r3, [r7, #4] + 800adf4: 68da ldr r2, [r3, #12] + 800adf6: 687b ldr r3, [r7, #4] + 800adf8: 681b ldr r3, [r3, #0] + 800adfa: 430a orrs r2, r1 + 800adfc: 605a str r2, [r3, #4] + /* Configure + * - UART HardWare Flow Control: set CTSE and RTSE bits according + * to huart->Init.HwFlowCtl value + * - one-bit sampling method versus three samples' majority rule according + * to huart->Init.OneBitSampling (not applicable to LPUART) */ + tmpreg = (uint32_t)huart->Init.HwFlowCtl; + 800adfe: 687b ldr r3, [r7, #4] + 800ae00: 699b ldr r3, [r3, #24] + 800ae02: 61fb str r3, [r7, #28] + + if (!(UART_INSTANCE_LOWPOWER(huart))) + { + tmpreg |= huart->Init.OneBitSampling; + 800ae04: 687b ldr r3, [r7, #4] + 800ae06: 6a1b ldr r3, [r3, #32] + 800ae08: 69fa ldr r2, [r7, #28] + 800ae0a: 4313 orrs r3, r2 + 800ae0c: 61fb str r3, [r7, #28] + } + MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); + 800ae0e: 687b ldr r3, [r7, #4] + 800ae10: 681b ldr r3, [r3, #0] + 800ae12: 689b ldr r3, [r3, #8] + 800ae14: 4aae ldr r2, [pc, #696] ; (800b0d0 ) + 800ae16: 4013 ands r3, r2 + 800ae18: 0019 movs r1, r3 + 800ae1a: 687b ldr r3, [r7, #4] + 800ae1c: 681b ldr r3, [r3, #0] + 800ae1e: 69fa ldr r2, [r7, #28] + 800ae20: 430a orrs r2, r1 + 800ae22: 609a str r2, [r3, #8] + + /*-------------------------- USART PRESC Configuration -----------------------*/ + /* Configure + * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ + MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); + 800ae24: 687b ldr r3, [r7, #4] + 800ae26: 681b ldr r3, [r3, #0] + 800ae28: 6adb ldr r3, [r3, #44] ; 0x2c + 800ae2a: 220f movs r2, #15 + 800ae2c: 4393 bics r3, r2 + 800ae2e: 0019 movs r1, r3 + 800ae30: 687b ldr r3, [r7, #4] + 800ae32: 6a5a ldr r2, [r3, #36] ; 0x24 + 800ae34: 687b ldr r3, [r7, #4] + 800ae36: 681b ldr r3, [r3, #0] + 800ae38: 430a orrs r2, r1 + 800ae3a: 62da str r2, [r3, #44] ; 0x2c + + /*-------------------------- USART BRR Configuration -----------------------*/ + UART_GETCLOCKSOURCE(huart, clocksource); + 800ae3c: 687b ldr r3, [r7, #4] + 800ae3e: 681b ldr r3, [r3, #0] + 800ae40: 4aa4 ldr r2, [pc, #656] ; (800b0d4 ) + 800ae42: 4293 cmp r3, r2 + 800ae44: d127 bne.n 800ae96 + 800ae46: 4ba4 ldr r3, [pc, #656] ; (800b0d8 ) + 800ae48: 6d5b ldr r3, [r3, #84] ; 0x54 + 800ae4a: 2203 movs r2, #3 + 800ae4c: 4013 ands r3, r2 + 800ae4e: 2b03 cmp r3, #3 + 800ae50: d017 beq.n 800ae82 + 800ae52: d81b bhi.n 800ae8c + 800ae54: 2b02 cmp r3, #2 + 800ae56: d00a beq.n 800ae6e + 800ae58: d818 bhi.n 800ae8c + 800ae5a: 2b00 cmp r3, #0 + 800ae5c: d002 beq.n 800ae64 + 800ae5e: 2b01 cmp r3, #1 + 800ae60: d00a beq.n 800ae78 + 800ae62: e013 b.n 800ae8c + 800ae64: 231b movs r3, #27 + 800ae66: 18fb adds r3, r7, r3 + 800ae68: 2200 movs r2, #0 + 800ae6a: 701a strb r2, [r3, #0] + 800ae6c: e058 b.n 800af20 + 800ae6e: 231b movs r3, #27 + 800ae70: 18fb adds r3, r7, r3 + 800ae72: 2202 movs r2, #2 + 800ae74: 701a strb r2, [r3, #0] + 800ae76: e053 b.n 800af20 + 800ae78: 231b movs r3, #27 + 800ae7a: 18fb adds r3, r7, r3 + 800ae7c: 2204 movs r2, #4 + 800ae7e: 701a strb r2, [r3, #0] + 800ae80: e04e b.n 800af20 + 800ae82: 231b movs r3, #27 + 800ae84: 18fb adds r3, r7, r3 + 800ae86: 2208 movs r2, #8 + 800ae88: 701a strb r2, [r3, #0] + 800ae8a: e049 b.n 800af20 + 800ae8c: 231b movs r3, #27 + 800ae8e: 18fb adds r3, r7, r3 + 800ae90: 2210 movs r2, #16 + 800ae92: 701a strb r2, [r3, #0] + 800ae94: e044 b.n 800af20 + 800ae96: 687b ldr r3, [r7, #4] + 800ae98: 681b ldr r3, [r3, #0] + 800ae9a: 4a90 ldr r2, [pc, #576] ; (800b0dc ) + 800ae9c: 4293 cmp r3, r2 + 800ae9e: d127 bne.n 800aef0 + 800aea0: 4b8d ldr r3, [pc, #564] ; (800b0d8 ) + 800aea2: 6d5b ldr r3, [r3, #84] ; 0x54 + 800aea4: 220c movs r2, #12 + 800aea6: 4013 ands r3, r2 + 800aea8: 2b0c cmp r3, #12 + 800aeaa: d017 beq.n 800aedc + 800aeac: d81b bhi.n 800aee6 + 800aeae: 2b08 cmp r3, #8 + 800aeb0: d00a beq.n 800aec8 + 800aeb2: d818 bhi.n 800aee6 + 800aeb4: 2b00 cmp r3, #0 + 800aeb6: d002 beq.n 800aebe + 800aeb8: 2b04 cmp r3, #4 + 800aeba: d00a beq.n 800aed2 + 800aebc: e013 b.n 800aee6 + 800aebe: 231b movs r3, #27 + 800aec0: 18fb adds r3, r7, r3 + 800aec2: 2200 movs r2, #0 + 800aec4: 701a strb r2, [r3, #0] + 800aec6: e02b b.n 800af20 + 800aec8: 231b movs r3, #27 + 800aeca: 18fb adds r3, r7, r3 + 800aecc: 2202 movs r2, #2 + 800aece: 701a strb r2, [r3, #0] + 800aed0: e026 b.n 800af20 + 800aed2: 231b movs r3, #27 + 800aed4: 18fb adds r3, r7, r3 + 800aed6: 2204 movs r2, #4 + 800aed8: 701a strb r2, [r3, #0] + 800aeda: e021 b.n 800af20 + 800aedc: 231b movs r3, #27 + 800aede: 18fb adds r3, r7, r3 + 800aee0: 2208 movs r2, #8 + 800aee2: 701a strb r2, [r3, #0] + 800aee4: e01c b.n 800af20 + 800aee6: 231b movs r3, #27 + 800aee8: 18fb adds r3, r7, r3 + 800aeea: 2210 movs r2, #16 + 800aeec: 701a strb r2, [r3, #0] + 800aeee: e017 b.n 800af20 + 800aef0: 687b ldr r3, [r7, #4] + 800aef2: 681b ldr r3, [r3, #0] + 800aef4: 4a7a ldr r2, [pc, #488] ; (800b0e0 ) + 800aef6: 4293 cmp r3, r2 + 800aef8: d104 bne.n 800af04 + 800aefa: 231b movs r3, #27 + 800aefc: 18fb adds r3, r7, r3 + 800aefe: 2200 movs r2, #0 + 800af00: 701a strb r2, [r3, #0] + 800af02: e00d b.n 800af20 + 800af04: 687b ldr r3, [r7, #4] + 800af06: 681b ldr r3, [r3, #0] + 800af08: 4a76 ldr r2, [pc, #472] ; (800b0e4 ) + 800af0a: 4293 cmp r3, r2 + 800af0c: d104 bne.n 800af18 + 800af0e: 231b movs r3, #27 + 800af10: 18fb adds r3, r7, r3 + 800af12: 2200 movs r2, #0 + 800af14: 701a strb r2, [r3, #0] + 800af16: e003 b.n 800af20 + 800af18: 231b movs r3, #27 + 800af1a: 18fb adds r3, r7, r3 + 800af1c: 2210 movs r2, #16 + 800af1e: 701a strb r2, [r3, #0] + } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || + (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */ + } /* if (pclk != 0) */ + } + /* Check UART Over Sampling to set Baud Rate Register */ + else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) + 800af20: 687b ldr r3, [r7, #4] + 800af22: 69da ldr r2, [r3, #28] + 800af24: 2380 movs r3, #128 ; 0x80 + 800af26: 021b lsls r3, r3, #8 + 800af28: 429a cmp r2, r3 + 800af2a: d000 beq.n 800af2e + 800af2c: e065 b.n 800affa + { + switch (clocksource) + 800af2e: 231b movs r3, #27 + 800af30: 18fb adds r3, r7, r3 + 800af32: 781b ldrb r3, [r3, #0] + 800af34: 2b08 cmp r3, #8 + 800af36: d015 beq.n 800af64 + 800af38: dc18 bgt.n 800af6c + 800af3a: 2b04 cmp r3, #4 + 800af3c: d00d beq.n 800af5a + 800af3e: dc15 bgt.n 800af6c + 800af40: 2b00 cmp r3, #0 + 800af42: d002 beq.n 800af4a + 800af44: 2b02 cmp r3, #2 + 800af46: d005 beq.n 800af54 + 800af48: e010 b.n 800af6c + { + case UART_CLOCKSOURCE_PCLK1: + pclk = HAL_RCC_GetPCLK1Freq(); + 800af4a: f7fd f97b bl 8008244 + 800af4e: 0003 movs r3, r0 + 800af50: 617b str r3, [r7, #20] + break; + 800af52: e012 b.n 800af7a + case UART_CLOCKSOURCE_HSI: + pclk = (uint32_t) HSI_VALUE; + 800af54: 4b64 ldr r3, [pc, #400] ; (800b0e8 ) + 800af56: 617b str r3, [r7, #20] + break; + 800af58: e00f b.n 800af7a + case UART_CLOCKSOURCE_SYSCLK: + pclk = HAL_RCC_GetSysClockFreq(); + 800af5a: f7fd f8e9 bl 8008130 + 800af5e: 0003 movs r3, r0 + 800af60: 617b str r3, [r7, #20] + break; + 800af62: e00a b.n 800af7a + case UART_CLOCKSOURCE_LSE: + pclk = (uint32_t) LSE_VALUE; + 800af64: 2380 movs r3, #128 ; 0x80 + 800af66: 021b lsls r3, r3, #8 + 800af68: 617b str r3, [r7, #20] + break; + 800af6a: e006 b.n 800af7a + default: + pclk = 0U; + 800af6c: 2300 movs r3, #0 + 800af6e: 617b str r3, [r7, #20] + ret = HAL_ERROR; + 800af70: 231a movs r3, #26 + 800af72: 18fb adds r3, r7, r3 + 800af74: 2201 movs r2, #1 + 800af76: 701a strb r2, [r3, #0] + break; + 800af78: 46c0 nop ; (mov r8, r8) + } + + /* USARTDIV must be greater than or equal to 0d16 */ + if (pclk != 0U) + 800af7a: 697b ldr r3, [r7, #20] + 800af7c: 2b00 cmp r3, #0 + 800af7e: d100 bne.n 800af82 + 800af80: e08d b.n 800b09e + { + usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); + 800af82: 687b ldr r3, [r7, #4] + 800af84: 6a5a ldr r2, [r3, #36] ; 0x24 + 800af86: 4b59 ldr r3, [pc, #356] ; (800b0ec ) + 800af88: 0052 lsls r2, r2, #1 + 800af8a: 5ad3 ldrh r3, [r2, r3] + 800af8c: 0019 movs r1, r3 + 800af8e: 6978 ldr r0, [r7, #20] + 800af90: f7f5 f8cc bl 800012c <__udivsi3> + 800af94: 0003 movs r3, r0 + 800af96: 005a lsls r2, r3, #1 + 800af98: 687b ldr r3, [r7, #4] + 800af9a: 685b ldr r3, [r3, #4] + 800af9c: 085b lsrs r3, r3, #1 + 800af9e: 18d2 adds r2, r2, r3 + 800afa0: 687b ldr r3, [r7, #4] + 800afa2: 685b ldr r3, [r3, #4] + 800afa4: 0019 movs r1, r3 + 800afa6: 0010 movs r0, r2 + 800afa8: f7f5 f8c0 bl 800012c <__udivsi3> + 800afac: 0003 movs r3, r0 + 800afae: 613b str r3, [r7, #16] + if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 800afb0: 693b ldr r3, [r7, #16] + 800afb2: 2b0f cmp r3, #15 + 800afb4: d91c bls.n 800aff0 + 800afb6: 693a ldr r2, [r7, #16] + 800afb8: 2380 movs r3, #128 ; 0x80 + 800afba: 025b lsls r3, r3, #9 + 800afbc: 429a cmp r2, r3 + 800afbe: d217 bcs.n 800aff0 + { + brrtemp = (uint16_t)(usartdiv & 0xFFF0U); + 800afc0: 693b ldr r3, [r7, #16] + 800afc2: b29a uxth r2, r3 + 800afc4: 200e movs r0, #14 + 800afc6: 183b adds r3, r7, r0 + 800afc8: 210f movs r1, #15 + 800afca: 438a bics r2, r1 + 800afcc: 801a strh r2, [r3, #0] + brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); + 800afce: 693b ldr r3, [r7, #16] + 800afd0: 085b lsrs r3, r3, #1 + 800afd2: b29b uxth r3, r3 + 800afd4: 2207 movs r2, #7 + 800afd6: 4013 ands r3, r2 + 800afd8: b299 uxth r1, r3 + 800afda: 183b adds r3, r7, r0 + 800afdc: 183a adds r2, r7, r0 + 800afde: 8812 ldrh r2, [r2, #0] + 800afe0: 430a orrs r2, r1 + 800afe2: 801a strh r2, [r3, #0] + huart->Instance->BRR = brrtemp; + 800afe4: 687b ldr r3, [r7, #4] + 800afe6: 681b ldr r3, [r3, #0] + 800afe8: 183a adds r2, r7, r0 + 800afea: 8812 ldrh r2, [r2, #0] + 800afec: 60da str r2, [r3, #12] + 800afee: e056 b.n 800b09e + } + else + { + ret = HAL_ERROR; + 800aff0: 231a movs r3, #26 + 800aff2: 18fb adds r3, r7, r3 + 800aff4: 2201 movs r2, #1 + 800aff6: 701a strb r2, [r3, #0] + 800aff8: e051 b.n 800b09e + } + } + } + else + { + switch (clocksource) + 800affa: 231b movs r3, #27 + 800affc: 18fb adds r3, r7, r3 + 800affe: 781b ldrb r3, [r3, #0] + 800b000: 2b08 cmp r3, #8 + 800b002: d015 beq.n 800b030 + 800b004: dc18 bgt.n 800b038 + 800b006: 2b04 cmp r3, #4 + 800b008: d00d beq.n 800b026 + 800b00a: dc15 bgt.n 800b038 + 800b00c: 2b00 cmp r3, #0 + 800b00e: d002 beq.n 800b016 + 800b010: 2b02 cmp r3, #2 + 800b012: d005 beq.n 800b020 + 800b014: e010 b.n 800b038 + { + case UART_CLOCKSOURCE_PCLK1: + pclk = HAL_RCC_GetPCLK1Freq(); + 800b016: f7fd f915 bl 8008244 + 800b01a: 0003 movs r3, r0 + 800b01c: 617b str r3, [r7, #20] + break; + 800b01e: e012 b.n 800b046 + case UART_CLOCKSOURCE_HSI: + pclk = (uint32_t) HSI_VALUE; + 800b020: 4b31 ldr r3, [pc, #196] ; (800b0e8 ) + 800b022: 617b str r3, [r7, #20] + break; + 800b024: e00f b.n 800b046 + case UART_CLOCKSOURCE_SYSCLK: + pclk = HAL_RCC_GetSysClockFreq(); + 800b026: f7fd f883 bl 8008130 + 800b02a: 0003 movs r3, r0 + 800b02c: 617b str r3, [r7, #20] + break; + 800b02e: e00a b.n 800b046 + case UART_CLOCKSOURCE_LSE: + pclk = (uint32_t) LSE_VALUE; + 800b030: 2380 movs r3, #128 ; 0x80 + 800b032: 021b lsls r3, r3, #8 + 800b034: 617b str r3, [r7, #20] + break; + 800b036: e006 b.n 800b046 + default: + pclk = 0U; + 800b038: 2300 movs r3, #0 + 800b03a: 617b str r3, [r7, #20] + ret = HAL_ERROR; + 800b03c: 231a movs r3, #26 + 800b03e: 18fb adds r3, r7, r3 + 800b040: 2201 movs r2, #1 + 800b042: 701a strb r2, [r3, #0] + break; + 800b044: 46c0 nop ; (mov r8, r8) + } + + if (pclk != 0U) + 800b046: 697b ldr r3, [r7, #20] + 800b048: 2b00 cmp r3, #0 + 800b04a: d028 beq.n 800b09e + { + /* USARTDIV must be greater than or equal to 0d16 */ + usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); + 800b04c: 687b ldr r3, [r7, #4] + 800b04e: 6a5a ldr r2, [r3, #36] ; 0x24 + 800b050: 4b26 ldr r3, [pc, #152] ; (800b0ec ) + 800b052: 0052 lsls r2, r2, #1 + 800b054: 5ad3 ldrh r3, [r2, r3] + 800b056: 0019 movs r1, r3 + 800b058: 6978 ldr r0, [r7, #20] + 800b05a: f7f5 f867 bl 800012c <__udivsi3> + 800b05e: 0003 movs r3, r0 + 800b060: 001a movs r2, r3 + 800b062: 687b ldr r3, [r7, #4] + 800b064: 685b ldr r3, [r3, #4] + 800b066: 085b lsrs r3, r3, #1 + 800b068: 18d2 adds r2, r2, r3 + 800b06a: 687b ldr r3, [r7, #4] + 800b06c: 685b ldr r3, [r3, #4] + 800b06e: 0019 movs r1, r3 + 800b070: 0010 movs r0, r2 + 800b072: f7f5 f85b bl 800012c <__udivsi3> + 800b076: 0003 movs r3, r0 + 800b078: 613b str r3, [r7, #16] + if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 800b07a: 693b ldr r3, [r7, #16] + 800b07c: 2b0f cmp r3, #15 + 800b07e: d90a bls.n 800b096 + 800b080: 693a ldr r2, [r7, #16] + 800b082: 2380 movs r3, #128 ; 0x80 + 800b084: 025b lsls r3, r3, #9 + 800b086: 429a cmp r2, r3 + 800b088: d205 bcs.n 800b096 + { + huart->Instance->BRR = (uint16_t)usartdiv; + 800b08a: 693b ldr r3, [r7, #16] + 800b08c: b29a uxth r2, r3 + 800b08e: 687b ldr r3, [r7, #4] + 800b090: 681b ldr r3, [r3, #0] + 800b092: 60da str r2, [r3, #12] + 800b094: e003 b.n 800b09e + } + else + { + ret = HAL_ERROR; + 800b096: 231a movs r3, #26 + 800b098: 18fb adds r3, r7, r3 + 800b09a: 2201 movs r2, #1 + 800b09c: 701a strb r2, [r3, #0] + } + } + } + + /* Initialize the number of data to process during RX/TX ISR execution */ + huart->NbTxDataToProcess = 1; + 800b09e: 687b ldr r3, [r7, #4] + 800b0a0: 226a movs r2, #106 ; 0x6a + 800b0a2: 2101 movs r1, #1 + 800b0a4: 5299 strh r1, [r3, r2] + huart->NbRxDataToProcess = 1; + 800b0a6: 687b ldr r3, [r7, #4] + 800b0a8: 2268 movs r2, #104 ; 0x68 + 800b0aa: 2101 movs r1, #1 + 800b0ac: 5299 strh r1, [r3, r2] + + /* Clear ISR function pointers */ + huart->RxISR = NULL; + 800b0ae: 687b ldr r3, [r7, #4] + 800b0b0: 2200 movs r2, #0 + 800b0b2: 675a str r2, [r3, #116] ; 0x74 + huart->TxISR = NULL; + 800b0b4: 687b ldr r3, [r7, #4] + 800b0b6: 2200 movs r2, #0 + 800b0b8: 679a str r2, [r3, #120] ; 0x78 + + return ret; + 800b0ba: 231a movs r3, #26 + 800b0bc: 18fb adds r3, r7, r3 + 800b0be: 781b ldrb r3, [r3, #0] +} + 800b0c0: 0018 movs r0, r3 + 800b0c2: 46bd mov sp, r7 + 800b0c4: b008 add sp, #32 + 800b0c6: bd80 pop {r7, pc} + 800b0c8: cfff69f3 .word 0xcfff69f3 + 800b0cc: ffffcfff .word 0xffffcfff + 800b0d0: 11fff4ff .word 0x11fff4ff + 800b0d4: 40013800 .word 0x40013800 + 800b0d8: 40021000 .word 0x40021000 + 800b0dc: 40004400 .word 0x40004400 + 800b0e0: 40004800 .word 0x40004800 + 800b0e4: 40004c00 .word 0x40004c00 + 800b0e8: 00f42400 .word 0x00f42400 + 800b0ec: 08010f34 .word 0x08010f34 + +0800b0f0 : + * @brief Configure the UART peripheral advanced features. + * @param huart UART handle. + * @retval None + */ +void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) +{ + 800b0f0: b580 push {r7, lr} + 800b0f2: b082 sub sp, #8 + 800b0f4: af00 add r7, sp, #0 + 800b0f6: 6078 str r0, [r7, #4] + /* Check whether the set of advanced features to configure is properly set */ + assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); + + /* if required, configure TX pin active level inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) + 800b0f8: 687b ldr r3, [r7, #4] + 800b0fa: 6a9b ldr r3, [r3, #40] ; 0x28 + 800b0fc: 2201 movs r2, #1 + 800b0fe: 4013 ands r3, r2 + 800b100: d00b beq.n 800b11a + { + assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); + 800b102: 687b ldr r3, [r7, #4] + 800b104: 681b ldr r3, [r3, #0] + 800b106: 685b ldr r3, [r3, #4] + 800b108: 4a4a ldr r2, [pc, #296] ; (800b234 ) + 800b10a: 4013 ands r3, r2 + 800b10c: 0019 movs r1, r3 + 800b10e: 687b ldr r3, [r7, #4] + 800b110: 6ada ldr r2, [r3, #44] ; 0x2c + 800b112: 687b ldr r3, [r7, #4] + 800b114: 681b ldr r3, [r3, #0] + 800b116: 430a orrs r2, r1 + 800b118: 605a str r2, [r3, #4] + } + + /* if required, configure RX pin active level inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) + 800b11a: 687b ldr r3, [r7, #4] + 800b11c: 6a9b ldr r3, [r3, #40] ; 0x28 + 800b11e: 2202 movs r2, #2 + 800b120: 4013 ands r3, r2 + 800b122: d00b beq.n 800b13c + { + assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); + 800b124: 687b ldr r3, [r7, #4] + 800b126: 681b ldr r3, [r3, #0] + 800b128: 685b ldr r3, [r3, #4] + 800b12a: 4a43 ldr r2, [pc, #268] ; (800b238 ) + 800b12c: 4013 ands r3, r2 + 800b12e: 0019 movs r1, r3 + 800b130: 687b ldr r3, [r7, #4] + 800b132: 6b1a ldr r2, [r3, #48] ; 0x30 + 800b134: 687b ldr r3, [r7, #4] + 800b136: 681b ldr r3, [r3, #0] + 800b138: 430a orrs r2, r1 + 800b13a: 605a str r2, [r3, #4] + } + + /* if required, configure data inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) + 800b13c: 687b ldr r3, [r7, #4] + 800b13e: 6a9b ldr r3, [r3, #40] ; 0x28 + 800b140: 2204 movs r2, #4 + 800b142: 4013 ands r3, r2 + 800b144: d00b beq.n 800b15e + { + assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); + 800b146: 687b ldr r3, [r7, #4] + 800b148: 681b ldr r3, [r3, #0] + 800b14a: 685b ldr r3, [r3, #4] + 800b14c: 4a3b ldr r2, [pc, #236] ; (800b23c ) + 800b14e: 4013 ands r3, r2 + 800b150: 0019 movs r1, r3 + 800b152: 687b ldr r3, [r7, #4] + 800b154: 6b5a ldr r2, [r3, #52] ; 0x34 + 800b156: 687b ldr r3, [r7, #4] + 800b158: 681b ldr r3, [r3, #0] + 800b15a: 430a orrs r2, r1 + 800b15c: 605a str r2, [r3, #4] + } + + /* if required, configure RX/TX pins swap */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) + 800b15e: 687b ldr r3, [r7, #4] + 800b160: 6a9b ldr r3, [r3, #40] ; 0x28 + 800b162: 2208 movs r2, #8 + 800b164: 4013 ands r3, r2 + 800b166: d00b beq.n 800b180 + { + assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); + 800b168: 687b ldr r3, [r7, #4] + 800b16a: 681b ldr r3, [r3, #0] + 800b16c: 685b ldr r3, [r3, #4] + 800b16e: 4a34 ldr r2, [pc, #208] ; (800b240 ) + 800b170: 4013 ands r3, r2 + 800b172: 0019 movs r1, r3 + 800b174: 687b ldr r3, [r7, #4] + 800b176: 6b9a ldr r2, [r3, #56] ; 0x38 + 800b178: 687b ldr r3, [r7, #4] + 800b17a: 681b ldr r3, [r3, #0] + 800b17c: 430a orrs r2, r1 + 800b17e: 605a str r2, [r3, #4] + } + + /* if required, configure RX overrun detection disabling */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) + 800b180: 687b ldr r3, [r7, #4] + 800b182: 6a9b ldr r3, [r3, #40] ; 0x28 + 800b184: 2210 movs r2, #16 + 800b186: 4013 ands r3, r2 + 800b188: d00b beq.n 800b1a2 + { + assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); + MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); + 800b18a: 687b ldr r3, [r7, #4] + 800b18c: 681b ldr r3, [r3, #0] + 800b18e: 689b ldr r3, [r3, #8] + 800b190: 4a2c ldr r2, [pc, #176] ; (800b244 ) + 800b192: 4013 ands r3, r2 + 800b194: 0019 movs r1, r3 + 800b196: 687b ldr r3, [r7, #4] + 800b198: 6bda ldr r2, [r3, #60] ; 0x3c + 800b19a: 687b ldr r3, [r7, #4] + 800b19c: 681b ldr r3, [r3, #0] + 800b19e: 430a orrs r2, r1 + 800b1a0: 609a str r2, [r3, #8] + } + + /* if required, configure DMA disabling on reception error */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) + 800b1a2: 687b ldr r3, [r7, #4] + 800b1a4: 6a9b ldr r3, [r3, #40] ; 0x28 + 800b1a6: 2220 movs r2, #32 + 800b1a8: 4013 ands r3, r2 + 800b1aa: d00b beq.n 800b1c4 + { + assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); + MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); + 800b1ac: 687b ldr r3, [r7, #4] + 800b1ae: 681b ldr r3, [r3, #0] + 800b1b0: 689b ldr r3, [r3, #8] + 800b1b2: 4a25 ldr r2, [pc, #148] ; (800b248 ) + 800b1b4: 4013 ands r3, r2 + 800b1b6: 0019 movs r1, r3 + 800b1b8: 687b ldr r3, [r7, #4] + 800b1ba: 6c1a ldr r2, [r3, #64] ; 0x40 + 800b1bc: 687b ldr r3, [r7, #4] + 800b1be: 681b ldr r3, [r3, #0] + 800b1c0: 430a orrs r2, r1 + 800b1c2: 609a str r2, [r3, #8] + } + + /* if required, configure auto Baud rate detection scheme */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) + 800b1c4: 687b ldr r3, [r7, #4] + 800b1c6: 6a9b ldr r3, [r3, #40] ; 0x28 + 800b1c8: 2240 movs r2, #64 ; 0x40 + 800b1ca: 4013 ands r3, r2 + 800b1cc: d01d beq.n 800b20a + { + assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); + assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); + 800b1ce: 687b ldr r3, [r7, #4] + 800b1d0: 681b ldr r3, [r3, #0] + 800b1d2: 685b ldr r3, [r3, #4] + 800b1d4: 4a1d ldr r2, [pc, #116] ; (800b24c ) + 800b1d6: 4013 ands r3, r2 + 800b1d8: 0019 movs r1, r3 + 800b1da: 687b ldr r3, [r7, #4] + 800b1dc: 6c5a ldr r2, [r3, #68] ; 0x44 + 800b1de: 687b ldr r3, [r7, #4] + 800b1e0: 681b ldr r3, [r3, #0] + 800b1e2: 430a orrs r2, r1 + 800b1e4: 605a str r2, [r3, #4] + /* set auto Baudrate detection parameters if detection is enabled */ + if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) + 800b1e6: 687b ldr r3, [r7, #4] + 800b1e8: 6c5a ldr r2, [r3, #68] ; 0x44 + 800b1ea: 2380 movs r3, #128 ; 0x80 + 800b1ec: 035b lsls r3, r3, #13 + 800b1ee: 429a cmp r2, r3 + 800b1f0: d10b bne.n 800b20a + { + assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); + 800b1f2: 687b ldr r3, [r7, #4] + 800b1f4: 681b ldr r3, [r3, #0] + 800b1f6: 685b ldr r3, [r3, #4] + 800b1f8: 4a15 ldr r2, [pc, #84] ; (800b250 ) + 800b1fa: 4013 ands r3, r2 + 800b1fc: 0019 movs r1, r3 + 800b1fe: 687b ldr r3, [r7, #4] + 800b200: 6c9a ldr r2, [r3, #72] ; 0x48 + 800b202: 687b ldr r3, [r7, #4] + 800b204: 681b ldr r3, [r3, #0] + 800b206: 430a orrs r2, r1 + 800b208: 605a str r2, [r3, #4] + } + } + + /* if required, configure MSB first on communication line */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) + 800b20a: 687b ldr r3, [r7, #4] + 800b20c: 6a9b ldr r3, [r3, #40] ; 0x28 + 800b20e: 2280 movs r2, #128 ; 0x80 + 800b210: 4013 ands r3, r2 + 800b212: d00b beq.n 800b22c + { + assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); + 800b214: 687b ldr r3, [r7, #4] + 800b216: 681b ldr r3, [r3, #0] + 800b218: 685b ldr r3, [r3, #4] + 800b21a: 4a0e ldr r2, [pc, #56] ; (800b254 ) + 800b21c: 4013 ands r3, r2 + 800b21e: 0019 movs r1, r3 + 800b220: 687b ldr r3, [r7, #4] + 800b222: 6cda ldr r2, [r3, #76] ; 0x4c + 800b224: 687b ldr r3, [r7, #4] + 800b226: 681b ldr r3, [r3, #0] + 800b228: 430a orrs r2, r1 + 800b22a: 605a str r2, [r3, #4] + } +} + 800b22c: 46c0 nop ; (mov r8, r8) + 800b22e: 46bd mov sp, r7 + 800b230: b002 add sp, #8 + 800b232: bd80 pop {r7, pc} + 800b234: fffdffff .word 0xfffdffff + 800b238: fffeffff .word 0xfffeffff + 800b23c: fffbffff .word 0xfffbffff + 800b240: ffff7fff .word 0xffff7fff + 800b244: ffffefff .word 0xffffefff + 800b248: ffffdfff .word 0xffffdfff + 800b24c: ffefffff .word 0xffefffff + 800b250: ff9fffff .word 0xff9fffff + 800b254: fff7ffff .word 0xfff7ffff + +0800b258 : + * @brief Check the UART Idle State. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) +{ + 800b258: b580 push {r7, lr} + 800b25a: b086 sub sp, #24 + 800b25c: af02 add r7, sp, #8 + 800b25e: 6078 str r0, [r7, #4] + uint32_t tickstart; + + /* Initialize the UART ErrorCode */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + 800b260: 687b ldr r3, [r7, #4] + 800b262: 2290 movs r2, #144 ; 0x90 + 800b264: 2100 movs r1, #0 + 800b266: 5099 str r1, [r3, r2] + + /* Init tickstart for timeout management */ + tickstart = HAL_GetTick(); + 800b268: f7fa fffa bl 8006260 + 800b26c: 0003 movs r3, r0 + 800b26e: 60fb str r3, [r7, #12] + + /* Check if the Transmitter is enabled */ + if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) + 800b270: 687b ldr r3, [r7, #4] + 800b272: 681b ldr r3, [r3, #0] + 800b274: 681b ldr r3, [r3, #0] + 800b276: 2208 movs r2, #8 + 800b278: 4013 ands r3, r2 + 800b27a: 2b08 cmp r3, #8 + 800b27c: d10c bne.n 800b298 + { + /* Wait until TEACK flag is set */ + if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) + 800b27e: 68fb ldr r3, [r7, #12] + 800b280: 2280 movs r2, #128 ; 0x80 + 800b282: 0391 lsls r1, r2, #14 + 800b284: 6878 ldr r0, [r7, #4] + 800b286: 4a1a ldr r2, [pc, #104] ; (800b2f0 ) + 800b288: 9200 str r2, [sp, #0] + 800b28a: 2200 movs r2, #0 + 800b28c: f000 f832 bl 800b2f4 + 800b290: 1e03 subs r3, r0, #0 + 800b292: d001 beq.n 800b298 + { + /* Timeout occurred */ + return HAL_TIMEOUT; + 800b294: 2303 movs r3, #3 + 800b296: e026 b.n 800b2e6 + } + } + + /* Check if the Receiver is enabled */ + if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) + 800b298: 687b ldr r3, [r7, #4] + 800b29a: 681b ldr r3, [r3, #0] + 800b29c: 681b ldr r3, [r3, #0] + 800b29e: 2204 movs r2, #4 + 800b2a0: 4013 ands r3, r2 + 800b2a2: 2b04 cmp r3, #4 + 800b2a4: d10c bne.n 800b2c0 + { + /* Wait until REACK flag is set */ + if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) + 800b2a6: 68fb ldr r3, [r7, #12] + 800b2a8: 2280 movs r2, #128 ; 0x80 + 800b2aa: 03d1 lsls r1, r2, #15 + 800b2ac: 6878 ldr r0, [r7, #4] + 800b2ae: 4a10 ldr r2, [pc, #64] ; (800b2f0 ) + 800b2b0: 9200 str r2, [sp, #0] + 800b2b2: 2200 movs r2, #0 + 800b2b4: f000 f81e bl 800b2f4 + 800b2b8: 1e03 subs r3, r0, #0 + 800b2ba: d001 beq.n 800b2c0 + { + /* Timeout occurred */ + return HAL_TIMEOUT; + 800b2bc: 2303 movs r3, #3 + 800b2be: e012 b.n 800b2e6 + } + } + + /* Initialize the UART State */ + huart->gState = HAL_UART_STATE_READY; + 800b2c0: 687b ldr r3, [r7, #4] + 800b2c2: 2288 movs r2, #136 ; 0x88 + 800b2c4: 2120 movs r1, #32 + 800b2c6: 5099 str r1, [r3, r2] + huart->RxState = HAL_UART_STATE_READY; + 800b2c8: 687b ldr r3, [r7, #4] + 800b2ca: 228c movs r2, #140 ; 0x8c + 800b2cc: 2120 movs r1, #32 + 800b2ce: 5099 str r1, [r3, r2] + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 800b2d0: 687b ldr r3, [r7, #4] + 800b2d2: 2200 movs r2, #0 + 800b2d4: 66da str r2, [r3, #108] ; 0x6c + huart->RxEventType = HAL_UART_RXEVENT_TC; + 800b2d6: 687b ldr r3, [r7, #4] + 800b2d8: 2200 movs r2, #0 + 800b2da: 671a str r2, [r3, #112] ; 0x70 + + __HAL_UNLOCK(huart); + 800b2dc: 687b ldr r3, [r7, #4] + 800b2de: 2284 movs r2, #132 ; 0x84 + 800b2e0: 2100 movs r1, #0 + 800b2e2: 5499 strb r1, [r3, r2] + + return HAL_OK; + 800b2e4: 2300 movs r3, #0 +} + 800b2e6: 0018 movs r0, r3 + 800b2e8: 46bd mov sp, r7 + 800b2ea: b004 add sp, #16 + 800b2ec: bd80 pop {r7, pc} + 800b2ee: 46c0 nop ; (mov r8, r8) + 800b2f0: 01ffffff .word 0x01ffffff + +0800b2f4 : + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, + uint32_t Tickstart, uint32_t Timeout) +{ + 800b2f4: b580 push {r7, lr} + 800b2f6: b094 sub sp, #80 ; 0x50 + 800b2f8: af00 add r7, sp, #0 + 800b2fa: 60f8 str r0, [r7, #12] + 800b2fc: 60b9 str r1, [r7, #8] + 800b2fe: 603b str r3, [r7, #0] + 800b300: 1dfb adds r3, r7, #7 + 800b302: 701a strb r2, [r3, #0] + /* Wait until flag is set */ + while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) + 800b304: e0a7 b.n 800b456 + { + /* Check for the Timeout */ + if (Timeout != HAL_MAX_DELAY) + 800b306: 6dbb ldr r3, [r7, #88] ; 0x58 + 800b308: 3301 adds r3, #1 + 800b30a: d100 bne.n 800b30e + 800b30c: e0a3 b.n 800b456 + { + if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + 800b30e: f7fa ffa7 bl 8006260 + 800b312: 0002 movs r2, r0 + 800b314: 683b ldr r3, [r7, #0] + 800b316: 1ad3 subs r3, r2, r3 + 800b318: 6dba ldr r2, [r7, #88] ; 0x58 + 800b31a: 429a cmp r2, r3 + 800b31c: d302 bcc.n 800b324 + 800b31e: 6dbb ldr r3, [r7, #88] ; 0x58 + 800b320: 2b00 cmp r3, #0 + 800b322: d13f bne.n 800b3a4 + */ +__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 800b324: f3ef 8310 mrs r3, PRIMASK + 800b328: 62bb str r3, [r7, #40] ; 0x28 + return(result); + 800b32a: 6abb ldr r3, [r7, #40] ; 0x28 + { + /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) + interrupts for the interrupt process */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | + 800b32c: 647b str r3, [r7, #68] ; 0x44 + 800b32e: 2301 movs r3, #1 + 800b330: 62fb str r3, [r7, #44] ; 0x2c + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800b332: 6afb ldr r3, [r7, #44] ; 0x2c + 800b334: f383 8810 msr PRIMASK, r3 +} + 800b338: 46c0 nop ; (mov r8, r8) + 800b33a: 68fb ldr r3, [r7, #12] + 800b33c: 681b ldr r3, [r3, #0] + 800b33e: 681a ldr r2, [r3, #0] + 800b340: 68fb ldr r3, [r7, #12] + 800b342: 681b ldr r3, [r3, #0] + 800b344: 494e ldr r1, [pc, #312] ; (800b480 ) + 800b346: 400a ands r2, r1 + 800b348: 601a str r2, [r3, #0] + 800b34a: 6c7b ldr r3, [r7, #68] ; 0x44 + 800b34c: 633b str r3, [r7, #48] ; 0x30 + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800b34e: 6b3b ldr r3, [r7, #48] ; 0x30 + 800b350: f383 8810 msr PRIMASK, r3 +} + 800b354: 46c0 nop ; (mov r8, r8) + __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 800b356: f3ef 8310 mrs r3, PRIMASK + 800b35a: 637b str r3, [r7, #52] ; 0x34 + return(result); + 800b35c: 6b7b ldr r3, [r7, #52] ; 0x34 + USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 800b35e: 643b str r3, [r7, #64] ; 0x40 + 800b360: 2301 movs r3, #1 + 800b362: 63bb str r3, [r7, #56] ; 0x38 + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800b364: 6bbb ldr r3, [r7, #56] ; 0x38 + 800b366: f383 8810 msr PRIMASK, r3 +} + 800b36a: 46c0 nop ; (mov r8, r8) + 800b36c: 68fb ldr r3, [r7, #12] + 800b36e: 681b ldr r3, [r3, #0] + 800b370: 689a ldr r2, [r3, #8] + 800b372: 68fb ldr r3, [r7, #12] + 800b374: 681b ldr r3, [r3, #0] + 800b376: 2101 movs r1, #1 + 800b378: 438a bics r2, r1 + 800b37a: 609a str r2, [r3, #8] + 800b37c: 6c3b ldr r3, [r7, #64] ; 0x40 + 800b37e: 63fb str r3, [r7, #60] ; 0x3c + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800b380: 6bfb ldr r3, [r7, #60] ; 0x3c + 800b382: f383 8810 msr PRIMASK, r3 +} + 800b386: 46c0 nop ; (mov r8, r8) + + huart->gState = HAL_UART_STATE_READY; + 800b388: 68fb ldr r3, [r7, #12] + 800b38a: 2288 movs r2, #136 ; 0x88 + 800b38c: 2120 movs r1, #32 + 800b38e: 5099 str r1, [r3, r2] + huart->RxState = HAL_UART_STATE_READY; + 800b390: 68fb ldr r3, [r7, #12] + 800b392: 228c movs r2, #140 ; 0x8c + 800b394: 2120 movs r1, #32 + 800b396: 5099 str r1, [r3, r2] + + __HAL_UNLOCK(huart); + 800b398: 68fb ldr r3, [r7, #12] + 800b39a: 2284 movs r2, #132 ; 0x84 + 800b39c: 2100 movs r1, #0 + 800b39e: 5499 strb r1, [r3, r2] + + return HAL_TIMEOUT; + 800b3a0: 2303 movs r3, #3 + 800b3a2: e069 b.n 800b478 + } + + if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) + 800b3a4: 68fb ldr r3, [r7, #12] + 800b3a6: 681b ldr r3, [r3, #0] + 800b3a8: 681b ldr r3, [r3, #0] + 800b3aa: 2204 movs r2, #4 + 800b3ac: 4013 ands r3, r2 + 800b3ae: d052 beq.n 800b456 + { + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) + 800b3b0: 68fb ldr r3, [r7, #12] + 800b3b2: 681b ldr r3, [r3, #0] + 800b3b4: 69da ldr r2, [r3, #28] + 800b3b6: 2380 movs r3, #128 ; 0x80 + 800b3b8: 011b lsls r3, r3, #4 + 800b3ba: 401a ands r2, r3 + 800b3bc: 2380 movs r3, #128 ; 0x80 + 800b3be: 011b lsls r3, r3, #4 + 800b3c0: 429a cmp r2, r3 + 800b3c2: d148 bne.n 800b456 + { + /* Clear Receiver Timeout flag*/ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); + 800b3c4: 68fb ldr r3, [r7, #12] + 800b3c6: 681b ldr r3, [r3, #0] + 800b3c8: 2280 movs r2, #128 ; 0x80 + 800b3ca: 0112 lsls r2, r2, #4 + 800b3cc: 621a str r2, [r3, #32] + __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 800b3ce: f3ef 8310 mrs r3, PRIMASK + 800b3d2: 613b str r3, [r7, #16] + return(result); + 800b3d4: 693b ldr r3, [r7, #16] + + /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) + interrupts for the interrupt process */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | + 800b3d6: 64fb str r3, [r7, #76] ; 0x4c + 800b3d8: 2301 movs r3, #1 + 800b3da: 617b str r3, [r7, #20] + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800b3dc: 697b ldr r3, [r7, #20] + 800b3de: f383 8810 msr PRIMASK, r3 +} + 800b3e2: 46c0 nop ; (mov r8, r8) + 800b3e4: 68fb ldr r3, [r7, #12] + 800b3e6: 681b ldr r3, [r3, #0] + 800b3e8: 681a ldr r2, [r3, #0] + 800b3ea: 68fb ldr r3, [r7, #12] + 800b3ec: 681b ldr r3, [r3, #0] + 800b3ee: 4924 ldr r1, [pc, #144] ; (800b480 ) + 800b3f0: 400a ands r2, r1 + 800b3f2: 601a str r2, [r3, #0] + 800b3f4: 6cfb ldr r3, [r7, #76] ; 0x4c + 800b3f6: 61bb str r3, [r7, #24] + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800b3f8: 69bb ldr r3, [r7, #24] + 800b3fa: f383 8810 msr PRIMASK, r3 +} + 800b3fe: 46c0 nop ; (mov r8, r8) + __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 800b400: f3ef 8310 mrs r3, PRIMASK + 800b404: 61fb str r3, [r7, #28] + return(result); + 800b406: 69fb ldr r3, [r7, #28] + USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 800b408: 64bb str r3, [r7, #72] ; 0x48 + 800b40a: 2301 movs r3, #1 + 800b40c: 623b str r3, [r7, #32] + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800b40e: 6a3b ldr r3, [r7, #32] + 800b410: f383 8810 msr PRIMASK, r3 +} + 800b414: 46c0 nop ; (mov r8, r8) + 800b416: 68fb ldr r3, [r7, #12] + 800b418: 681b ldr r3, [r3, #0] + 800b41a: 689a ldr r2, [r3, #8] + 800b41c: 68fb ldr r3, [r7, #12] + 800b41e: 681b ldr r3, [r3, #0] + 800b420: 2101 movs r1, #1 + 800b422: 438a bics r2, r1 + 800b424: 609a str r2, [r3, #8] + 800b426: 6cbb ldr r3, [r7, #72] ; 0x48 + 800b428: 627b str r3, [r7, #36] ; 0x24 + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 800b42a: 6a7b ldr r3, [r7, #36] ; 0x24 + 800b42c: f383 8810 msr PRIMASK, r3 +} + 800b430: 46c0 nop ; (mov r8, r8) + + huart->gState = HAL_UART_STATE_READY; + 800b432: 68fb ldr r3, [r7, #12] + 800b434: 2288 movs r2, #136 ; 0x88 + 800b436: 2120 movs r1, #32 + 800b438: 5099 str r1, [r3, r2] + huart->RxState = HAL_UART_STATE_READY; + 800b43a: 68fb ldr r3, [r7, #12] + 800b43c: 228c movs r2, #140 ; 0x8c + 800b43e: 2120 movs r1, #32 + 800b440: 5099 str r1, [r3, r2] + huart->ErrorCode = HAL_UART_ERROR_RTO; + 800b442: 68fb ldr r3, [r7, #12] + 800b444: 2290 movs r2, #144 ; 0x90 + 800b446: 2120 movs r1, #32 + 800b448: 5099 str r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 800b44a: 68fb ldr r3, [r7, #12] + 800b44c: 2284 movs r2, #132 ; 0x84 + 800b44e: 2100 movs r1, #0 + 800b450: 5499 strb r1, [r3, r2] + + return HAL_TIMEOUT; + 800b452: 2303 movs r3, #3 + 800b454: e010 b.n 800b478 + while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) + 800b456: 68fb ldr r3, [r7, #12] + 800b458: 681b ldr r3, [r3, #0] + 800b45a: 69db ldr r3, [r3, #28] + 800b45c: 68ba ldr r2, [r7, #8] + 800b45e: 4013 ands r3, r2 + 800b460: 68ba ldr r2, [r7, #8] + 800b462: 1ad3 subs r3, r2, r3 + 800b464: 425a negs r2, r3 + 800b466: 4153 adcs r3, r2 + 800b468: b2db uxtb r3, r3 + 800b46a: 001a movs r2, r3 + 800b46c: 1dfb adds r3, r7, #7 + 800b46e: 781b ldrb r3, [r3, #0] + 800b470: 429a cmp r2, r3 + 800b472: d100 bne.n 800b476 + 800b474: e747 b.n 800b306 + } + } + } + } + return HAL_OK; + 800b476: 2300 movs r3, #0 +} + 800b478: 0018 movs r0, r3 + 800b47a: 46bd mov sp, r7 + 800b47c: b014 add sp, #80 ; 0x50 + 800b47e: bd80 pop {r7, pc} + 800b480: fffffe5f .word 0xfffffe5f + +0800b484 : + * @brief Disable the FIFO mode. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart) +{ + 800b484: b580 push {r7, lr} + 800b486: b084 sub sp, #16 + 800b488: af00 add r7, sp, #0 + 800b48a: 6078 str r0, [r7, #4] + + /* Check parameters */ + assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); + + /* Process Locked */ + __HAL_LOCK(huart); + 800b48c: 687b ldr r3, [r7, #4] + 800b48e: 2284 movs r2, #132 ; 0x84 + 800b490: 5c9b ldrb r3, [r3, r2] + 800b492: 2b01 cmp r3, #1 + 800b494: d101 bne.n 800b49a + 800b496: 2302 movs r3, #2 + 800b498: e027 b.n 800b4ea + 800b49a: 687b ldr r3, [r7, #4] + 800b49c: 2284 movs r2, #132 ; 0x84 + 800b49e: 2101 movs r1, #1 + 800b4a0: 5499 strb r1, [r3, r2] + + huart->gState = HAL_UART_STATE_BUSY; + 800b4a2: 687b ldr r3, [r7, #4] + 800b4a4: 2288 movs r2, #136 ; 0x88 + 800b4a6: 2124 movs r1, #36 ; 0x24 + 800b4a8: 5099 str r1, [r3, r2] + + /* Save actual UART configuration */ + tmpcr1 = READ_REG(huart->Instance->CR1); + 800b4aa: 687b ldr r3, [r7, #4] + 800b4ac: 681b ldr r3, [r3, #0] + 800b4ae: 681b ldr r3, [r3, #0] + 800b4b0: 60fb str r3, [r7, #12] + + /* Disable UART */ + __HAL_UART_DISABLE(huart); + 800b4b2: 687b ldr r3, [r7, #4] + 800b4b4: 681b ldr r3, [r3, #0] + 800b4b6: 681a ldr r2, [r3, #0] + 800b4b8: 687b ldr r3, [r7, #4] + 800b4ba: 681b ldr r3, [r3, #0] + 800b4bc: 2101 movs r1, #1 + 800b4be: 438a bics r2, r1 + 800b4c0: 601a str r2, [r3, #0] + + /* Enable FIFO mode */ + CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); + 800b4c2: 68fb ldr r3, [r7, #12] + 800b4c4: 4a0b ldr r2, [pc, #44] ; (800b4f4 ) + 800b4c6: 4013 ands r3, r2 + 800b4c8: 60fb str r3, [r7, #12] + huart->FifoMode = UART_FIFOMODE_DISABLE; + 800b4ca: 687b ldr r3, [r7, #4] + 800b4cc: 2200 movs r2, #0 + 800b4ce: 665a str r2, [r3, #100] ; 0x64 + + /* Restore UART configuration */ + WRITE_REG(huart->Instance->CR1, tmpcr1); + 800b4d0: 687b ldr r3, [r7, #4] + 800b4d2: 681b ldr r3, [r3, #0] + 800b4d4: 68fa ldr r2, [r7, #12] + 800b4d6: 601a str r2, [r3, #0] + + huart->gState = HAL_UART_STATE_READY; + 800b4d8: 687b ldr r3, [r7, #4] + 800b4da: 2288 movs r2, #136 ; 0x88 + 800b4dc: 2120 movs r1, #32 + 800b4de: 5099 str r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 800b4e0: 687b ldr r3, [r7, #4] + 800b4e2: 2284 movs r2, #132 ; 0x84 + 800b4e4: 2100 movs r1, #0 + 800b4e6: 5499 strb r1, [r3, r2] + + return HAL_OK; + 800b4e8: 2300 movs r3, #0 +} + 800b4ea: 0018 movs r0, r3 + 800b4ec: 46bd mov sp, r7 + 800b4ee: b004 add sp, #16 + 800b4f0: bd80 pop {r7, pc} + 800b4f2: 46c0 nop ; (mov r8, r8) + 800b4f4: dfffffff .word 0xdfffffff + +0800b4f8 : + * @arg @ref UART_TXFIFO_THRESHOLD_7_8 + * @arg @ref UART_TXFIFO_THRESHOLD_8_8 + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) +{ + 800b4f8: b580 push {r7, lr} + 800b4fa: b084 sub sp, #16 + 800b4fc: af00 add r7, sp, #0 + 800b4fe: 6078 str r0, [r7, #4] + 800b500: 6039 str r1, [r7, #0] + /* Check parameters */ + assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); + assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold)); + + /* Process Locked */ + __HAL_LOCK(huart); + 800b502: 687b ldr r3, [r7, #4] + 800b504: 2284 movs r2, #132 ; 0x84 + 800b506: 5c9b ldrb r3, [r3, r2] + 800b508: 2b01 cmp r3, #1 + 800b50a: d101 bne.n 800b510 + 800b50c: 2302 movs r3, #2 + 800b50e: e02e b.n 800b56e + 800b510: 687b ldr r3, [r7, #4] + 800b512: 2284 movs r2, #132 ; 0x84 + 800b514: 2101 movs r1, #1 + 800b516: 5499 strb r1, [r3, r2] + + huart->gState = HAL_UART_STATE_BUSY; + 800b518: 687b ldr r3, [r7, #4] + 800b51a: 2288 movs r2, #136 ; 0x88 + 800b51c: 2124 movs r1, #36 ; 0x24 + 800b51e: 5099 str r1, [r3, r2] + + /* Save actual UART configuration */ + tmpcr1 = READ_REG(huart->Instance->CR1); + 800b520: 687b ldr r3, [r7, #4] + 800b522: 681b ldr r3, [r3, #0] + 800b524: 681b ldr r3, [r3, #0] + 800b526: 60fb str r3, [r7, #12] + + /* Disable UART */ + __HAL_UART_DISABLE(huart); + 800b528: 687b ldr r3, [r7, #4] + 800b52a: 681b ldr r3, [r3, #0] + 800b52c: 681a ldr r2, [r3, #0] + 800b52e: 687b ldr r3, [r7, #4] + 800b530: 681b ldr r3, [r3, #0] + 800b532: 2101 movs r1, #1 + 800b534: 438a bics r2, r1 + 800b536: 601a str r2, [r3, #0] + + /* Update TX threshold configuration */ + MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); + 800b538: 687b ldr r3, [r7, #4] + 800b53a: 681b ldr r3, [r3, #0] + 800b53c: 689b ldr r3, [r3, #8] + 800b53e: 00db lsls r3, r3, #3 + 800b540: 08d9 lsrs r1, r3, #3 + 800b542: 687b ldr r3, [r7, #4] + 800b544: 681b ldr r3, [r3, #0] + 800b546: 683a ldr r2, [r7, #0] + 800b548: 430a orrs r2, r1 + 800b54a: 609a str r2, [r3, #8] + + /* Determine the number of data to process during RX/TX ISR execution */ + UARTEx_SetNbDataToProcess(huart); + 800b54c: 687b ldr r3, [r7, #4] + 800b54e: 0018 movs r0, r3 + 800b550: f000 f854 bl 800b5fc + + /* Restore UART configuration */ + WRITE_REG(huart->Instance->CR1, tmpcr1); + 800b554: 687b ldr r3, [r7, #4] + 800b556: 681b ldr r3, [r3, #0] + 800b558: 68fa ldr r2, [r7, #12] + 800b55a: 601a str r2, [r3, #0] + + huart->gState = HAL_UART_STATE_READY; + 800b55c: 687b ldr r3, [r7, #4] + 800b55e: 2288 movs r2, #136 ; 0x88 + 800b560: 2120 movs r1, #32 + 800b562: 5099 str r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 800b564: 687b ldr r3, [r7, #4] + 800b566: 2284 movs r2, #132 ; 0x84 + 800b568: 2100 movs r1, #0 + 800b56a: 5499 strb r1, [r3, r2] + + return HAL_OK; + 800b56c: 2300 movs r3, #0 +} + 800b56e: 0018 movs r0, r3 + 800b570: 46bd mov sp, r7 + 800b572: b004 add sp, #16 + 800b574: bd80 pop {r7, pc} + ... + +0800b578 : + * @arg @ref UART_RXFIFO_THRESHOLD_7_8 + * @arg @ref UART_RXFIFO_THRESHOLD_8_8 + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) +{ + 800b578: b580 push {r7, lr} + 800b57a: b084 sub sp, #16 + 800b57c: af00 add r7, sp, #0 + 800b57e: 6078 str r0, [r7, #4] + 800b580: 6039 str r1, [r7, #0] + /* Check the parameters */ + assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); + assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold)); + + /* Process Locked */ + __HAL_LOCK(huart); + 800b582: 687b ldr r3, [r7, #4] + 800b584: 2284 movs r2, #132 ; 0x84 + 800b586: 5c9b ldrb r3, [r3, r2] + 800b588: 2b01 cmp r3, #1 + 800b58a: d101 bne.n 800b590 + 800b58c: 2302 movs r3, #2 + 800b58e: e02f b.n 800b5f0 + 800b590: 687b ldr r3, [r7, #4] + 800b592: 2284 movs r2, #132 ; 0x84 + 800b594: 2101 movs r1, #1 + 800b596: 5499 strb r1, [r3, r2] + + huart->gState = HAL_UART_STATE_BUSY; + 800b598: 687b ldr r3, [r7, #4] + 800b59a: 2288 movs r2, #136 ; 0x88 + 800b59c: 2124 movs r1, #36 ; 0x24 + 800b59e: 5099 str r1, [r3, r2] + + /* Save actual UART configuration */ + tmpcr1 = READ_REG(huart->Instance->CR1); + 800b5a0: 687b ldr r3, [r7, #4] + 800b5a2: 681b ldr r3, [r3, #0] + 800b5a4: 681b ldr r3, [r3, #0] + 800b5a6: 60fb str r3, [r7, #12] + + /* Disable UART */ + __HAL_UART_DISABLE(huart); + 800b5a8: 687b ldr r3, [r7, #4] + 800b5aa: 681b ldr r3, [r3, #0] + 800b5ac: 681a ldr r2, [r3, #0] + 800b5ae: 687b ldr r3, [r7, #4] + 800b5b0: 681b ldr r3, [r3, #0] + 800b5b2: 2101 movs r1, #1 + 800b5b4: 438a bics r2, r1 + 800b5b6: 601a str r2, [r3, #0] + + /* Update RX threshold configuration */ + MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); + 800b5b8: 687b ldr r3, [r7, #4] + 800b5ba: 681b ldr r3, [r3, #0] + 800b5bc: 689b ldr r3, [r3, #8] + 800b5be: 4a0e ldr r2, [pc, #56] ; (800b5f8 ) + 800b5c0: 4013 ands r3, r2 + 800b5c2: 0019 movs r1, r3 + 800b5c4: 687b ldr r3, [r7, #4] + 800b5c6: 681b ldr r3, [r3, #0] + 800b5c8: 683a ldr r2, [r7, #0] + 800b5ca: 430a orrs r2, r1 + 800b5cc: 609a str r2, [r3, #8] + + /* Determine the number of data to process during RX/TX ISR execution */ + UARTEx_SetNbDataToProcess(huart); + 800b5ce: 687b ldr r3, [r7, #4] + 800b5d0: 0018 movs r0, r3 + 800b5d2: f000 f813 bl 800b5fc + + /* Restore UART configuration */ + WRITE_REG(huart->Instance->CR1, tmpcr1); + 800b5d6: 687b ldr r3, [r7, #4] + 800b5d8: 681b ldr r3, [r3, #0] + 800b5da: 68fa ldr r2, [r7, #12] + 800b5dc: 601a str r2, [r3, #0] + + huart->gState = HAL_UART_STATE_READY; + 800b5de: 687b ldr r3, [r7, #4] + 800b5e0: 2288 movs r2, #136 ; 0x88 + 800b5e2: 2120 movs r1, #32 + 800b5e4: 5099 str r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + 800b5e6: 687b ldr r3, [r7, #4] + 800b5e8: 2284 movs r2, #132 ; 0x84 + 800b5ea: 2100 movs r1, #0 + 800b5ec: 5499 strb r1, [r3, r2] + + return HAL_OK; + 800b5ee: 2300 movs r3, #0 +} + 800b5f0: 0018 movs r0, r3 + 800b5f2: 46bd mov sp, r7 + 800b5f4: b004 add sp, #16 + 800b5f6: bd80 pop {r7, pc} + 800b5f8: f1ffffff .word 0xf1ffffff + +0800b5fc : + * the UART configuration registers. + * @param huart UART handle. + * @retval None + */ +static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) +{ + 800b5fc: b5f0 push {r4, r5, r6, r7, lr} + 800b5fe: b085 sub sp, #20 + 800b600: af00 add r7, sp, #0 + 800b602: 6078 str r0, [r7, #4] + uint8_t rx_fifo_threshold; + uint8_t tx_fifo_threshold; + static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U}; + static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U}; + + if (huart->FifoMode == UART_FIFOMODE_DISABLE) + 800b604: 687b ldr r3, [r7, #4] + 800b606: 6e5b ldr r3, [r3, #100] ; 0x64 + 800b608: 2b00 cmp r3, #0 + 800b60a: d108 bne.n 800b61e + { + huart->NbTxDataToProcess = 1U; + 800b60c: 687b ldr r3, [r7, #4] + 800b60e: 226a movs r2, #106 ; 0x6a + 800b610: 2101 movs r1, #1 + 800b612: 5299 strh r1, [r3, r2] + huart->NbRxDataToProcess = 1U; + 800b614: 687b ldr r3, [r7, #4] + 800b616: 2268 movs r2, #104 ; 0x68 + 800b618: 2101 movs r1, #1 + 800b61a: 5299 strh r1, [r3, r2] + huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / + (uint16_t)denominator[tx_fifo_threshold]; + huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / + (uint16_t)denominator[rx_fifo_threshold]; + } +} + 800b61c: e043 b.n 800b6a6 + rx_fifo_depth = RX_FIFO_DEPTH; + 800b61e: 260f movs r6, #15 + 800b620: 19bb adds r3, r7, r6 + 800b622: 2208 movs r2, #8 + 800b624: 701a strb r2, [r3, #0] + tx_fifo_depth = TX_FIFO_DEPTH; + 800b626: 200e movs r0, #14 + 800b628: 183b adds r3, r7, r0 + 800b62a: 2208 movs r2, #8 + 800b62c: 701a strb r2, [r3, #0] + rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); + 800b62e: 687b ldr r3, [r7, #4] + 800b630: 681b ldr r3, [r3, #0] + 800b632: 689b ldr r3, [r3, #8] + 800b634: 0e5b lsrs r3, r3, #25 + 800b636: b2da uxtb r2, r3 + 800b638: 240d movs r4, #13 + 800b63a: 193b adds r3, r7, r4 + 800b63c: 2107 movs r1, #7 + 800b63e: 400a ands r2, r1 + 800b640: 701a strb r2, [r3, #0] + tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); + 800b642: 687b ldr r3, [r7, #4] + 800b644: 681b ldr r3, [r3, #0] + 800b646: 689b ldr r3, [r3, #8] + 800b648: 0f5b lsrs r3, r3, #29 + 800b64a: b2da uxtb r2, r3 + 800b64c: 250c movs r5, #12 + 800b64e: 197b adds r3, r7, r5 + 800b650: 2107 movs r1, #7 + 800b652: 400a ands r2, r1 + 800b654: 701a strb r2, [r3, #0] + huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / + 800b656: 183b adds r3, r7, r0 + 800b658: 781b ldrb r3, [r3, #0] + 800b65a: 197a adds r2, r7, r5 + 800b65c: 7812 ldrb r2, [r2, #0] + 800b65e: 4914 ldr r1, [pc, #80] ; (800b6b0 ) + 800b660: 5c8a ldrb r2, [r1, r2] + 800b662: 435a muls r2, r3 + 800b664: 0010 movs r0, r2 + (uint16_t)denominator[tx_fifo_threshold]; + 800b666: 197b adds r3, r7, r5 + 800b668: 781b ldrb r3, [r3, #0] + 800b66a: 4a12 ldr r2, [pc, #72] ; (800b6b4 ) + 800b66c: 5cd3 ldrb r3, [r2, r3] + huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / + 800b66e: 0019 movs r1, r3 + 800b670: f7f4 fde6 bl 8000240 <__divsi3> + 800b674: 0003 movs r3, r0 + 800b676: b299 uxth r1, r3 + 800b678: 687b ldr r3, [r7, #4] + 800b67a: 226a movs r2, #106 ; 0x6a + 800b67c: 5299 strh r1, [r3, r2] + huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / + 800b67e: 19bb adds r3, r7, r6 + 800b680: 781b ldrb r3, [r3, #0] + 800b682: 193a adds r2, r7, r4 + 800b684: 7812 ldrb r2, [r2, #0] + 800b686: 490a ldr r1, [pc, #40] ; (800b6b0 ) + 800b688: 5c8a ldrb r2, [r1, r2] + 800b68a: 435a muls r2, r3 + 800b68c: 0010 movs r0, r2 + (uint16_t)denominator[rx_fifo_threshold]; + 800b68e: 193b adds r3, r7, r4 + 800b690: 781b ldrb r3, [r3, #0] + 800b692: 4a08 ldr r2, [pc, #32] ; (800b6b4 ) + 800b694: 5cd3 ldrb r3, [r2, r3] + huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / + 800b696: 0019 movs r1, r3 + 800b698: f7f4 fdd2 bl 8000240 <__divsi3> + 800b69c: 0003 movs r3, r0 + 800b69e: b299 uxth r1, r3 + 800b6a0: 687b ldr r3, [r7, #4] + 800b6a2: 2268 movs r2, #104 ; 0x68 + 800b6a4: 5299 strh r1, [r3, r2] +} + 800b6a6: 46c0 nop ; (mov r8, r8) + 800b6a8: 46bd mov sp, r7 + 800b6aa: b005 add sp, #20 + 800b6ac: bdf0 pop {r4, r5, r6, r7, pc} + 800b6ae: 46c0 nop ; (mov r8, r8) + 800b6b0: 08010f4c .word 0x08010f4c + 800b6b4: 08010f54 .word 0x08010f54 + +0800b6b8 <__NVIC_SetPriority>: +{ + 800b6b8: b590 push {r4, r7, lr} + 800b6ba: b083 sub sp, #12 + 800b6bc: af00 add r7, sp, #0 + 800b6be: 0002 movs r2, r0 + 800b6c0: 6039 str r1, [r7, #0] + 800b6c2: 1dfb adds r3, r7, #7 + 800b6c4: 701a strb r2, [r3, #0] + if ((int32_t)(IRQn) >= 0) + 800b6c6: 1dfb adds r3, r7, #7 + 800b6c8: 781b ldrb r3, [r3, #0] + 800b6ca: 2b7f cmp r3, #127 ; 0x7f + 800b6cc: d828 bhi.n 800b720 <__NVIC_SetPriority+0x68> + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 800b6ce: 4a2f ldr r2, [pc, #188] ; (800b78c <__NVIC_SetPriority+0xd4>) + 800b6d0: 1dfb adds r3, r7, #7 + 800b6d2: 781b ldrb r3, [r3, #0] + 800b6d4: b25b sxtb r3, r3 + 800b6d6: 089b lsrs r3, r3, #2 + 800b6d8: 33c0 adds r3, #192 ; 0xc0 + 800b6da: 009b lsls r3, r3, #2 + 800b6dc: 589b ldr r3, [r3, r2] + 800b6de: 1dfa adds r2, r7, #7 + 800b6e0: 7812 ldrb r2, [r2, #0] + 800b6e2: 0011 movs r1, r2 + 800b6e4: 2203 movs r2, #3 + 800b6e6: 400a ands r2, r1 + 800b6e8: 00d2 lsls r2, r2, #3 + 800b6ea: 21ff movs r1, #255 ; 0xff + 800b6ec: 4091 lsls r1, r2 + 800b6ee: 000a movs r2, r1 + 800b6f0: 43d2 mvns r2, r2 + 800b6f2: 401a ands r2, r3 + 800b6f4: 0011 movs r1, r2 + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 800b6f6: 683b ldr r3, [r7, #0] + 800b6f8: 019b lsls r3, r3, #6 + 800b6fa: 22ff movs r2, #255 ; 0xff + 800b6fc: 401a ands r2, r3 + 800b6fe: 1dfb adds r3, r7, #7 + 800b700: 781b ldrb r3, [r3, #0] + 800b702: 0018 movs r0, r3 + 800b704: 2303 movs r3, #3 + 800b706: 4003 ands r3, r0 + 800b708: 00db lsls r3, r3, #3 + 800b70a: 409a lsls r2, r3 + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 800b70c: 481f ldr r0, [pc, #124] ; (800b78c <__NVIC_SetPriority+0xd4>) + 800b70e: 1dfb adds r3, r7, #7 + 800b710: 781b ldrb r3, [r3, #0] + 800b712: b25b sxtb r3, r3 + 800b714: 089b lsrs r3, r3, #2 + 800b716: 430a orrs r2, r1 + 800b718: 33c0 adds r3, #192 ; 0xc0 + 800b71a: 009b lsls r3, r3, #2 + 800b71c: 501a str r2, [r3, r0] +} + 800b71e: e031 b.n 800b784 <__NVIC_SetPriority+0xcc> + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 800b720: 4a1b ldr r2, [pc, #108] ; (800b790 <__NVIC_SetPriority+0xd8>) + 800b722: 1dfb adds r3, r7, #7 + 800b724: 781b ldrb r3, [r3, #0] + 800b726: 0019 movs r1, r3 + 800b728: 230f movs r3, #15 + 800b72a: 400b ands r3, r1 + 800b72c: 3b08 subs r3, #8 + 800b72e: 089b lsrs r3, r3, #2 + 800b730: 3306 adds r3, #6 + 800b732: 009b lsls r3, r3, #2 + 800b734: 18d3 adds r3, r2, r3 + 800b736: 3304 adds r3, #4 + 800b738: 681b ldr r3, [r3, #0] + 800b73a: 1dfa adds r2, r7, #7 + 800b73c: 7812 ldrb r2, [r2, #0] + 800b73e: 0011 movs r1, r2 + 800b740: 2203 movs r2, #3 + 800b742: 400a ands r2, r1 + 800b744: 00d2 lsls r2, r2, #3 + 800b746: 21ff movs r1, #255 ; 0xff + 800b748: 4091 lsls r1, r2 + 800b74a: 000a movs r2, r1 + 800b74c: 43d2 mvns r2, r2 + 800b74e: 401a ands r2, r3 + 800b750: 0011 movs r1, r2 + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 800b752: 683b ldr r3, [r7, #0] + 800b754: 019b lsls r3, r3, #6 + 800b756: 22ff movs r2, #255 ; 0xff + 800b758: 401a ands r2, r3 + 800b75a: 1dfb adds r3, r7, #7 + 800b75c: 781b ldrb r3, [r3, #0] + 800b75e: 0018 movs r0, r3 + 800b760: 2303 movs r3, #3 + 800b762: 4003 ands r3, r0 + 800b764: 00db lsls r3, r3, #3 + 800b766: 409a lsls r2, r3 + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 800b768: 4809 ldr r0, [pc, #36] ; (800b790 <__NVIC_SetPriority+0xd8>) + 800b76a: 1dfb adds r3, r7, #7 + 800b76c: 781b ldrb r3, [r3, #0] + 800b76e: 001c movs r4, r3 + 800b770: 230f movs r3, #15 + 800b772: 4023 ands r3, r4 + 800b774: 3b08 subs r3, #8 + 800b776: 089b lsrs r3, r3, #2 + 800b778: 430a orrs r2, r1 + 800b77a: 3306 adds r3, #6 + 800b77c: 009b lsls r3, r3, #2 + 800b77e: 18c3 adds r3, r0, r3 + 800b780: 3304 adds r3, #4 + 800b782: 601a str r2, [r3, #0] +} + 800b784: 46c0 nop ; (mov r8, r8) + 800b786: 46bd mov sp, r7 + 800b788: b003 add sp, #12 + 800b78a: bd90 pop {r4, r7, pc} + 800b78c: e000e100 .word 0xe000e100 + 800b790: e000ed00 .word 0xe000ed00 + +0800b794 : /* SysTick handler implementation that also clears overflow flag. */ #if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0) void SysTick_Handler (void) { - 800ab50: b580 push {r7, lr} - 800ab52: af00 add r7, sp, #0 + 800b794: b580 push {r7, lr} + 800b796: af00 add r7, sp, #0 /* Clear overflow flag */ SysTick->CTRL; - 800ab54: 4b05 ldr r3, [pc, #20] ; (800ab6c ) - 800ab56: 681b ldr r3, [r3, #0] + 800b798: 4b05 ldr r3, [pc, #20] ; (800b7b0 ) + 800b79a: 681b ldr r3, [r3, #0] if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) { - 800ab58: f002 f99a bl 800ce90 - 800ab5c: 0003 movs r3, r0 - 800ab5e: 2b01 cmp r3, #1 - 800ab60: d001 beq.n 800ab66 + 800b79c: f002 f99a bl 800dad4 + 800b7a0: 0003 movs r3, r0 + 800b7a2: 2b01 cmp r3, #1 + 800b7a4: d001 beq.n 800b7aa /* Call tick handler */ xPortSysTickHandler(); - 800ab62: f003 f811 bl 800db88 + 800b7a6: f003 f80f bl 800e7c8 } } - 800ab66: 46c0 nop ; (mov r8, r8) - 800ab68: 46bd mov sp, r7 - 800ab6a: bd80 pop {r7, pc} - 800ab6c: e000e010 .word 0xe000e010 + 800b7aa: 46c0 nop ; (mov r8, r8) + 800b7ac: 46bd mov sp, r7 + 800b7ae: bd80 pop {r7, pc} + 800b7b0: e000e010 .word 0xe000e010 -0800ab70 : +0800b7b4 : #endif /* SysTick */ /* Setup SVC to reset value. */ __STATIC_INLINE void SVC_Setup (void) { - 800ab70: b580 push {r7, lr} - 800ab72: af00 add r7, sp, #0 + 800b7b4: b580 push {r7, lr} + 800b7b6: af00 add r7, sp, #0 #if (__ARM_ARCH_7A__ == 0U) /* Service Call interrupt might be configured before kernel start */ /* and when its priority is lower or equal to BASEPRI, svc intruction */ /* causes a Hard Fault. */ NVIC_SetPriority (SVCall_IRQ_NBR, 0U); - 800ab74: 2305 movs r3, #5 - 800ab76: 425b negs r3, r3 - 800ab78: 2100 movs r1, #0 - 800ab7a: 0018 movs r0, r3 - 800ab7c: f7ff ff7a bl 800aa74 <__NVIC_SetPriority> + 800b7b8: 2305 movs r3, #5 + 800b7ba: 425b negs r3, r3 + 800b7bc: 2100 movs r1, #0 + 800b7be: 0018 movs r0, r3 + 800b7c0: f7ff ff7a bl 800b6b8 <__NVIC_SetPriority> #endif } - 800ab80: 46c0 nop ; (mov r8, r8) - 800ab82: 46bd mov sp, r7 - 800ab84: bd80 pop {r7, pc} + 800b7c4: 46c0 nop ; (mov r8, r8) + 800b7c6: 46bd mov sp, r7 + 800b7c8: bd80 pop {r7, pc} ... -0800ab88 : +0800b7cc : static uint32_t OS_Tick_GetOverflow (void); /* Get OS Tick interval */ static uint32_t OS_Tick_GetInterval (void); /*---------------------------------------------------------------------------*/ osStatus_t osKernelInitialize (void) { - 800ab88: b580 push {r7, lr} - 800ab8a: b082 sub sp, #8 - 800ab8c: af00 add r7, sp, #0 - */ -__STATIC_FORCEINLINE uint32_t __get_IPSR(void) -{ - uint32_t result; - + 800b7cc: b580 push {r7, lr} + 800b7ce: b082 sub sp, #8 + 800b7d0: af00 add r7, sp, #0 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800ab8e: f3ef 8305 mrs r3, IPSR - 800ab92: 603b str r3, [r7, #0] + 800b7d2: f3ef 8305 mrs r3, IPSR + 800b7d6: 603b str r3, [r7, #0] return(result); - 800ab94: 683b ldr r3, [r7, #0] + 800b7d8: 683b ldr r3, [r7, #0] osStatus_t stat; if (IS_IRQ()) { - 800ab96: 2b00 cmp r3, #0 - 800ab98: d003 beq.n 800aba2 + 800b7da: 2b00 cmp r3, #0 + 800b7dc: d003 beq.n 800b7e6 stat = osErrorISR; - 800ab9a: 2306 movs r3, #6 - 800ab9c: 425b negs r3, r3 - 800ab9e: 607b str r3, [r7, #4] - 800aba0: e00c b.n 800abbc + 800b7de: 2306 movs r3, #6 + 800b7e0: 425b negs r3, r3 + 800b7e2: 607b str r3, [r7, #4] + 800b7e4: e00c b.n 800b800 } else { if (KernelState == osKernelInactive) { - 800aba2: 4b09 ldr r3, [pc, #36] ; (800abc8 ) - 800aba4: 681b ldr r3, [r3, #0] - 800aba6: 2b00 cmp r3, #0 - 800aba8: d105 bne.n 800abb6 + 800b7e6: 4b09 ldr r3, [pc, #36] ; (800b80c ) + 800b7e8: 681b ldr r3, [r3, #0] + 800b7ea: 2b00 cmp r3, #0 + 800b7ec: d105 bne.n 800b7fa EvrFreeRTOSSetup(0U); #endif #if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1) vPortDefineHeapRegions (configHEAP_5_REGIONS); #endif KernelState = osKernelReady; - 800abaa: 4b07 ldr r3, [pc, #28] ; (800abc8 ) - 800abac: 2201 movs r2, #1 - 800abae: 601a str r2, [r3, #0] + 800b7ee: 4b07 ldr r3, [pc, #28] ; (800b80c ) + 800b7f0: 2201 movs r2, #1 + 800b7f2: 601a str r2, [r3, #0] stat = osOK; - 800abb0: 2300 movs r3, #0 - 800abb2: 607b str r3, [r7, #4] - 800abb4: e002 b.n 800abbc + 800b7f4: 2300 movs r3, #0 + 800b7f6: 607b str r3, [r7, #4] + 800b7f8: e002 b.n 800b800 } else { stat = osError; - 800abb6: 2301 movs r3, #1 - 800abb8: 425b negs r3, r3 - 800abba: 607b str r3, [r7, #4] + 800b7fa: 2301 movs r3, #1 + 800b7fc: 425b negs r3, r3 + 800b7fe: 607b str r3, [r7, #4] } } return (stat); - 800abbc: 687b ldr r3, [r7, #4] + 800b800: 687b ldr r3, [r7, #4] } - 800abbe: 0018 movs r0, r3 - 800abc0: 46bd mov sp, r7 - 800abc2: b002 add sp, #8 - 800abc4: bd80 pop {r7, pc} - 800abc6: 46c0 nop ; (mov r8, r8) - 800abc8: 20000348 .word 0x20000348 + 800b802: 0018 movs r0, r3 + 800b804: 46bd mov sp, r7 + 800b806: b002 add sp, #8 + 800b808: bd80 pop {r7, pc} + 800b80a: 46c0 nop ; (mov r8, r8) + 800b80c: 20000428 .word 0x20000428 -0800abcc : +0800b810 : } return (state); } osStatus_t osKernelStart (void) { - 800abcc: b580 push {r7, lr} - 800abce: b082 sub sp, #8 - 800abd0: af00 add r7, sp, #0 + 800b810: b580 push {r7, lr} + 800b812: b082 sub sp, #8 + 800b814: af00 add r7, sp, #0 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800abd2: f3ef 8305 mrs r3, IPSR - 800abd6: 603b str r3, [r7, #0] + 800b816: f3ef 8305 mrs r3, IPSR + 800b81a: 603b str r3, [r7, #0] return(result); - 800abd8: 683b ldr r3, [r7, #0] + 800b81c: 683b ldr r3, [r7, #0] osStatus_t stat; if (IS_IRQ()) { - 800abda: 2b00 cmp r3, #0 - 800abdc: d003 beq.n 800abe6 + 800b81e: 2b00 cmp r3, #0 + 800b820: d003 beq.n 800b82a stat = osErrorISR; - 800abde: 2306 movs r3, #6 - 800abe0: 425b negs r3, r3 - 800abe2: 607b str r3, [r7, #4] - 800abe4: e010 b.n 800ac08 + 800b822: 2306 movs r3, #6 + 800b824: 425b negs r3, r3 + 800b826: 607b str r3, [r7, #4] + 800b828: e010 b.n 800b84c } else { if (KernelState == osKernelReady) { - 800abe6: 4b0b ldr r3, [pc, #44] ; (800ac14 ) - 800abe8: 681b ldr r3, [r3, #0] - 800abea: 2b01 cmp r3, #1 - 800abec: d109 bne.n 800ac02 + 800b82a: 4b0b ldr r3, [pc, #44] ; (800b858 ) + 800b82c: 681b ldr r3, [r3, #0] + 800b82e: 2b01 cmp r3, #1 + 800b830: d109 bne.n 800b846 /* Ensure SVC priority is at the reset value */ SVC_Setup(); - 800abee: f7ff ffbf bl 800ab70 + 800b832: f7ff ffbf bl 800b7b4 /* Change state to enable IRQ masking check */ KernelState = osKernelRunning; - 800abf2: 4b08 ldr r3, [pc, #32] ; (800ac14 ) - 800abf4: 2202 movs r2, #2 - 800abf6: 601a str r2, [r3, #0] + 800b836: 4b08 ldr r3, [pc, #32] ; (800b858 ) + 800b838: 2202 movs r2, #2 + 800b83a: 601a str r2, [r3, #0] /* Start the kernel scheduler */ vTaskStartScheduler(); - 800abf8: f001 fd52 bl 800c6a0 + 800b83c: f001 fd52 bl 800d2e4 stat = osOK; - 800abfc: 2300 movs r3, #0 - 800abfe: 607b str r3, [r7, #4] - 800ac00: e002 b.n 800ac08 + 800b840: 2300 movs r3, #0 + 800b842: 607b str r3, [r7, #4] + 800b844: e002 b.n 800b84c } else { stat = osError; - 800ac02: 2301 movs r3, #1 - 800ac04: 425b negs r3, r3 - 800ac06: 607b str r3, [r7, #4] + 800b846: 2301 movs r3, #1 + 800b848: 425b negs r3, r3 + 800b84a: 607b str r3, [r7, #4] } } return (stat); - 800ac08: 687b ldr r3, [r7, #4] + 800b84c: 687b ldr r3, [r7, #4] } - 800ac0a: 0018 movs r0, r3 - 800ac0c: 46bd mov sp, r7 - 800ac0e: b002 add sp, #8 - 800ac10: bd80 pop {r7, pc} - 800ac12: 46c0 nop ; (mov r8, r8) - 800ac14: 20000348 .word 0x20000348 + 800b84e: 0018 movs r0, r3 + 800b850: 46bd mov sp, r7 + 800b852: b002 add sp, #8 + 800b854: bd80 pop {r7, pc} + 800b856: 46c0 nop ; (mov r8, r8) + 800b858: 20000428 .word 0x20000428 -0800ac18 : +0800b85c : return (configCPU_CLOCK_HZ); } /*---------------------------------------------------------------------------*/ osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) { - 800ac18: b5b0 push {r4, r5, r7, lr} - 800ac1a: b08e sub sp, #56 ; 0x38 - 800ac1c: af04 add r7, sp, #16 - 800ac1e: 60f8 str r0, [r7, #12] - 800ac20: 60b9 str r1, [r7, #8] - 800ac22: 607a str r2, [r7, #4] + 800b85c: b5b0 push {r4, r5, r7, lr} + 800b85e: b08e sub sp, #56 ; 0x38 + 800b860: af04 add r7, sp, #16 + 800b862: 60f8 str r0, [r7, #12] + 800b864: 60b9 str r1, [r7, #8] + 800b866: 607a str r2, [r7, #4] uint32_t stack; TaskHandle_t hTask; UBaseType_t prio; int32_t mem; hTask = NULL; - 800ac24: 2300 movs r3, #0 - 800ac26: 613b str r3, [r7, #16] + 800b868: 2300 movs r3, #0 + 800b86a: 613b str r3, [r7, #16] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800ac28: f3ef 8305 mrs r3, IPSR - 800ac2c: 617b str r3, [r7, #20] + 800b86c: f3ef 8305 mrs r3, IPSR + 800b870: 617b str r3, [r7, #20] return(result); - 800ac2e: 697b ldr r3, [r7, #20] + 800b872: 697b ldr r3, [r7, #20] if (!IS_IRQ() && (func != NULL)) { - 800ac30: 2b00 cmp r3, #0 - 800ac32: d000 beq.n 800ac36 - 800ac34: e081 b.n 800ad3a - 800ac36: 68fb ldr r3, [r7, #12] - 800ac38: 2b00 cmp r3, #0 - 800ac3a: d100 bne.n 800ac3e - 800ac3c: e07d b.n 800ad3a + 800b874: 2b00 cmp r3, #0 + 800b876: d000 beq.n 800b87a + 800b878: e081 b.n 800b97e + 800b87a: 68fb ldr r3, [r7, #12] + 800b87c: 2b00 cmp r3, #0 + 800b87e: d100 bne.n 800b882 + 800b880: e07d b.n 800b97e stack = configMINIMAL_STACK_SIZE; - 800ac3e: 2380 movs r3, #128 ; 0x80 - 800ac40: 623b str r3, [r7, #32] + 800b882: 2380 movs r3, #128 ; 0x80 + 800b884: 623b str r3, [r7, #32] prio = (UBaseType_t)osPriorityNormal; - 800ac42: 2318 movs r3, #24 - 800ac44: 61fb str r3, [r7, #28] + 800b886: 2318 movs r3, #24 + 800b888: 61fb str r3, [r7, #28] name = NULL; - 800ac46: 2300 movs r3, #0 - 800ac48: 627b str r3, [r7, #36] ; 0x24 + 800b88a: 2300 movs r3, #0 + 800b88c: 627b str r3, [r7, #36] ; 0x24 mem = -1; - 800ac4a: 2301 movs r3, #1 - 800ac4c: 425b negs r3, r3 - 800ac4e: 61bb str r3, [r7, #24] + 800b88e: 2301 movs r3, #1 + 800b890: 425b negs r3, r3 + 800b892: 61bb str r3, [r7, #24] if (attr != NULL) { - 800ac50: 687b ldr r3, [r7, #4] - 800ac52: 2b00 cmp r3, #0 - 800ac54: d044 beq.n 800ace0 + 800b894: 687b ldr r3, [r7, #4] + 800b896: 2b00 cmp r3, #0 + 800b898: d044 beq.n 800b924 if (attr->name != NULL) { - 800ac56: 687b ldr r3, [r7, #4] - 800ac58: 681b ldr r3, [r3, #0] - 800ac5a: 2b00 cmp r3, #0 - 800ac5c: d002 beq.n 800ac64 + 800b89a: 687b ldr r3, [r7, #4] + 800b89c: 681b ldr r3, [r3, #0] + 800b89e: 2b00 cmp r3, #0 + 800b8a0: d002 beq.n 800b8a8 name = attr->name; - 800ac5e: 687b ldr r3, [r7, #4] - 800ac60: 681b ldr r3, [r3, #0] - 800ac62: 627b str r3, [r7, #36] ; 0x24 + 800b8a2: 687b ldr r3, [r7, #4] + 800b8a4: 681b ldr r3, [r3, #0] + 800b8a6: 627b str r3, [r7, #36] ; 0x24 } if (attr->priority != osPriorityNone) { - 800ac64: 687b ldr r3, [r7, #4] - 800ac66: 699b ldr r3, [r3, #24] - 800ac68: 2b00 cmp r3, #0 - 800ac6a: d002 beq.n 800ac72 + 800b8a8: 687b ldr r3, [r7, #4] + 800b8aa: 699b ldr r3, [r3, #24] + 800b8ac: 2b00 cmp r3, #0 + 800b8ae: d002 beq.n 800b8b6 prio = (UBaseType_t)attr->priority; - 800ac6c: 687b ldr r3, [r7, #4] - 800ac6e: 699b ldr r3, [r3, #24] - 800ac70: 61fb str r3, [r7, #28] + 800b8b0: 687b ldr r3, [r7, #4] + 800b8b2: 699b ldr r3, [r3, #24] + 800b8b4: 61fb str r3, [r7, #28] } if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) { - 800ac72: 69fb ldr r3, [r7, #28] - 800ac74: 2b00 cmp r3, #0 - 800ac76: d007 beq.n 800ac88 - 800ac78: 69fb ldr r3, [r7, #28] - 800ac7a: 2b38 cmp r3, #56 ; 0x38 - 800ac7c: d804 bhi.n 800ac88 - 800ac7e: 687b ldr r3, [r7, #4] - 800ac80: 685b ldr r3, [r3, #4] - 800ac82: 2201 movs r2, #1 - 800ac84: 4013 ands r3, r2 - 800ac86: d001 beq.n 800ac8c + 800b8b6: 69fb ldr r3, [r7, #28] + 800b8b8: 2b00 cmp r3, #0 + 800b8ba: d007 beq.n 800b8cc + 800b8bc: 69fb ldr r3, [r7, #28] + 800b8be: 2b38 cmp r3, #56 ; 0x38 + 800b8c0: d804 bhi.n 800b8cc + 800b8c2: 687b ldr r3, [r7, #4] + 800b8c4: 685b ldr r3, [r3, #4] + 800b8c6: 2201 movs r2, #1 + 800b8c8: 4013 ands r3, r2 + 800b8ca: d001 beq.n 800b8d0 return (NULL); - 800ac88: 2300 movs r3, #0 - 800ac8a: e057 b.n 800ad3c + 800b8cc: 2300 movs r3, #0 + 800b8ce: e057 b.n 800b980 } if (attr->stack_size > 0U) { - 800ac8c: 687b ldr r3, [r7, #4] - 800ac8e: 695b ldr r3, [r3, #20] - 800ac90: 2b00 cmp r3, #0 - 800ac92: d003 beq.n 800ac9c + 800b8d0: 687b ldr r3, [r7, #4] + 800b8d2: 695b ldr r3, [r3, #20] + 800b8d4: 2b00 cmp r3, #0 + 800b8d6: d003 beq.n 800b8e0 /* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports. */ /* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */ stack = attr->stack_size / sizeof(StackType_t); - 800ac94: 687b ldr r3, [r7, #4] - 800ac96: 695b ldr r3, [r3, #20] - 800ac98: 089b lsrs r3, r3, #2 - 800ac9a: 623b str r3, [r7, #32] + 800b8d8: 687b ldr r3, [r7, #4] + 800b8da: 695b ldr r3, [r3, #20] + 800b8dc: 089b lsrs r3, r3, #2 + 800b8de: 623b str r3, [r7, #32] } if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTask_t)) && - 800ac9c: 687b ldr r3, [r7, #4] - 800ac9e: 689b ldr r3, [r3, #8] - 800aca0: 2b00 cmp r3, #0 - 800aca2: d00e beq.n 800acc2 - 800aca4: 687b ldr r3, [r7, #4] - 800aca6: 68db ldr r3, [r3, #12] - 800aca8: 2bbb cmp r3, #187 ; 0xbb - 800acaa: d90a bls.n 800acc2 + 800b8e0: 687b ldr r3, [r7, #4] + 800b8e2: 689b ldr r3, [r3, #8] + 800b8e4: 2b00 cmp r3, #0 + 800b8e6: d00e beq.n 800b906 + 800b8e8: 687b ldr r3, [r7, #4] + 800b8ea: 68db ldr r3, [r3, #12] + 800b8ec: 2bbb cmp r3, #187 ; 0xbb + 800b8ee: d90a bls.n 800b906 (attr->stack_mem != NULL) && (attr->stack_size > 0U)) { - 800acac: 687b ldr r3, [r7, #4] - 800acae: 691b ldr r3, [r3, #16] + 800b8f0: 687b ldr r3, [r7, #4] + 800b8f2: 691b ldr r3, [r3, #16] if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTask_t)) && - 800acb0: 2b00 cmp r3, #0 - 800acb2: d006 beq.n 800acc2 + 800b8f4: 2b00 cmp r3, #0 + 800b8f6: d006 beq.n 800b906 (attr->stack_mem != NULL) && (attr->stack_size > 0U)) { - 800acb4: 687b ldr r3, [r7, #4] - 800acb6: 695b ldr r3, [r3, #20] - 800acb8: 2b00 cmp r3, #0 - 800acba: d002 beq.n 800acc2 + 800b8f8: 687b ldr r3, [r7, #4] + 800b8fa: 695b ldr r3, [r3, #20] + 800b8fc: 2b00 cmp r3, #0 + 800b8fe: d002 beq.n 800b906 mem = 1; - 800acbc: 2301 movs r3, #1 - 800acbe: 61bb str r3, [r7, #24] - 800acc0: e010 b.n 800ace4 + 800b900: 2301 movs r3, #1 + 800b902: 61bb str r3, [r7, #24] + 800b904: e010 b.n 800b928 } else { if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) { - 800acc2: 687b ldr r3, [r7, #4] - 800acc4: 689b ldr r3, [r3, #8] - 800acc6: 2b00 cmp r3, #0 - 800acc8: d10c bne.n 800ace4 - 800acca: 687b ldr r3, [r7, #4] - 800accc: 68db ldr r3, [r3, #12] - 800acce: 2b00 cmp r3, #0 - 800acd0: d108 bne.n 800ace4 - 800acd2: 687b ldr r3, [r7, #4] - 800acd4: 691b ldr r3, [r3, #16] - 800acd6: 2b00 cmp r3, #0 - 800acd8: d104 bne.n 800ace4 + 800b906: 687b ldr r3, [r7, #4] + 800b908: 689b ldr r3, [r3, #8] + 800b90a: 2b00 cmp r3, #0 + 800b90c: d10c bne.n 800b928 + 800b90e: 687b ldr r3, [r7, #4] + 800b910: 68db ldr r3, [r3, #12] + 800b912: 2b00 cmp r3, #0 + 800b914: d108 bne.n 800b928 + 800b916: 687b ldr r3, [r7, #4] + 800b918: 691b ldr r3, [r3, #16] + 800b91a: 2b00 cmp r3, #0 + 800b91c: d104 bne.n 800b928 mem = 0; - 800acda: 2300 movs r3, #0 - 800acdc: 61bb str r3, [r7, #24] - 800acde: e001 b.n 800ace4 + 800b91e: 2300 movs r3, #0 + 800b920: 61bb str r3, [r7, #24] + 800b922: e001 b.n 800b928 } } } else { mem = 0; - 800ace0: 2300 movs r3, #0 - 800ace2: 61bb str r3, [r7, #24] + 800b924: 2300 movs r3, #0 + 800b926: 61bb str r3, [r7, #24] } if (mem == 1) { - 800ace4: 69bb ldr r3, [r7, #24] - 800ace6: 2b01 cmp r3, #1 - 800ace8: d112 bne.n 800ad10 + 800b928: 69bb ldr r3, [r7, #24] + 800b92a: 2b01 cmp r3, #1 + 800b92c: d112 bne.n 800b954 #if (configSUPPORT_STATIC_ALLOCATION == 1) hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t *)attr->stack_mem, - 800acea: 687b ldr r3, [r7, #4] - 800acec: 691a ldr r2, [r3, #16] + 800b92e: 687b ldr r3, [r7, #4] + 800b930: 691a ldr r2, [r3, #16] (StaticTask_t *)attr->cb_mem); - 800acee: 687b ldr r3, [r7, #4] - 800acf0: 689b ldr r3, [r3, #8] + 800b932: 687b ldr r3, [r7, #4] + 800b934: 689b ldr r3, [r3, #8] hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t *)attr->stack_mem, - 800acf2: 68bd ldr r5, [r7, #8] - 800acf4: 6a3c ldr r4, [r7, #32] - 800acf6: 6a79 ldr r1, [r7, #36] ; 0x24 - 800acf8: 68f8 ldr r0, [r7, #12] - 800acfa: 9302 str r3, [sp, #8] - 800acfc: 9201 str r2, [sp, #4] - 800acfe: 69fb ldr r3, [r7, #28] - 800ad00: 9300 str r3, [sp, #0] - 800ad02: 002b movs r3, r5 - 800ad04: 0022 movs r2, r4 - 800ad06: f001 fb0c bl 800c322 - 800ad0a: 0003 movs r3, r0 - 800ad0c: 613b str r3, [r7, #16] - 800ad0e: e014 b.n 800ad3a + 800b936: 68bd ldr r5, [r7, #8] + 800b938: 6a3c ldr r4, [r7, #32] + 800b93a: 6a79 ldr r1, [r7, #36] ; 0x24 + 800b93c: 68f8 ldr r0, [r7, #12] + 800b93e: 9302 str r3, [sp, #8] + 800b940: 9201 str r2, [sp, #4] + 800b942: 69fb ldr r3, [r7, #28] + 800b944: 9300 str r3, [sp, #0] + 800b946: 002b movs r3, r5 + 800b948: 0022 movs r2, r4 + 800b94a: f001 fb0c bl 800cf66 + 800b94e: 0003 movs r3, r0 + 800b950: 613b str r3, [r7, #16] + 800b952: e014 b.n 800b97e #endif } else { if (mem == 0) { - 800ad10: 69bb ldr r3, [r7, #24] - 800ad12: 2b00 cmp r3, #0 - 800ad14: d111 bne.n 800ad3a + 800b954: 69bb ldr r3, [r7, #24] + 800b956: 2b00 cmp r3, #0 + 800b958: d111 bne.n 800b97e #if (configSUPPORT_DYNAMIC_ALLOCATION == 1) if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) { - 800ad16: 6a3b ldr r3, [r7, #32] - 800ad18: b29a uxth r2, r3 - 800ad1a: 68bc ldr r4, [r7, #8] - 800ad1c: 6a79 ldr r1, [r7, #36] ; 0x24 - 800ad1e: 68f8 ldr r0, [r7, #12] - 800ad20: 2310 movs r3, #16 - 800ad22: 18fb adds r3, r7, r3 - 800ad24: 9301 str r3, [sp, #4] - 800ad26: 69fb ldr r3, [r7, #28] - 800ad28: 9300 str r3, [sp, #0] - 800ad2a: 0023 movs r3, r4 - 800ad2c: f001 fb3d bl 800c3aa - 800ad30: 0003 movs r3, r0 - 800ad32: 2b01 cmp r3, #1 - 800ad34: d001 beq.n 800ad3a + 800b95a: 6a3b ldr r3, [r7, #32] + 800b95c: b29a uxth r2, r3 + 800b95e: 68bc ldr r4, [r7, #8] + 800b960: 6a79 ldr r1, [r7, #36] ; 0x24 + 800b962: 68f8 ldr r0, [r7, #12] + 800b964: 2310 movs r3, #16 + 800b966: 18fb adds r3, r7, r3 + 800b968: 9301 str r3, [sp, #4] + 800b96a: 69fb ldr r3, [r7, #28] + 800b96c: 9300 str r3, [sp, #0] + 800b96e: 0023 movs r3, r4 + 800b970: f001 fb3d bl 800cfee + 800b974: 0003 movs r3, r0 + 800b976: 2b01 cmp r3, #1 + 800b978: d001 beq.n 800b97e hTask = NULL; - 800ad36: 2300 movs r3, #0 - 800ad38: 613b str r3, [r7, #16] + 800b97a: 2300 movs r3, #0 + 800b97c: 613b str r3, [r7, #16] #endif } } } return ((osThreadId_t)hTask); - 800ad3a: 693b ldr r3, [r7, #16] + 800b97e: 693b ldr r3, [r7, #16] } - 800ad3c: 0018 movs r0, r3 - 800ad3e: 46bd mov sp, r7 - 800ad40: b00a add sp, #40 ; 0x28 - 800ad42: bdb0 pop {r4, r5, r7, pc} + 800b980: 0018 movs r0, r3 + 800b982: 46bd mov sp, r7 + 800b984: b00a add sp, #40 ; 0x28 + 800b986: bdb0 pop {r4, r5, r7, pc} -0800ad44 : +0800b988 : /* Return flags before clearing */ return (rflags); } #endif /* (configUSE_OS2_THREAD_FLAGS == 1) */ osStatus_t osDelay (uint32_t ticks) { - 800ad44: b580 push {r7, lr} - 800ad46: b084 sub sp, #16 - 800ad48: af00 add r7, sp, #0 - 800ad4a: 6078 str r0, [r7, #4] + 800b988: b580 push {r7, lr} + 800b98a: b084 sub sp, #16 + 800b98c: af00 add r7, sp, #0 + 800b98e: 6078 str r0, [r7, #4] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800ad4c: f3ef 8305 mrs r3, IPSR - 800ad50: 60bb str r3, [r7, #8] + 800b990: f3ef 8305 mrs r3, IPSR + 800b994: 60bb str r3, [r7, #8] return(result); - 800ad52: 68bb ldr r3, [r7, #8] + 800b996: 68bb ldr r3, [r7, #8] osStatus_t stat; if (IS_IRQ()) { - 800ad54: 2b00 cmp r3, #0 - 800ad56: d003 beq.n 800ad60 + 800b998: 2b00 cmp r3, #0 + 800b99a: d003 beq.n 800b9a4 stat = osErrorISR; - 800ad58: 2306 movs r3, #6 - 800ad5a: 425b negs r3, r3 - 800ad5c: 60fb str r3, [r7, #12] - 800ad5e: e008 b.n 800ad72 + 800b99c: 2306 movs r3, #6 + 800b99e: 425b negs r3, r3 + 800b9a0: 60fb str r3, [r7, #12] + 800b9a2: e008 b.n 800b9b6 } else { stat = osOK; - 800ad60: 2300 movs r3, #0 - 800ad62: 60fb str r3, [r7, #12] + 800b9a4: 2300 movs r3, #0 + 800b9a6: 60fb str r3, [r7, #12] if (ticks != 0U) { - 800ad64: 687b ldr r3, [r7, #4] - 800ad66: 2b00 cmp r3, #0 - 800ad68: d003 beq.n 800ad72 + 800b9a8: 687b ldr r3, [r7, #4] + 800b9aa: 2b00 cmp r3, #0 + 800b9ac: d003 beq.n 800b9b6 vTaskDelay(ticks); - 800ad6a: 687b ldr r3, [r7, #4] - 800ad6c: 0018 movs r0, r3 - 800ad6e: f001 fc71 bl 800c654 + 800b9ae: 687b ldr r3, [r7, #4] + 800b9b0: 0018 movs r0, r3 + 800b9b2: f001 fc71 bl 800d298 } } return (stat); - 800ad72: 68fb ldr r3, [r7, #12] + 800b9b6: 68fb ldr r3, [r7, #12] } - 800ad74: 0018 movs r0, r3 - 800ad76: 46bd mov sp, r7 - 800ad78: b004 add sp, #16 - 800ad7a: bd80 pop {r7, pc} + 800b9b8: 0018 movs r0, r3 + 800b9ba: 46bd mov sp, r7 + 800b9bc: b004 add sp, #16 + 800b9be: bd80 pop {r7, pc} -0800ad7c : +0800b9c0 : } /*---------------------------------------------------------------------------*/ #if (configUSE_OS2_TIMER == 1) static void TimerCallback (TimerHandle_t hTimer) { - 800ad7c: b580 push {r7, lr} - 800ad7e: b084 sub sp, #16 - 800ad80: af00 add r7, sp, #0 - 800ad82: 6078 str r0, [r7, #4] + 800b9c0: b580 push {r7, lr} + 800b9c2: b084 sub sp, #16 + 800b9c4: af00 add r7, sp, #0 + 800b9c6: 6078 str r0, [r7, #4] TimerCallback_t *callb; callb = (TimerCallback_t *)pvTimerGetTimerID (hTimer); - 800ad84: 687b ldr r3, [r7, #4] - 800ad86: 0018 movs r0, r3 - 800ad88: f002 fdec bl 800d964 - 800ad8c: 0003 movs r3, r0 - 800ad8e: 60fb str r3, [r7, #12] + 800b9c8: 687b ldr r3, [r7, #4] + 800b9ca: 0018 movs r0, r3 + 800b9cc: f002 fdec bl 800e5a8 + 800b9d0: 0003 movs r3, r0 + 800b9d2: 60fb str r3, [r7, #12] if (callb != NULL) { - 800ad90: 68fb ldr r3, [r7, #12] - 800ad92: 2b00 cmp r3, #0 - 800ad94: d005 beq.n 800ada2 + 800b9d4: 68fb ldr r3, [r7, #12] + 800b9d6: 2b00 cmp r3, #0 + 800b9d8: d005 beq.n 800b9e6 callb->func (callb->arg); - 800ad96: 68fb ldr r3, [r7, #12] - 800ad98: 681a ldr r2, [r3, #0] - 800ad9a: 68fb ldr r3, [r7, #12] - 800ad9c: 685b ldr r3, [r3, #4] - 800ad9e: 0018 movs r0, r3 - 800ada0: 4790 blx r2 + 800b9da: 68fb ldr r3, [r7, #12] + 800b9dc: 681a ldr r2, [r3, #0] + 800b9de: 68fb ldr r3, [r7, #12] + 800b9e0: 685b ldr r3, [r3, #4] + 800b9e2: 0018 movs r0, r3 + 800b9e4: 4790 blx r2 } } - 800ada2: 46c0 nop ; (mov r8, r8) - 800ada4: 46bd mov sp, r7 - 800ada6: b004 add sp, #16 - 800ada8: bd80 pop {r7, pc} + 800b9e6: 46c0 nop ; (mov r8, r8) + 800b9e8: 46bd mov sp, r7 + 800b9ea: b004 add sp, #16 + 800b9ec: bd80 pop {r7, pc} ... -0800adac : +0800b9f0 : osTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr) { - 800adac: b590 push {r4, r7, lr} - 800adae: b08d sub sp, #52 ; 0x34 - 800adb0: af02 add r7, sp, #8 - 800adb2: 60f8 str r0, [r7, #12] - 800adb4: 607a str r2, [r7, #4] - 800adb6: 603b str r3, [r7, #0] - 800adb8: 240b movs r4, #11 - 800adba: 193b adds r3, r7, r4 - 800adbc: 1c0a adds r2, r1, #0 - 800adbe: 701a strb r2, [r3, #0] + 800b9f0: b590 push {r4, r7, lr} + 800b9f2: b08d sub sp, #52 ; 0x34 + 800b9f4: af02 add r7, sp, #8 + 800b9f6: 60f8 str r0, [r7, #12] + 800b9f8: 607a str r2, [r7, #4] + 800b9fa: 603b str r3, [r7, #0] + 800b9fc: 240b movs r4, #11 + 800b9fe: 193b adds r3, r7, r4 + 800ba00: 1c0a adds r2, r1, #0 + 800ba02: 701a strb r2, [r3, #0] TimerHandle_t hTimer; TimerCallback_t *callb; UBaseType_t reload; int32_t mem; hTimer = NULL; - 800adc0: 2300 movs r3, #0 - 800adc2: 623b str r3, [r7, #32] + 800ba04: 2300 movs r3, #0 + 800ba06: 623b str r3, [r7, #32] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800adc4: f3ef 8305 mrs r3, IPSR - 800adc8: 613b str r3, [r7, #16] + 800ba08: f3ef 8305 mrs r3, IPSR + 800ba0c: 613b str r3, [r7, #16] return(result); - 800adca: 693b ldr r3, [r7, #16] + 800ba0e: 693b ldr r3, [r7, #16] if (!IS_IRQ() && (func != NULL)) { - 800adcc: 2b00 cmp r3, #0 - 800adce: d000 beq.n 800add2 - 800add0: e06b b.n 800aeaa - 800add2: 68fb ldr r3, [r7, #12] - 800add4: 2b00 cmp r3, #0 - 800add6: d100 bne.n 800adda - 800add8: e067 b.n 800aeaa + 800ba10: 2b00 cmp r3, #0 + 800ba12: d000 beq.n 800ba16 + 800ba14: e06b b.n 800baee + 800ba16: 68fb ldr r3, [r7, #12] + 800ba18: 2b00 cmp r3, #0 + 800ba1a: d100 bne.n 800ba1e + 800ba1c: e067 b.n 800baee /* Allocate memory to store callback function and argument */ callb = pvPortMalloc (sizeof(TimerCallback_t)); - 800adda: 2008 movs r0, #8 - 800addc: f002 ff10 bl 800dc00 - 800ade0: 0003 movs r3, r0 - 800ade2: 617b str r3, [r7, #20] + 800ba1e: 2008 movs r0, #8 + 800ba20: f002 ff0e bl 800e840 + 800ba24: 0003 movs r3, r0 + 800ba26: 617b str r3, [r7, #20] if (callb != NULL) { - 800ade4: 697b ldr r3, [r7, #20] - 800ade6: 2b00 cmp r3, #0 - 800ade8: d05f beq.n 800aeaa + 800ba28: 697b ldr r3, [r7, #20] + 800ba2a: 2b00 cmp r3, #0 + 800ba2c: d05f beq.n 800baee callb->func = func; - 800adea: 697b ldr r3, [r7, #20] - 800adec: 68fa ldr r2, [r7, #12] - 800adee: 601a str r2, [r3, #0] + 800ba2e: 697b ldr r3, [r7, #20] + 800ba30: 68fa ldr r2, [r7, #12] + 800ba32: 601a str r2, [r3, #0] callb->arg = argument; - 800adf0: 697b ldr r3, [r7, #20] - 800adf2: 687a ldr r2, [r7, #4] - 800adf4: 605a str r2, [r3, #4] + 800ba34: 697b ldr r3, [r7, #20] + 800ba36: 687a ldr r2, [r7, #4] + 800ba38: 605a str r2, [r3, #4] if (type == osTimerOnce) { - 800adf6: 193b adds r3, r7, r4 - 800adf8: 781b ldrb r3, [r3, #0] - 800adfa: 2b00 cmp r3, #0 - 800adfc: d102 bne.n 800ae04 + 800ba3a: 193b adds r3, r7, r4 + 800ba3c: 781b ldrb r3, [r3, #0] + 800ba3e: 2b00 cmp r3, #0 + 800ba40: d102 bne.n 800ba48 reload = pdFALSE; - 800adfe: 2300 movs r3, #0 - 800ae00: 61fb str r3, [r7, #28] - 800ae02: e001 b.n 800ae08 + 800ba42: 2300 movs r3, #0 + 800ba44: 61fb str r3, [r7, #28] + 800ba46: e001 b.n 800ba4c } else { reload = pdTRUE; - 800ae04: 2301 movs r3, #1 - 800ae06: 61fb str r3, [r7, #28] + 800ba48: 2301 movs r3, #1 + 800ba4a: 61fb str r3, [r7, #28] } mem = -1; - 800ae08: 2301 movs r3, #1 - 800ae0a: 425b negs r3, r3 - 800ae0c: 61bb str r3, [r7, #24] + 800ba4c: 2301 movs r3, #1 + 800ba4e: 425b negs r3, r3 + 800ba50: 61bb str r3, [r7, #24] name = NULL; - 800ae0e: 2300 movs r3, #0 - 800ae10: 627b str r3, [r7, #36] ; 0x24 + 800ba52: 2300 movs r3, #0 + 800ba54: 627b str r3, [r7, #36] ; 0x24 if (attr != NULL) { - 800ae12: 683b ldr r3, [r7, #0] - 800ae14: 2b00 cmp r3, #0 - 800ae16: d01c beq.n 800ae52 + 800ba56: 683b ldr r3, [r7, #0] + 800ba58: 2b00 cmp r3, #0 + 800ba5a: d01c beq.n 800ba96 if (attr->name != NULL) { - 800ae18: 683b ldr r3, [r7, #0] - 800ae1a: 681b ldr r3, [r3, #0] - 800ae1c: 2b00 cmp r3, #0 - 800ae1e: d002 beq.n 800ae26 + 800ba5c: 683b ldr r3, [r7, #0] + 800ba5e: 681b ldr r3, [r3, #0] + 800ba60: 2b00 cmp r3, #0 + 800ba62: d002 beq.n 800ba6a name = attr->name; - 800ae20: 683b ldr r3, [r7, #0] - 800ae22: 681b ldr r3, [r3, #0] - 800ae24: 627b str r3, [r7, #36] ; 0x24 + 800ba64: 683b ldr r3, [r7, #0] + 800ba66: 681b ldr r3, [r3, #0] + 800ba68: 627b str r3, [r7, #36] ; 0x24 } if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTimer_t))) { - 800ae26: 683b ldr r3, [r7, #0] - 800ae28: 689b ldr r3, [r3, #8] - 800ae2a: 2b00 cmp r3, #0 - 800ae2c: d006 beq.n 800ae3c - 800ae2e: 683b ldr r3, [r7, #0] - 800ae30: 68db ldr r3, [r3, #12] - 800ae32: 2b2b cmp r3, #43 ; 0x2b - 800ae34: d902 bls.n 800ae3c + 800ba6a: 683b ldr r3, [r7, #0] + 800ba6c: 689b ldr r3, [r3, #8] + 800ba6e: 2b00 cmp r3, #0 + 800ba70: d006 beq.n 800ba80 + 800ba72: 683b ldr r3, [r7, #0] + 800ba74: 68db ldr r3, [r3, #12] + 800ba76: 2b2b cmp r3, #43 ; 0x2b + 800ba78: d902 bls.n 800ba80 mem = 1; - 800ae36: 2301 movs r3, #1 - 800ae38: 61bb str r3, [r7, #24] - 800ae3a: e00c b.n 800ae56 + 800ba7a: 2301 movs r3, #1 + 800ba7c: 61bb str r3, [r7, #24] + 800ba7e: e00c b.n 800ba9a } else { if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) { - 800ae3c: 683b ldr r3, [r7, #0] - 800ae3e: 689b ldr r3, [r3, #8] - 800ae40: 2b00 cmp r3, #0 - 800ae42: d108 bne.n 800ae56 - 800ae44: 683b ldr r3, [r7, #0] - 800ae46: 68db ldr r3, [r3, #12] - 800ae48: 2b00 cmp r3, #0 - 800ae4a: d104 bne.n 800ae56 + 800ba80: 683b ldr r3, [r7, #0] + 800ba82: 689b ldr r3, [r3, #8] + 800ba84: 2b00 cmp r3, #0 + 800ba86: d108 bne.n 800ba9a + 800ba88: 683b ldr r3, [r7, #0] + 800ba8a: 68db ldr r3, [r3, #12] + 800ba8c: 2b00 cmp r3, #0 + 800ba8e: d104 bne.n 800ba9a mem = 0; - 800ae4c: 2300 movs r3, #0 - 800ae4e: 61bb str r3, [r7, #24] - 800ae50: e001 b.n 800ae56 + 800ba90: 2300 movs r3, #0 + 800ba92: 61bb str r3, [r7, #24] + 800ba94: e001 b.n 800ba9a } } } else { mem = 0; - 800ae52: 2300 movs r3, #0 - 800ae54: 61bb str r3, [r7, #24] + 800ba96: 2300 movs r3, #0 + 800ba98: 61bb str r3, [r7, #24] } if (mem == 1) { - 800ae56: 69bb ldr r3, [r7, #24] - 800ae58: 2b01 cmp r3, #1 - 800ae5a: d10e bne.n 800ae7a + 800ba9a: 69bb ldr r3, [r7, #24] + 800ba9c: 2b01 cmp r3, #1 + 800ba9e: d10e bne.n 800babe #if (configSUPPORT_STATIC_ALLOCATION == 1) hTimer = xTimerCreateStatic (name, 1, reload, callb, TimerCallback, (StaticTimer_t *)attr->cb_mem); - 800ae5c: 683b ldr r3, [r7, #0] - 800ae5e: 689b ldr r3, [r3, #8] - 800ae60: 6979 ldr r1, [r7, #20] - 800ae62: 69fa ldr r2, [r7, #28] - 800ae64: 6a78 ldr r0, [r7, #36] ; 0x24 - 800ae66: 9301 str r3, [sp, #4] - 800ae68: 4b12 ldr r3, [pc, #72] ; (800aeb4 ) - 800ae6a: 9300 str r3, [sp, #0] - 800ae6c: 000b movs r3, r1 - 800ae6e: 2101 movs r1, #1 - 800ae70: f002 fa25 bl 800d2be - 800ae74: 0003 movs r3, r0 - 800ae76: 623b str r3, [r7, #32] - 800ae78: e00d b.n 800ae96 + 800baa0: 683b ldr r3, [r7, #0] + 800baa2: 689b ldr r3, [r3, #8] + 800baa4: 6979 ldr r1, [r7, #20] + 800baa6: 69fa ldr r2, [r7, #28] + 800baa8: 6a78 ldr r0, [r7, #36] ; 0x24 + 800baaa: 9301 str r3, [sp, #4] + 800baac: 4b12 ldr r3, [pc, #72] ; (800baf8 ) + 800baae: 9300 str r3, [sp, #0] + 800bab0: 000b movs r3, r1 + 800bab2: 2101 movs r1, #1 + 800bab4: f002 fa25 bl 800df02 + 800bab8: 0003 movs r3, r0 + 800baba: 623b str r3, [r7, #32] + 800babc: e00d b.n 800bada #endif } else { if (mem == 0) { - 800ae7a: 69bb ldr r3, [r7, #24] - 800ae7c: 2b00 cmp r3, #0 - 800ae7e: d10a bne.n 800ae96 + 800babe: 69bb ldr r3, [r7, #24] + 800bac0: 2b00 cmp r3, #0 + 800bac2: d10a bne.n 800bada #if (configSUPPORT_DYNAMIC_ALLOCATION == 1) hTimer = xTimerCreate (name, 1, reload, callb, TimerCallback); - 800ae80: 6979 ldr r1, [r7, #20] - 800ae82: 69fa ldr r2, [r7, #28] - 800ae84: 6a78 ldr r0, [r7, #36] ; 0x24 - 800ae86: 4b0b ldr r3, [pc, #44] ; (800aeb4 ) - 800ae88: 9300 str r3, [sp, #0] - 800ae8a: 000b movs r3, r1 - 800ae8c: 2101 movs r1, #1 - 800ae8e: f002 f9f3 bl 800d278 - 800ae92: 0003 movs r3, r0 - 800ae94: 623b str r3, [r7, #32] + 800bac4: 6979 ldr r1, [r7, #20] + 800bac6: 69fa ldr r2, [r7, #28] + 800bac8: 6a78 ldr r0, [r7, #36] ; 0x24 + 800baca: 4b0b ldr r3, [pc, #44] ; (800baf8 ) + 800bacc: 9300 str r3, [sp, #0] + 800bace: 000b movs r3, r1 + 800bad0: 2101 movs r1, #1 + 800bad2: f002 f9f3 bl 800debc + 800bad6: 0003 movs r3, r0 + 800bad8: 623b str r3, [r7, #32] #endif } } if ((hTimer == NULL) && (callb != NULL)) { - 800ae96: 6a3b ldr r3, [r7, #32] - 800ae98: 2b00 cmp r3, #0 - 800ae9a: d106 bne.n 800aeaa - 800ae9c: 697b ldr r3, [r7, #20] - 800ae9e: 2b00 cmp r3, #0 - 800aea0: d003 beq.n 800aeaa + 800bada: 6a3b ldr r3, [r7, #32] + 800badc: 2b00 cmp r3, #0 + 800bade: d106 bne.n 800baee + 800bae0: 697b ldr r3, [r7, #20] + 800bae2: 2b00 cmp r3, #0 + 800bae4: d003 beq.n 800baee vPortFree (callb); - 800aea2: 697b ldr r3, [r7, #20] - 800aea4: 0018 movs r0, r3 - 800aea6: f002 ff57 bl 800dd58 + 800bae6: 697b ldr r3, [r7, #20] + 800bae8: 0018 movs r0, r3 + 800baea: f002 ff55 bl 800e998 } } } return ((osTimerId_t)hTimer); - 800aeaa: 6a3b ldr r3, [r7, #32] + 800baee: 6a3b ldr r3, [r7, #32] } - 800aeac: 0018 movs r0, r3 - 800aeae: 46bd mov sp, r7 - 800aeb0: b00b add sp, #44 ; 0x2c - 800aeb2: bd90 pop {r4, r7, pc} - 800aeb4: 0800ad7d .word 0x0800ad7d + 800baf0: 0018 movs r0, r3 + 800baf2: 46bd mov sp, r7 + 800baf4: b00b add sp, #44 ; 0x2c + 800baf6: bd90 pop {r4, r7, pc} + 800baf8: 0800b9c1 .word 0x0800b9c1 -0800aeb8 : +0800bafc : } return (p); } osStatus_t osTimerStart (osTimerId_t timer_id, uint32_t ticks) { - 800aeb8: b580 push {r7, lr} - 800aeba: b088 sub sp, #32 - 800aebc: af02 add r7, sp, #8 - 800aebe: 6078 str r0, [r7, #4] - 800aec0: 6039 str r1, [r7, #0] + 800bafc: b580 push {r7, lr} + 800bafe: b088 sub sp, #32 + 800bb00: af02 add r7, sp, #8 + 800bb02: 6078 str r0, [r7, #4] + 800bb04: 6039 str r1, [r7, #0] TimerHandle_t hTimer = (TimerHandle_t)timer_id; - 800aec2: 687b ldr r3, [r7, #4] - 800aec4: 613b str r3, [r7, #16] + 800bb06: 687b ldr r3, [r7, #4] + 800bb08: 613b str r3, [r7, #16] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800aec6: f3ef 8305 mrs r3, IPSR - 800aeca: 60fb str r3, [r7, #12] + 800bb0a: f3ef 8305 mrs r3, IPSR + 800bb0e: 60fb str r3, [r7, #12] return(result); - 800aecc: 68fb ldr r3, [r7, #12] + 800bb10: 68fb ldr r3, [r7, #12] osStatus_t stat; if (IS_IRQ()) { - 800aece: 2b00 cmp r3, #0 - 800aed0: d003 beq.n 800aeda + 800bb12: 2b00 cmp r3, #0 + 800bb14: d003 beq.n 800bb1e stat = osErrorISR; - 800aed2: 2306 movs r3, #6 - 800aed4: 425b negs r3, r3 - 800aed6: 617b str r3, [r7, #20] - 800aed8: e017 b.n 800af0a + 800bb16: 2306 movs r3, #6 + 800bb18: 425b negs r3, r3 + 800bb1a: 617b str r3, [r7, #20] + 800bb1c: e017 b.n 800bb4e } else if (hTimer == NULL) { - 800aeda: 693b ldr r3, [r7, #16] - 800aedc: 2b00 cmp r3, #0 - 800aede: d103 bne.n 800aee8 + 800bb1e: 693b ldr r3, [r7, #16] + 800bb20: 2b00 cmp r3, #0 + 800bb22: d103 bne.n 800bb2c stat = osErrorParameter; - 800aee0: 2304 movs r3, #4 - 800aee2: 425b negs r3, r3 - 800aee4: 617b str r3, [r7, #20] - 800aee6: e010 b.n 800af0a + 800bb24: 2304 movs r3, #4 + 800bb26: 425b negs r3, r3 + 800bb28: 617b str r3, [r7, #20] + 800bb2a: e010 b.n 800bb4e } else { if (xTimerChangePeriod (hTimer, ticks, 0) == pdPASS) { - 800aee8: 683a ldr r2, [r7, #0] - 800aeea: 6938 ldr r0, [r7, #16] - 800aeec: 2300 movs r3, #0 - 800aeee: 9300 str r3, [sp, #0] - 800aef0: 2300 movs r3, #0 - 800aef2: 2104 movs r1, #4 - 800aef4: f002 fa42 bl 800d37c - 800aef8: 0003 movs r3, r0 - 800aefa: 2b01 cmp r3, #1 - 800aefc: d102 bne.n 800af04 + 800bb2c: 683a ldr r2, [r7, #0] + 800bb2e: 6938 ldr r0, [r7, #16] + 800bb30: 2300 movs r3, #0 + 800bb32: 9300 str r3, [sp, #0] + 800bb34: 2300 movs r3, #0 + 800bb36: 2104 movs r1, #4 + 800bb38: f002 fa42 bl 800dfc0 + 800bb3c: 0003 movs r3, r0 + 800bb3e: 2b01 cmp r3, #1 + 800bb40: d102 bne.n 800bb48 stat = osOK; - 800aefe: 2300 movs r3, #0 - 800af00: 617b str r3, [r7, #20] - 800af02: e002 b.n 800af0a + 800bb42: 2300 movs r3, #0 + 800bb44: 617b str r3, [r7, #20] + 800bb46: e002 b.n 800bb4e } else { stat = osErrorResource; - 800af04: 2303 movs r3, #3 - 800af06: 425b negs r3, r3 - 800af08: 617b str r3, [r7, #20] + 800bb48: 2303 movs r3, #3 + 800bb4a: 425b negs r3, r3 + 800bb4c: 617b str r3, [r7, #20] } } return (stat); - 800af0a: 697b ldr r3, [r7, #20] + 800bb4e: 697b ldr r3, [r7, #20] } - 800af0c: 0018 movs r0, r3 - 800af0e: 46bd mov sp, r7 - 800af10: b006 add sp, #24 - 800af12: bd80 pop {r7, pc} + 800bb50: 0018 movs r0, r3 + 800bb52: 46bd mov sp, r7 + 800bb54: b006 add sp, #24 + 800bb56: bd80 pop {r7, pc} -0800af14 : +0800bb58 : osStatus_t osTimerStop (osTimerId_t timer_id) { - 800af14: b580 push {r7, lr} - 800af16: b088 sub sp, #32 - 800af18: af02 add r7, sp, #8 - 800af1a: 6078 str r0, [r7, #4] + 800bb58: b580 push {r7, lr} + 800bb5a: b088 sub sp, #32 + 800bb5c: af02 add r7, sp, #8 + 800bb5e: 6078 str r0, [r7, #4] TimerHandle_t hTimer = (TimerHandle_t)timer_id; - 800af1c: 687b ldr r3, [r7, #4] - 800af1e: 613b str r3, [r7, #16] + 800bb60: 687b ldr r3, [r7, #4] + 800bb62: 613b str r3, [r7, #16] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800af20: f3ef 8305 mrs r3, IPSR - 800af24: 60fb str r3, [r7, #12] + 800bb64: f3ef 8305 mrs r3, IPSR + 800bb68: 60fb str r3, [r7, #12] return(result); - 800af26: 68fb ldr r3, [r7, #12] + 800bb6a: 68fb ldr r3, [r7, #12] osStatus_t stat; if (IS_IRQ()) { - 800af28: 2b00 cmp r3, #0 - 800af2a: d003 beq.n 800af34 + 800bb6c: 2b00 cmp r3, #0 + 800bb6e: d003 beq.n 800bb78 stat = osErrorISR; - 800af2c: 2306 movs r3, #6 - 800af2e: 425b negs r3, r3 - 800af30: 617b str r3, [r7, #20] - 800af32: e021 b.n 800af78 + 800bb70: 2306 movs r3, #6 + 800bb72: 425b negs r3, r3 + 800bb74: 617b str r3, [r7, #20] + 800bb76: e021 b.n 800bbbc } else if (hTimer == NULL) { - 800af34: 693b ldr r3, [r7, #16] - 800af36: 2b00 cmp r3, #0 - 800af38: d103 bne.n 800af42 + 800bb78: 693b ldr r3, [r7, #16] + 800bb7a: 2b00 cmp r3, #0 + 800bb7c: d103 bne.n 800bb86 stat = osErrorParameter; - 800af3a: 2304 movs r3, #4 - 800af3c: 425b negs r3, r3 - 800af3e: 617b str r3, [r7, #20] - 800af40: e01a b.n 800af78 + 800bb7e: 2304 movs r3, #4 + 800bb80: 425b negs r3, r3 + 800bb82: 617b str r3, [r7, #20] + 800bb84: e01a b.n 800bbbc } else { if (xTimerIsTimerActive (hTimer) == pdFALSE) { - 800af42: 693b ldr r3, [r7, #16] - 800af44: 0018 movs r0, r3 - 800af46: f002 fced bl 800d924 - 800af4a: 1e03 subs r3, r0, #0 - 800af4c: d103 bne.n 800af56 + 800bb86: 693b ldr r3, [r7, #16] + 800bb88: 0018 movs r0, r3 + 800bb8a: f002 fced bl 800e568 + 800bb8e: 1e03 subs r3, r0, #0 + 800bb90: d103 bne.n 800bb9a stat = osErrorResource; - 800af4e: 2303 movs r3, #3 - 800af50: 425b negs r3, r3 - 800af52: 617b str r3, [r7, #20] - 800af54: e010 b.n 800af78 + 800bb92: 2303 movs r3, #3 + 800bb94: 425b negs r3, r3 + 800bb96: 617b str r3, [r7, #20] + 800bb98: e010 b.n 800bbbc } else { if (xTimerStop (hTimer, 0) == pdPASS) { - 800af56: 6938 ldr r0, [r7, #16] - 800af58: 2300 movs r3, #0 - 800af5a: 9300 str r3, [sp, #0] - 800af5c: 2300 movs r3, #0 - 800af5e: 2200 movs r2, #0 - 800af60: 2103 movs r1, #3 - 800af62: f002 fa0b bl 800d37c - 800af66: 0003 movs r3, r0 - 800af68: 2b01 cmp r3, #1 - 800af6a: d102 bne.n 800af72 + 800bb9a: 6938 ldr r0, [r7, #16] + 800bb9c: 2300 movs r3, #0 + 800bb9e: 9300 str r3, [sp, #0] + 800bba0: 2300 movs r3, #0 + 800bba2: 2200 movs r2, #0 + 800bba4: 2103 movs r1, #3 + 800bba6: f002 fa0b bl 800dfc0 + 800bbaa: 0003 movs r3, r0 + 800bbac: 2b01 cmp r3, #1 + 800bbae: d102 bne.n 800bbb6 stat = osOK; - 800af6c: 2300 movs r3, #0 - 800af6e: 617b str r3, [r7, #20] - 800af70: e002 b.n 800af78 + 800bbb0: 2300 movs r3, #0 + 800bbb2: 617b str r3, [r7, #20] + 800bbb4: e002 b.n 800bbbc } else { stat = osError; - 800af72: 2301 movs r3, #1 - 800af74: 425b negs r3, r3 - 800af76: 617b str r3, [r7, #20] + 800bbb6: 2301 movs r3, #1 + 800bbb8: 425b negs r3, r3 + 800bbba: 617b str r3, [r7, #20] } } } return (stat); - 800af78: 697b ldr r3, [r7, #20] + 800bbbc: 697b ldr r3, [r7, #20] } - 800af7a: 0018 movs r0, r3 - 800af7c: 46bd mov sp, r7 - 800af7e: b006 add sp, #24 - 800af80: bd80 pop {r7, pc} + 800bbbe: 0018 movs r0, r3 + 800bbc0: 46bd mov sp, r7 + 800bbc2: b006 add sp, #24 + 800bbc4: bd80 pop {r7, pc} -0800af82 : +0800bbc6 : } /*---------------------------------------------------------------------------*/ #if (configUSE_OS2_MUTEX == 1) osMutexId_t osMutexNew (const osMutexAttr_t *attr) { - 800af82: b580 push {r7, lr} - 800af84: b088 sub sp, #32 - 800af86: af00 add r7, sp, #0 - 800af88: 6078 str r0, [r7, #4] + 800bbc6: b580 push {r7, lr} + 800bbc8: b088 sub sp, #32 + 800bbca: af00 add r7, sp, #0 + 800bbcc: 6078 str r0, [r7, #4] int32_t mem; #if (configQUEUE_REGISTRY_SIZE > 0) const char *name; #endif hMutex = NULL; - 800af8a: 2300 movs r3, #0 - 800af8c: 61fb str r3, [r7, #28] + 800bbce: 2300 movs r3, #0 + 800bbd0: 61fb str r3, [r7, #28] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800af8e: f3ef 8305 mrs r3, IPSR - 800af92: 60bb str r3, [r7, #8] + 800bbd2: f3ef 8305 mrs r3, IPSR + 800bbd6: 60bb str r3, [r7, #8] return(result); - 800af94: 68bb ldr r3, [r7, #8] + 800bbd8: 68bb ldr r3, [r7, #8] if (!IS_IRQ()) { - 800af96: 2b00 cmp r3, #0 - 800af98: d000 beq.n 800af9c - 800af9a: e079 b.n 800b090 + 800bbda: 2b00 cmp r3, #0 + 800bbdc: d000 beq.n 800bbe0 + 800bbde: e079 b.n 800bcd4 if (attr != NULL) { - 800af9c: 687b ldr r3, [r7, #4] - 800af9e: 2b00 cmp r3, #0 - 800afa0: d003 beq.n 800afaa + 800bbe0: 687b ldr r3, [r7, #4] + 800bbe2: 2b00 cmp r3, #0 + 800bbe4: d003 beq.n 800bbee type = attr->attr_bits; - 800afa2: 687b ldr r3, [r7, #4] - 800afa4: 685b ldr r3, [r3, #4] - 800afa6: 61bb str r3, [r7, #24] - 800afa8: e001 b.n 800afae + 800bbe6: 687b ldr r3, [r7, #4] + 800bbe8: 685b ldr r3, [r3, #4] + 800bbea: 61bb str r3, [r7, #24] + 800bbec: e001 b.n 800bbf2 } else { type = 0U; - 800afaa: 2300 movs r3, #0 - 800afac: 61bb str r3, [r7, #24] + 800bbee: 2300 movs r3, #0 + 800bbf0: 61bb str r3, [r7, #24] } if ((type & osMutexRecursive) == osMutexRecursive) { - 800afae: 69bb ldr r3, [r7, #24] - 800afb0: 2201 movs r2, #1 - 800afb2: 4013 ands r3, r2 - 800afb4: d002 beq.n 800afbc + 800bbf2: 69bb ldr r3, [r7, #24] + 800bbf4: 2201 movs r2, #1 + 800bbf6: 4013 ands r3, r2 + 800bbf8: d002 beq.n 800bc00 rmtx = 1U; - 800afb6: 2301 movs r3, #1 - 800afb8: 617b str r3, [r7, #20] - 800afba: e001 b.n 800afc0 + 800bbfa: 2301 movs r3, #1 + 800bbfc: 617b str r3, [r7, #20] + 800bbfe: e001 b.n 800bc04 } else { rmtx = 0U; - 800afbc: 2300 movs r3, #0 - 800afbe: 617b str r3, [r7, #20] + 800bc00: 2300 movs r3, #0 + 800bc02: 617b str r3, [r7, #20] } if ((type & osMutexRobust) != osMutexRobust) { - 800afc0: 69bb ldr r3, [r7, #24] - 800afc2: 2208 movs r2, #8 - 800afc4: 4013 ands r3, r2 - 800afc6: d000 beq.n 800afca - 800afc8: e062 b.n 800b090 + 800bc04: 69bb ldr r3, [r7, #24] + 800bc06: 2208 movs r2, #8 + 800bc08: 4013 ands r3, r2 + 800bc0a: d000 beq.n 800bc0e + 800bc0c: e062 b.n 800bcd4 mem = -1; - 800afca: 2301 movs r3, #1 - 800afcc: 425b negs r3, r3 - 800afce: 613b str r3, [r7, #16] + 800bc0e: 2301 movs r3, #1 + 800bc10: 425b negs r3, r3 + 800bc12: 613b str r3, [r7, #16] if (attr != NULL) { - 800afd0: 687b ldr r3, [r7, #4] - 800afd2: 2b00 cmp r3, #0 - 800afd4: d015 beq.n 800b002 + 800bc14: 687b ldr r3, [r7, #4] + 800bc16: 2b00 cmp r3, #0 + 800bc18: d015 beq.n 800bc46 if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) { - 800afd6: 687b ldr r3, [r7, #4] - 800afd8: 689b ldr r3, [r3, #8] - 800afda: 2b00 cmp r3, #0 - 800afdc: d006 beq.n 800afec - 800afde: 687b ldr r3, [r7, #4] - 800afe0: 68db ldr r3, [r3, #12] - 800afe2: 2b4f cmp r3, #79 ; 0x4f - 800afe4: d902 bls.n 800afec + 800bc1a: 687b ldr r3, [r7, #4] + 800bc1c: 689b ldr r3, [r3, #8] + 800bc1e: 2b00 cmp r3, #0 + 800bc20: d006 beq.n 800bc30 + 800bc22: 687b ldr r3, [r7, #4] + 800bc24: 68db ldr r3, [r3, #12] + 800bc26: 2b4f cmp r3, #79 ; 0x4f + 800bc28: d902 bls.n 800bc30 mem = 1; - 800afe6: 2301 movs r3, #1 - 800afe8: 613b str r3, [r7, #16] - 800afea: e00c b.n 800b006 + 800bc2a: 2301 movs r3, #1 + 800bc2c: 613b str r3, [r7, #16] + 800bc2e: e00c b.n 800bc4a } else { if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) { - 800afec: 687b ldr r3, [r7, #4] - 800afee: 689b ldr r3, [r3, #8] - 800aff0: 2b00 cmp r3, #0 - 800aff2: d108 bne.n 800b006 - 800aff4: 687b ldr r3, [r7, #4] - 800aff6: 68db ldr r3, [r3, #12] - 800aff8: 2b00 cmp r3, #0 - 800affa: d104 bne.n 800b006 + 800bc30: 687b ldr r3, [r7, #4] + 800bc32: 689b ldr r3, [r3, #8] + 800bc34: 2b00 cmp r3, #0 + 800bc36: d108 bne.n 800bc4a + 800bc38: 687b ldr r3, [r7, #4] + 800bc3a: 68db ldr r3, [r3, #12] + 800bc3c: 2b00 cmp r3, #0 + 800bc3e: d104 bne.n 800bc4a mem = 0; - 800affc: 2300 movs r3, #0 - 800affe: 613b str r3, [r7, #16] - 800b000: e001 b.n 800b006 + 800bc40: 2300 movs r3, #0 + 800bc42: 613b str r3, [r7, #16] + 800bc44: e001 b.n 800bc4a } } } else { mem = 0; - 800b002: 2300 movs r3, #0 - 800b004: 613b str r3, [r7, #16] + 800bc46: 2300 movs r3, #0 + 800bc48: 613b str r3, [r7, #16] } if (mem == 1) { - 800b006: 693b ldr r3, [r7, #16] - 800b008: 2b01 cmp r3, #1 - 800b00a: d114 bne.n 800b036 + 800bc4a: 693b ldr r3, [r7, #16] + 800bc4c: 2b01 cmp r3, #1 + 800bc4e: d114 bne.n 800bc7a #if (configSUPPORT_STATIC_ALLOCATION == 1) if (rmtx != 0U) { - 800b00c: 697b ldr r3, [r7, #20] - 800b00e: 2b00 cmp r3, #0 - 800b010: d008 beq.n 800b024 + 800bc50: 697b ldr r3, [r7, #20] + 800bc52: 2b00 cmp r3, #0 + 800bc54: d008 beq.n 800bc68 #if (configUSE_RECURSIVE_MUTEXES == 1) hMutex = xSemaphoreCreateRecursiveMutexStatic (attr->cb_mem); - 800b012: 687b ldr r3, [r7, #4] - 800b014: 689b ldr r3, [r3, #8] - 800b016: 0019 movs r1, r3 - 800b018: 2004 movs r0, #4 - 800b01a: f000 fc27 bl 800b86c - 800b01e: 0003 movs r3, r0 - 800b020: 61fb str r3, [r7, #28] - 800b022: e019 b.n 800b058 + 800bc56: 687b ldr r3, [r7, #4] + 800bc58: 689b ldr r3, [r3, #8] + 800bc5a: 0019 movs r1, r3 + 800bc5c: 2004 movs r0, #4 + 800bc5e: f000 fc27 bl 800c4b0 + 800bc62: 0003 movs r3, r0 + 800bc64: 61fb str r3, [r7, #28] + 800bc66: e019 b.n 800bc9c #endif } else { hMutex = xSemaphoreCreateMutexStatic (attr->cb_mem); - 800b024: 687b ldr r3, [r7, #4] - 800b026: 689b ldr r3, [r3, #8] - 800b028: 0019 movs r1, r3 - 800b02a: 2001 movs r0, #1 - 800b02c: f000 fc1e bl 800b86c - 800b030: 0003 movs r3, r0 - 800b032: 61fb str r3, [r7, #28] - 800b034: e010 b.n 800b058 + 800bc68: 687b ldr r3, [r7, #4] + 800bc6a: 689b ldr r3, [r3, #8] + 800bc6c: 0019 movs r1, r3 + 800bc6e: 2001 movs r0, #1 + 800bc70: f000 fc1e bl 800c4b0 + 800bc74: 0003 movs r3, r0 + 800bc76: 61fb str r3, [r7, #28] + 800bc78: e010 b.n 800bc9c } #endif } else { if (mem == 0) { - 800b036: 693b ldr r3, [r7, #16] - 800b038: 2b00 cmp r3, #0 - 800b03a: d10d bne.n 800b058 + 800bc7a: 693b ldr r3, [r7, #16] + 800bc7c: 2b00 cmp r3, #0 + 800bc7e: d10d bne.n 800bc9c #if (configSUPPORT_DYNAMIC_ALLOCATION == 1) if (rmtx != 0U) { - 800b03c: 697b ldr r3, [r7, #20] - 800b03e: 2b00 cmp r3, #0 - 800b040: d005 beq.n 800b04e + 800bc80: 697b ldr r3, [r7, #20] + 800bc82: 2b00 cmp r3, #0 + 800bc84: d005 beq.n 800bc92 #if (configUSE_RECURSIVE_MUTEXES == 1) hMutex = xSemaphoreCreateRecursiveMutex (); - 800b042: 2004 movs r0, #4 - 800b044: f000 fbf6 bl 800b834 - 800b048: 0003 movs r3, r0 - 800b04a: 61fb str r3, [r7, #28] - 800b04c: e004 b.n 800b058 + 800bc86: 2004 movs r0, #4 + 800bc88: f000 fbf6 bl 800c478 + 800bc8c: 0003 movs r3, r0 + 800bc8e: 61fb str r3, [r7, #28] + 800bc90: e004 b.n 800bc9c #endif } else { hMutex = xSemaphoreCreateMutex (); - 800b04e: 2001 movs r0, #1 - 800b050: f000 fbf0 bl 800b834 - 800b054: 0003 movs r3, r0 - 800b056: 61fb str r3, [r7, #28] + 800bc92: 2001 movs r0, #1 + 800bc94: f000 fbf0 bl 800c478 + 800bc98: 0003 movs r3, r0 + 800bc9a: 61fb str r3, [r7, #28] #endif } } #if (configQUEUE_REGISTRY_SIZE > 0) if (hMutex != NULL) { - 800b058: 69fb ldr r3, [r7, #28] - 800b05a: 2b00 cmp r3, #0 - 800b05c: d00e beq.n 800b07c + 800bc9c: 69fb ldr r3, [r7, #28] + 800bc9e: 2b00 cmp r3, #0 + 800bca0: d00e beq.n 800bcc0 if (attr != NULL) { - 800b05e: 687b ldr r3, [r7, #4] - 800b060: 2b00 cmp r3, #0 - 800b062: d003 beq.n 800b06c + 800bca2: 687b ldr r3, [r7, #4] + 800bca4: 2b00 cmp r3, #0 + 800bca6: d003 beq.n 800bcb0 name = attr->name; - 800b064: 687b ldr r3, [r7, #4] - 800b066: 681b ldr r3, [r3, #0] - 800b068: 60fb str r3, [r7, #12] - 800b06a: e001 b.n 800b070 + 800bca8: 687b ldr r3, [r7, #4] + 800bcaa: 681b ldr r3, [r3, #0] + 800bcac: 60fb str r3, [r7, #12] + 800bcae: e001 b.n 800bcb4 } else { name = NULL; - 800b06c: 2300 movs r3, #0 - 800b06e: 60fb str r3, [r7, #12] + 800bcb0: 2300 movs r3, #0 + 800bcb2: 60fb str r3, [r7, #12] } vQueueAddToRegistry (hMutex, name); - 800b070: 68fa ldr r2, [r7, #12] - 800b072: 69fb ldr r3, [r7, #28] - 800b074: 0011 movs r1, r2 - 800b076: 0018 movs r0, r3 - 800b078: f001 f8f8 bl 800c26c + 800bcb4: 68fa ldr r2, [r7, #12] + 800bcb6: 69fb ldr r3, [r7, #28] + 800bcb8: 0011 movs r1, r2 + 800bcba: 0018 movs r0, r3 + 800bcbc: f001 f8f8 bl 800ceb0 } #endif if ((hMutex != NULL) && (rmtx != 0U)) { - 800b07c: 69fb ldr r3, [r7, #28] - 800b07e: 2b00 cmp r3, #0 - 800b080: d006 beq.n 800b090 - 800b082: 697b ldr r3, [r7, #20] - 800b084: 2b00 cmp r3, #0 - 800b086: d003 beq.n 800b090 + 800bcc0: 69fb ldr r3, [r7, #28] + 800bcc2: 2b00 cmp r3, #0 + 800bcc4: d006 beq.n 800bcd4 + 800bcc6: 697b ldr r3, [r7, #20] + 800bcc8: 2b00 cmp r3, #0 + 800bcca: d003 beq.n 800bcd4 hMutex = (SemaphoreHandle_t)((uint32_t)hMutex | 1U); - 800b088: 69fb ldr r3, [r7, #28] - 800b08a: 2201 movs r2, #1 - 800b08c: 4313 orrs r3, r2 - 800b08e: 61fb str r3, [r7, #28] + 800bccc: 69fb ldr r3, [r7, #28] + 800bcce: 2201 movs r2, #1 + 800bcd0: 4313 orrs r3, r2 + 800bcd2: 61fb str r3, [r7, #28] } } } return ((osMutexId_t)hMutex); - 800b090: 69fb ldr r3, [r7, #28] + 800bcd4: 69fb ldr r3, [r7, #28] } - 800b092: 0018 movs r0, r3 - 800b094: 46bd mov sp, r7 - 800b096: b008 add sp, #32 - 800b098: bd80 pop {r7, pc} + 800bcd6: 0018 movs r0, r3 + 800bcd8: 46bd mov sp, r7 + 800bcda: b008 add sp, #32 + 800bcdc: bd80 pop {r7, pc} -0800b09a : +0800bcde : osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout) { - 800b09a: b580 push {r7, lr} - 800b09c: b086 sub sp, #24 - 800b09e: af00 add r7, sp, #0 - 800b0a0: 6078 str r0, [r7, #4] - 800b0a2: 6039 str r1, [r7, #0] + 800bcde: b580 push {r7, lr} + 800bce0: b086 sub sp, #24 + 800bce2: af00 add r7, sp, #0 + 800bce4: 6078 str r0, [r7, #4] + 800bce6: 6039 str r1, [r7, #0] SemaphoreHandle_t hMutex; osStatus_t stat; uint32_t rmtx; hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U); - 800b0a4: 687b ldr r3, [r7, #4] - 800b0a6: 2201 movs r2, #1 - 800b0a8: 4393 bics r3, r2 - 800b0aa: 613b str r3, [r7, #16] + 800bce8: 687b ldr r3, [r7, #4] + 800bcea: 2201 movs r2, #1 + 800bcec: 4393 bics r3, r2 + 800bcee: 613b str r3, [r7, #16] rmtx = (uint32_t)mutex_id & 1U; - 800b0ac: 687b ldr r3, [r7, #4] - 800b0ae: 2201 movs r2, #1 - 800b0b0: 4013 ands r3, r2 - 800b0b2: 60fb str r3, [r7, #12] + 800bcf0: 687b ldr r3, [r7, #4] + 800bcf2: 2201 movs r2, #1 + 800bcf4: 4013 ands r3, r2 + 800bcf6: 60fb str r3, [r7, #12] stat = osOK; - 800b0b4: 2300 movs r3, #0 - 800b0b6: 617b str r3, [r7, #20] + 800bcf8: 2300 movs r3, #0 + 800bcfa: 617b str r3, [r7, #20] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800b0b8: f3ef 8305 mrs r3, IPSR - 800b0bc: 60bb str r3, [r7, #8] + 800bcfc: f3ef 8305 mrs r3, IPSR + 800bd00: 60bb str r3, [r7, #8] return(result); - 800b0be: 68bb ldr r3, [r7, #8] + 800bd02: 68bb ldr r3, [r7, #8] if (IS_IRQ()) { - 800b0c0: 2b00 cmp r3, #0 - 800b0c2: d003 beq.n 800b0cc + 800bd04: 2b00 cmp r3, #0 + 800bd06: d003 beq.n 800bd10 stat = osErrorISR; - 800b0c4: 2306 movs r3, #6 - 800b0c6: 425b negs r3, r3 - 800b0c8: 617b str r3, [r7, #20] - 800b0ca: e030 b.n 800b12e + 800bd08: 2306 movs r3, #6 + 800bd0a: 425b negs r3, r3 + 800bd0c: 617b str r3, [r7, #20] + 800bd0e: e030 b.n 800bd72 } else if (hMutex == NULL) { - 800b0cc: 693b ldr r3, [r7, #16] - 800b0ce: 2b00 cmp r3, #0 - 800b0d0: d103 bne.n 800b0da + 800bd10: 693b ldr r3, [r7, #16] + 800bd12: 2b00 cmp r3, #0 + 800bd14: d103 bne.n 800bd1e stat = osErrorParameter; - 800b0d2: 2304 movs r3, #4 - 800b0d4: 425b negs r3, r3 - 800b0d6: 617b str r3, [r7, #20] - 800b0d8: e029 b.n 800b12e + 800bd16: 2304 movs r3, #4 + 800bd18: 425b negs r3, r3 + 800bd1a: 617b str r3, [r7, #20] + 800bd1c: e029 b.n 800bd72 } else { if (rmtx != 0U) { - 800b0da: 68fb ldr r3, [r7, #12] - 800b0dc: 2b00 cmp r3, #0 - 800b0de: d013 beq.n 800b108 + 800bd1e: 68fb ldr r3, [r7, #12] + 800bd20: 2b00 cmp r3, #0 + 800bd22: d013 beq.n 800bd4c #if (configUSE_RECURSIVE_MUTEXES == 1) if (xSemaphoreTakeRecursive (hMutex, timeout) != pdPASS) { - 800b0e0: 683a ldr r2, [r7, #0] - 800b0e2: 693b ldr r3, [r7, #16] - 800b0e4: 0011 movs r1, r2 - 800b0e6: 0018 movs r0, r3 - 800b0e8: f000 fc0b bl 800b902 - 800b0ec: 0003 movs r3, r0 - 800b0ee: 2b01 cmp r3, #1 - 800b0f0: d01d beq.n 800b12e + 800bd24: 683a ldr r2, [r7, #0] + 800bd26: 693b ldr r3, [r7, #16] + 800bd28: 0011 movs r1, r2 + 800bd2a: 0018 movs r0, r3 + 800bd2c: f000 fc0b bl 800c546 + 800bd30: 0003 movs r3, r0 + 800bd32: 2b01 cmp r3, #1 + 800bd34: d01d beq.n 800bd72 if (timeout != 0U) { - 800b0f2: 683b ldr r3, [r7, #0] - 800b0f4: 2b00 cmp r3, #0 - 800b0f6: d003 beq.n 800b100 + 800bd36: 683b ldr r3, [r7, #0] + 800bd38: 2b00 cmp r3, #0 + 800bd3a: d003 beq.n 800bd44 stat = osErrorTimeout; - 800b0f8: 2302 movs r3, #2 - 800b0fa: 425b negs r3, r3 - 800b0fc: 617b str r3, [r7, #20] - 800b0fe: e016 b.n 800b12e + 800bd3c: 2302 movs r3, #2 + 800bd3e: 425b negs r3, r3 + 800bd40: 617b str r3, [r7, #20] + 800bd42: e016 b.n 800bd72 } else { stat = osErrorResource; - 800b100: 2303 movs r3, #3 - 800b102: 425b negs r3, r3 - 800b104: 617b str r3, [r7, #20] - 800b106: e012 b.n 800b12e + 800bd44: 2303 movs r3, #3 + 800bd46: 425b negs r3, r3 + 800bd48: 617b str r3, [r7, #20] + 800bd4a: e012 b.n 800bd72 } } #endif } else { if (xSemaphoreTake (hMutex, timeout) != pdPASS) { - 800b108: 683a ldr r2, [r7, #0] - 800b10a: 693b ldr r3, [r7, #16] - 800b10c: 0011 movs r1, r2 - 800b10e: 0018 movs r0, r3 - 800b110: f000 fe14 bl 800bd3c - 800b114: 0003 movs r3, r0 - 800b116: 2b01 cmp r3, #1 - 800b118: d009 beq.n 800b12e + 800bd4c: 683a ldr r2, [r7, #0] + 800bd4e: 693b ldr r3, [r7, #16] + 800bd50: 0011 movs r1, r2 + 800bd52: 0018 movs r0, r3 + 800bd54: f000 fe14 bl 800c980 + 800bd58: 0003 movs r3, r0 + 800bd5a: 2b01 cmp r3, #1 + 800bd5c: d009 beq.n 800bd72 if (timeout != 0U) { - 800b11a: 683b ldr r3, [r7, #0] - 800b11c: 2b00 cmp r3, #0 - 800b11e: d003 beq.n 800b128 + 800bd5e: 683b ldr r3, [r7, #0] + 800bd60: 2b00 cmp r3, #0 + 800bd62: d003 beq.n 800bd6c stat = osErrorTimeout; - 800b120: 2302 movs r3, #2 - 800b122: 425b negs r3, r3 - 800b124: 617b str r3, [r7, #20] - 800b126: e002 b.n 800b12e + 800bd64: 2302 movs r3, #2 + 800bd66: 425b negs r3, r3 + 800bd68: 617b str r3, [r7, #20] + 800bd6a: e002 b.n 800bd72 } else { stat = osErrorResource; - 800b128: 2303 movs r3, #3 - 800b12a: 425b negs r3, r3 - 800b12c: 617b str r3, [r7, #20] + 800bd6c: 2303 movs r3, #3 + 800bd6e: 425b negs r3, r3 + 800bd70: 617b str r3, [r7, #20] } } } } return (stat); - 800b12e: 697b ldr r3, [r7, #20] + 800bd72: 697b ldr r3, [r7, #20] } - 800b130: 0018 movs r0, r3 - 800b132: 46bd mov sp, r7 - 800b134: b006 add sp, #24 - 800b136: bd80 pop {r7, pc} + 800bd74: 0018 movs r0, r3 + 800bd76: 46bd mov sp, r7 + 800bd78: b006 add sp, #24 + 800bd7a: bd80 pop {r7, pc} -0800b138 : +0800bd7c : osStatus_t osMutexRelease (osMutexId_t mutex_id) { - 800b138: b580 push {r7, lr} - 800b13a: b086 sub sp, #24 - 800b13c: af00 add r7, sp, #0 - 800b13e: 6078 str r0, [r7, #4] + 800bd7c: b580 push {r7, lr} + 800bd7e: b086 sub sp, #24 + 800bd80: af00 add r7, sp, #0 + 800bd82: 6078 str r0, [r7, #4] SemaphoreHandle_t hMutex; osStatus_t stat; uint32_t rmtx; hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U); - 800b140: 687b ldr r3, [r7, #4] - 800b142: 2201 movs r2, #1 - 800b144: 4393 bics r3, r2 - 800b146: 613b str r3, [r7, #16] + 800bd84: 687b ldr r3, [r7, #4] + 800bd86: 2201 movs r2, #1 + 800bd88: 4393 bics r3, r2 + 800bd8a: 613b str r3, [r7, #16] rmtx = (uint32_t)mutex_id & 1U; - 800b148: 687b ldr r3, [r7, #4] - 800b14a: 2201 movs r2, #1 - 800b14c: 4013 ands r3, r2 - 800b14e: 60fb str r3, [r7, #12] + 800bd8c: 687b ldr r3, [r7, #4] + 800bd8e: 2201 movs r2, #1 + 800bd90: 4013 ands r3, r2 + 800bd92: 60fb str r3, [r7, #12] stat = osOK; - 800b150: 2300 movs r3, #0 - 800b152: 617b str r3, [r7, #20] + 800bd94: 2300 movs r3, #0 + 800bd96: 617b str r3, [r7, #20] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800b154: f3ef 8305 mrs r3, IPSR - 800b158: 60bb str r3, [r7, #8] + 800bd98: f3ef 8305 mrs r3, IPSR + 800bd9c: 60bb str r3, [r7, #8] return(result); - 800b15a: 68bb ldr r3, [r7, #8] + 800bd9e: 68bb ldr r3, [r7, #8] if (IS_IRQ()) { - 800b15c: 2b00 cmp r3, #0 - 800b15e: d003 beq.n 800b168 + 800bda0: 2b00 cmp r3, #0 + 800bda2: d003 beq.n 800bdac stat = osErrorISR; - 800b160: 2306 movs r3, #6 - 800b162: 425b negs r3, r3 - 800b164: 617b str r3, [r7, #20] - 800b166: e020 b.n 800b1aa + 800bda4: 2306 movs r3, #6 + 800bda6: 425b negs r3, r3 + 800bda8: 617b str r3, [r7, #20] + 800bdaa: e020 b.n 800bdee } else if (hMutex == NULL) { - 800b168: 693b ldr r3, [r7, #16] - 800b16a: 2b00 cmp r3, #0 - 800b16c: d103 bne.n 800b176 + 800bdac: 693b ldr r3, [r7, #16] + 800bdae: 2b00 cmp r3, #0 + 800bdb0: d103 bne.n 800bdba stat = osErrorParameter; - 800b16e: 2304 movs r3, #4 - 800b170: 425b negs r3, r3 - 800b172: 617b str r3, [r7, #20] - 800b174: e019 b.n 800b1aa + 800bdb2: 2304 movs r3, #4 + 800bdb4: 425b negs r3, r3 + 800bdb6: 617b str r3, [r7, #20] + 800bdb8: e019 b.n 800bdee } else { if (rmtx != 0U) { - 800b176: 68fb ldr r3, [r7, #12] - 800b178: 2b00 cmp r3, #0 - 800b17a: d00a beq.n 800b192 + 800bdba: 68fb ldr r3, [r7, #12] + 800bdbc: 2b00 cmp r3, #0 + 800bdbe: d00a beq.n 800bdd6 #if (configUSE_RECURSIVE_MUTEXES == 1) if (xSemaphoreGiveRecursive (hMutex) != pdPASS) { - 800b17c: 693b ldr r3, [r7, #16] - 800b17e: 0018 movs r0, r3 - 800b180: f000 fb94 bl 800b8ac - 800b184: 0003 movs r3, r0 - 800b186: 2b01 cmp r3, #1 - 800b188: d00f beq.n 800b1aa + 800bdc0: 693b ldr r3, [r7, #16] + 800bdc2: 0018 movs r0, r3 + 800bdc4: f000 fb94 bl 800c4f0 + 800bdc8: 0003 movs r3, r0 + 800bdca: 2b01 cmp r3, #1 + 800bdcc: d00f beq.n 800bdee stat = osErrorResource; - 800b18a: 2303 movs r3, #3 - 800b18c: 425b negs r3, r3 - 800b18e: 617b str r3, [r7, #20] - 800b190: e00b b.n 800b1aa + 800bdce: 2303 movs r3, #3 + 800bdd0: 425b negs r3, r3 + 800bdd2: 617b str r3, [r7, #20] + 800bdd4: e00b b.n 800bdee } #endif } else { if (xSemaphoreGive (hMutex) != pdPASS) { - 800b192: 6938 ldr r0, [r7, #16] - 800b194: 2300 movs r3, #0 - 800b196: 2200 movs r2, #0 - 800b198: 2100 movs r1, #0 - 800b19a: f000 fbe2 bl 800b962 - 800b19e: 0003 movs r3, r0 - 800b1a0: 2b01 cmp r3, #1 - 800b1a2: d002 beq.n 800b1aa + 800bdd6: 6938 ldr r0, [r7, #16] + 800bdd8: 2300 movs r3, #0 + 800bdda: 2200 movs r2, #0 + 800bddc: 2100 movs r1, #0 + 800bdde: f000 fbe2 bl 800c5a6 + 800bde2: 0003 movs r3, r0 + 800bde4: 2b01 cmp r3, #1 + 800bde6: d002 beq.n 800bdee stat = osErrorResource; - 800b1a4: 2303 movs r3, #3 - 800b1a6: 425b negs r3, r3 - 800b1a8: 617b str r3, [r7, #20] + 800bde8: 2303 movs r3, #3 + 800bdea: 425b negs r3, r3 + 800bdec: 617b str r3, [r7, #20] } } } return (stat); - 800b1aa: 697b ldr r3, [r7, #20] + 800bdee: 697b ldr r3, [r7, #20] } - 800b1ac: 0018 movs r0, r3 - 800b1ae: 46bd mov sp, r7 - 800b1b0: b006 add sp, #24 - 800b1b2: bd80 pop {r7, pc} + 800bdf0: 0018 movs r0, r3 + 800bdf2: 46bd mov sp, r7 + 800bdf4: b006 add sp, #24 + 800bdf6: bd80 pop {r7, pc} -0800b1b4 : +0800bdf8 : return (stat); } /*---------------------------------------------------------------------------*/ osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr) { - 800b1b4: b590 push {r4, r7, lr} - 800b1b6: b08b sub sp, #44 ; 0x2c - 800b1b8: af02 add r7, sp, #8 - 800b1ba: 60f8 str r0, [r7, #12] - 800b1bc: 60b9 str r1, [r7, #8] - 800b1be: 607a str r2, [r7, #4] + 800bdf8: b590 push {r4, r7, lr} + 800bdfa: b08b sub sp, #44 ; 0x2c + 800bdfc: af02 add r7, sp, #8 + 800bdfe: 60f8 str r0, [r7, #12] + 800be00: 60b9 str r1, [r7, #8] + 800be02: 607a str r2, [r7, #4] int32_t mem; #if (configQUEUE_REGISTRY_SIZE > 0) const char *name; #endif hQueue = NULL; - 800b1c0: 2300 movs r3, #0 - 800b1c2: 61fb str r3, [r7, #28] + 800be04: 2300 movs r3, #0 + 800be06: 61fb str r3, [r7, #28] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800b1c4: f3ef 8305 mrs r3, IPSR - 800b1c8: 613b str r3, [r7, #16] + 800be08: f3ef 8305 mrs r3, IPSR + 800be0c: 613b str r3, [r7, #16] return(result); - 800b1ca: 693b ldr r3, [r7, #16] + 800be0e: 693b ldr r3, [r7, #16] if (!IS_IRQ() && (msg_count > 0U) && (msg_size > 0U)) { - 800b1cc: 2b00 cmp r3, #0 - 800b1ce: d000 beq.n 800b1d2 - 800b1d0: e064 b.n 800b29c - 800b1d2: 68fb ldr r3, [r7, #12] - 800b1d4: 2b00 cmp r3, #0 - 800b1d6: d100 bne.n 800b1da - 800b1d8: e060 b.n 800b29c - 800b1da: 68bb ldr r3, [r7, #8] - 800b1dc: 2b00 cmp r3, #0 - 800b1de: d05d beq.n 800b29c + 800be10: 2b00 cmp r3, #0 + 800be12: d000 beq.n 800be16 + 800be14: e064 b.n 800bee0 + 800be16: 68fb ldr r3, [r7, #12] + 800be18: 2b00 cmp r3, #0 + 800be1a: d100 bne.n 800be1e + 800be1c: e060 b.n 800bee0 + 800be1e: 68bb ldr r3, [r7, #8] + 800be20: 2b00 cmp r3, #0 + 800be22: d05d beq.n 800bee0 mem = -1; - 800b1e0: 2301 movs r3, #1 - 800b1e2: 425b negs r3, r3 - 800b1e4: 61bb str r3, [r7, #24] + 800be24: 2301 movs r3, #1 + 800be26: 425b negs r3, r3 + 800be28: 61bb str r3, [r7, #24] if (attr != NULL) { - 800b1e6: 687b ldr r3, [r7, #4] - 800b1e8: 2b00 cmp r3, #0 - 800b1ea: d028 beq.n 800b23e + 800be2a: 687b ldr r3, [r7, #4] + 800be2c: 2b00 cmp r3, #0 + 800be2e: d028 beq.n 800be82 if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) && - 800b1ec: 687b ldr r3, [r7, #4] - 800b1ee: 689b ldr r3, [r3, #8] - 800b1f0: 2b00 cmp r3, #0 - 800b1f2: d011 beq.n 800b218 - 800b1f4: 687b ldr r3, [r7, #4] - 800b1f6: 68db ldr r3, [r3, #12] - 800b1f8: 2b4f cmp r3, #79 ; 0x4f - 800b1fa: d90d bls.n 800b218 + 800be30: 687b ldr r3, [r7, #4] + 800be32: 689b ldr r3, [r3, #8] + 800be34: 2b00 cmp r3, #0 + 800be36: d011 beq.n 800be5c + 800be38: 687b ldr r3, [r7, #4] + 800be3a: 68db ldr r3, [r3, #12] + 800be3c: 2b4f cmp r3, #79 ; 0x4f + 800be3e: d90d bls.n 800be5c (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) { - 800b1fc: 687b ldr r3, [r7, #4] - 800b1fe: 691b ldr r3, [r3, #16] + 800be40: 687b ldr r3, [r7, #4] + 800be42: 691b ldr r3, [r3, #16] if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) && - 800b200: 2b00 cmp r3, #0 - 800b202: d009 beq.n 800b218 + 800be44: 2b00 cmp r3, #0 + 800be46: d009 beq.n 800be5c (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) { - 800b204: 687b ldr r3, [r7, #4] - 800b206: 695a ldr r2, [r3, #20] - 800b208: 68fb ldr r3, [r7, #12] - 800b20a: 68b9 ldr r1, [r7, #8] - 800b20c: 434b muls r3, r1 - 800b20e: 429a cmp r2, r3 - 800b210: d302 bcc.n 800b218 + 800be48: 687b ldr r3, [r7, #4] + 800be4a: 695a ldr r2, [r3, #20] + 800be4c: 68fb ldr r3, [r7, #12] + 800be4e: 68b9 ldr r1, [r7, #8] + 800be50: 434b muls r3, r1 + 800be52: 429a cmp r2, r3 + 800be54: d302 bcc.n 800be5c mem = 1; - 800b212: 2301 movs r3, #1 - 800b214: 61bb str r3, [r7, #24] - 800b216: e014 b.n 800b242 + 800be56: 2301 movs r3, #1 + 800be58: 61bb str r3, [r7, #24] + 800be5a: e014 b.n 800be86 } else { if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && - 800b218: 687b ldr r3, [r7, #4] - 800b21a: 689b ldr r3, [r3, #8] - 800b21c: 2b00 cmp r3, #0 - 800b21e: d110 bne.n 800b242 - 800b220: 687b ldr r3, [r7, #4] - 800b222: 68db ldr r3, [r3, #12] - 800b224: 2b00 cmp r3, #0 - 800b226: d10c bne.n 800b242 + 800be5c: 687b ldr r3, [r7, #4] + 800be5e: 689b ldr r3, [r3, #8] + 800be60: 2b00 cmp r3, #0 + 800be62: d110 bne.n 800be86 + 800be64: 687b ldr r3, [r7, #4] + 800be66: 68db ldr r3, [r3, #12] + 800be68: 2b00 cmp r3, #0 + 800be6a: d10c bne.n 800be86 (attr->mq_mem == NULL) && (attr->mq_size == 0U)) { - 800b228: 687b ldr r3, [r7, #4] - 800b22a: 691b ldr r3, [r3, #16] + 800be6c: 687b ldr r3, [r7, #4] + 800be6e: 691b ldr r3, [r3, #16] if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && - 800b22c: 2b00 cmp r3, #0 - 800b22e: d108 bne.n 800b242 + 800be70: 2b00 cmp r3, #0 + 800be72: d108 bne.n 800be86 (attr->mq_mem == NULL) && (attr->mq_size == 0U)) { - 800b230: 687b ldr r3, [r7, #4] - 800b232: 695b ldr r3, [r3, #20] - 800b234: 2b00 cmp r3, #0 - 800b236: d104 bne.n 800b242 + 800be74: 687b ldr r3, [r7, #4] + 800be76: 695b ldr r3, [r3, #20] + 800be78: 2b00 cmp r3, #0 + 800be7a: d104 bne.n 800be86 mem = 0; - 800b238: 2300 movs r3, #0 - 800b23a: 61bb str r3, [r7, #24] - 800b23c: e001 b.n 800b242 + 800be7c: 2300 movs r3, #0 + 800be7e: 61bb str r3, [r7, #24] + 800be80: e001 b.n 800be86 } } } else { mem = 0; - 800b23e: 2300 movs r3, #0 - 800b240: 61bb str r3, [r7, #24] + 800be82: 2300 movs r3, #0 + 800be84: 61bb str r3, [r7, #24] } if (mem == 1) { - 800b242: 69bb ldr r3, [r7, #24] - 800b244: 2b01 cmp r3, #1 - 800b246: d10c bne.n 800b262 + 800be86: 69bb ldr r3, [r7, #24] + 800be88: 2b01 cmp r3, #1 + 800be8a: d10c bne.n 800bea6 #if (configSUPPORT_STATIC_ALLOCATION == 1) hQueue = xQueueCreateStatic (msg_count, msg_size, attr->mq_mem, attr->cb_mem); - 800b248: 687b ldr r3, [r7, #4] - 800b24a: 691a ldr r2, [r3, #16] - 800b24c: 687b ldr r3, [r7, #4] - 800b24e: 689b ldr r3, [r3, #8] - 800b250: 68b9 ldr r1, [r7, #8] - 800b252: 68f8 ldr r0, [r7, #12] - 800b254: 2400 movs r4, #0 - 800b256: 9400 str r4, [sp, #0] - 800b258: f000 fa2d bl 800b6b6 - 800b25c: 0003 movs r3, r0 - 800b25e: 61fb str r3, [r7, #28] - 800b260: e00a b.n 800b278 + 800be8c: 687b ldr r3, [r7, #4] + 800be8e: 691a ldr r2, [r3, #16] + 800be90: 687b ldr r3, [r7, #4] + 800be92: 689b ldr r3, [r3, #8] + 800be94: 68b9 ldr r1, [r7, #8] + 800be96: 68f8 ldr r0, [r7, #12] + 800be98: 2400 movs r4, #0 + 800be9a: 9400 str r4, [sp, #0] + 800be9c: f000 fa2d bl 800c2fa + 800bea0: 0003 movs r3, r0 + 800bea2: 61fb str r3, [r7, #28] + 800bea4: e00a b.n 800bebc #endif } else { if (mem == 0) { - 800b262: 69bb ldr r3, [r7, #24] - 800b264: 2b00 cmp r3, #0 - 800b266: d107 bne.n 800b278 + 800bea6: 69bb ldr r3, [r7, #24] + 800bea8: 2b00 cmp r3, #0 + 800beaa: d107 bne.n 800bebc #if (configSUPPORT_DYNAMIC_ALLOCATION == 1) hQueue = xQueueCreate (msg_count, msg_size); - 800b268: 68b9 ldr r1, [r7, #8] - 800b26a: 68fb ldr r3, [r7, #12] - 800b26c: 2200 movs r2, #0 - 800b26e: 0018 movs r0, r3 - 800b270: f000 fa6d bl 800b74e - 800b274: 0003 movs r3, r0 - 800b276: 61fb str r3, [r7, #28] + 800beac: 68b9 ldr r1, [r7, #8] + 800beae: 68fb ldr r3, [r7, #12] + 800beb0: 2200 movs r2, #0 + 800beb2: 0018 movs r0, r3 + 800beb4: f000 fa6d bl 800c392 + 800beb8: 0003 movs r3, r0 + 800beba: 61fb str r3, [r7, #28] #endif } } #if (configQUEUE_REGISTRY_SIZE > 0) if (hQueue != NULL) { - 800b278: 69fb ldr r3, [r7, #28] - 800b27a: 2b00 cmp r3, #0 - 800b27c: d00e beq.n 800b29c + 800bebc: 69fb ldr r3, [r7, #28] + 800bebe: 2b00 cmp r3, #0 + 800bec0: d00e beq.n 800bee0 if (attr != NULL) { - 800b27e: 687b ldr r3, [r7, #4] - 800b280: 2b00 cmp r3, #0 - 800b282: d003 beq.n 800b28c + 800bec2: 687b ldr r3, [r7, #4] + 800bec4: 2b00 cmp r3, #0 + 800bec6: d003 beq.n 800bed0 name = attr->name; - 800b284: 687b ldr r3, [r7, #4] - 800b286: 681b ldr r3, [r3, #0] - 800b288: 617b str r3, [r7, #20] - 800b28a: e001 b.n 800b290 + 800bec8: 687b ldr r3, [r7, #4] + 800beca: 681b ldr r3, [r3, #0] + 800becc: 617b str r3, [r7, #20] + 800bece: e001 b.n 800bed4 } else { name = NULL; - 800b28c: 2300 movs r3, #0 - 800b28e: 617b str r3, [r7, #20] + 800bed0: 2300 movs r3, #0 + 800bed2: 617b str r3, [r7, #20] } vQueueAddToRegistry (hQueue, name); - 800b290: 697a ldr r2, [r7, #20] - 800b292: 69fb ldr r3, [r7, #28] - 800b294: 0011 movs r1, r2 - 800b296: 0018 movs r0, r3 - 800b298: f000 ffe8 bl 800c26c + 800bed4: 697a ldr r2, [r7, #20] + 800bed6: 69fb ldr r3, [r7, #28] + 800bed8: 0011 movs r1, r2 + 800beda: 0018 movs r0, r3 + 800bedc: f000 ffe8 bl 800ceb0 } #endif } return ((osMessageQueueId_t)hQueue); - 800b29c: 69fb ldr r3, [r7, #28] + 800bee0: 69fb ldr r3, [r7, #28] } - 800b29e: 0018 movs r0, r3 - 800b2a0: 46bd mov sp, r7 - 800b2a2: b009 add sp, #36 ; 0x24 - 800b2a4: bd90 pop {r4, r7, pc} + 800bee2: 0018 movs r0, r3 + 800bee4: 46bd mov sp, r7 + 800bee6: b009 add sp, #36 ; 0x24 + 800bee8: bd90 pop {r4, r7, pc} ... -0800b2a8 : +0800beec : osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout) { - 800b2a8: b580 push {r7, lr} - 800b2aa: b088 sub sp, #32 - 800b2ac: af00 add r7, sp, #0 - 800b2ae: 60f8 str r0, [r7, #12] - 800b2b0: 60b9 str r1, [r7, #8] - 800b2b2: 603b str r3, [r7, #0] - 800b2b4: 1dfb adds r3, r7, #7 - 800b2b6: 701a strb r2, [r3, #0] + 800beec: b580 push {r7, lr} + 800beee: b088 sub sp, #32 + 800bef0: af00 add r7, sp, #0 + 800bef2: 60f8 str r0, [r7, #12] + 800bef4: 60b9 str r1, [r7, #8] + 800bef6: 603b str r3, [r7, #0] + 800bef8: 1dfb adds r3, r7, #7 + 800befa: 701a strb r2, [r3, #0] QueueHandle_t hQueue = (QueueHandle_t)mq_id; - 800b2b8: 68fb ldr r3, [r7, #12] - 800b2ba: 61bb str r3, [r7, #24] + 800befc: 68fb ldr r3, [r7, #12] + 800befe: 61bb str r3, [r7, #24] osStatus_t stat; BaseType_t yield; (void)msg_prio; /* Message priority is ignored */ stat = osOK; - 800b2bc: 2300 movs r3, #0 - 800b2be: 61fb str r3, [r7, #28] + 800bf00: 2300 movs r3, #0 + 800bf02: 61fb str r3, [r7, #28] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800b2c0: f3ef 8305 mrs r3, IPSR - 800b2c4: 617b str r3, [r7, #20] + 800bf04: f3ef 8305 mrs r3, IPSR + 800bf08: 617b str r3, [r7, #20] return(result); - 800b2c6: 697b ldr r3, [r7, #20] + 800bf0a: 697b ldr r3, [r7, #20] if (IS_IRQ()) { - 800b2c8: 2b00 cmp r3, #0 - 800b2ca: d024 beq.n 800b316 + 800bf0c: 2b00 cmp r3, #0 + 800bf0e: d024 beq.n 800bf5a if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) { - 800b2cc: 69bb ldr r3, [r7, #24] - 800b2ce: 2b00 cmp r3, #0 - 800b2d0: d005 beq.n 800b2de - 800b2d2: 68bb ldr r3, [r7, #8] - 800b2d4: 2b00 cmp r3, #0 - 800b2d6: d002 beq.n 800b2de - 800b2d8: 683b ldr r3, [r7, #0] - 800b2da: 2b00 cmp r3, #0 - 800b2dc: d003 beq.n 800b2e6 + 800bf10: 69bb ldr r3, [r7, #24] + 800bf12: 2b00 cmp r3, #0 + 800bf14: d005 beq.n 800bf22 + 800bf16: 68bb ldr r3, [r7, #8] + 800bf18: 2b00 cmp r3, #0 + 800bf1a: d002 beq.n 800bf22 + 800bf1c: 683b ldr r3, [r7, #0] + 800bf1e: 2b00 cmp r3, #0 + 800bf20: d003 beq.n 800bf2a stat = osErrorParameter; - 800b2de: 2304 movs r3, #4 - 800b2e0: 425b negs r3, r3 - 800b2e2: 61fb str r3, [r7, #28] - 800b2e4: e034 b.n 800b350 + 800bf22: 2304 movs r3, #4 + 800bf24: 425b negs r3, r3 + 800bf26: 61fb str r3, [r7, #28] + 800bf28: e034 b.n 800bf94 } else { yield = pdFALSE; - 800b2e6: 2300 movs r3, #0 - 800b2e8: 613b str r3, [r7, #16] + 800bf2a: 2300 movs r3, #0 + 800bf2c: 613b str r3, [r7, #16] if (xQueueSendToBackFromISR (hQueue, msg_ptr, &yield) != pdTRUE) { - 800b2ea: 2310 movs r3, #16 - 800b2ec: 18fa adds r2, r7, r3 - 800b2ee: 68b9 ldr r1, [r7, #8] - 800b2f0: 69b8 ldr r0, [r7, #24] - 800b2f2: 2300 movs r3, #0 - 800b2f4: f000 fbf9 bl 800baea - 800b2f8: 0003 movs r3, r0 - 800b2fa: 2b01 cmp r3, #1 - 800b2fc: d003 beq.n 800b306 + 800bf2e: 2310 movs r3, #16 + 800bf30: 18fa adds r2, r7, r3 + 800bf32: 68b9 ldr r1, [r7, #8] + 800bf34: 69b8 ldr r0, [r7, #24] + 800bf36: 2300 movs r3, #0 + 800bf38: f000 fbf9 bl 800c72e + 800bf3c: 0003 movs r3, r0 + 800bf3e: 2b01 cmp r3, #1 + 800bf40: d003 beq.n 800bf4a stat = osErrorResource; - 800b2fe: 2303 movs r3, #3 - 800b300: 425b negs r3, r3 - 800b302: 61fb str r3, [r7, #28] - 800b304: e024 b.n 800b350 + 800bf42: 2303 movs r3, #3 + 800bf44: 425b negs r3, r3 + 800bf46: 61fb str r3, [r7, #28] + 800bf48: e024 b.n 800bf94 } else { portYIELD_FROM_ISR (yield); - 800b306: 693b ldr r3, [r7, #16] - 800b308: 2b00 cmp r3, #0 - 800b30a: d021 beq.n 800b350 - 800b30c: 4b13 ldr r3, [pc, #76] ; (800b35c ) - 800b30e: 2280 movs r2, #128 ; 0x80 - 800b310: 0552 lsls r2, r2, #21 - 800b312: 601a str r2, [r3, #0] - 800b314: e01c b.n 800b350 + 800bf4a: 693b ldr r3, [r7, #16] + 800bf4c: 2b00 cmp r3, #0 + 800bf4e: d021 beq.n 800bf94 + 800bf50: 4b13 ldr r3, [pc, #76] ; (800bfa0 ) + 800bf52: 2280 movs r2, #128 ; 0x80 + 800bf54: 0552 lsls r2, r2, #21 + 800bf56: 601a str r2, [r3, #0] + 800bf58: e01c b.n 800bf94 } } } else { if ((hQueue == NULL) || (msg_ptr == NULL)) { - 800b316: 69bb ldr r3, [r7, #24] - 800b318: 2b00 cmp r3, #0 - 800b31a: d002 beq.n 800b322 - 800b31c: 68bb ldr r3, [r7, #8] - 800b31e: 2b00 cmp r3, #0 - 800b320: d103 bne.n 800b32a + 800bf5a: 69bb ldr r3, [r7, #24] + 800bf5c: 2b00 cmp r3, #0 + 800bf5e: d002 beq.n 800bf66 + 800bf60: 68bb ldr r3, [r7, #8] + 800bf62: 2b00 cmp r3, #0 + 800bf64: d103 bne.n 800bf6e stat = osErrorParameter; - 800b322: 2304 movs r3, #4 - 800b324: 425b negs r3, r3 - 800b326: 61fb str r3, [r7, #28] - 800b328: e012 b.n 800b350 + 800bf66: 2304 movs r3, #4 + 800bf68: 425b negs r3, r3 + 800bf6a: 61fb str r3, [r7, #28] + 800bf6c: e012 b.n 800bf94 } else { if (xQueueSendToBack (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) { - 800b32a: 683a ldr r2, [r7, #0] - 800b32c: 68b9 ldr r1, [r7, #8] - 800b32e: 69b8 ldr r0, [r7, #24] - 800b330: 2300 movs r3, #0 - 800b332: f000 fb16 bl 800b962 - 800b336: 0003 movs r3, r0 - 800b338: 2b01 cmp r3, #1 - 800b33a: d009 beq.n 800b350 + 800bf6e: 683a ldr r2, [r7, #0] + 800bf70: 68b9 ldr r1, [r7, #8] + 800bf72: 69b8 ldr r0, [r7, #24] + 800bf74: 2300 movs r3, #0 + 800bf76: f000 fb16 bl 800c5a6 + 800bf7a: 0003 movs r3, r0 + 800bf7c: 2b01 cmp r3, #1 + 800bf7e: d009 beq.n 800bf94 if (timeout != 0U) { - 800b33c: 683b ldr r3, [r7, #0] - 800b33e: 2b00 cmp r3, #0 - 800b340: d003 beq.n 800b34a + 800bf80: 683b ldr r3, [r7, #0] + 800bf82: 2b00 cmp r3, #0 + 800bf84: d003 beq.n 800bf8e stat = osErrorTimeout; - 800b342: 2302 movs r3, #2 - 800b344: 425b negs r3, r3 - 800b346: 61fb str r3, [r7, #28] - 800b348: e002 b.n 800b350 + 800bf86: 2302 movs r3, #2 + 800bf88: 425b negs r3, r3 + 800bf8a: 61fb str r3, [r7, #28] + 800bf8c: e002 b.n 800bf94 } else { stat = osErrorResource; - 800b34a: 2303 movs r3, #3 - 800b34c: 425b negs r3, r3 - 800b34e: 61fb str r3, [r7, #28] + 800bf8e: 2303 movs r3, #3 + 800bf90: 425b negs r3, r3 + 800bf92: 61fb str r3, [r7, #28] } } } } return (stat); - 800b350: 69fb ldr r3, [r7, #28] + 800bf94: 69fb ldr r3, [r7, #28] } - 800b352: 0018 movs r0, r3 - 800b354: 46bd mov sp, r7 - 800b356: b008 add sp, #32 - 800b358: bd80 pop {r7, pc} - 800b35a: 46c0 nop ; (mov r8, r8) - 800b35c: e000ed04 .word 0xe000ed04 + 800bf96: 0018 movs r0, r3 + 800bf98: 46bd mov sp, r7 + 800bf9a: b008 add sp, #32 + 800bf9c: bd80 pop {r7, pc} + 800bf9e: 46c0 nop ; (mov r8, r8) + 800bfa0: e000ed04 .word 0xe000ed04 -0800b360 : +0800bfa4 : osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout) { - 800b360: b580 push {r7, lr} - 800b362: b088 sub sp, #32 - 800b364: af00 add r7, sp, #0 - 800b366: 60f8 str r0, [r7, #12] - 800b368: 60b9 str r1, [r7, #8] - 800b36a: 607a str r2, [r7, #4] - 800b36c: 603b str r3, [r7, #0] + 800bfa4: b580 push {r7, lr} + 800bfa6: b088 sub sp, #32 + 800bfa8: af00 add r7, sp, #0 + 800bfaa: 60f8 str r0, [r7, #12] + 800bfac: 60b9 str r1, [r7, #8] + 800bfae: 607a str r2, [r7, #4] + 800bfb0: 603b str r3, [r7, #0] QueueHandle_t hQueue = (QueueHandle_t)mq_id; - 800b36e: 68fb ldr r3, [r7, #12] - 800b370: 61bb str r3, [r7, #24] + 800bfb2: 68fb ldr r3, [r7, #12] + 800bfb4: 61bb str r3, [r7, #24] osStatus_t stat; BaseType_t yield; (void)msg_prio; /* Message priority is ignored */ stat = osOK; - 800b372: 2300 movs r3, #0 - 800b374: 61fb str r3, [r7, #28] + 800bfb6: 2300 movs r3, #0 + 800bfb8: 61fb str r3, [r7, #28] __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800b376: f3ef 8305 mrs r3, IPSR - 800b37a: 617b str r3, [r7, #20] + 800bfba: f3ef 8305 mrs r3, IPSR + 800bfbe: 617b str r3, [r7, #20] return(result); - 800b37c: 697b ldr r3, [r7, #20] + 800bfc0: 697b ldr r3, [r7, #20] if (IS_IRQ()) { - 800b37e: 2b00 cmp r3, #0 - 800b380: d024 beq.n 800b3cc + 800bfc2: 2b00 cmp r3, #0 + 800bfc4: d024 beq.n 800c010 if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) { - 800b382: 69bb ldr r3, [r7, #24] - 800b384: 2b00 cmp r3, #0 - 800b386: d005 beq.n 800b394 - 800b388: 68bb ldr r3, [r7, #8] - 800b38a: 2b00 cmp r3, #0 - 800b38c: d002 beq.n 800b394 - 800b38e: 683b ldr r3, [r7, #0] - 800b390: 2b00 cmp r3, #0 - 800b392: d003 beq.n 800b39c + 800bfc6: 69bb ldr r3, [r7, #24] + 800bfc8: 2b00 cmp r3, #0 + 800bfca: d005 beq.n 800bfd8 + 800bfcc: 68bb ldr r3, [r7, #8] + 800bfce: 2b00 cmp r3, #0 + 800bfd0: d002 beq.n 800bfd8 + 800bfd2: 683b ldr r3, [r7, #0] + 800bfd4: 2b00 cmp r3, #0 + 800bfd6: d003 beq.n 800bfe0 stat = osErrorParameter; - 800b394: 2304 movs r3, #4 - 800b396: 425b negs r3, r3 - 800b398: 61fb str r3, [r7, #28] - 800b39a: e034 b.n 800b406 + 800bfd8: 2304 movs r3, #4 + 800bfda: 425b negs r3, r3 + 800bfdc: 61fb str r3, [r7, #28] + 800bfde: e034 b.n 800c04a } else { yield = pdFALSE; - 800b39c: 2300 movs r3, #0 - 800b39e: 613b str r3, [r7, #16] + 800bfe0: 2300 movs r3, #0 + 800bfe2: 613b str r3, [r7, #16] if (xQueueReceiveFromISR (hQueue, msg_ptr, &yield) != pdPASS) { - 800b3a0: 2310 movs r3, #16 - 800b3a2: 18fa adds r2, r7, r3 - 800b3a4: 68b9 ldr r1, [r7, #8] - 800b3a6: 69bb ldr r3, [r7, #24] - 800b3a8: 0018 movs r0, r3 - 800b3aa: f000 fda1 bl 800bef0 - 800b3ae: 0003 movs r3, r0 - 800b3b0: 2b01 cmp r3, #1 - 800b3b2: d003 beq.n 800b3bc + 800bfe4: 2310 movs r3, #16 + 800bfe6: 18fa adds r2, r7, r3 + 800bfe8: 68b9 ldr r1, [r7, #8] + 800bfea: 69bb ldr r3, [r7, #24] + 800bfec: 0018 movs r0, r3 + 800bfee: f000 fda1 bl 800cb34 + 800bff2: 0003 movs r3, r0 + 800bff4: 2b01 cmp r3, #1 + 800bff6: d003 beq.n 800c000 stat = osErrorResource; - 800b3b4: 2303 movs r3, #3 - 800b3b6: 425b negs r3, r3 - 800b3b8: 61fb str r3, [r7, #28] - 800b3ba: e024 b.n 800b406 + 800bff8: 2303 movs r3, #3 + 800bffa: 425b negs r3, r3 + 800bffc: 61fb str r3, [r7, #28] + 800bffe: e024 b.n 800c04a } else { portYIELD_FROM_ISR (yield); - 800b3bc: 693b ldr r3, [r7, #16] - 800b3be: 2b00 cmp r3, #0 - 800b3c0: d021 beq.n 800b406 - 800b3c2: 4b13 ldr r3, [pc, #76] ; (800b410 ) - 800b3c4: 2280 movs r2, #128 ; 0x80 - 800b3c6: 0552 lsls r2, r2, #21 - 800b3c8: 601a str r2, [r3, #0] - 800b3ca: e01c b.n 800b406 + 800c000: 693b ldr r3, [r7, #16] + 800c002: 2b00 cmp r3, #0 + 800c004: d021 beq.n 800c04a + 800c006: 4b13 ldr r3, [pc, #76] ; (800c054 ) + 800c008: 2280 movs r2, #128 ; 0x80 + 800c00a: 0552 lsls r2, r2, #21 + 800c00c: 601a str r2, [r3, #0] + 800c00e: e01c b.n 800c04a } } } else { if ((hQueue == NULL) || (msg_ptr == NULL)) { - 800b3cc: 69bb ldr r3, [r7, #24] - 800b3ce: 2b00 cmp r3, #0 - 800b3d0: d002 beq.n 800b3d8 - 800b3d2: 68bb ldr r3, [r7, #8] - 800b3d4: 2b00 cmp r3, #0 - 800b3d6: d103 bne.n 800b3e0 + 800c010: 69bb ldr r3, [r7, #24] + 800c012: 2b00 cmp r3, #0 + 800c014: d002 beq.n 800c01c + 800c016: 68bb ldr r3, [r7, #8] + 800c018: 2b00 cmp r3, #0 + 800c01a: d103 bne.n 800c024 stat = osErrorParameter; - 800b3d8: 2304 movs r3, #4 - 800b3da: 425b negs r3, r3 - 800b3dc: 61fb str r3, [r7, #28] - 800b3de: e012 b.n 800b406 + 800c01c: 2304 movs r3, #4 + 800c01e: 425b negs r3, r3 + 800c020: 61fb str r3, [r7, #28] + 800c022: e012 b.n 800c04a } else { if (xQueueReceive (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) { - 800b3e0: 683a ldr r2, [r7, #0] - 800b3e2: 68b9 ldr r1, [r7, #8] - 800b3e4: 69bb ldr r3, [r7, #24] - 800b3e6: 0018 movs r0, r3 - 800b3e8: f000 fbf3 bl 800bbd2 - 800b3ec: 0003 movs r3, r0 - 800b3ee: 2b01 cmp r3, #1 - 800b3f0: d009 beq.n 800b406 + 800c024: 683a ldr r2, [r7, #0] + 800c026: 68b9 ldr r1, [r7, #8] + 800c028: 69bb ldr r3, [r7, #24] + 800c02a: 0018 movs r0, r3 + 800c02c: f000 fbf3 bl 800c816 + 800c030: 0003 movs r3, r0 + 800c032: 2b01 cmp r3, #1 + 800c034: d009 beq.n 800c04a if (timeout != 0U) { - 800b3f2: 683b ldr r3, [r7, #0] - 800b3f4: 2b00 cmp r3, #0 - 800b3f6: d003 beq.n 800b400 + 800c036: 683b ldr r3, [r7, #0] + 800c038: 2b00 cmp r3, #0 + 800c03a: d003 beq.n 800c044 stat = osErrorTimeout; - 800b3f8: 2302 movs r3, #2 - 800b3fa: 425b negs r3, r3 - 800b3fc: 61fb str r3, [r7, #28] - 800b3fe: e002 b.n 800b406 + 800c03c: 2302 movs r3, #2 + 800c03e: 425b negs r3, r3 + 800c040: 61fb str r3, [r7, #28] + 800c042: e002 b.n 800c04a } else { stat = osErrorResource; - 800b400: 2303 movs r3, #3 - 800b402: 425b negs r3, r3 - 800b404: 61fb str r3, [r7, #28] + 800c044: 2303 movs r3, #3 + 800c046: 425b negs r3, r3 + 800c048: 61fb str r3, [r7, #28] } } } } return (stat); - 800b406: 69fb ldr r3, [r7, #28] + 800c04a: 69fb ldr r3, [r7, #28] } - 800b408: 0018 movs r0, r3 - 800b40a: 46bd mov sp, r7 - 800b40c: b008 add sp, #32 - 800b40e: bd80 pop {r7, pc} - 800b410: e000ed04 .word 0xe000ed04 + 800c04c: 0018 movs r0, r3 + 800c04e: 46bd mov sp, r7 + 800c050: b008 add sp, #32 + 800c052: bd80 pop {r7, pc} + 800c054: e000ed04 .word 0xe000ed04 -0800b414 : +0800c058 : } return (size); } uint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id) { - 800b414: b580 push {r7, lr} - 800b416: b086 sub sp, #24 - 800b418: af00 add r7, sp, #0 - 800b41a: 6078 str r0, [r7, #4] + 800c058: b580 push {r7, lr} + 800c05a: b086 sub sp, #24 + 800c05c: af00 add r7, sp, #0 + 800c05e: 6078 str r0, [r7, #4] QueueHandle_t hQueue = (QueueHandle_t)mq_id; - 800b41c: 687b ldr r3, [r7, #4] - 800b41e: 613b str r3, [r7, #16] + 800c060: 687b ldr r3, [r7, #4] + 800c062: 613b str r3, [r7, #16] UBaseType_t count; if (hQueue == NULL) { - 800b420: 693b ldr r3, [r7, #16] - 800b422: 2b00 cmp r3, #0 - 800b424: d102 bne.n 800b42c + 800c064: 693b ldr r3, [r7, #16] + 800c066: 2b00 cmp r3, #0 + 800c068: d102 bne.n 800c070 count = 0U; - 800b426: 2300 movs r3, #0 - 800b428: 617b str r3, [r7, #20] - 800b42a: e012 b.n 800b452 + 800c06a: 2300 movs r3, #0 + 800c06c: 617b str r3, [r7, #20] + 800c06e: e012 b.n 800c096 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 800b42c: f3ef 8305 mrs r3, IPSR - 800b430: 60fb str r3, [r7, #12] + 800c070: f3ef 8305 mrs r3, IPSR + 800c074: 60fb str r3, [r7, #12] return(result); - 800b432: 68fb ldr r3, [r7, #12] + 800c076: 68fb ldr r3, [r7, #12] } else if (IS_IRQ()) { - 800b434: 2b00 cmp r3, #0 - 800b436: d006 beq.n 800b446 + 800c078: 2b00 cmp r3, #0 + 800c07a: d006 beq.n 800c08a count = uxQueueMessagesWaitingFromISR (hQueue); - 800b438: 693b ldr r3, [r7, #16] - 800b43a: 0018 movs r0, r3 - 800b43c: f000 fdd0 bl 800bfe0 - 800b440: 0003 movs r3, r0 - 800b442: 617b str r3, [r7, #20] - 800b444: e005 b.n 800b452 + 800c07c: 693b ldr r3, [r7, #16] + 800c07e: 0018 movs r0, r3 + 800c080: f000 fdd0 bl 800cc24 + 800c084: 0003 movs r3, r0 + 800c086: 617b str r3, [r7, #20] + 800c088: e005 b.n 800c096 } else { count = uxQueueMessagesWaiting (hQueue); - 800b446: 693b ldr r3, [r7, #16] - 800b448: 0018 movs r0, r3 - 800b44a: f000 fdb4 bl 800bfb6 - 800b44e: 0003 movs r3, r0 - 800b450: 617b str r3, [r7, #20] + 800c08a: 693b ldr r3, [r7, #16] + 800c08c: 0018 movs r0, r3 + 800c08e: f000 fdb4 bl 800cbfa + 800c092: 0003 movs r3, r0 + 800c094: 617b str r3, [r7, #20] } return ((uint32_t)count); - 800b452: 697b ldr r3, [r7, #20] + 800c096: 697b ldr r3, [r7, #20] } - 800b454: 0018 movs r0, r3 - 800b456: 46bd mov sp, r7 - 800b458: b006 add sp, #24 - 800b45a: bd80 pop {r7, pc} + 800c098: 0018 movs r0, r3 + 800c09a: 46bd mov sp, r7 + 800c09c: b006 add sp, #24 + 800c09e: bd80 pop {r7, pc} -0800b45c : +0800c0a0 : /* vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION equals to 1 and is required for static memory allocation support. */ __WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) { - 800b45c: b580 push {r7, lr} - 800b45e: b084 sub sp, #16 - 800b460: af00 add r7, sp, #0 - 800b462: 60f8 str r0, [r7, #12] - 800b464: 60b9 str r1, [r7, #8] - 800b466: 607a str r2, [r7, #4] + 800c0a0: b580 push {r7, lr} + 800c0a2: b084 sub sp, #16 + 800c0a4: af00 add r7, sp, #0 + 800c0a6: 60f8 str r0, [r7, #12] + 800c0a8: 60b9 str r1, [r7, #8] + 800c0aa: 607a str r2, [r7, #4] /* Idle task control block and stack */ static StaticTask_t Idle_TCB; static StackType_t Idle_Stack[configMINIMAL_STACK_SIZE]; *ppxIdleTaskTCBBuffer = &Idle_TCB; - 800b468: 68fb ldr r3, [r7, #12] - 800b46a: 4a06 ldr r2, [pc, #24] ; (800b484 ) - 800b46c: 601a str r2, [r3, #0] + 800c0ac: 68fb ldr r3, [r7, #12] + 800c0ae: 4a06 ldr r2, [pc, #24] ; (800c0c8 ) + 800c0b0: 601a str r2, [r3, #0] *ppxIdleTaskStackBuffer = &Idle_Stack[0]; - 800b46e: 68bb ldr r3, [r7, #8] - 800b470: 4a05 ldr r2, [pc, #20] ; (800b488 ) - 800b472: 601a str r2, [r3, #0] + 800c0b2: 68bb ldr r3, [r7, #8] + 800c0b4: 4a05 ldr r2, [pc, #20] ; (800c0cc ) + 800c0b6: 601a str r2, [r3, #0] *pulIdleTaskStackSize = (uint32_t)configMINIMAL_STACK_SIZE; - 800b474: 687b ldr r3, [r7, #4] - 800b476: 2280 movs r2, #128 ; 0x80 - 800b478: 601a str r2, [r3, #0] + 800c0b8: 687b ldr r3, [r7, #4] + 800c0ba: 2280 movs r2, #128 ; 0x80 + 800c0bc: 601a str r2, [r3, #0] } - 800b47a: 46c0 nop ; (mov r8, r8) - 800b47c: 46bd mov sp, r7 - 800b47e: b004 add sp, #16 - 800b480: bd80 pop {r7, pc} - 800b482: 46c0 nop ; (mov r8, r8) - 800b484: 2000034c .word 0x2000034c - 800b488: 20000408 .word 0x20000408 + 800c0be: 46c0 nop ; (mov r8, r8) + 800c0c0: 46bd mov sp, r7 + 800c0c2: b004 add sp, #16 + 800c0c4: bd80 pop {r7, pc} + 800c0c6: 46c0 nop ; (mov r8, r8) + 800c0c8: 2000042c .word 0x2000042c + 800c0cc: 200004e8 .word 0x200004e8 -0800b48c : +0800c0d0 : /* vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION equals to 1 and is required for static memory allocation support. */ __WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) { - 800b48c: b580 push {r7, lr} - 800b48e: b084 sub sp, #16 - 800b490: af00 add r7, sp, #0 - 800b492: 60f8 str r0, [r7, #12] - 800b494: 60b9 str r1, [r7, #8] - 800b496: 607a str r2, [r7, #4] + 800c0d0: b580 push {r7, lr} + 800c0d2: b084 sub sp, #16 + 800c0d4: af00 add r7, sp, #0 + 800c0d6: 60f8 str r0, [r7, #12] + 800c0d8: 60b9 str r1, [r7, #8] + 800c0da: 607a str r2, [r7, #4] /* Timer task control block and stack */ static StaticTask_t Timer_TCB; static StackType_t Timer_Stack[configTIMER_TASK_STACK_DEPTH]; *ppxTimerTaskTCBBuffer = &Timer_TCB; - 800b498: 68fb ldr r3, [r7, #12] - 800b49a: 4a06 ldr r2, [pc, #24] ; (800b4b4 ) - 800b49c: 601a str r2, [r3, #0] + 800c0dc: 68fb ldr r3, [r7, #12] + 800c0de: 4a06 ldr r2, [pc, #24] ; (800c0f8 ) + 800c0e0: 601a str r2, [r3, #0] *ppxTimerTaskStackBuffer = &Timer_Stack[0]; - 800b49e: 68bb ldr r3, [r7, #8] - 800b4a0: 4a05 ldr r2, [pc, #20] ; (800b4b8 ) - 800b4a2: 601a str r2, [r3, #0] + 800c0e2: 68bb ldr r3, [r7, #8] + 800c0e4: 4a05 ldr r2, [pc, #20] ; (800c0fc ) + 800c0e6: 601a str r2, [r3, #0] *pulTimerTaskStackSize = (uint32_t)configTIMER_TASK_STACK_DEPTH; - 800b4a4: 687b ldr r3, [r7, #4] - 800b4a6: 2280 movs r2, #128 ; 0x80 - 800b4a8: 0052 lsls r2, r2, #1 - 800b4aa: 601a str r2, [r3, #0] + 800c0e8: 687b ldr r3, [r7, #4] + 800c0ea: 2280 movs r2, #128 ; 0x80 + 800c0ec: 0052 lsls r2, r2, #1 + 800c0ee: 601a str r2, [r3, #0] } - 800b4ac: 46c0 nop ; (mov r8, r8) - 800b4ae: 46bd mov sp, r7 - 800b4b0: b004 add sp, #16 - 800b4b2: bd80 pop {r7, pc} - 800b4b4: 20000608 .word 0x20000608 - 800b4b8: 200006c4 .word 0x200006c4 + 800c0f0: 46c0 nop ; (mov r8, r8) + 800c0f2: 46bd mov sp, r7 + 800c0f4: b004 add sp, #16 + 800c0f6: bd80 pop {r7, pc} + 800c0f8: 200006e8 .word 0x200006e8 + 800c0fc: 200007a4 .word 0x200007a4 -0800b4bc : +0800c100 : /*----------------------------------------------------------- * PUBLIC LIST API documented in list.h *----------------------------------------------------------*/ void vListInitialise( List_t * const pxList ) { - 800b4bc: b580 push {r7, lr} - 800b4be: b082 sub sp, #8 - 800b4c0: af00 add r7, sp, #0 - 800b4c2: 6078 str r0, [r7, #4] + 800c100: b580 push {r7, lr} + 800c102: b082 sub sp, #8 + 800c104: af00 add r7, sp, #0 + 800c106: 6078 str r0, [r7, #4] /* The list structure contains a list item which is used to mark the end of the list. To initialise the list the list end is inserted as the only list entry. */ pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ - 800b4c4: 687b ldr r3, [r7, #4] - 800b4c6: 3308 adds r3, #8 - 800b4c8: 001a movs r2, r3 - 800b4ca: 687b ldr r3, [r7, #4] - 800b4cc: 605a str r2, [r3, #4] + 800c108: 687b ldr r3, [r7, #4] + 800c10a: 3308 adds r3, #8 + 800c10c: 001a movs r2, r3 + 800c10e: 687b ldr r3, [r7, #4] + 800c110: 605a str r2, [r3, #4] /* The list end value is the highest possible value in the list to ensure it remains at the end of the list. */ pxList->xListEnd.xItemValue = portMAX_DELAY; - 800b4ce: 687b ldr r3, [r7, #4] - 800b4d0: 2201 movs r2, #1 - 800b4d2: 4252 negs r2, r2 - 800b4d4: 609a str r2, [r3, #8] + 800c112: 687b ldr r3, [r7, #4] + 800c114: 2201 movs r2, #1 + 800c116: 4252 negs r2, r2 + 800c118: 609a str r2, [r3, #8] /* The list end next and previous pointers point to itself so we know when the list is empty. */ pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ - 800b4d6: 687b ldr r3, [r7, #4] - 800b4d8: 3308 adds r3, #8 - 800b4da: 001a movs r2, r3 - 800b4dc: 687b ldr r3, [r7, #4] - 800b4de: 60da str r2, [r3, #12] + 800c11a: 687b ldr r3, [r7, #4] + 800c11c: 3308 adds r3, #8 + 800c11e: 001a movs r2, r3 + 800c120: 687b ldr r3, [r7, #4] + 800c122: 60da str r2, [r3, #12] pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ - 800b4e0: 687b ldr r3, [r7, #4] - 800b4e2: 3308 adds r3, #8 - 800b4e4: 001a movs r2, r3 - 800b4e6: 687b ldr r3, [r7, #4] - 800b4e8: 611a str r2, [r3, #16] + 800c124: 687b ldr r3, [r7, #4] + 800c126: 3308 adds r3, #8 + 800c128: 001a movs r2, r3 + 800c12a: 687b ldr r3, [r7, #4] + 800c12c: 611a str r2, [r3, #16] pxList->uxNumberOfItems = ( UBaseType_t ) 0U; - 800b4ea: 687b ldr r3, [r7, #4] - 800b4ec: 2200 movs r2, #0 - 800b4ee: 601a str r2, [r3, #0] + 800c12e: 687b ldr r3, [r7, #4] + 800c130: 2200 movs r2, #0 + 800c132: 601a str r2, [r3, #0] /* Write known values into the list if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ); listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ); } - 800b4f0: 46c0 nop ; (mov r8, r8) - 800b4f2: 46bd mov sp, r7 - 800b4f4: b002 add sp, #8 - 800b4f6: bd80 pop {r7, pc} + 800c134: 46c0 nop ; (mov r8, r8) + 800c136: 46bd mov sp, r7 + 800c138: b002 add sp, #8 + 800c13a: bd80 pop {r7, pc} -0800b4f8 : +0800c13c : /*-----------------------------------------------------------*/ void vListInitialiseItem( ListItem_t * const pxItem ) { - 800b4f8: b580 push {r7, lr} - 800b4fa: b082 sub sp, #8 - 800b4fc: af00 add r7, sp, #0 - 800b4fe: 6078 str r0, [r7, #4] + 800c13c: b580 push {r7, lr} + 800c13e: b082 sub sp, #8 + 800c140: af00 add r7, sp, #0 + 800c142: 6078 str r0, [r7, #4] /* Make sure the list item is not recorded as being on a list. */ pxItem->pxContainer = NULL; - 800b500: 687b ldr r3, [r7, #4] - 800b502: 2200 movs r2, #0 - 800b504: 611a str r2, [r3, #16] + 800c144: 687b ldr r3, [r7, #4] + 800c146: 2200 movs r2, #0 + 800c148: 611a str r2, [r3, #16] /* Write known values into the list item if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); } - 800b506: 46c0 nop ; (mov r8, r8) - 800b508: 46bd mov sp, r7 - 800b50a: b002 add sp, #8 - 800b50c: bd80 pop {r7, pc} + 800c14a: 46c0 nop ; (mov r8, r8) + 800c14c: 46bd mov sp, r7 + 800c14e: b002 add sp, #8 + 800c150: bd80 pop {r7, pc} -0800b50e : +0800c152 : /*-----------------------------------------------------------*/ void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) { - 800b50e: b580 push {r7, lr} - 800b510: b084 sub sp, #16 - 800b512: af00 add r7, sp, #0 - 800b514: 6078 str r0, [r7, #4] - 800b516: 6039 str r1, [r7, #0] + 800c152: b580 push {r7, lr} + 800c154: b084 sub sp, #16 + 800c156: af00 add r7, sp, #0 + 800c158: 6078 str r0, [r7, #4] + 800c15a: 6039 str r1, [r7, #0] ListItem_t * const pxIndex = pxList->pxIndex; - 800b518: 687b ldr r3, [r7, #4] - 800b51a: 685b ldr r3, [r3, #4] - 800b51c: 60fb str r3, [r7, #12] + 800c15c: 687b ldr r3, [r7, #4] + 800c15e: 685b ldr r3, [r3, #4] + 800c160: 60fb str r3, [r7, #12] listTEST_LIST_ITEM_INTEGRITY( pxNewListItem ); /* Insert a new list item into pxList, but rather than sort the list, makes the new list item the last item to be removed by a call to listGET_OWNER_OF_NEXT_ENTRY(). */ pxNewListItem->pxNext = pxIndex; - 800b51e: 683b ldr r3, [r7, #0] - 800b520: 68fa ldr r2, [r7, #12] - 800b522: 605a str r2, [r3, #4] + 800c162: 683b ldr r3, [r7, #0] + 800c164: 68fa ldr r2, [r7, #12] + 800c166: 605a str r2, [r3, #4] pxNewListItem->pxPrevious = pxIndex->pxPrevious; - 800b524: 68fb ldr r3, [r7, #12] - 800b526: 689a ldr r2, [r3, #8] - 800b528: 683b ldr r3, [r7, #0] - 800b52a: 609a str r2, [r3, #8] + 800c168: 68fb ldr r3, [r7, #12] + 800c16a: 689a ldr r2, [r3, #8] + 800c16c: 683b ldr r3, [r7, #0] + 800c16e: 609a str r2, [r3, #8] /* Only used during decision coverage testing. */ mtCOVERAGE_TEST_DELAY(); pxIndex->pxPrevious->pxNext = pxNewListItem; - 800b52c: 68fb ldr r3, [r7, #12] - 800b52e: 689b ldr r3, [r3, #8] - 800b530: 683a ldr r2, [r7, #0] - 800b532: 605a str r2, [r3, #4] + 800c170: 68fb ldr r3, [r7, #12] + 800c172: 689b ldr r3, [r3, #8] + 800c174: 683a ldr r2, [r7, #0] + 800c176: 605a str r2, [r3, #4] pxIndex->pxPrevious = pxNewListItem; - 800b534: 68fb ldr r3, [r7, #12] - 800b536: 683a ldr r2, [r7, #0] - 800b538: 609a str r2, [r3, #8] + 800c178: 68fb ldr r3, [r7, #12] + 800c17a: 683a ldr r2, [r7, #0] + 800c17c: 609a str r2, [r3, #8] /* Remember which list the item is in. */ pxNewListItem->pxContainer = pxList; - 800b53a: 683b ldr r3, [r7, #0] - 800b53c: 687a ldr r2, [r7, #4] - 800b53e: 611a str r2, [r3, #16] + 800c17e: 683b ldr r3, [r7, #0] + 800c180: 687a ldr r2, [r7, #4] + 800c182: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )++; - 800b540: 687b ldr r3, [r7, #4] - 800b542: 681b ldr r3, [r3, #0] - 800b544: 1c5a adds r2, r3, #1 - 800b546: 687b ldr r3, [r7, #4] - 800b548: 601a str r2, [r3, #0] + 800c184: 687b ldr r3, [r7, #4] + 800c186: 681b ldr r3, [r3, #0] + 800c188: 1c5a adds r2, r3, #1 + 800c18a: 687b ldr r3, [r7, #4] + 800c18c: 601a str r2, [r3, #0] } - 800b54a: 46c0 nop ; (mov r8, r8) - 800b54c: 46bd mov sp, r7 - 800b54e: b004 add sp, #16 - 800b550: bd80 pop {r7, pc} + 800c18e: 46c0 nop ; (mov r8, r8) + 800c190: 46bd mov sp, r7 + 800c192: b004 add sp, #16 + 800c194: bd80 pop {r7, pc} -0800b552 : +0800c196 : /*-----------------------------------------------------------*/ void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) { - 800b552: b580 push {r7, lr} - 800b554: b084 sub sp, #16 - 800b556: af00 add r7, sp, #0 - 800b558: 6078 str r0, [r7, #4] - 800b55a: 6039 str r1, [r7, #0] + 800c196: b580 push {r7, lr} + 800c198: b084 sub sp, #16 + 800c19a: af00 add r7, sp, #0 + 800c19c: 6078 str r0, [r7, #4] + 800c19e: 6039 str r1, [r7, #0] ListItem_t *pxIterator; const TickType_t xValueOfInsertion = pxNewListItem->xItemValue; - 800b55c: 683b ldr r3, [r7, #0] - 800b55e: 681b ldr r3, [r3, #0] - 800b560: 60bb str r3, [r7, #8] + 800c1a0: 683b ldr r3, [r7, #0] + 800c1a2: 681b ldr r3, [r3, #0] + 800c1a4: 60bb str r3, [r7, #8] new list item should be placed after it. This ensures that TCBs which are stored in ready lists (all of which have the same xItemValue value) get a share of the CPU. However, if the xItemValue is the same as the back marker the iteration loop below will not end. Therefore the value is checked first, and the algorithm slightly modified if necessary. */ if( xValueOfInsertion == portMAX_DELAY ) - 800b562: 68bb ldr r3, [r7, #8] - 800b564: 3301 adds r3, #1 - 800b566: d103 bne.n 800b570 + 800c1a6: 68bb ldr r3, [r7, #8] + 800c1a8: 3301 adds r3, #1 + 800c1aa: d103 bne.n 800c1b4 { pxIterator = pxList->xListEnd.pxPrevious; - 800b568: 687b ldr r3, [r7, #4] - 800b56a: 691b ldr r3, [r3, #16] - 800b56c: 60fb str r3, [r7, #12] - 800b56e: e00c b.n 800b58a + 800c1ac: 687b ldr r3, [r7, #4] + 800c1ae: 691b ldr r3, [r3, #16] + 800c1b0: 60fb str r3, [r7, #12] + 800c1b2: e00c b.n 800c1ce 4) Using a queue or semaphore before it has been initialised or before the scheduler has been started (are interrupts firing before vTaskStartScheduler() has been called?). **********************************************************************/ for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */ - 800b570: 687b ldr r3, [r7, #4] - 800b572: 3308 adds r3, #8 - 800b574: 60fb str r3, [r7, #12] - 800b576: e002 b.n 800b57e - 800b578: 68fb ldr r3, [r7, #12] - 800b57a: 685b ldr r3, [r3, #4] - 800b57c: 60fb str r3, [r7, #12] - 800b57e: 68fb ldr r3, [r7, #12] - 800b580: 685b ldr r3, [r3, #4] - 800b582: 681b ldr r3, [r3, #0] - 800b584: 68ba ldr r2, [r7, #8] - 800b586: 429a cmp r2, r3 - 800b588: d2f6 bcs.n 800b578 + 800c1b4: 687b ldr r3, [r7, #4] + 800c1b6: 3308 adds r3, #8 + 800c1b8: 60fb str r3, [r7, #12] + 800c1ba: e002 b.n 800c1c2 + 800c1bc: 68fb ldr r3, [r7, #12] + 800c1be: 685b ldr r3, [r3, #4] + 800c1c0: 60fb str r3, [r7, #12] + 800c1c2: 68fb ldr r3, [r7, #12] + 800c1c4: 685b ldr r3, [r3, #4] + 800c1c6: 681b ldr r3, [r3, #0] + 800c1c8: 68ba ldr r2, [r7, #8] + 800c1ca: 429a cmp r2, r3 + 800c1cc: d2f6 bcs.n 800c1bc /* There is nothing to do here, just iterating to the wanted insertion position. */ } } pxNewListItem->pxNext = pxIterator->pxNext; - 800b58a: 68fb ldr r3, [r7, #12] - 800b58c: 685a ldr r2, [r3, #4] - 800b58e: 683b ldr r3, [r7, #0] - 800b590: 605a str r2, [r3, #4] + 800c1ce: 68fb ldr r3, [r7, #12] + 800c1d0: 685a ldr r2, [r3, #4] + 800c1d2: 683b ldr r3, [r7, #0] + 800c1d4: 605a str r2, [r3, #4] pxNewListItem->pxNext->pxPrevious = pxNewListItem; - 800b592: 683b ldr r3, [r7, #0] - 800b594: 685b ldr r3, [r3, #4] - 800b596: 683a ldr r2, [r7, #0] - 800b598: 609a str r2, [r3, #8] + 800c1d6: 683b ldr r3, [r7, #0] + 800c1d8: 685b ldr r3, [r3, #4] + 800c1da: 683a ldr r2, [r7, #0] + 800c1dc: 609a str r2, [r3, #8] pxNewListItem->pxPrevious = pxIterator; - 800b59a: 683b ldr r3, [r7, #0] - 800b59c: 68fa ldr r2, [r7, #12] - 800b59e: 609a str r2, [r3, #8] + 800c1de: 683b ldr r3, [r7, #0] + 800c1e0: 68fa ldr r2, [r7, #12] + 800c1e2: 609a str r2, [r3, #8] pxIterator->pxNext = pxNewListItem; - 800b5a0: 68fb ldr r3, [r7, #12] - 800b5a2: 683a ldr r2, [r7, #0] - 800b5a4: 605a str r2, [r3, #4] + 800c1e4: 68fb ldr r3, [r7, #12] + 800c1e6: 683a ldr r2, [r7, #0] + 800c1e8: 605a str r2, [r3, #4] /* Remember which list the item is in. This allows fast removal of the item later. */ pxNewListItem->pxContainer = pxList; - 800b5a6: 683b ldr r3, [r7, #0] - 800b5a8: 687a ldr r2, [r7, #4] - 800b5aa: 611a str r2, [r3, #16] + 800c1ea: 683b ldr r3, [r7, #0] + 800c1ec: 687a ldr r2, [r7, #4] + 800c1ee: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )++; - 800b5ac: 687b ldr r3, [r7, #4] - 800b5ae: 681b ldr r3, [r3, #0] - 800b5b0: 1c5a adds r2, r3, #1 - 800b5b2: 687b ldr r3, [r7, #4] - 800b5b4: 601a str r2, [r3, #0] + 800c1f0: 687b ldr r3, [r7, #4] + 800c1f2: 681b ldr r3, [r3, #0] + 800c1f4: 1c5a adds r2, r3, #1 + 800c1f6: 687b ldr r3, [r7, #4] + 800c1f8: 601a str r2, [r3, #0] } - 800b5b6: 46c0 nop ; (mov r8, r8) - 800b5b8: 46bd mov sp, r7 - 800b5ba: b004 add sp, #16 - 800b5bc: bd80 pop {r7, pc} + 800c1fa: 46c0 nop ; (mov r8, r8) + 800c1fc: 46bd mov sp, r7 + 800c1fe: b004 add sp, #16 + 800c200: bd80 pop {r7, pc} -0800b5be : +0800c202 : /*-----------------------------------------------------------*/ UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) { - 800b5be: b580 push {r7, lr} - 800b5c0: b084 sub sp, #16 - 800b5c2: af00 add r7, sp, #0 - 800b5c4: 6078 str r0, [r7, #4] + 800c202: b580 push {r7, lr} + 800c204: b084 sub sp, #16 + 800c206: af00 add r7, sp, #0 + 800c208: 6078 str r0, [r7, #4] /* The list item knows which list it is in. Obtain the list from the list item. */ List_t * const pxList = pxItemToRemove->pxContainer; - 800b5c6: 687b ldr r3, [r7, #4] - 800b5c8: 691b ldr r3, [r3, #16] - 800b5ca: 60fb str r3, [r7, #12] + 800c20a: 687b ldr r3, [r7, #4] + 800c20c: 691b ldr r3, [r3, #16] + 800c20e: 60fb str r3, [r7, #12] pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; - 800b5cc: 687b ldr r3, [r7, #4] - 800b5ce: 685b ldr r3, [r3, #4] - 800b5d0: 687a ldr r2, [r7, #4] - 800b5d2: 6892 ldr r2, [r2, #8] - 800b5d4: 609a str r2, [r3, #8] + 800c210: 687b ldr r3, [r7, #4] + 800c212: 685b ldr r3, [r3, #4] + 800c214: 687a ldr r2, [r7, #4] + 800c216: 6892 ldr r2, [r2, #8] + 800c218: 609a str r2, [r3, #8] pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; - 800b5d6: 687b ldr r3, [r7, #4] - 800b5d8: 689b ldr r3, [r3, #8] - 800b5da: 687a ldr r2, [r7, #4] - 800b5dc: 6852 ldr r2, [r2, #4] - 800b5de: 605a str r2, [r3, #4] + 800c21a: 687b ldr r3, [r7, #4] + 800c21c: 689b ldr r3, [r3, #8] + 800c21e: 687a ldr r2, [r7, #4] + 800c220: 6852 ldr r2, [r2, #4] + 800c222: 605a str r2, [r3, #4] /* Only used during decision coverage testing. */ mtCOVERAGE_TEST_DELAY(); /* Make sure the index is left pointing to a valid item. */ if( pxList->pxIndex == pxItemToRemove ) - 800b5e0: 68fb ldr r3, [r7, #12] - 800b5e2: 685b ldr r3, [r3, #4] - 800b5e4: 687a ldr r2, [r7, #4] - 800b5e6: 429a cmp r2, r3 - 800b5e8: d103 bne.n 800b5f2 + 800c224: 68fb ldr r3, [r7, #12] + 800c226: 685b ldr r3, [r3, #4] + 800c228: 687a ldr r2, [r7, #4] + 800c22a: 429a cmp r2, r3 + 800c22c: d103 bne.n 800c236 { pxList->pxIndex = pxItemToRemove->pxPrevious; - 800b5ea: 687b ldr r3, [r7, #4] - 800b5ec: 689a ldr r2, [r3, #8] - 800b5ee: 68fb ldr r3, [r7, #12] - 800b5f0: 605a str r2, [r3, #4] + 800c22e: 687b ldr r3, [r7, #4] + 800c230: 689a ldr r2, [r3, #8] + 800c232: 68fb ldr r3, [r7, #12] + 800c234: 605a str r2, [r3, #4] else { mtCOVERAGE_TEST_MARKER(); } pxItemToRemove->pxContainer = NULL; - 800b5f2: 687b ldr r3, [r7, #4] - 800b5f4: 2200 movs r2, #0 - 800b5f6: 611a str r2, [r3, #16] + 800c236: 687b ldr r3, [r7, #4] + 800c238: 2200 movs r2, #0 + 800c23a: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )--; - 800b5f8: 68fb ldr r3, [r7, #12] - 800b5fa: 681b ldr r3, [r3, #0] - 800b5fc: 1e5a subs r2, r3, #1 - 800b5fe: 68fb ldr r3, [r7, #12] - 800b600: 601a str r2, [r3, #0] + 800c23c: 68fb ldr r3, [r7, #12] + 800c23e: 681b ldr r3, [r3, #0] + 800c240: 1e5a subs r2, r3, #1 + 800c242: 68fb ldr r3, [r7, #12] + 800c244: 601a str r2, [r3, #0] return pxList->uxNumberOfItems; - 800b602: 68fb ldr r3, [r7, #12] - 800b604: 681b ldr r3, [r3, #0] + 800c246: 68fb ldr r3, [r7, #12] + 800c248: 681b ldr r3, [r3, #0] } - 800b606: 0018 movs r0, r3 - 800b608: 46bd mov sp, r7 - 800b60a: b004 add sp, #16 - 800b60c: bd80 pop {r7, pc} + 800c24a: 0018 movs r0, r3 + 800c24c: 46bd mov sp, r7 + 800c24e: b004 add sp, #16 + 800c250: bd80 pop {r7, pc} -0800b60e : +0800c252 : } \ taskEXIT_CRITICAL() /*-----------------------------------------------------------*/ BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) { - 800b60e: b580 push {r7, lr} - 800b610: b084 sub sp, #16 - 800b612: af00 add r7, sp, #0 - 800b614: 6078 str r0, [r7, #4] - 800b616: 6039 str r1, [r7, #0] + 800c252: b580 push {r7, lr} + 800c254: b084 sub sp, #16 + 800c256: af00 add r7, sp, #0 + 800c258: 6078 str r0, [r7, #4] + 800c25a: 6039 str r1, [r7, #0] Queue_t * const pxQueue = xQueue; - 800b618: 687b ldr r3, [r7, #4] - 800b61a: 60fb str r3, [r7, #12] + 800c25c: 687b ldr r3, [r7, #4] + 800c25e: 60fb str r3, [r7, #12] configASSERT( pxQueue ); - 800b61c: 68fb ldr r3, [r7, #12] - 800b61e: 2b00 cmp r3, #0 - 800b620: d101 bne.n 800b626 - 800b622: b672 cpsid i - 800b624: e7fe b.n 800b624 + 800c260: 68fb ldr r3, [r7, #12] + 800c262: 2b00 cmp r3, #0 + 800c264: d101 bne.n 800c26a + 800c266: b672 cpsid i + 800c268: e7fe b.n 800c268 taskENTER_CRITICAL(); - 800b626: f002 fa53 bl 800dad0 + 800c26a: f002 fa51 bl 800e710 { pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ - 800b62a: 68fb ldr r3, [r7, #12] - 800b62c: 681a ldr r2, [r3, #0] - 800b62e: 68fb ldr r3, [r7, #12] - 800b630: 6bd9 ldr r1, [r3, #60] ; 0x3c - 800b632: 68fb ldr r3, [r7, #12] - 800b634: 6c1b ldr r3, [r3, #64] ; 0x40 - 800b636: 434b muls r3, r1 - 800b638: 18d2 adds r2, r2, r3 - 800b63a: 68fb ldr r3, [r7, #12] - 800b63c: 609a str r2, [r3, #8] + 800c26e: 68fb ldr r3, [r7, #12] + 800c270: 681a ldr r2, [r3, #0] + 800c272: 68fb ldr r3, [r7, #12] + 800c274: 6bd9 ldr r1, [r3, #60] ; 0x3c + 800c276: 68fb ldr r3, [r7, #12] + 800c278: 6c1b ldr r3, [r3, #64] ; 0x40 + 800c27a: 434b muls r3, r1 + 800c27c: 18d2 adds r2, r2, r3 + 800c27e: 68fb ldr r3, [r7, #12] + 800c280: 609a str r2, [r3, #8] pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U; - 800b63e: 68fb ldr r3, [r7, #12] - 800b640: 2200 movs r2, #0 - 800b642: 639a str r2, [r3, #56] ; 0x38 + 800c282: 68fb ldr r3, [r7, #12] + 800c284: 2200 movs r2, #0 + 800c286: 639a str r2, [r3, #56] ; 0x38 pxQueue->pcWriteTo = pxQueue->pcHead; - 800b644: 68fb ldr r3, [r7, #12] - 800b646: 681a ldr r2, [r3, #0] - 800b648: 68fb ldr r3, [r7, #12] - 800b64a: 605a str r2, [r3, #4] + 800c288: 68fb ldr r3, [r7, #12] + 800c28a: 681a ldr r2, [r3, #0] + 800c28c: 68fb ldr r3, [r7, #12] + 800c28e: 605a str r2, [r3, #4] pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ - 800b64c: 68fb ldr r3, [r7, #12] - 800b64e: 681a ldr r2, [r3, #0] - 800b650: 68fb ldr r3, [r7, #12] - 800b652: 6bdb ldr r3, [r3, #60] ; 0x3c - 800b654: 1e59 subs r1, r3, #1 - 800b656: 68fb ldr r3, [r7, #12] - 800b658: 6c1b ldr r3, [r3, #64] ; 0x40 - 800b65a: 434b muls r3, r1 - 800b65c: 18d2 adds r2, r2, r3 - 800b65e: 68fb ldr r3, [r7, #12] - 800b660: 60da str r2, [r3, #12] + 800c290: 68fb ldr r3, [r7, #12] + 800c292: 681a ldr r2, [r3, #0] + 800c294: 68fb ldr r3, [r7, #12] + 800c296: 6bdb ldr r3, [r3, #60] ; 0x3c + 800c298: 1e59 subs r1, r3, #1 + 800c29a: 68fb ldr r3, [r7, #12] + 800c29c: 6c1b ldr r3, [r3, #64] ; 0x40 + 800c29e: 434b muls r3, r1 + 800c2a0: 18d2 adds r2, r2, r3 + 800c2a2: 68fb ldr r3, [r7, #12] + 800c2a4: 60da str r2, [r3, #12] pxQueue->cRxLock = queueUNLOCKED; - 800b662: 68fb ldr r3, [r7, #12] - 800b664: 2244 movs r2, #68 ; 0x44 - 800b666: 21ff movs r1, #255 ; 0xff - 800b668: 5499 strb r1, [r3, r2] + 800c2a6: 68fb ldr r3, [r7, #12] + 800c2a8: 2244 movs r2, #68 ; 0x44 + 800c2aa: 21ff movs r1, #255 ; 0xff + 800c2ac: 5499 strb r1, [r3, r2] pxQueue->cTxLock = queueUNLOCKED; - 800b66a: 68fb ldr r3, [r7, #12] - 800b66c: 2245 movs r2, #69 ; 0x45 - 800b66e: 21ff movs r1, #255 ; 0xff - 800b670: 5499 strb r1, [r3, r2] + 800c2ae: 68fb ldr r3, [r7, #12] + 800c2b0: 2245 movs r2, #69 ; 0x45 + 800c2b2: 21ff movs r1, #255 ; 0xff + 800c2b4: 5499 strb r1, [r3, r2] if( xNewQueue == pdFALSE ) - 800b672: 683b ldr r3, [r7, #0] - 800b674: 2b00 cmp r3, #0 - 800b676: d10d bne.n 800b694 + 800c2b6: 683b ldr r3, [r7, #0] + 800c2b8: 2b00 cmp r3, #0 + 800c2ba: d10d bne.n 800c2d8 /* If there are tasks blocked waiting to read from the queue, then the tasks will remain blocked as after this function exits the queue will still be empty. If there are tasks blocked waiting to write to the queue, then one should be unblocked as after this function exits it will be possible to write to it. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) - 800b678: 68fb ldr r3, [r7, #12] - 800b67a: 691b ldr r3, [r3, #16] - 800b67c: 2b00 cmp r3, #0 - 800b67e: d013 beq.n 800b6a8 + 800c2bc: 68fb ldr r3, [r7, #12] + 800c2be: 691b ldr r3, [r3, #16] + 800c2c0: 2b00 cmp r3, #0 + 800c2c2: d013 beq.n 800c2ec { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - 800b680: 68fb ldr r3, [r7, #12] - 800b682: 3310 adds r3, #16 - 800b684: 0018 movs r0, r3 - 800b686: f001 fa5d bl 800cb44 - 800b68a: 1e03 subs r3, r0, #0 - 800b68c: d00c beq.n 800b6a8 + 800c2c4: 68fb ldr r3, [r7, #12] + 800c2c6: 3310 adds r3, #16 + 800c2c8: 0018 movs r0, r3 + 800c2ca: f001 fa5d bl 800d788 + 800c2ce: 1e03 subs r3, r0, #0 + 800c2d0: d00c beq.n 800c2ec { queueYIELD_IF_USING_PREEMPTION(); - 800b68e: f002 fa0f bl 800dab0 - 800b692: e009 b.n 800b6a8 + 800c2d2: f002 fa0d bl 800e6f0 + 800c2d6: e009 b.n 800c2ec } } else { /* Ensure the event queues start in the correct state. */ vListInitialise( &( pxQueue->xTasksWaitingToSend ) ); - 800b694: 68fb ldr r3, [r7, #12] - 800b696: 3310 adds r3, #16 - 800b698: 0018 movs r0, r3 - 800b69a: f7ff ff0f bl 800b4bc + 800c2d8: 68fb ldr r3, [r7, #12] + 800c2da: 3310 adds r3, #16 + 800c2dc: 0018 movs r0, r3 + 800c2de: f7ff ff0f bl 800c100 vListInitialise( &( pxQueue->xTasksWaitingToReceive ) ); - 800b69e: 68fb ldr r3, [r7, #12] - 800b6a0: 3324 adds r3, #36 ; 0x24 - 800b6a2: 0018 movs r0, r3 - 800b6a4: f7ff ff0a bl 800b4bc + 800c2e2: 68fb ldr r3, [r7, #12] + 800c2e4: 3324 adds r3, #36 ; 0x24 + 800c2e6: 0018 movs r0, r3 + 800c2e8: f7ff ff0a bl 800c100 } } taskEXIT_CRITICAL(); - 800b6a8: f002 fa24 bl 800daf4 + 800c2ec: f002 fa22 bl 800e734 /* A value is returned for calling semantic consistency with previous versions. */ return pdPASS; - 800b6ac: 2301 movs r3, #1 + 800c2f0: 2301 movs r3, #1 } - 800b6ae: 0018 movs r0, r3 - 800b6b0: 46bd mov sp, r7 - 800b6b2: b004 add sp, #16 - 800b6b4: bd80 pop {r7, pc} + 800c2f2: 0018 movs r0, r3 + 800c2f4: 46bd mov sp, r7 + 800c2f6: b004 add sp, #16 + 800c2f8: bd80 pop {r7, pc} -0800b6b6 : +0800c2fa : /*-----------------------------------------------------------*/ #if( configSUPPORT_STATIC_ALLOCATION == 1 ) QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) { - 800b6b6: b590 push {r4, r7, lr} - 800b6b8: b089 sub sp, #36 ; 0x24 - 800b6ba: af02 add r7, sp, #8 - 800b6bc: 60f8 str r0, [r7, #12] - 800b6be: 60b9 str r1, [r7, #8] - 800b6c0: 607a str r2, [r7, #4] - 800b6c2: 603b str r3, [r7, #0] + 800c2fa: b590 push {r4, r7, lr} + 800c2fc: b089 sub sp, #36 ; 0x24 + 800c2fe: af02 add r7, sp, #8 + 800c300: 60f8 str r0, [r7, #12] + 800c302: 60b9 str r1, [r7, #8] + 800c304: 607a str r2, [r7, #4] + 800c306: 603b str r3, [r7, #0] Queue_t *pxNewQueue; configASSERT( uxQueueLength > ( UBaseType_t ) 0 ); - 800b6c4: 68fb ldr r3, [r7, #12] - 800b6c6: 2b00 cmp r3, #0 - 800b6c8: d101 bne.n 800b6ce - 800b6ca: b672 cpsid i - 800b6cc: e7fe b.n 800b6cc + 800c308: 68fb ldr r3, [r7, #12] + 800c30a: 2b00 cmp r3, #0 + 800c30c: d101 bne.n 800c312 + 800c30e: b672 cpsid i + 800c310: e7fe b.n 800c310 /* The StaticQueue_t structure and the queue storage area must be supplied. */ configASSERT( pxStaticQueue != NULL ); - 800b6ce: 683b ldr r3, [r7, #0] - 800b6d0: 2b00 cmp r3, #0 - 800b6d2: d101 bne.n 800b6d8 - 800b6d4: b672 cpsid i - 800b6d6: e7fe b.n 800b6d6 + 800c312: 683b ldr r3, [r7, #0] + 800c314: 2b00 cmp r3, #0 + 800c316: d101 bne.n 800c31c + 800c318: b672 cpsid i + 800c31a: e7fe b.n 800c31a /* A queue storage area should be provided if the item size is not 0, and should not be provided if the item size is 0. */ configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) ); - 800b6d8: 687b ldr r3, [r7, #4] - 800b6da: 2b00 cmp r3, #0 - 800b6dc: d002 beq.n 800b6e4 - 800b6de: 68bb ldr r3, [r7, #8] - 800b6e0: 2b00 cmp r3, #0 - 800b6e2: d001 beq.n 800b6e8 - 800b6e4: 2301 movs r3, #1 - 800b6e6: e000 b.n 800b6ea - 800b6e8: 2300 movs r3, #0 - 800b6ea: 2b00 cmp r3, #0 - 800b6ec: d101 bne.n 800b6f2 - 800b6ee: b672 cpsid i - 800b6f0: e7fe b.n 800b6f0 + 800c31c: 687b ldr r3, [r7, #4] + 800c31e: 2b00 cmp r3, #0 + 800c320: d002 beq.n 800c328 + 800c322: 68bb ldr r3, [r7, #8] + 800c324: 2b00 cmp r3, #0 + 800c326: d001 beq.n 800c32c + 800c328: 2301 movs r3, #1 + 800c32a: e000 b.n 800c32e + 800c32c: 2300 movs r3, #0 + 800c32e: 2b00 cmp r3, #0 + 800c330: d101 bne.n 800c336 + 800c332: b672 cpsid i + 800c334: e7fe b.n 800c334 configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) ); - 800b6f2: 687b ldr r3, [r7, #4] - 800b6f4: 2b00 cmp r3, #0 - 800b6f6: d102 bne.n 800b6fe - 800b6f8: 68bb ldr r3, [r7, #8] - 800b6fa: 2b00 cmp r3, #0 - 800b6fc: d101 bne.n 800b702 - 800b6fe: 2301 movs r3, #1 - 800b700: e000 b.n 800b704 - 800b702: 2300 movs r3, #0 - 800b704: 2b00 cmp r3, #0 - 800b706: d101 bne.n 800b70c - 800b708: b672 cpsid i - 800b70a: e7fe b.n 800b70a + 800c336: 687b ldr r3, [r7, #4] + 800c338: 2b00 cmp r3, #0 + 800c33a: d102 bne.n 800c342 + 800c33c: 68bb ldr r3, [r7, #8] + 800c33e: 2b00 cmp r3, #0 + 800c340: d101 bne.n 800c346 + 800c342: 2301 movs r3, #1 + 800c344: e000 b.n 800c348 + 800c346: 2300 movs r3, #0 + 800c348: 2b00 cmp r3, #0 + 800c34a: d101 bne.n 800c350 + 800c34c: b672 cpsid i + 800c34e: e7fe b.n 800c34e #if( configASSERT_DEFINED == 1 ) { /* Sanity check that the size of the structure used to declare a variable of type StaticQueue_t or StaticSemaphore_t equals the size of the real queue and semaphore structures. */ volatile size_t xSize = sizeof( StaticQueue_t ); - 800b70c: 2350 movs r3, #80 ; 0x50 - 800b70e: 613b str r3, [r7, #16] + 800c350: 2350 movs r3, #80 ; 0x50 + 800c352: 613b str r3, [r7, #16] configASSERT( xSize == sizeof( Queue_t ) ); - 800b710: 693b ldr r3, [r7, #16] - 800b712: 2b50 cmp r3, #80 ; 0x50 - 800b714: d001 beq.n 800b71a - 800b716: b672 cpsid i - 800b718: e7fe b.n 800b718 + 800c354: 693b ldr r3, [r7, #16] + 800c356: 2b50 cmp r3, #80 ; 0x50 + 800c358: d001 beq.n 800c35e + 800c35a: b672 cpsid i + 800c35c: e7fe b.n 800c35c ( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */ - 800b71a: 693b ldr r3, [r7, #16] + 800c35e: 693b ldr r3, [r7, #16] #endif /* configASSERT_DEFINED */ /* The address of a statically allocated queue was passed in, use it. The address of a statically allocated storage area was also passed in but is already set. */ pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */ - 800b71c: 683b ldr r3, [r7, #0] - 800b71e: 617b str r3, [r7, #20] + 800c360: 683b ldr r3, [r7, #0] + 800c362: 617b str r3, [r7, #20] if( pxNewQueue != NULL ) - 800b720: 697b ldr r3, [r7, #20] - 800b722: 2b00 cmp r3, #0 - 800b724: d00e beq.n 800b744 + 800c364: 697b ldr r3, [r7, #20] + 800c366: 2b00 cmp r3, #0 + 800c368: d00e beq.n 800c388 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) { /* Queues can be allocated wither statically or dynamically, so note this queue was allocated statically in case the queue is later deleted. */ pxNewQueue->ucStaticallyAllocated = pdTRUE; - 800b726: 697b ldr r3, [r7, #20] - 800b728: 2246 movs r2, #70 ; 0x46 - 800b72a: 2101 movs r1, #1 - 800b72c: 5499 strb r1, [r3, r2] + 800c36a: 697b ldr r3, [r7, #20] + 800c36c: 2246 movs r2, #70 ; 0x46 + 800c36e: 2101 movs r1, #1 + 800c370: 5499 strb r1, [r3, r2] } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue ); - 800b72e: 2328 movs r3, #40 ; 0x28 - 800b730: 18fb adds r3, r7, r3 - 800b732: 781c ldrb r4, [r3, #0] - 800b734: 687a ldr r2, [r7, #4] - 800b736: 68b9 ldr r1, [r7, #8] - 800b738: 68f8 ldr r0, [r7, #12] - 800b73a: 697b ldr r3, [r7, #20] - 800b73c: 9300 str r3, [sp, #0] - 800b73e: 0023 movs r3, r4 - 800b740: f000 f837 bl 800b7b2 + 800c372: 2328 movs r3, #40 ; 0x28 + 800c374: 18fb adds r3, r7, r3 + 800c376: 781c ldrb r4, [r3, #0] + 800c378: 687a ldr r2, [r7, #4] + 800c37a: 68b9 ldr r1, [r7, #8] + 800c37c: 68f8 ldr r0, [r7, #12] + 800c37e: 697b ldr r3, [r7, #20] + 800c380: 9300 str r3, [sp, #0] + 800c382: 0023 movs r3, r4 + 800c384: f000 f837 bl 800c3f6 { traceQUEUE_CREATE_FAILED( ucQueueType ); mtCOVERAGE_TEST_MARKER(); } return pxNewQueue; - 800b744: 697b ldr r3, [r7, #20] + 800c388: 697b ldr r3, [r7, #20] } - 800b746: 0018 movs r0, r3 - 800b748: 46bd mov sp, r7 - 800b74a: b007 add sp, #28 - 800b74c: bd90 pop {r4, r7, pc} + 800c38a: 0018 movs r0, r3 + 800c38c: 46bd mov sp, r7 + 800c38e: b007 add sp, #28 + 800c390: bd90 pop {r4, r7, pc} -0800b74e : +0800c392 : /*-----------------------------------------------------------*/ #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) { - 800b74e: b590 push {r4, r7, lr} - 800b750: b08b sub sp, #44 ; 0x2c - 800b752: af02 add r7, sp, #8 - 800b754: 60f8 str r0, [r7, #12] - 800b756: 60b9 str r1, [r7, #8] - 800b758: 1dfb adds r3, r7, #7 - 800b75a: 701a strb r2, [r3, #0] + 800c392: b590 push {r4, r7, lr} + 800c394: b08b sub sp, #44 ; 0x2c + 800c396: af02 add r7, sp, #8 + 800c398: 60f8 str r0, [r7, #12] + 800c39a: 60b9 str r1, [r7, #8] + 800c39c: 1dfb adds r3, r7, #7 + 800c39e: 701a strb r2, [r3, #0] Queue_t *pxNewQueue; size_t xQueueSizeInBytes; uint8_t *pucQueueStorage; configASSERT( uxQueueLength > ( UBaseType_t ) 0 ); - 800b75c: 68fb ldr r3, [r7, #12] - 800b75e: 2b00 cmp r3, #0 - 800b760: d101 bne.n 800b766 - 800b762: b672 cpsid i - 800b764: e7fe b.n 800b764 + 800c3a0: 68fb ldr r3, [r7, #12] + 800c3a2: 2b00 cmp r3, #0 + 800c3a4: d101 bne.n 800c3aa + 800c3a6: b672 cpsid i + 800c3a8: e7fe b.n 800c3a8 /* Allocate enough space to hold the maximum number of items that can be in the queue at any time. It is valid for uxItemSize to be zero in the case the queue is used as a semaphore. */ xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ - 800b766: 68fb ldr r3, [r7, #12] - 800b768: 68ba ldr r2, [r7, #8] - 800b76a: 4353 muls r3, r2 - 800b76c: 61fb str r3, [r7, #28] + 800c3aa: 68fb ldr r3, [r7, #12] + 800c3ac: 68ba ldr r2, [r7, #8] + 800c3ae: 4353 muls r3, r2 + 800c3b0: 61fb str r3, [r7, #28] alignment requirements of the Queue_t structure - which in this case is an int8_t *. Therefore, whenever the stack alignment requirements are greater than or equal to the pointer to char requirements the cast is safe. In other cases alignment requirements are not strict (one or two bytes). */ pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */ - 800b76e: 69fb ldr r3, [r7, #28] - 800b770: 3350 adds r3, #80 ; 0x50 - 800b772: 0018 movs r0, r3 - 800b774: f002 fa44 bl 800dc00 - 800b778: 0003 movs r3, r0 - 800b77a: 61bb str r3, [r7, #24] + 800c3b2: 69fb ldr r3, [r7, #28] + 800c3b4: 3350 adds r3, #80 ; 0x50 + 800c3b6: 0018 movs r0, r3 + 800c3b8: f002 fa42 bl 800e840 + 800c3bc: 0003 movs r3, r0 + 800c3be: 61bb str r3, [r7, #24] if( pxNewQueue != NULL ) - 800b77c: 69bb ldr r3, [r7, #24] - 800b77e: 2b00 cmp r3, #0 - 800b780: d012 beq.n 800b7a8 + 800c3c0: 69bb ldr r3, [r7, #24] + 800c3c2: 2b00 cmp r3, #0 + 800c3c4: d012 beq.n 800c3ec { /* Jump past the queue structure to find the location of the queue storage area. */ pucQueueStorage = ( uint8_t * ) pxNewQueue; - 800b782: 69bb ldr r3, [r7, #24] - 800b784: 617b str r3, [r7, #20] + 800c3c6: 69bb ldr r3, [r7, #24] + 800c3c8: 617b str r3, [r7, #20] pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ - 800b786: 697b ldr r3, [r7, #20] - 800b788: 3350 adds r3, #80 ; 0x50 - 800b78a: 617b str r3, [r7, #20] + 800c3ca: 697b ldr r3, [r7, #20] + 800c3cc: 3350 adds r3, #80 ; 0x50 + 800c3ce: 617b str r3, [r7, #20] #if( configSUPPORT_STATIC_ALLOCATION == 1 ) { /* Queues can be created either statically or dynamically, so note this task was created dynamically in case it is later deleted. */ pxNewQueue->ucStaticallyAllocated = pdFALSE; - 800b78c: 69bb ldr r3, [r7, #24] - 800b78e: 2246 movs r2, #70 ; 0x46 - 800b790: 2100 movs r1, #0 - 800b792: 5499 strb r1, [r3, r2] + 800c3d0: 69bb ldr r3, [r7, #24] + 800c3d2: 2246 movs r2, #70 ; 0x46 + 800c3d4: 2100 movs r1, #0 + 800c3d6: 5499 strb r1, [r3, r2] } #endif /* configSUPPORT_STATIC_ALLOCATION */ prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue ); - 800b794: 1dfb adds r3, r7, #7 - 800b796: 781c ldrb r4, [r3, #0] - 800b798: 697a ldr r2, [r7, #20] - 800b79a: 68b9 ldr r1, [r7, #8] - 800b79c: 68f8 ldr r0, [r7, #12] - 800b79e: 69bb ldr r3, [r7, #24] - 800b7a0: 9300 str r3, [sp, #0] - 800b7a2: 0023 movs r3, r4 - 800b7a4: f000 f805 bl 800b7b2 + 800c3d8: 1dfb adds r3, r7, #7 + 800c3da: 781c ldrb r4, [r3, #0] + 800c3dc: 697a ldr r2, [r7, #20] + 800c3de: 68b9 ldr r1, [r7, #8] + 800c3e0: 68f8 ldr r0, [r7, #12] + 800c3e2: 69bb ldr r3, [r7, #24] + 800c3e4: 9300 str r3, [sp, #0] + 800c3e6: 0023 movs r3, r4 + 800c3e8: f000 f805 bl 800c3f6 { traceQUEUE_CREATE_FAILED( ucQueueType ); mtCOVERAGE_TEST_MARKER(); } return pxNewQueue; - 800b7a8: 69bb ldr r3, [r7, #24] + 800c3ec: 69bb ldr r3, [r7, #24] } - 800b7aa: 0018 movs r0, r3 - 800b7ac: 46bd mov sp, r7 - 800b7ae: b009 add sp, #36 ; 0x24 - 800b7b0: bd90 pop {r4, r7, pc} + 800c3ee: 0018 movs r0, r3 + 800c3f0: 46bd mov sp, r7 + 800c3f2: b009 add sp, #36 ; 0x24 + 800c3f4: bd90 pop {r4, r7, pc} -0800b7b2 : +0800c3f6 : #endif /* configSUPPORT_STATIC_ALLOCATION */ /*-----------------------------------------------------------*/ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) { - 800b7b2: b580 push {r7, lr} - 800b7b4: b084 sub sp, #16 - 800b7b6: af00 add r7, sp, #0 - 800b7b8: 60f8 str r0, [r7, #12] - 800b7ba: 60b9 str r1, [r7, #8] - 800b7bc: 607a str r2, [r7, #4] - 800b7be: 001a movs r2, r3 - 800b7c0: 1cfb adds r3, r7, #3 - 800b7c2: 701a strb r2, [r3, #0] + 800c3f6: b580 push {r7, lr} + 800c3f8: b084 sub sp, #16 + 800c3fa: af00 add r7, sp, #0 + 800c3fc: 60f8 str r0, [r7, #12] + 800c3fe: 60b9 str r1, [r7, #8] + 800c400: 607a str r2, [r7, #4] + 800c402: 001a movs r2, r3 + 800c404: 1cfb adds r3, r7, #3 + 800c406: 701a strb r2, [r3, #0] /* Remove compiler warnings about unused parameters should configUSE_TRACE_FACILITY not be set to 1. */ ( void ) ucQueueType; if( uxItemSize == ( UBaseType_t ) 0 ) - 800b7c4: 68bb ldr r3, [r7, #8] - 800b7c6: 2b00 cmp r3, #0 - 800b7c8: d103 bne.n 800b7d2 + 800c408: 68bb ldr r3, [r7, #8] + 800c40a: 2b00 cmp r3, #0 + 800c40c: d103 bne.n 800c416 { /* No RAM was allocated for the queue storage area, but PC head cannot be set to NULL because NULL is used as a key to say the queue is used as a mutex. Therefore just set pcHead to point to the queue as a benign value that is known to be within the memory map. */ pxNewQueue->pcHead = ( int8_t * ) pxNewQueue; - 800b7ca: 69bb ldr r3, [r7, #24] - 800b7cc: 69ba ldr r2, [r7, #24] - 800b7ce: 601a str r2, [r3, #0] - 800b7d0: e002 b.n 800b7d8 + 800c40e: 69bb ldr r3, [r7, #24] + 800c410: 69ba ldr r2, [r7, #24] + 800c412: 601a str r2, [r3, #0] + 800c414: e002 b.n 800c41c } else { /* Set the head to the start of the queue storage area. */ pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage; - 800b7d2: 69bb ldr r3, [r7, #24] - 800b7d4: 687a ldr r2, [r7, #4] - 800b7d6: 601a str r2, [r3, #0] + 800c416: 69bb ldr r3, [r7, #24] + 800c418: 687a ldr r2, [r7, #4] + 800c41a: 601a str r2, [r3, #0] } /* Initialise the queue members as described where the queue type is defined. */ pxNewQueue->uxLength = uxQueueLength; - 800b7d8: 69bb ldr r3, [r7, #24] - 800b7da: 68fa ldr r2, [r7, #12] - 800b7dc: 63da str r2, [r3, #60] ; 0x3c + 800c41c: 69bb ldr r3, [r7, #24] + 800c41e: 68fa ldr r2, [r7, #12] + 800c420: 63da str r2, [r3, #60] ; 0x3c pxNewQueue->uxItemSize = uxItemSize; - 800b7de: 69bb ldr r3, [r7, #24] - 800b7e0: 68ba ldr r2, [r7, #8] - 800b7e2: 641a str r2, [r3, #64] ; 0x40 + 800c422: 69bb ldr r3, [r7, #24] + 800c424: 68ba ldr r2, [r7, #8] + 800c426: 641a str r2, [r3, #64] ; 0x40 ( void ) xQueueGenericReset( pxNewQueue, pdTRUE ); - 800b7e4: 69bb ldr r3, [r7, #24] - 800b7e6: 2101 movs r1, #1 - 800b7e8: 0018 movs r0, r3 - 800b7ea: f7ff ff10 bl 800b60e + 800c428: 69bb ldr r3, [r7, #24] + 800c42a: 2101 movs r1, #1 + 800c42c: 0018 movs r0, r3 + 800c42e: f7ff ff10 bl 800c252 #if ( configUSE_TRACE_FACILITY == 1 ) { pxNewQueue->ucQueueType = ucQueueType; - 800b7ee: 69bb ldr r3, [r7, #24] - 800b7f0: 1cfa adds r2, r7, #3 - 800b7f2: 214c movs r1, #76 ; 0x4c - 800b7f4: 7812 ldrb r2, [r2, #0] - 800b7f6: 545a strb r2, [r3, r1] + 800c432: 69bb ldr r3, [r7, #24] + 800c434: 1cfa adds r2, r7, #3 + 800c436: 214c movs r1, #76 ; 0x4c + 800c438: 7812 ldrb r2, [r2, #0] + 800c43a: 545a strb r2, [r3, r1] pxNewQueue->pxQueueSetContainer = NULL; } #endif /* configUSE_QUEUE_SETS */ traceQUEUE_CREATE( pxNewQueue ); } - 800b7f8: 46c0 nop ; (mov r8, r8) - 800b7fa: 46bd mov sp, r7 - 800b7fc: b004 add sp, #16 - 800b7fe: bd80 pop {r7, pc} + 800c43c: 46c0 nop ; (mov r8, r8) + 800c43e: 46bd mov sp, r7 + 800c440: b004 add sp, #16 + 800c442: bd80 pop {r7, pc} -0800b800 : +0800c444 : /*-----------------------------------------------------------*/ #if( configUSE_MUTEXES == 1 ) static void prvInitialiseMutex( Queue_t *pxNewQueue ) { - 800b800: b580 push {r7, lr} - 800b802: b082 sub sp, #8 - 800b804: af00 add r7, sp, #0 - 800b806: 6078 str r0, [r7, #4] + 800c444: b580 push {r7, lr} + 800c446: b082 sub sp, #8 + 800c448: af00 add r7, sp, #0 + 800c44a: 6078 str r0, [r7, #4] if( pxNewQueue != NULL ) - 800b808: 687b ldr r3, [r7, #4] - 800b80a: 2b00 cmp r3, #0 - 800b80c: d00e beq.n 800b82c + 800c44c: 687b ldr r3, [r7, #4] + 800c44e: 2b00 cmp r3, #0 + 800c450: d00e beq.n 800c470 { /* The queue create function will set all the queue structure members correctly for a generic queue, but this function is creating a mutex. Overwrite those members that need to be set differently - in particular the information required for priority inheritance. */ pxNewQueue->u.xSemaphore.xMutexHolder = NULL; - 800b80e: 687b ldr r3, [r7, #4] - 800b810: 2200 movs r2, #0 - 800b812: 609a str r2, [r3, #8] + 800c452: 687b ldr r3, [r7, #4] + 800c454: 2200 movs r2, #0 + 800c456: 609a str r2, [r3, #8] pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX; - 800b814: 687b ldr r3, [r7, #4] - 800b816: 2200 movs r2, #0 - 800b818: 601a str r2, [r3, #0] + 800c458: 687b ldr r3, [r7, #4] + 800c45a: 2200 movs r2, #0 + 800c45c: 601a str r2, [r3, #0] /* In case this is a recursive mutex. */ pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0; - 800b81a: 687b ldr r3, [r7, #4] - 800b81c: 2200 movs r2, #0 - 800b81e: 60da str r2, [r3, #12] + 800c45e: 687b ldr r3, [r7, #4] + 800c460: 2200 movs r2, #0 + 800c462: 60da str r2, [r3, #12] traceCREATE_MUTEX( pxNewQueue ); /* Start with the semaphore in the expected state. */ ( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK ); - 800b820: 6878 ldr r0, [r7, #4] - 800b822: 2300 movs r3, #0 - 800b824: 2200 movs r2, #0 - 800b826: 2100 movs r1, #0 - 800b828: f000 f89b bl 800b962 + 800c464: 6878 ldr r0, [r7, #4] + 800c466: 2300 movs r3, #0 + 800c468: 2200 movs r2, #0 + 800c46a: 2100 movs r1, #0 + 800c46c: f000 f89b bl 800c5a6 } else { traceCREATE_MUTEX_FAILED(); } } - 800b82c: 46c0 nop ; (mov r8, r8) - 800b82e: 46bd mov sp, r7 - 800b830: b002 add sp, #8 - 800b832: bd80 pop {r7, pc} + 800c470: 46c0 nop ; (mov r8, r8) + 800c472: 46bd mov sp, r7 + 800c474: b002 add sp, #8 + 800c476: bd80 pop {r7, pc} -0800b834 : +0800c478 : /*-----------------------------------------------------------*/ #if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) { - 800b834: b580 push {r7, lr} - 800b836: b086 sub sp, #24 - 800b838: af00 add r7, sp, #0 - 800b83a: 0002 movs r2, r0 - 800b83c: 1dfb adds r3, r7, #7 - 800b83e: 701a strb r2, [r3, #0] + 800c478: b580 push {r7, lr} + 800c47a: b086 sub sp, #24 + 800c47c: af00 add r7, sp, #0 + 800c47e: 0002 movs r2, r0 + 800c480: 1dfb adds r3, r7, #7 + 800c482: 701a strb r2, [r3, #0] QueueHandle_t xNewQueue; const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0; - 800b840: 2301 movs r3, #1 - 800b842: 617b str r3, [r7, #20] - 800b844: 2300 movs r3, #0 - 800b846: 613b str r3, [r7, #16] + 800c484: 2301 movs r3, #1 + 800c486: 617b str r3, [r7, #20] + 800c488: 2300 movs r3, #0 + 800c48a: 613b str r3, [r7, #16] xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType ); - 800b848: 1dfb adds r3, r7, #7 - 800b84a: 781a ldrb r2, [r3, #0] - 800b84c: 6939 ldr r1, [r7, #16] - 800b84e: 697b ldr r3, [r7, #20] - 800b850: 0018 movs r0, r3 - 800b852: f7ff ff7c bl 800b74e - 800b856: 0003 movs r3, r0 - 800b858: 60fb str r3, [r7, #12] + 800c48c: 1dfb adds r3, r7, #7 + 800c48e: 781a ldrb r2, [r3, #0] + 800c490: 6939 ldr r1, [r7, #16] + 800c492: 697b ldr r3, [r7, #20] + 800c494: 0018 movs r0, r3 + 800c496: f7ff ff7c bl 800c392 + 800c49a: 0003 movs r3, r0 + 800c49c: 60fb str r3, [r7, #12] prvInitialiseMutex( ( Queue_t * ) xNewQueue ); - 800b85a: 68fb ldr r3, [r7, #12] - 800b85c: 0018 movs r0, r3 - 800b85e: f7ff ffcf bl 800b800 + 800c49e: 68fb ldr r3, [r7, #12] + 800c4a0: 0018 movs r0, r3 + 800c4a2: f7ff ffcf bl 800c444 return xNewQueue; - 800b862: 68fb ldr r3, [r7, #12] + 800c4a6: 68fb ldr r3, [r7, #12] } - 800b864: 0018 movs r0, r3 - 800b866: 46bd mov sp, r7 - 800b868: b006 add sp, #24 - 800b86a: bd80 pop {r7, pc} + 800c4a8: 0018 movs r0, r3 + 800c4aa: 46bd mov sp, r7 + 800c4ac: b006 add sp, #24 + 800c4ae: bd80 pop {r7, pc} -0800b86c : +0800c4b0 : /*-----------------------------------------------------------*/ #if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) { - 800b86c: b580 push {r7, lr} - 800b86e: b088 sub sp, #32 - 800b870: af02 add r7, sp, #8 - 800b872: 0002 movs r2, r0 - 800b874: 6039 str r1, [r7, #0] - 800b876: 1dfb adds r3, r7, #7 - 800b878: 701a strb r2, [r3, #0] + 800c4b0: b580 push {r7, lr} + 800c4b2: b088 sub sp, #32 + 800c4b4: af02 add r7, sp, #8 + 800c4b6: 0002 movs r2, r0 + 800c4b8: 6039 str r1, [r7, #0] + 800c4ba: 1dfb adds r3, r7, #7 + 800c4bc: 701a strb r2, [r3, #0] QueueHandle_t xNewQueue; const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0; - 800b87a: 2301 movs r3, #1 - 800b87c: 617b str r3, [r7, #20] - 800b87e: 2300 movs r3, #0 - 800b880: 613b str r3, [r7, #16] + 800c4be: 2301 movs r3, #1 + 800c4c0: 617b str r3, [r7, #20] + 800c4c2: 2300 movs r3, #0 + 800c4c4: 613b str r3, [r7, #16] /* Prevent compiler warnings about unused parameters if configUSE_TRACE_FACILITY does not equal 1. */ ( void ) ucQueueType; xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType ); - 800b882: 683a ldr r2, [r7, #0] - 800b884: 6939 ldr r1, [r7, #16] - 800b886: 6978 ldr r0, [r7, #20] - 800b888: 1dfb adds r3, r7, #7 - 800b88a: 781b ldrb r3, [r3, #0] - 800b88c: 9300 str r3, [sp, #0] - 800b88e: 0013 movs r3, r2 - 800b890: 2200 movs r2, #0 - 800b892: f7ff ff10 bl 800b6b6 - 800b896: 0003 movs r3, r0 - 800b898: 60fb str r3, [r7, #12] + 800c4c6: 683a ldr r2, [r7, #0] + 800c4c8: 6939 ldr r1, [r7, #16] + 800c4ca: 6978 ldr r0, [r7, #20] + 800c4cc: 1dfb adds r3, r7, #7 + 800c4ce: 781b ldrb r3, [r3, #0] + 800c4d0: 9300 str r3, [sp, #0] + 800c4d2: 0013 movs r3, r2 + 800c4d4: 2200 movs r2, #0 + 800c4d6: f7ff ff10 bl 800c2fa + 800c4da: 0003 movs r3, r0 + 800c4dc: 60fb str r3, [r7, #12] prvInitialiseMutex( ( Queue_t * ) xNewQueue ); - 800b89a: 68fb ldr r3, [r7, #12] - 800b89c: 0018 movs r0, r3 - 800b89e: f7ff ffaf bl 800b800 + 800c4de: 68fb ldr r3, [r7, #12] + 800c4e0: 0018 movs r0, r3 + 800c4e2: f7ff ffaf bl 800c444 return xNewQueue; - 800b8a2: 68fb ldr r3, [r7, #12] + 800c4e6: 68fb ldr r3, [r7, #12] } - 800b8a4: 0018 movs r0, r3 - 800b8a6: 46bd mov sp, r7 - 800b8a8: b006 add sp, #24 - 800b8aa: bd80 pop {r7, pc} + 800c4e8: 0018 movs r0, r3 + 800c4ea: 46bd mov sp, r7 + 800c4ec: b006 add sp, #24 + 800c4ee: bd80 pop {r7, pc} -0800b8ac : +0800c4f0 : /*-----------------------------------------------------------*/ #if ( configUSE_RECURSIVE_MUTEXES == 1 ) BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) { - 800b8ac: b590 push {r4, r7, lr} - 800b8ae: b085 sub sp, #20 - 800b8b0: af00 add r7, sp, #0 - 800b8b2: 6078 str r0, [r7, #4] + 800c4f0: b590 push {r4, r7, lr} + 800c4f2: b085 sub sp, #20 + 800c4f4: af00 add r7, sp, #0 + 800c4f6: 6078 str r0, [r7, #4] BaseType_t xReturn; Queue_t * const pxMutex = ( Queue_t * ) xMutex; - 800b8b4: 687b ldr r3, [r7, #4] - 800b8b6: 60bb str r3, [r7, #8] + 800c4f8: 687b ldr r3, [r7, #4] + 800c4fa: 60bb str r3, [r7, #8] configASSERT( pxMutex ); - 800b8b8: 68bb ldr r3, [r7, #8] - 800b8ba: 2b00 cmp r3, #0 - 800b8bc: d101 bne.n 800b8c2 - 800b8be: b672 cpsid i - 800b8c0: e7fe b.n 800b8c0 + 800c4fc: 68bb ldr r3, [r7, #8] + 800c4fe: 2b00 cmp r3, #0 + 800c500: d101 bne.n 800c506 + 800c502: b672 cpsid i + 800c504: e7fe b.n 800c504 change outside of this task. If this task does not hold the mutex then pxMutexHolder can never coincidentally equal the tasks handle, and as this is the only condition we are interested in it does not matter if pxMutexHolder is accessed simultaneously by another task. Therefore no mutual exclusion is required to test the pxMutexHolder variable. */ if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() ) - 800b8c2: 68bb ldr r3, [r7, #8] - 800b8c4: 689c ldr r4, [r3, #8] - 800b8c6: f001 fad5 bl 800ce74 - 800b8ca: 0003 movs r3, r0 - 800b8cc: 429c cmp r4, r3 - 800b8ce: d111 bne.n 800b8f4 + 800c506: 68bb ldr r3, [r7, #8] + 800c508: 689c ldr r4, [r3, #8] + 800c50a: f001 fad5 bl 800dab8 + 800c50e: 0003 movs r3, r0 + 800c510: 429c cmp r4, r3 + 800c512: d111 bne.n 800c538 /* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to the task handle, therefore no underflow check is required. Also, uxRecursiveCallCount is only modified by the mutex holder, and as there can only be one, no mutual exclusion is required to modify the uxRecursiveCallCount member. */ ( pxMutex->u.xSemaphore.uxRecursiveCallCount )--; - 800b8d0: 68bb ldr r3, [r7, #8] - 800b8d2: 68db ldr r3, [r3, #12] - 800b8d4: 1e5a subs r2, r3, #1 - 800b8d6: 68bb ldr r3, [r7, #8] - 800b8d8: 60da str r2, [r3, #12] + 800c514: 68bb ldr r3, [r7, #8] + 800c516: 68db ldr r3, [r3, #12] + 800c518: 1e5a subs r2, r3, #1 + 800c51a: 68bb ldr r3, [r7, #8] + 800c51c: 60da str r2, [r3, #12] /* Has the recursive call count unwound to 0? */ if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 ) - 800b8da: 68bb ldr r3, [r7, #8] - 800b8dc: 68db ldr r3, [r3, #12] - 800b8de: 2b00 cmp r3, #0 - 800b8e0: d105 bne.n 800b8ee + 800c51e: 68bb ldr r3, [r7, #8] + 800c520: 68db ldr r3, [r3, #12] + 800c522: 2b00 cmp r3, #0 + 800c524: d105 bne.n 800c532 { /* Return the mutex. This will automatically unblock any other task that might be waiting to access the mutex. */ ( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK ); - 800b8e2: 68b8 ldr r0, [r7, #8] - 800b8e4: 2300 movs r3, #0 - 800b8e6: 2200 movs r2, #0 - 800b8e8: 2100 movs r1, #0 - 800b8ea: f000 f83a bl 800b962 + 800c526: 68b8 ldr r0, [r7, #8] + 800c528: 2300 movs r3, #0 + 800c52a: 2200 movs r2, #0 + 800c52c: 2100 movs r1, #0 + 800c52e: f000 f83a bl 800c5a6 else { mtCOVERAGE_TEST_MARKER(); } xReturn = pdPASS; - 800b8ee: 2301 movs r3, #1 - 800b8f0: 60fb str r3, [r7, #12] - 800b8f2: e001 b.n 800b8f8 + 800c532: 2301 movs r3, #1 + 800c534: 60fb str r3, [r7, #12] + 800c536: e001 b.n 800c53c } else { /* The mutex cannot be given because the calling task is not the holder. */ xReturn = pdFAIL; - 800b8f4: 2300 movs r3, #0 - 800b8f6: 60fb str r3, [r7, #12] + 800c538: 2300 movs r3, #0 + 800c53a: 60fb str r3, [r7, #12] traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ); } return xReturn; - 800b8f8: 68fb ldr r3, [r7, #12] + 800c53c: 68fb ldr r3, [r7, #12] } - 800b8fa: 0018 movs r0, r3 - 800b8fc: 46bd mov sp, r7 - 800b8fe: b005 add sp, #20 - 800b900: bd90 pop {r4, r7, pc} + 800c53e: 0018 movs r0, r3 + 800c540: 46bd mov sp, r7 + 800c542: b005 add sp, #20 + 800c544: bd90 pop {r4, r7, pc} -0800b902 : +0800c546 : /*-----------------------------------------------------------*/ #if ( configUSE_RECURSIVE_MUTEXES == 1 ) BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) { - 800b902: b590 push {r4, r7, lr} - 800b904: b085 sub sp, #20 - 800b906: af00 add r7, sp, #0 - 800b908: 6078 str r0, [r7, #4] - 800b90a: 6039 str r1, [r7, #0] + 800c546: b590 push {r4, r7, lr} + 800c548: b085 sub sp, #20 + 800c54a: af00 add r7, sp, #0 + 800c54c: 6078 str r0, [r7, #4] + 800c54e: 6039 str r1, [r7, #0] BaseType_t xReturn; Queue_t * const pxMutex = ( Queue_t * ) xMutex; - 800b90c: 687b ldr r3, [r7, #4] - 800b90e: 60bb str r3, [r7, #8] + 800c550: 687b ldr r3, [r7, #4] + 800c552: 60bb str r3, [r7, #8] configASSERT( pxMutex ); - 800b910: 68bb ldr r3, [r7, #8] - 800b912: 2b00 cmp r3, #0 - 800b914: d101 bne.n 800b91a - 800b916: b672 cpsid i - 800b918: e7fe b.n 800b918 + 800c554: 68bb ldr r3, [r7, #8] + 800c556: 2b00 cmp r3, #0 + 800c558: d101 bne.n 800c55e + 800c55a: b672 cpsid i + 800c55c: e7fe b.n 800c55c /* Comments regarding mutual exclusion as per those within xQueueGiveMutexRecursive(). */ traceTAKE_MUTEX_RECURSIVE( pxMutex ); if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() ) - 800b91a: 68bb ldr r3, [r7, #8] - 800b91c: 689c ldr r4, [r3, #8] - 800b91e: f001 faa9 bl 800ce74 - 800b922: 0003 movs r3, r0 - 800b924: 429c cmp r4, r3 - 800b926: d107 bne.n 800b938 + 800c55e: 68bb ldr r3, [r7, #8] + 800c560: 689c ldr r4, [r3, #8] + 800c562: f001 faa9 bl 800dab8 + 800c566: 0003 movs r3, r0 + 800c568: 429c cmp r4, r3 + 800c56a: d107 bne.n 800c57c { ( pxMutex->u.xSemaphore.uxRecursiveCallCount )++; - 800b928: 68bb ldr r3, [r7, #8] - 800b92a: 68db ldr r3, [r3, #12] - 800b92c: 1c5a adds r2, r3, #1 - 800b92e: 68bb ldr r3, [r7, #8] - 800b930: 60da str r2, [r3, #12] + 800c56c: 68bb ldr r3, [r7, #8] + 800c56e: 68db ldr r3, [r3, #12] + 800c570: 1c5a adds r2, r3, #1 + 800c572: 68bb ldr r3, [r7, #8] + 800c574: 60da str r2, [r3, #12] xReturn = pdPASS; - 800b932: 2301 movs r3, #1 - 800b934: 60fb str r3, [r7, #12] - 800b936: e00f b.n 800b958 + 800c576: 2301 movs r3, #1 + 800c578: 60fb str r3, [r7, #12] + 800c57a: e00f b.n 800c59c } else { xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait ); - 800b938: 683a ldr r2, [r7, #0] - 800b93a: 68bb ldr r3, [r7, #8] - 800b93c: 0011 movs r1, r2 - 800b93e: 0018 movs r0, r3 - 800b940: f000 f9fc bl 800bd3c - 800b944: 0003 movs r3, r0 - 800b946: 60fb str r3, [r7, #12] + 800c57c: 683a ldr r2, [r7, #0] + 800c57e: 68bb ldr r3, [r7, #8] + 800c580: 0011 movs r1, r2 + 800c582: 0018 movs r0, r3 + 800c584: f000 f9fc bl 800c980 + 800c588: 0003 movs r3, r0 + 800c58a: 60fb str r3, [r7, #12] /* pdPASS will only be returned if the mutex was successfully obtained. The calling task may have entered the Blocked state before reaching here. */ if( xReturn != pdFAIL ) - 800b948: 68fb ldr r3, [r7, #12] - 800b94a: 2b00 cmp r3, #0 - 800b94c: d004 beq.n 800b958 + 800c58c: 68fb ldr r3, [r7, #12] + 800c58e: 2b00 cmp r3, #0 + 800c590: d004 beq.n 800c59c { ( pxMutex->u.xSemaphore.uxRecursiveCallCount )++; - 800b94e: 68bb ldr r3, [r7, #8] - 800b950: 68db ldr r3, [r3, #12] - 800b952: 1c5a adds r2, r3, #1 - 800b954: 68bb ldr r3, [r7, #8] - 800b956: 60da str r2, [r3, #12] + 800c592: 68bb ldr r3, [r7, #8] + 800c594: 68db ldr r3, [r3, #12] + 800c596: 1c5a adds r2, r3, #1 + 800c598: 68bb ldr r3, [r7, #8] + 800c59a: 60da str r2, [r3, #12] { traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex ); } } return xReturn; - 800b958: 68fb ldr r3, [r7, #12] + 800c59c: 68fb ldr r3, [r7, #12] } - 800b95a: 0018 movs r0, r3 - 800b95c: 46bd mov sp, r7 - 800b95e: b005 add sp, #20 - 800b960: bd90 pop {r4, r7, pc} + 800c59e: 0018 movs r0, r3 + 800c5a0: 46bd mov sp, r7 + 800c5a2: b005 add sp, #20 + 800c5a4: bd90 pop {r4, r7, pc} -0800b962 : +0800c5a6 : #endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ /*-----------------------------------------------------------*/ BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) { - 800b962: b580 push {r7, lr} - 800b964: b08a sub sp, #40 ; 0x28 - 800b966: af00 add r7, sp, #0 - 800b968: 60f8 str r0, [r7, #12] - 800b96a: 60b9 str r1, [r7, #8] - 800b96c: 607a str r2, [r7, #4] - 800b96e: 603b str r3, [r7, #0] + 800c5a6: b580 push {r7, lr} + 800c5a8: b08a sub sp, #40 ; 0x28 + 800c5aa: af00 add r7, sp, #0 + 800c5ac: 60f8 str r0, [r7, #12] + 800c5ae: 60b9 str r1, [r7, #8] + 800c5b0: 607a str r2, [r7, #4] + 800c5b2: 603b str r3, [r7, #0] BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired; - 800b970: 2300 movs r3, #0 - 800b972: 627b str r3, [r7, #36] ; 0x24 + 800c5b4: 2300 movs r3, #0 + 800c5b6: 627b str r3, [r7, #36] ; 0x24 TimeOut_t xTimeOut; Queue_t * const pxQueue = xQueue; - 800b974: 68fb ldr r3, [r7, #12] - 800b976: 623b str r3, [r7, #32] + 800c5b8: 68fb ldr r3, [r7, #12] + 800c5ba: 623b str r3, [r7, #32] configASSERT( pxQueue ); - 800b978: 6a3b ldr r3, [r7, #32] - 800b97a: 2b00 cmp r3, #0 - 800b97c: d101 bne.n 800b982 - 800b97e: b672 cpsid i - 800b980: e7fe b.n 800b980 + 800c5bc: 6a3b ldr r3, [r7, #32] + 800c5be: 2b00 cmp r3, #0 + 800c5c0: d101 bne.n 800c5c6 + 800c5c2: b672 cpsid i + 800c5c4: e7fe b.n 800c5c4 configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); - 800b982: 68bb ldr r3, [r7, #8] - 800b984: 2b00 cmp r3, #0 - 800b986: d103 bne.n 800b990 - 800b988: 6a3b ldr r3, [r7, #32] - 800b98a: 6c1b ldr r3, [r3, #64] ; 0x40 - 800b98c: 2b00 cmp r3, #0 - 800b98e: d101 bne.n 800b994 - 800b990: 2301 movs r3, #1 - 800b992: e000 b.n 800b996 - 800b994: 2300 movs r3, #0 - 800b996: 2b00 cmp r3, #0 - 800b998: d101 bne.n 800b99e - 800b99a: b672 cpsid i - 800b99c: e7fe b.n 800b99c + 800c5c6: 68bb ldr r3, [r7, #8] + 800c5c8: 2b00 cmp r3, #0 + 800c5ca: d103 bne.n 800c5d4 + 800c5cc: 6a3b ldr r3, [r7, #32] + 800c5ce: 6c1b ldr r3, [r3, #64] ; 0x40 + 800c5d0: 2b00 cmp r3, #0 + 800c5d2: d101 bne.n 800c5d8 + 800c5d4: 2301 movs r3, #1 + 800c5d6: e000 b.n 800c5da + 800c5d8: 2300 movs r3, #0 + 800c5da: 2b00 cmp r3, #0 + 800c5dc: d101 bne.n 800c5e2 + 800c5de: b672 cpsid i + 800c5e0: e7fe b.n 800c5e0 configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) ); - 800b99e: 683b ldr r3, [r7, #0] - 800b9a0: 2b02 cmp r3, #2 - 800b9a2: d103 bne.n 800b9ac - 800b9a4: 6a3b ldr r3, [r7, #32] - 800b9a6: 6bdb ldr r3, [r3, #60] ; 0x3c - 800b9a8: 2b01 cmp r3, #1 - 800b9aa: d101 bne.n 800b9b0 - 800b9ac: 2301 movs r3, #1 - 800b9ae: e000 b.n 800b9b2 - 800b9b0: 2300 movs r3, #0 - 800b9b2: 2b00 cmp r3, #0 - 800b9b4: d101 bne.n 800b9ba - 800b9b6: b672 cpsid i - 800b9b8: e7fe b.n 800b9b8 + 800c5e2: 683b ldr r3, [r7, #0] + 800c5e4: 2b02 cmp r3, #2 + 800c5e6: d103 bne.n 800c5f0 + 800c5e8: 6a3b ldr r3, [r7, #32] + 800c5ea: 6bdb ldr r3, [r3, #60] ; 0x3c + 800c5ec: 2b01 cmp r3, #1 + 800c5ee: d101 bne.n 800c5f4 + 800c5f0: 2301 movs r3, #1 + 800c5f2: e000 b.n 800c5f6 + 800c5f4: 2300 movs r3, #0 + 800c5f6: 2b00 cmp r3, #0 + 800c5f8: d101 bne.n 800c5fe + 800c5fa: b672 cpsid i + 800c5fc: e7fe b.n 800c5fc #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) { configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - 800b9ba: f001 fa69 bl 800ce90 - 800b9be: 1e03 subs r3, r0, #0 - 800b9c0: d102 bne.n 800b9c8 - 800b9c2: 687b ldr r3, [r7, #4] - 800b9c4: 2b00 cmp r3, #0 - 800b9c6: d101 bne.n 800b9cc - 800b9c8: 2301 movs r3, #1 - 800b9ca: e000 b.n 800b9ce - 800b9cc: 2300 movs r3, #0 - 800b9ce: 2b00 cmp r3, #0 - 800b9d0: d101 bne.n 800b9d6 - 800b9d2: b672 cpsid i - 800b9d4: e7fe b.n 800b9d4 + 800c5fe: f001 fa69 bl 800dad4 + 800c602: 1e03 subs r3, r0, #0 + 800c604: d102 bne.n 800c60c + 800c606: 687b ldr r3, [r7, #4] + 800c608: 2b00 cmp r3, #0 + 800c60a: d101 bne.n 800c610 + 800c60c: 2301 movs r3, #1 + 800c60e: e000 b.n 800c612 + 800c610: 2300 movs r3, #0 + 800c612: 2b00 cmp r3, #0 + 800c614: d101 bne.n 800c61a + 800c616: b672 cpsid i + 800c618: e7fe b.n 800c618 /*lint -save -e904 This function relaxes the coding standard somewhat to allow return statements within the function itself. This is done in the interest of execution time efficiency. */ for( ;; ) { taskENTER_CRITICAL(); - 800b9d6: f002 f87b bl 800dad0 + 800c61a: f002 f879 bl 800e710 { /* Is there room on the queue now? The running task must be the highest priority task wanting to access the queue. If the head item in the queue is to be overwritten then it does not matter if the queue is full. */ if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) ) - 800b9da: 6a3b ldr r3, [r7, #32] - 800b9dc: 6b9a ldr r2, [r3, #56] ; 0x38 - 800b9de: 6a3b ldr r3, [r7, #32] - 800b9e0: 6bdb ldr r3, [r3, #60] ; 0x3c - 800b9e2: 429a cmp r2, r3 - 800b9e4: d302 bcc.n 800b9ec - 800b9e6: 683b ldr r3, [r7, #0] - 800b9e8: 2b02 cmp r3, #2 - 800b9ea: d11e bne.n 800ba2a + 800c61e: 6a3b ldr r3, [r7, #32] + 800c620: 6b9a ldr r2, [r3, #56] ; 0x38 + 800c622: 6a3b ldr r3, [r7, #32] + 800c624: 6bdb ldr r3, [r3, #60] ; 0x3c + 800c626: 429a cmp r2, r3 + 800c628: d302 bcc.n 800c630 + 800c62a: 683b ldr r3, [r7, #0] + 800c62c: 2b02 cmp r3, #2 + 800c62e: d11e bne.n 800c66e } } } #else /* configUSE_QUEUE_SETS */ { xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); - 800b9ec: 683a ldr r2, [r7, #0] - 800b9ee: 68b9 ldr r1, [r7, #8] - 800b9f0: 6a3b ldr r3, [r7, #32] - 800b9f2: 0018 movs r0, r3 - 800b9f4: f000 fb1d bl 800c032 - 800b9f8: 0003 movs r3, r0 - 800b9fa: 61fb str r3, [r7, #28] + 800c630: 683a ldr r2, [r7, #0] + 800c632: 68b9 ldr r1, [r7, #8] + 800c634: 6a3b ldr r3, [r7, #32] + 800c636: 0018 movs r0, r3 + 800c638: f000 fb1d bl 800cc76 + 800c63c: 0003 movs r3, r0 + 800c63e: 61fb str r3, [r7, #28] /* If there was a task waiting for data to arrive on the queue then unblock it now. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) - 800b9fc: 6a3b ldr r3, [r7, #32] - 800b9fe: 6a5b ldr r3, [r3, #36] ; 0x24 - 800ba00: 2b00 cmp r3, #0 - 800ba02: d009 beq.n 800ba18 + 800c640: 6a3b ldr r3, [r7, #32] + 800c642: 6a5b ldr r3, [r3, #36] ; 0x24 + 800c644: 2b00 cmp r3, #0 + 800c646: d009 beq.n 800c65c { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - 800ba04: 6a3b ldr r3, [r7, #32] - 800ba06: 3324 adds r3, #36 ; 0x24 - 800ba08: 0018 movs r0, r3 - 800ba0a: f001 f89b bl 800cb44 - 800ba0e: 1e03 subs r3, r0, #0 - 800ba10: d007 beq.n 800ba22 + 800c648: 6a3b ldr r3, [r7, #32] + 800c64a: 3324 adds r3, #36 ; 0x24 + 800c64c: 0018 movs r0, r3 + 800c64e: f001 f89b bl 800d788 + 800c652: 1e03 subs r3, r0, #0 + 800c654: d007 beq.n 800c666 { /* The unblocked task has a priority higher than our own so yield immediately. Yes it is ok to do this from within the critical section - the kernel takes care of that. */ queueYIELD_IF_USING_PREEMPTION(); - 800ba12: f002 f84d bl 800dab0 - 800ba16: e004 b.n 800ba22 + 800c656: f002 f84b bl 800e6f0 + 800c65a: e004 b.n 800c666 else { mtCOVERAGE_TEST_MARKER(); } } else if( xYieldRequired != pdFALSE ) - 800ba18: 69fb ldr r3, [r7, #28] - 800ba1a: 2b00 cmp r3, #0 - 800ba1c: d001 beq.n 800ba22 + 800c65c: 69fb ldr r3, [r7, #28] + 800c65e: 2b00 cmp r3, #0 + 800c660: d001 beq.n 800c666 { /* This path is a special case that will only get executed if the task was holding multiple mutexes and the mutexes were given back in an order that is different to that in which they were taken. */ queueYIELD_IF_USING_PREEMPTION(); - 800ba1e: f002 f847 bl 800dab0 + 800c662: f002 f845 bl 800e6f0 mtCOVERAGE_TEST_MARKER(); } } #endif /* configUSE_QUEUE_SETS */ taskEXIT_CRITICAL(); - 800ba22: f002 f867 bl 800daf4 + 800c666: f002 f865 bl 800e734 return pdPASS; - 800ba26: 2301 movs r3, #1 - 800ba28: e05b b.n 800bae2 + 800c66a: 2301 movs r3, #1 + 800c66c: e05b b.n 800c726 } else { if( xTicksToWait == ( TickType_t ) 0 ) - 800ba2a: 687b ldr r3, [r7, #4] - 800ba2c: 2b00 cmp r3, #0 - 800ba2e: d103 bne.n 800ba38 + 800c66e: 687b ldr r3, [r7, #4] + 800c670: 2b00 cmp r3, #0 + 800c672: d103 bne.n 800c67c { /* The queue was full and no block time is specified (or the block time has expired) so leave now. */ taskEXIT_CRITICAL(); - 800ba30: f002 f860 bl 800daf4 + 800c674: f002 f85e bl 800e734 /* Return to the original privilege level before exiting the function. */ traceQUEUE_SEND_FAILED( pxQueue ); return errQUEUE_FULL; - 800ba34: 2300 movs r3, #0 - 800ba36: e054 b.n 800bae2 + 800c678: 2300 movs r3, #0 + 800c67a: e054 b.n 800c726 } else if( xEntryTimeSet == pdFALSE ) - 800ba38: 6a7b ldr r3, [r7, #36] ; 0x24 - 800ba3a: 2b00 cmp r3, #0 - 800ba3c: d106 bne.n 800ba4c + 800c67c: 6a7b ldr r3, [r7, #36] ; 0x24 + 800c67e: 2b00 cmp r3, #0 + 800c680: d106 bne.n 800c690 { /* The queue was full and a block time was specified so configure the timeout structure. */ vTaskInternalSetTimeOutState( &xTimeOut ); - 800ba3e: 2314 movs r3, #20 - 800ba40: 18fb adds r3, r7, r3 - 800ba42: 0018 movs r0, r3 - 800ba44: f001 f8da bl 800cbfc + 800c682: 2314 movs r3, #20 + 800c684: 18fb adds r3, r7, r3 + 800c686: 0018 movs r0, r3 + 800c688: f001 f8da bl 800d840 xEntryTimeSet = pdTRUE; - 800ba48: 2301 movs r3, #1 - 800ba4a: 627b str r3, [r7, #36] ; 0x24 + 800c68c: 2301 movs r3, #1 + 800c68e: 627b str r3, [r7, #36] ; 0x24 /* Entry time was already set. */ mtCOVERAGE_TEST_MARKER(); } } } taskEXIT_CRITICAL(); - 800ba4c: f002 f852 bl 800daf4 + 800c690: f002 f850 bl 800e734 /* Interrupts and other tasks can send to and receive from the queue now the critical section has been exited. */ vTaskSuspendAll(); - 800ba50: f000 fe84 bl 800c75c + 800c694: f000 fe84 bl 800d3a0 prvLockQueue( pxQueue ); - 800ba54: f002 f83c bl 800dad0 - 800ba58: 6a3b ldr r3, [r7, #32] - 800ba5a: 2244 movs r2, #68 ; 0x44 - 800ba5c: 5c9b ldrb r3, [r3, r2] - 800ba5e: b25b sxtb r3, r3 - 800ba60: 3301 adds r3, #1 - 800ba62: d103 bne.n 800ba6c - 800ba64: 6a3b ldr r3, [r7, #32] - 800ba66: 2244 movs r2, #68 ; 0x44 - 800ba68: 2100 movs r1, #0 - 800ba6a: 5499 strb r1, [r3, r2] - 800ba6c: 6a3b ldr r3, [r7, #32] - 800ba6e: 2245 movs r2, #69 ; 0x45 - 800ba70: 5c9b ldrb r3, [r3, r2] - 800ba72: b25b sxtb r3, r3 - 800ba74: 3301 adds r3, #1 - 800ba76: d103 bne.n 800ba80 - 800ba78: 6a3b ldr r3, [r7, #32] - 800ba7a: 2245 movs r2, #69 ; 0x45 - 800ba7c: 2100 movs r1, #0 - 800ba7e: 5499 strb r1, [r3, r2] - 800ba80: f002 f838 bl 800daf4 + 800c698: f002 f83a bl 800e710 + 800c69c: 6a3b ldr r3, [r7, #32] + 800c69e: 2244 movs r2, #68 ; 0x44 + 800c6a0: 5c9b ldrb r3, [r3, r2] + 800c6a2: b25b sxtb r3, r3 + 800c6a4: 3301 adds r3, #1 + 800c6a6: d103 bne.n 800c6b0 + 800c6a8: 6a3b ldr r3, [r7, #32] + 800c6aa: 2244 movs r2, #68 ; 0x44 + 800c6ac: 2100 movs r1, #0 + 800c6ae: 5499 strb r1, [r3, r2] + 800c6b0: 6a3b ldr r3, [r7, #32] + 800c6b2: 2245 movs r2, #69 ; 0x45 + 800c6b4: 5c9b ldrb r3, [r3, r2] + 800c6b6: b25b sxtb r3, r3 + 800c6b8: 3301 adds r3, #1 + 800c6ba: d103 bne.n 800c6c4 + 800c6bc: 6a3b ldr r3, [r7, #32] + 800c6be: 2245 movs r2, #69 ; 0x45 + 800c6c0: 2100 movs r1, #0 + 800c6c2: 5499 strb r1, [r3, r2] + 800c6c4: f002 f836 bl 800e734 /* Update the timeout state to see if it has expired yet. */ if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - 800ba84: 1d3a adds r2, r7, #4 - 800ba86: 2314 movs r3, #20 - 800ba88: 18fb adds r3, r7, r3 - 800ba8a: 0011 movs r1, r2 - 800ba8c: 0018 movs r0, r3 - 800ba8e: f001 f8c9 bl 800cc24 - 800ba92: 1e03 subs r3, r0, #0 - 800ba94: d11e bne.n 800bad4 + 800c6c8: 1d3a adds r2, r7, #4 + 800c6ca: 2314 movs r3, #20 + 800c6cc: 18fb adds r3, r7, r3 + 800c6ce: 0011 movs r1, r2 + 800c6d0: 0018 movs r0, r3 + 800c6d2: f001 f8c9 bl 800d868 + 800c6d6: 1e03 subs r3, r0, #0 + 800c6d8: d11e bne.n 800c718 { if( prvIsQueueFull( pxQueue ) != pdFALSE ) - 800ba96: 6a3b ldr r3, [r7, #32] - 800ba98: 0018 movs r0, r3 - 800ba9a: f000 fbcf bl 800c23c - 800ba9e: 1e03 subs r3, r0, #0 - 800baa0: d011 beq.n 800bac6 + 800c6da: 6a3b ldr r3, [r7, #32] + 800c6dc: 0018 movs r0, r3 + 800c6de: f000 fbcf bl 800ce80 + 800c6e2: 1e03 subs r3, r0, #0 + 800c6e4: d011 beq.n 800c70a { traceBLOCKING_ON_QUEUE_SEND( pxQueue ); vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); - 800baa2: 6a3b ldr r3, [r7, #32] - 800baa4: 3310 adds r3, #16 - 800baa6: 687a ldr r2, [r7, #4] - 800baa8: 0011 movs r1, r2 - 800baaa: 0018 movs r0, r3 - 800baac: f001 f806 bl 800cabc + 800c6e6: 6a3b ldr r3, [r7, #32] + 800c6e8: 3310 adds r3, #16 + 800c6ea: 687a ldr r2, [r7, #4] + 800c6ec: 0011 movs r1, r2 + 800c6ee: 0018 movs r0, r3 + 800c6f0: f001 f806 bl 800d700 /* Unlocking the queue means queue events can effect the event list. It is possible that interrupts occurring now remove this task from the event list again - but as the scheduler is suspended the task will go onto the pending ready last instead of the actual ready list. */ prvUnlockQueue( pxQueue ); - 800bab0: 6a3b ldr r3, [r7, #32] - 800bab2: 0018 movs r0, r3 - 800bab4: f000 fb4e bl 800c154 + 800c6f4: 6a3b ldr r3, [r7, #32] + 800c6f6: 0018 movs r0, r3 + 800c6f8: f000 fb4e bl 800cd98 /* Resuming the scheduler will move tasks from the pending ready list into the ready list - so it is feasible that this task is already in a ready list before it yields - in which case the yield will not cause a context switch unless there is also a higher priority task in the pending ready list. */ if( xTaskResumeAll() == pdFALSE ) - 800bab8: f000 fe5c bl 800c774 - 800babc: 1e03 subs r3, r0, #0 - 800babe: d18a bne.n 800b9d6 + 800c6fc: f000 fe5c bl 800d3b8 + 800c700: 1e03 subs r3, r0, #0 + 800c702: d18a bne.n 800c61a { portYIELD_WITHIN_API(); - 800bac0: f001 fff6 bl 800dab0 - 800bac4: e787 b.n 800b9d6 + 800c704: f001 fff4 bl 800e6f0 + 800c708: e787 b.n 800c61a } } else { /* Try again. */ prvUnlockQueue( pxQueue ); - 800bac6: 6a3b ldr r3, [r7, #32] - 800bac8: 0018 movs r0, r3 - 800baca: f000 fb43 bl 800c154 + 800c70a: 6a3b ldr r3, [r7, #32] + 800c70c: 0018 movs r0, r3 + 800c70e: f000 fb43 bl 800cd98 ( void ) xTaskResumeAll(); - 800bace: f000 fe51 bl 800c774 - 800bad2: e780 b.n 800b9d6 + 800c712: f000 fe51 bl 800d3b8 + 800c716: e780 b.n 800c61a } } else { /* The timeout has expired. */ prvUnlockQueue( pxQueue ); - 800bad4: 6a3b ldr r3, [r7, #32] - 800bad6: 0018 movs r0, r3 - 800bad8: f000 fb3c bl 800c154 + 800c718: 6a3b ldr r3, [r7, #32] + 800c71a: 0018 movs r0, r3 + 800c71c: f000 fb3c bl 800cd98 ( void ) xTaskResumeAll(); - 800badc: f000 fe4a bl 800c774 + 800c720: f000 fe4a bl 800d3b8 traceQUEUE_SEND_FAILED( pxQueue ); return errQUEUE_FULL; - 800bae0: 2300 movs r3, #0 + 800c724: 2300 movs r3, #0 } } /*lint -restore */ } - 800bae2: 0018 movs r0, r3 - 800bae4: 46bd mov sp, r7 - 800bae6: b00a add sp, #40 ; 0x28 - 800bae8: bd80 pop {r7, pc} + 800c726: 0018 movs r0, r3 + 800c728: 46bd mov sp, r7 + 800c72a: b00a add sp, #40 ; 0x28 + 800c72c: bd80 pop {r7, pc} -0800baea : +0800c72e : /*-----------------------------------------------------------*/ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) { - 800baea: b590 push {r4, r7, lr} - 800baec: b08b sub sp, #44 ; 0x2c - 800baee: af00 add r7, sp, #0 - 800baf0: 60f8 str r0, [r7, #12] - 800baf2: 60b9 str r1, [r7, #8] - 800baf4: 607a str r2, [r7, #4] - 800baf6: 603b str r3, [r7, #0] + 800c72e: b590 push {r4, r7, lr} + 800c730: b08b sub sp, #44 ; 0x2c + 800c732: af00 add r7, sp, #0 + 800c734: 60f8 str r0, [r7, #12] + 800c736: 60b9 str r1, [r7, #8] + 800c738: 607a str r2, [r7, #4] + 800c73a: 603b str r3, [r7, #0] BaseType_t xReturn; UBaseType_t uxSavedInterruptStatus; Queue_t * const pxQueue = xQueue; - 800baf8: 68fb ldr r3, [r7, #12] - 800bafa: 623b str r3, [r7, #32] + 800c73c: 68fb ldr r3, [r7, #12] + 800c73e: 623b str r3, [r7, #32] configASSERT( pxQueue ); - 800bafc: 6a3b ldr r3, [r7, #32] - 800bafe: 2b00 cmp r3, #0 - 800bb00: d101 bne.n 800bb06 - 800bb02: b672 cpsid i - 800bb04: e7fe b.n 800bb04 + 800c740: 6a3b ldr r3, [r7, #32] + 800c742: 2b00 cmp r3, #0 + 800c744: d101 bne.n 800c74a + 800c746: b672 cpsid i + 800c748: e7fe b.n 800c748 configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); - 800bb06: 68bb ldr r3, [r7, #8] - 800bb08: 2b00 cmp r3, #0 - 800bb0a: d103 bne.n 800bb14 - 800bb0c: 6a3b ldr r3, [r7, #32] - 800bb0e: 6c1b ldr r3, [r3, #64] ; 0x40 - 800bb10: 2b00 cmp r3, #0 - 800bb12: d101 bne.n 800bb18 - 800bb14: 2301 movs r3, #1 - 800bb16: e000 b.n 800bb1a - 800bb18: 2300 movs r3, #0 - 800bb1a: 2b00 cmp r3, #0 - 800bb1c: d101 bne.n 800bb22 - 800bb1e: b672 cpsid i - 800bb20: e7fe b.n 800bb20 + 800c74a: 68bb ldr r3, [r7, #8] + 800c74c: 2b00 cmp r3, #0 + 800c74e: d103 bne.n 800c758 + 800c750: 6a3b ldr r3, [r7, #32] + 800c752: 6c1b ldr r3, [r3, #64] ; 0x40 + 800c754: 2b00 cmp r3, #0 + 800c756: d101 bne.n 800c75c + 800c758: 2301 movs r3, #1 + 800c75a: e000 b.n 800c75e + 800c75c: 2300 movs r3, #0 + 800c75e: 2b00 cmp r3, #0 + 800c760: d101 bne.n 800c766 + 800c762: b672 cpsid i + 800c764: e7fe b.n 800c764 configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) ); - 800bb22: 683b ldr r3, [r7, #0] - 800bb24: 2b02 cmp r3, #2 - 800bb26: d103 bne.n 800bb30 - 800bb28: 6a3b ldr r3, [r7, #32] - 800bb2a: 6bdb ldr r3, [r3, #60] ; 0x3c - 800bb2c: 2b01 cmp r3, #1 - 800bb2e: d101 bne.n 800bb34 - 800bb30: 2301 movs r3, #1 - 800bb32: e000 b.n 800bb36 - 800bb34: 2300 movs r3, #0 - 800bb36: 2b00 cmp r3, #0 - 800bb38: d101 bne.n 800bb3e - 800bb3a: b672 cpsid i - 800bb3c: e7fe b.n 800bb3c + 800c766: 683b ldr r3, [r7, #0] + 800c768: 2b02 cmp r3, #2 + 800c76a: d103 bne.n 800c774 + 800c76c: 6a3b ldr r3, [r7, #32] + 800c76e: 6bdb ldr r3, [r3, #60] ; 0x3c + 800c770: 2b01 cmp r3, #1 + 800c772: d101 bne.n 800c778 + 800c774: 2301 movs r3, #1 + 800c776: e000 b.n 800c77a + 800c778: 2300 movs r3, #0 + 800c77a: 2b00 cmp r3, #0 + 800c77c: d101 bne.n 800c782 + 800c77e: b672 cpsid i + 800c780: e7fe b.n 800c780 /* Similar to xQueueGenericSend, except without blocking if there is no room in the queue. Also don't directly wake a task that was blocked on a queue read, instead return a flag to say whether a context switch is required or not (i.e. has a task with a higher priority than us been woken by this post). */ uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); - 800bb3e: f001 fff1 bl 800db24 - 800bb42: 0003 movs r3, r0 - 800bb44: 61fb str r3, [r7, #28] + 800c782: f001 ffef bl 800e764 + 800c786: 0003 movs r3, r0 + 800c788: 61fb str r3, [r7, #28] { if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) ) - 800bb46: 6a3b ldr r3, [r7, #32] - 800bb48: 6b9a ldr r2, [r3, #56] ; 0x38 - 800bb4a: 6a3b ldr r3, [r7, #32] - 800bb4c: 6bdb ldr r3, [r3, #60] ; 0x3c - 800bb4e: 429a cmp r2, r3 - 800bb50: d302 bcc.n 800bb58 - 800bb52: 683b ldr r3, [r7, #0] - 800bb54: 2b02 cmp r3, #2 - 800bb56: d131 bne.n 800bbbc + 800c78a: 6a3b ldr r3, [r7, #32] + 800c78c: 6b9a ldr r2, [r3, #56] ; 0x38 + 800c78e: 6a3b ldr r3, [r7, #32] + 800c790: 6bdb ldr r3, [r3, #60] ; 0x3c + 800c792: 429a cmp r2, r3 + 800c794: d302 bcc.n 800c79c + 800c796: 683b ldr r3, [r7, #0] + 800c798: 2b02 cmp r3, #2 + 800c79a: d131 bne.n 800c800 { const int8_t cTxLock = pxQueue->cTxLock; - 800bb58: 241b movs r4, #27 - 800bb5a: 193b adds r3, r7, r4 - 800bb5c: 6a3a ldr r2, [r7, #32] - 800bb5e: 2145 movs r1, #69 ; 0x45 - 800bb60: 5c52 ldrb r2, [r2, r1] - 800bb62: 701a strb r2, [r3, #0] + 800c79c: 241b movs r4, #27 + 800c79e: 193b adds r3, r7, r4 + 800c7a0: 6a3a ldr r2, [r7, #32] + 800c7a2: 2145 movs r1, #69 ; 0x45 + 800c7a4: 5c52 ldrb r2, [r2, r1] + 800c7a6: 701a strb r2, [r3, #0] const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting; - 800bb64: 6a3b ldr r3, [r7, #32] - 800bb66: 6b9b ldr r3, [r3, #56] ; 0x38 - 800bb68: 617b str r3, [r7, #20] + 800c7a8: 6a3b ldr r3, [r7, #32] + 800c7aa: 6b9b ldr r3, [r3, #56] ; 0x38 + 800c7ac: 617b str r3, [r7, #20] /* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a semaphore or mutex. That means prvCopyDataToQueue() cannot result in a task disinheriting a priority and prvCopyDataToQueue() can be called here even though the disinherit function does not check if the scheduler is suspended before accessing the ready lists. */ ( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); - 800bb6a: 683a ldr r2, [r7, #0] - 800bb6c: 68b9 ldr r1, [r7, #8] - 800bb6e: 6a3b ldr r3, [r7, #32] - 800bb70: 0018 movs r0, r3 - 800bb72: f000 fa5e bl 800c032 + 800c7ae: 683a ldr r2, [r7, #0] + 800c7b0: 68b9 ldr r1, [r7, #8] + 800c7b2: 6a3b ldr r3, [r7, #32] + 800c7b4: 0018 movs r0, r3 + 800c7b6: f000 fa5e bl 800cc76 /* The event list is not altered if the queue is locked. This will be done when the queue is unlocked later. */ if( cTxLock == queueUNLOCKED ) - 800bb76: 193b adds r3, r7, r4 - 800bb78: 781b ldrb r3, [r3, #0] - 800bb7a: b25b sxtb r3, r3 - 800bb7c: 3301 adds r3, #1 - 800bb7e: d111 bne.n 800bba4 + 800c7ba: 193b adds r3, r7, r4 + 800c7bc: 781b ldrb r3, [r3, #0] + 800c7be: b25b sxtb r3, r3 + 800c7c0: 3301 adds r3, #1 + 800c7c2: d111 bne.n 800c7e8 } } } #else /* configUSE_QUEUE_SETS */ { if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) - 800bb80: 6a3b ldr r3, [r7, #32] - 800bb82: 6a5b ldr r3, [r3, #36] ; 0x24 - 800bb84: 2b00 cmp r3, #0 - 800bb86: d016 beq.n 800bbb6 + 800c7c4: 6a3b ldr r3, [r7, #32] + 800c7c6: 6a5b ldr r3, [r3, #36] ; 0x24 + 800c7c8: 2b00 cmp r3, #0 + 800c7ca: d016 beq.n 800c7fa { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - 800bb88: 6a3b ldr r3, [r7, #32] - 800bb8a: 3324 adds r3, #36 ; 0x24 - 800bb8c: 0018 movs r0, r3 - 800bb8e: f000 ffd9 bl 800cb44 - 800bb92: 1e03 subs r3, r0, #0 - 800bb94: d00f beq.n 800bbb6 + 800c7cc: 6a3b ldr r3, [r7, #32] + 800c7ce: 3324 adds r3, #36 ; 0x24 + 800c7d0: 0018 movs r0, r3 + 800c7d2: f000 ffd9 bl 800d788 + 800c7d6: 1e03 subs r3, r0, #0 + 800c7d8: d00f beq.n 800c7fa { /* The task waiting has a higher priority so record that a context switch is required. */ if( pxHigherPriorityTaskWoken != NULL ) - 800bb96: 687b ldr r3, [r7, #4] - 800bb98: 2b00 cmp r3, #0 - 800bb9a: d00c beq.n 800bbb6 + 800c7da: 687b ldr r3, [r7, #4] + 800c7dc: 2b00 cmp r3, #0 + 800c7de: d00c beq.n 800c7fa { *pxHigherPriorityTaskWoken = pdTRUE; - 800bb9c: 687b ldr r3, [r7, #4] - 800bb9e: 2201 movs r2, #1 - 800bba0: 601a str r2, [r3, #0] - 800bba2: e008 b.n 800bbb6 + 800c7e0: 687b ldr r3, [r7, #4] + 800c7e2: 2201 movs r2, #1 + 800c7e4: 601a str r2, [r3, #0] + 800c7e6: e008 b.n 800c7fa } else { /* Increment the lock count so the task that unlocks the queue knows that data was posted while it was locked. */ pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 ); - 800bba4: 231b movs r3, #27 - 800bba6: 18fb adds r3, r7, r3 - 800bba8: 781b ldrb r3, [r3, #0] - 800bbaa: 3301 adds r3, #1 - 800bbac: b2db uxtb r3, r3 - 800bbae: b259 sxtb r1, r3 - 800bbb0: 6a3b ldr r3, [r7, #32] - 800bbb2: 2245 movs r2, #69 ; 0x45 - 800bbb4: 5499 strb r1, [r3, r2] + 800c7e8: 231b movs r3, #27 + 800c7ea: 18fb adds r3, r7, r3 + 800c7ec: 781b ldrb r3, [r3, #0] + 800c7ee: 3301 adds r3, #1 + 800c7f0: b2db uxtb r3, r3 + 800c7f2: b259 sxtb r1, r3 + 800c7f4: 6a3b ldr r3, [r7, #32] + 800c7f6: 2245 movs r2, #69 ; 0x45 + 800c7f8: 5499 strb r1, [r3, r2] } xReturn = pdPASS; - 800bbb6: 2301 movs r3, #1 - 800bbb8: 627b str r3, [r7, #36] ; 0x24 + 800c7fa: 2301 movs r3, #1 + 800c7fc: 627b str r3, [r7, #36] ; 0x24 { - 800bbba: e001 b.n 800bbc0 + 800c7fe: e001 b.n 800c804 } else { traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ); xReturn = errQUEUE_FULL; - 800bbbc: 2300 movs r3, #0 - 800bbbe: 627b str r3, [r7, #36] ; 0x24 + 800c800: 2300 movs r3, #0 + 800c802: 627b str r3, [r7, #36] ; 0x24 } } portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); - 800bbc0: 69fb ldr r3, [r7, #28] - 800bbc2: 0018 movs r0, r3 - 800bbc4: f001 ffb4 bl 800db30 + 800c804: 69fb ldr r3, [r7, #28] + 800c806: 0018 movs r0, r3 + 800c808: f001 ffb2 bl 800e770 return xReturn; - 800bbc8: 6a7b ldr r3, [r7, #36] ; 0x24 + 800c80c: 6a7b ldr r3, [r7, #36] ; 0x24 } - 800bbca: 0018 movs r0, r3 - 800bbcc: 46bd mov sp, r7 - 800bbce: b00b add sp, #44 ; 0x2c - 800bbd0: bd90 pop {r4, r7, pc} + 800c80e: 0018 movs r0, r3 + 800c810: 46bd mov sp, r7 + 800c812: b00b add sp, #44 ; 0x2c + 800c814: bd90 pop {r4, r7, pc} -0800bbd2 : +0800c816 : return xReturn; } /*-----------------------------------------------------------*/ BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) { - 800bbd2: b580 push {r7, lr} - 800bbd4: b08a sub sp, #40 ; 0x28 - 800bbd6: af00 add r7, sp, #0 - 800bbd8: 60f8 str r0, [r7, #12] - 800bbda: 60b9 str r1, [r7, #8] - 800bbdc: 607a str r2, [r7, #4] + 800c816: b580 push {r7, lr} + 800c818: b08a sub sp, #40 ; 0x28 + 800c81a: af00 add r7, sp, #0 + 800c81c: 60f8 str r0, [r7, #12] + 800c81e: 60b9 str r1, [r7, #8] + 800c820: 607a str r2, [r7, #4] BaseType_t xEntryTimeSet = pdFALSE; - 800bbde: 2300 movs r3, #0 - 800bbe0: 627b str r3, [r7, #36] ; 0x24 + 800c822: 2300 movs r3, #0 + 800c824: 627b str r3, [r7, #36] ; 0x24 TimeOut_t xTimeOut; Queue_t * const pxQueue = xQueue; - 800bbe2: 68fb ldr r3, [r7, #12] - 800bbe4: 623b str r3, [r7, #32] + 800c826: 68fb ldr r3, [r7, #12] + 800c828: 623b str r3, [r7, #32] /* Check the pointer is not NULL. */ configASSERT( ( pxQueue ) ); - 800bbe6: 6a3b ldr r3, [r7, #32] - 800bbe8: 2b00 cmp r3, #0 - 800bbea: d101 bne.n 800bbf0 - 800bbec: b672 cpsid i - 800bbee: e7fe b.n 800bbee + 800c82a: 6a3b ldr r3, [r7, #32] + 800c82c: 2b00 cmp r3, #0 + 800c82e: d101 bne.n 800c834 + 800c830: b672 cpsid i + 800c832: e7fe b.n 800c832 /* The buffer into which data is received can only be NULL if the data size is zero (so no data is copied into the buffer. */ configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) ); - 800bbf0: 68bb ldr r3, [r7, #8] - 800bbf2: 2b00 cmp r3, #0 - 800bbf4: d103 bne.n 800bbfe - 800bbf6: 6a3b ldr r3, [r7, #32] - 800bbf8: 6c1b ldr r3, [r3, #64] ; 0x40 - 800bbfa: 2b00 cmp r3, #0 - 800bbfc: d101 bne.n 800bc02 - 800bbfe: 2301 movs r3, #1 - 800bc00: e000 b.n 800bc04 - 800bc02: 2300 movs r3, #0 - 800bc04: 2b00 cmp r3, #0 - 800bc06: d101 bne.n 800bc0c - 800bc08: b672 cpsid i - 800bc0a: e7fe b.n 800bc0a + 800c834: 68bb ldr r3, [r7, #8] + 800c836: 2b00 cmp r3, #0 + 800c838: d103 bne.n 800c842 + 800c83a: 6a3b ldr r3, [r7, #32] + 800c83c: 6c1b ldr r3, [r3, #64] ; 0x40 + 800c83e: 2b00 cmp r3, #0 + 800c840: d101 bne.n 800c846 + 800c842: 2301 movs r3, #1 + 800c844: e000 b.n 800c848 + 800c846: 2300 movs r3, #0 + 800c848: 2b00 cmp r3, #0 + 800c84a: d101 bne.n 800c850 + 800c84c: b672 cpsid i + 800c84e: e7fe b.n 800c84e /* Cannot block if the scheduler is suspended. */ #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) { configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - 800bc0c: f001 f940 bl 800ce90 - 800bc10: 1e03 subs r3, r0, #0 - 800bc12: d102 bne.n 800bc1a - 800bc14: 687b ldr r3, [r7, #4] - 800bc16: 2b00 cmp r3, #0 - 800bc18: d101 bne.n 800bc1e - 800bc1a: 2301 movs r3, #1 - 800bc1c: e000 b.n 800bc20 - 800bc1e: 2300 movs r3, #0 - 800bc20: 2b00 cmp r3, #0 - 800bc22: d101 bne.n 800bc28 - 800bc24: b672 cpsid i - 800bc26: e7fe b.n 800bc26 + 800c850: f001 f940 bl 800dad4 + 800c854: 1e03 subs r3, r0, #0 + 800c856: d102 bne.n 800c85e + 800c858: 687b ldr r3, [r7, #4] + 800c85a: 2b00 cmp r3, #0 + 800c85c: d101 bne.n 800c862 + 800c85e: 2301 movs r3, #1 + 800c860: e000 b.n 800c864 + 800c862: 2300 movs r3, #0 + 800c864: 2b00 cmp r3, #0 + 800c866: d101 bne.n 800c86c + 800c868: b672 cpsid i + 800c86a: e7fe b.n 800c86a /*lint -save -e904 This function relaxes the coding standard somewhat to allow return statements within the function itself. This is done in the interest of execution time efficiency. */ for( ;; ) { taskENTER_CRITICAL(); - 800bc28: f001 ff52 bl 800dad0 + 800c86c: f001 ff50 bl 800e710 { const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; - 800bc2c: 6a3b ldr r3, [r7, #32] - 800bc2e: 6b9b ldr r3, [r3, #56] ; 0x38 - 800bc30: 61fb str r3, [r7, #28] + 800c870: 6a3b ldr r3, [r7, #32] + 800c872: 6b9b ldr r3, [r3, #56] ; 0x38 + 800c874: 61fb str r3, [r7, #28] /* Is there data in the queue now? To be running the calling task must be the highest priority task wanting to access the queue. */ if( uxMessagesWaiting > ( UBaseType_t ) 0 ) - 800bc32: 69fb ldr r3, [r7, #28] - 800bc34: 2b00 cmp r3, #0 - 800bc36: d01a beq.n 800bc6e + 800c876: 69fb ldr r3, [r7, #28] + 800c878: 2b00 cmp r3, #0 + 800c87a: d01a beq.n 800c8b2 { /* Data available, remove one item. */ prvCopyDataFromQueue( pxQueue, pvBuffer ); - 800bc38: 68ba ldr r2, [r7, #8] - 800bc3a: 6a3b ldr r3, [r7, #32] - 800bc3c: 0011 movs r1, r2 - 800bc3e: 0018 movs r0, r3 - 800bc40: f000 fa62 bl 800c108 + 800c87c: 68ba ldr r2, [r7, #8] + 800c87e: 6a3b ldr r3, [r7, #32] + 800c880: 0011 movs r1, r2 + 800c882: 0018 movs r0, r3 + 800c884: f000 fa62 bl 800cd4c traceQUEUE_RECEIVE( pxQueue ); pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1; - 800bc44: 69fb ldr r3, [r7, #28] - 800bc46: 1e5a subs r2, r3, #1 - 800bc48: 6a3b ldr r3, [r7, #32] - 800bc4a: 639a str r2, [r3, #56] ; 0x38 + 800c888: 69fb ldr r3, [r7, #28] + 800c88a: 1e5a subs r2, r3, #1 + 800c88c: 6a3b ldr r3, [r7, #32] + 800c88e: 639a str r2, [r3, #56] ; 0x38 /* There is now space in the queue, were any tasks waiting to post to the queue? If so, unblock the highest priority waiting task. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) - 800bc4c: 6a3b ldr r3, [r7, #32] - 800bc4e: 691b ldr r3, [r3, #16] - 800bc50: 2b00 cmp r3, #0 - 800bc52: d008 beq.n 800bc66 + 800c890: 6a3b ldr r3, [r7, #32] + 800c892: 691b ldr r3, [r3, #16] + 800c894: 2b00 cmp r3, #0 + 800c896: d008 beq.n 800c8aa { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - 800bc54: 6a3b ldr r3, [r7, #32] - 800bc56: 3310 adds r3, #16 - 800bc58: 0018 movs r0, r3 - 800bc5a: f000 ff73 bl 800cb44 - 800bc5e: 1e03 subs r3, r0, #0 - 800bc60: d001 beq.n 800bc66 + 800c898: 6a3b ldr r3, [r7, #32] + 800c89a: 3310 adds r3, #16 + 800c89c: 0018 movs r0, r3 + 800c89e: f000 ff73 bl 800d788 + 800c8a2: 1e03 subs r3, r0, #0 + 800c8a4: d001 beq.n 800c8aa { queueYIELD_IF_USING_PREEMPTION(); - 800bc62: f001 ff25 bl 800dab0 + 800c8a6: f001 ff23 bl 800e6f0 else { mtCOVERAGE_TEST_MARKER(); } taskEXIT_CRITICAL(); - 800bc66: f001 ff45 bl 800daf4 + 800c8aa: f001 ff43 bl 800e734 return pdPASS; - 800bc6a: 2301 movs r3, #1 - 800bc6c: e062 b.n 800bd34 + 800c8ae: 2301 movs r3, #1 + 800c8b0: e062 b.n 800c978 } else { if( xTicksToWait == ( TickType_t ) 0 ) - 800bc6e: 687b ldr r3, [r7, #4] - 800bc70: 2b00 cmp r3, #0 - 800bc72: d103 bne.n 800bc7c + 800c8b2: 687b ldr r3, [r7, #4] + 800c8b4: 2b00 cmp r3, #0 + 800c8b6: d103 bne.n 800c8c0 { /* The queue was empty and no block time is specified (or the block time has expired) so leave now. */ taskEXIT_CRITICAL(); - 800bc74: f001 ff3e bl 800daf4 + 800c8b8: f001 ff3c bl 800e734 traceQUEUE_RECEIVE_FAILED( pxQueue ); return errQUEUE_EMPTY; - 800bc78: 2300 movs r3, #0 - 800bc7a: e05b b.n 800bd34 + 800c8bc: 2300 movs r3, #0 + 800c8be: e05b b.n 800c978 } else if( xEntryTimeSet == pdFALSE ) - 800bc7c: 6a7b ldr r3, [r7, #36] ; 0x24 - 800bc7e: 2b00 cmp r3, #0 - 800bc80: d106 bne.n 800bc90 + 800c8c0: 6a7b ldr r3, [r7, #36] ; 0x24 + 800c8c2: 2b00 cmp r3, #0 + 800c8c4: d106 bne.n 800c8d4 { /* The queue was empty and a block time was specified so configure the timeout structure. */ vTaskInternalSetTimeOutState( &xTimeOut ); - 800bc82: 2314 movs r3, #20 - 800bc84: 18fb adds r3, r7, r3 - 800bc86: 0018 movs r0, r3 - 800bc88: f000 ffb8 bl 800cbfc + 800c8c6: 2314 movs r3, #20 + 800c8c8: 18fb adds r3, r7, r3 + 800c8ca: 0018 movs r0, r3 + 800c8cc: f000 ffb8 bl 800d840 xEntryTimeSet = pdTRUE; - 800bc8c: 2301 movs r3, #1 - 800bc8e: 627b str r3, [r7, #36] ; 0x24 + 800c8d0: 2301 movs r3, #1 + 800c8d2: 627b str r3, [r7, #36] ; 0x24 /* Entry time was already set. */ mtCOVERAGE_TEST_MARKER(); } } } taskEXIT_CRITICAL(); - 800bc90: f001 ff30 bl 800daf4 + 800c8d4: f001 ff2e bl 800e734 /* Interrupts and other tasks can send to and receive from the queue now the critical section has been exited. */ vTaskSuspendAll(); - 800bc94: f000 fd62 bl 800c75c + 800c8d8: f000 fd62 bl 800d3a0 prvLockQueue( pxQueue ); - 800bc98: f001 ff1a bl 800dad0 - 800bc9c: 6a3b ldr r3, [r7, #32] - 800bc9e: 2244 movs r2, #68 ; 0x44 - 800bca0: 5c9b ldrb r3, [r3, r2] - 800bca2: b25b sxtb r3, r3 - 800bca4: 3301 adds r3, #1 - 800bca6: d103 bne.n 800bcb0 - 800bca8: 6a3b ldr r3, [r7, #32] - 800bcaa: 2244 movs r2, #68 ; 0x44 - 800bcac: 2100 movs r1, #0 - 800bcae: 5499 strb r1, [r3, r2] - 800bcb0: 6a3b ldr r3, [r7, #32] - 800bcb2: 2245 movs r2, #69 ; 0x45 - 800bcb4: 5c9b ldrb r3, [r3, r2] - 800bcb6: b25b sxtb r3, r3 - 800bcb8: 3301 adds r3, #1 - 800bcba: d103 bne.n 800bcc4 - 800bcbc: 6a3b ldr r3, [r7, #32] - 800bcbe: 2245 movs r2, #69 ; 0x45 - 800bcc0: 2100 movs r1, #0 - 800bcc2: 5499 strb r1, [r3, r2] - 800bcc4: f001 ff16 bl 800daf4 + 800c8dc: f001 ff18 bl 800e710 + 800c8e0: 6a3b ldr r3, [r7, #32] + 800c8e2: 2244 movs r2, #68 ; 0x44 + 800c8e4: 5c9b ldrb r3, [r3, r2] + 800c8e6: b25b sxtb r3, r3 + 800c8e8: 3301 adds r3, #1 + 800c8ea: d103 bne.n 800c8f4 + 800c8ec: 6a3b ldr r3, [r7, #32] + 800c8ee: 2244 movs r2, #68 ; 0x44 + 800c8f0: 2100 movs r1, #0 + 800c8f2: 5499 strb r1, [r3, r2] + 800c8f4: 6a3b ldr r3, [r7, #32] + 800c8f6: 2245 movs r2, #69 ; 0x45 + 800c8f8: 5c9b ldrb r3, [r3, r2] + 800c8fa: b25b sxtb r3, r3 + 800c8fc: 3301 adds r3, #1 + 800c8fe: d103 bne.n 800c908 + 800c900: 6a3b ldr r3, [r7, #32] + 800c902: 2245 movs r2, #69 ; 0x45 + 800c904: 2100 movs r1, #0 + 800c906: 5499 strb r1, [r3, r2] + 800c908: f001 ff14 bl 800e734 /* Update the timeout state to see if it has expired yet. */ if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - 800bcc8: 1d3a adds r2, r7, #4 - 800bcca: 2314 movs r3, #20 - 800bccc: 18fb adds r3, r7, r3 - 800bcce: 0011 movs r1, r2 - 800bcd0: 0018 movs r0, r3 - 800bcd2: f000 ffa7 bl 800cc24 - 800bcd6: 1e03 subs r3, r0, #0 - 800bcd8: d11e bne.n 800bd18 + 800c90c: 1d3a adds r2, r7, #4 + 800c90e: 2314 movs r3, #20 + 800c910: 18fb adds r3, r7, r3 + 800c912: 0011 movs r1, r2 + 800c914: 0018 movs r0, r3 + 800c916: f000 ffa7 bl 800d868 + 800c91a: 1e03 subs r3, r0, #0 + 800c91c: d11e bne.n 800c95c { /* The timeout has not expired. If the queue is still empty place the task on the list of tasks waiting to receive from the queue. */ if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) - 800bcda: 6a3b ldr r3, [r7, #32] - 800bcdc: 0018 movs r0, r3 - 800bcde: f000 fa97 bl 800c210 - 800bce2: 1e03 subs r3, r0, #0 - 800bce4: d011 beq.n 800bd0a + 800c91e: 6a3b ldr r3, [r7, #32] + 800c920: 0018 movs r0, r3 + 800c922: f000 fa97 bl 800ce54 + 800c926: 1e03 subs r3, r0, #0 + 800c928: d011 beq.n 800c94e { traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ); vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - 800bce6: 6a3b ldr r3, [r7, #32] - 800bce8: 3324 adds r3, #36 ; 0x24 - 800bcea: 687a ldr r2, [r7, #4] - 800bcec: 0011 movs r1, r2 - 800bcee: 0018 movs r0, r3 - 800bcf0: f000 fee4 bl 800cabc + 800c92a: 6a3b ldr r3, [r7, #32] + 800c92c: 3324 adds r3, #36 ; 0x24 + 800c92e: 687a ldr r2, [r7, #4] + 800c930: 0011 movs r1, r2 + 800c932: 0018 movs r0, r3 + 800c934: f000 fee4 bl 800d700 prvUnlockQueue( pxQueue ); - 800bcf4: 6a3b ldr r3, [r7, #32] - 800bcf6: 0018 movs r0, r3 - 800bcf8: f000 fa2c bl 800c154 + 800c938: 6a3b ldr r3, [r7, #32] + 800c93a: 0018 movs r0, r3 + 800c93c: f000 fa2c bl 800cd98 if( xTaskResumeAll() == pdFALSE ) - 800bcfc: f000 fd3a bl 800c774 - 800bd00: 1e03 subs r3, r0, #0 - 800bd02: d191 bne.n 800bc28 + 800c940: f000 fd3a bl 800d3b8 + 800c944: 1e03 subs r3, r0, #0 + 800c946: d191 bne.n 800c86c { portYIELD_WITHIN_API(); - 800bd04: f001 fed4 bl 800dab0 - 800bd08: e78e b.n 800bc28 + 800c948: f001 fed2 bl 800e6f0 + 800c94c: e78e b.n 800c86c } else { /* The queue contains data again. Loop back to try and read the data. */ prvUnlockQueue( pxQueue ); - 800bd0a: 6a3b ldr r3, [r7, #32] - 800bd0c: 0018 movs r0, r3 - 800bd0e: f000 fa21 bl 800c154 + 800c94e: 6a3b ldr r3, [r7, #32] + 800c950: 0018 movs r0, r3 + 800c952: f000 fa21 bl 800cd98 ( void ) xTaskResumeAll(); - 800bd12: f000 fd2f bl 800c774 - 800bd16: e787 b.n 800bc28 + 800c956: f000 fd2f bl 800d3b8 + 800c95a: e787 b.n 800c86c } else { /* Timed out. If there is no data in the queue exit, otherwise loop back and attempt to read the data. */ prvUnlockQueue( pxQueue ); - 800bd18: 6a3b ldr r3, [r7, #32] - 800bd1a: 0018 movs r0, r3 - 800bd1c: f000 fa1a bl 800c154 + 800c95c: 6a3b ldr r3, [r7, #32] + 800c95e: 0018 movs r0, r3 + 800c960: f000 fa1a bl 800cd98 ( void ) xTaskResumeAll(); - 800bd20: f000 fd28 bl 800c774 + 800c964: f000 fd28 bl 800d3b8 if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) - 800bd24: 6a3b ldr r3, [r7, #32] - 800bd26: 0018 movs r0, r3 - 800bd28: f000 fa72 bl 800c210 - 800bd2c: 1e03 subs r3, r0, #0 - 800bd2e: d100 bne.n 800bd32 - 800bd30: e77a b.n 800bc28 + 800c968: 6a3b ldr r3, [r7, #32] + 800c96a: 0018 movs r0, r3 + 800c96c: f000 fa72 bl 800ce54 + 800c970: 1e03 subs r3, r0, #0 + 800c972: d100 bne.n 800c976 + 800c974: e77a b.n 800c86c { traceQUEUE_RECEIVE_FAILED( pxQueue ); return errQUEUE_EMPTY; - 800bd32: 2300 movs r3, #0 + 800c976: 2300 movs r3, #0 { mtCOVERAGE_TEST_MARKER(); } } } /*lint -restore */ } - 800bd34: 0018 movs r0, r3 - 800bd36: 46bd mov sp, r7 - 800bd38: b00a add sp, #40 ; 0x28 - 800bd3a: bd80 pop {r7, pc} + 800c978: 0018 movs r0, r3 + 800c97a: 46bd mov sp, r7 + 800c97c: b00a add sp, #40 ; 0x28 + 800c97e: bd80 pop {r7, pc} -0800bd3c : +0800c980 : /*-----------------------------------------------------------*/ BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) { - 800bd3c: b580 push {r7, lr} - 800bd3e: b08a sub sp, #40 ; 0x28 - 800bd40: af00 add r7, sp, #0 - 800bd42: 6078 str r0, [r7, #4] - 800bd44: 6039 str r1, [r7, #0] + 800c980: b580 push {r7, lr} + 800c982: b08a sub sp, #40 ; 0x28 + 800c984: af00 add r7, sp, #0 + 800c986: 6078 str r0, [r7, #4] + 800c988: 6039 str r1, [r7, #0] BaseType_t xEntryTimeSet = pdFALSE; - 800bd46: 2300 movs r3, #0 - 800bd48: 627b str r3, [r7, #36] ; 0x24 + 800c98a: 2300 movs r3, #0 + 800c98c: 627b str r3, [r7, #36] ; 0x24 TimeOut_t xTimeOut; Queue_t * const pxQueue = xQueue; - 800bd4a: 687b ldr r3, [r7, #4] - 800bd4c: 61fb str r3, [r7, #28] + 800c98e: 687b ldr r3, [r7, #4] + 800c990: 61fb str r3, [r7, #28] #if( configUSE_MUTEXES == 1 ) BaseType_t xInheritanceOccurred = pdFALSE; - 800bd4e: 2300 movs r3, #0 - 800bd50: 623b str r3, [r7, #32] + 800c992: 2300 movs r3, #0 + 800c994: 623b str r3, [r7, #32] #endif /* Check the queue pointer is not NULL. */ configASSERT( ( pxQueue ) ); - 800bd52: 69fb ldr r3, [r7, #28] - 800bd54: 2b00 cmp r3, #0 - 800bd56: d101 bne.n 800bd5c - 800bd58: b672 cpsid i - 800bd5a: e7fe b.n 800bd5a + 800c996: 69fb ldr r3, [r7, #28] + 800c998: 2b00 cmp r3, #0 + 800c99a: d101 bne.n 800c9a0 + 800c99c: b672 cpsid i + 800c99e: e7fe b.n 800c99e /* Check this really is a semaphore, in which case the item size will be 0. */ configASSERT( pxQueue->uxItemSize == 0 ); - 800bd5c: 69fb ldr r3, [r7, #28] - 800bd5e: 6c1b ldr r3, [r3, #64] ; 0x40 - 800bd60: 2b00 cmp r3, #0 - 800bd62: d001 beq.n 800bd68 - 800bd64: b672 cpsid i - 800bd66: e7fe b.n 800bd66 + 800c9a0: 69fb ldr r3, [r7, #28] + 800c9a2: 6c1b ldr r3, [r3, #64] ; 0x40 + 800c9a4: 2b00 cmp r3, #0 + 800c9a6: d001 beq.n 800c9ac + 800c9a8: b672 cpsid i + 800c9aa: e7fe b.n 800c9aa /* Cannot block if the scheduler is suspended. */ #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) { configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - 800bd68: f001 f892 bl 800ce90 - 800bd6c: 1e03 subs r3, r0, #0 - 800bd6e: d102 bne.n 800bd76 - 800bd70: 683b ldr r3, [r7, #0] - 800bd72: 2b00 cmp r3, #0 - 800bd74: d101 bne.n 800bd7a - 800bd76: 2301 movs r3, #1 - 800bd78: e000 b.n 800bd7c - 800bd7a: 2300 movs r3, #0 - 800bd7c: 2b00 cmp r3, #0 - 800bd7e: d101 bne.n 800bd84 - 800bd80: b672 cpsid i - 800bd82: e7fe b.n 800bd82 + 800c9ac: f001 f892 bl 800dad4 + 800c9b0: 1e03 subs r3, r0, #0 + 800c9b2: d102 bne.n 800c9ba + 800c9b4: 683b ldr r3, [r7, #0] + 800c9b6: 2b00 cmp r3, #0 + 800c9b8: d101 bne.n 800c9be + 800c9ba: 2301 movs r3, #1 + 800c9bc: e000 b.n 800c9c0 + 800c9be: 2300 movs r3, #0 + 800c9c0: 2b00 cmp r3, #0 + 800c9c2: d101 bne.n 800c9c8 + 800c9c4: b672 cpsid i + 800c9c6: e7fe b.n 800c9c6 /*lint -save -e904 This function relaxes the coding standard somewhat to allow return statements within the function itself. This is done in the interest of execution time efficiency. */ for( ;; ) { taskENTER_CRITICAL(); - 800bd84: f001 fea4 bl 800dad0 + 800c9c8: f001 fea2 bl 800e710 { /* Semaphores are queues with an item size of 0, and where the number of messages in the queue is the semaphore's count value. */ const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting; - 800bd88: 69fb ldr r3, [r7, #28] - 800bd8a: 6b9b ldr r3, [r3, #56] ; 0x38 - 800bd8c: 61bb str r3, [r7, #24] + 800c9cc: 69fb ldr r3, [r7, #28] + 800c9ce: 6b9b ldr r3, [r3, #56] ; 0x38 + 800c9d0: 61bb str r3, [r7, #24] /* Is there data in the queue now? To be running the calling task must be the highest priority task wanting to access the queue. */ if( uxSemaphoreCount > ( UBaseType_t ) 0 ) - 800bd8e: 69bb ldr r3, [r7, #24] - 800bd90: 2b00 cmp r3, #0 - 800bd92: d01d beq.n 800bdd0 + 800c9d2: 69bb ldr r3, [r7, #24] + 800c9d4: 2b00 cmp r3, #0 + 800c9d6: d01d beq.n 800ca14 { traceQUEUE_RECEIVE( pxQueue ); /* Semaphores are queues with a data size of zero and where the messages waiting is the semaphore's count. Reduce the count. */ pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1; - 800bd94: 69bb ldr r3, [r7, #24] - 800bd96: 1e5a subs r2, r3, #1 - 800bd98: 69fb ldr r3, [r7, #28] - 800bd9a: 639a str r2, [r3, #56] ; 0x38 + 800c9d8: 69bb ldr r3, [r7, #24] + 800c9da: 1e5a subs r2, r3, #1 + 800c9dc: 69fb ldr r3, [r7, #28] + 800c9de: 639a str r2, [r3, #56] ; 0x38 #if ( configUSE_MUTEXES == 1 ) { if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) - 800bd9c: 69fb ldr r3, [r7, #28] - 800bd9e: 681b ldr r3, [r3, #0] - 800bda0: 2b00 cmp r3, #0 - 800bda2: d104 bne.n 800bdae + 800c9e0: 69fb ldr r3, [r7, #28] + 800c9e2: 681b ldr r3, [r3, #0] + 800c9e4: 2b00 cmp r3, #0 + 800c9e6: d104 bne.n 800c9f2 { /* Record the information required to implement priority inheritance should it become necessary. */ pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount(); - 800bda4: f001 f9c4 bl 800d130 - 800bda8: 0002 movs r2, r0 - 800bdaa: 69fb ldr r3, [r7, #28] - 800bdac: 609a str r2, [r3, #8] + 800c9e8: f001 f9c4 bl 800dd74 + 800c9ec: 0002 movs r2, r0 + 800c9ee: 69fb ldr r3, [r7, #28] + 800c9f0: 609a str r2, [r3, #8] } #endif /* configUSE_MUTEXES */ /* Check to see if other tasks are blocked waiting to give the semaphore, and if so, unblock the highest priority such task. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) - 800bdae: 69fb ldr r3, [r7, #28] - 800bdb0: 691b ldr r3, [r3, #16] - 800bdb2: 2b00 cmp r3, #0 - 800bdb4: d008 beq.n 800bdc8 + 800c9f2: 69fb ldr r3, [r7, #28] + 800c9f4: 691b ldr r3, [r3, #16] + 800c9f6: 2b00 cmp r3, #0 + 800c9f8: d008 beq.n 800ca0c { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - 800bdb6: 69fb ldr r3, [r7, #28] - 800bdb8: 3310 adds r3, #16 - 800bdba: 0018 movs r0, r3 - 800bdbc: f000 fec2 bl 800cb44 - 800bdc0: 1e03 subs r3, r0, #0 - 800bdc2: d001 beq.n 800bdc8 + 800c9fa: 69fb ldr r3, [r7, #28] + 800c9fc: 3310 adds r3, #16 + 800c9fe: 0018 movs r0, r3 + 800ca00: f000 fec2 bl 800d788 + 800ca04: 1e03 subs r3, r0, #0 + 800ca06: d001 beq.n 800ca0c { queueYIELD_IF_USING_PREEMPTION(); - 800bdc4: f001 fe74 bl 800dab0 + 800ca08: f001 fe72 bl 800e6f0 else { mtCOVERAGE_TEST_MARKER(); } taskEXIT_CRITICAL(); - 800bdc8: f001 fe94 bl 800daf4 + 800ca0c: f001 fe92 bl 800e734 return pdPASS; - 800bdcc: 2301 movs r3, #1 - 800bdce: e08b b.n 800bee8 + 800ca10: 2301 movs r3, #1 + 800ca12: e08b b.n 800cb2c } else { if( xTicksToWait == ( TickType_t ) 0 ) - 800bdd0: 683b ldr r3, [r7, #0] - 800bdd2: 2b00 cmp r3, #0 - 800bdd4: d108 bne.n 800bde8 + 800ca14: 683b ldr r3, [r7, #0] + 800ca16: 2b00 cmp r3, #0 + 800ca18: d108 bne.n 800ca2c /* For inheritance to have occurred there must have been an initial timeout, and an adjusted timeout cannot become 0, as if it were 0 the function would have exited. */ #if( configUSE_MUTEXES == 1 ) { configASSERT( xInheritanceOccurred == pdFALSE ); - 800bdd6: 6a3b ldr r3, [r7, #32] - 800bdd8: 2b00 cmp r3, #0 - 800bdda: d001 beq.n 800bde0 - 800bddc: b672 cpsid i - 800bdde: e7fe b.n 800bdde + 800ca1a: 6a3b ldr r3, [r7, #32] + 800ca1c: 2b00 cmp r3, #0 + 800ca1e: d001 beq.n 800ca24 + 800ca20: b672 cpsid i + 800ca22: e7fe b.n 800ca22 } #endif /* configUSE_MUTEXES */ /* The semaphore count was 0 and no block time is specified (or the block time has expired) so exit now. */ taskEXIT_CRITICAL(); - 800bde0: f001 fe88 bl 800daf4 + 800ca24: f001 fe86 bl 800e734 traceQUEUE_RECEIVE_FAILED( pxQueue ); return errQUEUE_EMPTY; - 800bde4: 2300 movs r3, #0 - 800bde6: e07f b.n 800bee8 + 800ca28: 2300 movs r3, #0 + 800ca2a: e07f b.n 800cb2c } else if( xEntryTimeSet == pdFALSE ) - 800bde8: 6a7b ldr r3, [r7, #36] ; 0x24 - 800bdea: 2b00 cmp r3, #0 - 800bdec: d106 bne.n 800bdfc + 800ca2c: 6a7b ldr r3, [r7, #36] ; 0x24 + 800ca2e: 2b00 cmp r3, #0 + 800ca30: d106 bne.n 800ca40 { /* The semaphore count was 0 and a block time was specified so configure the timeout structure ready to block. */ vTaskInternalSetTimeOutState( &xTimeOut ); - 800bdee: 230c movs r3, #12 - 800bdf0: 18fb adds r3, r7, r3 - 800bdf2: 0018 movs r0, r3 - 800bdf4: f000 ff02 bl 800cbfc + 800ca32: 230c movs r3, #12 + 800ca34: 18fb adds r3, r7, r3 + 800ca36: 0018 movs r0, r3 + 800ca38: f000 ff02 bl 800d840 xEntryTimeSet = pdTRUE; - 800bdf8: 2301 movs r3, #1 - 800bdfa: 627b str r3, [r7, #36] ; 0x24 + 800ca3c: 2301 movs r3, #1 + 800ca3e: 627b str r3, [r7, #36] ; 0x24 /* Entry time was already set. */ mtCOVERAGE_TEST_MARKER(); } } } taskEXIT_CRITICAL(); - 800bdfc: f001 fe7a bl 800daf4 + 800ca40: f001 fe78 bl 800e734 /* Interrupts and other tasks can give to and take from the semaphore now the critical section has been exited. */ vTaskSuspendAll(); - 800be00: f000 fcac bl 800c75c + 800ca44: f000 fcac bl 800d3a0 prvLockQueue( pxQueue ); - 800be04: f001 fe64 bl 800dad0 - 800be08: 69fb ldr r3, [r7, #28] - 800be0a: 2244 movs r2, #68 ; 0x44 - 800be0c: 5c9b ldrb r3, [r3, r2] - 800be0e: b25b sxtb r3, r3 - 800be10: 3301 adds r3, #1 - 800be12: d103 bne.n 800be1c - 800be14: 69fb ldr r3, [r7, #28] - 800be16: 2244 movs r2, #68 ; 0x44 - 800be18: 2100 movs r1, #0 - 800be1a: 5499 strb r1, [r3, r2] - 800be1c: 69fb ldr r3, [r7, #28] - 800be1e: 2245 movs r2, #69 ; 0x45 - 800be20: 5c9b ldrb r3, [r3, r2] - 800be22: b25b sxtb r3, r3 - 800be24: 3301 adds r3, #1 - 800be26: d103 bne.n 800be30 - 800be28: 69fb ldr r3, [r7, #28] - 800be2a: 2245 movs r2, #69 ; 0x45 - 800be2c: 2100 movs r1, #0 - 800be2e: 5499 strb r1, [r3, r2] - 800be30: f001 fe60 bl 800daf4 + 800ca48: f001 fe62 bl 800e710 + 800ca4c: 69fb ldr r3, [r7, #28] + 800ca4e: 2244 movs r2, #68 ; 0x44 + 800ca50: 5c9b ldrb r3, [r3, r2] + 800ca52: b25b sxtb r3, r3 + 800ca54: 3301 adds r3, #1 + 800ca56: d103 bne.n 800ca60 + 800ca58: 69fb ldr r3, [r7, #28] + 800ca5a: 2244 movs r2, #68 ; 0x44 + 800ca5c: 2100 movs r1, #0 + 800ca5e: 5499 strb r1, [r3, r2] + 800ca60: 69fb ldr r3, [r7, #28] + 800ca62: 2245 movs r2, #69 ; 0x45 + 800ca64: 5c9b ldrb r3, [r3, r2] + 800ca66: b25b sxtb r3, r3 + 800ca68: 3301 adds r3, #1 + 800ca6a: d103 bne.n 800ca74 + 800ca6c: 69fb ldr r3, [r7, #28] + 800ca6e: 2245 movs r2, #69 ; 0x45 + 800ca70: 2100 movs r1, #0 + 800ca72: 5499 strb r1, [r3, r2] + 800ca74: f001 fe5e bl 800e734 /* Update the timeout state to see if it has expired yet. */ if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) - 800be34: 003a movs r2, r7 - 800be36: 230c movs r3, #12 - 800be38: 18fb adds r3, r7, r3 - 800be3a: 0011 movs r1, r2 - 800be3c: 0018 movs r0, r3 - 800be3e: f000 fef1 bl 800cc24 - 800be42: 1e03 subs r3, r0, #0 - 800be44: d12e bne.n 800bea4 + 800ca78: 003a movs r2, r7 + 800ca7a: 230c movs r3, #12 + 800ca7c: 18fb adds r3, r7, r3 + 800ca7e: 0011 movs r1, r2 + 800ca80: 0018 movs r0, r3 + 800ca82: f000 fef1 bl 800d868 + 800ca86: 1e03 subs r3, r0, #0 + 800ca88: d12e bne.n 800cae8 { /* A block time is specified and not expired. If the semaphore count is 0 then enter the Blocked state to wait for a semaphore to become available. As semaphores are implemented with queues the queue being empty is equivalent to the semaphore count being 0. */ if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) - 800be46: 69fb ldr r3, [r7, #28] - 800be48: 0018 movs r0, r3 - 800be4a: f000 f9e1 bl 800c210 - 800be4e: 1e03 subs r3, r0, #0 - 800be50: d021 beq.n 800be96 + 800ca8a: 69fb ldr r3, [r7, #28] + 800ca8c: 0018 movs r0, r3 + 800ca8e: f000 f9e1 bl 800ce54 + 800ca92: 1e03 subs r3, r0, #0 + 800ca94: d021 beq.n 800cada { traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ); #if ( configUSE_MUTEXES == 1 ) { if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) - 800be52: 69fb ldr r3, [r7, #28] - 800be54: 681b ldr r3, [r3, #0] - 800be56: 2b00 cmp r3, #0 - 800be58: d10a bne.n 800be70 + 800ca96: 69fb ldr r3, [r7, #28] + 800ca98: 681b ldr r3, [r3, #0] + 800ca9a: 2b00 cmp r3, #0 + 800ca9c: d10a bne.n 800cab4 { taskENTER_CRITICAL(); - 800be5a: f001 fe39 bl 800dad0 + 800ca9e: f001 fe37 bl 800e710 { xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder ); - 800be5e: 69fb ldr r3, [r7, #28] - 800be60: 689b ldr r3, [r3, #8] - 800be62: 0018 movs r0, r3 - 800be64: f001 f830 bl 800cec8 - 800be68: 0003 movs r3, r0 - 800be6a: 623b str r3, [r7, #32] + 800caa2: 69fb ldr r3, [r7, #28] + 800caa4: 689b ldr r3, [r3, #8] + 800caa6: 0018 movs r0, r3 + 800caa8: f001 f830 bl 800db0c + 800caac: 0003 movs r3, r0 + 800caae: 623b str r3, [r7, #32] } taskEXIT_CRITICAL(); - 800be6c: f001 fe42 bl 800daf4 + 800cab0: f001 fe40 bl 800e734 mtCOVERAGE_TEST_MARKER(); } } #endif vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); - 800be70: 69fb ldr r3, [r7, #28] - 800be72: 3324 adds r3, #36 ; 0x24 - 800be74: 683a ldr r2, [r7, #0] - 800be76: 0011 movs r1, r2 - 800be78: 0018 movs r0, r3 - 800be7a: f000 fe1f bl 800cabc + 800cab4: 69fb ldr r3, [r7, #28] + 800cab6: 3324 adds r3, #36 ; 0x24 + 800cab8: 683a ldr r2, [r7, #0] + 800caba: 0011 movs r1, r2 + 800cabc: 0018 movs r0, r3 + 800cabe: f000 fe1f bl 800d700 prvUnlockQueue( pxQueue ); - 800be7e: 69fb ldr r3, [r7, #28] - 800be80: 0018 movs r0, r3 - 800be82: f000 f967 bl 800c154 + 800cac2: 69fb ldr r3, [r7, #28] + 800cac4: 0018 movs r0, r3 + 800cac6: f000 f967 bl 800cd98 if( xTaskResumeAll() == pdFALSE ) - 800be86: f000 fc75 bl 800c774 - 800be8a: 1e03 subs r3, r0, #0 - 800be8c: d000 beq.n 800be90 - 800be8e: e779 b.n 800bd84 + 800caca: f000 fc75 bl 800d3b8 + 800cace: 1e03 subs r3, r0, #0 + 800cad0: d000 beq.n 800cad4 + 800cad2: e779 b.n 800c9c8 { portYIELD_WITHIN_API(); - 800be90: f001 fe0e bl 800dab0 - 800be94: e776 b.n 800bd84 + 800cad4: f001 fe0c bl 800e6f0 + 800cad8: e776 b.n 800c9c8 } else { /* There was no timeout and the semaphore count was not 0, so attempt to take the semaphore again. */ prvUnlockQueue( pxQueue ); - 800be96: 69fb ldr r3, [r7, #28] - 800be98: 0018 movs r0, r3 - 800be9a: f000 f95b bl 800c154 + 800cada: 69fb ldr r3, [r7, #28] + 800cadc: 0018 movs r0, r3 + 800cade: f000 f95b bl 800cd98 ( void ) xTaskResumeAll(); - 800be9e: f000 fc69 bl 800c774 - 800bea2: e76f b.n 800bd84 + 800cae2: f000 fc69 bl 800d3b8 + 800cae6: e76f b.n 800c9c8 } } else { /* Timed out. */ prvUnlockQueue( pxQueue ); - 800bea4: 69fb ldr r3, [r7, #28] - 800bea6: 0018 movs r0, r3 - 800bea8: f000 f954 bl 800c154 + 800cae8: 69fb ldr r3, [r7, #28] + 800caea: 0018 movs r0, r3 + 800caec: f000 f954 bl 800cd98 ( void ) xTaskResumeAll(); - 800beac: f000 fc62 bl 800c774 + 800caf0: f000 fc62 bl 800d3b8 /* If the semaphore count is 0 exit now as the timeout has expired. Otherwise return to attempt to take the semaphore that is known to be available. As semaphores are implemented by queues the queue being empty is equivalent to the semaphore count being 0. */ if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) - 800beb0: 69fb ldr r3, [r7, #28] - 800beb2: 0018 movs r0, r3 - 800beb4: f000 f9ac bl 800c210 - 800beb8: 1e03 subs r3, r0, #0 - 800beba: d100 bne.n 800bebe - 800bebc: e762 b.n 800bd84 + 800caf4: 69fb ldr r3, [r7, #28] + 800caf6: 0018 movs r0, r3 + 800caf8: f000 f9ac bl 800ce54 + 800cafc: 1e03 subs r3, r0, #0 + 800cafe: d100 bne.n 800cb02 + 800cb00: e762 b.n 800c9c8 #if ( configUSE_MUTEXES == 1 ) { /* xInheritanceOccurred could only have be set if pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to test the mutex type again to check it is actually a mutex. */ if( xInheritanceOccurred != pdFALSE ) - 800bebe: 6a3b ldr r3, [r7, #32] - 800bec0: 2b00 cmp r3, #0 - 800bec2: d010 beq.n 800bee6 + 800cb02: 6a3b ldr r3, [r7, #32] + 800cb04: 2b00 cmp r3, #0 + 800cb06: d010 beq.n 800cb2a { taskENTER_CRITICAL(); - 800bec4: f001 fe04 bl 800dad0 + 800cb08: f001 fe02 bl 800e710 /* This task blocking on the mutex caused another task to inherit this task's priority. Now this task has timed out the priority should be disinherited again, but only as low as the next highest priority task that is waiting for the same mutex. */ uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue ); - 800bec8: 69fb ldr r3, [r7, #28] - 800beca: 0018 movs r0, r3 - 800becc: f000 f89b bl 800c006 - 800bed0: 0003 movs r3, r0 - 800bed2: 617b str r3, [r7, #20] + 800cb0c: 69fb ldr r3, [r7, #28] + 800cb0e: 0018 movs r0, r3 + 800cb10: f000 f89b bl 800cc4a + 800cb14: 0003 movs r3, r0 + 800cb16: 617b str r3, [r7, #20] vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority ); - 800bed4: 69fb ldr r3, [r7, #28] - 800bed6: 689b ldr r3, [r3, #8] - 800bed8: 697a ldr r2, [r7, #20] - 800beda: 0011 movs r1, r2 - 800bedc: 0018 movs r0, r3 - 800bede: f001 f8b7 bl 800d050 + 800cb18: 69fb ldr r3, [r7, #28] + 800cb1a: 689b ldr r3, [r3, #8] + 800cb1c: 697a ldr r2, [r7, #20] + 800cb1e: 0011 movs r1, r2 + 800cb20: 0018 movs r0, r3 + 800cb22: f001 f8b7 bl 800dc94 } taskEXIT_CRITICAL(); - 800bee2: f001 fe07 bl 800daf4 + 800cb26: f001 fe05 bl 800e734 } } #endif /* configUSE_MUTEXES */ traceQUEUE_RECEIVE_FAILED( pxQueue ); return errQUEUE_EMPTY; - 800bee6: 2300 movs r3, #0 + 800cb2a: 2300 movs r3, #0 { mtCOVERAGE_TEST_MARKER(); } } } /*lint -restore */ } - 800bee8: 0018 movs r0, r3 - 800beea: 46bd mov sp, r7 - 800beec: b00a add sp, #40 ; 0x28 - 800beee: bd80 pop {r7, pc} + 800cb2c: 0018 movs r0, r3 + 800cb2e: 46bd mov sp, r7 + 800cb30: b00a add sp, #40 ; 0x28 + 800cb32: bd80 pop {r7, pc} -0800bef0 : +0800cb34 : } /*lint -restore */ } /*-----------------------------------------------------------*/ BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) { - 800bef0: b590 push {r4, r7, lr} - 800bef2: b08b sub sp, #44 ; 0x2c - 800bef4: af00 add r7, sp, #0 - 800bef6: 60f8 str r0, [r7, #12] - 800bef8: 60b9 str r1, [r7, #8] - 800befa: 607a str r2, [r7, #4] + 800cb34: b590 push {r4, r7, lr} + 800cb36: b08b sub sp, #44 ; 0x2c + 800cb38: af00 add r7, sp, #0 + 800cb3a: 60f8 str r0, [r7, #12] + 800cb3c: 60b9 str r1, [r7, #8] + 800cb3e: 607a str r2, [r7, #4] BaseType_t xReturn; UBaseType_t uxSavedInterruptStatus; Queue_t * const pxQueue = xQueue; - 800befc: 68fb ldr r3, [r7, #12] - 800befe: 623b str r3, [r7, #32] + 800cb40: 68fb ldr r3, [r7, #12] + 800cb42: 623b str r3, [r7, #32] configASSERT( pxQueue ); - 800bf00: 6a3b ldr r3, [r7, #32] - 800bf02: 2b00 cmp r3, #0 - 800bf04: d101 bne.n 800bf0a - 800bf06: b672 cpsid i - 800bf08: e7fe b.n 800bf08 + 800cb44: 6a3b ldr r3, [r7, #32] + 800cb46: 2b00 cmp r3, #0 + 800cb48: d101 bne.n 800cb4e + 800cb4a: b672 cpsid i + 800cb4c: e7fe b.n 800cb4c configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); - 800bf0a: 68bb ldr r3, [r7, #8] - 800bf0c: 2b00 cmp r3, #0 - 800bf0e: d103 bne.n 800bf18 - 800bf10: 6a3b ldr r3, [r7, #32] - 800bf12: 6c1b ldr r3, [r3, #64] ; 0x40 - 800bf14: 2b00 cmp r3, #0 - 800bf16: d101 bne.n 800bf1c - 800bf18: 2301 movs r3, #1 - 800bf1a: e000 b.n 800bf1e - 800bf1c: 2300 movs r3, #0 - 800bf1e: 2b00 cmp r3, #0 - 800bf20: d101 bne.n 800bf26 - 800bf22: b672 cpsid i - 800bf24: e7fe b.n 800bf24 + 800cb4e: 68bb ldr r3, [r7, #8] + 800cb50: 2b00 cmp r3, #0 + 800cb52: d103 bne.n 800cb5c + 800cb54: 6a3b ldr r3, [r7, #32] + 800cb56: 6c1b ldr r3, [r3, #64] ; 0x40 + 800cb58: 2b00 cmp r3, #0 + 800cb5a: d101 bne.n 800cb60 + 800cb5c: 2301 movs r3, #1 + 800cb5e: e000 b.n 800cb62 + 800cb60: 2300 movs r3, #0 + 800cb62: 2b00 cmp r3, #0 + 800cb64: d101 bne.n 800cb6a + 800cb66: b672 cpsid i + 800cb68: e7fe b.n 800cb68 safe API to ensure interrupt entry is as fast and as simple as possible. More information (albeit Cortex-M specific) is provided on the following link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */ portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); - 800bf26: f001 fdfd bl 800db24 - 800bf2a: 0003 movs r3, r0 - 800bf2c: 61fb str r3, [r7, #28] + 800cb6a: f001 fdfb bl 800e764 + 800cb6e: 0003 movs r3, r0 + 800cb70: 61fb str r3, [r7, #28] { const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; - 800bf2e: 6a3b ldr r3, [r7, #32] - 800bf30: 6b9b ldr r3, [r3, #56] ; 0x38 - 800bf32: 61bb str r3, [r7, #24] + 800cb72: 6a3b ldr r3, [r7, #32] + 800cb74: 6b9b ldr r3, [r3, #56] ; 0x38 + 800cb76: 61bb str r3, [r7, #24] /* Cannot block in an ISR, so check there is data available. */ if( uxMessagesWaiting > ( UBaseType_t ) 0 ) - 800bf34: 69bb ldr r3, [r7, #24] - 800bf36: 2b00 cmp r3, #0 - 800bf38: d032 beq.n 800bfa0 + 800cb78: 69bb ldr r3, [r7, #24] + 800cb7a: 2b00 cmp r3, #0 + 800cb7c: d032 beq.n 800cbe4 { const int8_t cRxLock = pxQueue->cRxLock; - 800bf3a: 2417 movs r4, #23 - 800bf3c: 193b adds r3, r7, r4 - 800bf3e: 6a3a ldr r2, [r7, #32] - 800bf40: 2144 movs r1, #68 ; 0x44 - 800bf42: 5c52 ldrb r2, [r2, r1] - 800bf44: 701a strb r2, [r3, #0] + 800cb7e: 2417 movs r4, #23 + 800cb80: 193b adds r3, r7, r4 + 800cb82: 6a3a ldr r2, [r7, #32] + 800cb84: 2144 movs r1, #68 ; 0x44 + 800cb86: 5c52 ldrb r2, [r2, r1] + 800cb88: 701a strb r2, [r3, #0] traceQUEUE_RECEIVE_FROM_ISR( pxQueue ); prvCopyDataFromQueue( pxQueue, pvBuffer ); - 800bf46: 68ba ldr r2, [r7, #8] - 800bf48: 6a3b ldr r3, [r7, #32] - 800bf4a: 0011 movs r1, r2 - 800bf4c: 0018 movs r0, r3 - 800bf4e: f000 f8db bl 800c108 + 800cb8a: 68ba ldr r2, [r7, #8] + 800cb8c: 6a3b ldr r3, [r7, #32] + 800cb8e: 0011 movs r1, r2 + 800cb90: 0018 movs r0, r3 + 800cb92: f000 f8db bl 800cd4c pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1; - 800bf52: 69bb ldr r3, [r7, #24] - 800bf54: 1e5a subs r2, r3, #1 - 800bf56: 6a3b ldr r3, [r7, #32] - 800bf58: 639a str r2, [r3, #56] ; 0x38 + 800cb96: 69bb ldr r3, [r7, #24] + 800cb98: 1e5a subs r2, r3, #1 + 800cb9a: 6a3b ldr r3, [r7, #32] + 800cb9c: 639a str r2, [r3, #56] ; 0x38 /* If the queue is locked the event list will not be modified. Instead update the lock count so the task that unlocks the queue will know that an ISR has removed data while the queue was locked. */ if( cRxLock == queueUNLOCKED ) - 800bf5a: 193b adds r3, r7, r4 - 800bf5c: 781b ldrb r3, [r3, #0] - 800bf5e: b25b sxtb r3, r3 - 800bf60: 3301 adds r3, #1 - 800bf62: d111 bne.n 800bf88 + 800cb9e: 193b adds r3, r7, r4 + 800cba0: 781b ldrb r3, [r3, #0] + 800cba2: b25b sxtb r3, r3 + 800cba4: 3301 adds r3, #1 + 800cba6: d111 bne.n 800cbcc { if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) - 800bf64: 6a3b ldr r3, [r7, #32] - 800bf66: 691b ldr r3, [r3, #16] - 800bf68: 2b00 cmp r3, #0 - 800bf6a: d016 beq.n 800bf9a + 800cba8: 6a3b ldr r3, [r7, #32] + 800cbaa: 691b ldr r3, [r3, #16] + 800cbac: 2b00 cmp r3, #0 + 800cbae: d016 beq.n 800cbde { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - 800bf6c: 6a3b ldr r3, [r7, #32] - 800bf6e: 3310 adds r3, #16 - 800bf70: 0018 movs r0, r3 - 800bf72: f000 fde7 bl 800cb44 - 800bf76: 1e03 subs r3, r0, #0 - 800bf78: d00f beq.n 800bf9a + 800cbb0: 6a3b ldr r3, [r7, #32] + 800cbb2: 3310 adds r3, #16 + 800cbb4: 0018 movs r0, r3 + 800cbb6: f000 fde7 bl 800d788 + 800cbba: 1e03 subs r3, r0, #0 + 800cbbc: d00f beq.n 800cbde { /* The task waiting has a higher priority than us so force a context switch. */ if( pxHigherPriorityTaskWoken != NULL ) - 800bf7a: 687b ldr r3, [r7, #4] - 800bf7c: 2b00 cmp r3, #0 - 800bf7e: d00c beq.n 800bf9a + 800cbbe: 687b ldr r3, [r7, #4] + 800cbc0: 2b00 cmp r3, #0 + 800cbc2: d00c beq.n 800cbde { *pxHigherPriorityTaskWoken = pdTRUE; - 800bf80: 687b ldr r3, [r7, #4] - 800bf82: 2201 movs r2, #1 - 800bf84: 601a str r2, [r3, #0] - 800bf86: e008 b.n 800bf9a + 800cbc4: 687b ldr r3, [r7, #4] + 800cbc6: 2201 movs r2, #1 + 800cbc8: 601a str r2, [r3, #0] + 800cbca: e008 b.n 800cbde } else { /* Increment the lock count so the task that unlocks the queue knows that data was removed while it was locked. */ pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 ); - 800bf88: 2317 movs r3, #23 - 800bf8a: 18fb adds r3, r7, r3 - 800bf8c: 781b ldrb r3, [r3, #0] - 800bf8e: 3301 adds r3, #1 - 800bf90: b2db uxtb r3, r3 - 800bf92: b259 sxtb r1, r3 - 800bf94: 6a3b ldr r3, [r7, #32] - 800bf96: 2244 movs r2, #68 ; 0x44 - 800bf98: 5499 strb r1, [r3, r2] + 800cbcc: 2317 movs r3, #23 + 800cbce: 18fb adds r3, r7, r3 + 800cbd0: 781b ldrb r3, [r3, #0] + 800cbd2: 3301 adds r3, #1 + 800cbd4: b2db uxtb r3, r3 + 800cbd6: b259 sxtb r1, r3 + 800cbd8: 6a3b ldr r3, [r7, #32] + 800cbda: 2244 movs r2, #68 ; 0x44 + 800cbdc: 5499 strb r1, [r3, r2] } xReturn = pdPASS; - 800bf9a: 2301 movs r3, #1 - 800bf9c: 627b str r3, [r7, #36] ; 0x24 - 800bf9e: e001 b.n 800bfa4 + 800cbde: 2301 movs r3, #1 + 800cbe0: 627b str r3, [r7, #36] ; 0x24 + 800cbe2: e001 b.n 800cbe8 } else { xReturn = pdFAIL; - 800bfa0: 2300 movs r3, #0 - 800bfa2: 627b str r3, [r7, #36] ; 0x24 + 800cbe4: 2300 movs r3, #0 + 800cbe6: 627b str r3, [r7, #36] ; 0x24 traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ); } } portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); - 800bfa4: 69fb ldr r3, [r7, #28] - 800bfa6: 0018 movs r0, r3 - 800bfa8: f001 fdc2 bl 800db30 + 800cbe8: 69fb ldr r3, [r7, #28] + 800cbea: 0018 movs r0, r3 + 800cbec: f001 fdc0 bl 800e770 return xReturn; - 800bfac: 6a7b ldr r3, [r7, #36] ; 0x24 + 800cbf0: 6a7b ldr r3, [r7, #36] ; 0x24 } - 800bfae: 0018 movs r0, r3 - 800bfb0: 46bd mov sp, r7 - 800bfb2: b00b add sp, #44 ; 0x2c - 800bfb4: bd90 pop {r4, r7, pc} + 800cbf2: 0018 movs r0, r3 + 800cbf4: 46bd mov sp, r7 + 800cbf6: b00b add sp, #44 ; 0x2c + 800cbf8: bd90 pop {r4, r7, pc} -0800bfb6 : +0800cbfa : return xReturn; } /*-----------------------------------------------------------*/ UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) { - 800bfb6: b580 push {r7, lr} - 800bfb8: b084 sub sp, #16 - 800bfba: af00 add r7, sp, #0 - 800bfbc: 6078 str r0, [r7, #4] + 800cbfa: b580 push {r7, lr} + 800cbfc: b084 sub sp, #16 + 800cbfe: af00 add r7, sp, #0 + 800cc00: 6078 str r0, [r7, #4] UBaseType_t uxReturn; configASSERT( xQueue ); - 800bfbe: 687b ldr r3, [r7, #4] - 800bfc0: 2b00 cmp r3, #0 - 800bfc2: d101 bne.n 800bfc8 - 800bfc4: b672 cpsid i - 800bfc6: e7fe b.n 800bfc6 + 800cc02: 687b ldr r3, [r7, #4] + 800cc04: 2b00 cmp r3, #0 + 800cc06: d101 bne.n 800cc0c + 800cc08: b672 cpsid i + 800cc0a: e7fe b.n 800cc0a taskENTER_CRITICAL(); - 800bfc8: f001 fd82 bl 800dad0 + 800cc0c: f001 fd80 bl 800e710 { uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting; - 800bfcc: 687b ldr r3, [r7, #4] - 800bfce: 6b9b ldr r3, [r3, #56] ; 0x38 - 800bfd0: 60fb str r3, [r7, #12] + 800cc10: 687b ldr r3, [r7, #4] + 800cc12: 6b9b ldr r3, [r3, #56] ; 0x38 + 800cc14: 60fb str r3, [r7, #12] } taskEXIT_CRITICAL(); - 800bfd2: f001 fd8f bl 800daf4 + 800cc16: f001 fd8d bl 800e734 return uxReturn; - 800bfd6: 68fb ldr r3, [r7, #12] + 800cc1a: 68fb ldr r3, [r7, #12] } /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */ - 800bfd8: 0018 movs r0, r3 - 800bfda: 46bd mov sp, r7 - 800bfdc: b004 add sp, #16 - 800bfde: bd80 pop {r7, pc} + 800cc1c: 0018 movs r0, r3 + 800cc1e: 46bd mov sp, r7 + 800cc20: b004 add sp, #16 + 800cc22: bd80 pop {r7, pc} -0800bfe0 : +0800cc24 : return uxReturn; } /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */ /*-----------------------------------------------------------*/ UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) { - 800bfe0: b580 push {r7, lr} - 800bfe2: b084 sub sp, #16 - 800bfe4: af00 add r7, sp, #0 - 800bfe6: 6078 str r0, [r7, #4] + 800cc24: b580 push {r7, lr} + 800cc26: b084 sub sp, #16 + 800cc28: af00 add r7, sp, #0 + 800cc2a: 6078 str r0, [r7, #4] UBaseType_t uxReturn; Queue_t * const pxQueue = xQueue; - 800bfe8: 687b ldr r3, [r7, #4] - 800bfea: 60fb str r3, [r7, #12] + 800cc2c: 687b ldr r3, [r7, #4] + 800cc2e: 60fb str r3, [r7, #12] configASSERT( pxQueue ); - 800bfec: 68fb ldr r3, [r7, #12] - 800bfee: 2b00 cmp r3, #0 - 800bff0: d101 bne.n 800bff6 - 800bff2: b672 cpsid i - 800bff4: e7fe b.n 800bff4 + 800cc30: 68fb ldr r3, [r7, #12] + 800cc32: 2b00 cmp r3, #0 + 800cc34: d101 bne.n 800cc3a + 800cc36: b672 cpsid i + 800cc38: e7fe b.n 800cc38 uxReturn = pxQueue->uxMessagesWaiting; - 800bff6: 68fb ldr r3, [r7, #12] - 800bff8: 6b9b ldr r3, [r3, #56] ; 0x38 - 800bffa: 60bb str r3, [r7, #8] + 800cc3a: 68fb ldr r3, [r7, #12] + 800cc3c: 6b9b ldr r3, [r3, #56] ; 0x38 + 800cc3e: 60bb str r3, [r7, #8] return uxReturn; - 800bffc: 68bb ldr r3, [r7, #8] + 800cc40: 68bb ldr r3, [r7, #8] } /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */ - 800bffe: 0018 movs r0, r3 - 800c000: 46bd mov sp, r7 - 800c002: b004 add sp, #16 - 800c004: bd80 pop {r7, pc} + 800cc42: 0018 movs r0, r3 + 800cc44: 46bd mov sp, r7 + 800cc46: b004 add sp, #16 + 800cc48: bd80 pop {r7, pc} -0800c006 : +0800cc4a : /*-----------------------------------------------------------*/ #if( configUSE_MUTEXES == 1 ) static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) { - 800c006: b580 push {r7, lr} - 800c008: b084 sub sp, #16 - 800c00a: af00 add r7, sp, #0 - 800c00c: 6078 str r0, [r7, #4] + 800cc4a: b580 push {r7, lr} + 800cc4c: b084 sub sp, #16 + 800cc4e: af00 add r7, sp, #0 + 800cc50: 6078 str r0, [r7, #4] priority, but the waiting task times out, then the holder should disinherit the priority - but only down to the highest priority of any other tasks that are waiting for the same mutex. For this purpose, return the priority of the highest priority task that is waiting for the mutex. */ if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U ) - 800c00e: 687b ldr r3, [r7, #4] - 800c010: 6a5b ldr r3, [r3, #36] ; 0x24 - 800c012: 2b00 cmp r3, #0 - 800c014: d006 beq.n 800c024 + 800cc52: 687b ldr r3, [r7, #4] + 800cc54: 6a5b ldr r3, [r3, #36] ; 0x24 + 800cc56: 2b00 cmp r3, #0 + 800cc58: d006 beq.n 800cc68 { uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) ); - 800c016: 687b ldr r3, [r7, #4] - 800c018: 6b1b ldr r3, [r3, #48] ; 0x30 - 800c01a: 681b ldr r3, [r3, #0] - 800c01c: 2238 movs r2, #56 ; 0x38 - 800c01e: 1ad3 subs r3, r2, r3 - 800c020: 60fb str r3, [r7, #12] - 800c022: e001 b.n 800c028 + 800cc5a: 687b ldr r3, [r7, #4] + 800cc5c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800cc5e: 681b ldr r3, [r3, #0] + 800cc60: 2238 movs r2, #56 ; 0x38 + 800cc62: 1ad3 subs r3, r2, r3 + 800cc64: 60fb str r3, [r7, #12] + 800cc66: e001 b.n 800cc6c } else { uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY; - 800c024: 2300 movs r3, #0 - 800c026: 60fb str r3, [r7, #12] + 800cc68: 2300 movs r3, #0 + 800cc6a: 60fb str r3, [r7, #12] } return uxHighestPriorityOfWaitingTasks; - 800c028: 68fb ldr r3, [r7, #12] + 800cc6c: 68fb ldr r3, [r7, #12] } - 800c02a: 0018 movs r0, r3 - 800c02c: 46bd mov sp, r7 - 800c02e: b004 add sp, #16 - 800c030: bd80 pop {r7, pc} + 800cc6e: 0018 movs r0, r3 + 800cc70: 46bd mov sp, r7 + 800cc72: b004 add sp, #16 + 800cc74: bd80 pop {r7, pc} -0800c032 : +0800cc76 : #endif /* configUSE_MUTEXES */ /*-----------------------------------------------------------*/ static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) { - 800c032: b580 push {r7, lr} - 800c034: b086 sub sp, #24 - 800c036: af00 add r7, sp, #0 - 800c038: 60f8 str r0, [r7, #12] - 800c03a: 60b9 str r1, [r7, #8] - 800c03c: 607a str r2, [r7, #4] + 800cc76: b580 push {r7, lr} + 800cc78: b086 sub sp, #24 + 800cc7a: af00 add r7, sp, #0 + 800cc7c: 60f8 str r0, [r7, #12] + 800cc7e: 60b9 str r1, [r7, #8] + 800cc80: 607a str r2, [r7, #4] BaseType_t xReturn = pdFALSE; - 800c03e: 2300 movs r3, #0 - 800c040: 617b str r3, [r7, #20] + 800cc82: 2300 movs r3, #0 + 800cc84: 617b str r3, [r7, #20] UBaseType_t uxMessagesWaiting; /* This function is called from a critical section. */ uxMessagesWaiting = pxQueue->uxMessagesWaiting; - 800c042: 68fb ldr r3, [r7, #12] - 800c044: 6b9b ldr r3, [r3, #56] ; 0x38 - 800c046: 613b str r3, [r7, #16] + 800cc86: 68fb ldr r3, [r7, #12] + 800cc88: 6b9b ldr r3, [r3, #56] ; 0x38 + 800cc8a: 613b str r3, [r7, #16] if( pxQueue->uxItemSize == ( UBaseType_t ) 0 ) - 800c048: 68fb ldr r3, [r7, #12] - 800c04a: 6c1b ldr r3, [r3, #64] ; 0x40 - 800c04c: 2b00 cmp r3, #0 - 800c04e: d10e bne.n 800c06e + 800cc8c: 68fb ldr r3, [r7, #12] + 800cc8e: 6c1b ldr r3, [r3, #64] ; 0x40 + 800cc90: 2b00 cmp r3, #0 + 800cc92: d10e bne.n 800ccb2 { #if ( configUSE_MUTEXES == 1 ) { if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) - 800c050: 68fb ldr r3, [r7, #12] - 800c052: 681b ldr r3, [r3, #0] - 800c054: 2b00 cmp r3, #0 - 800c056: d14e bne.n 800c0f6 + 800cc94: 68fb ldr r3, [r7, #12] + 800cc96: 681b ldr r3, [r3, #0] + 800cc98: 2b00 cmp r3, #0 + 800cc9a: d14e bne.n 800cd3a { /* The mutex is no longer being held. */ xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder ); - 800c058: 68fb ldr r3, [r7, #12] - 800c05a: 689b ldr r3, [r3, #8] - 800c05c: 0018 movs r0, r3 - 800c05e: f000 ff9b bl 800cf98 - 800c062: 0003 movs r3, r0 - 800c064: 617b str r3, [r7, #20] + 800cc9c: 68fb ldr r3, [r7, #12] + 800cc9e: 689b ldr r3, [r3, #8] + 800cca0: 0018 movs r0, r3 + 800cca2: f000 ff9b bl 800dbdc + 800cca6: 0003 movs r3, r0 + 800cca8: 617b str r3, [r7, #20] pxQueue->u.xSemaphore.xMutexHolder = NULL; - 800c066: 68fb ldr r3, [r7, #12] - 800c068: 2200 movs r2, #0 - 800c06a: 609a str r2, [r3, #8] - 800c06c: e043 b.n 800c0f6 + 800ccaa: 68fb ldr r3, [r7, #12] + 800ccac: 2200 movs r2, #0 + 800ccae: 609a str r2, [r3, #8] + 800ccb0: e043 b.n 800cd3a mtCOVERAGE_TEST_MARKER(); } } #endif /* configUSE_MUTEXES */ } else if( xPosition == queueSEND_TO_BACK ) - 800c06e: 687b ldr r3, [r7, #4] - 800c070: 2b00 cmp r3, #0 - 800c072: d119 bne.n 800c0a8 + 800ccb2: 687b ldr r3, [r7, #4] + 800ccb4: 2b00 cmp r3, #0 + 800ccb6: d119 bne.n 800ccec { ( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */ - 800c074: 68fb ldr r3, [r7, #12] - 800c076: 6858 ldr r0, [r3, #4] - 800c078: 68fb ldr r3, [r7, #12] - 800c07a: 6c1a ldr r2, [r3, #64] ; 0x40 - 800c07c: 68bb ldr r3, [r7, #8] - 800c07e: 0019 movs r1, r3 - 800c080: f001 ff9c bl 800dfbc + 800ccb8: 68fb ldr r3, [r7, #12] + 800ccba: 6858 ldr r0, [r3, #4] + 800ccbc: 68fb ldr r3, [r7, #12] + 800ccbe: 6c1a ldr r2, [r3, #64] ; 0x40 + 800ccc0: 68bb ldr r3, [r7, #8] + 800ccc2: 0019 movs r1, r3 + 800ccc4: f001 ff9a bl 800ebfc pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */ - 800c084: 68fb ldr r3, [r7, #12] - 800c086: 685a ldr r2, [r3, #4] - 800c088: 68fb ldr r3, [r7, #12] - 800c08a: 6c1b ldr r3, [r3, #64] ; 0x40 - 800c08c: 18d2 adds r2, r2, r3 - 800c08e: 68fb ldr r3, [r7, #12] - 800c090: 605a str r2, [r3, #4] + 800ccc8: 68fb ldr r3, [r7, #12] + 800ccca: 685a ldr r2, [r3, #4] + 800cccc: 68fb ldr r3, [r7, #12] + 800ccce: 6c1b ldr r3, [r3, #64] ; 0x40 + 800ccd0: 18d2 adds r2, r2, r3 + 800ccd2: 68fb ldr r3, [r7, #12] + 800ccd4: 605a str r2, [r3, #4] if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */ - 800c092: 68fb ldr r3, [r7, #12] - 800c094: 685a ldr r2, [r3, #4] - 800c096: 68fb ldr r3, [r7, #12] - 800c098: 689b ldr r3, [r3, #8] - 800c09a: 429a cmp r2, r3 - 800c09c: d32b bcc.n 800c0f6 + 800ccd6: 68fb ldr r3, [r7, #12] + 800ccd8: 685a ldr r2, [r3, #4] + 800ccda: 68fb ldr r3, [r7, #12] + 800ccdc: 689b ldr r3, [r3, #8] + 800ccde: 429a cmp r2, r3 + 800cce0: d32b bcc.n 800cd3a { pxQueue->pcWriteTo = pxQueue->pcHead; - 800c09e: 68fb ldr r3, [r7, #12] - 800c0a0: 681a ldr r2, [r3, #0] - 800c0a2: 68fb ldr r3, [r7, #12] - 800c0a4: 605a str r2, [r3, #4] - 800c0a6: e026 b.n 800c0f6 + 800cce2: 68fb ldr r3, [r7, #12] + 800cce4: 681a ldr r2, [r3, #0] + 800cce6: 68fb ldr r3, [r7, #12] + 800cce8: 605a str r2, [r3, #4] + 800ccea: e026 b.n 800cd3a mtCOVERAGE_TEST_MARKER(); } } else { ( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. Assert checks null pointer only used when length is 0. */ - 800c0a8: 68fb ldr r3, [r7, #12] - 800c0aa: 68d8 ldr r0, [r3, #12] - 800c0ac: 68fb ldr r3, [r7, #12] - 800c0ae: 6c1a ldr r2, [r3, #64] ; 0x40 - 800c0b0: 68bb ldr r3, [r7, #8] - 800c0b2: 0019 movs r1, r3 - 800c0b4: f001 ff82 bl 800dfbc + 800ccec: 68fb ldr r3, [r7, #12] + 800ccee: 68d8 ldr r0, [r3, #12] + 800ccf0: 68fb ldr r3, [r7, #12] + 800ccf2: 6c1a ldr r2, [r3, #64] ; 0x40 + 800ccf4: 68bb ldr r3, [r7, #8] + 800ccf6: 0019 movs r1, r3 + 800ccf8: f001 ff80 bl 800ebfc pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize; - 800c0b8: 68fb ldr r3, [r7, #12] - 800c0ba: 68da ldr r2, [r3, #12] - 800c0bc: 68fb ldr r3, [r7, #12] - 800c0be: 6c1b ldr r3, [r3, #64] ; 0x40 - 800c0c0: 425b negs r3, r3 - 800c0c2: 18d2 adds r2, r2, r3 - 800c0c4: 68fb ldr r3, [r7, #12] - 800c0c6: 60da str r2, [r3, #12] + 800ccfc: 68fb ldr r3, [r7, #12] + 800ccfe: 68da ldr r2, [r3, #12] + 800cd00: 68fb ldr r3, [r7, #12] + 800cd02: 6c1b ldr r3, [r3, #64] ; 0x40 + 800cd04: 425b negs r3, r3 + 800cd06: 18d2 adds r2, r2, r3 + 800cd08: 68fb ldr r3, [r7, #12] + 800cd0a: 60da str r2, [r3, #12] if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */ - 800c0c8: 68fb ldr r3, [r7, #12] - 800c0ca: 68da ldr r2, [r3, #12] - 800c0cc: 68fb ldr r3, [r7, #12] - 800c0ce: 681b ldr r3, [r3, #0] - 800c0d0: 429a cmp r2, r3 - 800c0d2: d207 bcs.n 800c0e4 + 800cd0c: 68fb ldr r3, [r7, #12] + 800cd0e: 68da ldr r2, [r3, #12] + 800cd10: 68fb ldr r3, [r7, #12] + 800cd12: 681b ldr r3, [r3, #0] + 800cd14: 429a cmp r2, r3 + 800cd16: d207 bcs.n 800cd28 { pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize ); - 800c0d4: 68fb ldr r3, [r7, #12] - 800c0d6: 689a ldr r2, [r3, #8] - 800c0d8: 68fb ldr r3, [r7, #12] - 800c0da: 6c1b ldr r3, [r3, #64] ; 0x40 - 800c0dc: 425b negs r3, r3 - 800c0de: 18d2 adds r2, r2, r3 - 800c0e0: 68fb ldr r3, [r7, #12] - 800c0e2: 60da str r2, [r3, #12] + 800cd18: 68fb ldr r3, [r7, #12] + 800cd1a: 689a ldr r2, [r3, #8] + 800cd1c: 68fb ldr r3, [r7, #12] + 800cd1e: 6c1b ldr r3, [r3, #64] ; 0x40 + 800cd20: 425b negs r3, r3 + 800cd22: 18d2 adds r2, r2, r3 + 800cd24: 68fb ldr r3, [r7, #12] + 800cd26: 60da str r2, [r3, #12] else { mtCOVERAGE_TEST_MARKER(); } if( xPosition == queueOVERWRITE ) - 800c0e4: 687b ldr r3, [r7, #4] - 800c0e6: 2b02 cmp r3, #2 - 800c0e8: d105 bne.n 800c0f6 + 800cd28: 687b ldr r3, [r7, #4] + 800cd2a: 2b02 cmp r3, #2 + 800cd2c: d105 bne.n 800cd3a { if( uxMessagesWaiting > ( UBaseType_t ) 0 ) - 800c0ea: 693b ldr r3, [r7, #16] - 800c0ec: 2b00 cmp r3, #0 - 800c0ee: d002 beq.n 800c0f6 + 800cd2e: 693b ldr r3, [r7, #16] + 800cd30: 2b00 cmp r3, #0 + 800cd32: d002 beq.n 800cd3a { /* An item is not being added but overwritten, so subtract one from the recorded number of items in the queue so when one is added again below the number of recorded items remains correct. */ --uxMessagesWaiting; - 800c0f0: 693b ldr r3, [r7, #16] - 800c0f2: 3b01 subs r3, #1 - 800c0f4: 613b str r3, [r7, #16] + 800cd34: 693b ldr r3, [r7, #16] + 800cd36: 3b01 subs r3, #1 + 800cd38: 613b str r3, [r7, #16] { mtCOVERAGE_TEST_MARKER(); } } pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1; - 800c0f6: 693b ldr r3, [r7, #16] - 800c0f8: 1c5a adds r2, r3, #1 - 800c0fa: 68fb ldr r3, [r7, #12] - 800c0fc: 639a str r2, [r3, #56] ; 0x38 + 800cd3a: 693b ldr r3, [r7, #16] + 800cd3c: 1c5a adds r2, r3, #1 + 800cd3e: 68fb ldr r3, [r7, #12] + 800cd40: 639a str r2, [r3, #56] ; 0x38 return xReturn; - 800c0fe: 697b ldr r3, [r7, #20] + 800cd42: 697b ldr r3, [r7, #20] } - 800c100: 0018 movs r0, r3 - 800c102: 46bd mov sp, r7 - 800c104: b006 add sp, #24 - 800c106: bd80 pop {r7, pc} + 800cd44: 0018 movs r0, r3 + 800cd46: 46bd mov sp, r7 + 800cd48: b006 add sp, #24 + 800cd4a: bd80 pop {r7, pc} -0800c108 : +0800cd4c : /*-----------------------------------------------------------*/ static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) { - 800c108: b580 push {r7, lr} - 800c10a: b082 sub sp, #8 - 800c10c: af00 add r7, sp, #0 - 800c10e: 6078 str r0, [r7, #4] - 800c110: 6039 str r1, [r7, #0] + 800cd4c: b580 push {r7, lr} + 800cd4e: b082 sub sp, #8 + 800cd50: af00 add r7, sp, #0 + 800cd52: 6078 str r0, [r7, #4] + 800cd54: 6039 str r1, [r7, #0] if( pxQueue->uxItemSize != ( UBaseType_t ) 0 ) - 800c112: 687b ldr r3, [r7, #4] - 800c114: 6c1b ldr r3, [r3, #64] ; 0x40 - 800c116: 2b00 cmp r3, #0 - 800c118: d018 beq.n 800c14c + 800cd56: 687b ldr r3, [r7, #4] + 800cd58: 6c1b ldr r3, [r3, #64] ; 0x40 + 800cd5a: 2b00 cmp r3, #0 + 800cd5c: d018 beq.n 800cd90 { pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */ - 800c11a: 687b ldr r3, [r7, #4] - 800c11c: 68da ldr r2, [r3, #12] - 800c11e: 687b ldr r3, [r7, #4] - 800c120: 6c1b ldr r3, [r3, #64] ; 0x40 - 800c122: 18d2 adds r2, r2, r3 - 800c124: 687b ldr r3, [r7, #4] - 800c126: 60da str r2, [r3, #12] + 800cd5e: 687b ldr r3, [r7, #4] + 800cd60: 68da ldr r2, [r3, #12] + 800cd62: 687b ldr r3, [r7, #4] + 800cd64: 6c1b ldr r3, [r3, #64] ; 0x40 + 800cd66: 18d2 adds r2, r2, r3 + 800cd68: 687b ldr r3, [r7, #4] + 800cd6a: 60da str r2, [r3, #12] if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */ - 800c128: 687b ldr r3, [r7, #4] - 800c12a: 68da ldr r2, [r3, #12] - 800c12c: 687b ldr r3, [r7, #4] - 800c12e: 689b ldr r3, [r3, #8] - 800c130: 429a cmp r2, r3 - 800c132: d303 bcc.n 800c13c + 800cd6c: 687b ldr r3, [r7, #4] + 800cd6e: 68da ldr r2, [r3, #12] + 800cd70: 687b ldr r3, [r7, #4] + 800cd72: 689b ldr r3, [r3, #8] + 800cd74: 429a cmp r2, r3 + 800cd76: d303 bcc.n 800cd80 { pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead; - 800c134: 687b ldr r3, [r7, #4] - 800c136: 681a ldr r2, [r3, #0] - 800c138: 687b ldr r3, [r7, #4] - 800c13a: 60da str r2, [r3, #12] + 800cd78: 687b ldr r3, [r7, #4] + 800cd7a: 681a ldr r2, [r3, #0] + 800cd7c: 687b ldr r3, [r7, #4] + 800cd7e: 60da str r2, [r3, #12] } else { mtCOVERAGE_TEST_MARKER(); } ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports. Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */ - 800c13c: 687b ldr r3, [r7, #4] - 800c13e: 68d9 ldr r1, [r3, #12] - 800c140: 687b ldr r3, [r7, #4] - 800c142: 6c1a ldr r2, [r3, #64] ; 0x40 - 800c144: 683b ldr r3, [r7, #0] - 800c146: 0018 movs r0, r3 - 800c148: f001 ff38 bl 800dfbc + 800cd80: 687b ldr r3, [r7, #4] + 800cd82: 68d9 ldr r1, [r3, #12] + 800cd84: 687b ldr r3, [r7, #4] + 800cd86: 6c1a ldr r2, [r3, #64] ; 0x40 + 800cd88: 683b ldr r3, [r7, #0] + 800cd8a: 0018 movs r0, r3 + 800cd8c: f001 ff36 bl 800ebfc } } - 800c14c: 46c0 nop ; (mov r8, r8) - 800c14e: 46bd mov sp, r7 - 800c150: b002 add sp, #8 - 800c152: bd80 pop {r7, pc} + 800cd90: 46c0 nop ; (mov r8, r8) + 800cd92: 46bd mov sp, r7 + 800cd94: b002 add sp, #8 + 800cd96: bd80 pop {r7, pc} -0800c154 : +0800cd98 : /*-----------------------------------------------------------*/ static void prvUnlockQueue( Queue_t * const pxQueue ) { - 800c154: b580 push {r7, lr} - 800c156: b084 sub sp, #16 - 800c158: af00 add r7, sp, #0 - 800c15a: 6078 str r0, [r7, #4] + 800cd98: b580 push {r7, lr} + 800cd9a: b084 sub sp, #16 + 800cd9c: af00 add r7, sp, #0 + 800cd9e: 6078 str r0, [r7, #4] /* The lock counts contains the number of extra data items placed or removed from the queue while the queue was locked. When a queue is locked items can be added or removed, but the event lists cannot be updated. */ taskENTER_CRITICAL(); - 800c15c: f001 fcb8 bl 800dad0 + 800cda0: f001 fcb6 bl 800e710 { int8_t cTxLock = pxQueue->cTxLock; - 800c160: 230f movs r3, #15 - 800c162: 18fb adds r3, r7, r3 - 800c164: 687a ldr r2, [r7, #4] - 800c166: 2145 movs r1, #69 ; 0x45 - 800c168: 5c52 ldrb r2, [r2, r1] - 800c16a: 701a strb r2, [r3, #0] + 800cda4: 230f movs r3, #15 + 800cda6: 18fb adds r3, r7, r3 + 800cda8: 687a ldr r2, [r7, #4] + 800cdaa: 2145 movs r1, #69 ; 0x45 + 800cdac: 5c52 ldrb r2, [r2, r1] + 800cdae: 701a strb r2, [r3, #0] /* See if data was added to the queue while it was locked. */ while( cTxLock > queueLOCKED_UNMODIFIED ) - 800c16c: e013 b.n 800c196 + 800cdb0: e013 b.n 800cdda } #else /* configUSE_QUEUE_SETS */ { /* Tasks that are removed from the event list will get added to the pending ready list as the scheduler is still suspended. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) - 800c16e: 687b ldr r3, [r7, #4] - 800c170: 6a5b ldr r3, [r3, #36] ; 0x24 - 800c172: 2b00 cmp r3, #0 - 800c174: d016 beq.n 800c1a4 + 800cdb2: 687b ldr r3, [r7, #4] + 800cdb4: 6a5b ldr r3, [r3, #36] ; 0x24 + 800cdb6: 2b00 cmp r3, #0 + 800cdb8: d016 beq.n 800cde8 { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) - 800c176: 687b ldr r3, [r7, #4] - 800c178: 3324 adds r3, #36 ; 0x24 - 800c17a: 0018 movs r0, r3 - 800c17c: f000 fce2 bl 800cb44 - 800c180: 1e03 subs r3, r0, #0 - 800c182: d001 beq.n 800c188 + 800cdba: 687b ldr r3, [r7, #4] + 800cdbc: 3324 adds r3, #36 ; 0x24 + 800cdbe: 0018 movs r0, r3 + 800cdc0: f000 fce2 bl 800d788 + 800cdc4: 1e03 subs r3, r0, #0 + 800cdc6: d001 beq.n 800cdcc { /* The task waiting has a higher priority so record that a context switch is required. */ vTaskMissedYield(); - 800c184: f000 fd9e bl 800ccc4 + 800cdc8: f000 fd9e bl 800d908 break; } } #endif /* configUSE_QUEUE_SETS */ --cTxLock; - 800c188: 210f movs r1, #15 - 800c18a: 187b adds r3, r7, r1 - 800c18c: 781b ldrb r3, [r3, #0] - 800c18e: 3b01 subs r3, #1 - 800c190: b2da uxtb r2, r3 - 800c192: 187b adds r3, r7, r1 - 800c194: 701a strb r2, [r3, #0] + 800cdcc: 210f movs r1, #15 + 800cdce: 187b adds r3, r7, r1 + 800cdd0: 781b ldrb r3, [r3, #0] + 800cdd2: 3b01 subs r3, #1 + 800cdd4: b2da uxtb r2, r3 + 800cdd6: 187b adds r3, r7, r1 + 800cdd8: 701a strb r2, [r3, #0] while( cTxLock > queueLOCKED_UNMODIFIED ) - 800c196: 230f movs r3, #15 - 800c198: 18fb adds r3, r7, r3 - 800c19a: 781b ldrb r3, [r3, #0] - 800c19c: b25b sxtb r3, r3 - 800c19e: 2b00 cmp r3, #0 - 800c1a0: dce5 bgt.n 800c16e - 800c1a2: e000 b.n 800c1a6 + 800cdda: 230f movs r3, #15 + 800cddc: 18fb adds r3, r7, r3 + 800cdde: 781b ldrb r3, [r3, #0] + 800cde0: b25b sxtb r3, r3 + 800cde2: 2b00 cmp r3, #0 + 800cde4: dce5 bgt.n 800cdb2 + 800cde6: e000 b.n 800cdea break; - 800c1a4: 46c0 nop ; (mov r8, r8) + 800cde8: 46c0 nop ; (mov r8, r8) } pxQueue->cTxLock = queueUNLOCKED; - 800c1a6: 687b ldr r3, [r7, #4] - 800c1a8: 2245 movs r2, #69 ; 0x45 - 800c1aa: 21ff movs r1, #255 ; 0xff - 800c1ac: 5499 strb r1, [r3, r2] + 800cdea: 687b ldr r3, [r7, #4] + 800cdec: 2245 movs r2, #69 ; 0x45 + 800cdee: 21ff movs r1, #255 ; 0xff + 800cdf0: 5499 strb r1, [r3, r2] } taskEXIT_CRITICAL(); - 800c1ae: f001 fca1 bl 800daf4 + 800cdf2: f001 fc9f bl 800e734 /* Do the same for the Rx lock. */ taskENTER_CRITICAL(); - 800c1b2: f001 fc8d bl 800dad0 + 800cdf6: f001 fc8b bl 800e710 { int8_t cRxLock = pxQueue->cRxLock; - 800c1b6: 230e movs r3, #14 - 800c1b8: 18fb adds r3, r7, r3 - 800c1ba: 687a ldr r2, [r7, #4] - 800c1bc: 2144 movs r1, #68 ; 0x44 - 800c1be: 5c52 ldrb r2, [r2, r1] - 800c1c0: 701a strb r2, [r3, #0] + 800cdfa: 230e movs r3, #14 + 800cdfc: 18fb adds r3, r7, r3 + 800cdfe: 687a ldr r2, [r7, #4] + 800ce00: 2144 movs r1, #68 ; 0x44 + 800ce02: 5c52 ldrb r2, [r2, r1] + 800ce04: 701a strb r2, [r3, #0] while( cRxLock > queueLOCKED_UNMODIFIED ) - 800c1c2: e013 b.n 800c1ec + 800ce06: e013 b.n 800ce30 { if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) - 800c1c4: 687b ldr r3, [r7, #4] - 800c1c6: 691b ldr r3, [r3, #16] - 800c1c8: 2b00 cmp r3, #0 - 800c1ca: d016 beq.n 800c1fa + 800ce08: 687b ldr r3, [r7, #4] + 800ce0a: 691b ldr r3, [r3, #16] + 800ce0c: 2b00 cmp r3, #0 + 800ce0e: d016 beq.n 800ce3e { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) - 800c1cc: 687b ldr r3, [r7, #4] - 800c1ce: 3310 adds r3, #16 - 800c1d0: 0018 movs r0, r3 - 800c1d2: f000 fcb7 bl 800cb44 - 800c1d6: 1e03 subs r3, r0, #0 - 800c1d8: d001 beq.n 800c1de + 800ce10: 687b ldr r3, [r7, #4] + 800ce12: 3310 adds r3, #16 + 800ce14: 0018 movs r0, r3 + 800ce16: f000 fcb7 bl 800d788 + 800ce1a: 1e03 subs r3, r0, #0 + 800ce1c: d001 beq.n 800ce22 { vTaskMissedYield(); - 800c1da: f000 fd73 bl 800ccc4 + 800ce1e: f000 fd73 bl 800d908 else { mtCOVERAGE_TEST_MARKER(); } --cRxLock; - 800c1de: 210e movs r1, #14 - 800c1e0: 187b adds r3, r7, r1 - 800c1e2: 781b ldrb r3, [r3, #0] - 800c1e4: 3b01 subs r3, #1 - 800c1e6: b2da uxtb r2, r3 - 800c1e8: 187b adds r3, r7, r1 - 800c1ea: 701a strb r2, [r3, #0] + 800ce22: 210e movs r1, #14 + 800ce24: 187b adds r3, r7, r1 + 800ce26: 781b ldrb r3, [r3, #0] + 800ce28: 3b01 subs r3, #1 + 800ce2a: b2da uxtb r2, r3 + 800ce2c: 187b adds r3, r7, r1 + 800ce2e: 701a strb r2, [r3, #0] while( cRxLock > queueLOCKED_UNMODIFIED ) - 800c1ec: 230e movs r3, #14 - 800c1ee: 18fb adds r3, r7, r3 - 800c1f0: 781b ldrb r3, [r3, #0] - 800c1f2: b25b sxtb r3, r3 - 800c1f4: 2b00 cmp r3, #0 - 800c1f6: dce5 bgt.n 800c1c4 - 800c1f8: e000 b.n 800c1fc + 800ce30: 230e movs r3, #14 + 800ce32: 18fb adds r3, r7, r3 + 800ce34: 781b ldrb r3, [r3, #0] + 800ce36: b25b sxtb r3, r3 + 800ce38: 2b00 cmp r3, #0 + 800ce3a: dce5 bgt.n 800ce08 + 800ce3c: e000 b.n 800ce40 } else { break; - 800c1fa: 46c0 nop ; (mov r8, r8) + 800ce3e: 46c0 nop ; (mov r8, r8) } } pxQueue->cRxLock = queueUNLOCKED; - 800c1fc: 687b ldr r3, [r7, #4] - 800c1fe: 2244 movs r2, #68 ; 0x44 - 800c200: 21ff movs r1, #255 ; 0xff - 800c202: 5499 strb r1, [r3, r2] + 800ce40: 687b ldr r3, [r7, #4] + 800ce42: 2244 movs r2, #68 ; 0x44 + 800ce44: 21ff movs r1, #255 ; 0xff + 800ce46: 5499 strb r1, [r3, r2] } taskEXIT_CRITICAL(); - 800c204: f001 fc76 bl 800daf4 + 800ce48: f001 fc74 bl 800e734 } - 800c208: 46c0 nop ; (mov r8, r8) - 800c20a: 46bd mov sp, r7 - 800c20c: b004 add sp, #16 - 800c20e: bd80 pop {r7, pc} + 800ce4c: 46c0 nop ; (mov r8, r8) + 800ce4e: 46bd mov sp, r7 + 800ce50: b004 add sp, #16 + 800ce52: bd80 pop {r7, pc} -0800c210 : +0800ce54 : /*-----------------------------------------------------------*/ static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) { - 800c210: b580 push {r7, lr} - 800c212: b084 sub sp, #16 - 800c214: af00 add r7, sp, #0 - 800c216: 6078 str r0, [r7, #4] + 800ce54: b580 push {r7, lr} + 800ce56: b084 sub sp, #16 + 800ce58: af00 add r7, sp, #0 + 800ce5a: 6078 str r0, [r7, #4] BaseType_t xReturn; taskENTER_CRITICAL(); - 800c218: f001 fc5a bl 800dad0 + 800ce5c: f001 fc58 bl 800e710 { if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 ) - 800c21c: 687b ldr r3, [r7, #4] - 800c21e: 6b9b ldr r3, [r3, #56] ; 0x38 - 800c220: 2b00 cmp r3, #0 - 800c222: d102 bne.n 800c22a + 800ce60: 687b ldr r3, [r7, #4] + 800ce62: 6b9b ldr r3, [r3, #56] ; 0x38 + 800ce64: 2b00 cmp r3, #0 + 800ce66: d102 bne.n 800ce6e { xReturn = pdTRUE; - 800c224: 2301 movs r3, #1 - 800c226: 60fb str r3, [r7, #12] - 800c228: e001 b.n 800c22e + 800ce68: 2301 movs r3, #1 + 800ce6a: 60fb str r3, [r7, #12] + 800ce6c: e001 b.n 800ce72 } else { xReturn = pdFALSE; - 800c22a: 2300 movs r3, #0 - 800c22c: 60fb str r3, [r7, #12] + 800ce6e: 2300 movs r3, #0 + 800ce70: 60fb str r3, [r7, #12] } } taskEXIT_CRITICAL(); - 800c22e: f001 fc61 bl 800daf4 + 800ce72: f001 fc5f bl 800e734 return xReturn; - 800c232: 68fb ldr r3, [r7, #12] + 800ce76: 68fb ldr r3, [r7, #12] } - 800c234: 0018 movs r0, r3 - 800c236: 46bd mov sp, r7 - 800c238: b004 add sp, #16 - 800c23a: bd80 pop {r7, pc} + 800ce78: 0018 movs r0, r3 + 800ce7a: 46bd mov sp, r7 + 800ce7c: b004 add sp, #16 + 800ce7e: bd80 pop {r7, pc} -0800c23c : +0800ce80 : return xReturn; } /*lint !e818 xQueue could not be pointer to const because it is a typedef. */ /*-----------------------------------------------------------*/ static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) { - 800c23c: b580 push {r7, lr} - 800c23e: b084 sub sp, #16 - 800c240: af00 add r7, sp, #0 - 800c242: 6078 str r0, [r7, #4] + 800ce80: b580 push {r7, lr} + 800ce82: b084 sub sp, #16 + 800ce84: af00 add r7, sp, #0 + 800ce86: 6078 str r0, [r7, #4] BaseType_t xReturn; taskENTER_CRITICAL(); - 800c244: f001 fc44 bl 800dad0 + 800ce88: f001 fc42 bl 800e710 { if( pxQueue->uxMessagesWaiting == pxQueue->uxLength ) - 800c248: 687b ldr r3, [r7, #4] - 800c24a: 6b9a ldr r2, [r3, #56] ; 0x38 - 800c24c: 687b ldr r3, [r7, #4] - 800c24e: 6bdb ldr r3, [r3, #60] ; 0x3c - 800c250: 429a cmp r2, r3 - 800c252: d102 bne.n 800c25a + 800ce8c: 687b ldr r3, [r7, #4] + 800ce8e: 6b9a ldr r2, [r3, #56] ; 0x38 + 800ce90: 687b ldr r3, [r7, #4] + 800ce92: 6bdb ldr r3, [r3, #60] ; 0x3c + 800ce94: 429a cmp r2, r3 + 800ce96: d102 bne.n 800ce9e { xReturn = pdTRUE; - 800c254: 2301 movs r3, #1 - 800c256: 60fb str r3, [r7, #12] - 800c258: e001 b.n 800c25e + 800ce98: 2301 movs r3, #1 + 800ce9a: 60fb str r3, [r7, #12] + 800ce9c: e001 b.n 800cea2 } else { xReturn = pdFALSE; - 800c25a: 2300 movs r3, #0 - 800c25c: 60fb str r3, [r7, #12] + 800ce9e: 2300 movs r3, #0 + 800cea0: 60fb str r3, [r7, #12] } } taskEXIT_CRITICAL(); - 800c25e: f001 fc49 bl 800daf4 + 800cea2: f001 fc47 bl 800e734 return xReturn; - 800c262: 68fb ldr r3, [r7, #12] + 800cea6: 68fb ldr r3, [r7, #12] } - 800c264: 0018 movs r0, r3 - 800c266: 46bd mov sp, r7 - 800c268: b004 add sp, #16 - 800c26a: bd80 pop {r7, pc} + 800cea8: 0018 movs r0, r3 + 800ceaa: 46bd mov sp, r7 + 800ceac: b004 add sp, #16 + 800ceae: bd80 pop {r7, pc} -0800c26c : +0800ceb0 : /*-----------------------------------------------------------*/ #if ( configQUEUE_REGISTRY_SIZE > 0 ) void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ { - 800c26c: b580 push {r7, lr} - 800c26e: b084 sub sp, #16 - 800c270: af00 add r7, sp, #0 - 800c272: 6078 str r0, [r7, #4] - 800c274: 6039 str r1, [r7, #0] + 800ceb0: b580 push {r7, lr} + 800ceb2: b084 sub sp, #16 + 800ceb4: af00 add r7, sp, #0 + 800ceb6: 6078 str r0, [r7, #4] + 800ceb8: 6039 str r1, [r7, #0] UBaseType_t ux; /* See if there is an empty space in the registry. A NULL name denotes a free slot. */ for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ ) - 800c276: 2300 movs r3, #0 - 800c278: 60fb str r3, [r7, #12] - 800c27a: e015 b.n 800c2a8 + 800ceba: 2300 movs r3, #0 + 800cebc: 60fb str r3, [r7, #12] + 800cebe: e015 b.n 800ceec { if( xQueueRegistry[ ux ].pcQueueName == NULL ) - 800c27c: 4b0e ldr r3, [pc, #56] ; (800c2b8 ) - 800c27e: 68fa ldr r2, [r7, #12] - 800c280: 00d2 lsls r2, r2, #3 - 800c282: 58d3 ldr r3, [r2, r3] - 800c284: 2b00 cmp r3, #0 - 800c286: d10c bne.n 800c2a2 + 800cec0: 4b0e ldr r3, [pc, #56] ; (800cefc ) + 800cec2: 68fa ldr r2, [r7, #12] + 800cec4: 00d2 lsls r2, r2, #3 + 800cec6: 58d3 ldr r3, [r2, r3] + 800cec8: 2b00 cmp r3, #0 + 800ceca: d10c bne.n 800cee6 { /* Store the information on this queue. */ xQueueRegistry[ ux ].pcQueueName = pcQueueName; - 800c288: 4b0b ldr r3, [pc, #44] ; (800c2b8 ) - 800c28a: 68fa ldr r2, [r7, #12] - 800c28c: 00d2 lsls r2, r2, #3 - 800c28e: 6839 ldr r1, [r7, #0] - 800c290: 50d1 str r1, [r2, r3] + 800cecc: 4b0b ldr r3, [pc, #44] ; (800cefc ) + 800cece: 68fa ldr r2, [r7, #12] + 800ced0: 00d2 lsls r2, r2, #3 + 800ced2: 6839 ldr r1, [r7, #0] + 800ced4: 50d1 str r1, [r2, r3] xQueueRegistry[ ux ].xHandle = xQueue; - 800c292: 4a09 ldr r2, [pc, #36] ; (800c2b8 ) - 800c294: 68fb ldr r3, [r7, #12] - 800c296: 00db lsls r3, r3, #3 - 800c298: 18d3 adds r3, r2, r3 - 800c29a: 3304 adds r3, #4 - 800c29c: 687a ldr r2, [r7, #4] - 800c29e: 601a str r2, [r3, #0] + 800ced6: 4a09 ldr r2, [pc, #36] ; (800cefc ) + 800ced8: 68fb ldr r3, [r7, #12] + 800ceda: 00db lsls r3, r3, #3 + 800cedc: 18d3 adds r3, r2, r3 + 800cede: 3304 adds r3, #4 + 800cee0: 687a ldr r2, [r7, #4] + 800cee2: 601a str r2, [r3, #0] traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName ); break; - 800c2a0: e006 b.n 800c2b0 + 800cee4: e006 b.n 800cef4 for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ ) - 800c2a2: 68fb ldr r3, [r7, #12] - 800c2a4: 3301 adds r3, #1 - 800c2a6: 60fb str r3, [r7, #12] - 800c2a8: 68fb ldr r3, [r7, #12] - 800c2aa: 2b07 cmp r3, #7 - 800c2ac: d9e6 bls.n 800c27c + 800cee6: 68fb ldr r3, [r7, #12] + 800cee8: 3301 adds r3, #1 + 800ceea: 60fb str r3, [r7, #12] + 800ceec: 68fb ldr r3, [r7, #12] + 800ceee: 2b07 cmp r3, #7 + 800cef0: d9e6 bls.n 800cec0 else { mtCOVERAGE_TEST_MARKER(); } } } - 800c2ae: 46c0 nop ; (mov r8, r8) - 800c2b0: 46c0 nop ; (mov r8, r8) - 800c2b2: 46bd mov sp, r7 - 800c2b4: b004 add sp, #16 - 800c2b6: bd80 pop {r7, pc} - 800c2b8: 20000ac4 .word 0x20000ac4 + 800cef2: 46c0 nop ; (mov r8, r8) + 800cef4: 46c0 nop ; (mov r8, r8) + 800cef6: 46bd mov sp, r7 + 800cef8: b004 add sp, #16 + 800cefa: bd80 pop {r7, pc} + 800cefc: 20000ba4 .word 0x20000ba4 -0800c2bc : +0800cf00 : /*-----------------------------------------------------------*/ #if ( configUSE_TIMERS == 1 ) void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) { - 800c2bc: b580 push {r7, lr} - 800c2be: b086 sub sp, #24 - 800c2c0: af00 add r7, sp, #0 - 800c2c2: 60f8 str r0, [r7, #12] - 800c2c4: 60b9 str r1, [r7, #8] - 800c2c6: 607a str r2, [r7, #4] + 800cf00: b580 push {r7, lr} + 800cf02: b086 sub sp, #24 + 800cf04: af00 add r7, sp, #0 + 800cf06: 60f8 str r0, [r7, #12] + 800cf08: 60b9 str r1, [r7, #8] + 800cf0a: 607a str r2, [r7, #4] Queue_t * const pxQueue = xQueue; - 800c2c8: 68fb ldr r3, [r7, #12] - 800c2ca: 617b str r3, [r7, #20] + 800cf0c: 68fb ldr r3, [r7, #12] + 800cf0e: 617b str r3, [r7, #20] will not actually cause the task to block, just place it on a blocked list. It will not block until the scheduler is unlocked - at which time a yield will be performed. If an item is added to the queue while the queue is locked, and the calling task blocks on the queue, then the calling task will be immediately unblocked when the queue is unlocked. */ prvLockQueue( pxQueue ); - 800c2cc: f001 fc00 bl 800dad0 - 800c2d0: 697b ldr r3, [r7, #20] - 800c2d2: 2244 movs r2, #68 ; 0x44 - 800c2d4: 5c9b ldrb r3, [r3, r2] - 800c2d6: b25b sxtb r3, r3 - 800c2d8: 3301 adds r3, #1 - 800c2da: d103 bne.n 800c2e4 - 800c2dc: 697b ldr r3, [r7, #20] - 800c2de: 2244 movs r2, #68 ; 0x44 - 800c2e0: 2100 movs r1, #0 - 800c2e2: 5499 strb r1, [r3, r2] - 800c2e4: 697b ldr r3, [r7, #20] - 800c2e6: 2245 movs r2, #69 ; 0x45 - 800c2e8: 5c9b ldrb r3, [r3, r2] - 800c2ea: b25b sxtb r3, r3 - 800c2ec: 3301 adds r3, #1 - 800c2ee: d103 bne.n 800c2f8 - 800c2f0: 697b ldr r3, [r7, #20] - 800c2f2: 2245 movs r2, #69 ; 0x45 - 800c2f4: 2100 movs r1, #0 - 800c2f6: 5499 strb r1, [r3, r2] - 800c2f8: f001 fbfc bl 800daf4 + 800cf10: f001 fbfe bl 800e710 + 800cf14: 697b ldr r3, [r7, #20] + 800cf16: 2244 movs r2, #68 ; 0x44 + 800cf18: 5c9b ldrb r3, [r3, r2] + 800cf1a: b25b sxtb r3, r3 + 800cf1c: 3301 adds r3, #1 + 800cf1e: d103 bne.n 800cf28 + 800cf20: 697b ldr r3, [r7, #20] + 800cf22: 2244 movs r2, #68 ; 0x44 + 800cf24: 2100 movs r1, #0 + 800cf26: 5499 strb r1, [r3, r2] + 800cf28: 697b ldr r3, [r7, #20] + 800cf2a: 2245 movs r2, #69 ; 0x45 + 800cf2c: 5c9b ldrb r3, [r3, r2] + 800cf2e: b25b sxtb r3, r3 + 800cf30: 3301 adds r3, #1 + 800cf32: d103 bne.n 800cf3c + 800cf34: 697b ldr r3, [r7, #20] + 800cf36: 2245 movs r2, #69 ; 0x45 + 800cf38: 2100 movs r1, #0 + 800cf3a: 5499 strb r1, [r3, r2] + 800cf3c: f001 fbfa bl 800e734 if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U ) - 800c2fc: 697b ldr r3, [r7, #20] - 800c2fe: 6b9b ldr r3, [r3, #56] ; 0x38 - 800c300: 2b00 cmp r3, #0 - 800c302: d106 bne.n 800c312 + 800cf40: 697b ldr r3, [r7, #20] + 800cf42: 6b9b ldr r3, [r3, #56] ; 0x38 + 800cf44: 2b00 cmp r3, #0 + 800cf46: d106 bne.n 800cf56 { /* There is nothing in the queue, block for the specified period. */ vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely ); - 800c304: 697b ldr r3, [r7, #20] - 800c306: 3324 adds r3, #36 ; 0x24 - 800c308: 687a ldr r2, [r7, #4] - 800c30a: 68b9 ldr r1, [r7, #8] - 800c30c: 0018 movs r0, r3 - 800c30e: f000 fbf3 bl 800caf8 + 800cf48: 697b ldr r3, [r7, #20] + 800cf4a: 3324 adds r3, #36 ; 0x24 + 800cf4c: 687a ldr r2, [r7, #4] + 800cf4e: 68b9 ldr r1, [r7, #8] + 800cf50: 0018 movs r0, r3 + 800cf52: f000 fbf3 bl 800d73c } else { mtCOVERAGE_TEST_MARKER(); } prvUnlockQueue( pxQueue ); - 800c312: 697b ldr r3, [r7, #20] - 800c314: 0018 movs r0, r3 - 800c316: f7ff ff1d bl 800c154 + 800cf56: 697b ldr r3, [r7, #20] + 800cf58: 0018 movs r0, r3 + 800cf5a: f7ff ff1d bl 800cd98 } - 800c31a: 46c0 nop ; (mov r8, r8) - 800c31c: 46bd mov sp, r7 - 800c31e: b006 add sp, #24 - 800c320: bd80 pop {r7, pc} + 800cf5e: 46c0 nop ; (mov r8, r8) + 800cf60: 46bd mov sp, r7 + 800cf62: b006 add sp, #24 + 800cf64: bd80 pop {r7, pc} -0800c322 : +0800cf66 : const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) { - 800c322: b590 push {r4, r7, lr} - 800c324: b08d sub sp, #52 ; 0x34 - 800c326: af04 add r7, sp, #16 - 800c328: 60f8 str r0, [r7, #12] - 800c32a: 60b9 str r1, [r7, #8] - 800c32c: 607a str r2, [r7, #4] - 800c32e: 603b str r3, [r7, #0] + 800cf66: b590 push {r4, r7, lr} + 800cf68: b08d sub sp, #52 ; 0x34 + 800cf6a: af04 add r7, sp, #16 + 800cf6c: 60f8 str r0, [r7, #12] + 800cf6e: 60b9 str r1, [r7, #8] + 800cf70: 607a str r2, [r7, #4] + 800cf72: 603b str r3, [r7, #0] TCB_t *pxNewTCB; TaskHandle_t xReturn; configASSERT( puxStackBuffer != NULL ); - 800c330: 6b7b ldr r3, [r7, #52] ; 0x34 - 800c332: 2b00 cmp r3, #0 - 800c334: d101 bne.n 800c33a - 800c336: b672 cpsid i - 800c338: e7fe b.n 800c338 + 800cf74: 6b7b ldr r3, [r7, #52] ; 0x34 + 800cf76: 2b00 cmp r3, #0 + 800cf78: d101 bne.n 800cf7e + 800cf7a: b672 cpsid i + 800cf7c: e7fe b.n 800cf7c configASSERT( pxTaskBuffer != NULL ); - 800c33a: 6bbb ldr r3, [r7, #56] ; 0x38 - 800c33c: 2b00 cmp r3, #0 - 800c33e: d101 bne.n 800c344 - 800c340: b672 cpsid i - 800c342: e7fe b.n 800c342 + 800cf7e: 6bbb ldr r3, [r7, #56] ; 0x38 + 800cf80: 2b00 cmp r3, #0 + 800cf82: d101 bne.n 800cf88 + 800cf84: b672 cpsid i + 800cf86: e7fe b.n 800cf86 #if( configASSERT_DEFINED == 1 ) { /* Sanity check that the size of the structure used to declare a variable of type StaticTask_t equals the size of the real task structure. */ volatile size_t xSize = sizeof( StaticTask_t ); - 800c344: 23bc movs r3, #188 ; 0xbc - 800c346: 617b str r3, [r7, #20] + 800cf88: 23bc movs r3, #188 ; 0xbc + 800cf8a: 617b str r3, [r7, #20] configASSERT( xSize == sizeof( TCB_t ) ); - 800c348: 697b ldr r3, [r7, #20] - 800c34a: 2bbc cmp r3, #188 ; 0xbc - 800c34c: d001 beq.n 800c352 - 800c34e: b672 cpsid i - 800c350: e7fe b.n 800c350 + 800cf8c: 697b ldr r3, [r7, #20] + 800cf8e: 2bbc cmp r3, #188 ; 0xbc + 800cf90: d001 beq.n 800cf96 + 800cf92: b672 cpsid i + 800cf94: e7fe b.n 800cf94 ( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */ - 800c352: 697b ldr r3, [r7, #20] + 800cf96: 697b ldr r3, [r7, #20] } #endif /* configASSERT_DEFINED */ if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) ) - 800c354: 6bbb ldr r3, [r7, #56] ; 0x38 - 800c356: 2b00 cmp r3, #0 - 800c358: d020 beq.n 800c39c - 800c35a: 6b7b ldr r3, [r7, #52] ; 0x34 - 800c35c: 2b00 cmp r3, #0 - 800c35e: d01d beq.n 800c39c + 800cf98: 6bbb ldr r3, [r7, #56] ; 0x38 + 800cf9a: 2b00 cmp r3, #0 + 800cf9c: d020 beq.n 800cfe0 + 800cf9e: 6b7b ldr r3, [r7, #52] ; 0x34 + 800cfa0: 2b00 cmp r3, #0 + 800cfa2: d01d beq.n 800cfe0 { /* The memory used for the task's TCB and stack are passed into this function - use them. */ pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */ - 800c360: 6bbb ldr r3, [r7, #56] ; 0x38 - 800c362: 61fb str r3, [r7, #28] + 800cfa4: 6bbb ldr r3, [r7, #56] ; 0x38 + 800cfa6: 61fb str r3, [r7, #28] pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer; - 800c364: 69fb ldr r3, [r7, #28] - 800c366: 6b7a ldr r2, [r7, #52] ; 0x34 - 800c368: 631a str r2, [r3, #48] ; 0x30 + 800cfa8: 69fb ldr r3, [r7, #28] + 800cfaa: 6b7a ldr r2, [r7, #52] ; 0x34 + 800cfac: 631a str r2, [r3, #48] ; 0x30 #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */ { /* Tasks can be created statically or dynamically, so note this task was created statically in case the task is later deleted. */ pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB; - 800c36a: 69fb ldr r3, [r7, #28] - 800c36c: 22b9 movs r2, #185 ; 0xb9 - 800c36e: 2102 movs r1, #2 - 800c370: 5499 strb r1, [r3, r2] + 800cfae: 69fb ldr r3, [r7, #28] + 800cfb0: 22b9 movs r2, #185 ; 0xb9 + 800cfb2: 2102 movs r1, #2 + 800cfb4: 5499 strb r1, [r3, r2] } #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */ prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL ); - 800c372: 683c ldr r4, [r7, #0] - 800c374: 687a ldr r2, [r7, #4] - 800c376: 68b9 ldr r1, [r7, #8] - 800c378: 68f8 ldr r0, [r7, #12] - 800c37a: 2300 movs r3, #0 - 800c37c: 9303 str r3, [sp, #12] - 800c37e: 69fb ldr r3, [r7, #28] - 800c380: 9302 str r3, [sp, #8] - 800c382: 2318 movs r3, #24 - 800c384: 18fb adds r3, r7, r3 - 800c386: 9301 str r3, [sp, #4] - 800c388: 6b3b ldr r3, [r7, #48] ; 0x30 - 800c38a: 9300 str r3, [sp, #0] - 800c38c: 0023 movs r3, r4 - 800c38e: f000 f859 bl 800c444 + 800cfb6: 683c ldr r4, [r7, #0] + 800cfb8: 687a ldr r2, [r7, #4] + 800cfba: 68b9 ldr r1, [r7, #8] + 800cfbc: 68f8 ldr r0, [r7, #12] + 800cfbe: 2300 movs r3, #0 + 800cfc0: 9303 str r3, [sp, #12] + 800cfc2: 69fb ldr r3, [r7, #28] + 800cfc4: 9302 str r3, [sp, #8] + 800cfc6: 2318 movs r3, #24 + 800cfc8: 18fb adds r3, r7, r3 + 800cfca: 9301 str r3, [sp, #4] + 800cfcc: 6b3b ldr r3, [r7, #48] ; 0x30 + 800cfce: 9300 str r3, [sp, #0] + 800cfd0: 0023 movs r3, r4 + 800cfd2: f000 f859 bl 800d088 prvAddNewTaskToReadyList( pxNewTCB ); - 800c392: 69fb ldr r3, [r7, #28] - 800c394: 0018 movs r0, r3 - 800c396: f000 f8f5 bl 800c584 - 800c39a: e001 b.n 800c3a0 + 800cfd6: 69fb ldr r3, [r7, #28] + 800cfd8: 0018 movs r0, r3 + 800cfda: f000 f8f5 bl 800d1c8 + 800cfde: e001 b.n 800cfe4 } else { xReturn = NULL; - 800c39c: 2300 movs r3, #0 - 800c39e: 61bb str r3, [r7, #24] + 800cfe0: 2300 movs r3, #0 + 800cfe2: 61bb str r3, [r7, #24] } return xReturn; - 800c3a0: 69bb ldr r3, [r7, #24] + 800cfe4: 69bb ldr r3, [r7, #24] } - 800c3a2: 0018 movs r0, r3 - 800c3a4: 46bd mov sp, r7 - 800c3a6: b009 add sp, #36 ; 0x24 - 800c3a8: bd90 pop {r4, r7, pc} + 800cfe6: 0018 movs r0, r3 + 800cfe8: 46bd mov sp, r7 + 800cfea: b009 add sp, #36 ; 0x24 + 800cfec: bd90 pop {r4, r7, pc} -0800c3aa : +0800cfee : const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ const configSTACK_DEPTH_TYPE usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) { - 800c3aa: b590 push {r4, r7, lr} - 800c3ac: b08d sub sp, #52 ; 0x34 - 800c3ae: af04 add r7, sp, #16 - 800c3b0: 60f8 str r0, [r7, #12] - 800c3b2: 60b9 str r1, [r7, #8] - 800c3b4: 603b str r3, [r7, #0] - 800c3b6: 1dbb adds r3, r7, #6 - 800c3b8: 801a strh r2, [r3, #0] + 800cfee: b590 push {r4, r7, lr} + 800cff0: b08d sub sp, #52 ; 0x34 + 800cff2: af04 add r7, sp, #16 + 800cff4: 60f8 str r0, [r7, #12] + 800cff6: 60b9 str r1, [r7, #8] + 800cff8: 603b str r3, [r7, #0] + 800cffa: 1dbb adds r3, r7, #6 + 800cffc: 801a strh r2, [r3, #0] #else /* portSTACK_GROWTH */ { StackType_t *pxStack; /* Allocate space for the stack used by the task being created. */ pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */ - 800c3ba: 1dbb adds r3, r7, #6 - 800c3bc: 881b ldrh r3, [r3, #0] - 800c3be: 009b lsls r3, r3, #2 - 800c3c0: 0018 movs r0, r3 - 800c3c2: f001 fc1d bl 800dc00 - 800c3c6: 0003 movs r3, r0 - 800c3c8: 617b str r3, [r7, #20] + 800cffe: 1dbb adds r3, r7, #6 + 800d000: 881b ldrh r3, [r3, #0] + 800d002: 009b lsls r3, r3, #2 + 800d004: 0018 movs r0, r3 + 800d006: f001 fc1b bl 800e840 + 800d00a: 0003 movs r3, r0 + 800d00c: 617b str r3, [r7, #20] if( pxStack != NULL ) - 800c3ca: 697b ldr r3, [r7, #20] - 800c3cc: 2b00 cmp r3, #0 - 800c3ce: d010 beq.n 800c3f2 + 800d00e: 697b ldr r3, [r7, #20] + 800d010: 2b00 cmp r3, #0 + 800d012: d010 beq.n 800d036 { /* Allocate space for the TCB. */ pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */ - 800c3d0: 20bc movs r0, #188 ; 0xbc - 800c3d2: f001 fc15 bl 800dc00 - 800c3d6: 0003 movs r3, r0 - 800c3d8: 61fb str r3, [r7, #28] + 800d014: 20bc movs r0, #188 ; 0xbc + 800d016: f001 fc13 bl 800e840 + 800d01a: 0003 movs r3, r0 + 800d01c: 61fb str r3, [r7, #28] if( pxNewTCB != NULL ) - 800c3da: 69fb ldr r3, [r7, #28] - 800c3dc: 2b00 cmp r3, #0 - 800c3de: d003 beq.n 800c3e8 + 800d01e: 69fb ldr r3, [r7, #28] + 800d020: 2b00 cmp r3, #0 + 800d022: d003 beq.n 800d02c { /* Store the stack location in the TCB. */ pxNewTCB->pxStack = pxStack; - 800c3e0: 69fb ldr r3, [r7, #28] - 800c3e2: 697a ldr r2, [r7, #20] - 800c3e4: 631a str r2, [r3, #48] ; 0x30 - 800c3e6: e006 b.n 800c3f6 + 800d024: 69fb ldr r3, [r7, #28] + 800d026: 697a ldr r2, [r7, #20] + 800d028: 631a str r2, [r3, #48] ; 0x30 + 800d02a: e006 b.n 800d03a } else { /* The stack cannot be used as the TCB was not created. Free it again. */ vPortFree( pxStack ); - 800c3e8: 697b ldr r3, [r7, #20] - 800c3ea: 0018 movs r0, r3 - 800c3ec: f001 fcb4 bl 800dd58 - 800c3f0: e001 b.n 800c3f6 + 800d02c: 697b ldr r3, [r7, #20] + 800d02e: 0018 movs r0, r3 + 800d030: f001 fcb2 bl 800e998 + 800d034: e001 b.n 800d03a } } else { pxNewTCB = NULL; - 800c3f2: 2300 movs r3, #0 - 800c3f4: 61fb str r3, [r7, #28] + 800d036: 2300 movs r3, #0 + 800d038: 61fb str r3, [r7, #28] } } #endif /* portSTACK_GROWTH */ if( pxNewTCB != NULL ) - 800c3f6: 69fb ldr r3, [r7, #28] - 800c3f8: 2b00 cmp r3, #0 - 800c3fa: d01a beq.n 800c432 + 800d03a: 69fb ldr r3, [r7, #28] + 800d03c: 2b00 cmp r3, #0 + 800d03e: d01a beq.n 800d076 { #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */ { /* Tasks can be created statically or dynamically, so note this task was created dynamically in case it is later deleted. */ pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB; - 800c3fc: 69fb ldr r3, [r7, #28] - 800c3fe: 22b9 movs r2, #185 ; 0xb9 - 800c400: 2100 movs r1, #0 - 800c402: 5499 strb r1, [r3, r2] + 800d040: 69fb ldr r3, [r7, #28] + 800d042: 22b9 movs r2, #185 ; 0xb9 + 800d044: 2100 movs r1, #0 + 800d046: 5499 strb r1, [r3, r2] } #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */ prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL ); - 800c404: 1dbb adds r3, r7, #6 - 800c406: 881a ldrh r2, [r3, #0] - 800c408: 683c ldr r4, [r7, #0] - 800c40a: 68b9 ldr r1, [r7, #8] - 800c40c: 68f8 ldr r0, [r7, #12] - 800c40e: 2300 movs r3, #0 - 800c410: 9303 str r3, [sp, #12] - 800c412: 69fb ldr r3, [r7, #28] - 800c414: 9302 str r3, [sp, #8] - 800c416: 6b7b ldr r3, [r7, #52] ; 0x34 - 800c418: 9301 str r3, [sp, #4] - 800c41a: 6b3b ldr r3, [r7, #48] ; 0x30 - 800c41c: 9300 str r3, [sp, #0] - 800c41e: 0023 movs r3, r4 - 800c420: f000 f810 bl 800c444 + 800d048: 1dbb adds r3, r7, #6 + 800d04a: 881a ldrh r2, [r3, #0] + 800d04c: 683c ldr r4, [r7, #0] + 800d04e: 68b9 ldr r1, [r7, #8] + 800d050: 68f8 ldr r0, [r7, #12] + 800d052: 2300 movs r3, #0 + 800d054: 9303 str r3, [sp, #12] + 800d056: 69fb ldr r3, [r7, #28] + 800d058: 9302 str r3, [sp, #8] + 800d05a: 6b7b ldr r3, [r7, #52] ; 0x34 + 800d05c: 9301 str r3, [sp, #4] + 800d05e: 6b3b ldr r3, [r7, #48] ; 0x30 + 800d060: 9300 str r3, [sp, #0] + 800d062: 0023 movs r3, r4 + 800d064: f000 f810 bl 800d088 prvAddNewTaskToReadyList( pxNewTCB ); - 800c424: 69fb ldr r3, [r7, #28] - 800c426: 0018 movs r0, r3 - 800c428: f000 f8ac bl 800c584 + 800d068: 69fb ldr r3, [r7, #28] + 800d06a: 0018 movs r0, r3 + 800d06c: f000 f8ac bl 800d1c8 xReturn = pdPASS; - 800c42c: 2301 movs r3, #1 - 800c42e: 61bb str r3, [r7, #24] - 800c430: e002 b.n 800c438 + 800d070: 2301 movs r3, #1 + 800d072: 61bb str r3, [r7, #24] + 800d074: e002 b.n 800d07c } else { xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - 800c432: 2301 movs r3, #1 - 800c434: 425b negs r3, r3 - 800c436: 61bb str r3, [r7, #24] + 800d076: 2301 movs r3, #1 + 800d078: 425b negs r3, r3 + 800d07a: 61bb str r3, [r7, #24] } return xReturn; - 800c438: 69bb ldr r3, [r7, #24] + 800d07c: 69bb ldr r3, [r7, #24] } - 800c43a: 0018 movs r0, r3 - 800c43c: 46bd mov sp, r7 - 800c43e: b009 add sp, #36 ; 0x24 - 800c440: bd90 pop {r4, r7, pc} + 800d07e: 0018 movs r0, r3 + 800d080: 46bd mov sp, r7 + 800d082: b009 add sp, #36 ; 0x24 + 800d084: bd90 pop {r4, r7, pc} ... -0800c444 : +0800d088 : void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, TCB_t *pxNewTCB, const MemoryRegion_t * const xRegions ) { - 800c444: b580 push {r7, lr} - 800c446: b086 sub sp, #24 - 800c448: af00 add r7, sp, #0 - 800c44a: 60f8 str r0, [r7, #12] - 800c44c: 60b9 str r1, [r7, #8] - 800c44e: 607a str r2, [r7, #4] - 800c450: 603b str r3, [r7, #0] + 800d088: b580 push {r7, lr} + 800d08a: b086 sub sp, #24 + 800d08c: af00 add r7, sp, #0 + 800d08e: 60f8 str r0, [r7, #12] + 800d090: 60b9 str r1, [r7, #8] + 800d092: 607a str r2, [r7, #4] + 800d094: 603b str r3, [r7, #0] /* Avoid dependency on memset() if it is not required. */ #if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 ) { /* Fill the stack with a known value to assist debugging. */ ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) ); - 800c452: 6abb ldr r3, [r7, #40] ; 0x28 - 800c454: 6b18 ldr r0, [r3, #48] ; 0x30 - 800c456: 687b ldr r3, [r7, #4] - 800c458: 009b lsls r3, r3, #2 - 800c45a: 001a movs r2, r3 - 800c45c: 21a5 movs r1, #165 ; 0xa5 - 800c45e: f001 fdb6 bl 800dfce + 800d096: 6abb ldr r3, [r7, #40] ; 0x28 + 800d098: 6b18 ldr r0, [r3, #48] ; 0x30 + 800d09a: 687b ldr r3, [r7, #4] + 800d09c: 009b lsls r3, r3, #2 + 800d09e: 001a movs r2, r3 + 800d0a0: 21a5 movs r1, #165 ; 0xa5 + 800d0a2: f001 fdb4 bl 800ec0e grows from high memory to low (as per the 80x86) or vice versa. portSTACK_GROWTH is used to make the result positive or negative as required by the port. */ #if( portSTACK_GROWTH < 0 ) { pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] ); - 800c462: 6abb ldr r3, [r7, #40] ; 0x28 - 800c464: 6b1a ldr r2, [r3, #48] ; 0x30 - 800c466: 687b ldr r3, [r7, #4] - 800c468: 4942 ldr r1, [pc, #264] ; (800c574 ) - 800c46a: 468c mov ip, r1 - 800c46c: 4463 add r3, ip - 800c46e: 009b lsls r3, r3, #2 - 800c470: 18d3 adds r3, r2, r3 - 800c472: 613b str r3, [r7, #16] + 800d0a6: 6abb ldr r3, [r7, #40] ; 0x28 + 800d0a8: 6b1a ldr r2, [r3, #48] ; 0x30 + 800d0aa: 687b ldr r3, [r7, #4] + 800d0ac: 4942 ldr r1, [pc, #264] ; (800d1b8 ) + 800d0ae: 468c mov ip, r1 + 800d0b0: 4463 add r3, ip + 800d0b2: 009b lsls r3, r3, #2 + 800d0b4: 18d3 adds r3, r2, r3 + 800d0b6: 613b str r3, [r7, #16] pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */ - 800c474: 693b ldr r3, [r7, #16] - 800c476: 2207 movs r2, #7 - 800c478: 4393 bics r3, r2 - 800c47a: 613b str r3, [r7, #16] + 800d0b8: 693b ldr r3, [r7, #16] + 800d0ba: 2207 movs r2, #7 + 800d0bc: 4393 bics r3, r2 + 800d0be: 613b str r3, [r7, #16] /* Check the alignment of the calculated top of stack is correct. */ configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) ); - 800c47c: 693b ldr r3, [r7, #16] - 800c47e: 2207 movs r2, #7 - 800c480: 4013 ands r3, r2 - 800c482: d001 beq.n 800c488 - 800c484: b672 cpsid i - 800c486: e7fe b.n 800c486 + 800d0c0: 693b ldr r3, [r7, #16] + 800d0c2: 2207 movs r2, #7 + 800d0c4: 4013 ands r3, r2 + 800d0c6: d001 beq.n 800d0cc + 800d0c8: b672 cpsid i + 800d0ca: e7fe b.n 800d0ca pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 ); } #endif /* portSTACK_GROWTH */ /* Store the task name in the TCB. */ if( pcName != NULL ) - 800c488: 68bb ldr r3, [r7, #8] - 800c48a: 2b00 cmp r3, #0 - 800c48c: d020 beq.n 800c4d0 + 800d0cc: 68bb ldr r3, [r7, #8] + 800d0ce: 2b00 cmp r3, #0 + 800d0d0: d020 beq.n 800d114 { for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ ) - 800c48e: 2300 movs r3, #0 - 800c490: 617b str r3, [r7, #20] - 800c492: e013 b.n 800c4bc + 800d0d2: 2300 movs r3, #0 + 800d0d4: 617b str r3, [r7, #20] + 800d0d6: e013 b.n 800d100 { pxNewTCB->pcTaskName[ x ] = pcName[ x ]; - 800c494: 68ba ldr r2, [r7, #8] - 800c496: 697b ldr r3, [r7, #20] - 800c498: 18d3 adds r3, r2, r3 - 800c49a: 7818 ldrb r0, [r3, #0] - 800c49c: 6aba ldr r2, [r7, #40] ; 0x28 - 800c49e: 2134 movs r1, #52 ; 0x34 - 800c4a0: 697b ldr r3, [r7, #20] - 800c4a2: 18d3 adds r3, r2, r3 - 800c4a4: 185b adds r3, r3, r1 - 800c4a6: 1c02 adds r2, r0, #0 - 800c4a8: 701a strb r2, [r3, #0] + 800d0d8: 68ba ldr r2, [r7, #8] + 800d0da: 697b ldr r3, [r7, #20] + 800d0dc: 18d3 adds r3, r2, r3 + 800d0de: 7818 ldrb r0, [r3, #0] + 800d0e0: 6aba ldr r2, [r7, #40] ; 0x28 + 800d0e2: 2134 movs r1, #52 ; 0x34 + 800d0e4: 697b ldr r3, [r7, #20] + 800d0e6: 18d3 adds r3, r2, r3 + 800d0e8: 185b adds r3, r3, r1 + 800d0ea: 1c02 adds r2, r0, #0 + 800d0ec: 701a strb r2, [r3, #0] /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than configMAX_TASK_NAME_LEN characters just in case the memory after the string is not accessible (extremely unlikely). */ if( pcName[ x ] == ( char ) 0x00 ) - 800c4aa: 68ba ldr r2, [r7, #8] - 800c4ac: 697b ldr r3, [r7, #20] - 800c4ae: 18d3 adds r3, r2, r3 - 800c4b0: 781b ldrb r3, [r3, #0] - 800c4b2: 2b00 cmp r3, #0 - 800c4b4: d006 beq.n 800c4c4 + 800d0ee: 68ba ldr r2, [r7, #8] + 800d0f0: 697b ldr r3, [r7, #20] + 800d0f2: 18d3 adds r3, r2, r3 + 800d0f4: 781b ldrb r3, [r3, #0] + 800d0f6: 2b00 cmp r3, #0 + 800d0f8: d006 beq.n 800d108 for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ ) - 800c4b6: 697b ldr r3, [r7, #20] - 800c4b8: 3301 adds r3, #1 - 800c4ba: 617b str r3, [r7, #20] - 800c4bc: 697b ldr r3, [r7, #20] - 800c4be: 2b0f cmp r3, #15 - 800c4c0: d9e8 bls.n 800c494 - 800c4c2: e000 b.n 800c4c6 + 800d0fa: 697b ldr r3, [r7, #20] + 800d0fc: 3301 adds r3, #1 + 800d0fe: 617b str r3, [r7, #20] + 800d100: 697b ldr r3, [r7, #20] + 800d102: 2b0f cmp r3, #15 + 800d104: d9e8 bls.n 800d0d8 + 800d106: e000 b.n 800d10a { break; - 800c4c4: 46c0 nop ; (mov r8, r8) + 800d108: 46c0 nop ; (mov r8, r8) } } /* Ensure the name string is terminated in the case that the string length was greater or equal to configMAX_TASK_NAME_LEN. */ pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0'; - 800c4c6: 6abb ldr r3, [r7, #40] ; 0x28 - 800c4c8: 2243 movs r2, #67 ; 0x43 - 800c4ca: 2100 movs r1, #0 - 800c4cc: 5499 strb r1, [r3, r2] - 800c4ce: e003 b.n 800c4d8 + 800d10a: 6abb ldr r3, [r7, #40] ; 0x28 + 800d10c: 2243 movs r2, #67 ; 0x43 + 800d10e: 2100 movs r1, #0 + 800d110: 5499 strb r1, [r3, r2] + 800d112: e003 b.n 800d11c } else { /* The task has not been given a name, so just ensure there is a NULL terminator when it is read out. */ pxNewTCB->pcTaskName[ 0 ] = 0x00; - 800c4d0: 6abb ldr r3, [r7, #40] ; 0x28 - 800c4d2: 2234 movs r2, #52 ; 0x34 - 800c4d4: 2100 movs r1, #0 - 800c4d6: 5499 strb r1, [r3, r2] + 800d114: 6abb ldr r3, [r7, #40] ; 0x28 + 800d116: 2234 movs r2, #52 ; 0x34 + 800d118: 2100 movs r1, #0 + 800d11a: 5499 strb r1, [r3, r2] } /* This is used as an array index so must ensure it's not too large. First remove the privilege bit if one is present. */ if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES ) - 800c4d8: 6a3b ldr r3, [r7, #32] - 800c4da: 2b37 cmp r3, #55 ; 0x37 - 800c4dc: d901 bls.n 800c4e2 + 800d11c: 6a3b ldr r3, [r7, #32] + 800d11e: 2b37 cmp r3, #55 ; 0x37 + 800d120: d901 bls.n 800d126 { uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U; - 800c4de: 2337 movs r3, #55 ; 0x37 - 800c4e0: 623b str r3, [r7, #32] + 800d122: 2337 movs r3, #55 ; 0x37 + 800d124: 623b str r3, [r7, #32] else { mtCOVERAGE_TEST_MARKER(); } pxNewTCB->uxPriority = uxPriority; - 800c4e2: 6abb ldr r3, [r7, #40] ; 0x28 - 800c4e4: 6a3a ldr r2, [r7, #32] - 800c4e6: 62da str r2, [r3, #44] ; 0x2c + 800d126: 6abb ldr r3, [r7, #40] ; 0x28 + 800d128: 6a3a ldr r2, [r7, #32] + 800d12a: 62da str r2, [r3, #44] ; 0x2c #if ( configUSE_MUTEXES == 1 ) { pxNewTCB->uxBasePriority = uxPriority; - 800c4e8: 6abb ldr r3, [r7, #40] ; 0x28 - 800c4ea: 6a3a ldr r2, [r7, #32] - 800c4ec: 64da str r2, [r3, #76] ; 0x4c + 800d12c: 6abb ldr r3, [r7, #40] ; 0x28 + 800d12e: 6a3a ldr r2, [r7, #32] + 800d130: 64da str r2, [r3, #76] ; 0x4c pxNewTCB->uxMutexesHeld = 0; - 800c4ee: 6abb ldr r3, [r7, #40] ; 0x28 - 800c4f0: 2200 movs r2, #0 - 800c4f2: 651a str r2, [r3, #80] ; 0x50 + 800d132: 6abb ldr r3, [r7, #40] ; 0x28 + 800d134: 2200 movs r2, #0 + 800d136: 651a str r2, [r3, #80] ; 0x50 } #endif /* configUSE_MUTEXES */ vListInitialiseItem( &( pxNewTCB->xStateListItem ) ); - 800c4f4: 6abb ldr r3, [r7, #40] ; 0x28 - 800c4f6: 3304 adds r3, #4 - 800c4f8: 0018 movs r0, r3 - 800c4fa: f7fe fffd bl 800b4f8 + 800d138: 6abb ldr r3, [r7, #40] ; 0x28 + 800d13a: 3304 adds r3, #4 + 800d13c: 0018 movs r0, r3 + 800d13e: f7fe fffd bl 800c13c vListInitialiseItem( &( pxNewTCB->xEventListItem ) ); - 800c4fe: 6abb ldr r3, [r7, #40] ; 0x28 - 800c500: 3318 adds r3, #24 - 800c502: 0018 movs r0, r3 - 800c504: f7fe fff8 bl 800b4f8 + 800d142: 6abb ldr r3, [r7, #40] ; 0x28 + 800d144: 3318 adds r3, #24 + 800d146: 0018 movs r0, r3 + 800d148: f7fe fff8 bl 800c13c /* Set the pxNewTCB as a link back from the ListItem_t. This is so we can get back to the containing TCB from a generic item in a list. */ listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB ); - 800c508: 6abb ldr r3, [r7, #40] ; 0x28 - 800c50a: 6aba ldr r2, [r7, #40] ; 0x28 - 800c50c: 611a str r2, [r3, #16] + 800d14c: 6abb ldr r3, [r7, #40] ; 0x28 + 800d14e: 6aba ldr r2, [r7, #40] ; 0x28 + 800d150: 611a str r2, [r3, #16] /* Event lists are always in priority order. */ listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ - 800c50e: 6a3b ldr r3, [r7, #32] - 800c510: 2238 movs r2, #56 ; 0x38 - 800c512: 1ad2 subs r2, r2, r3 - 800c514: 6abb ldr r3, [r7, #40] ; 0x28 - 800c516: 619a str r2, [r3, #24] + 800d152: 6a3b ldr r3, [r7, #32] + 800d154: 2238 movs r2, #56 ; 0x38 + 800d156: 1ad2 subs r2, r2, r3 + 800d158: 6abb ldr r3, [r7, #40] ; 0x28 + 800d15a: 619a str r2, [r3, #24] listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB ); - 800c518: 6abb ldr r3, [r7, #40] ; 0x28 - 800c51a: 6aba ldr r2, [r7, #40] ; 0x28 - 800c51c: 625a str r2, [r3, #36] ; 0x24 + 800d15c: 6abb ldr r3, [r7, #40] ; 0x28 + 800d15e: 6aba ldr r2, [r7, #40] ; 0x28 + 800d160: 625a str r2, [r3, #36] ; 0x24 } #endif #if ( configUSE_TASK_NOTIFICATIONS == 1 ) { pxNewTCB->ulNotifiedValue = 0; - 800c51e: 6abb ldr r3, [r7, #40] ; 0x28 - 800c520: 22b4 movs r2, #180 ; 0xb4 - 800c522: 2100 movs r1, #0 - 800c524: 5099 str r1, [r3, r2] + 800d162: 6abb ldr r3, [r7, #40] ; 0x28 + 800d164: 22b4 movs r2, #180 ; 0xb4 + 800d166: 2100 movs r1, #0 + 800d168: 5099 str r1, [r3, r2] pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION; - 800c526: 6abb ldr r3, [r7, #40] ; 0x28 - 800c528: 22b8 movs r2, #184 ; 0xb8 - 800c52a: 2100 movs r1, #0 - 800c52c: 5499 strb r1, [r3, r2] + 800d16a: 6abb ldr r3, [r7, #40] ; 0x28 + 800d16c: 22b8 movs r2, #184 ; 0xb8 + 800d16e: 2100 movs r1, #0 + 800d170: 5499 strb r1, [r3, r2] #if ( configUSE_NEWLIB_REENTRANT == 1 ) { /* Initialise this task's Newlib reent structure. See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html for additional information. */ _REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) ); - 800c52e: 6abb ldr r3, [r7, #40] ; 0x28 - 800c530: 3354 adds r3, #84 ; 0x54 - 800c532: 2260 movs r2, #96 ; 0x60 - 800c534: 2100 movs r1, #0 - 800c536: 0018 movs r0, r3 - 800c538: f001 fd49 bl 800dfce - 800c53c: 6abb ldr r3, [r7, #40] ; 0x28 - 800c53e: 4a0e ldr r2, [pc, #56] ; (800c578 ) - 800c540: 659a str r2, [r3, #88] ; 0x58 - 800c542: 6abb ldr r3, [r7, #40] ; 0x28 - 800c544: 4a0d ldr r2, [pc, #52] ; (800c57c ) - 800c546: 65da str r2, [r3, #92] ; 0x5c - 800c548: 6abb ldr r3, [r7, #40] ; 0x28 - 800c54a: 4a0d ldr r2, [pc, #52] ; (800c580 ) - 800c54c: 661a str r2, [r3, #96] ; 0x60 + 800d172: 6abb ldr r3, [r7, #40] ; 0x28 + 800d174: 3354 adds r3, #84 ; 0x54 + 800d176: 2260 movs r2, #96 ; 0x60 + 800d178: 2100 movs r1, #0 + 800d17a: 0018 movs r0, r3 + 800d17c: f001 fd47 bl 800ec0e + 800d180: 6abb ldr r3, [r7, #40] ; 0x28 + 800d182: 4a0e ldr r2, [pc, #56] ; (800d1bc ) + 800d184: 659a str r2, [r3, #88] ; 0x58 + 800d186: 6abb ldr r3, [r7, #40] ; 0x28 + 800d188: 4a0d ldr r2, [pc, #52] ; (800d1c0 ) + 800d18a: 65da str r2, [r3, #92] ; 0x5c + 800d18c: 6abb ldr r3, [r7, #40] ; 0x28 + 800d18e: 4a0d ldr r2, [pc, #52] ; (800d1c4 ) + 800d190: 661a str r2, [r3, #96] ; 0x60 } #endif /* portSTACK_GROWTH */ } #else /* portHAS_STACK_OVERFLOW_CHECKING */ { pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters ); - 800c54e: 683a ldr r2, [r7, #0] - 800c550: 68f9 ldr r1, [r7, #12] - 800c552: 693b ldr r3, [r7, #16] - 800c554: 0018 movs r0, r3 - 800c556: f001 fa1d bl 800d994 - 800c55a: 0002 movs r2, r0 - 800c55c: 6abb ldr r3, [r7, #40] ; 0x28 - 800c55e: 601a str r2, [r3, #0] + 800d192: 683a ldr r2, [r7, #0] + 800d194: 68f9 ldr r1, [r7, #12] + 800d196: 693b ldr r3, [r7, #16] + 800d198: 0018 movs r0, r3 + 800d19a: f001 fa1d bl 800e5d8 + 800d19e: 0002 movs r2, r0 + 800d1a0: 6abb ldr r3, [r7, #40] ; 0x28 + 800d1a2: 601a str r2, [r3, #0] } #endif /* portHAS_STACK_OVERFLOW_CHECKING */ } #endif /* portUSING_MPU_WRAPPERS */ if( pxCreatedTask != NULL ) - 800c560: 6a7b ldr r3, [r7, #36] ; 0x24 - 800c562: 2b00 cmp r3, #0 - 800c564: d002 beq.n 800c56c + 800d1a4: 6a7b ldr r3, [r7, #36] ; 0x24 + 800d1a6: 2b00 cmp r3, #0 + 800d1a8: d002 beq.n 800d1b0 { /* Pass the handle out in an anonymous way. The handle can be used to change the created task's priority, delete the created task, etc.*/ *pxCreatedTask = ( TaskHandle_t ) pxNewTCB; - 800c566: 6a7b ldr r3, [r7, #36] ; 0x24 - 800c568: 6aba ldr r2, [r7, #40] ; 0x28 - 800c56a: 601a str r2, [r3, #0] + 800d1aa: 6a7b ldr r3, [r7, #36] ; 0x24 + 800d1ac: 6aba ldr r2, [r7, #40] ; 0x28 + 800d1ae: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } } - 800c56c: 46c0 nop ; (mov r8, r8) - 800c56e: 46bd mov sp, r7 - 800c570: b006 add sp, #24 - 800c572: bd80 pop {r7, pc} - 800c574: 3fffffff .word 0x3fffffff - 800c578: 0801033c .word 0x0801033c - 800c57c: 0801035c .word 0x0801035c - 800c580: 0801031c .word 0x0801031c + 800d1b0: 46c0 nop ; (mov r8, r8) + 800d1b2: 46bd mov sp, r7 + 800d1b4: b006 add sp, #24 + 800d1b6: bd80 pop {r7, pc} + 800d1b8: 3fffffff .word 0x3fffffff + 800d1bc: 08010fa4 .word 0x08010fa4 + 800d1c0: 08010fc4 .word 0x08010fc4 + 800d1c4: 08010f84 .word 0x08010f84 -0800c584 : +0800d1c8 : /*-----------------------------------------------------------*/ static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) { - 800c584: b580 push {r7, lr} - 800c586: b082 sub sp, #8 - 800c588: af00 add r7, sp, #0 - 800c58a: 6078 str r0, [r7, #4] + 800d1c8: b580 push {r7, lr} + 800d1ca: b082 sub sp, #8 + 800d1cc: af00 add r7, sp, #0 + 800d1ce: 6078 str r0, [r7, #4] /* Ensure interrupts don't access the task lists while the lists are being updated. */ taskENTER_CRITICAL(); - 800c58c: f001 faa0 bl 800dad0 + 800d1d0: f001 fa9e bl 800e710 { uxCurrentNumberOfTasks++; - 800c590: 4b2a ldr r3, [pc, #168] ; (800c63c ) - 800c592: 681b ldr r3, [r3, #0] - 800c594: 1c5a adds r2, r3, #1 - 800c596: 4b29 ldr r3, [pc, #164] ; (800c63c ) - 800c598: 601a str r2, [r3, #0] + 800d1d4: 4b2a ldr r3, [pc, #168] ; (800d280 ) + 800d1d6: 681b ldr r3, [r3, #0] + 800d1d8: 1c5a adds r2, r3, #1 + 800d1da: 4b29 ldr r3, [pc, #164] ; (800d280 ) + 800d1dc: 601a str r2, [r3, #0] if( pxCurrentTCB == NULL ) - 800c59a: 4b29 ldr r3, [pc, #164] ; (800c640 ) - 800c59c: 681b ldr r3, [r3, #0] - 800c59e: 2b00 cmp r3, #0 - 800c5a0: d109 bne.n 800c5b6 + 800d1de: 4b29 ldr r3, [pc, #164] ; (800d284 ) + 800d1e0: 681b ldr r3, [r3, #0] + 800d1e2: 2b00 cmp r3, #0 + 800d1e4: d109 bne.n 800d1fa { /* There are no other tasks, or all the other tasks are in the suspended state - make this the current task. */ pxCurrentTCB = pxNewTCB; - 800c5a2: 4b27 ldr r3, [pc, #156] ; (800c640 ) - 800c5a4: 687a ldr r2, [r7, #4] - 800c5a6: 601a str r2, [r3, #0] + 800d1e6: 4b27 ldr r3, [pc, #156] ; (800d284 ) + 800d1e8: 687a ldr r2, [r7, #4] + 800d1ea: 601a str r2, [r3, #0] if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 ) - 800c5a8: 4b24 ldr r3, [pc, #144] ; (800c63c ) - 800c5aa: 681b ldr r3, [r3, #0] - 800c5ac: 2b01 cmp r3, #1 - 800c5ae: d110 bne.n 800c5d2 + 800d1ec: 4b24 ldr r3, [pc, #144] ; (800d280 ) + 800d1ee: 681b ldr r3, [r3, #0] + 800d1f0: 2b01 cmp r3, #1 + 800d1f2: d110 bne.n 800d216 { /* This is the first task to be created so do the preliminary initialisation required. We will not recover if this call fails, but we will report the failure. */ prvInitialiseTaskLists(); - 800c5b0: f000 fba2 bl 800ccf8 - 800c5b4: e00d b.n 800c5d2 + 800d1f4: f000 fba2 bl 800d93c + 800d1f8: e00d b.n 800d216 else { /* If the scheduler is not already running, make this task the current task if it is the highest priority task to be created so far. */ if( xSchedulerRunning == pdFALSE ) - 800c5b6: 4b23 ldr r3, [pc, #140] ; (800c644 ) - 800c5b8: 681b ldr r3, [r3, #0] - 800c5ba: 2b00 cmp r3, #0 - 800c5bc: d109 bne.n 800c5d2 + 800d1fa: 4b23 ldr r3, [pc, #140] ; (800d288 ) + 800d1fc: 681b ldr r3, [r3, #0] + 800d1fe: 2b00 cmp r3, #0 + 800d200: d109 bne.n 800d216 { if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority ) - 800c5be: 4b20 ldr r3, [pc, #128] ; (800c640 ) - 800c5c0: 681b ldr r3, [r3, #0] - 800c5c2: 6ada ldr r2, [r3, #44] ; 0x2c - 800c5c4: 687b ldr r3, [r7, #4] - 800c5c6: 6adb ldr r3, [r3, #44] ; 0x2c - 800c5c8: 429a cmp r2, r3 - 800c5ca: d802 bhi.n 800c5d2 + 800d202: 4b20 ldr r3, [pc, #128] ; (800d284 ) + 800d204: 681b ldr r3, [r3, #0] + 800d206: 6ada ldr r2, [r3, #44] ; 0x2c + 800d208: 687b ldr r3, [r7, #4] + 800d20a: 6adb ldr r3, [r3, #44] ; 0x2c + 800d20c: 429a cmp r2, r3 + 800d20e: d802 bhi.n 800d216 { pxCurrentTCB = pxNewTCB; - 800c5cc: 4b1c ldr r3, [pc, #112] ; (800c640 ) - 800c5ce: 687a ldr r2, [r7, #4] - 800c5d0: 601a str r2, [r3, #0] + 800d210: 4b1c ldr r3, [pc, #112] ; (800d284 ) + 800d212: 687a ldr r2, [r7, #4] + 800d214: 601a str r2, [r3, #0] { mtCOVERAGE_TEST_MARKER(); } } uxTaskNumber++; - 800c5d2: 4b1d ldr r3, [pc, #116] ; (800c648 ) - 800c5d4: 681b ldr r3, [r3, #0] - 800c5d6: 1c5a adds r2, r3, #1 - 800c5d8: 4b1b ldr r3, [pc, #108] ; (800c648 ) - 800c5da: 601a str r2, [r3, #0] + 800d216: 4b1d ldr r3, [pc, #116] ; (800d28c ) + 800d218: 681b ldr r3, [r3, #0] + 800d21a: 1c5a adds r2, r3, #1 + 800d21c: 4b1b ldr r3, [pc, #108] ; (800d28c ) + 800d21e: 601a str r2, [r3, #0] #if ( configUSE_TRACE_FACILITY == 1 ) { /* Add a counter into the TCB for tracing only. */ pxNewTCB->uxTCBNumber = uxTaskNumber; - 800c5dc: 4b1a ldr r3, [pc, #104] ; (800c648 ) - 800c5de: 681a ldr r2, [r3, #0] - 800c5e0: 687b ldr r3, [r7, #4] - 800c5e2: 645a str r2, [r3, #68] ; 0x44 + 800d220: 4b1a ldr r3, [pc, #104] ; (800d28c ) + 800d222: 681a ldr r2, [r3, #0] + 800d224: 687b ldr r3, [r7, #4] + 800d226: 645a str r2, [r3, #68] ; 0x44 } #endif /* configUSE_TRACE_FACILITY */ traceTASK_CREATE( pxNewTCB ); prvAddTaskToReadyList( pxNewTCB ); - 800c5e4: 687b ldr r3, [r7, #4] - 800c5e6: 6ada ldr r2, [r3, #44] ; 0x2c - 800c5e8: 4b18 ldr r3, [pc, #96] ; (800c64c ) - 800c5ea: 681b ldr r3, [r3, #0] - 800c5ec: 429a cmp r2, r3 - 800c5ee: d903 bls.n 800c5f8 - 800c5f0: 687b ldr r3, [r7, #4] - 800c5f2: 6ada ldr r2, [r3, #44] ; 0x2c - 800c5f4: 4b15 ldr r3, [pc, #84] ; (800c64c ) - 800c5f6: 601a str r2, [r3, #0] - 800c5f8: 687b ldr r3, [r7, #4] - 800c5fa: 6ada ldr r2, [r3, #44] ; 0x2c - 800c5fc: 0013 movs r3, r2 - 800c5fe: 009b lsls r3, r3, #2 - 800c600: 189b adds r3, r3, r2 - 800c602: 009b lsls r3, r3, #2 - 800c604: 4a12 ldr r2, [pc, #72] ; (800c650 ) - 800c606: 189a adds r2, r3, r2 - 800c608: 687b ldr r3, [r7, #4] - 800c60a: 3304 adds r3, #4 - 800c60c: 0019 movs r1, r3 - 800c60e: 0010 movs r0, r2 - 800c610: f7fe ff7d bl 800b50e + 800d228: 687b ldr r3, [r7, #4] + 800d22a: 6ada ldr r2, [r3, #44] ; 0x2c + 800d22c: 4b18 ldr r3, [pc, #96] ; (800d290 ) + 800d22e: 681b ldr r3, [r3, #0] + 800d230: 429a cmp r2, r3 + 800d232: d903 bls.n 800d23c + 800d234: 687b ldr r3, [r7, #4] + 800d236: 6ada ldr r2, [r3, #44] ; 0x2c + 800d238: 4b15 ldr r3, [pc, #84] ; (800d290 ) + 800d23a: 601a str r2, [r3, #0] + 800d23c: 687b ldr r3, [r7, #4] + 800d23e: 6ada ldr r2, [r3, #44] ; 0x2c + 800d240: 0013 movs r3, r2 + 800d242: 009b lsls r3, r3, #2 + 800d244: 189b adds r3, r3, r2 + 800d246: 009b lsls r3, r3, #2 + 800d248: 4a12 ldr r2, [pc, #72] ; (800d294 ) + 800d24a: 189a adds r2, r3, r2 + 800d24c: 687b ldr r3, [r7, #4] + 800d24e: 3304 adds r3, #4 + 800d250: 0019 movs r1, r3 + 800d252: 0010 movs r0, r2 + 800d254: f7fe ff7d bl 800c152 portSETUP_TCB( pxNewTCB ); } taskEXIT_CRITICAL(); - 800c614: f001 fa6e bl 800daf4 + 800d258: f001 fa6c bl 800e734 if( xSchedulerRunning != pdFALSE ) - 800c618: 4b0a ldr r3, [pc, #40] ; (800c644 ) - 800c61a: 681b ldr r3, [r3, #0] - 800c61c: 2b00 cmp r3, #0 - 800c61e: d008 beq.n 800c632 + 800d25c: 4b0a ldr r3, [pc, #40] ; (800d288 ) + 800d25e: 681b ldr r3, [r3, #0] + 800d260: 2b00 cmp r3, #0 + 800d262: d008 beq.n 800d276 { /* If the created task is of a higher priority than the current task then it should run now. */ if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority ) - 800c620: 4b07 ldr r3, [pc, #28] ; (800c640 ) - 800c622: 681b ldr r3, [r3, #0] - 800c624: 6ada ldr r2, [r3, #44] ; 0x2c - 800c626: 687b ldr r3, [r7, #4] - 800c628: 6adb ldr r3, [r3, #44] ; 0x2c - 800c62a: 429a cmp r2, r3 - 800c62c: d201 bcs.n 800c632 + 800d264: 4b07 ldr r3, [pc, #28] ; (800d284 ) + 800d266: 681b ldr r3, [r3, #0] + 800d268: 6ada ldr r2, [r3, #44] ; 0x2c + 800d26a: 687b ldr r3, [r7, #4] + 800d26c: 6adb ldr r3, [r3, #44] ; 0x2c + 800d26e: 429a cmp r2, r3 + 800d270: d201 bcs.n 800d276 { taskYIELD_IF_USING_PREEMPTION(); - 800c62e: f001 fa3f bl 800dab0 + 800d272: f001 fa3d bl 800e6f0 } else { mtCOVERAGE_TEST_MARKER(); } } - 800c632: 46c0 nop ; (mov r8, r8) - 800c634: 46bd mov sp, r7 - 800c636: b002 add sp, #8 - 800c638: bd80 pop {r7, pc} - 800c63a: 46c0 nop ; (mov r8, r8) - 800c63c: 20000fd8 .word 0x20000fd8 - 800c640: 20000b04 .word 0x20000b04 - 800c644: 20000fe4 .word 0x20000fe4 - 800c648: 20000ff4 .word 0x20000ff4 - 800c64c: 20000fe0 .word 0x20000fe0 - 800c650: 20000b08 .word 0x20000b08 + 800d276: 46c0 nop ; (mov r8, r8) + 800d278: 46bd mov sp, r7 + 800d27a: b002 add sp, #8 + 800d27c: bd80 pop {r7, pc} + 800d27e: 46c0 nop ; (mov r8, r8) + 800d280: 200010b8 .word 0x200010b8 + 800d284: 20000be4 .word 0x20000be4 + 800d288: 200010c4 .word 0x200010c4 + 800d28c: 200010d4 .word 0x200010d4 + 800d290: 200010c0 .word 0x200010c0 + 800d294: 20000be8 .word 0x20000be8 -0800c654 : +0800d298 : /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskDelay == 1 ) void vTaskDelay( const TickType_t xTicksToDelay ) { - 800c654: b580 push {r7, lr} - 800c656: b084 sub sp, #16 - 800c658: af00 add r7, sp, #0 - 800c65a: 6078 str r0, [r7, #4] + 800d298: b580 push {r7, lr} + 800d29a: b084 sub sp, #16 + 800d29c: af00 add r7, sp, #0 + 800d29e: 6078 str r0, [r7, #4] BaseType_t xAlreadyYielded = pdFALSE; - 800c65c: 2300 movs r3, #0 - 800c65e: 60fb str r3, [r7, #12] + 800d2a0: 2300 movs r3, #0 + 800d2a2: 60fb str r3, [r7, #12] /* A delay time of zero just forces a reschedule. */ if( xTicksToDelay > ( TickType_t ) 0U ) - 800c660: 687b ldr r3, [r7, #4] - 800c662: 2b00 cmp r3, #0 - 800c664: d010 beq.n 800c688 + 800d2a4: 687b ldr r3, [r7, #4] + 800d2a6: 2b00 cmp r3, #0 + 800d2a8: d010 beq.n 800d2cc { configASSERT( uxSchedulerSuspended == 0 ); - 800c666: 4b0d ldr r3, [pc, #52] ; (800c69c ) - 800c668: 681b ldr r3, [r3, #0] - 800c66a: 2b00 cmp r3, #0 - 800c66c: d001 beq.n 800c672 - 800c66e: b672 cpsid i - 800c670: e7fe b.n 800c670 + 800d2aa: 4b0d ldr r3, [pc, #52] ; (800d2e0 ) + 800d2ac: 681b ldr r3, [r3, #0] + 800d2ae: 2b00 cmp r3, #0 + 800d2b0: d001 beq.n 800d2b6 + 800d2b2: b672 cpsid i + 800d2b4: e7fe b.n 800d2b4 vTaskSuspendAll(); - 800c672: f000 f873 bl 800c75c + 800d2b6: f000 f873 bl 800d3a0 list or removed from the blocked list until the scheduler is resumed. This task cannot be in an event list as it is the currently executing task. */ prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE ); - 800c676: 687b ldr r3, [r7, #4] - 800c678: 2100 movs r1, #0 - 800c67a: 0018 movs r0, r3 - 800c67c: f000 fd6a bl 800d154 + 800d2ba: 687b ldr r3, [r7, #4] + 800d2bc: 2100 movs r1, #0 + 800d2be: 0018 movs r0, r3 + 800d2c0: f000 fd6a bl 800dd98 } xAlreadyYielded = xTaskResumeAll(); - 800c680: f000 f878 bl 800c774 - 800c684: 0003 movs r3, r0 - 800c686: 60fb str r3, [r7, #12] + 800d2c4: f000 f878 bl 800d3b8 + 800d2c8: 0003 movs r3, r0 + 800d2ca: 60fb str r3, [r7, #12] mtCOVERAGE_TEST_MARKER(); } /* Force a reschedule if xTaskResumeAll has not already done so, we may have put ourselves to sleep. */ if( xAlreadyYielded == pdFALSE ) - 800c688: 68fb ldr r3, [r7, #12] - 800c68a: 2b00 cmp r3, #0 - 800c68c: d101 bne.n 800c692 + 800d2cc: 68fb ldr r3, [r7, #12] + 800d2ce: 2b00 cmp r3, #0 + 800d2d0: d101 bne.n 800d2d6 { portYIELD_WITHIN_API(); - 800c68e: f001 fa0f bl 800dab0 + 800d2d2: f001 fa0d bl 800e6f0 } else { mtCOVERAGE_TEST_MARKER(); } } - 800c692: 46c0 nop ; (mov r8, r8) - 800c694: 46bd mov sp, r7 - 800c696: b004 add sp, #16 - 800c698: bd80 pop {r7, pc} - 800c69a: 46c0 nop ; (mov r8, r8) - 800c69c: 20001000 .word 0x20001000 + 800d2d6: 46c0 nop ; (mov r8, r8) + 800d2d8: 46bd mov sp, r7 + 800d2da: b004 add sp, #16 + 800d2dc: bd80 pop {r7, pc} + 800d2de: 46c0 nop ; (mov r8, r8) + 800d2e0: 200010e0 .word 0x200010e0 -0800c6a0 : +0800d2e4 : #endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */ /*-----------------------------------------------------------*/ void vTaskStartScheduler( void ) { - 800c6a0: b590 push {r4, r7, lr} - 800c6a2: b089 sub sp, #36 ; 0x24 - 800c6a4: af04 add r7, sp, #16 + 800d2e4: b590 push {r4, r7, lr} + 800d2e6: b089 sub sp, #36 ; 0x24 + 800d2e8: af04 add r7, sp, #16 BaseType_t xReturn; /* Add the idle task at the lowest priority. */ #if( configSUPPORT_STATIC_ALLOCATION == 1 ) { StaticTask_t *pxIdleTaskTCBBuffer = NULL; - 800c6a6: 2300 movs r3, #0 - 800c6a8: 60bb str r3, [r7, #8] + 800d2ea: 2300 movs r3, #0 + 800d2ec: 60bb str r3, [r7, #8] StackType_t *pxIdleTaskStackBuffer = NULL; - 800c6aa: 2300 movs r3, #0 - 800c6ac: 607b str r3, [r7, #4] + 800d2ee: 2300 movs r3, #0 + 800d2f0: 607b str r3, [r7, #4] uint32_t ulIdleTaskStackSize; /* The Idle task is created using user provided RAM - obtain the address of the RAM then create the idle task. */ vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize ); - 800c6ae: 003a movs r2, r7 - 800c6b0: 1d39 adds r1, r7, #4 - 800c6b2: 2308 movs r3, #8 - 800c6b4: 18fb adds r3, r7, r3 - 800c6b6: 0018 movs r0, r3 - 800c6b8: f7fe fed0 bl 800b45c + 800d2f2: 003a movs r2, r7 + 800d2f4: 1d39 adds r1, r7, #4 + 800d2f6: 2308 movs r3, #8 + 800d2f8: 18fb adds r3, r7, r3 + 800d2fa: 0018 movs r0, r3 + 800d2fc: f7fe fed0 bl 800c0a0 xIdleTaskHandle = xTaskCreateStatic( prvIdleTask, - 800c6bc: 683c ldr r4, [r7, #0] - 800c6be: 687b ldr r3, [r7, #4] - 800c6c0: 68ba ldr r2, [r7, #8] - 800c6c2: 491e ldr r1, [pc, #120] ; (800c73c ) - 800c6c4: 481e ldr r0, [pc, #120] ; (800c740 ) - 800c6c6: 9202 str r2, [sp, #8] - 800c6c8: 9301 str r3, [sp, #4] - 800c6ca: 2300 movs r3, #0 - 800c6cc: 9300 str r3, [sp, #0] - 800c6ce: 2300 movs r3, #0 - 800c6d0: 0022 movs r2, r4 - 800c6d2: f7ff fe26 bl 800c322 - 800c6d6: 0002 movs r2, r0 - 800c6d8: 4b1a ldr r3, [pc, #104] ; (800c744 ) - 800c6da: 601a str r2, [r3, #0] + 800d300: 683c ldr r4, [r7, #0] + 800d302: 687b ldr r3, [r7, #4] + 800d304: 68ba ldr r2, [r7, #8] + 800d306: 491e ldr r1, [pc, #120] ; (800d380 ) + 800d308: 481e ldr r0, [pc, #120] ; (800d384 ) + 800d30a: 9202 str r2, [sp, #8] + 800d30c: 9301 str r3, [sp, #4] + 800d30e: 2300 movs r3, #0 + 800d310: 9300 str r3, [sp, #0] + 800d312: 2300 movs r3, #0 + 800d314: 0022 movs r2, r4 + 800d316: f7ff fe26 bl 800cf66 + 800d31a: 0002 movs r2, r0 + 800d31c: 4b1a ldr r3, [pc, #104] ; (800d388 ) + 800d31e: 601a str r2, [r3, #0] ( void * ) NULL, /*lint !e961. The cast is not redundant for all compilers. */ portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */ pxIdleTaskStackBuffer, pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */ if( xIdleTaskHandle != NULL ) - 800c6dc: 4b19 ldr r3, [pc, #100] ; (800c744 ) - 800c6de: 681b ldr r3, [r3, #0] - 800c6e0: 2b00 cmp r3, #0 - 800c6e2: d002 beq.n 800c6ea + 800d320: 4b19 ldr r3, [pc, #100] ; (800d388 ) + 800d322: 681b ldr r3, [r3, #0] + 800d324: 2b00 cmp r3, #0 + 800d326: d002 beq.n 800d32e { xReturn = pdPASS; - 800c6e4: 2301 movs r3, #1 - 800c6e6: 60fb str r3, [r7, #12] - 800c6e8: e001 b.n 800c6ee + 800d328: 2301 movs r3, #1 + 800d32a: 60fb str r3, [r7, #12] + 800d32c: e001 b.n 800d332 } else { xReturn = pdFAIL; - 800c6ea: 2300 movs r3, #0 - 800c6ec: 60fb str r3, [r7, #12] + 800d32e: 2300 movs r3, #0 + 800d330: 60fb str r3, [r7, #12] } #endif /* configSUPPORT_STATIC_ALLOCATION */ #if ( configUSE_TIMERS == 1 ) { if( xReturn == pdPASS ) - 800c6ee: 68fb ldr r3, [r7, #12] - 800c6f0: 2b01 cmp r3, #1 - 800c6f2: d103 bne.n 800c6fc + 800d332: 68fb ldr r3, [r7, #12] + 800d334: 2b01 cmp r3, #1 + 800d336: d103 bne.n 800d340 { xReturn = xTimerCreateTimerTask(); - 800c6f4: f000 fd82 bl 800d1fc - 800c6f8: 0003 movs r3, r0 - 800c6fa: 60fb str r3, [r7, #12] + 800d338: f000 fd82 bl 800de40 + 800d33c: 0003 movs r3, r0 + 800d33e: 60fb str r3, [r7, #12] mtCOVERAGE_TEST_MARKER(); } } #endif /* configUSE_TIMERS */ if( xReturn == pdPASS ) - 800c6fc: 68fb ldr r3, [r7, #12] - 800c6fe: 2b01 cmp r3, #1 - 800c700: d113 bne.n 800c72a + 800d340: 68fb ldr r3, [r7, #12] + 800d342: 2b01 cmp r3, #1 + 800d344: d113 bne.n 800d36e /* Interrupts are turned off here, to ensure a tick does not occur before or during the call to xPortStartScheduler(). The stacks of the created tasks contain a status word with interrupts switched on so interrupts will automatically get re-enabled when the first task starts to run. */ portDISABLE_INTERRUPTS(); - 800c702: b672 cpsid i + 800d346: b672 cpsid i { /* Switch Newlib's _impure_ptr variable to point to the _reent structure specific to the task that will run first. See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html for additional information. */ _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); - 800c704: 4b10 ldr r3, [pc, #64] ; (800c748 ) - 800c706: 681b ldr r3, [r3, #0] - 800c708: 3354 adds r3, #84 ; 0x54 - 800c70a: 001a movs r2, r3 - 800c70c: 4b0f ldr r3, [pc, #60] ; (800c74c ) - 800c70e: 601a str r2, [r3, #0] + 800d348: 4b10 ldr r3, [pc, #64] ; (800d38c ) + 800d34a: 681b ldr r3, [r3, #0] + 800d34c: 3354 adds r3, #84 ; 0x54 + 800d34e: 001a movs r2, r3 + 800d350: 4b0f ldr r3, [pc, #60] ; (800d390 ) + 800d352: 601a str r2, [r3, #0] } #endif /* configUSE_NEWLIB_REENTRANT */ xNextTaskUnblockTime = portMAX_DELAY; - 800c710: 4b0f ldr r3, [pc, #60] ; (800c750 ) - 800c712: 2201 movs r2, #1 - 800c714: 4252 negs r2, r2 - 800c716: 601a str r2, [r3, #0] + 800d354: 4b0f ldr r3, [pc, #60] ; (800d394 ) + 800d356: 2201 movs r2, #1 + 800d358: 4252 negs r2, r2 + 800d35a: 601a str r2, [r3, #0] xSchedulerRunning = pdTRUE; - 800c718: 4b0e ldr r3, [pc, #56] ; (800c754 ) - 800c71a: 2201 movs r2, #1 - 800c71c: 601a str r2, [r3, #0] + 800d35c: 4b0e ldr r3, [pc, #56] ; (800d398 ) + 800d35e: 2201 movs r2, #1 + 800d360: 601a str r2, [r3, #0] xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT; - 800c71e: 4b0e ldr r3, [pc, #56] ; (800c758 ) - 800c720: 2200 movs r2, #0 - 800c722: 601a str r2, [r3, #0] + 800d362: 4b0e ldr r3, [pc, #56] ; (800d39c ) + 800d364: 2200 movs r2, #0 + 800d366: 601a str r2, [r3, #0] traceTASK_SWITCHED_IN(); /* Setting up the timer tick is hardware specific and thus in the portable interface. */ if( xPortStartScheduler() != pdFALSE ) - 800c724: f001 f9a0 bl 800da68 + 800d368: f001 f99e bl 800e6a8 } /* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0, meaning xIdleTaskHandle is not used anywhere else. */ ( void ) xIdleTaskHandle; } - 800c728: e004 b.n 800c734 + 800d36c: e004 b.n 800d378 configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ); - 800c72a: 68fb ldr r3, [r7, #12] - 800c72c: 3301 adds r3, #1 - 800c72e: d101 bne.n 800c734 - 800c730: b672 cpsid i - 800c732: e7fe b.n 800c732 + 800d36e: 68fb ldr r3, [r7, #12] + 800d370: 3301 adds r3, #1 + 800d372: d101 bne.n 800d378 + 800d374: b672 cpsid i + 800d376: e7fe b.n 800d376 } - 800c734: 46c0 nop ; (mov r8, r8) - 800c736: 46bd mov sp, r7 - 800c738: b005 add sp, #20 - 800c73a: bd90 pop {r4, r7, pc} - 800c73c: 0800eb54 .word 0x0800eb54 - 800c740: 0800ccd9 .word 0x0800ccd9 - 800c744: 20000ffc .word 0x20000ffc - 800c748: 20000b04 .word 0x20000b04 - 800c74c: 20000050 .word 0x20000050 - 800c750: 20000ff8 .word 0x20000ff8 - 800c754: 20000fe4 .word 0x20000fe4 - 800c758: 20000fdc .word 0x20000fdc + 800d378: 46c0 nop ; (mov r8, r8) + 800d37a: 46bd mov sp, r7 + 800d37c: b005 add sp, #20 + 800d37e: bd90 pop {r4, r7, pc} + 800d380: 0800f794 .word 0x0800f794 + 800d384: 0800d91d .word 0x0800d91d + 800d388: 200010dc .word 0x200010dc + 800d38c: 20000be4 .word 0x20000be4 + 800d390: 20000050 .word 0x20000050 + 800d394: 200010d8 .word 0x200010d8 + 800d398: 200010c4 .word 0x200010c4 + 800d39c: 200010bc .word 0x200010bc -0800c75c : +0800d3a0 : vPortEndScheduler(); } /*----------------------------------------------------------*/ void vTaskSuspendAll( void ) { - 800c75c: b580 push {r7, lr} - 800c75e: af00 add r7, sp, #0 + 800d3a0: b580 push {r7, lr} + 800d3a2: af00 add r7, sp, #0 do not otherwise exhibit real time behaviour. */ portSOFTWARE_BARRIER(); /* The scheduler is suspended if uxSchedulerSuspended is non-zero. An increment is used to allow calls to vTaskSuspendAll() to nest. */ ++uxSchedulerSuspended; - 800c760: 4b03 ldr r3, [pc, #12] ; (800c770 ) - 800c762: 681b ldr r3, [r3, #0] - 800c764: 1c5a adds r2, r3, #1 - 800c766: 4b02 ldr r3, [pc, #8] ; (800c770 ) - 800c768: 601a str r2, [r3, #0] + 800d3a4: 4b03 ldr r3, [pc, #12] ; (800d3b4 ) + 800d3a6: 681b ldr r3, [r3, #0] + 800d3a8: 1c5a adds r2, r3, #1 + 800d3aa: 4b02 ldr r3, [pc, #8] ; (800d3b4 ) + 800d3ac: 601a str r2, [r3, #0] /* Enforces ordering for ports and optimised compilers that may otherwise place the above increment elsewhere. */ portMEMORY_BARRIER(); } - 800c76a: 46c0 nop ; (mov r8, r8) - 800c76c: 46bd mov sp, r7 - 800c76e: bd80 pop {r7, pc} - 800c770: 20001000 .word 0x20001000 + 800d3ae: 46c0 nop ; (mov r8, r8) + 800d3b0: 46bd mov sp, r7 + 800d3b2: bd80 pop {r7, pc} + 800d3b4: 200010e0 .word 0x200010e0 -0800c774 : +0800d3b8 : #endif /* configUSE_TICKLESS_IDLE */ /*----------------------------------------------------------*/ BaseType_t xTaskResumeAll( void ) { - 800c774: b580 push {r7, lr} - 800c776: b084 sub sp, #16 - 800c778: af00 add r7, sp, #0 + 800d3b8: b580 push {r7, lr} + 800d3ba: b084 sub sp, #16 + 800d3bc: af00 add r7, sp, #0 TCB_t *pxTCB = NULL; - 800c77a: 2300 movs r3, #0 - 800c77c: 60fb str r3, [r7, #12] + 800d3be: 2300 movs r3, #0 + 800d3c0: 60fb str r3, [r7, #12] BaseType_t xAlreadyYielded = pdFALSE; - 800c77e: 2300 movs r3, #0 - 800c780: 60bb str r3, [r7, #8] + 800d3c2: 2300 movs r3, #0 + 800d3c4: 60bb str r3, [r7, #8] /* If uxSchedulerSuspended is zero then this function does not match a previous call to vTaskSuspendAll(). */ configASSERT( uxSchedulerSuspended ); - 800c782: 4b3a ldr r3, [pc, #232] ; (800c86c ) - 800c784: 681b ldr r3, [r3, #0] - 800c786: 2b00 cmp r3, #0 - 800c788: d101 bne.n 800c78e - 800c78a: b672 cpsid i - 800c78c: e7fe b.n 800c78c + 800d3c6: 4b3a ldr r3, [pc, #232] ; (800d4b0 ) + 800d3c8: 681b ldr r3, [r3, #0] + 800d3ca: 2b00 cmp r3, #0 + 800d3cc: d101 bne.n 800d3d2 + 800d3ce: b672 cpsid i + 800d3d0: e7fe b.n 800d3d0 /* It is possible that an ISR caused a task to be removed from an event list while the scheduler was suspended. If this was the case then the removed task will have been added to the xPendingReadyList. Once the scheduler has been resumed it is safe to move all the pending ready tasks from this list into their appropriate ready list. */ taskENTER_CRITICAL(); - 800c78e: f001 f99f bl 800dad0 + 800d3d2: f001 f99d bl 800e710 { --uxSchedulerSuspended; - 800c792: 4b36 ldr r3, [pc, #216] ; (800c86c ) - 800c794: 681b ldr r3, [r3, #0] - 800c796: 1e5a subs r2, r3, #1 - 800c798: 4b34 ldr r3, [pc, #208] ; (800c86c ) - 800c79a: 601a str r2, [r3, #0] + 800d3d6: 4b36 ldr r3, [pc, #216] ; (800d4b0 ) + 800d3d8: 681b ldr r3, [r3, #0] + 800d3da: 1e5a subs r2, r3, #1 + 800d3dc: 4b34 ldr r3, [pc, #208] ; (800d4b0 ) + 800d3de: 601a str r2, [r3, #0] if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) - 800c79c: 4b33 ldr r3, [pc, #204] ; (800c86c ) - 800c79e: 681b ldr r3, [r3, #0] - 800c7a0: 2b00 cmp r3, #0 - 800c7a2: d15b bne.n 800c85c + 800d3e0: 4b33 ldr r3, [pc, #204] ; (800d4b0 ) + 800d3e2: 681b ldr r3, [r3, #0] + 800d3e4: 2b00 cmp r3, #0 + 800d3e6: d15b bne.n 800d4a0 { if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U ) - 800c7a4: 4b32 ldr r3, [pc, #200] ; (800c870 ) - 800c7a6: 681b ldr r3, [r3, #0] - 800c7a8: 2b00 cmp r3, #0 - 800c7aa: d057 beq.n 800c85c + 800d3e8: 4b32 ldr r3, [pc, #200] ; (800d4b4 ) + 800d3ea: 681b ldr r3, [r3, #0] + 800d3ec: 2b00 cmp r3, #0 + 800d3ee: d057 beq.n 800d4a0 { /* Move any readied tasks from the pending list into the appropriate ready list. */ while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE ) - 800c7ac: e02f b.n 800c80e + 800d3f0: e02f b.n 800d452 { pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ - 800c7ae: 4b31 ldr r3, [pc, #196] ; (800c874 ) - 800c7b0: 68db ldr r3, [r3, #12] - 800c7b2: 68db ldr r3, [r3, #12] - 800c7b4: 60fb str r3, [r7, #12] + 800d3f2: 4b31 ldr r3, [pc, #196] ; (800d4b8 ) + 800d3f4: 68db ldr r3, [r3, #12] + 800d3f6: 68db ldr r3, [r3, #12] + 800d3f8: 60fb str r3, [r7, #12] ( void ) uxListRemove( &( pxTCB->xEventListItem ) ); - 800c7b6: 68fb ldr r3, [r7, #12] - 800c7b8: 3318 adds r3, #24 - 800c7ba: 0018 movs r0, r3 - 800c7bc: f7fe feff bl 800b5be + 800d3fa: 68fb ldr r3, [r7, #12] + 800d3fc: 3318 adds r3, #24 + 800d3fe: 0018 movs r0, r3 + 800d400: f7fe feff bl 800c202 ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); - 800c7c0: 68fb ldr r3, [r7, #12] - 800c7c2: 3304 adds r3, #4 - 800c7c4: 0018 movs r0, r3 - 800c7c6: f7fe fefa bl 800b5be + 800d404: 68fb ldr r3, [r7, #12] + 800d406: 3304 adds r3, #4 + 800d408: 0018 movs r0, r3 + 800d40a: f7fe fefa bl 800c202 prvAddTaskToReadyList( pxTCB ); - 800c7ca: 68fb ldr r3, [r7, #12] - 800c7cc: 6ada ldr r2, [r3, #44] ; 0x2c - 800c7ce: 4b2a ldr r3, [pc, #168] ; (800c878 ) - 800c7d0: 681b ldr r3, [r3, #0] - 800c7d2: 429a cmp r2, r3 - 800c7d4: d903 bls.n 800c7de - 800c7d6: 68fb ldr r3, [r7, #12] - 800c7d8: 6ada ldr r2, [r3, #44] ; 0x2c - 800c7da: 4b27 ldr r3, [pc, #156] ; (800c878 ) - 800c7dc: 601a str r2, [r3, #0] - 800c7de: 68fb ldr r3, [r7, #12] - 800c7e0: 6ada ldr r2, [r3, #44] ; 0x2c - 800c7e2: 0013 movs r3, r2 - 800c7e4: 009b lsls r3, r3, #2 - 800c7e6: 189b adds r3, r3, r2 - 800c7e8: 009b lsls r3, r3, #2 - 800c7ea: 4a24 ldr r2, [pc, #144] ; (800c87c ) - 800c7ec: 189a adds r2, r3, r2 - 800c7ee: 68fb ldr r3, [r7, #12] - 800c7f0: 3304 adds r3, #4 - 800c7f2: 0019 movs r1, r3 - 800c7f4: 0010 movs r0, r2 - 800c7f6: f7fe fe8a bl 800b50e + 800d40e: 68fb ldr r3, [r7, #12] + 800d410: 6ada ldr r2, [r3, #44] ; 0x2c + 800d412: 4b2a ldr r3, [pc, #168] ; (800d4bc ) + 800d414: 681b ldr r3, [r3, #0] + 800d416: 429a cmp r2, r3 + 800d418: d903 bls.n 800d422 + 800d41a: 68fb ldr r3, [r7, #12] + 800d41c: 6ada ldr r2, [r3, #44] ; 0x2c + 800d41e: 4b27 ldr r3, [pc, #156] ; (800d4bc ) + 800d420: 601a str r2, [r3, #0] + 800d422: 68fb ldr r3, [r7, #12] + 800d424: 6ada ldr r2, [r3, #44] ; 0x2c + 800d426: 0013 movs r3, r2 + 800d428: 009b lsls r3, r3, #2 + 800d42a: 189b adds r3, r3, r2 + 800d42c: 009b lsls r3, r3, #2 + 800d42e: 4a24 ldr r2, [pc, #144] ; (800d4c0 ) + 800d430: 189a adds r2, r3, r2 + 800d432: 68fb ldr r3, [r7, #12] + 800d434: 3304 adds r3, #4 + 800d436: 0019 movs r1, r3 + 800d438: 0010 movs r0, r2 + 800d43a: f7fe fe8a bl 800c152 /* If the moved task has a priority higher than the current task then a yield must be performed. */ if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - 800c7fa: 68fb ldr r3, [r7, #12] - 800c7fc: 6ada ldr r2, [r3, #44] ; 0x2c - 800c7fe: 4b20 ldr r3, [pc, #128] ; (800c880 ) - 800c800: 681b ldr r3, [r3, #0] - 800c802: 6adb ldr r3, [r3, #44] ; 0x2c - 800c804: 429a cmp r2, r3 - 800c806: d302 bcc.n 800c80e + 800d43e: 68fb ldr r3, [r7, #12] + 800d440: 6ada ldr r2, [r3, #44] ; 0x2c + 800d442: 4b20 ldr r3, [pc, #128] ; (800d4c4 ) + 800d444: 681b ldr r3, [r3, #0] + 800d446: 6adb ldr r3, [r3, #44] ; 0x2c + 800d448: 429a cmp r2, r3 + 800d44a: d302 bcc.n 800d452 { xYieldPending = pdTRUE; - 800c808: 4b1e ldr r3, [pc, #120] ; (800c884 ) - 800c80a: 2201 movs r2, #1 - 800c80c: 601a str r2, [r3, #0] + 800d44c: 4b1e ldr r3, [pc, #120] ; (800d4c8 ) + 800d44e: 2201 movs r2, #1 + 800d450: 601a str r2, [r3, #0] while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE ) - 800c80e: 4b19 ldr r3, [pc, #100] ; (800c874 ) - 800c810: 681b ldr r3, [r3, #0] - 800c812: 2b00 cmp r3, #0 - 800c814: d1cb bne.n 800c7ae + 800d452: 4b19 ldr r3, [pc, #100] ; (800d4b8 ) + 800d454: 681b ldr r3, [r3, #0] + 800d456: 2b00 cmp r3, #0 + 800d458: d1cb bne.n 800d3f2 { mtCOVERAGE_TEST_MARKER(); } } if( pxTCB != NULL ) - 800c816: 68fb ldr r3, [r7, #12] - 800c818: 2b00 cmp r3, #0 - 800c81a: d001 beq.n 800c820 + 800d45a: 68fb ldr r3, [r7, #12] + 800d45c: 2b00 cmp r3, #0 + 800d45e: d001 beq.n 800d464 which may have prevented the next unblock time from being re-calculated, in which case re-calculate it now. Mainly important for low power tickless implementations, where this can prevent an unnecessary exit from low power state. */ prvResetNextTaskUnblockTime(); - 800c81c: f000 fb0c bl 800ce38 + 800d460: f000 fb0c bl 800da7c /* If any ticks occurred while the scheduler was suspended then they should be processed now. This ensures the tick count does not slip, and that any delayed tasks are resumed at the correct time. */ { TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */ - 800c820: 4b19 ldr r3, [pc, #100] ; (800c888 ) - 800c822: 681b ldr r3, [r3, #0] - 800c824: 607b str r3, [r7, #4] + 800d464: 4b19 ldr r3, [pc, #100] ; (800d4cc ) + 800d466: 681b ldr r3, [r3, #0] + 800d468: 607b str r3, [r7, #4] if( xPendedCounts > ( TickType_t ) 0U ) - 800c826: 687b ldr r3, [r7, #4] - 800c828: 2b00 cmp r3, #0 - 800c82a: d00f beq.n 800c84c + 800d46a: 687b ldr r3, [r7, #4] + 800d46c: 2b00 cmp r3, #0 + 800d46e: d00f beq.n 800d490 { do { if( xTaskIncrementTick() != pdFALSE ) - 800c82c: f000 f83c bl 800c8a8 - 800c830: 1e03 subs r3, r0, #0 - 800c832: d002 beq.n 800c83a + 800d470: f000 f83c bl 800d4ec + 800d474: 1e03 subs r3, r0, #0 + 800d476: d002 beq.n 800d47e { xYieldPending = pdTRUE; - 800c834: 4b13 ldr r3, [pc, #76] ; (800c884 ) - 800c836: 2201 movs r2, #1 - 800c838: 601a str r2, [r3, #0] + 800d478: 4b13 ldr r3, [pc, #76] ; (800d4c8 ) + 800d47a: 2201 movs r2, #1 + 800d47c: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } --xPendedCounts; - 800c83a: 687b ldr r3, [r7, #4] - 800c83c: 3b01 subs r3, #1 - 800c83e: 607b str r3, [r7, #4] + 800d47e: 687b ldr r3, [r7, #4] + 800d480: 3b01 subs r3, #1 + 800d482: 607b str r3, [r7, #4] } while( xPendedCounts > ( TickType_t ) 0U ); - 800c840: 687b ldr r3, [r7, #4] - 800c842: 2b00 cmp r3, #0 - 800c844: d1f2 bne.n 800c82c + 800d484: 687b ldr r3, [r7, #4] + 800d486: 2b00 cmp r3, #0 + 800d488: d1f2 bne.n 800d470 xPendedTicks = 0; - 800c846: 4b10 ldr r3, [pc, #64] ; (800c888 ) - 800c848: 2200 movs r2, #0 - 800c84a: 601a str r2, [r3, #0] + 800d48a: 4b10 ldr r3, [pc, #64] ; (800d4cc ) + 800d48c: 2200 movs r2, #0 + 800d48e: 601a str r2, [r3, #0] { mtCOVERAGE_TEST_MARKER(); } } if( xYieldPending != pdFALSE ) - 800c84c: 4b0d ldr r3, [pc, #52] ; (800c884 ) - 800c84e: 681b ldr r3, [r3, #0] - 800c850: 2b00 cmp r3, #0 - 800c852: d003 beq.n 800c85c + 800d490: 4b0d ldr r3, [pc, #52] ; (800d4c8 ) + 800d492: 681b ldr r3, [r3, #0] + 800d494: 2b00 cmp r3, #0 + 800d496: d003 beq.n 800d4a0 { #if( configUSE_PREEMPTION != 0 ) { xAlreadyYielded = pdTRUE; - 800c854: 2301 movs r3, #1 - 800c856: 60bb str r3, [r7, #8] + 800d498: 2301 movs r3, #1 + 800d49a: 60bb str r3, [r7, #8] } #endif taskYIELD_IF_USING_PREEMPTION(); - 800c858: f001 f92a bl 800dab0 + 800d49c: f001 f928 bl 800e6f0 else { mtCOVERAGE_TEST_MARKER(); } } taskEXIT_CRITICAL(); - 800c85c: f001 f94a bl 800daf4 + 800d4a0: f001 f948 bl 800e734 return xAlreadyYielded; - 800c860: 68bb ldr r3, [r7, #8] + 800d4a4: 68bb ldr r3, [r7, #8] } - 800c862: 0018 movs r0, r3 - 800c864: 46bd mov sp, r7 - 800c866: b004 add sp, #16 - 800c868: bd80 pop {r7, pc} - 800c86a: 46c0 nop ; (mov r8, r8) - 800c86c: 20001000 .word 0x20001000 - 800c870: 20000fd8 .word 0x20000fd8 - 800c874: 20000f98 .word 0x20000f98 - 800c878: 20000fe0 .word 0x20000fe0 - 800c87c: 20000b08 .word 0x20000b08 - 800c880: 20000b04 .word 0x20000b04 - 800c884: 20000fec .word 0x20000fec - 800c888: 20000fe8 .word 0x20000fe8 + 800d4a6: 0018 movs r0, r3 + 800d4a8: 46bd mov sp, r7 + 800d4aa: b004 add sp, #16 + 800d4ac: bd80 pop {r7, pc} + 800d4ae: 46c0 nop ; (mov r8, r8) + 800d4b0: 200010e0 .word 0x200010e0 + 800d4b4: 200010b8 .word 0x200010b8 + 800d4b8: 20001078 .word 0x20001078 + 800d4bc: 200010c0 .word 0x200010c0 + 800d4c0: 20000be8 .word 0x20000be8 + 800d4c4: 20000be4 .word 0x20000be4 + 800d4c8: 200010cc .word 0x200010cc + 800d4cc: 200010c8 .word 0x200010c8 -0800c88c : +0800d4d0 : /*-----------------------------------------------------------*/ TickType_t xTaskGetTickCount( void ) { - 800c88c: b580 push {r7, lr} - 800c88e: b082 sub sp, #8 - 800c890: af00 add r7, sp, #0 + 800d4d0: b580 push {r7, lr} + 800d4d2: b082 sub sp, #8 + 800d4d4: af00 add r7, sp, #0 TickType_t xTicks; /* Critical section required if running on a 16 bit processor. */ portTICK_TYPE_ENTER_CRITICAL(); { xTicks = xTickCount; - 800c892: 4b04 ldr r3, [pc, #16] ; (800c8a4 ) - 800c894: 681b ldr r3, [r3, #0] - 800c896: 607b str r3, [r7, #4] + 800d4d6: 4b04 ldr r3, [pc, #16] ; (800d4e8 ) + 800d4d8: 681b ldr r3, [r3, #0] + 800d4da: 607b str r3, [r7, #4] } portTICK_TYPE_EXIT_CRITICAL(); return xTicks; - 800c898: 687b ldr r3, [r7, #4] + 800d4dc: 687b ldr r3, [r7, #4] } - 800c89a: 0018 movs r0, r3 - 800c89c: 46bd mov sp, r7 - 800c89e: b002 add sp, #8 - 800c8a0: bd80 pop {r7, pc} - 800c8a2: 46c0 nop ; (mov r8, r8) - 800c8a4: 20000fdc .word 0x20000fdc + 800d4de: 0018 movs r0, r3 + 800d4e0: 46bd mov sp, r7 + 800d4e2: b002 add sp, #8 + 800d4e4: bd80 pop {r7, pc} + 800d4e6: 46c0 nop ; (mov r8, r8) + 800d4e8: 200010bc .word 0x200010bc -0800c8a8 : +0800d4ec : #endif /* INCLUDE_xTaskAbortDelay */ /*----------------------------------------------------------*/ BaseType_t xTaskIncrementTick( void ) { - 800c8a8: b580 push {r7, lr} - 800c8aa: b086 sub sp, #24 - 800c8ac: af00 add r7, sp, #0 + 800d4ec: b580 push {r7, lr} + 800d4ee: b086 sub sp, #24 + 800d4f0: af00 add r7, sp, #0 TCB_t * pxTCB; TickType_t xItemValue; BaseType_t xSwitchRequired = pdFALSE; - 800c8ae: 2300 movs r3, #0 - 800c8b0: 617b str r3, [r7, #20] + 800d4f2: 2300 movs r3, #0 + 800d4f4: 617b str r3, [r7, #20] /* Called by the portable layer each time a tick interrupt occurs. Increments the tick then checks to see if the new tick value will cause any tasks to be unblocked. */ traceTASK_INCREMENT_TICK( xTickCount ); if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) - 800c8b2: 4b4a ldr r3, [pc, #296] ; (800c9dc ) - 800c8b4: 681b ldr r3, [r3, #0] - 800c8b6: 2b00 cmp r3, #0 - 800c8b8: d000 beq.n 800c8bc - 800c8ba: e084 b.n 800c9c6 + 800d4f6: 4b4a ldr r3, [pc, #296] ; (800d620 ) + 800d4f8: 681b ldr r3, [r3, #0] + 800d4fa: 2b00 cmp r3, #0 + 800d4fc: d000 beq.n 800d500 + 800d4fe: e084 b.n 800d60a { /* Minor optimisation. The tick count cannot change in this block. */ const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; - 800c8bc: 4b48 ldr r3, [pc, #288] ; (800c9e0 ) - 800c8be: 681b ldr r3, [r3, #0] - 800c8c0: 3301 adds r3, #1 - 800c8c2: 613b str r3, [r7, #16] + 800d500: 4b48 ldr r3, [pc, #288] ; (800d624 ) + 800d502: 681b ldr r3, [r3, #0] + 800d504: 3301 adds r3, #1 + 800d506: 613b str r3, [r7, #16] /* Increment the RTOS tick, switching the delayed and overflowed delayed lists if it wraps to 0. */ xTickCount = xConstTickCount; - 800c8c4: 4b46 ldr r3, [pc, #280] ; (800c9e0 ) - 800c8c6: 693a ldr r2, [r7, #16] - 800c8c8: 601a str r2, [r3, #0] + 800d508: 4b46 ldr r3, [pc, #280] ; (800d624 ) + 800d50a: 693a ldr r2, [r7, #16] + 800d50c: 601a str r2, [r3, #0] if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */ - 800c8ca: 693b ldr r3, [r7, #16] - 800c8cc: 2b00 cmp r3, #0 - 800c8ce: d117 bne.n 800c900 + 800d50e: 693b ldr r3, [r7, #16] + 800d510: 2b00 cmp r3, #0 + 800d512: d117 bne.n 800d544 { taskSWITCH_DELAYED_LISTS(); - 800c8d0: 4b44 ldr r3, [pc, #272] ; (800c9e4 ) - 800c8d2: 681b ldr r3, [r3, #0] - 800c8d4: 681b ldr r3, [r3, #0] - 800c8d6: 2b00 cmp r3, #0 - 800c8d8: d001 beq.n 800c8de - 800c8da: b672 cpsid i - 800c8dc: e7fe b.n 800c8dc - 800c8de: 4b41 ldr r3, [pc, #260] ; (800c9e4 ) - 800c8e0: 681b ldr r3, [r3, #0] - 800c8e2: 60fb str r3, [r7, #12] - 800c8e4: 4b40 ldr r3, [pc, #256] ; (800c9e8 ) - 800c8e6: 681a ldr r2, [r3, #0] - 800c8e8: 4b3e ldr r3, [pc, #248] ; (800c9e4 ) - 800c8ea: 601a str r2, [r3, #0] - 800c8ec: 4b3e ldr r3, [pc, #248] ; (800c9e8 ) - 800c8ee: 68fa ldr r2, [r7, #12] - 800c8f0: 601a str r2, [r3, #0] - 800c8f2: 4b3e ldr r3, [pc, #248] ; (800c9ec ) - 800c8f4: 681b ldr r3, [r3, #0] - 800c8f6: 1c5a adds r2, r3, #1 - 800c8f8: 4b3c ldr r3, [pc, #240] ; (800c9ec ) - 800c8fa: 601a str r2, [r3, #0] - 800c8fc: f000 fa9c bl 800ce38 + 800d514: 4b44 ldr r3, [pc, #272] ; (800d628 ) + 800d516: 681b ldr r3, [r3, #0] + 800d518: 681b ldr r3, [r3, #0] + 800d51a: 2b00 cmp r3, #0 + 800d51c: d001 beq.n 800d522 + 800d51e: b672 cpsid i + 800d520: e7fe b.n 800d520 + 800d522: 4b41 ldr r3, [pc, #260] ; (800d628 ) + 800d524: 681b ldr r3, [r3, #0] + 800d526: 60fb str r3, [r7, #12] + 800d528: 4b40 ldr r3, [pc, #256] ; (800d62c ) + 800d52a: 681a ldr r2, [r3, #0] + 800d52c: 4b3e ldr r3, [pc, #248] ; (800d628 ) + 800d52e: 601a str r2, [r3, #0] + 800d530: 4b3e ldr r3, [pc, #248] ; (800d62c ) + 800d532: 68fa ldr r2, [r7, #12] + 800d534: 601a str r2, [r3, #0] + 800d536: 4b3e ldr r3, [pc, #248] ; (800d630 ) + 800d538: 681b ldr r3, [r3, #0] + 800d53a: 1c5a adds r2, r3, #1 + 800d53c: 4b3c ldr r3, [pc, #240] ; (800d630 ) + 800d53e: 601a str r2, [r3, #0] + 800d540: f000 fa9c bl 800da7c /* See if this tick has made a timeout expire. Tasks are stored in the queue in the order of their wake time - meaning once one task has been found whose block time has not expired there is no need to look any further down the list. */ if( xConstTickCount >= xNextTaskUnblockTime ) - 800c900: 4b3b ldr r3, [pc, #236] ; (800c9f0 ) - 800c902: 681b ldr r3, [r3, #0] - 800c904: 693a ldr r2, [r7, #16] - 800c906: 429a cmp r2, r3 - 800c908: d349 bcc.n 800c99e + 800d544: 4b3b ldr r3, [pc, #236] ; (800d634 ) + 800d546: 681b ldr r3, [r3, #0] + 800d548: 693a ldr r2, [r7, #16] + 800d54a: 429a cmp r2, r3 + 800d54c: d349 bcc.n 800d5e2 { for( ;; ) { if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) - 800c90a: 4b36 ldr r3, [pc, #216] ; (800c9e4 ) - 800c90c: 681b ldr r3, [r3, #0] - 800c90e: 681b ldr r3, [r3, #0] - 800c910: 2b00 cmp r3, #0 - 800c912: d104 bne.n 800c91e + 800d54e: 4b36 ldr r3, [pc, #216] ; (800d628 ) + 800d550: 681b ldr r3, [r3, #0] + 800d552: 681b ldr r3, [r3, #0] + 800d554: 2b00 cmp r3, #0 + 800d556: d104 bne.n 800d562 /* The delayed list is empty. Set xNextTaskUnblockTime to the maximum possible value so it is extremely unlikely that the if( xTickCount >= xNextTaskUnblockTime ) test will pass next time through. */ xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ - 800c914: 4b36 ldr r3, [pc, #216] ; (800c9f0 ) - 800c916: 2201 movs r2, #1 - 800c918: 4252 negs r2, r2 - 800c91a: 601a str r2, [r3, #0] + 800d558: 4b36 ldr r3, [pc, #216] ; (800d634 ) + 800d55a: 2201 movs r2, #1 + 800d55c: 4252 negs r2, r2 + 800d55e: 601a str r2, [r3, #0] break; - 800c91c: e03f b.n 800c99e + 800d560: e03f b.n 800d5e2 { /* The delayed list is not empty, get the value of the item at the head of the delayed list. This is the time at which the task at the head of the delayed list must be removed from the Blocked state. */ pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ - 800c91e: 4b31 ldr r3, [pc, #196] ; (800c9e4 ) - 800c920: 681b ldr r3, [r3, #0] - 800c922: 68db ldr r3, [r3, #12] - 800c924: 68db ldr r3, [r3, #12] - 800c926: 60bb str r3, [r7, #8] + 800d562: 4b31 ldr r3, [pc, #196] ; (800d628 ) + 800d564: 681b ldr r3, [r3, #0] + 800d566: 68db ldr r3, [r3, #12] + 800d568: 68db ldr r3, [r3, #12] + 800d56a: 60bb str r3, [r7, #8] xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) ); - 800c928: 68bb ldr r3, [r7, #8] - 800c92a: 685b ldr r3, [r3, #4] - 800c92c: 607b str r3, [r7, #4] + 800d56c: 68bb ldr r3, [r7, #8] + 800d56e: 685b ldr r3, [r3, #4] + 800d570: 607b str r3, [r7, #4] if( xConstTickCount < xItemValue ) - 800c92e: 693a ldr r2, [r7, #16] - 800c930: 687b ldr r3, [r7, #4] - 800c932: 429a cmp r2, r3 - 800c934: d203 bcs.n 800c93e + 800d572: 693a ldr r2, [r7, #16] + 800d574: 687b ldr r3, [r7, #4] + 800d576: 429a cmp r2, r3 + 800d578: d203 bcs.n 800d582 /* It is not time to unblock this item yet, but the item value is the time at which the task at the head of the blocked list must be removed from the Blocked state - so record the item value in xNextTaskUnblockTime. */ xNextTaskUnblockTime = xItemValue; - 800c936: 4b2e ldr r3, [pc, #184] ; (800c9f0 ) - 800c938: 687a ldr r2, [r7, #4] - 800c93a: 601a str r2, [r3, #0] + 800d57a: 4b2e ldr r3, [pc, #184] ; (800d634 ) + 800d57c: 687a ldr r2, [r7, #4] + 800d57e: 601a str r2, [r3, #0] break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */ - 800c93c: e02f b.n 800c99e + 800d580: e02f b.n 800d5e2 { mtCOVERAGE_TEST_MARKER(); } /* It is time to remove the item from the Blocked state. */ ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); - 800c93e: 68bb ldr r3, [r7, #8] - 800c940: 3304 adds r3, #4 - 800c942: 0018 movs r0, r3 - 800c944: f7fe fe3b bl 800b5be + 800d582: 68bb ldr r3, [r7, #8] + 800d584: 3304 adds r3, #4 + 800d586: 0018 movs r0, r3 + 800d588: f7fe fe3b bl 800c202 /* Is the task waiting on an event also? If so remove it from the event list. */ if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL ) - 800c948: 68bb ldr r3, [r7, #8] - 800c94a: 6a9b ldr r3, [r3, #40] ; 0x28 - 800c94c: 2b00 cmp r3, #0 - 800c94e: d004 beq.n 800c95a + 800d58c: 68bb ldr r3, [r7, #8] + 800d58e: 6a9b ldr r3, [r3, #40] ; 0x28 + 800d590: 2b00 cmp r3, #0 + 800d592: d004 beq.n 800d59e { ( void ) uxListRemove( &( pxTCB->xEventListItem ) ); - 800c950: 68bb ldr r3, [r7, #8] - 800c952: 3318 adds r3, #24 - 800c954: 0018 movs r0, r3 - 800c956: f7fe fe32 bl 800b5be + 800d594: 68bb ldr r3, [r7, #8] + 800d596: 3318 adds r3, #24 + 800d598: 0018 movs r0, r3 + 800d59a: f7fe fe32 bl 800c202 mtCOVERAGE_TEST_MARKER(); } /* Place the unblocked task into the appropriate ready list. */ prvAddTaskToReadyList( pxTCB ); - 800c95a: 68bb ldr r3, [r7, #8] - 800c95c: 6ada ldr r2, [r3, #44] ; 0x2c - 800c95e: 4b25 ldr r3, [pc, #148] ; (800c9f4 ) - 800c960: 681b ldr r3, [r3, #0] - 800c962: 429a cmp r2, r3 - 800c964: d903 bls.n 800c96e - 800c966: 68bb ldr r3, [r7, #8] - 800c968: 6ada ldr r2, [r3, #44] ; 0x2c - 800c96a: 4b22 ldr r3, [pc, #136] ; (800c9f4 ) - 800c96c: 601a str r2, [r3, #0] - 800c96e: 68bb ldr r3, [r7, #8] - 800c970: 6ada ldr r2, [r3, #44] ; 0x2c - 800c972: 0013 movs r3, r2 - 800c974: 009b lsls r3, r3, #2 - 800c976: 189b adds r3, r3, r2 - 800c978: 009b lsls r3, r3, #2 - 800c97a: 4a1f ldr r2, [pc, #124] ; (800c9f8 ) - 800c97c: 189a adds r2, r3, r2 - 800c97e: 68bb ldr r3, [r7, #8] - 800c980: 3304 adds r3, #4 - 800c982: 0019 movs r1, r3 - 800c984: 0010 movs r0, r2 - 800c986: f7fe fdc2 bl 800b50e + 800d59e: 68bb ldr r3, [r7, #8] + 800d5a0: 6ada ldr r2, [r3, #44] ; 0x2c + 800d5a2: 4b25 ldr r3, [pc, #148] ; (800d638 ) + 800d5a4: 681b ldr r3, [r3, #0] + 800d5a6: 429a cmp r2, r3 + 800d5a8: d903 bls.n 800d5b2 + 800d5aa: 68bb ldr r3, [r7, #8] + 800d5ac: 6ada ldr r2, [r3, #44] ; 0x2c + 800d5ae: 4b22 ldr r3, [pc, #136] ; (800d638 ) + 800d5b0: 601a str r2, [r3, #0] + 800d5b2: 68bb ldr r3, [r7, #8] + 800d5b4: 6ada ldr r2, [r3, #44] ; 0x2c + 800d5b6: 0013 movs r3, r2 + 800d5b8: 009b lsls r3, r3, #2 + 800d5ba: 189b adds r3, r3, r2 + 800d5bc: 009b lsls r3, r3, #2 + 800d5be: 4a1f ldr r2, [pc, #124] ; (800d63c ) + 800d5c0: 189a adds r2, r3, r2 + 800d5c2: 68bb ldr r3, [r7, #8] + 800d5c4: 3304 adds r3, #4 + 800d5c6: 0019 movs r1, r3 + 800d5c8: 0010 movs r0, r2 + 800d5ca: f7fe fdc2 bl 800c152 { /* Preemption is on, but a context switch should only be performed if the unblocked task has a priority that is equal to or higher than the currently executing task. */ if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) - 800c98a: 68bb ldr r3, [r7, #8] - 800c98c: 6ada ldr r2, [r3, #44] ; 0x2c - 800c98e: 4b1b ldr r3, [pc, #108] ; (800c9fc ) - 800c990: 681b ldr r3, [r3, #0] - 800c992: 6adb ldr r3, [r3, #44] ; 0x2c - 800c994: 429a cmp r2, r3 - 800c996: d3b8 bcc.n 800c90a + 800d5ce: 68bb ldr r3, [r7, #8] + 800d5d0: 6ada ldr r2, [r3, #44] ; 0x2c + 800d5d2: 4b1b ldr r3, [pc, #108] ; (800d640 ) + 800d5d4: 681b ldr r3, [r3, #0] + 800d5d6: 6adb ldr r3, [r3, #44] ; 0x2c + 800d5d8: 429a cmp r2, r3 + 800d5da: d3b8 bcc.n 800d54e { xSwitchRequired = pdTRUE; - 800c998: 2301 movs r3, #1 - 800c99a: 617b str r3, [r7, #20] + 800d5dc: 2301 movs r3, #1 + 800d5de: 617b str r3, [r7, #20] if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) - 800c99c: e7b5 b.n 800c90a + 800d5e0: e7b5 b.n 800d54e /* Tasks of equal priority to the currently running task will share processing time (time slice) if preemption is on, and the application writer has not explicitly turned time slicing off. */ #if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) { if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 ) - 800c99e: 4b17 ldr r3, [pc, #92] ; (800c9fc ) - 800c9a0: 681b ldr r3, [r3, #0] - 800c9a2: 6ada ldr r2, [r3, #44] ; 0x2c - 800c9a4: 4914 ldr r1, [pc, #80] ; (800c9f8 ) - 800c9a6: 0013 movs r3, r2 - 800c9a8: 009b lsls r3, r3, #2 - 800c9aa: 189b adds r3, r3, r2 - 800c9ac: 009b lsls r3, r3, #2 - 800c9ae: 585b ldr r3, [r3, r1] - 800c9b0: 2b01 cmp r3, #1 - 800c9b2: d901 bls.n 800c9b8 + 800d5e2: 4b17 ldr r3, [pc, #92] ; (800d640 ) + 800d5e4: 681b ldr r3, [r3, #0] + 800d5e6: 6ada ldr r2, [r3, #44] ; 0x2c + 800d5e8: 4914 ldr r1, [pc, #80] ; (800d63c ) + 800d5ea: 0013 movs r3, r2 + 800d5ec: 009b lsls r3, r3, #2 + 800d5ee: 189b adds r3, r3, r2 + 800d5f0: 009b lsls r3, r3, #2 + 800d5f2: 585b ldr r3, [r3, r1] + 800d5f4: 2b01 cmp r3, #1 + 800d5f6: d901 bls.n 800d5fc { xSwitchRequired = pdTRUE; - 800c9b4: 2301 movs r3, #1 - 800c9b6: 617b str r3, [r7, #20] + 800d5f8: 2301 movs r3, #1 + 800d5fa: 617b str r3, [r7, #20] } #endif /* configUSE_TICK_HOOK */ #if ( configUSE_PREEMPTION == 1 ) { if( xYieldPending != pdFALSE ) - 800c9b8: 4b11 ldr r3, [pc, #68] ; (800ca00 ) - 800c9ba: 681b ldr r3, [r3, #0] - 800c9bc: 2b00 cmp r3, #0 - 800c9be: d007 beq.n 800c9d0 + 800d5fc: 4b11 ldr r3, [pc, #68] ; (800d644 ) + 800d5fe: 681b ldr r3, [r3, #0] + 800d600: 2b00 cmp r3, #0 + 800d602: d007 beq.n 800d614 { xSwitchRequired = pdTRUE; - 800c9c0: 2301 movs r3, #1 - 800c9c2: 617b str r3, [r7, #20] - 800c9c4: e004 b.n 800c9d0 + 800d604: 2301 movs r3, #1 + 800d606: 617b str r3, [r7, #20] + 800d608: e004 b.n 800d614 } #endif /* configUSE_PREEMPTION */ } else { ++xPendedTicks; - 800c9c6: 4b0f ldr r3, [pc, #60] ; (800ca04 ) - 800c9c8: 681b ldr r3, [r3, #0] - 800c9ca: 1c5a adds r2, r3, #1 - 800c9cc: 4b0d ldr r3, [pc, #52] ; (800ca04 ) - 800c9ce: 601a str r2, [r3, #0] + 800d60a: 4b0f ldr r3, [pc, #60] ; (800d648 ) + 800d60c: 681b ldr r3, [r3, #0] + 800d60e: 1c5a adds r2, r3, #1 + 800d610: 4b0d ldr r3, [pc, #52] ; (800d648 ) + 800d612: 601a str r2, [r3, #0] vApplicationTickHook(); } #endif } return xSwitchRequired; - 800c9d0: 697b ldr r3, [r7, #20] + 800d614: 697b ldr r3, [r7, #20] } - 800c9d2: 0018 movs r0, r3 - 800c9d4: 46bd mov sp, r7 - 800c9d6: b006 add sp, #24 - 800c9d8: bd80 pop {r7, pc} - 800c9da: 46c0 nop ; (mov r8, r8) - 800c9dc: 20001000 .word 0x20001000 - 800c9e0: 20000fdc .word 0x20000fdc - 800c9e4: 20000f90 .word 0x20000f90 - 800c9e8: 20000f94 .word 0x20000f94 - 800c9ec: 20000ff0 .word 0x20000ff0 - 800c9f0: 20000ff8 .word 0x20000ff8 - 800c9f4: 20000fe0 .word 0x20000fe0 - 800c9f8: 20000b08 .word 0x20000b08 - 800c9fc: 20000b04 .word 0x20000b04 - 800ca00: 20000fec .word 0x20000fec - 800ca04: 20000fe8 .word 0x20000fe8 + 800d616: 0018 movs r0, r3 + 800d618: 46bd mov sp, r7 + 800d61a: b006 add sp, #24 + 800d61c: bd80 pop {r7, pc} + 800d61e: 46c0 nop ; (mov r8, r8) + 800d620: 200010e0 .word 0x200010e0 + 800d624: 200010bc .word 0x200010bc + 800d628: 20001070 .word 0x20001070 + 800d62c: 20001074 .word 0x20001074 + 800d630: 200010d0 .word 0x200010d0 + 800d634: 200010d8 .word 0x200010d8 + 800d638: 200010c0 .word 0x200010c0 + 800d63c: 20000be8 .word 0x20000be8 + 800d640: 20000be4 .word 0x20000be4 + 800d644: 200010cc .word 0x200010cc + 800d648: 200010c8 .word 0x200010c8 -0800ca08 : +0800d64c : #endif /* configUSE_APPLICATION_TASK_TAG */ /*-----------------------------------------------------------*/ void vTaskSwitchContext( void ) { - 800ca08: b580 push {r7, lr} - 800ca0a: b082 sub sp, #8 - 800ca0c: af00 add r7, sp, #0 + 800d64c: b580 push {r7, lr} + 800d64e: b082 sub sp, #8 + 800d650: af00 add r7, sp, #0 if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE ) - 800ca0e: 4b25 ldr r3, [pc, #148] ; (800caa4 ) - 800ca10: 681b ldr r3, [r3, #0] - 800ca12: 2b00 cmp r3, #0 - 800ca14: d003 beq.n 800ca1e + 800d652: 4b25 ldr r3, [pc, #148] ; (800d6e8 ) + 800d654: 681b ldr r3, [r3, #0] + 800d656: 2b00 cmp r3, #0 + 800d658: d003 beq.n 800d662 { /* The scheduler is currently suspended - do not allow a context switch. */ xYieldPending = pdTRUE; - 800ca16: 4b24 ldr r3, [pc, #144] ; (800caa8 ) - 800ca18: 2201 movs r2, #1 - 800ca1a: 601a str r2, [r3, #0] + 800d65a: 4b24 ldr r3, [pc, #144] ; (800d6ec ) + 800d65c: 2201 movs r2, #1 + 800d65e: 601a str r2, [r3, #0] for additional information. */ _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); } #endif /* configUSE_NEWLIB_REENTRANT */ } } - 800ca1c: e03d b.n 800ca9a + 800d660: e03d b.n 800d6de xYieldPending = pdFALSE; - 800ca1e: 4b22 ldr r3, [pc, #136] ; (800caa8 ) - 800ca20: 2200 movs r2, #0 - 800ca22: 601a str r2, [r3, #0] + 800d662: 4b22 ldr r3, [pc, #136] ; (800d6ec ) + 800d664: 2200 movs r2, #0 + 800d666: 601a str r2, [r3, #0] taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ - 800ca24: 4b21 ldr r3, [pc, #132] ; (800caac ) - 800ca26: 681b ldr r3, [r3, #0] - 800ca28: 607b str r3, [r7, #4] - 800ca2a: e007 b.n 800ca3c - 800ca2c: 687b ldr r3, [r7, #4] - 800ca2e: 2b00 cmp r3, #0 - 800ca30: d101 bne.n 800ca36 - 800ca32: b672 cpsid i - 800ca34: e7fe b.n 800ca34 - 800ca36: 687b ldr r3, [r7, #4] - 800ca38: 3b01 subs r3, #1 - 800ca3a: 607b str r3, [r7, #4] - 800ca3c: 491c ldr r1, [pc, #112] ; (800cab0 ) - 800ca3e: 687a ldr r2, [r7, #4] - 800ca40: 0013 movs r3, r2 - 800ca42: 009b lsls r3, r3, #2 - 800ca44: 189b adds r3, r3, r2 - 800ca46: 009b lsls r3, r3, #2 - 800ca48: 585b ldr r3, [r3, r1] - 800ca4a: 2b00 cmp r3, #0 - 800ca4c: d0ee beq.n 800ca2c - 800ca4e: 687a ldr r2, [r7, #4] - 800ca50: 0013 movs r3, r2 - 800ca52: 009b lsls r3, r3, #2 - 800ca54: 189b adds r3, r3, r2 - 800ca56: 009b lsls r3, r3, #2 - 800ca58: 4a15 ldr r2, [pc, #84] ; (800cab0 ) - 800ca5a: 189b adds r3, r3, r2 - 800ca5c: 603b str r3, [r7, #0] - 800ca5e: 683b ldr r3, [r7, #0] - 800ca60: 685b ldr r3, [r3, #4] - 800ca62: 685a ldr r2, [r3, #4] - 800ca64: 683b ldr r3, [r7, #0] - 800ca66: 605a str r2, [r3, #4] - 800ca68: 683b ldr r3, [r7, #0] - 800ca6a: 685a ldr r2, [r3, #4] - 800ca6c: 683b ldr r3, [r7, #0] - 800ca6e: 3308 adds r3, #8 - 800ca70: 429a cmp r2, r3 - 800ca72: d104 bne.n 800ca7e - 800ca74: 683b ldr r3, [r7, #0] - 800ca76: 685b ldr r3, [r3, #4] - 800ca78: 685a ldr r2, [r3, #4] - 800ca7a: 683b ldr r3, [r7, #0] - 800ca7c: 605a str r2, [r3, #4] - 800ca7e: 683b ldr r3, [r7, #0] - 800ca80: 685b ldr r3, [r3, #4] - 800ca82: 68da ldr r2, [r3, #12] - 800ca84: 4b0b ldr r3, [pc, #44] ; (800cab4 ) - 800ca86: 601a str r2, [r3, #0] - 800ca88: 4b08 ldr r3, [pc, #32] ; (800caac ) - 800ca8a: 687a ldr r2, [r7, #4] - 800ca8c: 601a str r2, [r3, #0] + 800d668: 4b21 ldr r3, [pc, #132] ; (800d6f0 ) + 800d66a: 681b ldr r3, [r3, #0] + 800d66c: 607b str r3, [r7, #4] + 800d66e: e007 b.n 800d680 + 800d670: 687b ldr r3, [r7, #4] + 800d672: 2b00 cmp r3, #0 + 800d674: d101 bne.n 800d67a + 800d676: b672 cpsid i + 800d678: e7fe b.n 800d678 + 800d67a: 687b ldr r3, [r7, #4] + 800d67c: 3b01 subs r3, #1 + 800d67e: 607b str r3, [r7, #4] + 800d680: 491c ldr r1, [pc, #112] ; (800d6f4 ) + 800d682: 687a ldr r2, [r7, #4] + 800d684: 0013 movs r3, r2 + 800d686: 009b lsls r3, r3, #2 + 800d688: 189b adds r3, r3, r2 + 800d68a: 009b lsls r3, r3, #2 + 800d68c: 585b ldr r3, [r3, r1] + 800d68e: 2b00 cmp r3, #0 + 800d690: d0ee beq.n 800d670 + 800d692: 687a ldr r2, [r7, #4] + 800d694: 0013 movs r3, r2 + 800d696: 009b lsls r3, r3, #2 + 800d698: 189b adds r3, r3, r2 + 800d69a: 009b lsls r3, r3, #2 + 800d69c: 4a15 ldr r2, [pc, #84] ; (800d6f4 ) + 800d69e: 189b adds r3, r3, r2 + 800d6a0: 603b str r3, [r7, #0] + 800d6a2: 683b ldr r3, [r7, #0] + 800d6a4: 685b ldr r3, [r3, #4] + 800d6a6: 685a ldr r2, [r3, #4] + 800d6a8: 683b ldr r3, [r7, #0] + 800d6aa: 605a str r2, [r3, #4] + 800d6ac: 683b ldr r3, [r7, #0] + 800d6ae: 685a ldr r2, [r3, #4] + 800d6b0: 683b ldr r3, [r7, #0] + 800d6b2: 3308 adds r3, #8 + 800d6b4: 429a cmp r2, r3 + 800d6b6: d104 bne.n 800d6c2 + 800d6b8: 683b ldr r3, [r7, #0] + 800d6ba: 685b ldr r3, [r3, #4] + 800d6bc: 685a ldr r2, [r3, #4] + 800d6be: 683b ldr r3, [r7, #0] + 800d6c0: 605a str r2, [r3, #4] + 800d6c2: 683b ldr r3, [r7, #0] + 800d6c4: 685b ldr r3, [r3, #4] + 800d6c6: 68da ldr r2, [r3, #12] + 800d6c8: 4b0b ldr r3, [pc, #44] ; (800d6f8 ) + 800d6ca: 601a str r2, [r3, #0] + 800d6cc: 4b08 ldr r3, [pc, #32] ; (800d6f0 ) + 800d6ce: 687a ldr r2, [r7, #4] + 800d6d0: 601a str r2, [r3, #0] _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); - 800ca8e: 4b09 ldr r3, [pc, #36] ; (800cab4 ) - 800ca90: 681b ldr r3, [r3, #0] - 800ca92: 3354 adds r3, #84 ; 0x54 - 800ca94: 001a movs r2, r3 - 800ca96: 4b08 ldr r3, [pc, #32] ; (800cab8 ) - 800ca98: 601a str r2, [r3, #0] + 800d6d2: 4b09 ldr r3, [pc, #36] ; (800d6f8 ) + 800d6d4: 681b ldr r3, [r3, #0] + 800d6d6: 3354 adds r3, #84 ; 0x54 + 800d6d8: 001a movs r2, r3 + 800d6da: 4b08 ldr r3, [pc, #32] ; (800d6fc ) + 800d6dc: 601a str r2, [r3, #0] } - 800ca9a: 46c0 nop ; (mov r8, r8) - 800ca9c: 46bd mov sp, r7 - 800ca9e: b002 add sp, #8 - 800caa0: bd80 pop {r7, pc} - 800caa2: 46c0 nop ; (mov r8, r8) - 800caa4: 20001000 .word 0x20001000 - 800caa8: 20000fec .word 0x20000fec - 800caac: 20000fe0 .word 0x20000fe0 - 800cab0: 20000b08 .word 0x20000b08 - 800cab4: 20000b04 .word 0x20000b04 - 800cab8: 20000050 .word 0x20000050 + 800d6de: 46c0 nop ; (mov r8, r8) + 800d6e0: 46bd mov sp, r7 + 800d6e2: b002 add sp, #8 + 800d6e4: bd80 pop {r7, pc} + 800d6e6: 46c0 nop ; (mov r8, r8) + 800d6e8: 200010e0 .word 0x200010e0 + 800d6ec: 200010cc .word 0x200010cc + 800d6f0: 200010c0 .word 0x200010c0 + 800d6f4: 20000be8 .word 0x20000be8 + 800d6f8: 20000be4 .word 0x20000be4 + 800d6fc: 20000050 .word 0x20000050 -0800cabc : +0800d700 : /*-----------------------------------------------------------*/ void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) { - 800cabc: b580 push {r7, lr} - 800cabe: b082 sub sp, #8 - 800cac0: af00 add r7, sp, #0 - 800cac2: 6078 str r0, [r7, #4] - 800cac4: 6039 str r1, [r7, #0] + 800d700: b580 push {r7, lr} + 800d702: b082 sub sp, #8 + 800d704: af00 add r7, sp, #0 + 800d706: 6078 str r0, [r7, #4] + 800d708: 6039 str r1, [r7, #0] configASSERT( pxEventList ); - 800cac6: 687b ldr r3, [r7, #4] - 800cac8: 2b00 cmp r3, #0 - 800caca: d101 bne.n 800cad0 - 800cacc: b672 cpsid i - 800cace: e7fe b.n 800cace + 800d70a: 687b ldr r3, [r7, #4] + 800d70c: 2b00 cmp r3, #0 + 800d70e: d101 bne.n 800d714 + 800d710: b672 cpsid i + 800d712: e7fe b.n 800d712 /* Place the event list item of the TCB in the appropriate event list. This is placed in the list in priority order so the highest priority task is the first to be woken by the event. The queue that contains the event list is locked, preventing simultaneous access from interrupts. */ vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) ); - 800cad0: 4b08 ldr r3, [pc, #32] ; (800caf4 ) - 800cad2: 681b ldr r3, [r3, #0] - 800cad4: 3318 adds r3, #24 - 800cad6: 001a movs r2, r3 - 800cad8: 687b ldr r3, [r7, #4] - 800cada: 0011 movs r1, r2 - 800cadc: 0018 movs r0, r3 - 800cade: f7fe fd38 bl 800b552 + 800d714: 4b08 ldr r3, [pc, #32] ; (800d738 ) + 800d716: 681b ldr r3, [r3, #0] + 800d718: 3318 adds r3, #24 + 800d71a: 001a movs r2, r3 + 800d71c: 687b ldr r3, [r7, #4] + 800d71e: 0011 movs r1, r2 + 800d720: 0018 movs r0, r3 + 800d722: f7fe fd38 bl 800c196 prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE ); - 800cae2: 683b ldr r3, [r7, #0] - 800cae4: 2101 movs r1, #1 - 800cae6: 0018 movs r0, r3 - 800cae8: f000 fb34 bl 800d154 + 800d726: 683b ldr r3, [r7, #0] + 800d728: 2101 movs r1, #1 + 800d72a: 0018 movs r0, r3 + 800d72c: f000 fb34 bl 800dd98 } - 800caec: 46c0 nop ; (mov r8, r8) - 800caee: 46bd mov sp, r7 - 800caf0: b002 add sp, #8 - 800caf2: bd80 pop {r7, pc} - 800caf4: 20000b04 .word 0x20000b04 + 800d730: 46c0 nop ; (mov r8, r8) + 800d732: 46bd mov sp, r7 + 800d734: b002 add sp, #8 + 800d736: bd80 pop {r7, pc} + 800d738: 20000be4 .word 0x20000be4 -0800caf8 : +0800d73c : /*-----------------------------------------------------------*/ #if( configUSE_TIMERS == 1 ) void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) { - 800caf8: b580 push {r7, lr} - 800cafa: b084 sub sp, #16 - 800cafc: af00 add r7, sp, #0 - 800cafe: 60f8 str r0, [r7, #12] - 800cb00: 60b9 str r1, [r7, #8] - 800cb02: 607a str r2, [r7, #4] + 800d73c: b580 push {r7, lr} + 800d73e: b084 sub sp, #16 + 800d740: af00 add r7, sp, #0 + 800d742: 60f8 str r0, [r7, #12] + 800d744: 60b9 str r1, [r7, #8] + 800d746: 607a str r2, [r7, #4] configASSERT( pxEventList ); - 800cb04: 68fb ldr r3, [r7, #12] - 800cb06: 2b00 cmp r3, #0 - 800cb08: d101 bne.n 800cb0e - 800cb0a: b672 cpsid i - 800cb0c: e7fe b.n 800cb0c + 800d748: 68fb ldr r3, [r7, #12] + 800d74a: 2b00 cmp r3, #0 + 800d74c: d101 bne.n 800d752 + 800d74e: b672 cpsid i + 800d750: e7fe b.n 800d750 /* Place the event list item of the TCB in the appropriate event list. In this case it is assume that this is the only task that is going to be waiting on this event list, so the faster vListInsertEnd() function can be used in place of vListInsert. */ vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) ); - 800cb0e: 4b0c ldr r3, [pc, #48] ; (800cb40 ) - 800cb10: 681b ldr r3, [r3, #0] - 800cb12: 3318 adds r3, #24 - 800cb14: 001a movs r2, r3 - 800cb16: 68fb ldr r3, [r7, #12] - 800cb18: 0011 movs r1, r2 - 800cb1a: 0018 movs r0, r3 - 800cb1c: f7fe fcf7 bl 800b50e + 800d752: 4b0c ldr r3, [pc, #48] ; (800d784 ) + 800d754: 681b ldr r3, [r3, #0] + 800d756: 3318 adds r3, #24 + 800d758: 001a movs r2, r3 + 800d75a: 68fb ldr r3, [r7, #12] + 800d75c: 0011 movs r1, r2 + 800d75e: 0018 movs r0, r3 + 800d760: f7fe fcf7 bl 800c152 /* If the task should block indefinitely then set the block time to a value that will be recognised as an indefinite delay inside the prvAddCurrentTaskToDelayedList() function. */ if( xWaitIndefinitely != pdFALSE ) - 800cb20: 687b ldr r3, [r7, #4] - 800cb22: 2b00 cmp r3, #0 - 800cb24: d002 beq.n 800cb2c + 800d764: 687b ldr r3, [r7, #4] + 800d766: 2b00 cmp r3, #0 + 800d768: d002 beq.n 800d770 { xTicksToWait = portMAX_DELAY; - 800cb26: 2301 movs r3, #1 - 800cb28: 425b negs r3, r3 - 800cb2a: 60bb str r3, [r7, #8] + 800d76a: 2301 movs r3, #1 + 800d76c: 425b negs r3, r3 + 800d76e: 60bb str r3, [r7, #8] } traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) ); prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely ); - 800cb2c: 687a ldr r2, [r7, #4] - 800cb2e: 68bb ldr r3, [r7, #8] - 800cb30: 0011 movs r1, r2 - 800cb32: 0018 movs r0, r3 - 800cb34: f000 fb0e bl 800d154 + 800d770: 687a ldr r2, [r7, #4] + 800d772: 68bb ldr r3, [r7, #8] + 800d774: 0011 movs r1, r2 + 800d776: 0018 movs r0, r3 + 800d778: f000 fb0e bl 800dd98 } - 800cb38: 46c0 nop ; (mov r8, r8) - 800cb3a: 46bd mov sp, r7 - 800cb3c: b004 add sp, #16 - 800cb3e: bd80 pop {r7, pc} - 800cb40: 20000b04 .word 0x20000b04 + 800d77c: 46c0 nop ; (mov r8, r8) + 800d77e: 46bd mov sp, r7 + 800d780: b004 add sp, #16 + 800d782: bd80 pop {r7, pc} + 800d784: 20000be4 .word 0x20000be4 -0800cb44 : +0800d788 : #endif /* configUSE_TIMERS */ /*-----------------------------------------------------------*/ BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) { - 800cb44: b580 push {r7, lr} - 800cb46: b084 sub sp, #16 - 800cb48: af00 add r7, sp, #0 - 800cb4a: 6078 str r0, [r7, #4] + 800d788: b580 push {r7, lr} + 800d78a: b084 sub sp, #16 + 800d78c: af00 add r7, sp, #0 + 800d78e: 6078 str r0, [r7, #4] get called - the lock count on the queue will get modified instead. This means exclusive access to the event list is guaranteed here. This function assumes that a check has already been made to ensure that pxEventList is not empty. */ pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ - 800cb4c: 687b ldr r3, [r7, #4] - 800cb4e: 68db ldr r3, [r3, #12] - 800cb50: 68db ldr r3, [r3, #12] - 800cb52: 60bb str r3, [r7, #8] + 800d790: 687b ldr r3, [r7, #4] + 800d792: 68db ldr r3, [r3, #12] + 800d794: 68db ldr r3, [r3, #12] + 800d796: 60bb str r3, [r7, #8] configASSERT( pxUnblockedTCB ); - 800cb54: 68bb ldr r3, [r7, #8] - 800cb56: 2b00 cmp r3, #0 - 800cb58: d101 bne.n 800cb5e - 800cb5a: b672 cpsid i - 800cb5c: e7fe b.n 800cb5c + 800d798: 68bb ldr r3, [r7, #8] + 800d79a: 2b00 cmp r3, #0 + 800d79c: d101 bne.n 800d7a2 + 800d79e: b672 cpsid i + 800d7a0: e7fe b.n 800d7a0 ( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) ); - 800cb5e: 68bb ldr r3, [r7, #8] - 800cb60: 3318 adds r3, #24 - 800cb62: 0018 movs r0, r3 - 800cb64: f7fe fd2b bl 800b5be + 800d7a2: 68bb ldr r3, [r7, #8] + 800d7a4: 3318 adds r3, #24 + 800d7a6: 0018 movs r0, r3 + 800d7a8: f7fe fd2b bl 800c202 if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) - 800cb68: 4b1e ldr r3, [pc, #120] ; (800cbe4 ) - 800cb6a: 681b ldr r3, [r3, #0] - 800cb6c: 2b00 cmp r3, #0 - 800cb6e: d11d bne.n 800cbac + 800d7ac: 4b1e ldr r3, [pc, #120] ; (800d828 ) + 800d7ae: 681b ldr r3, [r3, #0] + 800d7b0: 2b00 cmp r3, #0 + 800d7b2: d11d bne.n 800d7f0 { ( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) ); - 800cb70: 68bb ldr r3, [r7, #8] - 800cb72: 3304 adds r3, #4 - 800cb74: 0018 movs r0, r3 - 800cb76: f7fe fd22 bl 800b5be + 800d7b4: 68bb ldr r3, [r7, #8] + 800d7b6: 3304 adds r3, #4 + 800d7b8: 0018 movs r0, r3 + 800d7ba: f7fe fd22 bl 800c202 prvAddTaskToReadyList( pxUnblockedTCB ); - 800cb7a: 68bb ldr r3, [r7, #8] - 800cb7c: 6ada ldr r2, [r3, #44] ; 0x2c - 800cb7e: 4b1a ldr r3, [pc, #104] ; (800cbe8 ) - 800cb80: 681b ldr r3, [r3, #0] - 800cb82: 429a cmp r2, r3 - 800cb84: d903 bls.n 800cb8e - 800cb86: 68bb ldr r3, [r7, #8] - 800cb88: 6ada ldr r2, [r3, #44] ; 0x2c - 800cb8a: 4b17 ldr r3, [pc, #92] ; (800cbe8 ) - 800cb8c: 601a str r2, [r3, #0] - 800cb8e: 68bb ldr r3, [r7, #8] - 800cb90: 6ada ldr r2, [r3, #44] ; 0x2c - 800cb92: 0013 movs r3, r2 - 800cb94: 009b lsls r3, r3, #2 - 800cb96: 189b adds r3, r3, r2 - 800cb98: 009b lsls r3, r3, #2 - 800cb9a: 4a14 ldr r2, [pc, #80] ; (800cbec ) - 800cb9c: 189a adds r2, r3, r2 - 800cb9e: 68bb ldr r3, [r7, #8] - 800cba0: 3304 adds r3, #4 - 800cba2: 0019 movs r1, r3 - 800cba4: 0010 movs r0, r2 - 800cba6: f7fe fcb2 bl 800b50e - 800cbaa: e007 b.n 800cbbc + 800d7be: 68bb ldr r3, [r7, #8] + 800d7c0: 6ada ldr r2, [r3, #44] ; 0x2c + 800d7c2: 4b1a ldr r3, [pc, #104] ; (800d82c ) + 800d7c4: 681b ldr r3, [r3, #0] + 800d7c6: 429a cmp r2, r3 + 800d7c8: d903 bls.n 800d7d2 + 800d7ca: 68bb ldr r3, [r7, #8] + 800d7cc: 6ada ldr r2, [r3, #44] ; 0x2c + 800d7ce: 4b17 ldr r3, [pc, #92] ; (800d82c ) + 800d7d0: 601a str r2, [r3, #0] + 800d7d2: 68bb ldr r3, [r7, #8] + 800d7d4: 6ada ldr r2, [r3, #44] ; 0x2c + 800d7d6: 0013 movs r3, r2 + 800d7d8: 009b lsls r3, r3, #2 + 800d7da: 189b adds r3, r3, r2 + 800d7dc: 009b lsls r3, r3, #2 + 800d7de: 4a14 ldr r2, [pc, #80] ; (800d830 ) + 800d7e0: 189a adds r2, r3, r2 + 800d7e2: 68bb ldr r3, [r7, #8] + 800d7e4: 3304 adds r3, #4 + 800d7e6: 0019 movs r1, r3 + 800d7e8: 0010 movs r0, r2 + 800d7ea: f7fe fcb2 bl 800c152 + 800d7ee: e007 b.n 800d800 } else { /* The delayed and ready lists cannot be accessed, so hold this task pending until the scheduler is resumed. */ vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); - 800cbac: 68bb ldr r3, [r7, #8] - 800cbae: 3318 adds r3, #24 - 800cbb0: 001a movs r2, r3 - 800cbb2: 4b0f ldr r3, [pc, #60] ; (800cbf0 ) - 800cbb4: 0011 movs r1, r2 - 800cbb6: 0018 movs r0, r3 - 800cbb8: f7fe fca9 bl 800b50e + 800d7f0: 68bb ldr r3, [r7, #8] + 800d7f2: 3318 adds r3, #24 + 800d7f4: 001a movs r2, r3 + 800d7f6: 4b0f ldr r3, [pc, #60] ; (800d834 ) + 800d7f8: 0011 movs r1, r2 + 800d7fa: 0018 movs r0, r3 + 800d7fc: f7fe fca9 bl 800c152 } if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority ) - 800cbbc: 68bb ldr r3, [r7, #8] - 800cbbe: 6ada ldr r2, [r3, #44] ; 0x2c - 800cbc0: 4b0c ldr r3, [pc, #48] ; (800cbf4 ) - 800cbc2: 681b ldr r3, [r3, #0] - 800cbc4: 6adb ldr r3, [r3, #44] ; 0x2c - 800cbc6: 429a cmp r2, r3 - 800cbc8: d905 bls.n 800cbd6 + 800d800: 68bb ldr r3, [r7, #8] + 800d802: 6ada ldr r2, [r3, #44] ; 0x2c + 800d804: 4b0c ldr r3, [pc, #48] ; (800d838 ) + 800d806: 681b ldr r3, [r3, #0] + 800d808: 6adb ldr r3, [r3, #44] ; 0x2c + 800d80a: 429a cmp r2, r3 + 800d80c: d905 bls.n 800d81a { /* Return true if the task removed from the event list has a higher priority than the calling task. This allows the calling task to know if it should force a context switch now. */ xReturn = pdTRUE; - 800cbca: 2301 movs r3, #1 - 800cbcc: 60fb str r3, [r7, #12] + 800d80e: 2301 movs r3, #1 + 800d810: 60fb str r3, [r7, #12] /* Mark that a yield is pending in case the user is not using the "xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */ xYieldPending = pdTRUE; - 800cbce: 4b0a ldr r3, [pc, #40] ; (800cbf8 ) - 800cbd0: 2201 movs r2, #1 - 800cbd2: 601a str r2, [r3, #0] - 800cbd4: e001 b.n 800cbda + 800d812: 4b0a ldr r3, [pc, #40] ; (800d83c ) + 800d814: 2201 movs r2, #1 + 800d816: 601a str r2, [r3, #0] + 800d818: e001 b.n 800d81e } else { xReturn = pdFALSE; - 800cbd6: 2300 movs r3, #0 - 800cbd8: 60fb str r3, [r7, #12] + 800d81a: 2300 movs r3, #0 + 800d81c: 60fb str r3, [r7, #12] } return xReturn; - 800cbda: 68fb ldr r3, [r7, #12] + 800d81e: 68fb ldr r3, [r7, #12] } - 800cbdc: 0018 movs r0, r3 - 800cbde: 46bd mov sp, r7 - 800cbe0: b004 add sp, #16 - 800cbe2: bd80 pop {r7, pc} - 800cbe4: 20001000 .word 0x20001000 - 800cbe8: 20000fe0 .word 0x20000fe0 - 800cbec: 20000b08 .word 0x20000b08 - 800cbf0: 20000f98 .word 0x20000f98 - 800cbf4: 20000b04 .word 0x20000b04 - 800cbf8: 20000fec .word 0x20000fec + 800d820: 0018 movs r0, r3 + 800d822: 46bd mov sp, r7 + 800d824: b004 add sp, #16 + 800d826: bd80 pop {r7, pc} + 800d828: 200010e0 .word 0x200010e0 + 800d82c: 200010c0 .word 0x200010c0 + 800d830: 20000be8 .word 0x20000be8 + 800d834: 20001078 .word 0x20001078 + 800d838: 20000be4 .word 0x20000be4 + 800d83c: 200010cc .word 0x200010cc -0800cbfc : +0800d840 : taskEXIT_CRITICAL(); } /*-----------------------------------------------------------*/ void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) { - 800cbfc: b580 push {r7, lr} - 800cbfe: b082 sub sp, #8 - 800cc00: af00 add r7, sp, #0 - 800cc02: 6078 str r0, [r7, #4] + 800d840: b580 push {r7, lr} + 800d842: b082 sub sp, #8 + 800d844: af00 add r7, sp, #0 + 800d846: 6078 str r0, [r7, #4] /* For internal use only as it does not use a critical section. */ pxTimeOut->xOverflowCount = xNumOfOverflows; - 800cc04: 4b05 ldr r3, [pc, #20] ; (800cc1c ) - 800cc06: 681a ldr r2, [r3, #0] - 800cc08: 687b ldr r3, [r7, #4] - 800cc0a: 601a str r2, [r3, #0] + 800d848: 4b05 ldr r3, [pc, #20] ; (800d860 ) + 800d84a: 681a ldr r2, [r3, #0] + 800d84c: 687b ldr r3, [r7, #4] + 800d84e: 601a str r2, [r3, #0] pxTimeOut->xTimeOnEntering = xTickCount; - 800cc0c: 4b04 ldr r3, [pc, #16] ; (800cc20 ) - 800cc0e: 681a ldr r2, [r3, #0] - 800cc10: 687b ldr r3, [r7, #4] - 800cc12: 605a str r2, [r3, #4] + 800d850: 4b04 ldr r3, [pc, #16] ; (800d864 ) + 800d852: 681a ldr r2, [r3, #0] + 800d854: 687b ldr r3, [r7, #4] + 800d856: 605a str r2, [r3, #4] } - 800cc14: 46c0 nop ; (mov r8, r8) - 800cc16: 46bd mov sp, r7 - 800cc18: b002 add sp, #8 - 800cc1a: bd80 pop {r7, pc} - 800cc1c: 20000ff0 .word 0x20000ff0 - 800cc20: 20000fdc .word 0x20000fdc + 800d858: 46c0 nop ; (mov r8, r8) + 800d85a: 46bd mov sp, r7 + 800d85c: b002 add sp, #8 + 800d85e: bd80 pop {r7, pc} + 800d860: 200010d0 .word 0x200010d0 + 800d864: 200010bc .word 0x200010bc -0800cc24 : +0800d868 : /*-----------------------------------------------------------*/ BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) { - 800cc24: b580 push {r7, lr} - 800cc26: b086 sub sp, #24 - 800cc28: af00 add r7, sp, #0 - 800cc2a: 6078 str r0, [r7, #4] - 800cc2c: 6039 str r1, [r7, #0] + 800d868: b580 push {r7, lr} + 800d86a: b086 sub sp, #24 + 800d86c: af00 add r7, sp, #0 + 800d86e: 6078 str r0, [r7, #4] + 800d870: 6039 str r1, [r7, #0] BaseType_t xReturn; configASSERT( pxTimeOut ); - 800cc2e: 687b ldr r3, [r7, #4] - 800cc30: 2b00 cmp r3, #0 - 800cc32: d101 bne.n 800cc38 - 800cc34: b672 cpsid i - 800cc36: e7fe b.n 800cc36 + 800d872: 687b ldr r3, [r7, #4] + 800d874: 2b00 cmp r3, #0 + 800d876: d101 bne.n 800d87c + 800d878: b672 cpsid i + 800d87a: e7fe b.n 800d87a configASSERT( pxTicksToWait ); - 800cc38: 683b ldr r3, [r7, #0] - 800cc3a: 2b00 cmp r3, #0 - 800cc3c: d101 bne.n 800cc42 - 800cc3e: b672 cpsid i - 800cc40: e7fe b.n 800cc40 + 800d87c: 683b ldr r3, [r7, #0] + 800d87e: 2b00 cmp r3, #0 + 800d880: d101 bne.n 800d886 + 800d882: b672 cpsid i + 800d884: e7fe b.n 800d884 taskENTER_CRITICAL(); - 800cc42: f000 ff45 bl 800dad0 + 800d886: f000 ff43 bl 800e710 { /* Minor optimisation. The tick count cannot change in this block. */ const TickType_t xConstTickCount = xTickCount; - 800cc46: 4b1d ldr r3, [pc, #116] ; (800ccbc ) - 800cc48: 681b ldr r3, [r3, #0] - 800cc4a: 613b str r3, [r7, #16] + 800d88a: 4b1d ldr r3, [pc, #116] ; (800d900 ) + 800d88c: 681b ldr r3, [r3, #0] + 800d88e: 613b str r3, [r7, #16] const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering; - 800cc4c: 687b ldr r3, [r7, #4] - 800cc4e: 685b ldr r3, [r3, #4] - 800cc50: 693a ldr r2, [r7, #16] - 800cc52: 1ad3 subs r3, r2, r3 - 800cc54: 60fb str r3, [r7, #12] + 800d890: 687b ldr r3, [r7, #4] + 800d892: 685b ldr r3, [r3, #4] + 800d894: 693a ldr r2, [r7, #16] + 800d896: 1ad3 subs r3, r2, r3 + 800d898: 60fb str r3, [r7, #12] } else #endif #if ( INCLUDE_vTaskSuspend == 1 ) if( *pxTicksToWait == portMAX_DELAY ) - 800cc56: 683b ldr r3, [r7, #0] - 800cc58: 681b ldr r3, [r3, #0] - 800cc5a: 3301 adds r3, #1 - 800cc5c: d102 bne.n 800cc64 + 800d89a: 683b ldr r3, [r7, #0] + 800d89c: 681b ldr r3, [r3, #0] + 800d89e: 3301 adds r3, #1 + 800d8a0: d102 bne.n 800d8a8 { /* If INCLUDE_vTaskSuspend is set to 1 and the block time specified is the maximum block time then the task should block indefinitely, and therefore never time out. */ xReturn = pdFALSE; - 800cc5e: 2300 movs r3, #0 - 800cc60: 617b str r3, [r7, #20] - 800cc62: e024 b.n 800ccae + 800d8a2: 2300 movs r3, #0 + 800d8a4: 617b str r3, [r7, #20] + 800d8a6: e024 b.n 800d8f2 } else #endif if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */ - 800cc64: 687b ldr r3, [r7, #4] - 800cc66: 681a ldr r2, [r3, #0] - 800cc68: 4b15 ldr r3, [pc, #84] ; (800ccc0 ) - 800cc6a: 681b ldr r3, [r3, #0] - 800cc6c: 429a cmp r2, r3 - 800cc6e: d007 beq.n 800cc80 - 800cc70: 687b ldr r3, [r7, #4] - 800cc72: 685b ldr r3, [r3, #4] - 800cc74: 693a ldr r2, [r7, #16] - 800cc76: 429a cmp r2, r3 - 800cc78: d302 bcc.n 800cc80 + 800d8a8: 687b ldr r3, [r7, #4] + 800d8aa: 681a ldr r2, [r3, #0] + 800d8ac: 4b15 ldr r3, [pc, #84] ; (800d904 ) + 800d8ae: 681b ldr r3, [r3, #0] + 800d8b0: 429a cmp r2, r3 + 800d8b2: d007 beq.n 800d8c4 + 800d8b4: 687b ldr r3, [r7, #4] + 800d8b6: 685b ldr r3, [r3, #4] + 800d8b8: 693a ldr r2, [r7, #16] + 800d8ba: 429a cmp r2, r3 + 800d8bc: d302 bcc.n 800d8c4 /* The tick count is greater than the time at which vTaskSetTimeout() was called, but has also overflowed since vTaskSetTimeOut() was called. It must have wrapped all the way around and gone past again. This passed since vTaskSetTimeout() was called. */ xReturn = pdTRUE; - 800cc7a: 2301 movs r3, #1 - 800cc7c: 617b str r3, [r7, #20] - 800cc7e: e016 b.n 800ccae + 800d8be: 2301 movs r3, #1 + 800d8c0: 617b str r3, [r7, #20] + 800d8c2: e016 b.n 800d8f2 } else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */ - 800cc80: 683b ldr r3, [r7, #0] - 800cc82: 681b ldr r3, [r3, #0] - 800cc84: 68fa ldr r2, [r7, #12] - 800cc86: 429a cmp r2, r3 - 800cc88: d20c bcs.n 800cca4 + 800d8c4: 683b ldr r3, [r7, #0] + 800d8c6: 681b ldr r3, [r3, #0] + 800d8c8: 68fa ldr r2, [r7, #12] + 800d8ca: 429a cmp r2, r3 + 800d8cc: d20c bcs.n 800d8e8 { /* Not a genuine timeout. Adjust parameters for time remaining. */ *pxTicksToWait -= xElapsedTime; - 800cc8a: 683b ldr r3, [r7, #0] - 800cc8c: 681a ldr r2, [r3, #0] - 800cc8e: 68fb ldr r3, [r7, #12] - 800cc90: 1ad2 subs r2, r2, r3 - 800cc92: 683b ldr r3, [r7, #0] - 800cc94: 601a str r2, [r3, #0] + 800d8ce: 683b ldr r3, [r7, #0] + 800d8d0: 681a ldr r2, [r3, #0] + 800d8d2: 68fb ldr r3, [r7, #12] + 800d8d4: 1ad2 subs r2, r2, r3 + 800d8d6: 683b ldr r3, [r7, #0] + 800d8d8: 601a str r2, [r3, #0] vTaskInternalSetTimeOutState( pxTimeOut ); - 800cc96: 687b ldr r3, [r7, #4] - 800cc98: 0018 movs r0, r3 - 800cc9a: f7ff ffaf bl 800cbfc + 800d8da: 687b ldr r3, [r7, #4] + 800d8dc: 0018 movs r0, r3 + 800d8de: f7ff ffaf bl 800d840 xReturn = pdFALSE; - 800cc9e: 2300 movs r3, #0 - 800cca0: 617b str r3, [r7, #20] - 800cca2: e004 b.n 800ccae + 800d8e2: 2300 movs r3, #0 + 800d8e4: 617b str r3, [r7, #20] + 800d8e6: e004 b.n 800d8f2 } else { *pxTicksToWait = 0; - 800cca4: 683b ldr r3, [r7, #0] - 800cca6: 2200 movs r2, #0 - 800cca8: 601a str r2, [r3, #0] + 800d8e8: 683b ldr r3, [r7, #0] + 800d8ea: 2200 movs r2, #0 + 800d8ec: 601a str r2, [r3, #0] xReturn = pdTRUE; - 800ccaa: 2301 movs r3, #1 - 800ccac: 617b str r3, [r7, #20] + 800d8ee: 2301 movs r3, #1 + 800d8f0: 617b str r3, [r7, #20] } } taskEXIT_CRITICAL(); - 800ccae: f000 ff21 bl 800daf4 + 800d8f2: f000 ff1f bl 800e734 return xReturn; - 800ccb2: 697b ldr r3, [r7, #20] + 800d8f6: 697b ldr r3, [r7, #20] } - 800ccb4: 0018 movs r0, r3 - 800ccb6: 46bd mov sp, r7 - 800ccb8: b006 add sp, #24 - 800ccba: bd80 pop {r7, pc} - 800ccbc: 20000fdc .word 0x20000fdc - 800ccc0: 20000ff0 .word 0x20000ff0 + 800d8f8: 0018 movs r0, r3 + 800d8fa: 46bd mov sp, r7 + 800d8fc: b006 add sp, #24 + 800d8fe: bd80 pop {r7, pc} + 800d900: 200010bc .word 0x200010bc + 800d904: 200010d0 .word 0x200010d0 -0800ccc4 : +0800d908 : /*-----------------------------------------------------------*/ void vTaskMissedYield( void ) { - 800ccc4: b580 push {r7, lr} - 800ccc6: af00 add r7, sp, #0 + 800d908: b580 push {r7, lr} + 800d90a: af00 add r7, sp, #0 xYieldPending = pdTRUE; - 800ccc8: 4b02 ldr r3, [pc, #8] ; (800ccd4 ) - 800ccca: 2201 movs r2, #1 - 800cccc: 601a str r2, [r3, #0] + 800d90c: 4b02 ldr r3, [pc, #8] ; (800d918 ) + 800d90e: 2201 movs r2, #1 + 800d910: 601a str r2, [r3, #0] } - 800ccce: 46c0 nop ; (mov r8, r8) - 800ccd0: 46bd mov sp, r7 - 800ccd2: bd80 pop {r7, pc} - 800ccd4: 20000fec .word 0x20000fec + 800d912: 46c0 nop ; (mov r8, r8) + 800d914: 46bd mov sp, r7 + 800d916: bd80 pop {r7, pc} + 800d918: 200010cc .word 0x200010cc -0800ccd8 : +0800d91c : * * void prvIdleTask( void *pvParameters ); * */ static portTASK_FUNCTION( prvIdleTask, pvParameters ) { - 800ccd8: b580 push {r7, lr} - 800ccda: b082 sub sp, #8 - 800ccdc: af00 add r7, sp, #0 - 800ccde: 6078 str r0, [r7, #4] + 800d91c: b580 push {r7, lr} + 800d91e: b082 sub sp, #8 + 800d920: af00 add r7, sp, #0 + 800d922: 6078 str r0, [r7, #4] for( ;; ) { /* See if any tasks have deleted themselves - if so then the idle task is responsible for freeing the deleted task's TCB and stack. */ prvCheckTasksWaitingTermination(); - 800cce0: f000 f84e bl 800cd80 + 800d924: f000 f84e bl 800d9c4 A critical region is not required here as we are just reading from the list, and an occasional incorrect value will not matter. If the ready list at the idle priority contains more than one task then a task other than the idle task is ready to execute. */ if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 ) - 800cce4: 4b03 ldr r3, [pc, #12] ; (800ccf4 ) - 800cce6: 681b ldr r3, [r3, #0] - 800cce8: 2b01 cmp r3, #1 - 800ccea: d9f9 bls.n 800cce0 + 800d928: 4b03 ldr r3, [pc, #12] ; (800d938 ) + 800d92a: 681b ldr r3, [r3, #0] + 800d92c: 2b01 cmp r3, #1 + 800d92e: d9f9 bls.n 800d924 { taskYIELD(); - 800ccec: f000 fee0 bl 800dab0 + 800d930: f000 fede bl 800e6f0 prvCheckTasksWaitingTermination(); - 800ccf0: e7f6 b.n 800cce0 - 800ccf2: 46c0 nop ; (mov r8, r8) - 800ccf4: 20000b08 .word 0x20000b08 + 800d934: e7f6 b.n 800d924 + 800d936: 46c0 nop ; (mov r8, r8) + 800d938: 20000be8 .word 0x20000be8 -0800ccf8 : +0800d93c : #endif /* portUSING_MPU_WRAPPERS */ /*-----------------------------------------------------------*/ static void prvInitialiseTaskLists( void ) { - 800ccf8: b580 push {r7, lr} - 800ccfa: b082 sub sp, #8 - 800ccfc: af00 add r7, sp, #0 + 800d93c: b580 push {r7, lr} + 800d93e: b082 sub sp, #8 + 800d940: af00 add r7, sp, #0 UBaseType_t uxPriority; for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ ) - 800ccfe: 2300 movs r3, #0 - 800cd00: 607b str r3, [r7, #4] - 800cd02: e00c b.n 800cd1e + 800d942: 2300 movs r3, #0 + 800d944: 607b str r3, [r7, #4] + 800d946: e00c b.n 800d962 { vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) ); - 800cd04: 687a ldr r2, [r7, #4] - 800cd06: 0013 movs r3, r2 - 800cd08: 009b lsls r3, r3, #2 - 800cd0a: 189b adds r3, r3, r2 - 800cd0c: 009b lsls r3, r3, #2 - 800cd0e: 4a14 ldr r2, [pc, #80] ; (800cd60 ) - 800cd10: 189b adds r3, r3, r2 - 800cd12: 0018 movs r0, r3 - 800cd14: f7fe fbd2 bl 800b4bc + 800d948: 687a ldr r2, [r7, #4] + 800d94a: 0013 movs r3, r2 + 800d94c: 009b lsls r3, r3, #2 + 800d94e: 189b adds r3, r3, r2 + 800d950: 009b lsls r3, r3, #2 + 800d952: 4a14 ldr r2, [pc, #80] ; (800d9a4 ) + 800d954: 189b adds r3, r3, r2 + 800d956: 0018 movs r0, r3 + 800d958: f7fe fbd2 bl 800c100 for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ ) - 800cd18: 687b ldr r3, [r7, #4] - 800cd1a: 3301 adds r3, #1 - 800cd1c: 607b str r3, [r7, #4] - 800cd1e: 687b ldr r3, [r7, #4] - 800cd20: 2b37 cmp r3, #55 ; 0x37 - 800cd22: d9ef bls.n 800cd04 + 800d95c: 687b ldr r3, [r7, #4] + 800d95e: 3301 adds r3, #1 + 800d960: 607b str r3, [r7, #4] + 800d962: 687b ldr r3, [r7, #4] + 800d964: 2b37 cmp r3, #55 ; 0x37 + 800d966: d9ef bls.n 800d948 } vListInitialise( &xDelayedTaskList1 ); - 800cd24: 4b0f ldr r3, [pc, #60] ; (800cd64 ) - 800cd26: 0018 movs r0, r3 - 800cd28: f7fe fbc8 bl 800b4bc + 800d968: 4b0f ldr r3, [pc, #60] ; (800d9a8 ) + 800d96a: 0018 movs r0, r3 + 800d96c: f7fe fbc8 bl 800c100 vListInitialise( &xDelayedTaskList2 ); - 800cd2c: 4b0e ldr r3, [pc, #56] ; (800cd68 ) - 800cd2e: 0018 movs r0, r3 - 800cd30: f7fe fbc4 bl 800b4bc + 800d970: 4b0e ldr r3, [pc, #56] ; (800d9ac ) + 800d972: 0018 movs r0, r3 + 800d974: f7fe fbc4 bl 800c100 vListInitialise( &xPendingReadyList ); - 800cd34: 4b0d ldr r3, [pc, #52] ; (800cd6c ) - 800cd36: 0018 movs r0, r3 - 800cd38: f7fe fbc0 bl 800b4bc + 800d978: 4b0d ldr r3, [pc, #52] ; (800d9b0 ) + 800d97a: 0018 movs r0, r3 + 800d97c: f7fe fbc0 bl 800c100 #if ( INCLUDE_vTaskDelete == 1 ) { vListInitialise( &xTasksWaitingTermination ); - 800cd3c: 4b0c ldr r3, [pc, #48] ; (800cd70 ) - 800cd3e: 0018 movs r0, r3 - 800cd40: f7fe fbbc bl 800b4bc + 800d980: 4b0c ldr r3, [pc, #48] ; (800d9b4 ) + 800d982: 0018 movs r0, r3 + 800d984: f7fe fbbc bl 800c100 } #endif /* INCLUDE_vTaskDelete */ #if ( INCLUDE_vTaskSuspend == 1 ) { vListInitialise( &xSuspendedTaskList ); - 800cd44: 4b0b ldr r3, [pc, #44] ; (800cd74 ) - 800cd46: 0018 movs r0, r3 - 800cd48: f7fe fbb8 bl 800b4bc + 800d988: 4b0b ldr r3, [pc, #44] ; (800d9b8 ) + 800d98a: 0018 movs r0, r3 + 800d98c: f7fe fbb8 bl 800c100 } #endif /* INCLUDE_vTaskSuspend */ /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList using list2. */ pxDelayedTaskList = &xDelayedTaskList1; - 800cd4c: 4b0a ldr r3, [pc, #40] ; (800cd78 ) - 800cd4e: 4a05 ldr r2, [pc, #20] ; (800cd64 ) - 800cd50: 601a str r2, [r3, #0] + 800d990: 4b0a ldr r3, [pc, #40] ; (800d9bc ) + 800d992: 4a05 ldr r2, [pc, #20] ; (800d9a8 ) + 800d994: 601a str r2, [r3, #0] pxOverflowDelayedTaskList = &xDelayedTaskList2; - 800cd52: 4b0a ldr r3, [pc, #40] ; (800cd7c ) - 800cd54: 4a04 ldr r2, [pc, #16] ; (800cd68 ) - 800cd56: 601a str r2, [r3, #0] + 800d996: 4b0a ldr r3, [pc, #40] ; (800d9c0 ) + 800d998: 4a04 ldr r2, [pc, #16] ; (800d9ac ) + 800d99a: 601a str r2, [r3, #0] } - 800cd58: 46c0 nop ; (mov r8, r8) - 800cd5a: 46bd mov sp, r7 - 800cd5c: b002 add sp, #8 - 800cd5e: bd80 pop {r7, pc} - 800cd60: 20000b08 .word 0x20000b08 - 800cd64: 20000f68 .word 0x20000f68 - 800cd68: 20000f7c .word 0x20000f7c - 800cd6c: 20000f98 .word 0x20000f98 - 800cd70: 20000fac .word 0x20000fac - 800cd74: 20000fc4 .word 0x20000fc4 - 800cd78: 20000f90 .word 0x20000f90 - 800cd7c: 20000f94 .word 0x20000f94 + 800d99c: 46c0 nop ; (mov r8, r8) + 800d99e: 46bd mov sp, r7 + 800d9a0: b002 add sp, #8 + 800d9a2: bd80 pop {r7, pc} + 800d9a4: 20000be8 .word 0x20000be8 + 800d9a8: 20001048 .word 0x20001048 + 800d9ac: 2000105c .word 0x2000105c + 800d9b0: 20001078 .word 0x20001078 + 800d9b4: 2000108c .word 0x2000108c + 800d9b8: 200010a4 .word 0x200010a4 + 800d9bc: 20001070 .word 0x20001070 + 800d9c0: 20001074 .word 0x20001074 -0800cd80 : +0800d9c4 : /*-----------------------------------------------------------*/ static void prvCheckTasksWaitingTermination( void ) { - 800cd80: b580 push {r7, lr} - 800cd82: b082 sub sp, #8 - 800cd84: af00 add r7, sp, #0 + 800d9c4: b580 push {r7, lr} + 800d9c6: b082 sub sp, #8 + 800d9c8: af00 add r7, sp, #0 { TCB_t *pxTCB; /* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL() being called too often in the idle task. */ while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U ) - 800cd86: e01a b.n 800cdbe + 800d9ca: e01a b.n 800da02 { taskENTER_CRITICAL(); - 800cd88: f000 fea2 bl 800dad0 + 800d9cc: f000 fea0 bl 800e710 { pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ - 800cd8c: 4b10 ldr r3, [pc, #64] ; (800cdd0 ) - 800cd8e: 68db ldr r3, [r3, #12] - 800cd90: 68db ldr r3, [r3, #12] - 800cd92: 607b str r3, [r7, #4] + 800d9d0: 4b10 ldr r3, [pc, #64] ; (800da14 ) + 800d9d2: 68db ldr r3, [r3, #12] + 800d9d4: 68db ldr r3, [r3, #12] + 800d9d6: 607b str r3, [r7, #4] ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); - 800cd94: 687b ldr r3, [r7, #4] - 800cd96: 3304 adds r3, #4 - 800cd98: 0018 movs r0, r3 - 800cd9a: f7fe fc10 bl 800b5be + 800d9d8: 687b ldr r3, [r7, #4] + 800d9da: 3304 adds r3, #4 + 800d9dc: 0018 movs r0, r3 + 800d9de: f7fe fc10 bl 800c202 --uxCurrentNumberOfTasks; - 800cd9e: 4b0d ldr r3, [pc, #52] ; (800cdd4 ) - 800cda0: 681b ldr r3, [r3, #0] - 800cda2: 1e5a subs r2, r3, #1 - 800cda4: 4b0b ldr r3, [pc, #44] ; (800cdd4 ) - 800cda6: 601a str r2, [r3, #0] + 800d9e2: 4b0d ldr r3, [pc, #52] ; (800da18 ) + 800d9e4: 681b ldr r3, [r3, #0] + 800d9e6: 1e5a subs r2, r3, #1 + 800d9e8: 4b0b ldr r3, [pc, #44] ; (800da18 ) + 800d9ea: 601a str r2, [r3, #0] --uxDeletedTasksWaitingCleanUp; - 800cda8: 4b0b ldr r3, [pc, #44] ; (800cdd8 ) - 800cdaa: 681b ldr r3, [r3, #0] - 800cdac: 1e5a subs r2, r3, #1 - 800cdae: 4b0a ldr r3, [pc, #40] ; (800cdd8 ) - 800cdb0: 601a str r2, [r3, #0] + 800d9ec: 4b0b ldr r3, [pc, #44] ; (800da1c ) + 800d9ee: 681b ldr r3, [r3, #0] + 800d9f0: 1e5a subs r2, r3, #1 + 800d9f2: 4b0a ldr r3, [pc, #40] ; (800da1c ) + 800d9f4: 601a str r2, [r3, #0] } taskEXIT_CRITICAL(); - 800cdb2: f000 fe9f bl 800daf4 + 800d9f6: f000 fe9d bl 800e734 prvDeleteTCB( pxTCB ); - 800cdb6: 687b ldr r3, [r7, #4] - 800cdb8: 0018 movs r0, r3 - 800cdba: f000 f80f bl 800cddc + 800d9fa: 687b ldr r3, [r7, #4] + 800d9fc: 0018 movs r0, r3 + 800d9fe: f000 f80f bl 800da20 while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U ) - 800cdbe: 4b06 ldr r3, [pc, #24] ; (800cdd8 ) - 800cdc0: 681b ldr r3, [r3, #0] - 800cdc2: 2b00 cmp r3, #0 - 800cdc4: d1e0 bne.n 800cd88 + 800da02: 4b06 ldr r3, [pc, #24] ; (800da1c ) + 800da04: 681b ldr r3, [r3, #0] + 800da06: 2b00 cmp r3, #0 + 800da08: d1e0 bne.n 800d9cc } } #endif /* INCLUDE_vTaskDelete */ } - 800cdc6: 46c0 nop ; (mov r8, r8) - 800cdc8: 46c0 nop ; (mov r8, r8) - 800cdca: 46bd mov sp, r7 - 800cdcc: b002 add sp, #8 - 800cdce: bd80 pop {r7, pc} - 800cdd0: 20000fac .word 0x20000fac - 800cdd4: 20000fd8 .word 0x20000fd8 - 800cdd8: 20000fc0 .word 0x20000fc0 + 800da0a: 46c0 nop ; (mov r8, r8) + 800da0c: 46c0 nop ; (mov r8, r8) + 800da0e: 46bd mov sp, r7 + 800da10: b002 add sp, #8 + 800da12: bd80 pop {r7, pc} + 800da14: 2000108c .word 0x2000108c + 800da18: 200010b8 .word 0x200010b8 + 800da1c: 200010a0 .word 0x200010a0 -0800cddc : +0800da20 : /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskDelete == 1 ) static void prvDeleteTCB( TCB_t *pxTCB ) { - 800cddc: b580 push {r7, lr} - 800cdde: b082 sub sp, #8 - 800cde0: af00 add r7, sp, #0 - 800cde2: 6078 str r0, [r7, #4] + 800da20: b580 push {r7, lr} + 800da22: b082 sub sp, #8 + 800da24: af00 add r7, sp, #0 + 800da26: 6078 str r0, [r7, #4] to the task to free any memory allocated at the application level. See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html for additional information. */ #if ( configUSE_NEWLIB_REENTRANT == 1 ) { _reclaim_reent( &( pxTCB->xNewLib_reent ) ); - 800cde4: 687b ldr r3, [r7, #4] - 800cde6: 3354 adds r3, #84 ; 0x54 - 800cde8: 0018 movs r0, r3 - 800cdea: f001 f99f bl 800e12c <_reclaim_reent> + 800da28: 687b ldr r3, [r7, #4] + 800da2a: 3354 adds r3, #84 ; 0x54 + 800da2c: 0018 movs r0, r3 + 800da2e: f001 f99d bl 800ed6c <_reclaim_reent> #elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */ { /* The task could have been allocated statically or dynamically, so check what was statically allocated before trying to free the memory. */ if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB ) - 800cdee: 687b ldr r3, [r7, #4] - 800cdf0: 22b9 movs r2, #185 ; 0xb9 - 800cdf2: 5c9b ldrb r3, [r3, r2] - 800cdf4: 2b00 cmp r3, #0 - 800cdf6: d109 bne.n 800ce0c + 800da32: 687b ldr r3, [r7, #4] + 800da34: 22b9 movs r2, #185 ; 0xb9 + 800da36: 5c9b ldrb r3, [r3, r2] + 800da38: 2b00 cmp r3, #0 + 800da3a: d109 bne.n 800da50 { /* Both the stack and TCB were allocated dynamically, so both must be freed. */ vPortFree( pxTCB->pxStack ); - 800cdf8: 687b ldr r3, [r7, #4] - 800cdfa: 6b1b ldr r3, [r3, #48] ; 0x30 - 800cdfc: 0018 movs r0, r3 - 800cdfe: f000 ffab bl 800dd58 + 800da3c: 687b ldr r3, [r7, #4] + 800da3e: 6b1b ldr r3, [r3, #48] ; 0x30 + 800da40: 0018 movs r0, r3 + 800da42: f000 ffa9 bl 800e998 vPortFree( pxTCB ); - 800ce02: 687b ldr r3, [r7, #4] - 800ce04: 0018 movs r0, r3 - 800ce06: f000 ffa7 bl 800dd58 + 800da46: 687b ldr r3, [r7, #4] + 800da48: 0018 movs r0, r3 + 800da4a: f000 ffa5 bl 800e998 configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB ); mtCOVERAGE_TEST_MARKER(); } } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ } - 800ce0a: e010 b.n 800ce2e + 800da4e: e010 b.n 800da72 else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY ) - 800ce0c: 687b ldr r3, [r7, #4] - 800ce0e: 22b9 movs r2, #185 ; 0xb9 - 800ce10: 5c9b ldrb r3, [r3, r2] - 800ce12: 2b01 cmp r3, #1 - 800ce14: d104 bne.n 800ce20 + 800da50: 687b ldr r3, [r7, #4] + 800da52: 22b9 movs r2, #185 ; 0xb9 + 800da54: 5c9b ldrb r3, [r3, r2] + 800da56: 2b01 cmp r3, #1 + 800da58: d104 bne.n 800da64 vPortFree( pxTCB ); - 800ce16: 687b ldr r3, [r7, #4] - 800ce18: 0018 movs r0, r3 - 800ce1a: f000 ff9d bl 800dd58 + 800da5a: 687b ldr r3, [r7, #4] + 800da5c: 0018 movs r0, r3 + 800da5e: f000 ff9b bl 800e998 } - 800ce1e: e006 b.n 800ce2e + 800da62: e006 b.n 800da72 configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB ); - 800ce20: 687b ldr r3, [r7, #4] - 800ce22: 22b9 movs r2, #185 ; 0xb9 - 800ce24: 5c9b ldrb r3, [r3, r2] - 800ce26: 2b02 cmp r3, #2 - 800ce28: d001 beq.n 800ce2e - 800ce2a: b672 cpsid i - 800ce2c: e7fe b.n 800ce2c + 800da64: 687b ldr r3, [r7, #4] + 800da66: 22b9 movs r2, #185 ; 0xb9 + 800da68: 5c9b ldrb r3, [r3, r2] + 800da6a: 2b02 cmp r3, #2 + 800da6c: d001 beq.n 800da72 + 800da6e: b672 cpsid i + 800da70: e7fe b.n 800da70 } - 800ce2e: 46c0 nop ; (mov r8, r8) - 800ce30: 46bd mov sp, r7 - 800ce32: b002 add sp, #8 - 800ce34: bd80 pop {r7, pc} + 800da72: 46c0 nop ; (mov r8, r8) + 800da74: 46bd mov sp, r7 + 800da76: b002 add sp, #8 + 800da78: bd80 pop {r7, pc} ... -0800ce38 : +0800da7c : #endif /* INCLUDE_vTaskDelete */ /*-----------------------------------------------------------*/ static void prvResetNextTaskUnblockTime( void ) { - 800ce38: b580 push {r7, lr} - 800ce3a: b082 sub sp, #8 - 800ce3c: af00 add r7, sp, #0 + 800da7c: b580 push {r7, lr} + 800da7e: b082 sub sp, #8 + 800da80: af00 add r7, sp, #0 TCB_t *pxTCB; if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) - 800ce3e: 4b0b ldr r3, [pc, #44] ; (800ce6c ) - 800ce40: 681b ldr r3, [r3, #0] - 800ce42: 681b ldr r3, [r3, #0] - 800ce44: 2b00 cmp r3, #0 - 800ce46: d104 bne.n 800ce52 + 800da82: 4b0b ldr r3, [pc, #44] ; (800dab0 ) + 800da84: 681b ldr r3, [r3, #0] + 800da86: 681b ldr r3, [r3, #0] + 800da88: 2b00 cmp r3, #0 + 800da8a: d104 bne.n 800da96 { /* The new current delayed list is empty. Set xNextTaskUnblockTime to the maximum possible value so it is extremely unlikely that the if( xTickCount >= xNextTaskUnblockTime ) test will pass until there is an item in the delayed list. */ xNextTaskUnblockTime = portMAX_DELAY; - 800ce48: 4b09 ldr r3, [pc, #36] ; (800ce70 ) - 800ce4a: 2201 movs r2, #1 - 800ce4c: 4252 negs r2, r2 - 800ce4e: 601a str r2, [r3, #0] + 800da8c: 4b09 ldr r3, [pc, #36] ; (800dab4 ) + 800da8e: 2201 movs r2, #1 + 800da90: 4252 negs r2, r2 + 800da92: 601a str r2, [r3, #0] which the task at the head of the delayed list should be removed from the Blocked state. */ ( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) ); } } - 800ce50: e008 b.n 800ce64 + 800da94: e008 b.n 800daa8 ( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ - 800ce52: 4b06 ldr r3, [pc, #24] ; (800ce6c ) - 800ce54: 681b ldr r3, [r3, #0] - 800ce56: 68db ldr r3, [r3, #12] - 800ce58: 68db ldr r3, [r3, #12] - 800ce5a: 607b str r3, [r7, #4] + 800da96: 4b06 ldr r3, [pc, #24] ; (800dab0 ) + 800da98: 681b ldr r3, [r3, #0] + 800da9a: 68db ldr r3, [r3, #12] + 800da9c: 68db ldr r3, [r3, #12] + 800da9e: 607b str r3, [r7, #4] xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) ); - 800ce5c: 687b ldr r3, [r7, #4] - 800ce5e: 685a ldr r2, [r3, #4] - 800ce60: 4b03 ldr r3, [pc, #12] ; (800ce70 ) - 800ce62: 601a str r2, [r3, #0] + 800daa0: 687b ldr r3, [r7, #4] + 800daa2: 685a ldr r2, [r3, #4] + 800daa4: 4b03 ldr r3, [pc, #12] ; (800dab4 ) + 800daa6: 601a str r2, [r3, #0] } - 800ce64: 46c0 nop ; (mov r8, r8) - 800ce66: 46bd mov sp, r7 - 800ce68: b002 add sp, #8 - 800ce6a: bd80 pop {r7, pc} - 800ce6c: 20000f90 .word 0x20000f90 - 800ce70: 20000ff8 .word 0x20000ff8 + 800daa8: 46c0 nop ; (mov r8, r8) + 800daaa: 46bd mov sp, r7 + 800daac: b002 add sp, #8 + 800daae: bd80 pop {r7, pc} + 800dab0: 20001070 .word 0x20001070 + 800dab4: 200010d8 .word 0x200010d8 -0800ce74 : +0800dab8 : /*-----------------------------------------------------------*/ #if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) TaskHandle_t xTaskGetCurrentTaskHandle( void ) { - 800ce74: b580 push {r7, lr} - 800ce76: b082 sub sp, #8 - 800ce78: af00 add r7, sp, #0 + 800dab8: b580 push {r7, lr} + 800daba: b082 sub sp, #8 + 800dabc: af00 add r7, sp, #0 TaskHandle_t xReturn; /* A critical section is not required as this is not called from an interrupt and the current TCB will always be the same for any individual execution thread. */ xReturn = pxCurrentTCB; - 800ce7a: 4b04 ldr r3, [pc, #16] ; (800ce8c ) - 800ce7c: 681b ldr r3, [r3, #0] - 800ce7e: 607b str r3, [r7, #4] + 800dabe: 4b04 ldr r3, [pc, #16] ; (800dad0 ) + 800dac0: 681b ldr r3, [r3, #0] + 800dac2: 607b str r3, [r7, #4] return xReturn; - 800ce80: 687b ldr r3, [r7, #4] + 800dac4: 687b ldr r3, [r7, #4] } - 800ce82: 0018 movs r0, r3 - 800ce84: 46bd mov sp, r7 - 800ce86: b002 add sp, #8 - 800ce88: bd80 pop {r7, pc} - 800ce8a: 46c0 nop ; (mov r8, r8) - 800ce8c: 20000b04 .word 0x20000b04 + 800dac6: 0018 movs r0, r3 + 800dac8: 46bd mov sp, r7 + 800daca: b002 add sp, #8 + 800dacc: bd80 pop {r7, pc} + 800dace: 46c0 nop ; (mov r8, r8) + 800dad0: 20000be4 .word 0x20000be4 -0800ce90 : +0800dad4 : /*-----------------------------------------------------------*/ #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) BaseType_t xTaskGetSchedulerState( void ) { - 800ce90: b580 push {r7, lr} - 800ce92: b082 sub sp, #8 - 800ce94: af00 add r7, sp, #0 + 800dad4: b580 push {r7, lr} + 800dad6: b082 sub sp, #8 + 800dad8: af00 add r7, sp, #0 BaseType_t xReturn; if( xSchedulerRunning == pdFALSE ) - 800ce96: 4b0a ldr r3, [pc, #40] ; (800cec0 ) - 800ce98: 681b ldr r3, [r3, #0] - 800ce9a: 2b00 cmp r3, #0 - 800ce9c: d102 bne.n 800cea4 + 800dada: 4b0a ldr r3, [pc, #40] ; (800db04 ) + 800dadc: 681b ldr r3, [r3, #0] + 800dade: 2b00 cmp r3, #0 + 800dae0: d102 bne.n 800dae8 { xReturn = taskSCHEDULER_NOT_STARTED; - 800ce9e: 2301 movs r3, #1 - 800cea0: 607b str r3, [r7, #4] - 800cea2: e008 b.n 800ceb6 + 800dae2: 2301 movs r3, #1 + 800dae4: 607b str r3, [r7, #4] + 800dae6: e008 b.n 800dafa } else { if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) - 800cea4: 4b07 ldr r3, [pc, #28] ; (800cec4 ) - 800cea6: 681b ldr r3, [r3, #0] - 800cea8: 2b00 cmp r3, #0 - 800ceaa: d102 bne.n 800ceb2 + 800dae8: 4b07 ldr r3, [pc, #28] ; (800db08 ) + 800daea: 681b ldr r3, [r3, #0] + 800daec: 2b00 cmp r3, #0 + 800daee: d102 bne.n 800daf6 { xReturn = taskSCHEDULER_RUNNING; - 800ceac: 2302 movs r3, #2 - 800ceae: 607b str r3, [r7, #4] - 800ceb0: e001 b.n 800ceb6 + 800daf0: 2302 movs r3, #2 + 800daf2: 607b str r3, [r7, #4] + 800daf4: e001 b.n 800dafa } else { xReturn = taskSCHEDULER_SUSPENDED; - 800ceb2: 2300 movs r3, #0 - 800ceb4: 607b str r3, [r7, #4] + 800daf6: 2300 movs r3, #0 + 800daf8: 607b str r3, [r7, #4] } } return xReturn; - 800ceb6: 687b ldr r3, [r7, #4] + 800dafa: 687b ldr r3, [r7, #4] } - 800ceb8: 0018 movs r0, r3 - 800ceba: 46bd mov sp, r7 - 800cebc: b002 add sp, #8 - 800cebe: bd80 pop {r7, pc} - 800cec0: 20000fe4 .word 0x20000fe4 - 800cec4: 20001000 .word 0x20001000 + 800dafc: 0018 movs r0, r3 + 800dafe: 46bd mov sp, r7 + 800db00: b002 add sp, #8 + 800db02: bd80 pop {r7, pc} + 800db04: 200010c4 .word 0x200010c4 + 800db08: 200010e0 .word 0x200010e0 -0800cec8 : +0800db0c : /*-----------------------------------------------------------*/ #if ( configUSE_MUTEXES == 1 ) BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) { - 800cec8: b580 push {r7, lr} - 800ceca: b084 sub sp, #16 - 800cecc: af00 add r7, sp, #0 - 800cece: 6078 str r0, [r7, #4] + 800db0c: b580 push {r7, lr} + 800db0e: b084 sub sp, #16 + 800db10: af00 add r7, sp, #0 + 800db12: 6078 str r0, [r7, #4] TCB_t * const pxMutexHolderTCB = pxMutexHolder; - 800ced0: 687b ldr r3, [r7, #4] - 800ced2: 60bb str r3, [r7, #8] + 800db14: 687b ldr r3, [r7, #4] + 800db16: 60bb str r3, [r7, #8] BaseType_t xReturn = pdFALSE; - 800ced4: 2300 movs r3, #0 - 800ced6: 60fb str r3, [r7, #12] + 800db18: 2300 movs r3, #0 + 800db1a: 60fb str r3, [r7, #12] /* If the mutex was given back by an interrupt while the queue was locked then the mutex holder might now be NULL. _RB_ Is this still needed as interrupts can no longer use mutexes? */ if( pxMutexHolder != NULL ) - 800ced8: 687b ldr r3, [r7, #4] - 800ceda: 2b00 cmp r3, #0 - 800cedc: d051 beq.n 800cf82 + 800db1c: 687b ldr r3, [r7, #4] + 800db1e: 2b00 cmp r3, #0 + 800db20: d051 beq.n 800dbc6 { /* If the holder of the mutex has a priority below the priority of the task attempting to obtain the mutex then it will temporarily inherit the priority of the task attempting to obtain the mutex. */ if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority ) - 800cede: 68bb ldr r3, [r7, #8] - 800cee0: 6ada ldr r2, [r3, #44] ; 0x2c - 800cee2: 4b2a ldr r3, [pc, #168] ; (800cf8c ) - 800cee4: 681b ldr r3, [r3, #0] - 800cee6: 6adb ldr r3, [r3, #44] ; 0x2c - 800cee8: 429a cmp r2, r3 - 800ceea: d241 bcs.n 800cf70 + 800db22: 68bb ldr r3, [r7, #8] + 800db24: 6ada ldr r2, [r3, #44] ; 0x2c + 800db26: 4b2a ldr r3, [pc, #168] ; (800dbd0 ) + 800db28: 681b ldr r3, [r3, #0] + 800db2a: 6adb ldr r3, [r3, #44] ; 0x2c + 800db2c: 429a cmp r2, r3 + 800db2e: d241 bcs.n 800dbb4 { /* Adjust the mutex holder state to account for its new priority. Only reset the event list item value if the value is not being used for anything else. */ if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL ) - 800ceec: 68bb ldr r3, [r7, #8] - 800ceee: 699b ldr r3, [r3, #24] - 800cef0: 2b00 cmp r3, #0 - 800cef2: db06 blt.n 800cf02 + 800db30: 68bb ldr r3, [r7, #8] + 800db32: 699b ldr r3, [r3, #24] + 800db34: 2b00 cmp r3, #0 + 800db36: db06 blt.n 800db46 { listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ - 800cef4: 4b25 ldr r3, [pc, #148] ; (800cf8c ) - 800cef6: 681b ldr r3, [r3, #0] - 800cef8: 6adb ldr r3, [r3, #44] ; 0x2c - 800cefa: 2238 movs r2, #56 ; 0x38 - 800cefc: 1ad2 subs r2, r2, r3 - 800cefe: 68bb ldr r3, [r7, #8] - 800cf00: 619a str r2, [r3, #24] + 800db38: 4b25 ldr r3, [pc, #148] ; (800dbd0 ) + 800db3a: 681b ldr r3, [r3, #0] + 800db3c: 6adb ldr r3, [r3, #44] ; 0x2c + 800db3e: 2238 movs r2, #56 ; 0x38 + 800db40: 1ad2 subs r2, r2, r3 + 800db42: 68bb ldr r3, [r7, #8] + 800db44: 619a str r2, [r3, #24] mtCOVERAGE_TEST_MARKER(); } /* If the task being modified is in the ready state it will need to be moved into a new list. */ if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE ) - 800cf02: 68bb ldr r3, [r7, #8] - 800cf04: 6959 ldr r1, [r3, #20] - 800cf06: 68bb ldr r3, [r7, #8] - 800cf08: 6ada ldr r2, [r3, #44] ; 0x2c - 800cf0a: 0013 movs r3, r2 - 800cf0c: 009b lsls r3, r3, #2 - 800cf0e: 189b adds r3, r3, r2 - 800cf10: 009b lsls r3, r3, #2 - 800cf12: 4a1f ldr r2, [pc, #124] ; (800cf90 ) - 800cf14: 189b adds r3, r3, r2 - 800cf16: 4299 cmp r1, r3 - 800cf18: d122 bne.n 800cf60 + 800db46: 68bb ldr r3, [r7, #8] + 800db48: 6959 ldr r1, [r3, #20] + 800db4a: 68bb ldr r3, [r7, #8] + 800db4c: 6ada ldr r2, [r3, #44] ; 0x2c + 800db4e: 0013 movs r3, r2 + 800db50: 009b lsls r3, r3, #2 + 800db52: 189b adds r3, r3, r2 + 800db54: 009b lsls r3, r3, #2 + 800db56: 4a1f ldr r2, [pc, #124] ; (800dbd4 ) + 800db58: 189b adds r3, r3, r2 + 800db5a: 4299 cmp r1, r3 + 800db5c: d122 bne.n 800dba4 { if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) - 800cf1a: 68bb ldr r3, [r7, #8] - 800cf1c: 3304 adds r3, #4 - 800cf1e: 0018 movs r0, r3 - 800cf20: f7fe fb4d bl 800b5be + 800db5e: 68bb ldr r3, [r7, #8] + 800db60: 3304 adds r3, #4 + 800db62: 0018 movs r0, r3 + 800db64: f7fe fb4d bl 800c202 { mtCOVERAGE_TEST_MARKER(); } /* Inherit the priority before being moved into the new list. */ pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority; - 800cf24: 4b19 ldr r3, [pc, #100] ; (800cf8c ) - 800cf26: 681b ldr r3, [r3, #0] - 800cf28: 6ada ldr r2, [r3, #44] ; 0x2c - 800cf2a: 68bb ldr r3, [r7, #8] - 800cf2c: 62da str r2, [r3, #44] ; 0x2c + 800db68: 4b19 ldr r3, [pc, #100] ; (800dbd0 ) + 800db6a: 681b ldr r3, [r3, #0] + 800db6c: 6ada ldr r2, [r3, #44] ; 0x2c + 800db6e: 68bb ldr r3, [r7, #8] + 800db70: 62da str r2, [r3, #44] ; 0x2c prvAddTaskToReadyList( pxMutexHolderTCB ); - 800cf2e: 68bb ldr r3, [r7, #8] - 800cf30: 6ada ldr r2, [r3, #44] ; 0x2c - 800cf32: 4b18 ldr r3, [pc, #96] ; (800cf94 ) - 800cf34: 681b ldr r3, [r3, #0] - 800cf36: 429a cmp r2, r3 - 800cf38: d903 bls.n 800cf42 - 800cf3a: 68bb ldr r3, [r7, #8] - 800cf3c: 6ada ldr r2, [r3, #44] ; 0x2c - 800cf3e: 4b15 ldr r3, [pc, #84] ; (800cf94 ) - 800cf40: 601a str r2, [r3, #0] - 800cf42: 68bb ldr r3, [r7, #8] - 800cf44: 6ada ldr r2, [r3, #44] ; 0x2c - 800cf46: 0013 movs r3, r2 - 800cf48: 009b lsls r3, r3, #2 - 800cf4a: 189b adds r3, r3, r2 - 800cf4c: 009b lsls r3, r3, #2 - 800cf4e: 4a10 ldr r2, [pc, #64] ; (800cf90 ) - 800cf50: 189a adds r2, r3, r2 - 800cf52: 68bb ldr r3, [r7, #8] - 800cf54: 3304 adds r3, #4 - 800cf56: 0019 movs r1, r3 - 800cf58: 0010 movs r0, r2 - 800cf5a: f7fe fad8 bl 800b50e - 800cf5e: e004 b.n 800cf6a + 800db72: 68bb ldr r3, [r7, #8] + 800db74: 6ada ldr r2, [r3, #44] ; 0x2c + 800db76: 4b18 ldr r3, [pc, #96] ; (800dbd8 ) + 800db78: 681b ldr r3, [r3, #0] + 800db7a: 429a cmp r2, r3 + 800db7c: d903 bls.n 800db86 + 800db7e: 68bb ldr r3, [r7, #8] + 800db80: 6ada ldr r2, [r3, #44] ; 0x2c + 800db82: 4b15 ldr r3, [pc, #84] ; (800dbd8 ) + 800db84: 601a str r2, [r3, #0] + 800db86: 68bb ldr r3, [r7, #8] + 800db88: 6ada ldr r2, [r3, #44] ; 0x2c + 800db8a: 0013 movs r3, r2 + 800db8c: 009b lsls r3, r3, #2 + 800db8e: 189b adds r3, r3, r2 + 800db90: 009b lsls r3, r3, #2 + 800db92: 4a10 ldr r2, [pc, #64] ; (800dbd4 ) + 800db94: 189a adds r2, r3, r2 + 800db96: 68bb ldr r3, [r7, #8] + 800db98: 3304 adds r3, #4 + 800db9a: 0019 movs r1, r3 + 800db9c: 0010 movs r0, r2 + 800db9e: f7fe fad8 bl 800c152 + 800dba2: e004 b.n 800dbae } else { /* Just inherit the priority. */ pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority; - 800cf60: 4b0a ldr r3, [pc, #40] ; (800cf8c ) - 800cf62: 681b ldr r3, [r3, #0] - 800cf64: 6ada ldr r2, [r3, #44] ; 0x2c - 800cf66: 68bb ldr r3, [r7, #8] - 800cf68: 62da str r2, [r3, #44] ; 0x2c + 800dba4: 4b0a ldr r3, [pc, #40] ; (800dbd0 ) + 800dba6: 681b ldr r3, [r3, #0] + 800dba8: 6ada ldr r2, [r3, #44] ; 0x2c + 800dbaa: 68bb ldr r3, [r7, #8] + 800dbac: 62da str r2, [r3, #44] ; 0x2c } traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority ); /* Inheritance occurred. */ xReturn = pdTRUE; - 800cf6a: 2301 movs r3, #1 - 800cf6c: 60fb str r3, [r7, #12] - 800cf6e: e008 b.n 800cf82 + 800dbae: 2301 movs r3, #1 + 800dbb0: 60fb str r3, [r7, #12] + 800dbb2: e008 b.n 800dbc6 } else { if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority ) - 800cf70: 68bb ldr r3, [r7, #8] - 800cf72: 6cda ldr r2, [r3, #76] ; 0x4c - 800cf74: 4b05 ldr r3, [pc, #20] ; (800cf8c ) - 800cf76: 681b ldr r3, [r3, #0] - 800cf78: 6adb ldr r3, [r3, #44] ; 0x2c - 800cf7a: 429a cmp r2, r3 - 800cf7c: d201 bcs.n 800cf82 + 800dbb4: 68bb ldr r3, [r7, #8] + 800dbb6: 6cda ldr r2, [r3, #76] ; 0x4c + 800dbb8: 4b05 ldr r3, [pc, #20] ; (800dbd0 ) + 800dbba: 681b ldr r3, [r3, #0] + 800dbbc: 6adb ldr r3, [r3, #44] ; 0x2c + 800dbbe: 429a cmp r2, r3 + 800dbc0: d201 bcs.n 800dbc6 current priority of the mutex holder is not lower than the priority of the task attempting to take the mutex. Therefore the mutex holder must have already inherited a priority, but inheritance would have occurred if that had not been the case. */ xReturn = pdTRUE; - 800cf7e: 2301 movs r3, #1 - 800cf80: 60fb str r3, [r7, #12] + 800dbc2: 2301 movs r3, #1 + 800dbc4: 60fb str r3, [r7, #12] else { mtCOVERAGE_TEST_MARKER(); } return xReturn; - 800cf82: 68fb ldr r3, [r7, #12] + 800dbc6: 68fb ldr r3, [r7, #12] } - 800cf84: 0018 movs r0, r3 - 800cf86: 46bd mov sp, r7 - 800cf88: b004 add sp, #16 - 800cf8a: bd80 pop {r7, pc} - 800cf8c: 20000b04 .word 0x20000b04 - 800cf90: 20000b08 .word 0x20000b08 - 800cf94: 20000fe0 .word 0x20000fe0 + 800dbc8: 0018 movs r0, r3 + 800dbca: 46bd mov sp, r7 + 800dbcc: b004 add sp, #16 + 800dbce: bd80 pop {r7, pc} + 800dbd0: 20000be4 .word 0x20000be4 + 800dbd4: 20000be8 .word 0x20000be8 + 800dbd8: 200010c0 .word 0x200010c0 -0800cf98 : +0800dbdc : /*-----------------------------------------------------------*/ #if ( configUSE_MUTEXES == 1 ) BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) { - 800cf98: b580 push {r7, lr} - 800cf9a: b084 sub sp, #16 - 800cf9c: af00 add r7, sp, #0 - 800cf9e: 6078 str r0, [r7, #4] + 800dbdc: b580 push {r7, lr} + 800dbde: b084 sub sp, #16 + 800dbe0: af00 add r7, sp, #0 + 800dbe2: 6078 str r0, [r7, #4] TCB_t * const pxTCB = pxMutexHolder; - 800cfa0: 687b ldr r3, [r7, #4] - 800cfa2: 60bb str r3, [r7, #8] + 800dbe4: 687b ldr r3, [r7, #4] + 800dbe6: 60bb str r3, [r7, #8] BaseType_t xReturn = pdFALSE; - 800cfa4: 2300 movs r3, #0 - 800cfa6: 60fb str r3, [r7, #12] + 800dbe8: 2300 movs r3, #0 + 800dbea: 60fb str r3, [r7, #12] if( pxMutexHolder != NULL ) - 800cfa8: 687b ldr r3, [r7, #4] - 800cfaa: 2b00 cmp r3, #0 - 800cfac: d044 beq.n 800d038 + 800dbec: 687b ldr r3, [r7, #4] + 800dbee: 2b00 cmp r3, #0 + 800dbf0: d044 beq.n 800dc7c { /* A task can only have an inherited priority if it holds the mutex. If the mutex is held by a task then it cannot be given from an interrupt, and if a mutex is given by the holding task then it must be the running state task. */ configASSERT( pxTCB == pxCurrentTCB ); - 800cfae: 4b25 ldr r3, [pc, #148] ; (800d044 ) - 800cfb0: 681b ldr r3, [r3, #0] - 800cfb2: 68ba ldr r2, [r7, #8] - 800cfb4: 429a cmp r2, r3 - 800cfb6: d001 beq.n 800cfbc - 800cfb8: b672 cpsid i - 800cfba: e7fe b.n 800cfba + 800dbf2: 4b25 ldr r3, [pc, #148] ; (800dc88 ) + 800dbf4: 681b ldr r3, [r3, #0] + 800dbf6: 68ba ldr r2, [r7, #8] + 800dbf8: 429a cmp r2, r3 + 800dbfa: d001 beq.n 800dc00 + 800dbfc: b672 cpsid i + 800dbfe: e7fe b.n 800dbfe configASSERT( pxTCB->uxMutexesHeld ); - 800cfbc: 68bb ldr r3, [r7, #8] - 800cfbe: 6d1b ldr r3, [r3, #80] ; 0x50 - 800cfc0: 2b00 cmp r3, #0 - 800cfc2: d101 bne.n 800cfc8 - 800cfc4: b672 cpsid i - 800cfc6: e7fe b.n 800cfc6 + 800dc00: 68bb ldr r3, [r7, #8] + 800dc02: 6d1b ldr r3, [r3, #80] ; 0x50 + 800dc04: 2b00 cmp r3, #0 + 800dc06: d101 bne.n 800dc0c + 800dc08: b672 cpsid i + 800dc0a: e7fe b.n 800dc0a ( pxTCB->uxMutexesHeld )--; - 800cfc8: 68bb ldr r3, [r7, #8] - 800cfca: 6d1b ldr r3, [r3, #80] ; 0x50 - 800cfcc: 1e5a subs r2, r3, #1 - 800cfce: 68bb ldr r3, [r7, #8] - 800cfd0: 651a str r2, [r3, #80] ; 0x50 + 800dc0c: 68bb ldr r3, [r7, #8] + 800dc0e: 6d1b ldr r3, [r3, #80] ; 0x50 + 800dc10: 1e5a subs r2, r3, #1 + 800dc12: 68bb ldr r3, [r7, #8] + 800dc14: 651a str r2, [r3, #80] ; 0x50 /* Has the holder of the mutex inherited the priority of another task? */ if( pxTCB->uxPriority != pxTCB->uxBasePriority ) - 800cfd2: 68bb ldr r3, [r7, #8] - 800cfd4: 6ada ldr r2, [r3, #44] ; 0x2c - 800cfd6: 68bb ldr r3, [r7, #8] - 800cfd8: 6cdb ldr r3, [r3, #76] ; 0x4c - 800cfda: 429a cmp r2, r3 - 800cfdc: d02c beq.n 800d038 + 800dc16: 68bb ldr r3, [r7, #8] + 800dc18: 6ada ldr r2, [r3, #44] ; 0x2c + 800dc1a: 68bb ldr r3, [r7, #8] + 800dc1c: 6cdb ldr r3, [r3, #76] ; 0x4c + 800dc1e: 429a cmp r2, r3 + 800dc20: d02c beq.n 800dc7c { /* Only disinherit if no other mutexes are held. */ if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 ) - 800cfde: 68bb ldr r3, [r7, #8] - 800cfe0: 6d1b ldr r3, [r3, #80] ; 0x50 - 800cfe2: 2b00 cmp r3, #0 - 800cfe4: d128 bne.n 800d038 + 800dc22: 68bb ldr r3, [r7, #8] + 800dc24: 6d1b ldr r3, [r3, #80] ; 0x50 + 800dc26: 2b00 cmp r3, #0 + 800dc28: d128 bne.n 800dc7c /* A task can only have an inherited priority if it holds the mutex. If the mutex is held by a task then it cannot be given from an interrupt, and if a mutex is given by the holding task then it must be the running state task. Remove the holding task from the ready/delayed list. */ if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) - 800cfe6: 68bb ldr r3, [r7, #8] - 800cfe8: 3304 adds r3, #4 - 800cfea: 0018 movs r0, r3 - 800cfec: f7fe fae7 bl 800b5be + 800dc2a: 68bb ldr r3, [r7, #8] + 800dc2c: 3304 adds r3, #4 + 800dc2e: 0018 movs r0, r3 + 800dc30: f7fe fae7 bl 800c202 } /* Disinherit the priority before adding the task into the new ready list. */ traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority ); pxTCB->uxPriority = pxTCB->uxBasePriority; - 800cff0: 68bb ldr r3, [r7, #8] - 800cff2: 6cda ldr r2, [r3, #76] ; 0x4c - 800cff4: 68bb ldr r3, [r7, #8] - 800cff6: 62da str r2, [r3, #44] ; 0x2c + 800dc34: 68bb ldr r3, [r7, #8] + 800dc36: 6cda ldr r2, [r3, #76] ; 0x4c + 800dc38: 68bb ldr r3, [r7, #8] + 800dc3a: 62da str r2, [r3, #44] ; 0x2c /* Reset the event list item value. It cannot be in use for any other purpose if this task is running, and it must be running to give back the mutex. */ listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ - 800cff8: 68bb ldr r3, [r7, #8] - 800cffa: 6adb ldr r3, [r3, #44] ; 0x2c - 800cffc: 2238 movs r2, #56 ; 0x38 - 800cffe: 1ad2 subs r2, r2, r3 - 800d000: 68bb ldr r3, [r7, #8] - 800d002: 619a str r2, [r3, #24] + 800dc3c: 68bb ldr r3, [r7, #8] + 800dc3e: 6adb ldr r3, [r3, #44] ; 0x2c + 800dc40: 2238 movs r2, #56 ; 0x38 + 800dc42: 1ad2 subs r2, r2, r3 + 800dc44: 68bb ldr r3, [r7, #8] + 800dc46: 619a str r2, [r3, #24] prvAddTaskToReadyList( pxTCB ); - 800d004: 68bb ldr r3, [r7, #8] - 800d006: 6ada ldr r2, [r3, #44] ; 0x2c - 800d008: 4b0f ldr r3, [pc, #60] ; (800d048 ) - 800d00a: 681b ldr r3, [r3, #0] - 800d00c: 429a cmp r2, r3 - 800d00e: d903 bls.n 800d018 - 800d010: 68bb ldr r3, [r7, #8] - 800d012: 6ada ldr r2, [r3, #44] ; 0x2c - 800d014: 4b0c ldr r3, [pc, #48] ; (800d048 ) - 800d016: 601a str r2, [r3, #0] - 800d018: 68bb ldr r3, [r7, #8] - 800d01a: 6ada ldr r2, [r3, #44] ; 0x2c - 800d01c: 0013 movs r3, r2 - 800d01e: 009b lsls r3, r3, #2 - 800d020: 189b adds r3, r3, r2 - 800d022: 009b lsls r3, r3, #2 - 800d024: 4a09 ldr r2, [pc, #36] ; (800d04c ) - 800d026: 189a adds r2, r3, r2 - 800d028: 68bb ldr r3, [r7, #8] - 800d02a: 3304 adds r3, #4 - 800d02c: 0019 movs r1, r3 - 800d02e: 0010 movs r0, r2 - 800d030: f7fe fa6d bl 800b50e + 800dc48: 68bb ldr r3, [r7, #8] + 800dc4a: 6ada ldr r2, [r3, #44] ; 0x2c + 800dc4c: 4b0f ldr r3, [pc, #60] ; (800dc8c ) + 800dc4e: 681b ldr r3, [r3, #0] + 800dc50: 429a cmp r2, r3 + 800dc52: d903 bls.n 800dc5c + 800dc54: 68bb ldr r3, [r7, #8] + 800dc56: 6ada ldr r2, [r3, #44] ; 0x2c + 800dc58: 4b0c ldr r3, [pc, #48] ; (800dc8c ) + 800dc5a: 601a str r2, [r3, #0] + 800dc5c: 68bb ldr r3, [r7, #8] + 800dc5e: 6ada ldr r2, [r3, #44] ; 0x2c + 800dc60: 0013 movs r3, r2 + 800dc62: 009b lsls r3, r3, #2 + 800dc64: 189b adds r3, r3, r2 + 800dc66: 009b lsls r3, r3, #2 + 800dc68: 4a09 ldr r2, [pc, #36] ; (800dc90 ) + 800dc6a: 189a adds r2, r3, r2 + 800dc6c: 68bb ldr r3, [r7, #8] + 800dc6e: 3304 adds r3, #4 + 800dc70: 0019 movs r1, r3 + 800dc72: 0010 movs r0, r2 + 800dc74: f7fe fa6d bl 800c152 in an order different to that in which they were taken. If a context switch did not occur when the first mutex was returned, even if a task was waiting on it, then a context switch should occur when the last mutex is returned whether a task is waiting on it or not. */ xReturn = pdTRUE; - 800d034: 2301 movs r3, #1 - 800d036: 60fb str r3, [r7, #12] + 800dc78: 2301 movs r3, #1 + 800dc7a: 60fb str r3, [r7, #12] else { mtCOVERAGE_TEST_MARKER(); } return xReturn; - 800d038: 68fb ldr r3, [r7, #12] + 800dc7c: 68fb ldr r3, [r7, #12] } - 800d03a: 0018 movs r0, r3 - 800d03c: 46bd mov sp, r7 - 800d03e: b004 add sp, #16 - 800d040: bd80 pop {r7, pc} - 800d042: 46c0 nop ; (mov r8, r8) - 800d044: 20000b04 .word 0x20000b04 - 800d048: 20000fe0 .word 0x20000fe0 - 800d04c: 20000b08 .word 0x20000b08 + 800dc7e: 0018 movs r0, r3 + 800dc80: 46bd mov sp, r7 + 800dc82: b004 add sp, #16 + 800dc84: bd80 pop {r7, pc} + 800dc86: 46c0 nop ; (mov r8, r8) + 800dc88: 20000be4 .word 0x20000be4 + 800dc8c: 200010c0 .word 0x200010c0 + 800dc90: 20000be8 .word 0x20000be8 -0800d050 : +0800dc94 : /*-----------------------------------------------------------*/ #if ( configUSE_MUTEXES == 1 ) void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask ) { - 800d050: b580 push {r7, lr} - 800d052: b086 sub sp, #24 - 800d054: af00 add r7, sp, #0 - 800d056: 6078 str r0, [r7, #4] - 800d058: 6039 str r1, [r7, #0] + 800dc94: b580 push {r7, lr} + 800dc96: b086 sub sp, #24 + 800dc98: af00 add r7, sp, #0 + 800dc9a: 6078 str r0, [r7, #4] + 800dc9c: 6039 str r1, [r7, #0] TCB_t * const pxTCB = pxMutexHolder; - 800d05a: 687b ldr r3, [r7, #4] - 800d05c: 613b str r3, [r7, #16] + 800dc9e: 687b ldr r3, [r7, #4] + 800dca0: 613b str r3, [r7, #16] UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse; const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1; - 800d05e: 2301 movs r3, #1 - 800d060: 60fb str r3, [r7, #12] + 800dca2: 2301 movs r3, #1 + 800dca4: 60fb str r3, [r7, #12] if( pxMutexHolder != NULL ) - 800d062: 687b ldr r3, [r7, #4] - 800d064: 2b00 cmp r3, #0 - 800d066: d058 beq.n 800d11a + 800dca6: 687b ldr r3, [r7, #4] + 800dca8: 2b00 cmp r3, #0 + 800dcaa: d058 beq.n 800dd5e { /* If pxMutexHolder is not NULL then the holder must hold at least one mutex. */ configASSERT( pxTCB->uxMutexesHeld ); - 800d068: 693b ldr r3, [r7, #16] - 800d06a: 6d1b ldr r3, [r3, #80] ; 0x50 - 800d06c: 2b00 cmp r3, #0 - 800d06e: d101 bne.n 800d074 - 800d070: b672 cpsid i - 800d072: e7fe b.n 800d072 + 800dcac: 693b ldr r3, [r7, #16] + 800dcae: 6d1b ldr r3, [r3, #80] ; 0x50 + 800dcb0: 2b00 cmp r3, #0 + 800dcb2: d101 bne.n 800dcb8 + 800dcb4: b672 cpsid i + 800dcb6: e7fe b.n 800dcb6 /* Determine the priority to which the priority of the task that holds the mutex should be set. This will be the greater of the holding task's base priority and the priority of the highest priority task that is waiting to obtain the mutex. */ if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask ) - 800d074: 693b ldr r3, [r7, #16] - 800d076: 6cdb ldr r3, [r3, #76] ; 0x4c - 800d078: 683a ldr r2, [r7, #0] - 800d07a: 429a cmp r2, r3 - 800d07c: d902 bls.n 800d084 + 800dcb8: 693b ldr r3, [r7, #16] + 800dcba: 6cdb ldr r3, [r3, #76] ; 0x4c + 800dcbc: 683a ldr r2, [r7, #0] + 800dcbe: 429a cmp r2, r3 + 800dcc0: d902 bls.n 800dcc8 { uxPriorityToUse = uxHighestPriorityWaitingTask; - 800d07e: 683b ldr r3, [r7, #0] - 800d080: 617b str r3, [r7, #20] - 800d082: e002 b.n 800d08a + 800dcc2: 683b ldr r3, [r7, #0] + 800dcc4: 617b str r3, [r7, #20] + 800dcc6: e002 b.n 800dcce } else { uxPriorityToUse = pxTCB->uxBasePriority; - 800d084: 693b ldr r3, [r7, #16] - 800d086: 6cdb ldr r3, [r3, #76] ; 0x4c - 800d088: 617b str r3, [r7, #20] + 800dcc8: 693b ldr r3, [r7, #16] + 800dcca: 6cdb ldr r3, [r3, #76] ; 0x4c + 800dccc: 617b str r3, [r7, #20] } /* Does the priority need to change? */ if( pxTCB->uxPriority != uxPriorityToUse ) - 800d08a: 693b ldr r3, [r7, #16] - 800d08c: 6adb ldr r3, [r3, #44] ; 0x2c - 800d08e: 697a ldr r2, [r7, #20] - 800d090: 429a cmp r2, r3 - 800d092: d042 beq.n 800d11a + 800dcce: 693b ldr r3, [r7, #16] + 800dcd0: 6adb ldr r3, [r3, #44] ; 0x2c + 800dcd2: 697a ldr r2, [r7, #20] + 800dcd4: 429a cmp r2, r3 + 800dcd6: d042 beq.n 800dd5e { /* Only disinherit if no other mutexes are held. This is a simplification in the priority inheritance implementation. If the task that holds the mutex is also holding other mutexes then the other mutexes may have caused the priority inheritance. */ if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld ) - 800d094: 693b ldr r3, [r7, #16] - 800d096: 6d1b ldr r3, [r3, #80] ; 0x50 - 800d098: 68fa ldr r2, [r7, #12] - 800d09a: 429a cmp r2, r3 - 800d09c: d13d bne.n 800d11a + 800dcd8: 693b ldr r3, [r7, #16] + 800dcda: 6d1b ldr r3, [r3, #80] ; 0x50 + 800dcdc: 68fa ldr r2, [r7, #12] + 800dcde: 429a cmp r2, r3 + 800dce0: d13d bne.n 800dd5e { /* If a task has timed out because it already holds the mutex it was trying to obtain then it cannot of inherited its own priority. */ configASSERT( pxTCB != pxCurrentTCB ); - 800d09e: 4b21 ldr r3, [pc, #132] ; (800d124 ) - 800d0a0: 681b ldr r3, [r3, #0] - 800d0a2: 693a ldr r2, [r7, #16] - 800d0a4: 429a cmp r2, r3 - 800d0a6: d101 bne.n 800d0ac - 800d0a8: b672 cpsid i - 800d0aa: e7fe b.n 800d0aa + 800dce2: 4b21 ldr r3, [pc, #132] ; (800dd68 ) + 800dce4: 681b ldr r3, [r3, #0] + 800dce6: 693a ldr r2, [r7, #16] + 800dce8: 429a cmp r2, r3 + 800dcea: d101 bne.n 800dcf0 + 800dcec: b672 cpsid i + 800dcee: e7fe b.n 800dcee /* Disinherit the priority, remembering the previous priority to facilitate determining the subject task's state. */ traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority ); uxPriorityUsedOnEntry = pxTCB->uxPriority; - 800d0ac: 693b ldr r3, [r7, #16] - 800d0ae: 6adb ldr r3, [r3, #44] ; 0x2c - 800d0b0: 60bb str r3, [r7, #8] + 800dcf0: 693b ldr r3, [r7, #16] + 800dcf2: 6adb ldr r3, [r3, #44] ; 0x2c + 800dcf4: 60bb str r3, [r7, #8] pxTCB->uxPriority = uxPriorityToUse; - 800d0b2: 693b ldr r3, [r7, #16] - 800d0b4: 697a ldr r2, [r7, #20] - 800d0b6: 62da str r2, [r3, #44] ; 0x2c + 800dcf6: 693b ldr r3, [r7, #16] + 800dcf8: 697a ldr r2, [r7, #20] + 800dcfa: 62da str r2, [r3, #44] ; 0x2c /* Only reset the event list item value if the value is not being used for anything else. */ if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL ) - 800d0b8: 693b ldr r3, [r7, #16] - 800d0ba: 699b ldr r3, [r3, #24] - 800d0bc: 2b00 cmp r3, #0 - 800d0be: db04 blt.n 800d0ca + 800dcfc: 693b ldr r3, [r7, #16] + 800dcfe: 699b ldr r3, [r3, #24] + 800dd00: 2b00 cmp r3, #0 + 800dd02: db04 blt.n 800dd0e { listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ - 800d0c0: 697b ldr r3, [r7, #20] - 800d0c2: 2238 movs r2, #56 ; 0x38 - 800d0c4: 1ad2 subs r2, r2, r3 - 800d0c6: 693b ldr r3, [r7, #16] - 800d0c8: 619a str r2, [r3, #24] + 800dd04: 697b ldr r3, [r7, #20] + 800dd06: 2238 movs r2, #56 ; 0x38 + 800dd08: 1ad2 subs r2, r2, r3 + 800dd0a: 693b ldr r3, [r7, #16] + 800dd0c: 619a str r2, [r3, #24] then the task that holds the mutex could be in either the Ready, Blocked or Suspended states. Only remove the task from its current state list if it is in the Ready state as the task's priority is going to change and there is one Ready list per priority. */ if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE ) - 800d0ca: 693b ldr r3, [r7, #16] - 800d0cc: 6959 ldr r1, [r3, #20] - 800d0ce: 68ba ldr r2, [r7, #8] - 800d0d0: 0013 movs r3, r2 - 800d0d2: 009b lsls r3, r3, #2 - 800d0d4: 189b adds r3, r3, r2 - 800d0d6: 009b lsls r3, r3, #2 - 800d0d8: 4a13 ldr r2, [pc, #76] ; (800d128 ) - 800d0da: 189b adds r3, r3, r2 - 800d0dc: 4299 cmp r1, r3 - 800d0de: d11c bne.n 800d11a + 800dd0e: 693b ldr r3, [r7, #16] + 800dd10: 6959 ldr r1, [r3, #20] + 800dd12: 68ba ldr r2, [r7, #8] + 800dd14: 0013 movs r3, r2 + 800dd16: 009b lsls r3, r3, #2 + 800dd18: 189b adds r3, r3, r2 + 800dd1a: 009b lsls r3, r3, #2 + 800dd1c: 4a13 ldr r2, [pc, #76] ; (800dd6c ) + 800dd1e: 189b adds r3, r3, r2 + 800dd20: 4299 cmp r1, r3 + 800dd22: d11c bne.n 800dd5e { if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) - 800d0e0: 693b ldr r3, [r7, #16] - 800d0e2: 3304 adds r3, #4 - 800d0e4: 0018 movs r0, r3 - 800d0e6: f7fe fa6a bl 800b5be + 800dd24: 693b ldr r3, [r7, #16] + 800dd26: 3304 adds r3, #4 + 800dd28: 0018 movs r0, r3 + 800dd2a: f7fe fa6a bl 800c202 else { mtCOVERAGE_TEST_MARKER(); } prvAddTaskToReadyList( pxTCB ); - 800d0ea: 693b ldr r3, [r7, #16] - 800d0ec: 6ada ldr r2, [r3, #44] ; 0x2c - 800d0ee: 4b0f ldr r3, [pc, #60] ; (800d12c ) - 800d0f0: 681b ldr r3, [r3, #0] - 800d0f2: 429a cmp r2, r3 - 800d0f4: d903 bls.n 800d0fe - 800d0f6: 693b ldr r3, [r7, #16] - 800d0f8: 6ada ldr r2, [r3, #44] ; 0x2c - 800d0fa: 4b0c ldr r3, [pc, #48] ; (800d12c ) - 800d0fc: 601a str r2, [r3, #0] - 800d0fe: 693b ldr r3, [r7, #16] - 800d100: 6ada ldr r2, [r3, #44] ; 0x2c - 800d102: 0013 movs r3, r2 - 800d104: 009b lsls r3, r3, #2 - 800d106: 189b adds r3, r3, r2 - 800d108: 009b lsls r3, r3, #2 - 800d10a: 4a07 ldr r2, [pc, #28] ; (800d128 ) - 800d10c: 189a adds r2, r3, r2 - 800d10e: 693b ldr r3, [r7, #16] - 800d110: 3304 adds r3, #4 - 800d112: 0019 movs r1, r3 - 800d114: 0010 movs r0, r2 - 800d116: f7fe f9fa bl 800b50e + 800dd2e: 693b ldr r3, [r7, #16] + 800dd30: 6ada ldr r2, [r3, #44] ; 0x2c + 800dd32: 4b0f ldr r3, [pc, #60] ; (800dd70 ) + 800dd34: 681b ldr r3, [r3, #0] + 800dd36: 429a cmp r2, r3 + 800dd38: d903 bls.n 800dd42 + 800dd3a: 693b ldr r3, [r7, #16] + 800dd3c: 6ada ldr r2, [r3, #44] ; 0x2c + 800dd3e: 4b0c ldr r3, [pc, #48] ; (800dd70 ) + 800dd40: 601a str r2, [r3, #0] + 800dd42: 693b ldr r3, [r7, #16] + 800dd44: 6ada ldr r2, [r3, #44] ; 0x2c + 800dd46: 0013 movs r3, r2 + 800dd48: 009b lsls r3, r3, #2 + 800dd4a: 189b adds r3, r3, r2 + 800dd4c: 009b lsls r3, r3, #2 + 800dd4e: 4a07 ldr r2, [pc, #28] ; (800dd6c ) + 800dd50: 189a adds r2, r3, r2 + 800dd52: 693b ldr r3, [r7, #16] + 800dd54: 3304 adds r3, #4 + 800dd56: 0019 movs r1, r3 + 800dd58: 0010 movs r0, r2 + 800dd5a: f7fe f9fa bl 800c152 } else { mtCOVERAGE_TEST_MARKER(); } } - 800d11a: 46c0 nop ; (mov r8, r8) - 800d11c: 46bd mov sp, r7 - 800d11e: b006 add sp, #24 - 800d120: bd80 pop {r7, pc} - 800d122: 46c0 nop ; (mov r8, r8) - 800d124: 20000b04 .word 0x20000b04 - 800d128: 20000b08 .word 0x20000b08 - 800d12c: 20000fe0 .word 0x20000fe0 + 800dd5e: 46c0 nop ; (mov r8, r8) + 800dd60: 46bd mov sp, r7 + 800dd62: b006 add sp, #24 + 800dd64: bd80 pop {r7, pc} + 800dd66: 46c0 nop ; (mov r8, r8) + 800dd68: 20000be4 .word 0x20000be4 + 800dd6c: 20000be8 .word 0x20000be8 + 800dd70: 200010c0 .word 0x200010c0 -0800d130 : +0800dd74 : /*-----------------------------------------------------------*/ #if ( configUSE_MUTEXES == 1 ) TaskHandle_t pvTaskIncrementMutexHeldCount( void ) { - 800d130: b580 push {r7, lr} - 800d132: af00 add r7, sp, #0 + 800dd74: b580 push {r7, lr} + 800dd76: af00 add r7, sp, #0 /* If xSemaphoreCreateMutex() is called before any tasks have been created then pxCurrentTCB will be NULL. */ if( pxCurrentTCB != NULL ) - 800d134: 4b06 ldr r3, [pc, #24] ; (800d150 ) - 800d136: 681b ldr r3, [r3, #0] - 800d138: 2b00 cmp r3, #0 - 800d13a: d004 beq.n 800d146 + 800dd78: 4b06 ldr r3, [pc, #24] ; (800dd94 ) + 800dd7a: 681b ldr r3, [r3, #0] + 800dd7c: 2b00 cmp r3, #0 + 800dd7e: d004 beq.n 800dd8a { ( pxCurrentTCB->uxMutexesHeld )++; - 800d13c: 4b04 ldr r3, [pc, #16] ; (800d150 ) - 800d13e: 681b ldr r3, [r3, #0] - 800d140: 6d1a ldr r2, [r3, #80] ; 0x50 - 800d142: 3201 adds r2, #1 - 800d144: 651a str r2, [r3, #80] ; 0x50 + 800dd80: 4b04 ldr r3, [pc, #16] ; (800dd94 ) + 800dd82: 681b ldr r3, [r3, #0] + 800dd84: 6d1a ldr r2, [r3, #80] ; 0x50 + 800dd86: 3201 adds r2, #1 + 800dd88: 651a str r2, [r3, #80] ; 0x50 } return pxCurrentTCB; - 800d146: 4b02 ldr r3, [pc, #8] ; (800d150 ) - 800d148: 681b ldr r3, [r3, #0] + 800dd8a: 4b02 ldr r3, [pc, #8] ; (800dd94 ) + 800dd8c: 681b ldr r3, [r3, #0] } - 800d14a: 0018 movs r0, r3 - 800d14c: 46bd mov sp, r7 - 800d14e: bd80 pop {r7, pc} - 800d150: 20000b04 .word 0x20000b04 + 800dd8e: 0018 movs r0, r3 + 800dd90: 46bd mov sp, r7 + 800dd92: bd80 pop {r7, pc} + 800dd94: 20000be4 .word 0x20000be4 -0800d154 : +0800dd98 : #endif /*-----------------------------------------------------------*/ static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) { - 800d154: b580 push {r7, lr} - 800d156: b084 sub sp, #16 - 800d158: af00 add r7, sp, #0 - 800d15a: 6078 str r0, [r7, #4] - 800d15c: 6039 str r1, [r7, #0] + 800dd98: b580 push {r7, lr} + 800dd9a: b084 sub sp, #16 + 800dd9c: af00 add r7, sp, #0 + 800dd9e: 6078 str r0, [r7, #4] + 800dda0: 6039 str r1, [r7, #0] TickType_t xTimeToWake; const TickType_t xConstTickCount = xTickCount; - 800d15e: 4b21 ldr r3, [pc, #132] ; (800d1e4 ) - 800d160: 681b ldr r3, [r3, #0] - 800d162: 60fb str r3, [r7, #12] + 800dda2: 4b21 ldr r3, [pc, #132] ; (800de28 ) + 800dda4: 681b ldr r3, [r3, #0] + 800dda6: 60fb str r3, [r7, #12] } #endif /* Remove the task from the ready list before adding it to the blocked list as the same list item is used for both lists. */ if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) - 800d164: 4b20 ldr r3, [pc, #128] ; (800d1e8 ) - 800d166: 681b ldr r3, [r3, #0] - 800d168: 3304 adds r3, #4 - 800d16a: 0018 movs r0, r3 - 800d16c: f7fe fa27 bl 800b5be + 800dda8: 4b20 ldr r3, [pc, #128] ; (800de2c ) + 800ddaa: 681b ldr r3, [r3, #0] + 800ddac: 3304 adds r3, #4 + 800ddae: 0018 movs r0, r3 + 800ddb0: f7fe fa27 bl 800c202 mtCOVERAGE_TEST_MARKER(); } #if ( INCLUDE_vTaskSuspend == 1 ) { if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) ) - 800d170: 687b ldr r3, [r7, #4] - 800d172: 3301 adds r3, #1 - 800d174: d10b bne.n 800d18e - 800d176: 683b ldr r3, [r7, #0] - 800d178: 2b00 cmp r3, #0 - 800d17a: d008 beq.n 800d18e + 800ddb4: 687b ldr r3, [r7, #4] + 800ddb6: 3301 adds r3, #1 + 800ddb8: d10b bne.n 800ddd2 + 800ddba: 683b ldr r3, [r7, #0] + 800ddbc: 2b00 cmp r3, #0 + 800ddbe: d008 beq.n 800ddd2 { /* Add the task to the suspended task list instead of a delayed task list to ensure it is not woken by a timing event. It will block indefinitely. */ vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) ); - 800d17c: 4b1a ldr r3, [pc, #104] ; (800d1e8 ) - 800d17e: 681b ldr r3, [r3, #0] - 800d180: 1d1a adds r2, r3, #4 - 800d182: 4b1a ldr r3, [pc, #104] ; (800d1ec ) - 800d184: 0011 movs r1, r2 - 800d186: 0018 movs r0, r3 - 800d188: f7fe f9c1 bl 800b50e + 800ddc0: 4b1a ldr r3, [pc, #104] ; (800de2c ) + 800ddc2: 681b ldr r3, [r3, #0] + 800ddc4: 1d1a adds r2, r3, #4 + 800ddc6: 4b1a ldr r3, [pc, #104] ; (800de30 ) + 800ddc8: 0011 movs r1, r2 + 800ddca: 0018 movs r0, r3 + 800ddcc: f7fe f9c1 bl 800c152 /* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */ ( void ) xCanBlockIndefinitely; } #endif /* INCLUDE_vTaskSuspend */ } - 800d18c: e026 b.n 800d1dc + 800ddd0: e026 b.n 800de20 xTimeToWake = xConstTickCount + xTicksToWait; - 800d18e: 68fa ldr r2, [r7, #12] - 800d190: 687b ldr r3, [r7, #4] - 800d192: 18d3 adds r3, r2, r3 - 800d194: 60bb str r3, [r7, #8] + 800ddd2: 68fa ldr r2, [r7, #12] + 800ddd4: 687b ldr r3, [r7, #4] + 800ddd6: 18d3 adds r3, r2, r3 + 800ddd8: 60bb str r3, [r7, #8] listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake ); - 800d196: 4b14 ldr r3, [pc, #80] ; (800d1e8 ) - 800d198: 681b ldr r3, [r3, #0] - 800d19a: 68ba ldr r2, [r7, #8] - 800d19c: 605a str r2, [r3, #4] + 800ddda: 4b14 ldr r3, [pc, #80] ; (800de2c ) + 800dddc: 681b ldr r3, [r3, #0] + 800ddde: 68ba ldr r2, [r7, #8] + 800dde0: 605a str r2, [r3, #4] if( xTimeToWake < xConstTickCount ) - 800d19e: 68ba ldr r2, [r7, #8] - 800d1a0: 68fb ldr r3, [r7, #12] - 800d1a2: 429a cmp r2, r3 - 800d1a4: d209 bcs.n 800d1ba + 800dde2: 68ba ldr r2, [r7, #8] + 800dde4: 68fb ldr r3, [r7, #12] + 800dde6: 429a cmp r2, r3 + 800dde8: d209 bcs.n 800ddfe vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) ); - 800d1a6: 4b12 ldr r3, [pc, #72] ; (800d1f0 ) - 800d1a8: 681a ldr r2, [r3, #0] - 800d1aa: 4b0f ldr r3, [pc, #60] ; (800d1e8 ) - 800d1ac: 681b ldr r3, [r3, #0] - 800d1ae: 3304 adds r3, #4 - 800d1b0: 0019 movs r1, r3 - 800d1b2: 0010 movs r0, r2 - 800d1b4: f7fe f9cd bl 800b552 + 800ddea: 4b12 ldr r3, [pc, #72] ; (800de34 ) + 800ddec: 681a ldr r2, [r3, #0] + 800ddee: 4b0f ldr r3, [pc, #60] ; (800de2c ) + 800ddf0: 681b ldr r3, [r3, #0] + 800ddf2: 3304 adds r3, #4 + 800ddf4: 0019 movs r1, r3 + 800ddf6: 0010 movs r0, r2 + 800ddf8: f7fe f9cd bl 800c196 } - 800d1b8: e010 b.n 800d1dc + 800ddfc: e010 b.n 800de20 vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) ); - 800d1ba: 4b0e ldr r3, [pc, #56] ; (800d1f4 ) - 800d1bc: 681a ldr r2, [r3, #0] - 800d1be: 4b0a ldr r3, [pc, #40] ; (800d1e8 ) - 800d1c0: 681b ldr r3, [r3, #0] - 800d1c2: 3304 adds r3, #4 - 800d1c4: 0019 movs r1, r3 - 800d1c6: 0010 movs r0, r2 - 800d1c8: f7fe f9c3 bl 800b552 + 800ddfe: 4b0e ldr r3, [pc, #56] ; (800de38 ) + 800de00: 681a ldr r2, [r3, #0] + 800de02: 4b0a ldr r3, [pc, #40] ; (800de2c ) + 800de04: 681b ldr r3, [r3, #0] + 800de06: 3304 adds r3, #4 + 800de08: 0019 movs r1, r3 + 800de0a: 0010 movs r0, r2 + 800de0c: f7fe f9c3 bl 800c196 if( xTimeToWake < xNextTaskUnblockTime ) - 800d1cc: 4b0a ldr r3, [pc, #40] ; (800d1f8 ) - 800d1ce: 681b ldr r3, [r3, #0] - 800d1d0: 68ba ldr r2, [r7, #8] - 800d1d2: 429a cmp r2, r3 - 800d1d4: d202 bcs.n 800d1dc + 800de10: 4b0a ldr r3, [pc, #40] ; (800de3c ) + 800de12: 681b ldr r3, [r3, #0] + 800de14: 68ba ldr r2, [r7, #8] + 800de16: 429a cmp r2, r3 + 800de18: d202 bcs.n 800de20 xNextTaskUnblockTime = xTimeToWake; - 800d1d6: 4b08 ldr r3, [pc, #32] ; (800d1f8 ) - 800d1d8: 68ba ldr r2, [r7, #8] - 800d1da: 601a str r2, [r3, #0] + 800de1a: 4b08 ldr r3, [pc, #32] ; (800de3c ) + 800de1c: 68ba ldr r2, [r7, #8] + 800de1e: 601a str r2, [r3, #0] } - 800d1dc: 46c0 nop ; (mov r8, r8) - 800d1de: 46bd mov sp, r7 - 800d1e0: b004 add sp, #16 - 800d1e2: bd80 pop {r7, pc} - 800d1e4: 20000fdc .word 0x20000fdc - 800d1e8: 20000b04 .word 0x20000b04 - 800d1ec: 20000fc4 .word 0x20000fc4 - 800d1f0: 20000f94 .word 0x20000f94 - 800d1f4: 20000f90 .word 0x20000f90 - 800d1f8: 20000ff8 .word 0x20000ff8 + 800de20: 46c0 nop ; (mov r8, r8) + 800de22: 46bd mov sp, r7 + 800de24: b004 add sp, #16 + 800de26: bd80 pop {r7, pc} + 800de28: 200010bc .word 0x200010bc + 800de2c: 20000be4 .word 0x20000be4 + 800de30: 200010a4 .word 0x200010a4 + 800de34: 20001074 .word 0x20001074 + 800de38: 20001070 .word 0x20001070 + 800de3c: 200010d8 .word 0x200010d8 -0800d1fc : +0800de40 : TimerCallbackFunction_t pxCallbackFunction, Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION; /*-----------------------------------------------------------*/ BaseType_t xTimerCreateTimerTask( void ) { - 800d1fc: b590 push {r4, r7, lr} - 800d1fe: b089 sub sp, #36 ; 0x24 - 800d200: af04 add r7, sp, #16 + 800de40: b590 push {r4, r7, lr} + 800de42: b089 sub sp, #36 ; 0x24 + 800de44: af04 add r7, sp, #16 BaseType_t xReturn = pdFAIL; - 800d202: 2300 movs r3, #0 - 800d204: 60fb str r3, [r7, #12] + 800de46: 2300 movs r3, #0 + 800de48: 60fb str r3, [r7, #12] /* This function is called when the scheduler is started if configUSE_TIMERS is set to 1. Check that the infrastructure used by the timer service task has been created/initialised. If timers have already been created then the initialisation will already have been performed. */ prvCheckForValidListAndQueue(); - 800d206: f000 fb4b bl 800d8a0 + 800de4a: f000 fb4b bl 800e4e4 if( xTimerQueue != NULL ) - 800d20a: 4b17 ldr r3, [pc, #92] ; (800d268 ) - 800d20c: 681b ldr r3, [r3, #0] - 800d20e: 2b00 cmp r3, #0 - 800d210: d020 beq.n 800d254 + 800de4e: 4b17 ldr r3, [pc, #92] ; (800deac ) + 800de50: 681b ldr r3, [r3, #0] + 800de52: 2b00 cmp r3, #0 + 800de54: d020 beq.n 800de98 { #if( configSUPPORT_STATIC_ALLOCATION == 1 ) { StaticTask_t *pxTimerTaskTCBBuffer = NULL; - 800d212: 2300 movs r3, #0 - 800d214: 60bb str r3, [r7, #8] + 800de56: 2300 movs r3, #0 + 800de58: 60bb str r3, [r7, #8] StackType_t *pxTimerTaskStackBuffer = NULL; - 800d216: 2300 movs r3, #0 - 800d218: 607b str r3, [r7, #4] + 800de5a: 2300 movs r3, #0 + 800de5c: 607b str r3, [r7, #4] uint32_t ulTimerTaskStackSize; vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize ); - 800d21a: 003a movs r2, r7 - 800d21c: 1d39 adds r1, r7, #4 - 800d21e: 2308 movs r3, #8 - 800d220: 18fb adds r3, r7, r3 - 800d222: 0018 movs r0, r3 - 800d224: f7fe f932 bl 800b48c + 800de5e: 003a movs r2, r7 + 800de60: 1d39 adds r1, r7, #4 + 800de62: 2308 movs r3, #8 + 800de64: 18fb adds r3, r7, r3 + 800de66: 0018 movs r0, r3 + 800de68: f7fe f932 bl 800c0d0 xTimerTaskHandle = xTaskCreateStatic( prvTimerTask, - 800d228: 683c ldr r4, [r7, #0] - 800d22a: 687b ldr r3, [r7, #4] - 800d22c: 68ba ldr r2, [r7, #8] - 800d22e: 490f ldr r1, [pc, #60] ; (800d26c ) - 800d230: 480f ldr r0, [pc, #60] ; (800d270 ) - 800d232: 9202 str r2, [sp, #8] - 800d234: 9301 str r3, [sp, #4] - 800d236: 2302 movs r3, #2 - 800d238: 9300 str r3, [sp, #0] - 800d23a: 2300 movs r3, #0 - 800d23c: 0022 movs r2, r4 - 800d23e: f7ff f870 bl 800c322 - 800d242: 0002 movs r2, r0 - 800d244: 4b0b ldr r3, [pc, #44] ; (800d274 ) - 800d246: 601a str r2, [r3, #0] + 800de6c: 683c ldr r4, [r7, #0] + 800de6e: 687b ldr r3, [r7, #4] + 800de70: 68ba ldr r2, [r7, #8] + 800de72: 490f ldr r1, [pc, #60] ; (800deb0 ) + 800de74: 480f ldr r0, [pc, #60] ; (800deb4 ) + 800de76: 9202 str r2, [sp, #8] + 800de78: 9301 str r3, [sp, #4] + 800de7a: 2302 movs r3, #2 + 800de7c: 9300 str r3, [sp, #0] + 800de7e: 2300 movs r3, #0 + 800de80: 0022 movs r2, r4 + 800de82: f7ff f870 bl 800cf66 + 800de86: 0002 movs r2, r0 + 800de88: 4b0b ldr r3, [pc, #44] ; (800deb8 ) + 800de8a: 601a str r2, [r3, #0] NULL, ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, pxTimerTaskStackBuffer, pxTimerTaskTCBBuffer ); if( xTimerTaskHandle != NULL ) - 800d248: 4b0a ldr r3, [pc, #40] ; (800d274 ) - 800d24a: 681b ldr r3, [r3, #0] - 800d24c: 2b00 cmp r3, #0 - 800d24e: d001 beq.n 800d254 + 800de8c: 4b0a ldr r3, [pc, #40] ; (800deb8 ) + 800de8e: 681b ldr r3, [r3, #0] + 800de90: 2b00 cmp r3, #0 + 800de92: d001 beq.n 800de98 { xReturn = pdPASS; - 800d250: 2301 movs r3, #1 - 800d252: 60fb str r3, [r7, #12] + 800de94: 2301 movs r3, #1 + 800de96: 60fb str r3, [r7, #12] else { mtCOVERAGE_TEST_MARKER(); } configASSERT( xReturn ); - 800d254: 68fb ldr r3, [r7, #12] - 800d256: 2b00 cmp r3, #0 - 800d258: d101 bne.n 800d25e - 800d25a: b672 cpsid i - 800d25c: e7fe b.n 800d25c + 800de98: 68fb ldr r3, [r7, #12] + 800de9a: 2b00 cmp r3, #0 + 800de9c: d101 bne.n 800dea2 + 800de9e: b672 cpsid i + 800dea0: e7fe b.n 800dea0 return xReturn; - 800d25e: 68fb ldr r3, [r7, #12] + 800dea2: 68fb ldr r3, [r7, #12] } - 800d260: 0018 movs r0, r3 - 800d262: 46bd mov sp, r7 - 800d264: b005 add sp, #20 - 800d266: bd90 pop {r4, r7, pc} - 800d268: 20001034 .word 0x20001034 - 800d26c: 0800eb5c .word 0x0800eb5c - 800d270: 0800d499 .word 0x0800d499 - 800d274: 20001038 .word 0x20001038 + 800dea4: 0018 movs r0, r3 + 800dea6: 46bd mov sp, r7 + 800dea8: b005 add sp, #20 + 800deaa: bd90 pop {r4, r7, pc} + 800deac: 20001114 .word 0x20001114 + 800deb0: 0800f79c .word 0x0800f79c + 800deb4: 0800e0dd .word 0x0800e0dd + 800deb8: 20001118 .word 0x20001118 -0800d278 : +0800debc : TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) { - 800d278: b590 push {r4, r7, lr} - 800d27a: b089 sub sp, #36 ; 0x24 - 800d27c: af02 add r7, sp, #8 - 800d27e: 60f8 str r0, [r7, #12] - 800d280: 60b9 str r1, [r7, #8] - 800d282: 607a str r2, [r7, #4] - 800d284: 603b str r3, [r7, #0] + 800debc: b590 push {r4, r7, lr} + 800debe: b089 sub sp, #36 ; 0x24 + 800dec0: af02 add r7, sp, #8 + 800dec2: 60f8 str r0, [r7, #12] + 800dec4: 60b9 str r1, [r7, #8] + 800dec6: 607a str r2, [r7, #4] + 800dec8: 603b str r3, [r7, #0] Timer_t *pxNewTimer; pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */ - 800d286: 202c movs r0, #44 ; 0x2c - 800d288: f000 fcba bl 800dc00 - 800d28c: 0003 movs r3, r0 - 800d28e: 617b str r3, [r7, #20] + 800deca: 202c movs r0, #44 ; 0x2c + 800decc: f000 fcb8 bl 800e840 + 800ded0: 0003 movs r3, r0 + 800ded2: 617b str r3, [r7, #20] if( pxNewTimer != NULL ) - 800d290: 697b ldr r3, [r7, #20] - 800d292: 2b00 cmp r3, #0 - 800d294: d00e beq.n 800d2b4 + 800ded4: 697b ldr r3, [r7, #20] + 800ded6: 2b00 cmp r3, #0 + 800ded8: d00e beq.n 800def8 { /* Status is thus far zero as the timer is not created statically and has not been started. The auto-reload bit may get set in prvInitialiseNewTimer. */ pxNewTimer->ucStatus = 0x00; - 800d296: 697b ldr r3, [r7, #20] - 800d298: 2228 movs r2, #40 ; 0x28 - 800d29a: 2100 movs r1, #0 - 800d29c: 5499 strb r1, [r3, r2] + 800deda: 697b ldr r3, [r7, #20] + 800dedc: 2228 movs r2, #40 ; 0x28 + 800dede: 2100 movs r1, #0 + 800dee0: 5499 strb r1, [r3, r2] prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer ); - 800d29e: 683c ldr r4, [r7, #0] - 800d2a0: 687a ldr r2, [r7, #4] - 800d2a2: 68b9 ldr r1, [r7, #8] - 800d2a4: 68f8 ldr r0, [r7, #12] - 800d2a6: 697b ldr r3, [r7, #20] - 800d2a8: 9301 str r3, [sp, #4] - 800d2aa: 6abb ldr r3, [r7, #40] ; 0x28 - 800d2ac: 9300 str r3, [sp, #0] - 800d2ae: 0023 movs r3, r4 - 800d2b0: f000 f832 bl 800d318 + 800dee2: 683c ldr r4, [r7, #0] + 800dee4: 687a ldr r2, [r7, #4] + 800dee6: 68b9 ldr r1, [r7, #8] + 800dee8: 68f8 ldr r0, [r7, #12] + 800deea: 697b ldr r3, [r7, #20] + 800deec: 9301 str r3, [sp, #4] + 800deee: 6abb ldr r3, [r7, #40] ; 0x28 + 800def0: 9300 str r3, [sp, #0] + 800def2: 0023 movs r3, r4 + 800def4: f000 f832 bl 800df5c } return pxNewTimer; - 800d2b4: 697b ldr r3, [r7, #20] + 800def8: 697b ldr r3, [r7, #20] } - 800d2b6: 0018 movs r0, r3 - 800d2b8: 46bd mov sp, r7 - 800d2ba: b007 add sp, #28 - 800d2bc: bd90 pop {r4, r7, pc} + 800defa: 0018 movs r0, r3 + 800defc: 46bd mov sp, r7 + 800defe: b007 add sp, #28 + 800df00: bd90 pop {r4, r7, pc} -0800d2be : +0800df02 : const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) { - 800d2be: b590 push {r4, r7, lr} - 800d2c0: b089 sub sp, #36 ; 0x24 - 800d2c2: af02 add r7, sp, #8 - 800d2c4: 60f8 str r0, [r7, #12] - 800d2c6: 60b9 str r1, [r7, #8] - 800d2c8: 607a str r2, [r7, #4] - 800d2ca: 603b str r3, [r7, #0] + 800df02: b590 push {r4, r7, lr} + 800df04: b089 sub sp, #36 ; 0x24 + 800df06: af02 add r7, sp, #8 + 800df08: 60f8 str r0, [r7, #12] + 800df0a: 60b9 str r1, [r7, #8] + 800df0c: 607a str r2, [r7, #4] + 800df0e: 603b str r3, [r7, #0] #if( configASSERT_DEFINED == 1 ) { /* Sanity check that the size of the structure used to declare a variable of type StaticTimer_t equals the size of the real timer structure. */ volatile size_t xSize = sizeof( StaticTimer_t ); - 800d2cc: 232c movs r3, #44 ; 0x2c - 800d2ce: 613b str r3, [r7, #16] + 800df10: 232c movs r3, #44 ; 0x2c + 800df12: 613b str r3, [r7, #16] configASSERT( xSize == sizeof( Timer_t ) ); - 800d2d0: 693b ldr r3, [r7, #16] - 800d2d2: 2b2c cmp r3, #44 ; 0x2c - 800d2d4: d001 beq.n 800d2da - 800d2d6: b672 cpsid i - 800d2d8: e7fe b.n 800d2d8 + 800df14: 693b ldr r3, [r7, #16] + 800df16: 2b2c cmp r3, #44 ; 0x2c + 800df18: d001 beq.n 800df1e + 800df1a: b672 cpsid i + 800df1c: e7fe b.n 800df1c ( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */ - 800d2da: 693b ldr r3, [r7, #16] + 800df1e: 693b ldr r3, [r7, #16] } #endif /* configASSERT_DEFINED */ /* A pointer to a StaticTimer_t structure MUST be provided, use it. */ configASSERT( pxTimerBuffer ); - 800d2dc: 6afb ldr r3, [r7, #44] ; 0x2c - 800d2de: 2b00 cmp r3, #0 - 800d2e0: d101 bne.n 800d2e6 - 800d2e2: b672 cpsid i - 800d2e4: e7fe b.n 800d2e4 + 800df20: 6afb ldr r3, [r7, #44] ; 0x2c + 800df22: 2b00 cmp r3, #0 + 800df24: d101 bne.n 800df2a + 800df26: b672 cpsid i + 800df28: e7fe b.n 800df28 pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */ - 800d2e6: 6afb ldr r3, [r7, #44] ; 0x2c - 800d2e8: 617b str r3, [r7, #20] + 800df2a: 6afb ldr r3, [r7, #44] ; 0x2c + 800df2c: 617b str r3, [r7, #20] if( pxNewTimer != NULL ) - 800d2ea: 697b ldr r3, [r7, #20] - 800d2ec: 2b00 cmp r3, #0 - 800d2ee: d00e beq.n 800d30e + 800df2e: 697b ldr r3, [r7, #20] + 800df30: 2b00 cmp r3, #0 + 800df32: d00e beq.n 800df52 { /* Timers can be created statically or dynamically so note this timer was created statically in case it is later deleted. The auto-reload bit may get set in prvInitialiseNewTimer(). */ pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED; - 800d2f0: 697b ldr r3, [r7, #20] - 800d2f2: 2228 movs r2, #40 ; 0x28 - 800d2f4: 2102 movs r1, #2 - 800d2f6: 5499 strb r1, [r3, r2] + 800df34: 697b ldr r3, [r7, #20] + 800df36: 2228 movs r2, #40 ; 0x28 + 800df38: 2102 movs r1, #2 + 800df3a: 5499 strb r1, [r3, r2] prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer ); - 800d2f8: 683c ldr r4, [r7, #0] - 800d2fa: 687a ldr r2, [r7, #4] - 800d2fc: 68b9 ldr r1, [r7, #8] - 800d2fe: 68f8 ldr r0, [r7, #12] - 800d300: 697b ldr r3, [r7, #20] - 800d302: 9301 str r3, [sp, #4] - 800d304: 6abb ldr r3, [r7, #40] ; 0x28 - 800d306: 9300 str r3, [sp, #0] - 800d308: 0023 movs r3, r4 - 800d30a: f000 f805 bl 800d318 + 800df3c: 683c ldr r4, [r7, #0] + 800df3e: 687a ldr r2, [r7, #4] + 800df40: 68b9 ldr r1, [r7, #8] + 800df42: 68f8 ldr r0, [r7, #12] + 800df44: 697b ldr r3, [r7, #20] + 800df46: 9301 str r3, [sp, #4] + 800df48: 6abb ldr r3, [r7, #40] ; 0x28 + 800df4a: 9300 str r3, [sp, #0] + 800df4c: 0023 movs r3, r4 + 800df4e: f000 f805 bl 800df5c } return pxNewTimer; - 800d30e: 697b ldr r3, [r7, #20] + 800df52: 697b ldr r3, [r7, #20] } - 800d310: 0018 movs r0, r3 - 800d312: 46bd mov sp, r7 - 800d314: b007 add sp, #28 - 800d316: bd90 pop {r4, r7, pc} + 800df54: 0018 movs r0, r3 + 800df56: 46bd mov sp, r7 + 800df58: b007 add sp, #28 + 800df5a: bd90 pop {r4, r7, pc} -0800d318 : +0800df5c : const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, Timer_t *pxNewTimer ) { - 800d318: b580 push {r7, lr} - 800d31a: b084 sub sp, #16 - 800d31c: af00 add r7, sp, #0 - 800d31e: 60f8 str r0, [r7, #12] - 800d320: 60b9 str r1, [r7, #8] - 800d322: 607a str r2, [r7, #4] - 800d324: 603b str r3, [r7, #0] + 800df5c: b580 push {r7, lr} + 800df5e: b084 sub sp, #16 + 800df60: af00 add r7, sp, #0 + 800df62: 60f8 str r0, [r7, #12] + 800df64: 60b9 str r1, [r7, #8] + 800df66: 607a str r2, [r7, #4] + 800df68: 603b str r3, [r7, #0] /* 0 is not a valid value for xTimerPeriodInTicks. */ configASSERT( ( xTimerPeriodInTicks > 0 ) ); - 800d326: 68bb ldr r3, [r7, #8] - 800d328: 2b00 cmp r3, #0 - 800d32a: d101 bne.n 800d330 - 800d32c: b672 cpsid i - 800d32e: e7fe b.n 800d32e + 800df6a: 68bb ldr r3, [r7, #8] + 800df6c: 2b00 cmp r3, #0 + 800df6e: d101 bne.n 800df74 + 800df70: b672 cpsid i + 800df72: e7fe b.n 800df72 if( pxNewTimer != NULL ) - 800d330: 69fb ldr r3, [r7, #28] - 800d332: 2b00 cmp r3, #0 - 800d334: d01e beq.n 800d374 + 800df74: 69fb ldr r3, [r7, #28] + 800df76: 2b00 cmp r3, #0 + 800df78: d01e beq.n 800dfb8 { /* Ensure the infrastructure used by the timer service task has been created/initialised. */ prvCheckForValidListAndQueue(); - 800d336: f000 fab3 bl 800d8a0 + 800df7a: f000 fab3 bl 800e4e4 /* Initialise the timer structure members using the function parameters. */ pxNewTimer->pcTimerName = pcTimerName; - 800d33a: 69fb ldr r3, [r7, #28] - 800d33c: 68fa ldr r2, [r7, #12] - 800d33e: 601a str r2, [r3, #0] + 800df7e: 69fb ldr r3, [r7, #28] + 800df80: 68fa ldr r2, [r7, #12] + 800df82: 601a str r2, [r3, #0] pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks; - 800d340: 69fb ldr r3, [r7, #28] - 800d342: 68ba ldr r2, [r7, #8] - 800d344: 619a str r2, [r3, #24] + 800df84: 69fb ldr r3, [r7, #28] + 800df86: 68ba ldr r2, [r7, #8] + 800df88: 619a str r2, [r3, #24] pxNewTimer->pvTimerID = pvTimerID; - 800d346: 69fb ldr r3, [r7, #28] - 800d348: 683a ldr r2, [r7, #0] - 800d34a: 61da str r2, [r3, #28] + 800df8a: 69fb ldr r3, [r7, #28] + 800df8c: 683a ldr r2, [r7, #0] + 800df8e: 61da str r2, [r3, #28] pxNewTimer->pxCallbackFunction = pxCallbackFunction; - 800d34c: 69fb ldr r3, [r7, #28] - 800d34e: 69ba ldr r2, [r7, #24] - 800d350: 621a str r2, [r3, #32] + 800df90: 69fb ldr r3, [r7, #28] + 800df92: 69ba ldr r2, [r7, #24] + 800df94: 621a str r2, [r3, #32] vListInitialiseItem( &( pxNewTimer->xTimerListItem ) ); - 800d352: 69fb ldr r3, [r7, #28] - 800d354: 3304 adds r3, #4 - 800d356: 0018 movs r0, r3 - 800d358: f7fe f8ce bl 800b4f8 + 800df96: 69fb ldr r3, [r7, #28] + 800df98: 3304 adds r3, #4 + 800df9a: 0018 movs r0, r3 + 800df9c: f7fe f8ce bl 800c13c if( uxAutoReload != pdFALSE ) - 800d35c: 687b ldr r3, [r7, #4] - 800d35e: 2b00 cmp r3, #0 - 800d360: d008 beq.n 800d374 + 800dfa0: 687b ldr r3, [r7, #4] + 800dfa2: 2b00 cmp r3, #0 + 800dfa4: d008 beq.n 800dfb8 { pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD; - 800d362: 69fb ldr r3, [r7, #28] - 800d364: 2228 movs r2, #40 ; 0x28 - 800d366: 5c9b ldrb r3, [r3, r2] - 800d368: 2204 movs r2, #4 - 800d36a: 4313 orrs r3, r2 - 800d36c: b2d9 uxtb r1, r3 - 800d36e: 69fb ldr r3, [r7, #28] - 800d370: 2228 movs r2, #40 ; 0x28 - 800d372: 5499 strb r1, [r3, r2] + 800dfa6: 69fb ldr r3, [r7, #28] + 800dfa8: 2228 movs r2, #40 ; 0x28 + 800dfaa: 5c9b ldrb r3, [r3, r2] + 800dfac: 2204 movs r2, #4 + 800dfae: 4313 orrs r3, r2 + 800dfb0: b2d9 uxtb r1, r3 + 800dfb2: 69fb ldr r3, [r7, #28] + 800dfb4: 2228 movs r2, #40 ; 0x28 + 800dfb6: 5499 strb r1, [r3, r2] } traceTIMER_CREATE( pxNewTimer ); } } - 800d374: 46c0 nop ; (mov r8, r8) - 800d376: 46bd mov sp, r7 - 800d378: b004 add sp, #16 - 800d37a: bd80 pop {r7, pc} + 800dfb8: 46c0 nop ; (mov r8, r8) + 800dfba: 46bd mov sp, r7 + 800dfbc: b004 add sp, #16 + 800dfbe: bd80 pop {r7, pc} -0800d37c : +0800dfc0 : /*-----------------------------------------------------------*/ BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) { - 800d37c: b590 push {r4, r7, lr} - 800d37e: b08b sub sp, #44 ; 0x2c - 800d380: af00 add r7, sp, #0 - 800d382: 60f8 str r0, [r7, #12] - 800d384: 60b9 str r1, [r7, #8] - 800d386: 607a str r2, [r7, #4] - 800d388: 603b str r3, [r7, #0] + 800dfc0: b590 push {r4, r7, lr} + 800dfc2: b08b sub sp, #44 ; 0x2c + 800dfc4: af00 add r7, sp, #0 + 800dfc6: 60f8 str r0, [r7, #12] + 800dfc8: 60b9 str r1, [r7, #8] + 800dfca: 607a str r2, [r7, #4] + 800dfcc: 603b str r3, [r7, #0] BaseType_t xReturn = pdFAIL; - 800d38a: 2300 movs r3, #0 - 800d38c: 627b str r3, [r7, #36] ; 0x24 + 800dfce: 2300 movs r3, #0 + 800dfd0: 627b str r3, [r7, #36] ; 0x24 DaemonTaskMessage_t xMessage; configASSERT( xTimer ); - 800d38e: 68fb ldr r3, [r7, #12] - 800d390: 2b00 cmp r3, #0 - 800d392: d101 bne.n 800d398 - 800d394: b672 cpsid i - 800d396: e7fe b.n 800d396 + 800dfd2: 68fb ldr r3, [r7, #12] + 800dfd4: 2b00 cmp r3, #0 + 800dfd6: d101 bne.n 800dfdc + 800dfd8: b672 cpsid i + 800dfda: e7fe b.n 800dfda /* Send a message to the timer service task to perform a particular action on a particular timer definition. */ if( xTimerQueue != NULL ) - 800d398: 4b1c ldr r3, [pc, #112] ; (800d40c ) - 800d39a: 681b ldr r3, [r3, #0] - 800d39c: 2b00 cmp r3, #0 - 800d39e: d030 beq.n 800d402 + 800dfdc: 4b1c ldr r3, [pc, #112] ; (800e050 ) + 800dfde: 681b ldr r3, [r3, #0] + 800dfe0: 2b00 cmp r3, #0 + 800dfe2: d030 beq.n 800e046 { /* Send a command to the timer service task to start the xTimer timer. */ xMessage.xMessageID = xCommandID; - 800d3a0: 2414 movs r4, #20 - 800d3a2: 193b adds r3, r7, r4 - 800d3a4: 68ba ldr r2, [r7, #8] - 800d3a6: 601a str r2, [r3, #0] + 800dfe4: 2414 movs r4, #20 + 800dfe6: 193b adds r3, r7, r4 + 800dfe8: 68ba ldr r2, [r7, #8] + 800dfea: 601a str r2, [r3, #0] xMessage.u.xTimerParameters.xMessageValue = xOptionalValue; - 800d3a8: 193b adds r3, r7, r4 - 800d3aa: 687a ldr r2, [r7, #4] - 800d3ac: 605a str r2, [r3, #4] + 800dfec: 193b adds r3, r7, r4 + 800dfee: 687a ldr r2, [r7, #4] + 800dff0: 605a str r2, [r3, #4] xMessage.u.xTimerParameters.pxTimer = xTimer; - 800d3ae: 193b adds r3, r7, r4 - 800d3b0: 68fa ldr r2, [r7, #12] - 800d3b2: 609a str r2, [r3, #8] + 800dff2: 193b adds r3, r7, r4 + 800dff4: 68fa ldr r2, [r7, #12] + 800dff6: 609a str r2, [r3, #8] if( xCommandID < tmrFIRST_FROM_ISR_COMMAND ) - 800d3b4: 68bb ldr r3, [r7, #8] - 800d3b6: 2b05 cmp r3, #5 - 800d3b8: dc19 bgt.n 800d3ee + 800dff8: 68bb ldr r3, [r7, #8] + 800dffa: 2b05 cmp r3, #5 + 800dffc: dc19 bgt.n 800e032 { if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING ) - 800d3ba: f7ff fd69 bl 800ce90 - 800d3be: 0003 movs r3, r0 - 800d3c0: 2b02 cmp r3, #2 - 800d3c2: d109 bne.n 800d3d8 + 800dffe: f7ff fd69 bl 800dad4 + 800e002: 0003 movs r3, r0 + 800e004: 2b02 cmp r3, #2 + 800e006: d109 bne.n 800e01c { xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait ); - 800d3c4: 4b11 ldr r3, [pc, #68] ; (800d40c ) - 800d3c6: 6818 ldr r0, [r3, #0] - 800d3c8: 6bba ldr r2, [r7, #56] ; 0x38 - 800d3ca: 1939 adds r1, r7, r4 - 800d3cc: 2300 movs r3, #0 - 800d3ce: f7fe fac8 bl 800b962 - 800d3d2: 0003 movs r3, r0 - 800d3d4: 627b str r3, [r7, #36] ; 0x24 - 800d3d6: e014 b.n 800d402 + 800e008: 4b11 ldr r3, [pc, #68] ; (800e050 ) + 800e00a: 6818 ldr r0, [r3, #0] + 800e00c: 6bba ldr r2, [r7, #56] ; 0x38 + 800e00e: 1939 adds r1, r7, r4 + 800e010: 2300 movs r3, #0 + 800e012: f7fe fac8 bl 800c5a6 + 800e016: 0003 movs r3, r0 + 800e018: 627b str r3, [r7, #36] ; 0x24 + 800e01a: e014 b.n 800e046 } else { xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY ); - 800d3d8: 4b0c ldr r3, [pc, #48] ; (800d40c ) - 800d3da: 6818 ldr r0, [r3, #0] - 800d3dc: 2314 movs r3, #20 - 800d3de: 18f9 adds r1, r7, r3 - 800d3e0: 2300 movs r3, #0 - 800d3e2: 2200 movs r2, #0 - 800d3e4: f7fe fabd bl 800b962 - 800d3e8: 0003 movs r3, r0 - 800d3ea: 627b str r3, [r7, #36] ; 0x24 - 800d3ec: e009 b.n 800d402 + 800e01c: 4b0c ldr r3, [pc, #48] ; (800e050 ) + 800e01e: 6818 ldr r0, [r3, #0] + 800e020: 2314 movs r3, #20 + 800e022: 18f9 adds r1, r7, r3 + 800e024: 2300 movs r3, #0 + 800e026: 2200 movs r2, #0 + 800e028: f7fe fabd bl 800c5a6 + 800e02c: 0003 movs r3, r0 + 800e02e: 627b str r3, [r7, #36] ; 0x24 + 800e030: e009 b.n 800e046 } } else { xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken ); - 800d3ee: 4b07 ldr r3, [pc, #28] ; (800d40c ) - 800d3f0: 6818 ldr r0, [r3, #0] - 800d3f2: 683a ldr r2, [r7, #0] - 800d3f4: 2314 movs r3, #20 - 800d3f6: 18f9 adds r1, r7, r3 - 800d3f8: 2300 movs r3, #0 - 800d3fa: f7fe fb76 bl 800baea - 800d3fe: 0003 movs r3, r0 - 800d400: 627b str r3, [r7, #36] ; 0x24 + 800e032: 4b07 ldr r3, [pc, #28] ; (800e050 ) + 800e034: 6818 ldr r0, [r3, #0] + 800e036: 683a ldr r2, [r7, #0] + 800e038: 2314 movs r3, #20 + 800e03a: 18f9 adds r1, r7, r3 + 800e03c: 2300 movs r3, #0 + 800e03e: f7fe fb76 bl 800c72e + 800e042: 0003 movs r3, r0 + 800e044: 627b str r3, [r7, #36] ; 0x24 else { mtCOVERAGE_TEST_MARKER(); } return xReturn; - 800d402: 6a7b ldr r3, [r7, #36] ; 0x24 + 800e046: 6a7b ldr r3, [r7, #36] ; 0x24 } - 800d404: 0018 movs r0, r3 - 800d406: 46bd mov sp, r7 - 800d408: b00b add sp, #44 ; 0x2c - 800d40a: bd90 pop {r4, r7, pc} - 800d40c: 20001034 .word 0x20001034 + 800e048: 0018 movs r0, r3 + 800e04a: 46bd mov sp, r7 + 800e04c: b00b add sp, #44 ; 0x2c + 800e04e: bd90 pop {r4, r7, pc} + 800e050: 20001114 .word 0x20001114 -0800d410 : +0800e054 : return pxTimer->pcTimerName; } /*-----------------------------------------------------------*/ static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow ) { - 800d410: b580 push {r7, lr} - 800d412: b086 sub sp, #24 - 800d414: af02 add r7, sp, #8 - 800d416: 6078 str r0, [r7, #4] - 800d418: 6039 str r1, [r7, #0] + 800e054: b580 push {r7, lr} + 800e056: b086 sub sp, #24 + 800e058: af02 add r7, sp, #8 + 800e05a: 6078 str r0, [r7, #4] + 800e05c: 6039 str r1, [r7, #0] BaseType_t xResult; Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ - 800d41a: 4b1e ldr r3, [pc, #120] ; (800d494 ) - 800d41c: 681b ldr r3, [r3, #0] - 800d41e: 68db ldr r3, [r3, #12] - 800d420: 68db ldr r3, [r3, #12] - 800d422: 60fb str r3, [r7, #12] + 800e05e: 4b1e ldr r3, [pc, #120] ; (800e0d8 ) + 800e060: 681b ldr r3, [r3, #0] + 800e062: 68db ldr r3, [r3, #12] + 800e064: 68db ldr r3, [r3, #12] + 800e066: 60fb str r3, [r7, #12] /* Remove the timer from the list of active timers. A check has already been performed to ensure the list is not empty. */ ( void ) uxListRemove( &( pxTimer->xTimerListItem ) ); - 800d424: 68fb ldr r3, [r7, #12] - 800d426: 3304 adds r3, #4 - 800d428: 0018 movs r0, r3 - 800d42a: f7fe f8c8 bl 800b5be + 800e068: 68fb ldr r3, [r7, #12] + 800e06a: 3304 adds r3, #4 + 800e06c: 0018 movs r0, r3 + 800e06e: f7fe f8c8 bl 800c202 traceTIMER_EXPIRED( pxTimer ); /* If the timer is an auto-reload timer then calculate the next expiry time and re-insert the timer in the list of active timers. */ if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 ) - 800d42e: 68fb ldr r3, [r7, #12] - 800d430: 2228 movs r2, #40 ; 0x28 - 800d432: 5c9b ldrb r3, [r3, r2] - 800d434: 001a movs r2, r3 - 800d436: 2304 movs r3, #4 - 800d438: 4013 ands r3, r2 - 800d43a: d019 beq.n 800d470 + 800e072: 68fb ldr r3, [r7, #12] + 800e074: 2228 movs r2, #40 ; 0x28 + 800e076: 5c9b ldrb r3, [r3, r2] + 800e078: 001a movs r2, r3 + 800e07a: 2304 movs r3, #4 + 800e07c: 4013 ands r3, r2 + 800e07e: d019 beq.n 800e0b4 { /* The timer is inserted into a list using a time relative to anything other than the current time. It will therefore be inserted into the correct list relative to the time this task thinks it is now. */ if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE ) - 800d43c: 68fb ldr r3, [r7, #12] - 800d43e: 699a ldr r2, [r3, #24] - 800d440: 687b ldr r3, [r7, #4] - 800d442: 18d1 adds r1, r2, r3 - 800d444: 687b ldr r3, [r7, #4] - 800d446: 683a ldr r2, [r7, #0] - 800d448: 68f8 ldr r0, [r7, #12] - 800d44a: f000 f8c3 bl 800d5d4 - 800d44e: 1e03 subs r3, r0, #0 - 800d450: d017 beq.n 800d482 + 800e080: 68fb ldr r3, [r7, #12] + 800e082: 699a ldr r2, [r3, #24] + 800e084: 687b ldr r3, [r7, #4] + 800e086: 18d1 adds r1, r2, r3 + 800e088: 687b ldr r3, [r7, #4] + 800e08a: 683a ldr r2, [r7, #0] + 800e08c: 68f8 ldr r0, [r7, #12] + 800e08e: f000 f8c3 bl 800e218 + 800e092: 1e03 subs r3, r0, #0 + 800e094: d017 beq.n 800e0c6 { /* The timer expired before it was added to the active timer list. Reload it now. */ xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY ); - 800d452: 687a ldr r2, [r7, #4] - 800d454: 68f8 ldr r0, [r7, #12] - 800d456: 2300 movs r3, #0 - 800d458: 9300 str r3, [sp, #0] - 800d45a: 2300 movs r3, #0 - 800d45c: 2100 movs r1, #0 - 800d45e: f7ff ff8d bl 800d37c - 800d462: 0003 movs r3, r0 - 800d464: 60bb str r3, [r7, #8] + 800e096: 687a ldr r2, [r7, #4] + 800e098: 68f8 ldr r0, [r7, #12] + 800e09a: 2300 movs r3, #0 + 800e09c: 9300 str r3, [sp, #0] + 800e09e: 2300 movs r3, #0 + 800e0a0: 2100 movs r1, #0 + 800e0a2: f7ff ff8d bl 800dfc0 + 800e0a6: 0003 movs r3, r0 + 800e0a8: 60bb str r3, [r7, #8] configASSERT( xResult ); - 800d466: 68bb ldr r3, [r7, #8] - 800d468: 2b00 cmp r3, #0 - 800d46a: d10a bne.n 800d482 - 800d46c: b672 cpsid i - 800d46e: e7fe b.n 800d46e + 800e0aa: 68bb ldr r3, [r7, #8] + 800e0ac: 2b00 cmp r3, #0 + 800e0ae: d10a bne.n 800e0c6 + 800e0b0: b672 cpsid i + 800e0b2: e7fe b.n 800e0b2 mtCOVERAGE_TEST_MARKER(); } } else { pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; - 800d470: 68fb ldr r3, [r7, #12] - 800d472: 2228 movs r2, #40 ; 0x28 - 800d474: 5c9b ldrb r3, [r3, r2] - 800d476: 2201 movs r2, #1 - 800d478: 4393 bics r3, r2 - 800d47a: b2d9 uxtb r1, r3 - 800d47c: 68fb ldr r3, [r7, #12] - 800d47e: 2228 movs r2, #40 ; 0x28 - 800d480: 5499 strb r1, [r3, r2] + 800e0b4: 68fb ldr r3, [r7, #12] + 800e0b6: 2228 movs r2, #40 ; 0x28 + 800e0b8: 5c9b ldrb r3, [r3, r2] + 800e0ba: 2201 movs r2, #1 + 800e0bc: 4393 bics r3, r2 + 800e0be: b2d9 uxtb r1, r3 + 800e0c0: 68fb ldr r3, [r7, #12] + 800e0c2: 2228 movs r2, #40 ; 0x28 + 800e0c4: 5499 strb r1, [r3, r2] mtCOVERAGE_TEST_MARKER(); } /* Call the timer callback. */ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer ); - 800d482: 68fb ldr r3, [r7, #12] - 800d484: 6a1b ldr r3, [r3, #32] - 800d486: 68fa ldr r2, [r7, #12] - 800d488: 0010 movs r0, r2 - 800d48a: 4798 blx r3 + 800e0c6: 68fb ldr r3, [r7, #12] + 800e0c8: 6a1b ldr r3, [r3, #32] + 800e0ca: 68fa ldr r2, [r7, #12] + 800e0cc: 0010 movs r0, r2 + 800e0ce: 4798 blx r3 } - 800d48c: 46c0 nop ; (mov r8, r8) - 800d48e: 46bd mov sp, r7 - 800d490: b004 add sp, #16 - 800d492: bd80 pop {r7, pc} - 800d494: 2000102c .word 0x2000102c + 800e0d0: 46c0 nop ; (mov r8, r8) + 800e0d2: 46bd mov sp, r7 + 800e0d4: b004 add sp, #16 + 800e0d6: bd80 pop {r7, pc} + 800e0d8: 2000110c .word 0x2000110c -0800d498 : +0800e0dc : /*-----------------------------------------------------------*/ static portTASK_FUNCTION( prvTimerTask, pvParameters ) { - 800d498: b580 push {r7, lr} - 800d49a: b084 sub sp, #16 - 800d49c: af00 add r7, sp, #0 - 800d49e: 6078 str r0, [r7, #4] + 800e0dc: b580 push {r7, lr} + 800e0de: b084 sub sp, #16 + 800e0e0: af00 add r7, sp, #0 + 800e0e2: 6078 str r0, [r7, #4] for( ;; ) { /* Query the timers list to see if it contains any timers, and if so, obtain the time at which the next timer will expire. */ xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty ); - 800d4a0: 2308 movs r3, #8 - 800d4a2: 18fb adds r3, r7, r3 - 800d4a4: 0018 movs r0, r3 - 800d4a6: f000 f853 bl 800d550 - 800d4aa: 0003 movs r3, r0 - 800d4ac: 60fb str r3, [r7, #12] + 800e0e4: 2308 movs r3, #8 + 800e0e6: 18fb adds r3, r7, r3 + 800e0e8: 0018 movs r0, r3 + 800e0ea: f000 f853 bl 800e194 + 800e0ee: 0003 movs r3, r0 + 800e0f0: 60fb str r3, [r7, #12] /* If a timer has expired, process it. Otherwise, block this task until either a timer does expire, or a command is received. */ prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty ); - 800d4ae: 68ba ldr r2, [r7, #8] - 800d4b0: 68fb ldr r3, [r7, #12] - 800d4b2: 0011 movs r1, r2 - 800d4b4: 0018 movs r0, r3 - 800d4b6: f000 f803 bl 800d4c0 + 800e0f2: 68ba ldr r2, [r7, #8] + 800e0f4: 68fb ldr r3, [r7, #12] + 800e0f6: 0011 movs r1, r2 + 800e0f8: 0018 movs r0, r3 + 800e0fa: f000 f803 bl 800e104 /* Empty the command queue. */ prvProcessReceivedCommands(); - 800d4ba: f000 f8cd bl 800d658 + 800e0fe: f000 f8cd bl 800e29c xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty ); - 800d4be: e7ef b.n 800d4a0 + 800e102: e7ef b.n 800e0e4 -0800d4c0 : +0800e104 : } } /*-----------------------------------------------------------*/ static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty ) { - 800d4c0: b580 push {r7, lr} - 800d4c2: b084 sub sp, #16 - 800d4c4: af00 add r7, sp, #0 - 800d4c6: 6078 str r0, [r7, #4] - 800d4c8: 6039 str r1, [r7, #0] + 800e104: b580 push {r7, lr} + 800e106: b084 sub sp, #16 + 800e108: af00 add r7, sp, #0 + 800e10a: 6078 str r0, [r7, #4] + 800e10c: 6039 str r1, [r7, #0] TickType_t xTimeNow; BaseType_t xTimerListsWereSwitched; vTaskSuspendAll(); - 800d4ca: f7ff f947 bl 800c75c + 800e10e: f7ff f947 bl 800d3a0 /* Obtain the time now to make an assessment as to whether the timer has expired or not. If obtaining the time causes the lists to switch then don't process this timer as any timers that remained in the list when the lists were switched will have been processed within the prvSampleTimeNow() function. */ xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched ); - 800d4ce: 2308 movs r3, #8 - 800d4d0: 18fb adds r3, r7, r3 - 800d4d2: 0018 movs r0, r3 - 800d4d4: f000 f85e bl 800d594 - 800d4d8: 0003 movs r3, r0 - 800d4da: 60fb str r3, [r7, #12] + 800e112: 2308 movs r3, #8 + 800e114: 18fb adds r3, r7, r3 + 800e116: 0018 movs r0, r3 + 800e118: f000 f85e bl 800e1d8 + 800e11c: 0003 movs r3, r0 + 800e11e: 60fb str r3, [r7, #12] if( xTimerListsWereSwitched == pdFALSE ) - 800d4dc: 68bb ldr r3, [r7, #8] - 800d4de: 2b00 cmp r3, #0 - 800d4e0: d12b bne.n 800d53a + 800e120: 68bb ldr r3, [r7, #8] + 800e122: 2b00 cmp r3, #0 + 800e124: d12b bne.n 800e17e { /* The tick count has not overflowed, has the timer expired? */ if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) ) - 800d4e2: 683b ldr r3, [r7, #0] - 800d4e4: 2b00 cmp r3, #0 - 800d4e6: d10c bne.n 800d502 - 800d4e8: 687a ldr r2, [r7, #4] - 800d4ea: 68fb ldr r3, [r7, #12] - 800d4ec: 429a cmp r2, r3 - 800d4ee: d808 bhi.n 800d502 + 800e126: 683b ldr r3, [r7, #0] + 800e128: 2b00 cmp r3, #0 + 800e12a: d10c bne.n 800e146 + 800e12c: 687a ldr r2, [r7, #4] + 800e12e: 68fb ldr r3, [r7, #12] + 800e130: 429a cmp r2, r3 + 800e132: d808 bhi.n 800e146 { ( void ) xTaskResumeAll(); - 800d4f0: f7ff f940 bl 800c774 + 800e134: f7ff f940 bl 800d3b8 prvProcessExpiredTimer( xNextExpireTime, xTimeNow ); - 800d4f4: 68fa ldr r2, [r7, #12] - 800d4f6: 687b ldr r3, [r7, #4] - 800d4f8: 0011 movs r1, r2 - 800d4fa: 0018 movs r0, r3 - 800d4fc: f7ff ff88 bl 800d410 + 800e138: 68fa ldr r2, [r7, #12] + 800e13a: 687b ldr r3, [r7, #4] + 800e13c: 0011 movs r1, r2 + 800e13e: 0018 movs r0, r3 + 800e140: f7ff ff88 bl 800e054 else { ( void ) xTaskResumeAll(); } } } - 800d500: e01d b.n 800d53e + 800e144: e01d b.n 800e182 if( xListWasEmpty != pdFALSE ) - 800d502: 683b ldr r3, [r7, #0] - 800d504: 2b00 cmp r3, #0 - 800d506: d008 beq.n 800d51a + 800e146: 683b ldr r3, [r7, #0] + 800e148: 2b00 cmp r3, #0 + 800e14a: d008 beq.n 800e15e xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList ); - 800d508: 4b0f ldr r3, [pc, #60] ; (800d548 ) - 800d50a: 681b ldr r3, [r3, #0] - 800d50c: 681b ldr r3, [r3, #0] - 800d50e: 2b00 cmp r3, #0 - 800d510: d101 bne.n 800d516 - 800d512: 2301 movs r3, #1 - 800d514: e000 b.n 800d518 - 800d516: 2300 movs r3, #0 - 800d518: 603b str r3, [r7, #0] + 800e14c: 4b0f ldr r3, [pc, #60] ; (800e18c ) + 800e14e: 681b ldr r3, [r3, #0] + 800e150: 681b ldr r3, [r3, #0] + 800e152: 2b00 cmp r3, #0 + 800e154: d101 bne.n 800e15a + 800e156: 2301 movs r3, #1 + 800e158: e000 b.n 800e15c + 800e15a: 2300 movs r3, #0 + 800e15c: 603b str r3, [r7, #0] vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty ); - 800d51a: 4b0c ldr r3, [pc, #48] ; (800d54c ) - 800d51c: 6818 ldr r0, [r3, #0] - 800d51e: 687a ldr r2, [r7, #4] - 800d520: 68fb ldr r3, [r7, #12] - 800d522: 1ad3 subs r3, r2, r3 - 800d524: 683a ldr r2, [r7, #0] - 800d526: 0019 movs r1, r3 - 800d528: f7fe fec8 bl 800c2bc + 800e15e: 4b0c ldr r3, [pc, #48] ; (800e190 ) + 800e160: 6818 ldr r0, [r3, #0] + 800e162: 687a ldr r2, [r7, #4] + 800e164: 68fb ldr r3, [r7, #12] + 800e166: 1ad3 subs r3, r2, r3 + 800e168: 683a ldr r2, [r7, #0] + 800e16a: 0019 movs r1, r3 + 800e16c: f7fe fec8 bl 800cf00 if( xTaskResumeAll() == pdFALSE ) - 800d52c: f7ff f922 bl 800c774 - 800d530: 1e03 subs r3, r0, #0 - 800d532: d104 bne.n 800d53e + 800e170: f7ff f922 bl 800d3b8 + 800e174: 1e03 subs r3, r0, #0 + 800e176: d104 bne.n 800e182 portYIELD_WITHIN_API(); - 800d534: f000 fabc bl 800dab0 + 800e178: f000 faba bl 800e6f0 } - 800d538: e001 b.n 800d53e + 800e17c: e001 b.n 800e182 ( void ) xTaskResumeAll(); - 800d53a: f7ff f91b bl 800c774 + 800e17e: f7ff f91b bl 800d3b8 } - 800d53e: 46c0 nop ; (mov r8, r8) - 800d540: 46bd mov sp, r7 - 800d542: b004 add sp, #16 - 800d544: bd80 pop {r7, pc} - 800d546: 46c0 nop ; (mov r8, r8) - 800d548: 20001030 .word 0x20001030 - 800d54c: 20001034 .word 0x20001034 + 800e182: 46c0 nop ; (mov r8, r8) + 800e184: 46bd mov sp, r7 + 800e186: b004 add sp, #16 + 800e188: bd80 pop {r7, pc} + 800e18a: 46c0 nop ; (mov r8, r8) + 800e18c: 20001110 .word 0x20001110 + 800e190: 20001114 .word 0x20001114 -0800d550 : +0800e194 : /*-----------------------------------------------------------*/ static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) { - 800d550: b580 push {r7, lr} - 800d552: b084 sub sp, #16 - 800d554: af00 add r7, sp, #0 - 800d556: 6078 str r0, [r7, #4] + 800e194: b580 push {r7, lr} + 800e196: b084 sub sp, #16 + 800e198: af00 add r7, sp, #0 + 800e19a: 6078 str r0, [r7, #4] the timer with the nearest expiry time will expire. If there are no active timers then just set the next expire time to 0. That will cause this task to unblock when the tick count overflows, at which point the timer lists will be switched and the next expiry time can be re-assessed. */ *pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList ); - 800d558: 4b0d ldr r3, [pc, #52] ; (800d590 ) - 800d55a: 681b ldr r3, [r3, #0] - 800d55c: 681b ldr r3, [r3, #0] - 800d55e: 2b00 cmp r3, #0 - 800d560: d101 bne.n 800d566 - 800d562: 2201 movs r2, #1 - 800d564: e000 b.n 800d568 - 800d566: 2200 movs r2, #0 - 800d568: 687b ldr r3, [r7, #4] - 800d56a: 601a str r2, [r3, #0] + 800e19c: 4b0d ldr r3, [pc, #52] ; (800e1d4 ) + 800e19e: 681b ldr r3, [r3, #0] + 800e1a0: 681b ldr r3, [r3, #0] + 800e1a2: 2b00 cmp r3, #0 + 800e1a4: d101 bne.n 800e1aa + 800e1a6: 2201 movs r2, #1 + 800e1a8: e000 b.n 800e1ac + 800e1aa: 2200 movs r2, #0 + 800e1ac: 687b ldr r3, [r7, #4] + 800e1ae: 601a str r2, [r3, #0] if( *pxListWasEmpty == pdFALSE ) - 800d56c: 687b ldr r3, [r7, #4] - 800d56e: 681b ldr r3, [r3, #0] - 800d570: 2b00 cmp r3, #0 - 800d572: d105 bne.n 800d580 + 800e1b0: 687b ldr r3, [r7, #4] + 800e1b2: 681b ldr r3, [r3, #0] + 800e1b4: 2b00 cmp r3, #0 + 800e1b6: d105 bne.n 800e1c4 { xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList ); - 800d574: 4b06 ldr r3, [pc, #24] ; (800d590 ) - 800d576: 681b ldr r3, [r3, #0] - 800d578: 68db ldr r3, [r3, #12] - 800d57a: 681b ldr r3, [r3, #0] - 800d57c: 60fb str r3, [r7, #12] - 800d57e: e001 b.n 800d584 + 800e1b8: 4b06 ldr r3, [pc, #24] ; (800e1d4 ) + 800e1ba: 681b ldr r3, [r3, #0] + 800e1bc: 68db ldr r3, [r3, #12] + 800e1be: 681b ldr r3, [r3, #0] + 800e1c0: 60fb str r3, [r7, #12] + 800e1c2: e001 b.n 800e1c8 } else { /* Ensure the task unblocks when the tick count rolls over. */ xNextExpireTime = ( TickType_t ) 0U; - 800d580: 2300 movs r3, #0 - 800d582: 60fb str r3, [r7, #12] + 800e1c4: 2300 movs r3, #0 + 800e1c6: 60fb str r3, [r7, #12] } return xNextExpireTime; - 800d584: 68fb ldr r3, [r7, #12] + 800e1c8: 68fb ldr r3, [r7, #12] } - 800d586: 0018 movs r0, r3 - 800d588: 46bd mov sp, r7 - 800d58a: b004 add sp, #16 - 800d58c: bd80 pop {r7, pc} - 800d58e: 46c0 nop ; (mov r8, r8) - 800d590: 2000102c .word 0x2000102c + 800e1ca: 0018 movs r0, r3 + 800e1cc: 46bd mov sp, r7 + 800e1ce: b004 add sp, #16 + 800e1d0: bd80 pop {r7, pc} + 800e1d2: 46c0 nop ; (mov r8, r8) + 800e1d4: 2000110c .word 0x2000110c -0800d594 : +0800e1d8 : /*-----------------------------------------------------------*/ static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) { - 800d594: b580 push {r7, lr} - 800d596: b084 sub sp, #16 - 800d598: af00 add r7, sp, #0 - 800d59a: 6078 str r0, [r7, #4] + 800e1d8: b580 push {r7, lr} + 800e1da: b084 sub sp, #16 + 800e1dc: af00 add r7, sp, #0 + 800e1de: 6078 str r0, [r7, #4] TickType_t xTimeNow; PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */ xTimeNow = xTaskGetTickCount(); - 800d59c: f7ff f976 bl 800c88c - 800d5a0: 0003 movs r3, r0 - 800d5a2: 60fb str r3, [r7, #12] + 800e1e0: f7ff f976 bl 800d4d0 + 800e1e4: 0003 movs r3, r0 + 800e1e6: 60fb str r3, [r7, #12] if( xTimeNow < xLastTime ) - 800d5a4: 4b0a ldr r3, [pc, #40] ; (800d5d0 ) - 800d5a6: 681b ldr r3, [r3, #0] - 800d5a8: 68fa ldr r2, [r7, #12] - 800d5aa: 429a cmp r2, r3 - 800d5ac: d205 bcs.n 800d5ba + 800e1e8: 4b0a ldr r3, [pc, #40] ; (800e214 ) + 800e1ea: 681b ldr r3, [r3, #0] + 800e1ec: 68fa ldr r2, [r7, #12] + 800e1ee: 429a cmp r2, r3 + 800e1f0: d205 bcs.n 800e1fe { prvSwitchTimerLists(); - 800d5ae: f000 f919 bl 800d7e4 + 800e1f2: f000 f919 bl 800e428 *pxTimerListsWereSwitched = pdTRUE; - 800d5b2: 687b ldr r3, [r7, #4] - 800d5b4: 2201 movs r2, #1 - 800d5b6: 601a str r2, [r3, #0] - 800d5b8: e002 b.n 800d5c0 + 800e1f6: 687b ldr r3, [r7, #4] + 800e1f8: 2201 movs r2, #1 + 800e1fa: 601a str r2, [r3, #0] + 800e1fc: e002 b.n 800e204 } else { *pxTimerListsWereSwitched = pdFALSE; - 800d5ba: 687b ldr r3, [r7, #4] - 800d5bc: 2200 movs r2, #0 - 800d5be: 601a str r2, [r3, #0] + 800e1fe: 687b ldr r3, [r7, #4] + 800e200: 2200 movs r2, #0 + 800e202: 601a str r2, [r3, #0] } xLastTime = xTimeNow; - 800d5c0: 4b03 ldr r3, [pc, #12] ; (800d5d0 ) - 800d5c2: 68fa ldr r2, [r7, #12] - 800d5c4: 601a str r2, [r3, #0] + 800e204: 4b03 ldr r3, [pc, #12] ; (800e214 ) + 800e206: 68fa ldr r2, [r7, #12] + 800e208: 601a str r2, [r3, #0] return xTimeNow; - 800d5c6: 68fb ldr r3, [r7, #12] + 800e20a: 68fb ldr r3, [r7, #12] } - 800d5c8: 0018 movs r0, r3 - 800d5ca: 46bd mov sp, r7 - 800d5cc: b004 add sp, #16 - 800d5ce: bd80 pop {r7, pc} - 800d5d0: 2000103c .word 0x2000103c + 800e20c: 0018 movs r0, r3 + 800e20e: 46bd mov sp, r7 + 800e210: b004 add sp, #16 + 800e212: bd80 pop {r7, pc} + 800e214: 2000111c .word 0x2000111c -0800d5d4 : +0800e218 : /*-----------------------------------------------------------*/ static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime ) { - 800d5d4: b580 push {r7, lr} - 800d5d6: b086 sub sp, #24 - 800d5d8: af00 add r7, sp, #0 - 800d5da: 60f8 str r0, [r7, #12] - 800d5dc: 60b9 str r1, [r7, #8] - 800d5de: 607a str r2, [r7, #4] - 800d5e0: 603b str r3, [r7, #0] + 800e218: b580 push {r7, lr} + 800e21a: b086 sub sp, #24 + 800e21c: af00 add r7, sp, #0 + 800e21e: 60f8 str r0, [r7, #12] + 800e220: 60b9 str r1, [r7, #8] + 800e222: 607a str r2, [r7, #4] + 800e224: 603b str r3, [r7, #0] BaseType_t xProcessTimerNow = pdFALSE; - 800d5e2: 2300 movs r3, #0 - 800d5e4: 617b str r3, [r7, #20] + 800e226: 2300 movs r3, #0 + 800e228: 617b str r3, [r7, #20] listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime ); - 800d5e6: 68fb ldr r3, [r7, #12] - 800d5e8: 68ba ldr r2, [r7, #8] - 800d5ea: 605a str r2, [r3, #4] + 800e22a: 68fb ldr r3, [r7, #12] + 800e22c: 68ba ldr r2, [r7, #8] + 800e22e: 605a str r2, [r3, #4] listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer ); - 800d5ec: 68fb ldr r3, [r7, #12] - 800d5ee: 68fa ldr r2, [r7, #12] - 800d5f0: 611a str r2, [r3, #16] + 800e230: 68fb ldr r3, [r7, #12] + 800e232: 68fa ldr r2, [r7, #12] + 800e234: 611a str r2, [r3, #16] if( xNextExpiryTime <= xTimeNow ) - 800d5f2: 68ba ldr r2, [r7, #8] - 800d5f4: 687b ldr r3, [r7, #4] - 800d5f6: 429a cmp r2, r3 - 800d5f8: d812 bhi.n 800d620 + 800e236: 68ba ldr r2, [r7, #8] + 800e238: 687b ldr r3, [r7, #4] + 800e23a: 429a cmp r2, r3 + 800e23c: d812 bhi.n 800e264 { /* Has the expiry time elapsed between the command to start/reset a timer was issued, and the time the command was processed? */ if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ - 800d5fa: 687a ldr r2, [r7, #4] - 800d5fc: 683b ldr r3, [r7, #0] - 800d5fe: 1ad2 subs r2, r2, r3 - 800d600: 68fb ldr r3, [r7, #12] - 800d602: 699b ldr r3, [r3, #24] - 800d604: 429a cmp r2, r3 - 800d606: d302 bcc.n 800d60e + 800e23e: 687a ldr r2, [r7, #4] + 800e240: 683b ldr r3, [r7, #0] + 800e242: 1ad2 subs r2, r2, r3 + 800e244: 68fb ldr r3, [r7, #12] + 800e246: 699b ldr r3, [r3, #24] + 800e248: 429a cmp r2, r3 + 800e24a: d302 bcc.n 800e252 { /* The time between a command being issued and the command being processed actually exceeds the timers period. */ xProcessTimerNow = pdTRUE; - 800d608: 2301 movs r3, #1 - 800d60a: 617b str r3, [r7, #20] - 800d60c: e01b b.n 800d646 + 800e24c: 2301 movs r3, #1 + 800e24e: 617b str r3, [r7, #20] + 800e250: e01b b.n 800e28a } else { vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) ); - 800d60e: 4b10 ldr r3, [pc, #64] ; (800d650 ) - 800d610: 681a ldr r2, [r3, #0] - 800d612: 68fb ldr r3, [r7, #12] - 800d614: 3304 adds r3, #4 - 800d616: 0019 movs r1, r3 - 800d618: 0010 movs r0, r2 - 800d61a: f7fd ff9a bl 800b552 - 800d61e: e012 b.n 800d646 + 800e252: 4b10 ldr r3, [pc, #64] ; (800e294 ) + 800e254: 681a ldr r2, [r3, #0] + 800e256: 68fb ldr r3, [r7, #12] + 800e258: 3304 adds r3, #4 + 800e25a: 0019 movs r1, r3 + 800e25c: 0010 movs r0, r2 + 800e25e: f7fd ff9a bl 800c196 + 800e262: e012 b.n 800e28a } } else { if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) ) - 800d620: 687a ldr r2, [r7, #4] - 800d622: 683b ldr r3, [r7, #0] - 800d624: 429a cmp r2, r3 - 800d626: d206 bcs.n 800d636 - 800d628: 68ba ldr r2, [r7, #8] - 800d62a: 683b ldr r3, [r7, #0] - 800d62c: 429a cmp r2, r3 - 800d62e: d302 bcc.n 800d636 + 800e264: 687a ldr r2, [r7, #4] + 800e266: 683b ldr r3, [r7, #0] + 800e268: 429a cmp r2, r3 + 800e26a: d206 bcs.n 800e27a + 800e26c: 68ba ldr r2, [r7, #8] + 800e26e: 683b ldr r3, [r7, #0] + 800e270: 429a cmp r2, r3 + 800e272: d302 bcc.n 800e27a { /* If, since the command was issued, the tick count has overflowed but the expiry time has not, then the timer must have already passed its expiry time and should be processed immediately. */ xProcessTimerNow = pdTRUE; - 800d630: 2301 movs r3, #1 - 800d632: 617b str r3, [r7, #20] - 800d634: e007 b.n 800d646 + 800e274: 2301 movs r3, #1 + 800e276: 617b str r3, [r7, #20] + 800e278: e007 b.n 800e28a } else { vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) ); - 800d636: 4b07 ldr r3, [pc, #28] ; (800d654 ) - 800d638: 681a ldr r2, [r3, #0] - 800d63a: 68fb ldr r3, [r7, #12] - 800d63c: 3304 adds r3, #4 - 800d63e: 0019 movs r1, r3 - 800d640: 0010 movs r0, r2 - 800d642: f7fd ff86 bl 800b552 + 800e27a: 4b07 ldr r3, [pc, #28] ; (800e298 ) + 800e27c: 681a ldr r2, [r3, #0] + 800e27e: 68fb ldr r3, [r7, #12] + 800e280: 3304 adds r3, #4 + 800e282: 0019 movs r1, r3 + 800e284: 0010 movs r0, r2 + 800e286: f7fd ff86 bl 800c196 } } return xProcessTimerNow; - 800d646: 697b ldr r3, [r7, #20] + 800e28a: 697b ldr r3, [r7, #20] } - 800d648: 0018 movs r0, r3 - 800d64a: 46bd mov sp, r7 - 800d64c: b006 add sp, #24 - 800d64e: bd80 pop {r7, pc} - 800d650: 20001030 .word 0x20001030 - 800d654: 2000102c .word 0x2000102c + 800e28c: 0018 movs r0, r3 + 800e28e: 46bd mov sp, r7 + 800e290: b006 add sp, #24 + 800e292: bd80 pop {r7, pc} + 800e294: 20001110 .word 0x20001110 + 800e298: 2000110c .word 0x2000110c -0800d658 : +0800e29c : /*-----------------------------------------------------------*/ static void prvProcessReceivedCommands( void ) { - 800d658: b590 push {r4, r7, lr} - 800d65a: b08d sub sp, #52 ; 0x34 - 800d65c: af02 add r7, sp, #8 + 800e29c: b590 push {r4, r7, lr} + 800e29e: b08d sub sp, #52 ; 0x34 + 800e2a0: af02 add r7, sp, #8 DaemonTaskMessage_t xMessage; Timer_t *pxTimer; BaseType_t xTimerListsWereSwitched, xResult; TickType_t xTimeNow; while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */ - 800d65e: e0ac b.n 800d7ba + 800e2a2: e0ac b.n 800e3fe { #if ( INCLUDE_xTimerPendFunctionCall == 1 ) { /* Negative commands are pended function calls rather than timer commands. */ if( xMessage.xMessageID < ( BaseType_t ) 0 ) - 800d660: 2208 movs r2, #8 - 800d662: 18bb adds r3, r7, r2 - 800d664: 681b ldr r3, [r3, #0] - 800d666: 2b00 cmp r3, #0 - 800d668: da0f bge.n 800d68a + 800e2a4: 2208 movs r2, #8 + 800e2a6: 18bb adds r3, r7, r2 + 800e2a8: 681b ldr r3, [r3, #0] + 800e2aa: 2b00 cmp r3, #0 + 800e2ac: da0f bge.n 800e2ce { const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters ); - 800d66a: 18bb adds r3, r7, r2 - 800d66c: 3304 adds r3, #4 - 800d66e: 627b str r3, [r7, #36] ; 0x24 + 800e2ae: 18bb adds r3, r7, r2 + 800e2b0: 3304 adds r3, #4 + 800e2b2: 627b str r3, [r7, #36] ; 0x24 /* The timer uses the xCallbackParameters member to request a callback be executed. Check the callback is not NULL. */ configASSERT( pxCallback ); - 800d670: 6a7b ldr r3, [r7, #36] ; 0x24 - 800d672: 2b00 cmp r3, #0 - 800d674: d101 bne.n 800d67a - 800d676: b672 cpsid i - 800d678: e7fe b.n 800d678 + 800e2b4: 6a7b ldr r3, [r7, #36] ; 0x24 + 800e2b6: 2b00 cmp r3, #0 + 800e2b8: d101 bne.n 800e2be + 800e2ba: b672 cpsid i + 800e2bc: e7fe b.n 800e2bc /* Call the function. */ pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 ); - 800d67a: 6a7b ldr r3, [r7, #36] ; 0x24 - 800d67c: 681a ldr r2, [r3, #0] - 800d67e: 6a7b ldr r3, [r7, #36] ; 0x24 - 800d680: 6858 ldr r0, [r3, #4] - 800d682: 6a7b ldr r3, [r7, #36] ; 0x24 - 800d684: 689b ldr r3, [r3, #8] - 800d686: 0019 movs r1, r3 - 800d688: 4790 blx r2 + 800e2be: 6a7b ldr r3, [r7, #36] ; 0x24 + 800e2c0: 681a ldr r2, [r3, #0] + 800e2c2: 6a7b ldr r3, [r7, #36] ; 0x24 + 800e2c4: 6858 ldr r0, [r3, #4] + 800e2c6: 6a7b ldr r3, [r7, #36] ; 0x24 + 800e2c8: 689b ldr r3, [r3, #8] + 800e2ca: 0019 movs r1, r3 + 800e2cc: 4790 blx r2 } #endif /* INCLUDE_xTimerPendFunctionCall */ /* Commands that are positive are timer commands rather than pended function calls. */ if( xMessage.xMessageID >= ( BaseType_t ) 0 ) - 800d68a: 2208 movs r2, #8 - 800d68c: 18bb adds r3, r7, r2 - 800d68e: 681b ldr r3, [r3, #0] - 800d690: 2b00 cmp r3, #0 - 800d692: da00 bge.n 800d696 - 800d694: e090 b.n 800d7b8 + 800e2ce: 2208 movs r2, #8 + 800e2d0: 18bb adds r3, r7, r2 + 800e2d2: 681b ldr r3, [r3, #0] + 800e2d4: 2b00 cmp r3, #0 + 800e2d6: da00 bge.n 800e2da + 800e2d8: e090 b.n 800e3fc { /* The messages uses the xTimerParameters member to work on a software timer. */ pxTimer = xMessage.u.xTimerParameters.pxTimer; - 800d696: 18bb adds r3, r7, r2 - 800d698: 689b ldr r3, [r3, #8] - 800d69a: 623b str r3, [r7, #32] + 800e2da: 18bb adds r3, r7, r2 + 800e2dc: 689b ldr r3, [r3, #8] + 800e2de: 623b str r3, [r7, #32] if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */ - 800d69c: 6a3b ldr r3, [r7, #32] - 800d69e: 695b ldr r3, [r3, #20] - 800d6a0: 2b00 cmp r3, #0 - 800d6a2: d004 beq.n 800d6ae + 800e2e0: 6a3b ldr r3, [r7, #32] + 800e2e2: 695b ldr r3, [r3, #20] + 800e2e4: 2b00 cmp r3, #0 + 800e2e6: d004 beq.n 800e2f2 { /* The timer is in a list, remove it. */ ( void ) uxListRemove( &( pxTimer->xTimerListItem ) ); - 800d6a4: 6a3b ldr r3, [r7, #32] - 800d6a6: 3304 adds r3, #4 - 800d6a8: 0018 movs r0, r3 - 800d6aa: f7fd ff88 bl 800b5be + 800e2e8: 6a3b ldr r3, [r7, #32] + 800e2ea: 3304 adds r3, #4 + 800e2ec: 0018 movs r0, r3 + 800e2ee: f7fd ff88 bl 800c202 it must be present in the function call. prvSampleTimeNow() must be called after the message is received from xTimerQueue so there is no possibility of a higher priority task adding a message to the message queue with a time that is ahead of the timer daemon task (because it pre-empted the timer daemon task after the xTimeNow value was set). */ xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched ); - 800d6ae: 1d3b adds r3, r7, #4 - 800d6b0: 0018 movs r0, r3 - 800d6b2: f7ff ff6f bl 800d594 - 800d6b6: 0003 movs r3, r0 - 800d6b8: 61fb str r3, [r7, #28] + 800e2f2: 1d3b adds r3, r7, #4 + 800e2f4: 0018 movs r0, r3 + 800e2f6: f7ff ff6f bl 800e1d8 + 800e2fa: 0003 movs r3, r0 + 800e2fc: 61fb str r3, [r7, #28] switch( xMessage.xMessageID ) - 800d6ba: 2308 movs r3, #8 - 800d6bc: 18fb adds r3, r7, r3 - 800d6be: 681b ldr r3, [r3, #0] - 800d6c0: 2b09 cmp r3, #9 - 800d6c2: d900 bls.n 800d6c6 - 800d6c4: e079 b.n 800d7ba - 800d6c6: 009a lsls r2, r3, #2 - 800d6c8: 4b44 ldr r3, [pc, #272] ; (800d7dc ) - 800d6ca: 18d3 adds r3, r2, r3 - 800d6cc: 681b ldr r3, [r3, #0] - 800d6ce: 469f mov pc, r3 + 800e2fe: 2308 movs r3, #8 + 800e300: 18fb adds r3, r7, r3 + 800e302: 681b ldr r3, [r3, #0] + 800e304: 2b09 cmp r3, #9 + 800e306: d900 bls.n 800e30a + 800e308: e079 b.n 800e3fe + 800e30a: 009a lsls r2, r3, #2 + 800e30c: 4b44 ldr r3, [pc, #272] ; (800e420 ) + 800e30e: 18d3 adds r3, r2, r3 + 800e310: 681b ldr r3, [r3, #0] + 800e312: 469f mov pc, r3 case tmrCOMMAND_START_FROM_ISR : case tmrCOMMAND_RESET : case tmrCOMMAND_RESET_FROM_ISR : case tmrCOMMAND_START_DONT_TRACE : /* Start or restart a timer. */ pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE; - 800d6d0: 6a3b ldr r3, [r7, #32] - 800d6d2: 2228 movs r2, #40 ; 0x28 - 800d6d4: 5c9b ldrb r3, [r3, r2] - 800d6d6: 2201 movs r2, #1 - 800d6d8: 4313 orrs r3, r2 - 800d6da: b2d9 uxtb r1, r3 - 800d6dc: 6a3b ldr r3, [r7, #32] - 800d6de: 2228 movs r2, #40 ; 0x28 - 800d6e0: 5499 strb r1, [r3, r2] + 800e314: 6a3b ldr r3, [r7, #32] + 800e316: 2228 movs r2, #40 ; 0x28 + 800e318: 5c9b ldrb r3, [r3, r2] + 800e31a: 2201 movs r2, #1 + 800e31c: 4313 orrs r3, r2 + 800e31e: b2d9 uxtb r1, r3 + 800e320: 6a3b ldr r3, [r7, #32] + 800e322: 2228 movs r2, #40 ; 0x28 + 800e324: 5499 strb r1, [r3, r2] if( prvInsertTimerInActiveList( pxTimer, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE ) - 800d6e2: 2408 movs r4, #8 - 800d6e4: 193b adds r3, r7, r4 - 800d6e6: 685a ldr r2, [r3, #4] - 800d6e8: 6a3b ldr r3, [r7, #32] - 800d6ea: 699b ldr r3, [r3, #24] - 800d6ec: 18d1 adds r1, r2, r3 - 800d6ee: 193b adds r3, r7, r4 - 800d6f0: 685b ldr r3, [r3, #4] - 800d6f2: 69fa ldr r2, [r7, #28] - 800d6f4: 6a38 ldr r0, [r7, #32] - 800d6f6: f7ff ff6d bl 800d5d4 - 800d6fa: 1e03 subs r3, r0, #0 - 800d6fc: d05d beq.n 800d7ba + 800e326: 2408 movs r4, #8 + 800e328: 193b adds r3, r7, r4 + 800e32a: 685a ldr r2, [r3, #4] + 800e32c: 6a3b ldr r3, [r7, #32] + 800e32e: 699b ldr r3, [r3, #24] + 800e330: 18d1 adds r1, r2, r3 + 800e332: 193b adds r3, r7, r4 + 800e334: 685b ldr r3, [r3, #4] + 800e336: 69fa ldr r2, [r7, #28] + 800e338: 6a38 ldr r0, [r7, #32] + 800e33a: f7ff ff6d bl 800e218 + 800e33e: 1e03 subs r3, r0, #0 + 800e340: d05d beq.n 800e3fe { /* The timer expired before it was added to the active timer list. Process it now. */ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer ); - 800d6fe: 6a3b ldr r3, [r7, #32] - 800d700: 6a1b ldr r3, [r3, #32] - 800d702: 6a3a ldr r2, [r7, #32] - 800d704: 0010 movs r0, r2 - 800d706: 4798 blx r3 + 800e342: 6a3b ldr r3, [r7, #32] + 800e344: 6a1b ldr r3, [r3, #32] + 800e346: 6a3a ldr r2, [r7, #32] + 800e348: 0010 movs r0, r2 + 800e34a: 4798 blx r3 traceTIMER_EXPIRED( pxTimer ); if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 ) - 800d708: 6a3b ldr r3, [r7, #32] - 800d70a: 2228 movs r2, #40 ; 0x28 - 800d70c: 5c9b ldrb r3, [r3, r2] - 800d70e: 001a movs r2, r3 - 800d710: 2304 movs r3, #4 - 800d712: 4013 ands r3, r2 - 800d714: d051 beq.n 800d7ba + 800e34c: 6a3b ldr r3, [r7, #32] + 800e34e: 2228 movs r2, #40 ; 0x28 + 800e350: 5c9b ldrb r3, [r3, r2] + 800e352: 001a movs r2, r3 + 800e354: 2304 movs r3, #4 + 800e356: 4013 ands r3, r2 + 800e358: d051 beq.n 800e3fe { xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY ); - 800d716: 193b adds r3, r7, r4 - 800d718: 685a ldr r2, [r3, #4] - 800d71a: 6a3b ldr r3, [r7, #32] - 800d71c: 699b ldr r3, [r3, #24] - 800d71e: 18d2 adds r2, r2, r3 - 800d720: 6a38 ldr r0, [r7, #32] - 800d722: 2300 movs r3, #0 - 800d724: 9300 str r3, [sp, #0] - 800d726: 2300 movs r3, #0 - 800d728: 2100 movs r1, #0 - 800d72a: f7ff fe27 bl 800d37c - 800d72e: 0003 movs r3, r0 - 800d730: 61bb str r3, [r7, #24] + 800e35a: 193b adds r3, r7, r4 + 800e35c: 685a ldr r2, [r3, #4] + 800e35e: 6a3b ldr r3, [r7, #32] + 800e360: 699b ldr r3, [r3, #24] + 800e362: 18d2 adds r2, r2, r3 + 800e364: 6a38 ldr r0, [r7, #32] + 800e366: 2300 movs r3, #0 + 800e368: 9300 str r3, [sp, #0] + 800e36a: 2300 movs r3, #0 + 800e36c: 2100 movs r1, #0 + 800e36e: f7ff fe27 bl 800dfc0 + 800e372: 0003 movs r3, r0 + 800e374: 61bb str r3, [r7, #24] configASSERT( xResult ); - 800d732: 69bb ldr r3, [r7, #24] - 800d734: 2b00 cmp r3, #0 - 800d736: d140 bne.n 800d7ba - 800d738: b672 cpsid i - 800d73a: e7fe b.n 800d73a + 800e376: 69bb ldr r3, [r7, #24] + 800e378: 2b00 cmp r3, #0 + 800e37a: d140 bne.n 800e3fe + 800e37c: b672 cpsid i + 800e37e: e7fe b.n 800e37e break; case tmrCOMMAND_STOP : case tmrCOMMAND_STOP_FROM_ISR : /* The timer has already been removed from the active list. */ pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; - 800d73c: 6a3b ldr r3, [r7, #32] - 800d73e: 2228 movs r2, #40 ; 0x28 - 800d740: 5c9b ldrb r3, [r3, r2] - 800d742: 2201 movs r2, #1 - 800d744: 4393 bics r3, r2 - 800d746: b2d9 uxtb r1, r3 - 800d748: 6a3b ldr r3, [r7, #32] - 800d74a: 2228 movs r2, #40 ; 0x28 - 800d74c: 5499 strb r1, [r3, r2] + 800e380: 6a3b ldr r3, [r7, #32] + 800e382: 2228 movs r2, #40 ; 0x28 + 800e384: 5c9b ldrb r3, [r3, r2] + 800e386: 2201 movs r2, #1 + 800e388: 4393 bics r3, r2 + 800e38a: b2d9 uxtb r1, r3 + 800e38c: 6a3b ldr r3, [r7, #32] + 800e38e: 2228 movs r2, #40 ; 0x28 + 800e390: 5499 strb r1, [r3, r2] break; - 800d74e: e034 b.n 800d7ba + 800e392: e034 b.n 800e3fe case tmrCOMMAND_CHANGE_PERIOD : case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR : pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE; - 800d750: 6a3b ldr r3, [r7, #32] - 800d752: 2228 movs r2, #40 ; 0x28 - 800d754: 5c9b ldrb r3, [r3, r2] - 800d756: 2201 movs r2, #1 - 800d758: 4313 orrs r3, r2 - 800d75a: b2d9 uxtb r1, r3 - 800d75c: 6a3b ldr r3, [r7, #32] - 800d75e: 2228 movs r2, #40 ; 0x28 - 800d760: 5499 strb r1, [r3, r2] + 800e394: 6a3b ldr r3, [r7, #32] + 800e396: 2228 movs r2, #40 ; 0x28 + 800e398: 5c9b ldrb r3, [r3, r2] + 800e39a: 2201 movs r2, #1 + 800e39c: 4313 orrs r3, r2 + 800e39e: b2d9 uxtb r1, r3 + 800e3a0: 6a3b ldr r3, [r7, #32] + 800e3a2: 2228 movs r2, #40 ; 0x28 + 800e3a4: 5499 strb r1, [r3, r2] pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue; - 800d762: 2308 movs r3, #8 - 800d764: 18fb adds r3, r7, r3 - 800d766: 685a ldr r2, [r3, #4] - 800d768: 6a3b ldr r3, [r7, #32] - 800d76a: 619a str r2, [r3, #24] + 800e3a6: 2308 movs r3, #8 + 800e3a8: 18fb adds r3, r7, r3 + 800e3aa: 685a ldr r2, [r3, #4] + 800e3ac: 6a3b ldr r3, [r7, #32] + 800e3ae: 619a str r2, [r3, #24] configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) ); - 800d76c: 6a3b ldr r3, [r7, #32] - 800d76e: 699b ldr r3, [r3, #24] - 800d770: 2b00 cmp r3, #0 - 800d772: d101 bne.n 800d778 - 800d774: b672 cpsid i - 800d776: e7fe b.n 800d776 + 800e3b0: 6a3b ldr r3, [r7, #32] + 800e3b2: 699b ldr r3, [r3, #24] + 800e3b4: 2b00 cmp r3, #0 + 800e3b6: d101 bne.n 800e3bc + 800e3b8: b672 cpsid i + 800e3ba: e7fe b.n 800e3ba be longer or shorter than the old one. The command time is therefore set to the current time, and as the period cannot be zero the next expiry time can only be in the future, meaning (unlike for the xTimerStart() case above) there is no fail case that needs to be handled here. */ ( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow ); - 800d778: 6a3b ldr r3, [r7, #32] - 800d77a: 699a ldr r2, [r3, #24] - 800d77c: 69fb ldr r3, [r7, #28] - 800d77e: 18d1 adds r1, r2, r3 - 800d780: 69fb ldr r3, [r7, #28] - 800d782: 69fa ldr r2, [r7, #28] - 800d784: 6a38 ldr r0, [r7, #32] - 800d786: f7ff ff25 bl 800d5d4 + 800e3bc: 6a3b ldr r3, [r7, #32] + 800e3be: 699a ldr r2, [r3, #24] + 800e3c0: 69fb ldr r3, [r7, #28] + 800e3c2: 18d1 adds r1, r2, r3 + 800e3c4: 69fb ldr r3, [r7, #28] + 800e3c6: 69fa ldr r2, [r7, #28] + 800e3c8: 6a38 ldr r0, [r7, #32] + 800e3ca: f7ff ff25 bl 800e218 break; - 800d78a: e016 b.n 800d7ba + 800e3ce: e016 b.n 800e3fe #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) { /* The timer has already been removed from the active list, just free up the memory if the memory was dynamically allocated. */ if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 ) - 800d78c: 6a3b ldr r3, [r7, #32] - 800d78e: 2228 movs r2, #40 ; 0x28 - 800d790: 5c9b ldrb r3, [r3, r2] - 800d792: 001a movs r2, r3 - 800d794: 2302 movs r3, #2 - 800d796: 4013 ands r3, r2 - 800d798: d104 bne.n 800d7a4 + 800e3d0: 6a3b ldr r3, [r7, #32] + 800e3d2: 2228 movs r2, #40 ; 0x28 + 800e3d4: 5c9b ldrb r3, [r3, r2] + 800e3d6: 001a movs r2, r3 + 800e3d8: 2302 movs r3, #2 + 800e3da: 4013 ands r3, r2 + 800e3dc: d104 bne.n 800e3e8 { vPortFree( pxTimer ); - 800d79a: 6a3b ldr r3, [r7, #32] - 800d79c: 0018 movs r0, r3 - 800d79e: f000 fadb bl 800dd58 - 800d7a2: e00a b.n 800d7ba + 800e3de: 6a3b ldr r3, [r7, #32] + 800e3e0: 0018 movs r0, r3 + 800e3e2: f000 fad9 bl 800e998 + 800e3e6: e00a b.n 800e3fe } else { pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; - 800d7a4: 6a3b ldr r3, [r7, #32] - 800d7a6: 2228 movs r2, #40 ; 0x28 - 800d7a8: 5c9b ldrb r3, [r3, r2] - 800d7aa: 2201 movs r2, #1 - 800d7ac: 4393 bics r3, r2 - 800d7ae: b2d9 uxtb r1, r3 - 800d7b0: 6a3b ldr r3, [r7, #32] - 800d7b2: 2228 movs r2, #40 ; 0x28 - 800d7b4: 5499 strb r1, [r3, r2] + 800e3e8: 6a3b ldr r3, [r7, #32] + 800e3ea: 2228 movs r2, #40 ; 0x28 + 800e3ec: 5c9b ldrb r3, [r3, r2] + 800e3ee: 2201 movs r2, #1 + 800e3f0: 4393 bics r3, r2 + 800e3f2: b2d9 uxtb r1, r3 + 800e3f4: 6a3b ldr r3, [r7, #32] + 800e3f6: 2228 movs r2, #40 ; 0x28 + 800e3f8: 5499 strb r1, [r3, r2] no need to free the memory - just mark the timer as "not active". */ pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ break; - 800d7b6: e000 b.n 800d7ba + 800e3fa: e000 b.n 800e3fe default : /* Don't expect to get here. */ break; } } - 800d7b8: 46c0 nop ; (mov r8, r8) + 800e3fc: 46c0 nop ; (mov r8, r8) while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */ - 800d7ba: 4b09 ldr r3, [pc, #36] ; (800d7e0 ) - 800d7bc: 681b ldr r3, [r3, #0] - 800d7be: 2208 movs r2, #8 - 800d7c0: 18b9 adds r1, r7, r2 - 800d7c2: 2200 movs r2, #0 - 800d7c4: 0018 movs r0, r3 - 800d7c6: f7fe fa04 bl 800bbd2 - 800d7ca: 1e03 subs r3, r0, #0 - 800d7cc: d000 beq.n 800d7d0 - 800d7ce: e747 b.n 800d660 + 800e3fe: 4b09 ldr r3, [pc, #36] ; (800e424 ) + 800e400: 681b ldr r3, [r3, #0] + 800e402: 2208 movs r2, #8 + 800e404: 18b9 adds r1, r7, r2 + 800e406: 2200 movs r2, #0 + 800e408: 0018 movs r0, r3 + 800e40a: f7fe fa04 bl 800c816 + 800e40e: 1e03 subs r3, r0, #0 + 800e410: d000 beq.n 800e414 + 800e412: e747 b.n 800e2a4 } } - 800d7d0: 46c0 nop ; (mov r8, r8) - 800d7d2: 46c0 nop ; (mov r8, r8) - 800d7d4: 46bd mov sp, r7 - 800d7d6: b00b add sp, #44 ; 0x2c - 800d7d8: bd90 pop {r4, r7, pc} - 800d7da: 46c0 nop ; (mov r8, r8) - 800d7dc: 080102f4 .word 0x080102f4 - 800d7e0: 20001034 .word 0x20001034 + 800e414: 46c0 nop ; (mov r8, r8) + 800e416: 46c0 nop ; (mov r8, r8) + 800e418: 46bd mov sp, r7 + 800e41a: b00b add sp, #44 ; 0x2c + 800e41c: bd90 pop {r4, r7, pc} + 800e41e: 46c0 nop ; (mov r8, r8) + 800e420: 08010f5c .word 0x08010f5c + 800e424: 20001114 .word 0x20001114 -0800d7e4 : +0800e428 : /*-----------------------------------------------------------*/ static void prvSwitchTimerLists( void ) { - 800d7e4: b580 push {r7, lr} - 800d7e6: b088 sub sp, #32 - 800d7e8: af02 add r7, sp, #8 + 800e428: b580 push {r7, lr} + 800e42a: b088 sub sp, #32 + 800e42c: af02 add r7, sp, #8 /* The tick count has overflowed. The timer lists must be switched. If there are any timers still referenced from the current timer list then they must have expired and should be processed before the lists are switched. */ while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE ) - 800d7ea: e041 b.n 800d870 + 800e42e: e041 b.n 800e4b4 { xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList ); - 800d7ec: 4b2a ldr r3, [pc, #168] ; (800d898 ) - 800d7ee: 681b ldr r3, [r3, #0] - 800d7f0: 68db ldr r3, [r3, #12] - 800d7f2: 681b ldr r3, [r3, #0] - 800d7f4: 613b str r3, [r7, #16] + 800e430: 4b2a ldr r3, [pc, #168] ; (800e4dc ) + 800e432: 681b ldr r3, [r3, #0] + 800e434: 68db ldr r3, [r3, #12] + 800e436: 681b ldr r3, [r3, #0] + 800e438: 613b str r3, [r7, #16] /* Remove the timer from the list. */ pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ - 800d7f6: 4b28 ldr r3, [pc, #160] ; (800d898 ) - 800d7f8: 681b ldr r3, [r3, #0] - 800d7fa: 68db ldr r3, [r3, #12] - 800d7fc: 68db ldr r3, [r3, #12] - 800d7fe: 60fb str r3, [r7, #12] + 800e43a: 4b28 ldr r3, [pc, #160] ; (800e4dc ) + 800e43c: 681b ldr r3, [r3, #0] + 800e43e: 68db ldr r3, [r3, #12] + 800e440: 68db ldr r3, [r3, #12] + 800e442: 60fb str r3, [r7, #12] ( void ) uxListRemove( &( pxTimer->xTimerListItem ) ); - 800d800: 68fb ldr r3, [r7, #12] - 800d802: 3304 adds r3, #4 - 800d804: 0018 movs r0, r3 - 800d806: f7fd feda bl 800b5be + 800e444: 68fb ldr r3, [r7, #12] + 800e446: 3304 adds r3, #4 + 800e448: 0018 movs r0, r3 + 800e44a: f7fd feda bl 800c202 traceTIMER_EXPIRED( pxTimer ); /* Execute its callback, then send a command to restart the timer if it is an auto-reload timer. It cannot be restarted here as the lists have not yet been switched. */ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer ); - 800d80a: 68fb ldr r3, [r7, #12] - 800d80c: 6a1b ldr r3, [r3, #32] - 800d80e: 68fa ldr r2, [r7, #12] - 800d810: 0010 movs r0, r2 - 800d812: 4798 blx r3 + 800e44e: 68fb ldr r3, [r7, #12] + 800e450: 6a1b ldr r3, [r3, #32] + 800e452: 68fa ldr r2, [r7, #12] + 800e454: 0010 movs r0, r2 + 800e456: 4798 blx r3 if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 ) - 800d814: 68fb ldr r3, [r7, #12] - 800d816: 2228 movs r2, #40 ; 0x28 - 800d818: 5c9b ldrb r3, [r3, r2] - 800d81a: 001a movs r2, r3 - 800d81c: 2304 movs r3, #4 - 800d81e: 4013 ands r3, r2 - 800d820: d026 beq.n 800d870 + 800e458: 68fb ldr r3, [r7, #12] + 800e45a: 2228 movs r2, #40 ; 0x28 + 800e45c: 5c9b ldrb r3, [r3, r2] + 800e45e: 001a movs r2, r3 + 800e460: 2304 movs r3, #4 + 800e462: 4013 ands r3, r2 + 800e464: d026 beq.n 800e4b4 the timer going into the same timer list then it has already expired and the timer should be re-inserted into the current list so it is processed again within this loop. Otherwise a command should be sent to restart the timer to ensure it is only inserted into a list after the lists have been swapped. */ xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ); - 800d822: 68fb ldr r3, [r7, #12] - 800d824: 699b ldr r3, [r3, #24] - 800d826: 693a ldr r2, [r7, #16] - 800d828: 18d3 adds r3, r2, r3 - 800d82a: 60bb str r3, [r7, #8] + 800e466: 68fb ldr r3, [r7, #12] + 800e468: 699b ldr r3, [r3, #24] + 800e46a: 693a ldr r2, [r7, #16] + 800e46c: 18d3 adds r3, r2, r3 + 800e46e: 60bb str r3, [r7, #8] if( xReloadTime > xNextExpireTime ) - 800d82c: 68ba ldr r2, [r7, #8] - 800d82e: 693b ldr r3, [r7, #16] - 800d830: 429a cmp r2, r3 - 800d832: d90e bls.n 800d852 + 800e470: 68ba ldr r2, [r7, #8] + 800e472: 693b ldr r3, [r7, #16] + 800e474: 429a cmp r2, r3 + 800e476: d90e bls.n 800e496 { listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime ); - 800d834: 68fb ldr r3, [r7, #12] - 800d836: 68ba ldr r2, [r7, #8] - 800d838: 605a str r2, [r3, #4] + 800e478: 68fb ldr r3, [r7, #12] + 800e47a: 68ba ldr r2, [r7, #8] + 800e47c: 605a str r2, [r3, #4] listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer ); - 800d83a: 68fb ldr r3, [r7, #12] - 800d83c: 68fa ldr r2, [r7, #12] - 800d83e: 611a str r2, [r3, #16] + 800e47e: 68fb ldr r3, [r7, #12] + 800e480: 68fa ldr r2, [r7, #12] + 800e482: 611a str r2, [r3, #16] vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) ); - 800d840: 4b15 ldr r3, [pc, #84] ; (800d898 ) - 800d842: 681a ldr r2, [r3, #0] - 800d844: 68fb ldr r3, [r7, #12] - 800d846: 3304 adds r3, #4 - 800d848: 0019 movs r1, r3 - 800d84a: 0010 movs r0, r2 - 800d84c: f7fd fe81 bl 800b552 - 800d850: e00e b.n 800d870 + 800e484: 4b15 ldr r3, [pc, #84] ; (800e4dc ) + 800e486: 681a ldr r2, [r3, #0] + 800e488: 68fb ldr r3, [r7, #12] + 800e48a: 3304 adds r3, #4 + 800e48c: 0019 movs r1, r3 + 800e48e: 0010 movs r0, r2 + 800e490: f7fd fe81 bl 800c196 + 800e494: e00e b.n 800e4b4 } else { xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY ); - 800d852: 693a ldr r2, [r7, #16] - 800d854: 68f8 ldr r0, [r7, #12] - 800d856: 2300 movs r3, #0 - 800d858: 9300 str r3, [sp, #0] - 800d85a: 2300 movs r3, #0 - 800d85c: 2100 movs r1, #0 - 800d85e: f7ff fd8d bl 800d37c - 800d862: 0003 movs r3, r0 - 800d864: 607b str r3, [r7, #4] + 800e496: 693a ldr r2, [r7, #16] + 800e498: 68f8 ldr r0, [r7, #12] + 800e49a: 2300 movs r3, #0 + 800e49c: 9300 str r3, [sp, #0] + 800e49e: 2300 movs r3, #0 + 800e4a0: 2100 movs r1, #0 + 800e4a2: f7ff fd8d bl 800dfc0 + 800e4a6: 0003 movs r3, r0 + 800e4a8: 607b str r3, [r7, #4] configASSERT( xResult ); - 800d866: 687b ldr r3, [r7, #4] - 800d868: 2b00 cmp r3, #0 - 800d86a: d101 bne.n 800d870 - 800d86c: b672 cpsid i - 800d86e: e7fe b.n 800d86e + 800e4aa: 687b ldr r3, [r7, #4] + 800e4ac: 2b00 cmp r3, #0 + 800e4ae: d101 bne.n 800e4b4 + 800e4b0: b672 cpsid i + 800e4b2: e7fe b.n 800e4b2 while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE ) - 800d870: 4b09 ldr r3, [pc, #36] ; (800d898 ) - 800d872: 681b ldr r3, [r3, #0] - 800d874: 681b ldr r3, [r3, #0] - 800d876: 2b00 cmp r3, #0 - 800d878: d1b8 bne.n 800d7ec + 800e4b4: 4b09 ldr r3, [pc, #36] ; (800e4dc ) + 800e4b6: 681b ldr r3, [r3, #0] + 800e4b8: 681b ldr r3, [r3, #0] + 800e4ba: 2b00 cmp r3, #0 + 800e4bc: d1b8 bne.n 800e430 { mtCOVERAGE_TEST_MARKER(); } } pxTemp = pxCurrentTimerList; - 800d87a: 4b07 ldr r3, [pc, #28] ; (800d898 ) - 800d87c: 681b ldr r3, [r3, #0] - 800d87e: 617b str r3, [r7, #20] + 800e4be: 4b07 ldr r3, [pc, #28] ; (800e4dc ) + 800e4c0: 681b ldr r3, [r3, #0] + 800e4c2: 617b str r3, [r7, #20] pxCurrentTimerList = pxOverflowTimerList; - 800d880: 4b06 ldr r3, [pc, #24] ; (800d89c ) - 800d882: 681a ldr r2, [r3, #0] - 800d884: 4b04 ldr r3, [pc, #16] ; (800d898 ) - 800d886: 601a str r2, [r3, #0] + 800e4c4: 4b06 ldr r3, [pc, #24] ; (800e4e0 ) + 800e4c6: 681a ldr r2, [r3, #0] + 800e4c8: 4b04 ldr r3, [pc, #16] ; (800e4dc ) + 800e4ca: 601a str r2, [r3, #0] pxOverflowTimerList = pxTemp; - 800d888: 4b04 ldr r3, [pc, #16] ; (800d89c ) - 800d88a: 697a ldr r2, [r7, #20] - 800d88c: 601a str r2, [r3, #0] + 800e4cc: 4b04 ldr r3, [pc, #16] ; (800e4e0 ) + 800e4ce: 697a ldr r2, [r7, #20] + 800e4d0: 601a str r2, [r3, #0] } - 800d88e: 46c0 nop ; (mov r8, r8) - 800d890: 46bd mov sp, r7 - 800d892: b006 add sp, #24 - 800d894: bd80 pop {r7, pc} - 800d896: 46c0 nop ; (mov r8, r8) - 800d898: 2000102c .word 0x2000102c - 800d89c: 20001030 .word 0x20001030 + 800e4d2: 46c0 nop ; (mov r8, r8) + 800e4d4: 46bd mov sp, r7 + 800e4d6: b006 add sp, #24 + 800e4d8: bd80 pop {r7, pc} + 800e4da: 46c0 nop ; (mov r8, r8) + 800e4dc: 2000110c .word 0x2000110c + 800e4e0: 20001110 .word 0x20001110 -0800d8a0 : +0800e4e4 : /*-----------------------------------------------------------*/ static void prvCheckForValidListAndQueue( void ) { - 800d8a0: b580 push {r7, lr} - 800d8a2: b082 sub sp, #8 - 800d8a4: af02 add r7, sp, #8 + 800e4e4: b580 push {r7, lr} + 800e4e6: b082 sub sp, #8 + 800e4e8: af02 add r7, sp, #8 /* Check that the list from which active timers are referenced, and the queue used to communicate with the timer service, have been initialised. */ taskENTER_CRITICAL(); - 800d8a6: f000 f913 bl 800dad0 + 800e4ea: f000 f911 bl 800e710 { if( xTimerQueue == NULL ) - 800d8aa: 4b16 ldr r3, [pc, #88] ; (800d904 ) - 800d8ac: 681b ldr r3, [r3, #0] - 800d8ae: 2b00 cmp r3, #0 - 800d8b0: d123 bne.n 800d8fa + 800e4ee: 4b16 ldr r3, [pc, #88] ; (800e548 ) + 800e4f0: 681b ldr r3, [r3, #0] + 800e4f2: 2b00 cmp r3, #0 + 800e4f4: d123 bne.n 800e53e { vListInitialise( &xActiveTimerList1 ); - 800d8b2: 4b15 ldr r3, [pc, #84] ; (800d908 ) - 800d8b4: 0018 movs r0, r3 - 800d8b6: f7fd fe01 bl 800b4bc + 800e4f6: 4b15 ldr r3, [pc, #84] ; (800e54c ) + 800e4f8: 0018 movs r0, r3 + 800e4fa: f7fd fe01 bl 800c100 vListInitialise( &xActiveTimerList2 ); - 800d8ba: 4b14 ldr r3, [pc, #80] ; (800d90c ) - 800d8bc: 0018 movs r0, r3 - 800d8be: f7fd fdfd bl 800b4bc + 800e4fe: 4b14 ldr r3, [pc, #80] ; (800e550 ) + 800e500: 0018 movs r0, r3 + 800e502: f7fd fdfd bl 800c100 pxCurrentTimerList = &xActiveTimerList1; - 800d8c2: 4b13 ldr r3, [pc, #76] ; (800d910 ) - 800d8c4: 4a10 ldr r2, [pc, #64] ; (800d908 ) - 800d8c6: 601a str r2, [r3, #0] + 800e506: 4b13 ldr r3, [pc, #76] ; (800e554 ) + 800e508: 4a10 ldr r2, [pc, #64] ; (800e54c ) + 800e50a: 601a str r2, [r3, #0] pxOverflowTimerList = &xActiveTimerList2; - 800d8c8: 4b12 ldr r3, [pc, #72] ; (800d914 ) - 800d8ca: 4a10 ldr r2, [pc, #64] ; (800d90c ) - 800d8cc: 601a str r2, [r3, #0] + 800e50c: 4b12 ldr r3, [pc, #72] ; (800e558 ) + 800e50e: 4a10 ldr r2, [pc, #64] ; (800e550 ) + 800e510: 601a str r2, [r3, #0] /* The timer queue is allocated statically in case configSUPPORT_DYNAMIC_ALLOCATION is 0. */ static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */ static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */ xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue ); - 800d8ce: 4b12 ldr r3, [pc, #72] ; (800d918 ) - 800d8d0: 4a12 ldr r2, [pc, #72] ; (800d91c ) - 800d8d2: 2100 movs r1, #0 - 800d8d4: 9100 str r1, [sp, #0] - 800d8d6: 2110 movs r1, #16 - 800d8d8: 200a movs r0, #10 - 800d8da: f7fd feec bl 800b6b6 - 800d8de: 0002 movs r2, r0 - 800d8e0: 4b08 ldr r3, [pc, #32] ; (800d904 ) - 800d8e2: 601a str r2, [r3, #0] + 800e512: 4b12 ldr r3, [pc, #72] ; (800e55c ) + 800e514: 4a12 ldr r2, [pc, #72] ; (800e560 ) + 800e516: 2100 movs r1, #0 + 800e518: 9100 str r1, [sp, #0] + 800e51a: 2110 movs r1, #16 + 800e51c: 200a movs r0, #10 + 800e51e: f7fd feec bl 800c2fa + 800e522: 0002 movs r2, r0 + 800e524: 4b08 ldr r3, [pc, #32] ; (800e548 ) + 800e526: 601a str r2, [r3, #0] } #endif #if ( configQUEUE_REGISTRY_SIZE > 0 ) { if( xTimerQueue != NULL ) - 800d8e4: 4b07 ldr r3, [pc, #28] ; (800d904 ) - 800d8e6: 681b ldr r3, [r3, #0] - 800d8e8: 2b00 cmp r3, #0 - 800d8ea: d006 beq.n 800d8fa + 800e528: 4b07 ldr r3, [pc, #28] ; (800e548 ) + 800e52a: 681b ldr r3, [r3, #0] + 800e52c: 2b00 cmp r3, #0 + 800e52e: d006 beq.n 800e53e { vQueueAddToRegistry( xTimerQueue, "TmrQ" ); - 800d8ec: 4b05 ldr r3, [pc, #20] ; (800d904 ) - 800d8ee: 681b ldr r3, [r3, #0] - 800d8f0: 4a0b ldr r2, [pc, #44] ; (800d920 ) - 800d8f2: 0011 movs r1, r2 - 800d8f4: 0018 movs r0, r3 - 800d8f6: f7fe fcb9 bl 800c26c + 800e530: 4b05 ldr r3, [pc, #20] ; (800e548 ) + 800e532: 681b ldr r3, [r3, #0] + 800e534: 4a0b ldr r2, [pc, #44] ; (800e564 ) + 800e536: 0011 movs r1, r2 + 800e538: 0018 movs r0, r3 + 800e53a: f7fe fcb9 bl 800ceb0 else { mtCOVERAGE_TEST_MARKER(); } } taskEXIT_CRITICAL(); - 800d8fa: f000 f8fb bl 800daf4 + 800e53e: f000 f8f9 bl 800e734 } - 800d8fe: 46c0 nop ; (mov r8, r8) - 800d900: 46bd mov sp, r7 - 800d902: bd80 pop {r7, pc} - 800d904: 20001034 .word 0x20001034 - 800d908: 20001004 .word 0x20001004 - 800d90c: 20001018 .word 0x20001018 - 800d910: 2000102c .word 0x2000102c - 800d914: 20001030 .word 0x20001030 - 800d918: 200010e0 .word 0x200010e0 - 800d91c: 20001040 .word 0x20001040 - 800d920: 0800eb64 .word 0x0800eb64 + 800e542: 46c0 nop ; (mov r8, r8) + 800e544: 46bd mov sp, r7 + 800e546: bd80 pop {r7, pc} + 800e548: 20001114 .word 0x20001114 + 800e54c: 200010e4 .word 0x200010e4 + 800e550: 200010f8 .word 0x200010f8 + 800e554: 2000110c .word 0x2000110c + 800e558: 20001110 .word 0x20001110 + 800e55c: 200011c0 .word 0x200011c0 + 800e560: 20001120 .word 0x20001120 + 800e564: 0800f7a4 .word 0x0800f7a4 -0800d924 : +0800e568 : /*-----------------------------------------------------------*/ BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) { - 800d924: b580 push {r7, lr} - 800d926: b084 sub sp, #16 - 800d928: af00 add r7, sp, #0 - 800d92a: 6078 str r0, [r7, #4] + 800e568: b580 push {r7, lr} + 800e56a: b084 sub sp, #16 + 800e56c: af00 add r7, sp, #0 + 800e56e: 6078 str r0, [r7, #4] BaseType_t xReturn; Timer_t *pxTimer = xTimer; - 800d92c: 687b ldr r3, [r7, #4] - 800d92e: 60bb str r3, [r7, #8] + 800e570: 687b ldr r3, [r7, #4] + 800e572: 60bb str r3, [r7, #8] configASSERT( xTimer ); - 800d930: 687b ldr r3, [r7, #4] - 800d932: 2b00 cmp r3, #0 - 800d934: d101 bne.n 800d93a - 800d936: b672 cpsid i - 800d938: e7fe b.n 800d938 + 800e574: 687b ldr r3, [r7, #4] + 800e576: 2b00 cmp r3, #0 + 800e578: d101 bne.n 800e57e + 800e57a: b672 cpsid i + 800e57c: e7fe b.n 800e57c /* Is the timer in the list of active timers? */ taskENTER_CRITICAL(); - 800d93a: f000 f8c9 bl 800dad0 + 800e57e: f000 f8c7 bl 800e710 { if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 ) - 800d93e: 68bb ldr r3, [r7, #8] - 800d940: 2228 movs r2, #40 ; 0x28 - 800d942: 5c9b ldrb r3, [r3, r2] - 800d944: 001a movs r2, r3 - 800d946: 2301 movs r3, #1 - 800d948: 4013 ands r3, r2 - 800d94a: d102 bne.n 800d952 + 800e582: 68bb ldr r3, [r7, #8] + 800e584: 2228 movs r2, #40 ; 0x28 + 800e586: 5c9b ldrb r3, [r3, r2] + 800e588: 001a movs r2, r3 + 800e58a: 2301 movs r3, #1 + 800e58c: 4013 ands r3, r2 + 800e58e: d102 bne.n 800e596 { xReturn = pdFALSE; - 800d94c: 2300 movs r3, #0 - 800d94e: 60fb str r3, [r7, #12] - 800d950: e001 b.n 800d956 + 800e590: 2300 movs r3, #0 + 800e592: 60fb str r3, [r7, #12] + 800e594: e001 b.n 800e59a } else { xReturn = pdTRUE; - 800d952: 2301 movs r3, #1 - 800d954: 60fb str r3, [r7, #12] + 800e596: 2301 movs r3, #1 + 800e598: 60fb str r3, [r7, #12] } } taskEXIT_CRITICAL(); - 800d956: f000 f8cd bl 800daf4 + 800e59a: f000 f8cb bl 800e734 return xReturn; - 800d95a: 68fb ldr r3, [r7, #12] + 800e59e: 68fb ldr r3, [r7, #12] } /*lint !e818 Can't be pointer to const due to the typedef. */ - 800d95c: 0018 movs r0, r3 - 800d95e: 46bd mov sp, r7 - 800d960: b004 add sp, #16 - 800d962: bd80 pop {r7, pc} + 800e5a0: 0018 movs r0, r3 + 800e5a2: 46bd mov sp, r7 + 800e5a4: b004 add sp, #16 + 800e5a6: bd80 pop {r7, pc} -0800d964 : +0800e5a8 : /*-----------------------------------------------------------*/ void *pvTimerGetTimerID( const TimerHandle_t xTimer ) { - 800d964: b580 push {r7, lr} - 800d966: b084 sub sp, #16 - 800d968: af00 add r7, sp, #0 - 800d96a: 6078 str r0, [r7, #4] + 800e5a8: b580 push {r7, lr} + 800e5aa: b084 sub sp, #16 + 800e5ac: af00 add r7, sp, #0 + 800e5ae: 6078 str r0, [r7, #4] Timer_t * const pxTimer = xTimer; - 800d96c: 687b ldr r3, [r7, #4] - 800d96e: 60fb str r3, [r7, #12] + 800e5b0: 687b ldr r3, [r7, #4] + 800e5b2: 60fb str r3, [r7, #12] void *pvReturn; configASSERT( xTimer ); - 800d970: 687b ldr r3, [r7, #4] - 800d972: 2b00 cmp r3, #0 - 800d974: d101 bne.n 800d97a - 800d976: b672 cpsid i - 800d978: e7fe b.n 800d978 + 800e5b4: 687b ldr r3, [r7, #4] + 800e5b6: 2b00 cmp r3, #0 + 800e5b8: d101 bne.n 800e5be + 800e5ba: b672 cpsid i + 800e5bc: e7fe b.n 800e5bc taskENTER_CRITICAL(); - 800d97a: f000 f8a9 bl 800dad0 + 800e5be: f000 f8a7 bl 800e710 { pvReturn = pxTimer->pvTimerID; - 800d97e: 68fb ldr r3, [r7, #12] - 800d980: 69db ldr r3, [r3, #28] - 800d982: 60bb str r3, [r7, #8] + 800e5c2: 68fb ldr r3, [r7, #12] + 800e5c4: 69db ldr r3, [r3, #28] + 800e5c6: 60bb str r3, [r7, #8] } taskEXIT_CRITICAL(); - 800d984: f000 f8b6 bl 800daf4 + 800e5c8: f000 f8b4 bl 800e734 return pvReturn; - 800d988: 68bb ldr r3, [r7, #8] + 800e5cc: 68bb ldr r3, [r7, #8] } - 800d98a: 0018 movs r0, r3 - 800d98c: 46bd mov sp, r7 - 800d98e: b004 add sp, #16 - 800d990: bd80 pop {r7, pc} + 800e5ce: 0018 movs r0, r3 + 800e5d0: 46bd mov sp, r7 + 800e5d2: b004 add sp, #16 + 800e5d4: bd80 pop {r7, pc} ... -0800d994 : +0800e5d8 : /* * See header file for description. */ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) { - 800d994: b580 push {r7, lr} - 800d996: b084 sub sp, #16 - 800d998: af00 add r7, sp, #0 - 800d99a: 60f8 str r0, [r7, #12] - 800d99c: 60b9 str r1, [r7, #8] - 800d99e: 607a str r2, [r7, #4] + 800e5d8: b580 push {r7, lr} + 800e5da: b084 sub sp, #16 + 800e5dc: af00 add r7, sp, #0 + 800e5de: 60f8 str r0, [r7, #12] + 800e5e0: 60b9 str r1, [r7, #8] + 800e5e2: 607a str r2, [r7, #4] /* Simulate the stack frame as it would be created by a context switch interrupt. */ pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ - 800d9a0: 68fb ldr r3, [r7, #12] - 800d9a2: 3b04 subs r3, #4 - 800d9a4: 60fb str r3, [r7, #12] + 800e5e4: 68fb ldr r3, [r7, #12] + 800e5e6: 3b04 subs r3, #4 + 800e5e8: 60fb str r3, [r7, #12] *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ - 800d9a6: 68fb ldr r3, [r7, #12] - 800d9a8: 2280 movs r2, #128 ; 0x80 - 800d9aa: 0452 lsls r2, r2, #17 - 800d9ac: 601a str r2, [r3, #0] + 800e5ea: 68fb ldr r3, [r7, #12] + 800e5ec: 2280 movs r2, #128 ; 0x80 + 800e5ee: 0452 lsls r2, r2, #17 + 800e5f0: 601a str r2, [r3, #0] pxTopOfStack--; - 800d9ae: 68fb ldr r3, [r7, #12] - 800d9b0: 3b04 subs r3, #4 - 800d9b2: 60fb str r3, [r7, #12] + 800e5f2: 68fb ldr r3, [r7, #12] + 800e5f4: 3b04 subs r3, #4 + 800e5f6: 60fb str r3, [r7, #12] *pxTopOfStack = ( StackType_t ) pxCode; /* PC */ - 800d9b4: 68ba ldr r2, [r7, #8] - 800d9b6: 68fb ldr r3, [r7, #12] - 800d9b8: 601a str r2, [r3, #0] + 800e5f8: 68ba ldr r2, [r7, #8] + 800e5fa: 68fb ldr r3, [r7, #12] + 800e5fc: 601a str r2, [r3, #0] pxTopOfStack--; - 800d9ba: 68fb ldr r3, [r7, #12] - 800d9bc: 3b04 subs r3, #4 - 800d9be: 60fb str r3, [r7, #12] + 800e5fe: 68fb ldr r3, [r7, #12] + 800e600: 3b04 subs r3, #4 + 800e602: 60fb str r3, [r7, #12] *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */ - 800d9c0: 4a08 ldr r2, [pc, #32] ; (800d9e4 ) - 800d9c2: 68fb ldr r3, [r7, #12] - 800d9c4: 601a str r2, [r3, #0] + 800e604: 4a08 ldr r2, [pc, #32] ; (800e628 ) + 800e606: 68fb ldr r3, [r7, #12] + 800e608: 601a str r2, [r3, #0] pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ - 800d9c6: 68fb ldr r3, [r7, #12] - 800d9c8: 3b14 subs r3, #20 - 800d9ca: 60fb str r3, [r7, #12] + 800e60a: 68fb ldr r3, [r7, #12] + 800e60c: 3b14 subs r3, #20 + 800e60e: 60fb str r3, [r7, #12] *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ - 800d9cc: 687a ldr r2, [r7, #4] - 800d9ce: 68fb ldr r3, [r7, #12] - 800d9d0: 601a str r2, [r3, #0] + 800e610: 687a ldr r2, [r7, #4] + 800e612: 68fb ldr r3, [r7, #12] + 800e614: 601a str r2, [r3, #0] pxTopOfStack -= 8; /* R11..R4. */ - 800d9d2: 68fb ldr r3, [r7, #12] - 800d9d4: 3b20 subs r3, #32 - 800d9d6: 60fb str r3, [r7, #12] + 800e616: 68fb ldr r3, [r7, #12] + 800e618: 3b20 subs r3, #32 + 800e61a: 60fb str r3, [r7, #12] return pxTopOfStack; - 800d9d8: 68fb ldr r3, [r7, #12] + 800e61c: 68fb ldr r3, [r7, #12] } - 800d9da: 0018 movs r0, r3 - 800d9dc: 46bd mov sp, r7 - 800d9de: b004 add sp, #16 - 800d9e0: bd80 pop {r7, pc} - 800d9e2: 46c0 nop ; (mov r8, r8) - 800d9e4: 0800d9e9 .word 0x0800d9e9 + 800e61e: 0018 movs r0, r3 + 800e620: 46bd mov sp, r7 + 800e622: b004 add sp, #16 + 800e624: bd80 pop {r7, pc} + 800e626: 46c0 nop ; (mov r8, r8) + 800e628: 0800e62d .word 0x0800e62d -0800d9e8 : +0800e62c : /*-----------------------------------------------------------*/ static void prvTaskExitError( void ) { - 800d9e8: b580 push {r7, lr} - 800d9ea: b082 sub sp, #8 - 800d9ec: af00 add r7, sp, #0 + 800e62c: b580 push {r7, lr} + 800e62e: b082 sub sp, #8 + 800e630: af00 add r7, sp, #0 volatile uint32_t ulDummy = 0UL; - 800d9ee: 2300 movs r3, #0 - 800d9f0: 607b str r3, [r7, #4] + 800e632: 2300 movs r3, #0 + 800e634: 607b str r3, [r7, #4] its caller as there is nothing to return to. If a task wants to exit it should instead call vTaskDelete( NULL ). Artificially force an assert() to be triggered if configASSERT() is defined, then stop here so application writers can catch the error. */ configASSERT( uxCriticalNesting == ~0UL ); - 800d9f2: 4b08 ldr r3, [pc, #32] ; (800da14 ) - 800d9f4: 681b ldr r3, [r3, #0] - 800d9f6: 3301 adds r3, #1 - 800d9f8: d001 beq.n 800d9fe - 800d9fa: b672 cpsid i - 800d9fc: e7fe b.n 800d9fc + 800e636: 4b08 ldr r3, [pc, #32] ; (800e658 ) + 800e638: 681b ldr r3, [r3, #0] + 800e63a: 3301 adds r3, #1 + 800e63c: d001 beq.n 800e642 + 800e63e: b672 cpsid i + 800e640: e7fe b.n 800e640 portDISABLE_INTERRUPTS(); - 800d9fe: b672 cpsid i + 800e642: b672 cpsid i while( ulDummy == 0 ) - 800da00: 46c0 nop ; (mov r8, r8) - 800da02: 687b ldr r3, [r7, #4] - 800da04: 2b00 cmp r3, #0 - 800da06: d0fc beq.n 800da02 + 800e644: 46c0 nop ; (mov r8, r8) + 800e646: 687b ldr r3, [r7, #4] + 800e648: 2b00 cmp r3, #0 + 800e64a: d0fc beq.n 800e646 about code appearing after this function is called - making ulDummy volatile makes the compiler think the function could return and therefore not output an 'unreachable code' warning for code that appears after it. */ } } - 800da08: 46c0 nop ; (mov r8, r8) - 800da0a: 46c0 nop ; (mov r8, r8) - 800da0c: 46bd mov sp, r7 - 800da0e: b002 add sp, #8 - 800da10: bd80 pop {r7, pc} - 800da12: 46c0 nop ; (mov r8, r8) - 800da14: 2000004c .word 0x2000004c + 800e64c: 46c0 nop ; (mov r8, r8) + 800e64e: 46c0 nop ; (mov r8, r8) + 800e650: 46bd mov sp, r7 + 800e652: b002 add sp, #8 + 800e654: bd80 pop {r7, pc} + 800e656: 46c0 nop ; (mov r8, r8) + 800e658: 2000004c .word 0x2000004c -0800da18 : +0800e65c : /*-----------------------------------------------------------*/ void vPortSVCHandler( void ) { - 800da18: b580 push {r7, lr} - 800da1a: af00 add r7, sp, #0 + 800e65c: b580 push {r7, lr} + 800e65e: af00 add r7, sp, #0 /* This function is no longer used, but retained for backward compatibility. */ } - 800da1c: 46c0 nop ; (mov r8, r8) - 800da1e: 46bd mov sp, r7 - 800da20: bd80 pop {r7, pc} + 800e660: 46c0 nop ; (mov r8, r8) + 800e662: 46bd mov sp, r7 + 800e664: bd80 pop {r7, pc} ... -0800da30 : +0800e670 : void vPortStartFirstTask( void ) { /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector table offset register that can be used to locate the initial stack value. Not all M0 parts have the application vector table at address 0. */ __asm volatile( - 800da30: 4a0b ldr r2, [pc, #44] ; (800da60 ) - 800da32: 6813 ldr r3, [r2, #0] - 800da34: 6818 ldr r0, [r3, #0] - 800da36: 3020 adds r0, #32 - 800da38: f380 8809 msr PSP, r0 - 800da3c: 2002 movs r0, #2 - 800da3e: f380 8814 msr CONTROL, r0 - 800da42: f3bf 8f6f isb sy - 800da46: bc3f pop {r0, r1, r2, r3, r4, r5} - 800da48: 46ae mov lr, r5 - 800da4a: bc08 pop {r3} - 800da4c: bc04 pop {r2} - 800da4e: b662 cpsie i - 800da50: 4718 bx r3 - 800da52: 46c0 nop ; (mov r8, r8) - 800da54: 46c0 nop ; (mov r8, r8) - 800da56: 46c0 nop ; (mov r8, r8) - 800da58: 46c0 nop ; (mov r8, r8) - 800da5a: 46c0 nop ; (mov r8, r8) - 800da5c: 46c0 nop ; (mov r8, r8) - 800da5e: 46c0 nop ; (mov r8, r8) + 800e670: 4a0b ldr r2, [pc, #44] ; (800e6a0 ) + 800e672: 6813 ldr r3, [r2, #0] + 800e674: 6818 ldr r0, [r3, #0] + 800e676: 3020 adds r0, #32 + 800e678: f380 8809 msr PSP, r0 + 800e67c: 2002 movs r0, #2 + 800e67e: f380 8814 msr CONTROL, r0 + 800e682: f3bf 8f6f isb sy + 800e686: bc3f pop {r0, r1, r2, r3, r4, r5} + 800e688: 46ae mov lr, r5 + 800e68a: bc08 pop {r3} + 800e68c: bc04 pop {r2} + 800e68e: b662 cpsie i + 800e690: 4718 bx r3 + 800e692: 46c0 nop ; (mov r8, r8) + 800e694: 46c0 nop ; (mov r8, r8) + 800e696: 46c0 nop ; (mov r8, r8) + 800e698: 46c0 nop ; (mov r8, r8) + 800e69a: 46c0 nop ; (mov r8, r8) + 800e69c: 46c0 nop ; (mov r8, r8) + 800e69e: 46c0 nop ; (mov r8, r8) -0800da60 : - 800da60: 20000b04 .word 0x20000b04 +0800e6a0 : + 800e6a0: 20000be4 .word 0x20000be4 " bx r3 \n" /* Finally, jump to the user defined task code. */ " \n" " .align 4 \n" "pxCurrentTCBConst2: .word pxCurrentTCB " ); } - 800da64: 46c0 nop ; (mov r8, r8) - 800da66: 46c0 nop ; (mov r8, r8) + 800e6a4: 46c0 nop ; (mov r8, r8) + 800e6a6: 46c0 nop ; (mov r8, r8) -0800da68 : +0800e6a8 : /* * See header file for description. */ BaseType_t xPortStartScheduler( void ) { - 800da68: b580 push {r7, lr} - 800da6a: af00 add r7, sp, #0 + 800e6a8: b580 push {r7, lr} + 800e6aa: af00 add r7, sp, #0 /* Make PendSV, CallSV and SysTick the same priority as the kernel. */ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI; - 800da6c: 4b0e ldr r3, [pc, #56] ; (800daa8 ) - 800da6e: 681a ldr r2, [r3, #0] - 800da70: 4b0d ldr r3, [pc, #52] ; (800daa8 ) - 800da72: 21ff movs r1, #255 ; 0xff - 800da74: 0409 lsls r1, r1, #16 - 800da76: 430a orrs r2, r1 - 800da78: 601a str r2, [r3, #0] + 800e6ac: 4b0e ldr r3, [pc, #56] ; (800e6e8 ) + 800e6ae: 681a ldr r2, [r3, #0] + 800e6b0: 4b0d ldr r3, [pc, #52] ; (800e6e8 ) + 800e6b2: 21ff movs r1, #255 ; 0xff + 800e6b4: 0409 lsls r1, r1, #16 + 800e6b6: 430a orrs r2, r1 + 800e6b8: 601a str r2, [r3, #0] portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI; - 800da7a: 4b0b ldr r3, [pc, #44] ; (800daa8 ) - 800da7c: 681a ldr r2, [r3, #0] - 800da7e: 4b0a ldr r3, [pc, #40] ; (800daa8 ) - 800da80: 21ff movs r1, #255 ; 0xff - 800da82: 0609 lsls r1, r1, #24 - 800da84: 430a orrs r2, r1 - 800da86: 601a str r2, [r3, #0] + 800e6ba: 4b0b ldr r3, [pc, #44] ; (800e6e8 ) + 800e6bc: 681a ldr r2, [r3, #0] + 800e6be: 4b0a ldr r3, [pc, #40] ; (800e6e8 ) + 800e6c0: 21ff movs r1, #255 ; 0xff + 800e6c2: 0609 lsls r1, r1, #24 + 800e6c4: 430a orrs r2, r1 + 800e6c6: 601a str r2, [r3, #0] /* Start the timer that generates the tick ISR. Interrupts are disabled here already. */ vPortSetupTimerInterrupt(); - 800da88: f000 f898 bl 800dbbc + 800e6c8: f000 f898 bl 800e7fc /* Initialise the critical nesting count ready for the first task. */ uxCriticalNesting = 0; - 800da8c: 4b07 ldr r3, [pc, #28] ; (800daac ) - 800da8e: 2200 movs r2, #0 - 800da90: 601a str r2, [r3, #0] + 800e6cc: 4b07 ldr r3, [pc, #28] ; (800e6ec ) + 800e6ce: 2200 movs r2, #0 + 800e6d0: 601a str r2, [r3, #0] /* Start the first task. */ vPortStartFirstTask(); - 800da92: f7ff ffcd bl 800da30 + 800e6d2: f7ff ffcd bl 800e670 exit error function to prevent compiler warnings about a static function not being called in the case that the application writer overrides this functionality by defining configTASK_RETURN_ADDRESS. Call vTaskSwitchContext() so link time optimisation does not remove the symbol. */ vTaskSwitchContext(); - 800da96: f7fe ffb7 bl 800ca08 + 800e6d6: f7fe ffb9 bl 800d64c prvTaskExitError(); - 800da9a: f7ff ffa5 bl 800d9e8 + 800e6da: f7ff ffa7 bl 800e62c /* Should not get here! */ return 0; - 800da9e: 2300 movs r3, #0 + 800e6de: 2300 movs r3, #0 } - 800daa0: 0018 movs r0, r3 - 800daa2: 46bd mov sp, r7 - 800daa4: bd80 pop {r7, pc} - 800daa6: 46c0 nop ; (mov r8, r8) - 800daa8: e000ed20 .word 0xe000ed20 - 800daac: 2000004c .word 0x2000004c + 800e6e0: 0018 movs r0, r3 + 800e6e2: 46bd mov sp, r7 + 800e6e4: bd80 pop {r7, pc} + 800e6e6: 46c0 nop ; (mov r8, r8) + 800e6e8: e000ed20 .word 0xe000ed20 + 800e6ec: 2000004c .word 0x2000004c -0800dab0 : +0800e6f0 : configASSERT( uxCriticalNesting == 1000UL ); } /*-----------------------------------------------------------*/ void vPortYield( void ) { - 800dab0: b580 push {r7, lr} - 800dab2: af00 add r7, sp, #0 + 800e6f0: b580 push {r7, lr} + 800e6f2: af00 add r7, sp, #0 /* Set a PendSV to request a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; - 800dab4: 4b05 ldr r3, [pc, #20] ; (800dacc ) - 800dab6: 2280 movs r2, #128 ; 0x80 - 800dab8: 0552 lsls r2, r2, #21 - 800daba: 601a str r2, [r3, #0] + 800e6f4: 4b05 ldr r3, [pc, #20] ; (800e70c ) + 800e6f6: 2280 movs r2, #128 ; 0x80 + 800e6f8: 0552 lsls r2, r2, #21 + 800e6fa: 601a str r2, [r3, #0] /* Barriers are normally not required but do ensure the code is completely within the specified behaviour for the architecture. */ __asm volatile( "dsb" ::: "memory" ); - 800dabc: f3bf 8f4f dsb sy + 800e6fc: f3bf 8f4f dsb sy __asm volatile( "isb" ); - 800dac0: f3bf 8f6f isb sy + 800e700: f3bf 8f6f isb sy } - 800dac4: 46c0 nop ; (mov r8, r8) - 800dac6: 46bd mov sp, r7 - 800dac8: bd80 pop {r7, pc} - 800daca: 46c0 nop ; (mov r8, r8) - 800dacc: e000ed04 .word 0xe000ed04 + 800e704: 46c0 nop ; (mov r8, r8) + 800e706: 46bd mov sp, r7 + 800e708: bd80 pop {r7, pc} + 800e70a: 46c0 nop ; (mov r8, r8) + 800e70c: e000ed04 .word 0xe000ed04 -0800dad0 : +0800e710 : /*-----------------------------------------------------------*/ void vPortEnterCritical( void ) { - 800dad0: b580 push {r7, lr} - 800dad2: af00 add r7, sp, #0 + 800e710: b580 push {r7, lr} + 800e712: af00 add r7, sp, #0 portDISABLE_INTERRUPTS(); - 800dad4: b672 cpsid i + 800e714: b672 cpsid i uxCriticalNesting++; - 800dad6: 4b06 ldr r3, [pc, #24] ; (800daf0 ) - 800dad8: 681b ldr r3, [r3, #0] - 800dada: 1c5a adds r2, r3, #1 - 800dadc: 4b04 ldr r3, [pc, #16] ; (800daf0 ) - 800dade: 601a str r2, [r3, #0] + 800e716: 4b06 ldr r3, [pc, #24] ; (800e730 ) + 800e718: 681b ldr r3, [r3, #0] + 800e71a: 1c5a adds r2, r3, #1 + 800e71c: 4b04 ldr r3, [pc, #16] ; (800e730 ) + 800e71e: 601a str r2, [r3, #0] __asm volatile( "dsb" ::: "memory" ); - 800dae0: f3bf 8f4f dsb sy + 800e720: f3bf 8f4f dsb sy __asm volatile( "isb" ); - 800dae4: f3bf 8f6f isb sy + 800e724: f3bf 8f6f isb sy } - 800dae8: 46c0 nop ; (mov r8, r8) - 800daea: 46bd mov sp, r7 - 800daec: bd80 pop {r7, pc} - 800daee: 46c0 nop ; (mov r8, r8) - 800daf0: 2000004c .word 0x2000004c + 800e728: 46c0 nop ; (mov r8, r8) + 800e72a: 46bd mov sp, r7 + 800e72c: bd80 pop {r7, pc} + 800e72e: 46c0 nop ; (mov r8, r8) + 800e730: 2000004c .word 0x2000004c -0800daf4 : +0800e734 : /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { - 800daf4: b580 push {r7, lr} - 800daf6: af00 add r7, sp, #0 + 800e734: b580 push {r7, lr} + 800e736: af00 add r7, sp, #0 configASSERT( uxCriticalNesting ); - 800daf8: 4b09 ldr r3, [pc, #36] ; (800db20 ) - 800dafa: 681b ldr r3, [r3, #0] - 800dafc: 2b00 cmp r3, #0 - 800dafe: d101 bne.n 800db04 - 800db00: b672 cpsid i - 800db02: e7fe b.n 800db02 + 800e738: 4b09 ldr r3, [pc, #36] ; (800e760 ) + 800e73a: 681b ldr r3, [r3, #0] + 800e73c: 2b00 cmp r3, #0 + 800e73e: d101 bne.n 800e744 + 800e740: b672 cpsid i + 800e742: e7fe b.n 800e742 uxCriticalNesting--; - 800db04: 4b06 ldr r3, [pc, #24] ; (800db20 ) - 800db06: 681b ldr r3, [r3, #0] - 800db08: 1e5a subs r2, r3, #1 - 800db0a: 4b05 ldr r3, [pc, #20] ; (800db20 ) - 800db0c: 601a str r2, [r3, #0] + 800e744: 4b06 ldr r3, [pc, #24] ; (800e760 ) + 800e746: 681b ldr r3, [r3, #0] + 800e748: 1e5a subs r2, r3, #1 + 800e74a: 4b05 ldr r3, [pc, #20] ; (800e760 ) + 800e74c: 601a str r2, [r3, #0] if( uxCriticalNesting == 0 ) - 800db0e: 4b04 ldr r3, [pc, #16] ; (800db20 ) - 800db10: 681b ldr r3, [r3, #0] - 800db12: 2b00 cmp r3, #0 - 800db14: d100 bne.n 800db18 + 800e74e: 4b04 ldr r3, [pc, #16] ; (800e760 ) + 800e750: 681b ldr r3, [r3, #0] + 800e752: 2b00 cmp r3, #0 + 800e754: d100 bne.n 800e758 { portENABLE_INTERRUPTS(); - 800db16: b662 cpsie i + 800e756: b662 cpsie i } } - 800db18: 46c0 nop ; (mov r8, r8) - 800db1a: 46bd mov sp, r7 - 800db1c: bd80 pop {r7, pc} - 800db1e: 46c0 nop ; (mov r8, r8) - 800db20: 2000004c .word 0x2000004c + 800e758: 46c0 nop ; (mov r8, r8) + 800e75a: 46bd mov sp, r7 + 800e75c: bd80 pop {r7, pc} + 800e75e: 46c0 nop ; (mov r8, r8) + 800e760: 2000004c .word 0x2000004c -0800db24 : +0800e764 : /*-----------------------------------------------------------*/ uint32_t ulSetInterruptMaskFromISR( void ) { __asm volatile( - 800db24: f3ef 8010 mrs r0, PRIMASK - 800db28: b672 cpsid i - 800db2a: 4770 bx lr + 800e764: f3ef 8010 mrs r0, PRIMASK + 800e768: b672 cpsid i + 800e76a: 4770 bx lr " mrs r0, PRIMASK \n" " cpsid i \n" " bx lr " ::: "memory" ); } - 800db2c: 46c0 nop ; (mov r8, r8) - 800db2e: 0018 movs r0, r3 + 800e76c: 46c0 nop ; (mov r8, r8) + 800e76e: 0018 movs r0, r3 -0800db30 : +0800e770 : /*-----------------------------------------------------------*/ void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) { __asm volatile( - 800db30: f380 8810 msr PRIMASK, r0 - 800db34: 4770 bx lr + 800e770: f380 8810 msr PRIMASK, r0 + 800e774: 4770 bx lr " msr PRIMASK, r0 \n" " bx lr " ::: "memory" ); } - 800db36: 46c0 nop ; (mov r8, r8) + 800e776: 46c0 nop ; (mov r8, r8) ... -0800db40 : +0800e780 : void xPortPendSVHandler( void ) { /* This is a naked function. */ __asm volatile - 800db40: f3ef 8009 mrs r0, PSP - 800db44: 4b0e ldr r3, [pc, #56] ; (800db80 ) - 800db46: 681a ldr r2, [r3, #0] - 800db48: 3820 subs r0, #32 - 800db4a: 6010 str r0, [r2, #0] - 800db4c: c0f0 stmia r0!, {r4, r5, r6, r7} - 800db4e: 4644 mov r4, r8 - 800db50: 464d mov r5, r9 - 800db52: 4656 mov r6, sl - 800db54: 465f mov r7, fp - 800db56: c0f0 stmia r0!, {r4, r5, r6, r7} - 800db58: b508 push {r3, lr} - 800db5a: b672 cpsid i - 800db5c: f7fe ff54 bl 800ca08 - 800db60: b662 cpsie i - 800db62: bc0c pop {r2, r3} - 800db64: 6811 ldr r1, [r2, #0] - 800db66: 6808 ldr r0, [r1, #0] - 800db68: 3010 adds r0, #16 - 800db6a: c8f0 ldmia r0!, {r4, r5, r6, r7} - 800db6c: 46a0 mov r8, r4 - 800db6e: 46a9 mov r9, r5 - 800db70: 46b2 mov sl, r6 - 800db72: 46bb mov fp, r7 - 800db74: f380 8809 msr PSP, r0 - 800db78: 3820 subs r0, #32 - 800db7a: c8f0 ldmia r0!, {r4, r5, r6, r7} - 800db7c: 4718 bx r3 - 800db7e: 46c0 nop ; (mov r8, r8) + 800e780: f3ef 8009 mrs r0, PSP + 800e784: 4b0e ldr r3, [pc, #56] ; (800e7c0 ) + 800e786: 681a ldr r2, [r3, #0] + 800e788: 3820 subs r0, #32 + 800e78a: 6010 str r0, [r2, #0] + 800e78c: c0f0 stmia r0!, {r4, r5, r6, r7} + 800e78e: 4644 mov r4, r8 + 800e790: 464d mov r5, r9 + 800e792: 4656 mov r6, sl + 800e794: 465f mov r7, fp + 800e796: c0f0 stmia r0!, {r4, r5, r6, r7} + 800e798: b508 push {r3, lr} + 800e79a: b672 cpsid i + 800e79c: f7fe ff56 bl 800d64c + 800e7a0: b662 cpsie i + 800e7a2: bc0c pop {r2, r3} + 800e7a4: 6811 ldr r1, [r2, #0] + 800e7a6: 6808 ldr r0, [r1, #0] + 800e7a8: 3010 adds r0, #16 + 800e7aa: c8f0 ldmia r0!, {r4, r5, r6, r7} + 800e7ac: 46a0 mov r8, r4 + 800e7ae: 46a9 mov r9, r5 + 800e7b0: 46b2 mov sl, r6 + 800e7b2: 46bb mov fp, r7 + 800e7b4: f380 8809 msr PSP, r0 + 800e7b8: 3820 subs r0, #32 + 800e7ba: c8f0 ldmia r0!, {r4, r5, r6, r7} + 800e7bc: 4718 bx r3 + 800e7be: 46c0 nop ; (mov r8, r8) -0800db80 : - 800db80: 20000b04 .word 0x20000b04 +0800e7c0 : + 800e7c0: 20000be4 .word 0x20000be4 " bx r3 \n" " \n" " .align 4 \n" "pxCurrentTCBConst: .word pxCurrentTCB " ); } - 800db84: 46c0 nop ; (mov r8, r8) - 800db86: 46c0 nop ; (mov r8, r8) + 800e7c4: 46c0 nop ; (mov r8, r8) + 800e7c6: 46c0 nop ; (mov r8, r8) -0800db88 : +0800e7c8 : /*-----------------------------------------------------------*/ void xPortSysTickHandler( void ) { - 800db88: b580 push {r7, lr} - 800db8a: b082 sub sp, #8 - 800db8c: af00 add r7, sp, #0 + 800e7c8: b580 push {r7, lr} + 800e7ca: b082 sub sp, #8 + 800e7cc: af00 add r7, sp, #0 uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); - 800db8e: f7ff ffc9 bl 800db24 - 800db92: 0003 movs r3, r0 - 800db94: 607b str r3, [r7, #4] + 800e7ce: f7ff ffc9 bl 800e764 + 800e7d2: 0003 movs r3, r0 + 800e7d4: 607b str r3, [r7, #4] { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) - 800db96: f7fe fe87 bl 800c8a8 - 800db9a: 1e03 subs r3, r0, #0 - 800db9c: d003 beq.n 800dba6 + 800e7d6: f7fe fe89 bl 800d4ec + 800e7da: 1e03 subs r3, r0, #0 + 800e7dc: d003 beq.n 800e7e6 { /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; - 800db9e: 4b06 ldr r3, [pc, #24] ; (800dbb8 ) - 800dba0: 2280 movs r2, #128 ; 0x80 - 800dba2: 0552 lsls r2, r2, #21 - 800dba4: 601a str r2, [r3, #0] + 800e7de: 4b06 ldr r3, [pc, #24] ; (800e7f8 ) + 800e7e0: 2280 movs r2, #128 ; 0x80 + 800e7e2: 0552 lsls r2, r2, #21 + 800e7e4: 601a str r2, [r3, #0] } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); - 800dba6: 687b ldr r3, [r7, #4] - 800dba8: 0018 movs r0, r3 - 800dbaa: f7ff ffc1 bl 800db30 + 800e7e6: 687b ldr r3, [r7, #4] + 800e7e8: 0018 movs r0, r3 + 800e7ea: f7ff ffc1 bl 800e770 } - 800dbae: 46c0 nop ; (mov r8, r8) - 800dbb0: 46bd mov sp, r7 - 800dbb2: b002 add sp, #8 - 800dbb4: bd80 pop {r7, pc} - 800dbb6: 46c0 nop ; (mov r8, r8) - 800dbb8: e000ed04 .word 0xe000ed04 + 800e7ee: 46c0 nop ; (mov r8, r8) + 800e7f0: 46bd mov sp, r7 + 800e7f2: b002 add sp, #8 + 800e7f4: bd80 pop {r7, pc} + 800e7f6: 46c0 nop ; (mov r8, r8) + 800e7f8: e000ed04 .word 0xe000ed04 -0800dbbc : +0800e7fc : /* * Setup the systick timer to generate the tick interrupts at the required * frequency. */ __attribute__(( weak )) void vPortSetupTimerInterrupt( void ) { - 800dbbc: b580 push {r7, lr} - 800dbbe: af00 add r7, sp, #0 + 800e7fc: b580 push {r7, lr} + 800e7fe: af00 add r7, sp, #0 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR; } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ portNVIC_SYSTICK_CTRL_REG = 0UL; - 800dbc0: 4b0b ldr r3, [pc, #44] ; (800dbf0 ) - 800dbc2: 2200 movs r2, #0 - 800dbc4: 601a str r2, [r3, #0] + 800e800: 4b0b ldr r3, [pc, #44] ; (800e830 ) + 800e802: 2200 movs r2, #0 + 800e804: 601a str r2, [r3, #0] portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - 800dbc6: 4b0b ldr r3, [pc, #44] ; (800dbf4 ) - 800dbc8: 2200 movs r2, #0 - 800dbca: 601a str r2, [r3, #0] + 800e806: 4b0b ldr r3, [pc, #44] ; (800e834 ) + 800e808: 2200 movs r2, #0 + 800e80a: 601a str r2, [r3, #0] /* Configure SysTick to interrupt at the requested rate. */ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - 800dbcc: 4b0a ldr r3, [pc, #40] ; (800dbf8 ) - 800dbce: 681b ldr r3, [r3, #0] - 800dbd0: 22fa movs r2, #250 ; 0xfa - 800dbd2: 0091 lsls r1, r2, #2 - 800dbd4: 0018 movs r0, r3 - 800dbd6: f7f2 faa9 bl 800012c <__udivsi3> - 800dbda: 0003 movs r3, r0 - 800dbdc: 001a movs r2, r3 - 800dbde: 4b07 ldr r3, [pc, #28] ; (800dbfc ) - 800dbe0: 3a01 subs r2, #1 - 800dbe2: 601a str r2, [r3, #0] + 800e80c: 4b0a ldr r3, [pc, #40] ; (800e838 ) + 800e80e: 681b ldr r3, [r3, #0] + 800e810: 22fa movs r2, #250 ; 0xfa + 800e812: 0091 lsls r1, r2, #2 + 800e814: 0018 movs r0, r3 + 800e816: f7f1 fc89 bl 800012c <__udivsi3> + 800e81a: 0003 movs r3, r0 + 800e81c: 001a movs r2, r3 + 800e81e: 4b07 ldr r3, [pc, #28] ; (800e83c ) + 800e820: 3a01 subs r2, #1 + 800e822: 601a str r2, [r3, #0] portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; - 800dbe4: 4b02 ldr r3, [pc, #8] ; (800dbf0 ) - 800dbe6: 2207 movs r2, #7 - 800dbe8: 601a str r2, [r3, #0] + 800e824: 4b02 ldr r3, [pc, #8] ; (800e830 ) + 800e826: 2207 movs r2, #7 + 800e828: 601a str r2, [r3, #0] } - 800dbea: 46c0 nop ; (mov r8, r8) - 800dbec: 46bd mov sp, r7 - 800dbee: bd80 pop {r7, pc} - 800dbf0: e000e010 .word 0xe000e010 - 800dbf4: e000e018 .word 0xe000e018 - 800dbf8: 20000040 .word 0x20000040 - 800dbfc: e000e014 .word 0xe000e014 + 800e82a: 46c0 nop ; (mov r8, r8) + 800e82c: 46bd mov sp, r7 + 800e82e: bd80 pop {r7, pc} + 800e830: e000e010 .word 0xe000e010 + 800e834: e000e018 .word 0xe000e018 + 800e838: 20000040 .word 0x20000040 + 800e83c: e000e014 .word 0xe000e014 -0800dc00 : +0800e840 : static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ void *pvPortMalloc( size_t xWantedSize ) { - 800dc00: b580 push {r7, lr} - 800dc02: b086 sub sp, #24 - 800dc04: af00 add r7, sp, #0 - 800dc06: 6078 str r0, [r7, #4] + 800e840: b580 push {r7, lr} + 800e842: b086 sub sp, #24 + 800e844: af00 add r7, sp, #0 + 800e846: 6078 str r0, [r7, #4] BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink; void *pvReturn = NULL; - 800dc08: 2300 movs r3, #0 - 800dc0a: 60fb str r3, [r7, #12] + 800e848: 2300 movs r3, #0 + 800e84a: 60fb str r3, [r7, #12] vTaskSuspendAll(); - 800dc0c: f7fe fda6 bl 800c75c + 800e84c: f7fe fda8 bl 800d3a0 { /* If this is the first call to malloc then the heap will require initialisation to setup the list of free blocks. */ if( pxEnd == NULL ) - 800dc10: 4b4b ldr r3, [pc, #300] ; (800dd40 ) - 800dc12: 681b ldr r3, [r3, #0] - 800dc14: 2b00 cmp r3, #0 - 800dc16: d101 bne.n 800dc1c + 800e850: 4b4b ldr r3, [pc, #300] ; (800e980 ) + 800e852: 681b ldr r3, [r3, #0] + 800e854: 2b00 cmp r3, #0 + 800e856: d101 bne.n 800e85c { prvHeapInit(); - 800dc18: f000 f8ec bl 800ddf4 + 800e858: f000 f8ec bl 800ea34 /* Check the requested block size is not so large that the top bit is set. The top bit of the block size member of the BlockLink_t structure is used to determine who owns the block - the application or the kernel, so it must be free. */ if( ( xWantedSize & xBlockAllocatedBit ) == 0 ) - 800dc1c: 4b49 ldr r3, [pc, #292] ; (800dd44 ) - 800dc1e: 681b ldr r3, [r3, #0] - 800dc20: 687a ldr r2, [r7, #4] - 800dc22: 4013 ands r3, r2 - 800dc24: d000 beq.n 800dc28 - 800dc26: e07e b.n 800dd26 + 800e85c: 4b49 ldr r3, [pc, #292] ; (800e984 ) + 800e85e: 681b ldr r3, [r3, #0] + 800e860: 687a ldr r2, [r7, #4] + 800e862: 4013 ands r3, r2 + 800e864: d000 beq.n 800e868 + 800e866: e07e b.n 800e966 { /* The wanted size is increased so it can contain a BlockLink_t structure in addition to the requested amount of bytes. */ if( xWantedSize > 0 ) - 800dc28: 687b ldr r3, [r7, #4] - 800dc2a: 2b00 cmp r3, #0 - 800dc2c: d012 beq.n 800dc54 + 800e868: 687b ldr r3, [r7, #4] + 800e86a: 2b00 cmp r3, #0 + 800e86c: d012 beq.n 800e894 { xWantedSize += xHeapStructSize; - 800dc2e: 2208 movs r2, #8 - 800dc30: 687b ldr r3, [r7, #4] - 800dc32: 189b adds r3, r3, r2 - 800dc34: 607b str r3, [r7, #4] + 800e86e: 2208 movs r2, #8 + 800e870: 687b ldr r3, [r7, #4] + 800e872: 189b adds r3, r3, r2 + 800e874: 607b str r3, [r7, #4] /* Ensure that blocks are always aligned to the required number of bytes. */ if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 ) - 800dc36: 687b ldr r3, [r7, #4] - 800dc38: 2207 movs r2, #7 - 800dc3a: 4013 ands r3, r2 - 800dc3c: d00a beq.n 800dc54 + 800e876: 687b ldr r3, [r7, #4] + 800e878: 2207 movs r2, #7 + 800e87a: 4013 ands r3, r2 + 800e87c: d00a beq.n 800e894 { /* Byte alignment required. */ xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); - 800dc3e: 687b ldr r3, [r7, #4] - 800dc40: 2207 movs r2, #7 - 800dc42: 4393 bics r3, r2 - 800dc44: 3308 adds r3, #8 - 800dc46: 607b str r3, [r7, #4] + 800e87e: 687b ldr r3, [r7, #4] + 800e880: 2207 movs r2, #7 + 800e882: 4393 bics r3, r2 + 800e884: 3308 adds r3, #8 + 800e886: 607b str r3, [r7, #4] configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 ); - 800dc48: 687b ldr r3, [r7, #4] - 800dc4a: 2207 movs r2, #7 - 800dc4c: 4013 ands r3, r2 - 800dc4e: d001 beq.n 800dc54 - 800dc50: b672 cpsid i - 800dc52: e7fe b.n 800dc52 + 800e888: 687b ldr r3, [r7, #4] + 800e88a: 2207 movs r2, #7 + 800e88c: 4013 ands r3, r2 + 800e88e: d001 beq.n 800e894 + 800e890: b672 cpsid i + 800e892: e7fe b.n 800e892 else { mtCOVERAGE_TEST_MARKER(); } if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) - 800dc54: 687b ldr r3, [r7, #4] - 800dc56: 2b00 cmp r3, #0 - 800dc58: d065 beq.n 800dd26 - 800dc5a: 4b3b ldr r3, [pc, #236] ; (800dd48 ) - 800dc5c: 681b ldr r3, [r3, #0] - 800dc5e: 687a ldr r2, [r7, #4] - 800dc60: 429a cmp r2, r3 - 800dc62: d860 bhi.n 800dd26 + 800e894: 687b ldr r3, [r7, #4] + 800e896: 2b00 cmp r3, #0 + 800e898: d065 beq.n 800e966 + 800e89a: 4b3b ldr r3, [pc, #236] ; (800e988 ) + 800e89c: 681b ldr r3, [r3, #0] + 800e89e: 687a ldr r2, [r7, #4] + 800e8a0: 429a cmp r2, r3 + 800e8a2: d860 bhi.n 800e966 { /* Traverse the list from the start (lowest address) block until one of adequate size is found. */ pxPreviousBlock = &xStart; - 800dc64: 4b39 ldr r3, [pc, #228] ; (800dd4c ) - 800dc66: 613b str r3, [r7, #16] + 800e8a4: 4b39 ldr r3, [pc, #228] ; (800e98c ) + 800e8a6: 613b str r3, [r7, #16] pxBlock = xStart.pxNextFreeBlock; - 800dc68: 4b38 ldr r3, [pc, #224] ; (800dd4c ) - 800dc6a: 681b ldr r3, [r3, #0] - 800dc6c: 617b str r3, [r7, #20] + 800e8a8: 4b38 ldr r3, [pc, #224] ; (800e98c ) + 800e8aa: 681b ldr r3, [r3, #0] + 800e8ac: 617b str r3, [r7, #20] while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) - 800dc6e: e004 b.n 800dc7a + 800e8ae: e004 b.n 800e8ba { pxPreviousBlock = pxBlock; - 800dc70: 697b ldr r3, [r7, #20] - 800dc72: 613b str r3, [r7, #16] + 800e8b0: 697b ldr r3, [r7, #20] + 800e8b2: 613b str r3, [r7, #16] pxBlock = pxBlock->pxNextFreeBlock; - 800dc74: 697b ldr r3, [r7, #20] - 800dc76: 681b ldr r3, [r3, #0] - 800dc78: 617b str r3, [r7, #20] + 800e8b4: 697b ldr r3, [r7, #20] + 800e8b6: 681b ldr r3, [r3, #0] + 800e8b8: 617b str r3, [r7, #20] while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) - 800dc7a: 697b ldr r3, [r7, #20] - 800dc7c: 685b ldr r3, [r3, #4] - 800dc7e: 687a ldr r2, [r7, #4] - 800dc80: 429a cmp r2, r3 - 800dc82: d903 bls.n 800dc8c - 800dc84: 697b ldr r3, [r7, #20] - 800dc86: 681b ldr r3, [r3, #0] - 800dc88: 2b00 cmp r3, #0 - 800dc8a: d1f1 bne.n 800dc70 + 800e8ba: 697b ldr r3, [r7, #20] + 800e8bc: 685b ldr r3, [r3, #4] + 800e8be: 687a ldr r2, [r7, #4] + 800e8c0: 429a cmp r2, r3 + 800e8c2: d903 bls.n 800e8cc + 800e8c4: 697b ldr r3, [r7, #20] + 800e8c6: 681b ldr r3, [r3, #0] + 800e8c8: 2b00 cmp r3, #0 + 800e8ca: d1f1 bne.n 800e8b0 } /* If the end marker was reached then a block of adequate size was not found. */ if( pxBlock != pxEnd ) - 800dc8c: 4b2c ldr r3, [pc, #176] ; (800dd40 ) - 800dc8e: 681b ldr r3, [r3, #0] - 800dc90: 697a ldr r2, [r7, #20] - 800dc92: 429a cmp r2, r3 - 800dc94: d047 beq.n 800dd26 + 800e8cc: 4b2c ldr r3, [pc, #176] ; (800e980 ) + 800e8ce: 681b ldr r3, [r3, #0] + 800e8d0: 697a ldr r2, [r7, #20] + 800e8d2: 429a cmp r2, r3 + 800e8d4: d047 beq.n 800e966 { /* Return the memory space pointed to - jumping over the BlockLink_t structure at its start. */ pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); - 800dc96: 693b ldr r3, [r7, #16] - 800dc98: 681b ldr r3, [r3, #0] - 800dc9a: 2208 movs r2, #8 - 800dc9c: 189b adds r3, r3, r2 - 800dc9e: 60fb str r3, [r7, #12] + 800e8d6: 693b ldr r3, [r7, #16] + 800e8d8: 681b ldr r3, [r3, #0] + 800e8da: 2208 movs r2, #8 + 800e8dc: 189b adds r3, r3, r2 + 800e8de: 60fb str r3, [r7, #12] /* This block is being returned for use so must be taken out of the list of free blocks. */ pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; - 800dca0: 697b ldr r3, [r7, #20] - 800dca2: 681a ldr r2, [r3, #0] - 800dca4: 693b ldr r3, [r7, #16] - 800dca6: 601a str r2, [r3, #0] + 800e8e0: 697b ldr r3, [r7, #20] + 800e8e2: 681a ldr r2, [r3, #0] + 800e8e4: 693b ldr r3, [r7, #16] + 800e8e6: 601a str r2, [r3, #0] /* If the block is larger than required it can be split into two. */ if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) - 800dca8: 697b ldr r3, [r7, #20] - 800dcaa: 685a ldr r2, [r3, #4] - 800dcac: 687b ldr r3, [r7, #4] - 800dcae: 1ad2 subs r2, r2, r3 - 800dcb0: 2308 movs r3, #8 - 800dcb2: 005b lsls r3, r3, #1 - 800dcb4: 429a cmp r2, r3 - 800dcb6: d916 bls.n 800dce6 + 800e8e8: 697b ldr r3, [r7, #20] + 800e8ea: 685a ldr r2, [r3, #4] + 800e8ec: 687b ldr r3, [r7, #4] + 800e8ee: 1ad2 subs r2, r2, r3 + 800e8f0: 2308 movs r3, #8 + 800e8f2: 005b lsls r3, r3, #1 + 800e8f4: 429a cmp r2, r3 + 800e8f6: d916 bls.n 800e926 { /* This block is to be split into two. Create a new block following the number of bytes requested. The void cast is used to prevent byte alignment warnings from the compiler. */ pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); - 800dcb8: 697a ldr r2, [r7, #20] - 800dcba: 687b ldr r3, [r7, #4] - 800dcbc: 18d3 adds r3, r2, r3 - 800dcbe: 60bb str r3, [r7, #8] + 800e8f8: 697a ldr r2, [r7, #20] + 800e8fa: 687b ldr r3, [r7, #4] + 800e8fc: 18d3 adds r3, r2, r3 + 800e8fe: 60bb str r3, [r7, #8] configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 ); - 800dcc0: 68bb ldr r3, [r7, #8] - 800dcc2: 2207 movs r2, #7 - 800dcc4: 4013 ands r3, r2 - 800dcc6: d001 beq.n 800dccc - 800dcc8: b672 cpsid i - 800dcca: e7fe b.n 800dcca + 800e900: 68bb ldr r3, [r7, #8] + 800e902: 2207 movs r2, #7 + 800e904: 4013 ands r3, r2 + 800e906: d001 beq.n 800e90c + 800e908: b672 cpsid i + 800e90a: e7fe b.n 800e90a /* Calculate the sizes of two blocks split from the single block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - 800dccc: 697b ldr r3, [r7, #20] - 800dcce: 685a ldr r2, [r3, #4] - 800dcd0: 687b ldr r3, [r7, #4] - 800dcd2: 1ad2 subs r2, r2, r3 - 800dcd4: 68bb ldr r3, [r7, #8] - 800dcd6: 605a str r2, [r3, #4] + 800e90c: 697b ldr r3, [r7, #20] + 800e90e: 685a ldr r2, [r3, #4] + 800e910: 687b ldr r3, [r7, #4] + 800e912: 1ad2 subs r2, r2, r3 + 800e914: 68bb ldr r3, [r7, #8] + 800e916: 605a str r2, [r3, #4] pxBlock->xBlockSize = xWantedSize; - 800dcd8: 697b ldr r3, [r7, #20] - 800dcda: 687a ldr r2, [r7, #4] - 800dcdc: 605a str r2, [r3, #4] + 800e918: 697b ldr r3, [r7, #20] + 800e91a: 687a ldr r2, [r7, #4] + 800e91c: 605a str r2, [r3, #4] /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); - 800dcde: 68bb ldr r3, [r7, #8] - 800dce0: 0018 movs r0, r3 - 800dce2: f000 f8e7 bl 800deb4 + 800e91e: 68bb ldr r3, [r7, #8] + 800e920: 0018 movs r0, r3 + 800e922: f000 f8e7 bl 800eaf4 else { mtCOVERAGE_TEST_MARKER(); } xFreeBytesRemaining -= pxBlock->xBlockSize; - 800dce6: 4b18 ldr r3, [pc, #96] ; (800dd48 ) - 800dce8: 681a ldr r2, [r3, #0] - 800dcea: 697b ldr r3, [r7, #20] - 800dcec: 685b ldr r3, [r3, #4] - 800dcee: 1ad2 subs r2, r2, r3 - 800dcf0: 4b15 ldr r3, [pc, #84] ; (800dd48 ) - 800dcf2: 601a str r2, [r3, #0] + 800e926: 4b18 ldr r3, [pc, #96] ; (800e988 ) + 800e928: 681a ldr r2, [r3, #0] + 800e92a: 697b ldr r3, [r7, #20] + 800e92c: 685b ldr r3, [r3, #4] + 800e92e: 1ad2 subs r2, r2, r3 + 800e930: 4b15 ldr r3, [pc, #84] ; (800e988 ) + 800e932: 601a str r2, [r3, #0] if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) - 800dcf4: 4b14 ldr r3, [pc, #80] ; (800dd48 ) - 800dcf6: 681a ldr r2, [r3, #0] - 800dcf8: 4b15 ldr r3, [pc, #84] ; (800dd50 ) - 800dcfa: 681b ldr r3, [r3, #0] - 800dcfc: 429a cmp r2, r3 - 800dcfe: d203 bcs.n 800dd08 + 800e934: 4b14 ldr r3, [pc, #80] ; (800e988 ) + 800e936: 681a ldr r2, [r3, #0] + 800e938: 4b15 ldr r3, [pc, #84] ; (800e990 ) + 800e93a: 681b ldr r3, [r3, #0] + 800e93c: 429a cmp r2, r3 + 800e93e: d203 bcs.n 800e948 { xMinimumEverFreeBytesRemaining = xFreeBytesRemaining; - 800dd00: 4b11 ldr r3, [pc, #68] ; (800dd48 ) - 800dd02: 681a ldr r2, [r3, #0] - 800dd04: 4b12 ldr r3, [pc, #72] ; (800dd50 ) - 800dd06: 601a str r2, [r3, #0] + 800e940: 4b11 ldr r3, [pc, #68] ; (800e988 ) + 800e942: 681a ldr r2, [r3, #0] + 800e944: 4b12 ldr r3, [pc, #72] ; (800e990 ) + 800e946: 601a str r2, [r3, #0] mtCOVERAGE_TEST_MARKER(); } /* The block is being returned - it is allocated and owned by the application and has no "next" block. */ pxBlock->xBlockSize |= xBlockAllocatedBit; - 800dd08: 697b ldr r3, [r7, #20] - 800dd0a: 685a ldr r2, [r3, #4] - 800dd0c: 4b0d ldr r3, [pc, #52] ; (800dd44 ) - 800dd0e: 681b ldr r3, [r3, #0] - 800dd10: 431a orrs r2, r3 - 800dd12: 697b ldr r3, [r7, #20] - 800dd14: 605a str r2, [r3, #4] + 800e948: 697b ldr r3, [r7, #20] + 800e94a: 685a ldr r2, [r3, #4] + 800e94c: 4b0d ldr r3, [pc, #52] ; (800e984 ) + 800e94e: 681b ldr r3, [r3, #0] + 800e950: 431a orrs r2, r3 + 800e952: 697b ldr r3, [r7, #20] + 800e954: 605a str r2, [r3, #4] pxBlock->pxNextFreeBlock = NULL; - 800dd16: 697b ldr r3, [r7, #20] - 800dd18: 2200 movs r2, #0 - 800dd1a: 601a str r2, [r3, #0] + 800e956: 697b ldr r3, [r7, #20] + 800e958: 2200 movs r2, #0 + 800e95a: 601a str r2, [r3, #0] xNumberOfSuccessfulAllocations++; - 800dd1c: 4b0d ldr r3, [pc, #52] ; (800dd54 ) - 800dd1e: 681b ldr r3, [r3, #0] - 800dd20: 1c5a adds r2, r3, #1 - 800dd22: 4b0c ldr r3, [pc, #48] ; (800dd54 ) - 800dd24: 601a str r2, [r3, #0] + 800e95c: 4b0d ldr r3, [pc, #52] ; (800e994 ) + 800e95e: 681b ldr r3, [r3, #0] + 800e960: 1c5a adds r2, r3, #1 + 800e962: 4b0c ldr r3, [pc, #48] ; (800e994 ) + 800e964: 601a str r2, [r3, #0] mtCOVERAGE_TEST_MARKER(); } traceMALLOC( pvReturn, xWantedSize ); } ( void ) xTaskResumeAll(); - 800dd26: f7fe fd25 bl 800c774 + 800e966: f7fe fd27 bl 800d3b8 mtCOVERAGE_TEST_MARKER(); } } #endif configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 ); - 800dd2a: 68fb ldr r3, [r7, #12] - 800dd2c: 2207 movs r2, #7 - 800dd2e: 4013 ands r3, r2 - 800dd30: d001 beq.n 800dd36 - 800dd32: b672 cpsid i - 800dd34: e7fe b.n 800dd34 + 800e96a: 68fb ldr r3, [r7, #12] + 800e96c: 2207 movs r2, #7 + 800e96e: 4013 ands r3, r2 + 800e970: d001 beq.n 800e976 + 800e972: b672 cpsid i + 800e974: e7fe b.n 800e974 return pvReturn; - 800dd36: 68fb ldr r3, [r7, #12] + 800e976: 68fb ldr r3, [r7, #12] } - 800dd38: 0018 movs r0, r3 - 800dd3a: 46bd mov sp, r7 - 800dd3c: b006 add sp, #24 - 800dd3e: bd80 pop {r7, pc} - 800dd40: 20002938 .word 0x20002938 - 800dd44: 2000294c .word 0x2000294c - 800dd48: 2000293c .word 0x2000293c - 800dd4c: 20002930 .word 0x20002930 - 800dd50: 20002940 .word 0x20002940 - 800dd54: 20002944 .word 0x20002944 + 800e978: 0018 movs r0, r3 + 800e97a: 46bd mov sp, r7 + 800e97c: b006 add sp, #24 + 800e97e: bd80 pop {r7, pc} + 800e980: 20002a18 .word 0x20002a18 + 800e984: 20002a2c .word 0x20002a2c + 800e988: 20002a1c .word 0x20002a1c + 800e98c: 20002a10 .word 0x20002a10 + 800e990: 20002a20 .word 0x20002a20 + 800e994: 20002a24 .word 0x20002a24 -0800dd58 : +0800e998 : /*-----------------------------------------------------------*/ void vPortFree( void *pv ) { - 800dd58: b580 push {r7, lr} - 800dd5a: b084 sub sp, #16 - 800dd5c: af00 add r7, sp, #0 - 800dd5e: 6078 str r0, [r7, #4] + 800e998: b580 push {r7, lr} + 800e99a: b084 sub sp, #16 + 800e99c: af00 add r7, sp, #0 + 800e99e: 6078 str r0, [r7, #4] uint8_t *puc = ( uint8_t * ) pv; - 800dd60: 687b ldr r3, [r7, #4] - 800dd62: 60fb str r3, [r7, #12] + 800e9a0: 687b ldr r3, [r7, #4] + 800e9a2: 60fb str r3, [r7, #12] BlockLink_t *pxLink; if( pv != NULL ) - 800dd64: 687b ldr r3, [r7, #4] - 800dd66: 2b00 cmp r3, #0 - 800dd68: d03a beq.n 800dde0 + 800e9a4: 687b ldr r3, [r7, #4] + 800e9a6: 2b00 cmp r3, #0 + 800e9a8: d03a beq.n 800ea20 { /* The memory being freed will have an BlockLink_t structure immediately before it. */ puc -= xHeapStructSize; - 800dd6a: 2308 movs r3, #8 - 800dd6c: 425b negs r3, r3 - 800dd6e: 68fa ldr r2, [r7, #12] - 800dd70: 18d3 adds r3, r2, r3 - 800dd72: 60fb str r3, [r7, #12] + 800e9aa: 2308 movs r3, #8 + 800e9ac: 425b negs r3, r3 + 800e9ae: 68fa ldr r2, [r7, #12] + 800e9b0: 18d3 adds r3, r2, r3 + 800e9b2: 60fb str r3, [r7, #12] /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; - 800dd74: 68fb ldr r3, [r7, #12] - 800dd76: 60bb str r3, [r7, #8] + 800e9b4: 68fb ldr r3, [r7, #12] + 800e9b6: 60bb str r3, [r7, #8] /* Check the block is actually allocated. */ configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ); - 800dd78: 68bb ldr r3, [r7, #8] - 800dd7a: 685a ldr r2, [r3, #4] - 800dd7c: 4b1a ldr r3, [pc, #104] ; (800dde8 ) - 800dd7e: 681b ldr r3, [r3, #0] - 800dd80: 4013 ands r3, r2 - 800dd82: d101 bne.n 800dd88 - 800dd84: b672 cpsid i - 800dd86: e7fe b.n 800dd86 + 800e9b8: 68bb ldr r3, [r7, #8] + 800e9ba: 685a ldr r2, [r3, #4] + 800e9bc: 4b1a ldr r3, [pc, #104] ; (800ea28 ) + 800e9be: 681b ldr r3, [r3, #0] + 800e9c0: 4013 ands r3, r2 + 800e9c2: d101 bne.n 800e9c8 + 800e9c4: b672 cpsid i + 800e9c6: e7fe b.n 800e9c6 configASSERT( pxLink->pxNextFreeBlock == NULL ); - 800dd88: 68bb ldr r3, [r7, #8] - 800dd8a: 681b ldr r3, [r3, #0] - 800dd8c: 2b00 cmp r3, #0 - 800dd8e: d001 beq.n 800dd94 - 800dd90: b672 cpsid i - 800dd92: e7fe b.n 800dd92 + 800e9c8: 68bb ldr r3, [r7, #8] + 800e9ca: 681b ldr r3, [r3, #0] + 800e9cc: 2b00 cmp r3, #0 + 800e9ce: d001 beq.n 800e9d4 + 800e9d0: b672 cpsid i + 800e9d2: e7fe b.n 800e9d2 if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ) - 800dd94: 68bb ldr r3, [r7, #8] - 800dd96: 685a ldr r2, [r3, #4] - 800dd98: 4b13 ldr r3, [pc, #76] ; (800dde8 ) - 800dd9a: 681b ldr r3, [r3, #0] - 800dd9c: 4013 ands r3, r2 - 800dd9e: d01f beq.n 800dde0 + 800e9d4: 68bb ldr r3, [r7, #8] + 800e9d6: 685a ldr r2, [r3, #4] + 800e9d8: 4b13 ldr r3, [pc, #76] ; (800ea28 ) + 800e9da: 681b ldr r3, [r3, #0] + 800e9dc: 4013 ands r3, r2 + 800e9de: d01f beq.n 800ea20 { if( pxLink->pxNextFreeBlock == NULL ) - 800dda0: 68bb ldr r3, [r7, #8] - 800dda2: 681b ldr r3, [r3, #0] - 800dda4: 2b00 cmp r3, #0 - 800dda6: d11b bne.n 800dde0 + 800e9e0: 68bb ldr r3, [r7, #8] + 800e9e2: 681b ldr r3, [r3, #0] + 800e9e4: 2b00 cmp r3, #0 + 800e9e6: d11b bne.n 800ea20 { /* The block is being returned to the heap - it is no longer allocated. */ pxLink->xBlockSize &= ~xBlockAllocatedBit; - 800dda8: 68bb ldr r3, [r7, #8] - 800ddaa: 685a ldr r2, [r3, #4] - 800ddac: 4b0e ldr r3, [pc, #56] ; (800dde8 ) - 800ddae: 681b ldr r3, [r3, #0] - 800ddb0: 43db mvns r3, r3 - 800ddb2: 401a ands r2, r3 - 800ddb4: 68bb ldr r3, [r7, #8] - 800ddb6: 605a str r2, [r3, #4] + 800e9e8: 68bb ldr r3, [r7, #8] + 800e9ea: 685a ldr r2, [r3, #4] + 800e9ec: 4b0e ldr r3, [pc, #56] ; (800ea28 ) + 800e9ee: 681b ldr r3, [r3, #0] + 800e9f0: 43db mvns r3, r3 + 800e9f2: 401a ands r2, r3 + 800e9f4: 68bb ldr r3, [r7, #8] + 800e9f6: 605a str r2, [r3, #4] vTaskSuspendAll(); - 800ddb8: f7fe fcd0 bl 800c75c + 800e9f8: f7fe fcd2 bl 800d3a0 { /* Add this block to the list of free blocks. */ xFreeBytesRemaining += pxLink->xBlockSize; - 800ddbc: 68bb ldr r3, [r7, #8] - 800ddbe: 685a ldr r2, [r3, #4] - 800ddc0: 4b0a ldr r3, [pc, #40] ; (800ddec ) - 800ddc2: 681b ldr r3, [r3, #0] - 800ddc4: 18d2 adds r2, r2, r3 - 800ddc6: 4b09 ldr r3, [pc, #36] ; (800ddec ) - 800ddc8: 601a str r2, [r3, #0] + 800e9fc: 68bb ldr r3, [r7, #8] + 800e9fe: 685a ldr r2, [r3, #4] + 800ea00: 4b0a ldr r3, [pc, #40] ; (800ea2c ) + 800ea02: 681b ldr r3, [r3, #0] + 800ea04: 18d2 adds r2, r2, r3 + 800ea06: 4b09 ldr r3, [pc, #36] ; (800ea2c ) + 800ea08: 601a str r2, [r3, #0] traceFREE( pv, pxLink->xBlockSize ); prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); - 800ddca: 68bb ldr r3, [r7, #8] - 800ddcc: 0018 movs r0, r3 - 800ddce: f000 f871 bl 800deb4 + 800ea0a: 68bb ldr r3, [r7, #8] + 800ea0c: 0018 movs r0, r3 + 800ea0e: f000 f871 bl 800eaf4 xNumberOfSuccessfulFrees++; - 800ddd2: 4b07 ldr r3, [pc, #28] ; (800ddf0 ) - 800ddd4: 681b ldr r3, [r3, #0] - 800ddd6: 1c5a adds r2, r3, #1 - 800ddd8: 4b05 ldr r3, [pc, #20] ; (800ddf0 ) - 800ddda: 601a str r2, [r3, #0] + 800ea12: 4b07 ldr r3, [pc, #28] ; (800ea30 ) + 800ea14: 681b ldr r3, [r3, #0] + 800ea16: 1c5a adds r2, r3, #1 + 800ea18: 4b05 ldr r3, [pc, #20] ; (800ea30 ) + 800ea1a: 601a str r2, [r3, #0] } ( void ) xTaskResumeAll(); - 800dddc: f7fe fcca bl 800c774 + 800ea1c: f7fe fccc bl 800d3b8 else { mtCOVERAGE_TEST_MARKER(); } } } - 800dde0: 46c0 nop ; (mov r8, r8) - 800dde2: 46bd mov sp, r7 - 800dde4: b004 add sp, #16 - 800dde6: bd80 pop {r7, pc} - 800dde8: 2000294c .word 0x2000294c - 800ddec: 2000293c .word 0x2000293c - 800ddf0: 20002948 .word 0x20002948 + 800ea20: 46c0 nop ; (mov r8, r8) + 800ea22: 46bd mov sp, r7 + 800ea24: b004 add sp, #16 + 800ea26: bd80 pop {r7, pc} + 800ea28: 20002a2c .word 0x20002a2c + 800ea2c: 20002a1c .word 0x20002a1c + 800ea30: 20002a28 .word 0x20002a28 -0800ddf4 : +0800ea34 : /* This just exists to keep the linker quiet. */ } /*-----------------------------------------------------------*/ static void prvHeapInit( void ) { - 800ddf4: b580 push {r7, lr} - 800ddf6: b084 sub sp, #16 - 800ddf8: af00 add r7, sp, #0 + 800ea34: b580 push {r7, lr} + 800ea36: b084 sub sp, #16 + 800ea38: af00 add r7, sp, #0 BlockLink_t *pxFirstFreeBlock; uint8_t *pucAlignedHeap; size_t uxAddress; size_t xTotalHeapSize = configTOTAL_HEAP_SIZE; - 800ddfa: 23c0 movs r3, #192 ; 0xc0 - 800ddfc: 015b lsls r3, r3, #5 - 800ddfe: 60bb str r3, [r7, #8] + 800ea3a: 23c0 movs r3, #192 ; 0xc0 + 800ea3c: 015b lsls r3, r3, #5 + 800ea3e: 60bb str r3, [r7, #8] /* Ensure the heap starts on a correctly aligned boundary. */ uxAddress = ( size_t ) ucHeap; - 800de00: 4b26 ldr r3, [pc, #152] ; (800de9c ) - 800de02: 60fb str r3, [r7, #12] + 800ea40: 4b26 ldr r3, [pc, #152] ; (800eadc ) + 800ea42: 60fb str r3, [r7, #12] if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) - 800de04: 68fb ldr r3, [r7, #12] - 800de06: 2207 movs r2, #7 - 800de08: 4013 ands r3, r2 - 800de0a: d00c beq.n 800de26 + 800ea44: 68fb ldr r3, [r7, #12] + 800ea46: 2207 movs r2, #7 + 800ea48: 4013 ands r3, r2 + 800ea4a: d00c beq.n 800ea66 { uxAddress += ( portBYTE_ALIGNMENT - 1 ); - 800de0c: 68fb ldr r3, [r7, #12] - 800de0e: 3307 adds r3, #7 - 800de10: 60fb str r3, [r7, #12] + 800ea4c: 68fb ldr r3, [r7, #12] + 800ea4e: 3307 adds r3, #7 + 800ea50: 60fb str r3, [r7, #12] uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); - 800de12: 68fb ldr r3, [r7, #12] - 800de14: 2207 movs r2, #7 - 800de16: 4393 bics r3, r2 - 800de18: 60fb str r3, [r7, #12] + 800ea52: 68fb ldr r3, [r7, #12] + 800ea54: 2207 movs r2, #7 + 800ea56: 4393 bics r3, r2 + 800ea58: 60fb str r3, [r7, #12] xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; - 800de1a: 68ba ldr r2, [r7, #8] - 800de1c: 68fb ldr r3, [r7, #12] - 800de1e: 1ad2 subs r2, r2, r3 - 800de20: 4b1e ldr r3, [pc, #120] ; (800de9c ) - 800de22: 18d3 adds r3, r2, r3 - 800de24: 60bb str r3, [r7, #8] + 800ea5a: 68ba ldr r2, [r7, #8] + 800ea5c: 68fb ldr r3, [r7, #12] + 800ea5e: 1ad2 subs r2, r2, r3 + 800ea60: 4b1e ldr r3, [pc, #120] ; (800eadc ) + 800ea62: 18d3 adds r3, r2, r3 + 800ea64: 60bb str r3, [r7, #8] } pucAlignedHeap = ( uint8_t * ) uxAddress; - 800de26: 68fb ldr r3, [r7, #12] - 800de28: 607b str r3, [r7, #4] + 800ea66: 68fb ldr r3, [r7, #12] + 800ea68: 607b str r3, [r7, #4] /* xStart is used to hold a pointer to the first item in the list of free blocks. The void cast is used to prevent compiler warnings. */ xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; - 800de2a: 4b1d ldr r3, [pc, #116] ; (800dea0 ) - 800de2c: 687a ldr r2, [r7, #4] - 800de2e: 601a str r2, [r3, #0] + 800ea6a: 4b1d ldr r3, [pc, #116] ; (800eae0 ) + 800ea6c: 687a ldr r2, [r7, #4] + 800ea6e: 601a str r2, [r3, #0] xStart.xBlockSize = ( size_t ) 0; - 800de30: 4b1b ldr r3, [pc, #108] ; (800dea0 ) - 800de32: 2200 movs r2, #0 - 800de34: 605a str r2, [r3, #4] + 800ea70: 4b1b ldr r3, [pc, #108] ; (800eae0 ) + 800ea72: 2200 movs r2, #0 + 800ea74: 605a str r2, [r3, #4] /* pxEnd is used to mark the end of the list of free blocks and is inserted at the end of the heap space. */ uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; - 800de36: 687b ldr r3, [r7, #4] - 800de38: 68ba ldr r2, [r7, #8] - 800de3a: 18d3 adds r3, r2, r3 - 800de3c: 60fb str r3, [r7, #12] + 800ea76: 687b ldr r3, [r7, #4] + 800ea78: 68ba ldr r2, [r7, #8] + 800ea7a: 18d3 adds r3, r2, r3 + 800ea7c: 60fb str r3, [r7, #12] uxAddress -= xHeapStructSize; - 800de3e: 2208 movs r2, #8 - 800de40: 68fb ldr r3, [r7, #12] - 800de42: 1a9b subs r3, r3, r2 - 800de44: 60fb str r3, [r7, #12] + 800ea7e: 2208 movs r2, #8 + 800ea80: 68fb ldr r3, [r7, #12] + 800ea82: 1a9b subs r3, r3, r2 + 800ea84: 60fb str r3, [r7, #12] uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); - 800de46: 68fb ldr r3, [r7, #12] - 800de48: 2207 movs r2, #7 - 800de4a: 4393 bics r3, r2 - 800de4c: 60fb str r3, [r7, #12] + 800ea86: 68fb ldr r3, [r7, #12] + 800ea88: 2207 movs r2, #7 + 800ea8a: 4393 bics r3, r2 + 800ea8c: 60fb str r3, [r7, #12] pxEnd = ( void * ) uxAddress; - 800de4e: 68fa ldr r2, [r7, #12] - 800de50: 4b14 ldr r3, [pc, #80] ; (800dea4 ) - 800de52: 601a str r2, [r3, #0] + 800ea8e: 68fa ldr r2, [r7, #12] + 800ea90: 4b14 ldr r3, [pc, #80] ; (800eae4 ) + 800ea92: 601a str r2, [r3, #0] pxEnd->xBlockSize = 0; - 800de54: 4b13 ldr r3, [pc, #76] ; (800dea4 ) - 800de56: 681b ldr r3, [r3, #0] - 800de58: 2200 movs r2, #0 - 800de5a: 605a str r2, [r3, #4] + 800ea94: 4b13 ldr r3, [pc, #76] ; (800eae4 ) + 800ea96: 681b ldr r3, [r3, #0] + 800ea98: 2200 movs r2, #0 + 800ea9a: 605a str r2, [r3, #4] pxEnd->pxNextFreeBlock = NULL; - 800de5c: 4b11 ldr r3, [pc, #68] ; (800dea4 ) - 800de5e: 681b ldr r3, [r3, #0] - 800de60: 2200 movs r2, #0 - 800de62: 601a str r2, [r3, #0] + 800ea9c: 4b11 ldr r3, [pc, #68] ; (800eae4 ) + 800ea9e: 681b ldr r3, [r3, #0] + 800eaa0: 2200 movs r2, #0 + 800eaa2: 601a str r2, [r3, #0] /* To start with there is a single free block that is sized to take up the entire heap space, minus the space taken by pxEnd. */ pxFirstFreeBlock = ( void * ) pucAlignedHeap; - 800de64: 687b ldr r3, [r7, #4] - 800de66: 603b str r3, [r7, #0] + 800eaa4: 687b ldr r3, [r7, #4] + 800eaa6: 603b str r3, [r7, #0] pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; - 800de68: 683b ldr r3, [r7, #0] - 800de6a: 68fa ldr r2, [r7, #12] - 800de6c: 1ad2 subs r2, r2, r3 - 800de6e: 683b ldr r3, [r7, #0] - 800de70: 605a str r2, [r3, #4] + 800eaa8: 683b ldr r3, [r7, #0] + 800eaaa: 68fa ldr r2, [r7, #12] + 800eaac: 1ad2 subs r2, r2, r3 + 800eaae: 683b ldr r3, [r7, #0] + 800eab0: 605a str r2, [r3, #4] pxFirstFreeBlock->pxNextFreeBlock = pxEnd; - 800de72: 4b0c ldr r3, [pc, #48] ; (800dea4 ) - 800de74: 681a ldr r2, [r3, #0] - 800de76: 683b ldr r3, [r7, #0] - 800de78: 601a str r2, [r3, #0] + 800eab2: 4b0c ldr r3, [pc, #48] ; (800eae4 ) + 800eab4: 681a ldr r2, [r3, #0] + 800eab6: 683b ldr r3, [r7, #0] + 800eab8: 601a str r2, [r3, #0] /* Only one block exists - and it covers the entire usable heap space. */ xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; - 800de7a: 683b ldr r3, [r7, #0] - 800de7c: 685a ldr r2, [r3, #4] - 800de7e: 4b0a ldr r3, [pc, #40] ; (800dea8 ) - 800de80: 601a str r2, [r3, #0] + 800eaba: 683b ldr r3, [r7, #0] + 800eabc: 685a ldr r2, [r3, #4] + 800eabe: 4b0a ldr r3, [pc, #40] ; (800eae8 ) + 800eac0: 601a str r2, [r3, #0] xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; - 800de82: 683b ldr r3, [r7, #0] - 800de84: 685a ldr r2, [r3, #4] - 800de86: 4b09 ldr r3, [pc, #36] ; (800deac ) - 800de88: 601a str r2, [r3, #0] + 800eac2: 683b ldr r3, [r7, #0] + 800eac4: 685a ldr r2, [r3, #4] + 800eac6: 4b09 ldr r3, [pc, #36] ; (800eaec ) + 800eac8: 601a str r2, [r3, #0] /* Work out the position of the top bit in a size_t variable. */ xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); - 800de8a: 4b09 ldr r3, [pc, #36] ; (800deb0 ) - 800de8c: 2280 movs r2, #128 ; 0x80 - 800de8e: 0612 lsls r2, r2, #24 - 800de90: 601a str r2, [r3, #0] + 800eaca: 4b09 ldr r3, [pc, #36] ; (800eaf0 ) + 800eacc: 2280 movs r2, #128 ; 0x80 + 800eace: 0612 lsls r2, r2, #24 + 800ead0: 601a str r2, [r3, #0] } - 800de92: 46c0 nop ; (mov r8, r8) - 800de94: 46bd mov sp, r7 - 800de96: b004 add sp, #16 - 800de98: bd80 pop {r7, pc} - 800de9a: 46c0 nop ; (mov r8, r8) - 800de9c: 20001130 .word 0x20001130 - 800dea0: 20002930 .word 0x20002930 - 800dea4: 20002938 .word 0x20002938 - 800dea8: 20002940 .word 0x20002940 - 800deac: 2000293c .word 0x2000293c - 800deb0: 2000294c .word 0x2000294c + 800ead2: 46c0 nop ; (mov r8, r8) + 800ead4: 46bd mov sp, r7 + 800ead6: b004 add sp, #16 + 800ead8: bd80 pop {r7, pc} + 800eada: 46c0 nop ; (mov r8, r8) + 800eadc: 20001210 .word 0x20001210 + 800eae0: 20002a10 .word 0x20002a10 + 800eae4: 20002a18 .word 0x20002a18 + 800eae8: 20002a20 .word 0x20002a20 + 800eaec: 20002a1c .word 0x20002a1c + 800eaf0: 20002a2c .word 0x20002a2c -0800deb4 : +0800eaf4 : /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ) { - 800deb4: b580 push {r7, lr} - 800deb6: b084 sub sp, #16 - 800deb8: af00 add r7, sp, #0 - 800deba: 6078 str r0, [r7, #4] + 800eaf4: b580 push {r7, lr} + 800eaf6: b084 sub sp, #16 + 800eaf8: af00 add r7, sp, #0 + 800eafa: 6078 str r0, [r7, #4] BlockLink_t *pxIterator; uint8_t *puc; /* Iterate through the list until a block is found that has a higher address than the block being inserted. */ for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock ) - 800debc: 4b27 ldr r3, [pc, #156] ; (800df5c ) - 800debe: 60fb str r3, [r7, #12] - 800dec0: e002 b.n 800dec8 - 800dec2: 68fb ldr r3, [r7, #12] - 800dec4: 681b ldr r3, [r3, #0] - 800dec6: 60fb str r3, [r7, #12] - 800dec8: 68fb ldr r3, [r7, #12] - 800deca: 681b ldr r3, [r3, #0] - 800decc: 687a ldr r2, [r7, #4] - 800dece: 429a cmp r2, r3 - 800ded0: d8f7 bhi.n 800dec2 + 800eafc: 4b27 ldr r3, [pc, #156] ; (800eb9c ) + 800eafe: 60fb str r3, [r7, #12] + 800eb00: e002 b.n 800eb08 + 800eb02: 68fb ldr r3, [r7, #12] + 800eb04: 681b ldr r3, [r3, #0] + 800eb06: 60fb str r3, [r7, #12] + 800eb08: 68fb ldr r3, [r7, #12] + 800eb0a: 681b ldr r3, [r3, #0] + 800eb0c: 687a ldr r2, [r7, #4] + 800eb0e: 429a cmp r2, r3 + 800eb10: d8f7 bhi.n 800eb02 /* Nothing to do here, just iterate to the right position. */ } /* Do the block being inserted, and the block it is being inserted after make a contiguous block of memory? */ puc = ( uint8_t * ) pxIterator; - 800ded2: 68fb ldr r3, [r7, #12] - 800ded4: 60bb str r3, [r7, #8] + 800eb12: 68fb ldr r3, [r7, #12] + 800eb14: 60bb str r3, [r7, #8] if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) - 800ded6: 68fb ldr r3, [r7, #12] - 800ded8: 685b ldr r3, [r3, #4] - 800deda: 68ba ldr r2, [r7, #8] - 800dedc: 18d3 adds r3, r2, r3 - 800dede: 687a ldr r2, [r7, #4] - 800dee0: 429a cmp r2, r3 - 800dee2: d108 bne.n 800def6 + 800eb16: 68fb ldr r3, [r7, #12] + 800eb18: 685b ldr r3, [r3, #4] + 800eb1a: 68ba ldr r2, [r7, #8] + 800eb1c: 18d3 adds r3, r2, r3 + 800eb1e: 687a ldr r2, [r7, #4] + 800eb20: 429a cmp r2, r3 + 800eb22: d108 bne.n 800eb36 { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; - 800dee4: 68fb ldr r3, [r7, #12] - 800dee6: 685a ldr r2, [r3, #4] - 800dee8: 687b ldr r3, [r7, #4] - 800deea: 685b ldr r3, [r3, #4] - 800deec: 18d2 adds r2, r2, r3 - 800deee: 68fb ldr r3, [r7, #12] - 800def0: 605a str r2, [r3, #4] + 800eb24: 68fb ldr r3, [r7, #12] + 800eb26: 685a ldr r2, [r3, #4] + 800eb28: 687b ldr r3, [r7, #4] + 800eb2a: 685b ldr r3, [r3, #4] + 800eb2c: 18d2 adds r2, r2, r3 + 800eb2e: 68fb ldr r3, [r7, #12] + 800eb30: 605a str r2, [r3, #4] pxBlockToInsert = pxIterator; - 800def2: 68fb ldr r3, [r7, #12] - 800def4: 607b str r3, [r7, #4] + 800eb32: 68fb ldr r3, [r7, #12] + 800eb34: 607b str r3, [r7, #4] mtCOVERAGE_TEST_MARKER(); } /* Do the block being inserted, and the block it is being inserted before make a contiguous block of memory? */ puc = ( uint8_t * ) pxBlockToInsert; - 800def6: 687b ldr r3, [r7, #4] - 800def8: 60bb str r3, [r7, #8] + 800eb36: 687b ldr r3, [r7, #4] + 800eb38: 60bb str r3, [r7, #8] if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock ) - 800defa: 687b ldr r3, [r7, #4] - 800defc: 685b ldr r3, [r3, #4] - 800defe: 68ba ldr r2, [r7, #8] - 800df00: 18d2 adds r2, r2, r3 - 800df02: 68fb ldr r3, [r7, #12] - 800df04: 681b ldr r3, [r3, #0] - 800df06: 429a cmp r2, r3 - 800df08: d118 bne.n 800df3c + 800eb3a: 687b ldr r3, [r7, #4] + 800eb3c: 685b ldr r3, [r3, #4] + 800eb3e: 68ba ldr r2, [r7, #8] + 800eb40: 18d2 adds r2, r2, r3 + 800eb42: 68fb ldr r3, [r7, #12] + 800eb44: 681b ldr r3, [r3, #0] + 800eb46: 429a cmp r2, r3 + 800eb48: d118 bne.n 800eb7c { if( pxIterator->pxNextFreeBlock != pxEnd ) - 800df0a: 68fb ldr r3, [r7, #12] - 800df0c: 681a ldr r2, [r3, #0] - 800df0e: 4b14 ldr r3, [pc, #80] ; (800df60 ) - 800df10: 681b ldr r3, [r3, #0] - 800df12: 429a cmp r2, r3 - 800df14: d00d beq.n 800df32 + 800eb4a: 68fb ldr r3, [r7, #12] + 800eb4c: 681a ldr r2, [r3, #0] + 800eb4e: 4b14 ldr r3, [pc, #80] ; (800eba0 ) + 800eb50: 681b ldr r3, [r3, #0] + 800eb52: 429a cmp r2, r3 + 800eb54: d00d beq.n 800eb72 { /* Form one big block from the two blocks. */ pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; - 800df16: 687b ldr r3, [r7, #4] - 800df18: 685a ldr r2, [r3, #4] - 800df1a: 68fb ldr r3, [r7, #12] - 800df1c: 681b ldr r3, [r3, #0] - 800df1e: 685b ldr r3, [r3, #4] - 800df20: 18d2 adds r2, r2, r3 - 800df22: 687b ldr r3, [r7, #4] - 800df24: 605a str r2, [r3, #4] + 800eb56: 687b ldr r3, [r7, #4] + 800eb58: 685a ldr r2, [r3, #4] + 800eb5a: 68fb ldr r3, [r7, #12] + 800eb5c: 681b ldr r3, [r3, #0] + 800eb5e: 685b ldr r3, [r3, #4] + 800eb60: 18d2 adds r2, r2, r3 + 800eb62: 687b ldr r3, [r7, #4] + 800eb64: 605a str r2, [r3, #4] pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; - 800df26: 68fb ldr r3, [r7, #12] - 800df28: 681b ldr r3, [r3, #0] - 800df2a: 681a ldr r2, [r3, #0] - 800df2c: 687b ldr r3, [r7, #4] - 800df2e: 601a str r2, [r3, #0] - 800df30: e008 b.n 800df44 + 800eb66: 68fb ldr r3, [r7, #12] + 800eb68: 681b ldr r3, [r3, #0] + 800eb6a: 681a ldr r2, [r3, #0] + 800eb6c: 687b ldr r3, [r7, #4] + 800eb6e: 601a str r2, [r3, #0] + 800eb70: e008 b.n 800eb84 } else { pxBlockToInsert->pxNextFreeBlock = pxEnd; - 800df32: 4b0b ldr r3, [pc, #44] ; (800df60 ) - 800df34: 681a ldr r2, [r3, #0] - 800df36: 687b ldr r3, [r7, #4] - 800df38: 601a str r2, [r3, #0] - 800df3a: e003 b.n 800df44 + 800eb72: 4b0b ldr r3, [pc, #44] ; (800eba0 ) + 800eb74: 681a ldr r2, [r3, #0] + 800eb76: 687b ldr r3, [r7, #4] + 800eb78: 601a str r2, [r3, #0] + 800eb7a: e003 b.n 800eb84 } } else { pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; - 800df3c: 68fb ldr r3, [r7, #12] - 800df3e: 681a ldr r2, [r3, #0] - 800df40: 687b ldr r3, [r7, #4] - 800df42: 601a str r2, [r3, #0] + 800eb7c: 68fb ldr r3, [r7, #12] + 800eb7e: 681a ldr r2, [r3, #0] + 800eb80: 687b ldr r3, [r7, #4] + 800eb82: 601a str r2, [r3, #0] /* If the block being inserted plugged a gab, so was merged with the block before and the block after, then it's pxNextFreeBlock pointer will have already been set, and should not be set here as that would make it point to itself. */ if( pxIterator != pxBlockToInsert ) - 800df44: 68fa ldr r2, [r7, #12] - 800df46: 687b ldr r3, [r7, #4] - 800df48: 429a cmp r2, r3 - 800df4a: d002 beq.n 800df52 + 800eb84: 68fa ldr r2, [r7, #12] + 800eb86: 687b ldr r3, [r7, #4] + 800eb88: 429a cmp r2, r3 + 800eb8a: d002 beq.n 800eb92 { pxIterator->pxNextFreeBlock = pxBlockToInsert; - 800df4c: 68fb ldr r3, [r7, #12] - 800df4e: 687a ldr r2, [r7, #4] - 800df50: 601a str r2, [r3, #0] + 800eb8c: 68fb ldr r3, [r7, #12] + 800eb8e: 687a ldr r2, [r7, #4] + 800eb90: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } } - 800df52: 46c0 nop ; (mov r8, r8) - 800df54: 46bd mov sp, r7 - 800df56: b004 add sp, #16 - 800df58: bd80 pop {r7, pc} - 800df5a: 46c0 nop ; (mov r8, r8) - 800df5c: 20002930 .word 0x20002930 - 800df60: 20002938 .word 0x20002938 + 800eb92: 46c0 nop ; (mov r8, r8) + 800eb94: 46bd mov sp, r7 + 800eb96: b004 add sp, #16 + 800eb98: bd80 pop {r7, pc} + 800eb9a: 46c0 nop ; (mov r8, r8) + 800eb9c: 20002a10 .word 0x20002a10 + 800eba0: 20002a18 .word 0x20002a18 -0800df64 <__errno>: - 800df64: 4b01 ldr r3, [pc, #4] ; (800df6c <__errno+0x8>) - 800df66: 6818 ldr r0, [r3, #0] - 800df68: 4770 bx lr - 800df6a: 46c0 nop ; (mov r8, r8) - 800df6c: 20000050 .word 0x20000050 +0800eba4 <__errno>: + 800eba4: 4b01 ldr r3, [pc, #4] ; (800ebac <__errno+0x8>) + 800eba6: 6818 ldr r0, [r3, #0] + 800eba8: 4770 bx lr + 800ebaa: 46c0 nop ; (mov r8, r8) + 800ebac: 20000050 .word 0x20000050 -0800df70 <__libc_init_array>: - 800df70: b570 push {r4, r5, r6, lr} - 800df72: 2600 movs r6, #0 - 800df74: 4d0c ldr r5, [pc, #48] ; (800dfa8 <__libc_init_array+0x38>) - 800df76: 4c0d ldr r4, [pc, #52] ; (800dfac <__libc_init_array+0x3c>) - 800df78: 1b64 subs r4, r4, r5 - 800df7a: 10a4 asrs r4, r4, #2 - 800df7c: 42a6 cmp r6, r4 - 800df7e: d109 bne.n 800df94 <__libc_init_array+0x24> - 800df80: 2600 movs r6, #0 - 800df82: f000 fd13 bl 800e9ac <_init> - 800df86: 4d0a ldr r5, [pc, #40] ; (800dfb0 <__libc_init_array+0x40>) - 800df88: 4c0a ldr r4, [pc, #40] ; (800dfb4 <__libc_init_array+0x44>) - 800df8a: 1b64 subs r4, r4, r5 - 800df8c: 10a4 asrs r4, r4, #2 - 800df8e: 42a6 cmp r6, r4 - 800df90: d105 bne.n 800df9e <__libc_init_array+0x2e> - 800df92: bd70 pop {r4, r5, r6, pc} - 800df94: 00b3 lsls r3, r6, #2 - 800df96: 58eb ldr r3, [r5, r3] - 800df98: 4798 blx r3 - 800df9a: 3601 adds r6, #1 - 800df9c: e7ee b.n 800df7c <__libc_init_array+0xc> - 800df9e: 00b3 lsls r3, r6, #2 - 800dfa0: 58eb ldr r3, [r5, r3] - 800dfa2: 4798 blx r3 - 800dfa4: 3601 adds r6, #1 - 800dfa6: e7f2 b.n 800df8e <__libc_init_array+0x1e> - 800dfa8: 080103b0 .word 0x080103b0 - 800dfac: 080103b0 .word 0x080103b0 - 800dfb0: 080103b0 .word 0x080103b0 - 800dfb4: 080103b4 .word 0x080103b4 +0800ebb0 <__libc_init_array>: + 800ebb0: b570 push {r4, r5, r6, lr} + 800ebb2: 2600 movs r6, #0 + 800ebb4: 4d0c ldr r5, [pc, #48] ; (800ebe8 <__libc_init_array+0x38>) + 800ebb6: 4c0d ldr r4, [pc, #52] ; (800ebec <__libc_init_array+0x3c>) + 800ebb8: 1b64 subs r4, r4, r5 + 800ebba: 10a4 asrs r4, r4, #2 + 800ebbc: 42a6 cmp r6, r4 + 800ebbe: d109 bne.n 800ebd4 <__libc_init_array+0x24> + 800ebc0: 2600 movs r6, #0 + 800ebc2: f000 fd13 bl 800f5ec <_init> + 800ebc6: 4d0a ldr r5, [pc, #40] ; (800ebf0 <__libc_init_array+0x40>) + 800ebc8: 4c0a ldr r4, [pc, #40] ; (800ebf4 <__libc_init_array+0x44>) + 800ebca: 1b64 subs r4, r4, r5 + 800ebcc: 10a4 asrs r4, r4, #2 + 800ebce: 42a6 cmp r6, r4 + 800ebd0: d105 bne.n 800ebde <__libc_init_array+0x2e> + 800ebd2: bd70 pop {r4, r5, r6, pc} + 800ebd4: 00b3 lsls r3, r6, #2 + 800ebd6: 58eb ldr r3, [r5, r3] + 800ebd8: 4798 blx r3 + 800ebda: 3601 adds r6, #1 + 800ebdc: e7ee b.n 800ebbc <__libc_init_array+0xc> + 800ebde: 00b3 lsls r3, r6, #2 + 800ebe0: 58eb ldr r3, [r5, r3] + 800ebe2: 4798 blx r3 + 800ebe4: 3601 adds r6, #1 + 800ebe6: e7f2 b.n 800ebce <__libc_init_array+0x1e> + 800ebe8: 08011018 .word 0x08011018 + 800ebec: 08011018 .word 0x08011018 + 800ebf0: 08011018 .word 0x08011018 + 800ebf4: 0801101c .word 0x0801101c -0800dfb8 <__retarget_lock_acquire_recursive>: - 800dfb8: 4770 bx lr +0800ebf8 <__retarget_lock_acquire_recursive>: + 800ebf8: 4770 bx lr -0800dfba <__retarget_lock_release_recursive>: - 800dfba: 4770 bx lr +0800ebfa <__retarget_lock_release_recursive>: + 800ebfa: 4770 bx lr -0800dfbc : - 800dfbc: 2300 movs r3, #0 - 800dfbe: b510 push {r4, lr} - 800dfc0: 429a cmp r2, r3 - 800dfc2: d100 bne.n 800dfc6 - 800dfc4: bd10 pop {r4, pc} - 800dfc6: 5ccc ldrb r4, [r1, r3] - 800dfc8: 54c4 strb r4, [r0, r3] - 800dfca: 3301 adds r3, #1 - 800dfcc: e7f8 b.n 800dfc0 +0800ebfc : + 800ebfc: 2300 movs r3, #0 + 800ebfe: b510 push {r4, lr} + 800ec00: 429a cmp r2, r3 + 800ec02: d100 bne.n 800ec06 + 800ec04: bd10 pop {r4, pc} + 800ec06: 5ccc ldrb r4, [r1, r3] + 800ec08: 54c4 strb r4, [r0, r3] + 800ec0a: 3301 adds r3, #1 + 800ec0c: e7f8 b.n 800ec00 -0800dfce : - 800dfce: 0003 movs r3, r0 - 800dfd0: 1882 adds r2, r0, r2 - 800dfd2: 4293 cmp r3, r2 - 800dfd4: d100 bne.n 800dfd8 - 800dfd6: 4770 bx lr - 800dfd8: 7019 strb r1, [r3, #0] - 800dfda: 3301 adds r3, #1 - 800dfdc: e7f9 b.n 800dfd2 +0800ec0e : + 800ec0e: 0003 movs r3, r0 + 800ec10: 1882 adds r2, r0, r2 + 800ec12: 4293 cmp r3, r2 + 800ec14: d100 bne.n 800ec18 + 800ec16: 4770 bx lr + 800ec18: 7019 strb r1, [r3, #0] + 800ec1a: 3301 adds r3, #1 + 800ec1c: e7f9 b.n 800ec12 ... -0800dfe0 : - 800dfe0: b570 push {r4, r5, r6, lr} - 800dfe2: 4e0f ldr r6, [pc, #60] ; (800e020 ) - 800dfe4: 000d movs r5, r1 - 800dfe6: 6831 ldr r1, [r6, #0] - 800dfe8: 0004 movs r4, r0 - 800dfea: 2900 cmp r1, #0 - 800dfec: d102 bne.n 800dff4 - 800dfee: f000 f903 bl 800e1f8 <_sbrk_r> - 800dff2: 6030 str r0, [r6, #0] - 800dff4: 0029 movs r1, r5 - 800dff6: 0020 movs r0, r4 - 800dff8: f000 f8fe bl 800e1f8 <_sbrk_r> - 800dffc: 1c43 adds r3, r0, #1 - 800dffe: d00a beq.n 800e016 - 800e000: 2303 movs r3, #3 - 800e002: 1cc5 adds r5, r0, #3 - 800e004: 439d bics r5, r3 - 800e006: 42a8 cmp r0, r5 - 800e008: d007 beq.n 800e01a - 800e00a: 1a29 subs r1, r5, r0 - 800e00c: 0020 movs r0, r4 - 800e00e: f000 f8f3 bl 800e1f8 <_sbrk_r> - 800e012: 1c43 adds r3, r0, #1 - 800e014: d101 bne.n 800e01a - 800e016: 2501 movs r5, #1 - 800e018: 426d negs r5, r5 - 800e01a: 0028 movs r0, r5 - 800e01c: bd70 pop {r4, r5, r6, pc} - 800e01e: 46c0 nop ; (mov r8, r8) - 800e020: 20002958 .word 0x20002958 +0800ec20 : + 800ec20: b570 push {r4, r5, r6, lr} + 800ec22: 4e0f ldr r6, [pc, #60] ; (800ec60 ) + 800ec24: 000d movs r5, r1 + 800ec26: 6831 ldr r1, [r6, #0] + 800ec28: 0004 movs r4, r0 + 800ec2a: 2900 cmp r1, #0 + 800ec2c: d102 bne.n 800ec34 + 800ec2e: f000 f903 bl 800ee38 <_sbrk_r> + 800ec32: 6030 str r0, [r6, #0] + 800ec34: 0029 movs r1, r5 + 800ec36: 0020 movs r0, r4 + 800ec38: f000 f8fe bl 800ee38 <_sbrk_r> + 800ec3c: 1c43 adds r3, r0, #1 + 800ec3e: d00a beq.n 800ec56 + 800ec40: 2303 movs r3, #3 + 800ec42: 1cc5 adds r5, r0, #3 + 800ec44: 439d bics r5, r3 + 800ec46: 42a8 cmp r0, r5 + 800ec48: d007 beq.n 800ec5a + 800ec4a: 1a29 subs r1, r5, r0 + 800ec4c: 0020 movs r0, r4 + 800ec4e: f000 f8f3 bl 800ee38 <_sbrk_r> + 800ec52: 1c43 adds r3, r0, #1 + 800ec54: d101 bne.n 800ec5a + 800ec56: 2501 movs r5, #1 + 800ec58: 426d negs r5, r5 + 800ec5a: 0028 movs r0, r5 + 800ec5c: bd70 pop {r4, r5, r6, pc} + 800ec5e: 46c0 nop ; (mov r8, r8) + 800ec60: 20002a38 .word 0x20002a38 -0800e024 <_malloc_r>: - 800e024: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 800e026: 2203 movs r2, #3 - 800e028: 1ccb adds r3, r1, #3 - 800e02a: 4393 bics r3, r2 - 800e02c: 3308 adds r3, #8 - 800e02e: 0006 movs r6, r0 - 800e030: 001f movs r7, r3 - 800e032: 2b0c cmp r3, #12 - 800e034: d232 bcs.n 800e09c <_malloc_r+0x78> - 800e036: 270c movs r7, #12 - 800e038: 42b9 cmp r1, r7 - 800e03a: d831 bhi.n 800e0a0 <_malloc_r+0x7c> - 800e03c: 0030 movs r0, r6 - 800e03e: f000 f921 bl 800e284 <__malloc_lock> - 800e042: 4d32 ldr r5, [pc, #200] ; (800e10c <_malloc_r+0xe8>) - 800e044: 682b ldr r3, [r5, #0] - 800e046: 001c movs r4, r3 - 800e048: 2c00 cmp r4, #0 - 800e04a: d12e bne.n 800e0aa <_malloc_r+0x86> - 800e04c: 0039 movs r1, r7 - 800e04e: 0030 movs r0, r6 - 800e050: f7ff ffc6 bl 800dfe0 - 800e054: 0004 movs r4, r0 - 800e056: 1c43 adds r3, r0, #1 - 800e058: d11e bne.n 800e098 <_malloc_r+0x74> - 800e05a: 682c ldr r4, [r5, #0] - 800e05c: 0025 movs r5, r4 - 800e05e: 2d00 cmp r5, #0 - 800e060: d14a bne.n 800e0f8 <_malloc_r+0xd4> - 800e062: 6823 ldr r3, [r4, #0] - 800e064: 0029 movs r1, r5 - 800e066: 18e3 adds r3, r4, r3 - 800e068: 0030 movs r0, r6 - 800e06a: 9301 str r3, [sp, #4] - 800e06c: f000 f8c4 bl 800e1f8 <_sbrk_r> - 800e070: 9b01 ldr r3, [sp, #4] - 800e072: 4283 cmp r3, r0 - 800e074: d143 bne.n 800e0fe <_malloc_r+0xda> - 800e076: 6823 ldr r3, [r4, #0] - 800e078: 3703 adds r7, #3 - 800e07a: 1aff subs r7, r7, r3 - 800e07c: 2303 movs r3, #3 - 800e07e: 439f bics r7, r3 - 800e080: 3708 adds r7, #8 - 800e082: 2f0c cmp r7, #12 - 800e084: d200 bcs.n 800e088 <_malloc_r+0x64> - 800e086: 270c movs r7, #12 - 800e088: 0039 movs r1, r7 - 800e08a: 0030 movs r0, r6 - 800e08c: f7ff ffa8 bl 800dfe0 - 800e090: 1c43 adds r3, r0, #1 - 800e092: d034 beq.n 800e0fe <_malloc_r+0xda> - 800e094: 6823 ldr r3, [r4, #0] - 800e096: 19df adds r7, r3, r7 - 800e098: 6027 str r7, [r4, #0] - 800e09a: e013 b.n 800e0c4 <_malloc_r+0xa0> - 800e09c: 2b00 cmp r3, #0 - 800e09e: dacb bge.n 800e038 <_malloc_r+0x14> - 800e0a0: 230c movs r3, #12 - 800e0a2: 2500 movs r5, #0 - 800e0a4: 6033 str r3, [r6, #0] - 800e0a6: 0028 movs r0, r5 - 800e0a8: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} - 800e0aa: 6822 ldr r2, [r4, #0] - 800e0ac: 1bd1 subs r1, r2, r7 - 800e0ae: d420 bmi.n 800e0f2 <_malloc_r+0xce> - 800e0b0: 290b cmp r1, #11 - 800e0b2: d917 bls.n 800e0e4 <_malloc_r+0xc0> - 800e0b4: 19e2 adds r2, r4, r7 - 800e0b6: 6027 str r7, [r4, #0] - 800e0b8: 42a3 cmp r3, r4 - 800e0ba: d111 bne.n 800e0e0 <_malloc_r+0xbc> - 800e0bc: 602a str r2, [r5, #0] - 800e0be: 6863 ldr r3, [r4, #4] - 800e0c0: 6011 str r1, [r2, #0] - 800e0c2: 6053 str r3, [r2, #4] - 800e0c4: 0030 movs r0, r6 - 800e0c6: 0025 movs r5, r4 - 800e0c8: f000 f8e4 bl 800e294 <__malloc_unlock> - 800e0cc: 2207 movs r2, #7 - 800e0ce: 350b adds r5, #11 - 800e0d0: 1d23 adds r3, r4, #4 - 800e0d2: 4395 bics r5, r2 - 800e0d4: 1aea subs r2, r5, r3 - 800e0d6: 429d cmp r5, r3 - 800e0d8: d0e5 beq.n 800e0a6 <_malloc_r+0x82> - 800e0da: 1b5b subs r3, r3, r5 - 800e0dc: 50a3 str r3, [r4, r2] - 800e0de: e7e2 b.n 800e0a6 <_malloc_r+0x82> - 800e0e0: 605a str r2, [r3, #4] - 800e0e2: e7ec b.n 800e0be <_malloc_r+0x9a> - 800e0e4: 6862 ldr r2, [r4, #4] - 800e0e6: 42a3 cmp r3, r4 - 800e0e8: d101 bne.n 800e0ee <_malloc_r+0xca> - 800e0ea: 602a str r2, [r5, #0] - 800e0ec: e7ea b.n 800e0c4 <_malloc_r+0xa0> - 800e0ee: 605a str r2, [r3, #4] - 800e0f0: e7e8 b.n 800e0c4 <_malloc_r+0xa0> - 800e0f2: 0023 movs r3, r4 - 800e0f4: 6864 ldr r4, [r4, #4] - 800e0f6: e7a7 b.n 800e048 <_malloc_r+0x24> - 800e0f8: 002c movs r4, r5 - 800e0fa: 686d ldr r5, [r5, #4] - 800e0fc: e7af b.n 800e05e <_malloc_r+0x3a> - 800e0fe: 230c movs r3, #12 - 800e100: 0030 movs r0, r6 - 800e102: 6033 str r3, [r6, #0] - 800e104: f000 f8c6 bl 800e294 <__malloc_unlock> - 800e108: e7cd b.n 800e0a6 <_malloc_r+0x82> - 800e10a: 46c0 nop ; (mov r8, r8) - 800e10c: 20002954 .word 0x20002954 +0800ec64 <_malloc_r>: + 800ec64: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 800ec66: 2203 movs r2, #3 + 800ec68: 1ccb adds r3, r1, #3 + 800ec6a: 4393 bics r3, r2 + 800ec6c: 3308 adds r3, #8 + 800ec6e: 0006 movs r6, r0 + 800ec70: 001f movs r7, r3 + 800ec72: 2b0c cmp r3, #12 + 800ec74: d232 bcs.n 800ecdc <_malloc_r+0x78> + 800ec76: 270c movs r7, #12 + 800ec78: 42b9 cmp r1, r7 + 800ec7a: d831 bhi.n 800ece0 <_malloc_r+0x7c> + 800ec7c: 0030 movs r0, r6 + 800ec7e: f000 f921 bl 800eec4 <__malloc_lock> + 800ec82: 4d32 ldr r5, [pc, #200] ; (800ed4c <_malloc_r+0xe8>) + 800ec84: 682b ldr r3, [r5, #0] + 800ec86: 001c movs r4, r3 + 800ec88: 2c00 cmp r4, #0 + 800ec8a: d12e bne.n 800ecea <_malloc_r+0x86> + 800ec8c: 0039 movs r1, r7 + 800ec8e: 0030 movs r0, r6 + 800ec90: f7ff ffc6 bl 800ec20 + 800ec94: 0004 movs r4, r0 + 800ec96: 1c43 adds r3, r0, #1 + 800ec98: d11e bne.n 800ecd8 <_malloc_r+0x74> + 800ec9a: 682c ldr r4, [r5, #0] + 800ec9c: 0025 movs r5, r4 + 800ec9e: 2d00 cmp r5, #0 + 800eca0: d14a bne.n 800ed38 <_malloc_r+0xd4> + 800eca2: 6823 ldr r3, [r4, #0] + 800eca4: 0029 movs r1, r5 + 800eca6: 18e3 adds r3, r4, r3 + 800eca8: 0030 movs r0, r6 + 800ecaa: 9301 str r3, [sp, #4] + 800ecac: f000 f8c4 bl 800ee38 <_sbrk_r> + 800ecb0: 9b01 ldr r3, [sp, #4] + 800ecb2: 4283 cmp r3, r0 + 800ecb4: d143 bne.n 800ed3e <_malloc_r+0xda> + 800ecb6: 6823 ldr r3, [r4, #0] + 800ecb8: 3703 adds r7, #3 + 800ecba: 1aff subs r7, r7, r3 + 800ecbc: 2303 movs r3, #3 + 800ecbe: 439f bics r7, r3 + 800ecc0: 3708 adds r7, #8 + 800ecc2: 2f0c cmp r7, #12 + 800ecc4: d200 bcs.n 800ecc8 <_malloc_r+0x64> + 800ecc6: 270c movs r7, #12 + 800ecc8: 0039 movs r1, r7 + 800ecca: 0030 movs r0, r6 + 800eccc: f7ff ffa8 bl 800ec20 + 800ecd0: 1c43 adds r3, r0, #1 + 800ecd2: d034 beq.n 800ed3e <_malloc_r+0xda> + 800ecd4: 6823 ldr r3, [r4, #0] + 800ecd6: 19df adds r7, r3, r7 + 800ecd8: 6027 str r7, [r4, #0] + 800ecda: e013 b.n 800ed04 <_malloc_r+0xa0> + 800ecdc: 2b00 cmp r3, #0 + 800ecde: dacb bge.n 800ec78 <_malloc_r+0x14> + 800ece0: 230c movs r3, #12 + 800ece2: 2500 movs r5, #0 + 800ece4: 6033 str r3, [r6, #0] + 800ece6: 0028 movs r0, r5 + 800ece8: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 800ecea: 6822 ldr r2, [r4, #0] + 800ecec: 1bd1 subs r1, r2, r7 + 800ecee: d420 bmi.n 800ed32 <_malloc_r+0xce> + 800ecf0: 290b cmp r1, #11 + 800ecf2: d917 bls.n 800ed24 <_malloc_r+0xc0> + 800ecf4: 19e2 adds r2, r4, r7 + 800ecf6: 6027 str r7, [r4, #0] + 800ecf8: 42a3 cmp r3, r4 + 800ecfa: d111 bne.n 800ed20 <_malloc_r+0xbc> + 800ecfc: 602a str r2, [r5, #0] + 800ecfe: 6863 ldr r3, [r4, #4] + 800ed00: 6011 str r1, [r2, #0] + 800ed02: 6053 str r3, [r2, #4] + 800ed04: 0030 movs r0, r6 + 800ed06: 0025 movs r5, r4 + 800ed08: f000 f8e4 bl 800eed4 <__malloc_unlock> + 800ed0c: 2207 movs r2, #7 + 800ed0e: 350b adds r5, #11 + 800ed10: 1d23 adds r3, r4, #4 + 800ed12: 4395 bics r5, r2 + 800ed14: 1aea subs r2, r5, r3 + 800ed16: 429d cmp r5, r3 + 800ed18: d0e5 beq.n 800ece6 <_malloc_r+0x82> + 800ed1a: 1b5b subs r3, r3, r5 + 800ed1c: 50a3 str r3, [r4, r2] + 800ed1e: e7e2 b.n 800ece6 <_malloc_r+0x82> + 800ed20: 605a str r2, [r3, #4] + 800ed22: e7ec b.n 800ecfe <_malloc_r+0x9a> + 800ed24: 6862 ldr r2, [r4, #4] + 800ed26: 42a3 cmp r3, r4 + 800ed28: d101 bne.n 800ed2e <_malloc_r+0xca> + 800ed2a: 602a str r2, [r5, #0] + 800ed2c: e7ea b.n 800ed04 <_malloc_r+0xa0> + 800ed2e: 605a str r2, [r3, #4] + 800ed30: e7e8 b.n 800ed04 <_malloc_r+0xa0> + 800ed32: 0023 movs r3, r4 + 800ed34: 6864 ldr r4, [r4, #4] + 800ed36: e7a7 b.n 800ec88 <_malloc_r+0x24> + 800ed38: 002c movs r4, r5 + 800ed3a: 686d ldr r5, [r5, #4] + 800ed3c: e7af b.n 800ec9e <_malloc_r+0x3a> + 800ed3e: 230c movs r3, #12 + 800ed40: 0030 movs r0, r6 + 800ed42: 6033 str r3, [r6, #0] + 800ed44: f000 f8c6 bl 800eed4 <__malloc_unlock> + 800ed48: e7cd b.n 800ece6 <_malloc_r+0x82> + 800ed4a: 46c0 nop ; (mov r8, r8) + 800ed4c: 20002a34 .word 0x20002a34 -0800e110 : - 800e110: b570 push {r4, r5, r6, lr} - 800e112: 000d movs r5, r1 - 800e114: 6809 ldr r1, [r1, #0] - 800e116: 0004 movs r4, r0 - 800e118: 2900 cmp r1, #0 - 800e11a: d001 beq.n 800e120 - 800e11c: f7ff fff8 bl 800e110 - 800e120: 0029 movs r1, r5 - 800e122: 0020 movs r0, r4 - 800e124: f000 f8be bl 800e2a4 <_free_r> - 800e128: bd70 pop {r4, r5, r6, pc} +0800ed50 : + 800ed50: b570 push {r4, r5, r6, lr} + 800ed52: 000d movs r5, r1 + 800ed54: 6809 ldr r1, [r1, #0] + 800ed56: 0004 movs r4, r0 + 800ed58: 2900 cmp r1, #0 + 800ed5a: d001 beq.n 800ed60 + 800ed5c: f7ff fff8 bl 800ed50 + 800ed60: 0029 movs r1, r5 + 800ed62: 0020 movs r0, r4 + 800ed64: f000 f8be bl 800eee4 <_free_r> + 800ed68: bd70 pop {r4, r5, r6, pc} ... -0800e12c <_reclaim_reent>: - 800e12c: 4b31 ldr r3, [pc, #196] ; (800e1f4 <_reclaim_reent+0xc8>) - 800e12e: b570 push {r4, r5, r6, lr} - 800e130: 681b ldr r3, [r3, #0] - 800e132: 0004 movs r4, r0 - 800e134: 4283 cmp r3, r0 - 800e136: d049 beq.n 800e1cc <_reclaim_reent+0xa0> - 800e138: 6a43 ldr r3, [r0, #36] ; 0x24 - 800e13a: 2b00 cmp r3, #0 - 800e13c: d00a beq.n 800e154 <_reclaim_reent+0x28> - 800e13e: 2500 movs r5, #0 - 800e140: 68db ldr r3, [r3, #12] - 800e142: 42ab cmp r3, r5 - 800e144: d147 bne.n 800e1d6 <_reclaim_reent+0xaa> - 800e146: 6a63 ldr r3, [r4, #36] ; 0x24 - 800e148: 6819 ldr r1, [r3, #0] - 800e14a: 2900 cmp r1, #0 - 800e14c: d002 beq.n 800e154 <_reclaim_reent+0x28> - 800e14e: 0020 movs r0, r4 - 800e150: f000 f8a8 bl 800e2a4 <_free_r> - 800e154: 6961 ldr r1, [r4, #20] - 800e156: 2900 cmp r1, #0 - 800e158: d002 beq.n 800e160 <_reclaim_reent+0x34> - 800e15a: 0020 movs r0, r4 - 800e15c: f000 f8a2 bl 800e2a4 <_free_r> - 800e160: 6a61 ldr r1, [r4, #36] ; 0x24 - 800e162: 2900 cmp r1, #0 - 800e164: d002 beq.n 800e16c <_reclaim_reent+0x40> - 800e166: 0020 movs r0, r4 - 800e168: f000 f89c bl 800e2a4 <_free_r> - 800e16c: 6ba1 ldr r1, [r4, #56] ; 0x38 - 800e16e: 2900 cmp r1, #0 - 800e170: d002 beq.n 800e178 <_reclaim_reent+0x4c> - 800e172: 0020 movs r0, r4 - 800e174: f000 f896 bl 800e2a4 <_free_r> - 800e178: 6be1 ldr r1, [r4, #60] ; 0x3c - 800e17a: 2900 cmp r1, #0 - 800e17c: d002 beq.n 800e184 <_reclaim_reent+0x58> - 800e17e: 0020 movs r0, r4 - 800e180: f000 f890 bl 800e2a4 <_free_r> - 800e184: 6c21 ldr r1, [r4, #64] ; 0x40 - 800e186: 2900 cmp r1, #0 - 800e188: d002 beq.n 800e190 <_reclaim_reent+0x64> - 800e18a: 0020 movs r0, r4 - 800e18c: f000 f88a bl 800e2a4 <_free_r> - 800e190: 6de1 ldr r1, [r4, #92] ; 0x5c - 800e192: 2900 cmp r1, #0 - 800e194: d002 beq.n 800e19c <_reclaim_reent+0x70> - 800e196: 0020 movs r0, r4 - 800e198: f000 f884 bl 800e2a4 <_free_r> - 800e19c: 6da1 ldr r1, [r4, #88] ; 0x58 - 800e19e: 2900 cmp r1, #0 - 800e1a0: d002 beq.n 800e1a8 <_reclaim_reent+0x7c> - 800e1a2: 0020 movs r0, r4 - 800e1a4: f000 f87e bl 800e2a4 <_free_r> - 800e1a8: 6b61 ldr r1, [r4, #52] ; 0x34 - 800e1aa: 2900 cmp r1, #0 - 800e1ac: d002 beq.n 800e1b4 <_reclaim_reent+0x88> - 800e1ae: 0020 movs r0, r4 - 800e1b0: f000 f878 bl 800e2a4 <_free_r> - 800e1b4: 69a3 ldr r3, [r4, #24] - 800e1b6: 2b00 cmp r3, #0 - 800e1b8: d008 beq.n 800e1cc <_reclaim_reent+0xa0> - 800e1ba: 0020 movs r0, r4 - 800e1bc: 6aa3 ldr r3, [r4, #40] ; 0x28 - 800e1be: 4798 blx r3 - 800e1c0: 6ca1 ldr r1, [r4, #72] ; 0x48 - 800e1c2: 2900 cmp r1, #0 - 800e1c4: d002 beq.n 800e1cc <_reclaim_reent+0xa0> - 800e1c6: 0020 movs r0, r4 - 800e1c8: f7ff ffa2 bl 800e110 - 800e1cc: bd70 pop {r4, r5, r6, pc} - 800e1ce: 5949 ldr r1, [r1, r5] - 800e1d0: 2900 cmp r1, #0 - 800e1d2: d108 bne.n 800e1e6 <_reclaim_reent+0xba> - 800e1d4: 3504 adds r5, #4 - 800e1d6: 6a63 ldr r3, [r4, #36] ; 0x24 - 800e1d8: 68d9 ldr r1, [r3, #12] - 800e1da: 2d80 cmp r5, #128 ; 0x80 - 800e1dc: d1f7 bne.n 800e1ce <_reclaim_reent+0xa2> - 800e1de: 0020 movs r0, r4 - 800e1e0: f000 f860 bl 800e2a4 <_free_r> - 800e1e4: e7af b.n 800e146 <_reclaim_reent+0x1a> - 800e1e6: 680e ldr r6, [r1, #0] - 800e1e8: 0020 movs r0, r4 - 800e1ea: f000 f85b bl 800e2a4 <_free_r> - 800e1ee: 0031 movs r1, r6 - 800e1f0: e7ee b.n 800e1d0 <_reclaim_reent+0xa4> - 800e1f2: 46c0 nop ; (mov r8, r8) - 800e1f4: 20000050 .word 0x20000050 +0800ed6c <_reclaim_reent>: + 800ed6c: 4b31 ldr r3, [pc, #196] ; (800ee34 <_reclaim_reent+0xc8>) + 800ed6e: b570 push {r4, r5, r6, lr} + 800ed70: 681b ldr r3, [r3, #0] + 800ed72: 0004 movs r4, r0 + 800ed74: 4283 cmp r3, r0 + 800ed76: d049 beq.n 800ee0c <_reclaim_reent+0xa0> + 800ed78: 6a43 ldr r3, [r0, #36] ; 0x24 + 800ed7a: 2b00 cmp r3, #0 + 800ed7c: d00a beq.n 800ed94 <_reclaim_reent+0x28> + 800ed7e: 2500 movs r5, #0 + 800ed80: 68db ldr r3, [r3, #12] + 800ed82: 42ab cmp r3, r5 + 800ed84: d147 bne.n 800ee16 <_reclaim_reent+0xaa> + 800ed86: 6a63 ldr r3, [r4, #36] ; 0x24 + 800ed88: 6819 ldr r1, [r3, #0] + 800ed8a: 2900 cmp r1, #0 + 800ed8c: d002 beq.n 800ed94 <_reclaim_reent+0x28> + 800ed8e: 0020 movs r0, r4 + 800ed90: f000 f8a8 bl 800eee4 <_free_r> + 800ed94: 6961 ldr r1, [r4, #20] + 800ed96: 2900 cmp r1, #0 + 800ed98: d002 beq.n 800eda0 <_reclaim_reent+0x34> + 800ed9a: 0020 movs r0, r4 + 800ed9c: f000 f8a2 bl 800eee4 <_free_r> + 800eda0: 6a61 ldr r1, [r4, #36] ; 0x24 + 800eda2: 2900 cmp r1, #0 + 800eda4: d002 beq.n 800edac <_reclaim_reent+0x40> + 800eda6: 0020 movs r0, r4 + 800eda8: f000 f89c bl 800eee4 <_free_r> + 800edac: 6ba1 ldr r1, [r4, #56] ; 0x38 + 800edae: 2900 cmp r1, #0 + 800edb0: d002 beq.n 800edb8 <_reclaim_reent+0x4c> + 800edb2: 0020 movs r0, r4 + 800edb4: f000 f896 bl 800eee4 <_free_r> + 800edb8: 6be1 ldr r1, [r4, #60] ; 0x3c + 800edba: 2900 cmp r1, #0 + 800edbc: d002 beq.n 800edc4 <_reclaim_reent+0x58> + 800edbe: 0020 movs r0, r4 + 800edc0: f000 f890 bl 800eee4 <_free_r> + 800edc4: 6c21 ldr r1, [r4, #64] ; 0x40 + 800edc6: 2900 cmp r1, #0 + 800edc8: d002 beq.n 800edd0 <_reclaim_reent+0x64> + 800edca: 0020 movs r0, r4 + 800edcc: f000 f88a bl 800eee4 <_free_r> + 800edd0: 6de1 ldr r1, [r4, #92] ; 0x5c + 800edd2: 2900 cmp r1, #0 + 800edd4: d002 beq.n 800eddc <_reclaim_reent+0x70> + 800edd6: 0020 movs r0, r4 + 800edd8: f000 f884 bl 800eee4 <_free_r> + 800eddc: 6da1 ldr r1, [r4, #88] ; 0x58 + 800edde: 2900 cmp r1, #0 + 800ede0: d002 beq.n 800ede8 <_reclaim_reent+0x7c> + 800ede2: 0020 movs r0, r4 + 800ede4: f000 f87e bl 800eee4 <_free_r> + 800ede8: 6b61 ldr r1, [r4, #52] ; 0x34 + 800edea: 2900 cmp r1, #0 + 800edec: d002 beq.n 800edf4 <_reclaim_reent+0x88> + 800edee: 0020 movs r0, r4 + 800edf0: f000 f878 bl 800eee4 <_free_r> + 800edf4: 69a3 ldr r3, [r4, #24] + 800edf6: 2b00 cmp r3, #0 + 800edf8: d008 beq.n 800ee0c <_reclaim_reent+0xa0> + 800edfa: 0020 movs r0, r4 + 800edfc: 6aa3 ldr r3, [r4, #40] ; 0x28 + 800edfe: 4798 blx r3 + 800ee00: 6ca1 ldr r1, [r4, #72] ; 0x48 + 800ee02: 2900 cmp r1, #0 + 800ee04: d002 beq.n 800ee0c <_reclaim_reent+0xa0> + 800ee06: 0020 movs r0, r4 + 800ee08: f7ff ffa2 bl 800ed50 + 800ee0c: bd70 pop {r4, r5, r6, pc} + 800ee0e: 5949 ldr r1, [r1, r5] + 800ee10: 2900 cmp r1, #0 + 800ee12: d108 bne.n 800ee26 <_reclaim_reent+0xba> + 800ee14: 3504 adds r5, #4 + 800ee16: 6a63 ldr r3, [r4, #36] ; 0x24 + 800ee18: 68d9 ldr r1, [r3, #12] + 800ee1a: 2d80 cmp r5, #128 ; 0x80 + 800ee1c: d1f7 bne.n 800ee0e <_reclaim_reent+0xa2> + 800ee1e: 0020 movs r0, r4 + 800ee20: f000 f860 bl 800eee4 <_free_r> + 800ee24: e7af b.n 800ed86 <_reclaim_reent+0x1a> + 800ee26: 680e ldr r6, [r1, #0] + 800ee28: 0020 movs r0, r4 + 800ee2a: f000 f85b bl 800eee4 <_free_r> + 800ee2e: 0031 movs r1, r6 + 800ee30: e7ee b.n 800ee10 <_reclaim_reent+0xa4> + 800ee32: 46c0 nop ; (mov r8, r8) + 800ee34: 20000050 .word 0x20000050 -0800e1f8 <_sbrk_r>: - 800e1f8: 2300 movs r3, #0 - 800e1fa: b570 push {r4, r5, r6, lr} - 800e1fc: 4d06 ldr r5, [pc, #24] ; (800e218 <_sbrk_r+0x20>) - 800e1fe: 0004 movs r4, r0 - 800e200: 0008 movs r0, r1 - 800e202: 602b str r3, [r5, #0] - 800e204: f7f7 fb52 bl 80058ac <_sbrk> - 800e208: 1c43 adds r3, r0, #1 - 800e20a: d103 bne.n 800e214 <_sbrk_r+0x1c> - 800e20c: 682b ldr r3, [r5, #0] - 800e20e: 2b00 cmp r3, #0 - 800e210: d000 beq.n 800e214 <_sbrk_r+0x1c> - 800e212: 6023 str r3, [r4, #0] - 800e214: bd70 pop {r4, r5, r6, pc} - 800e216: 46c0 nop ; (mov r8, r8) - 800e218: 2000295c .word 0x2000295c +0800ee38 <_sbrk_r>: + 800ee38: 2300 movs r3, #0 + 800ee3a: b570 push {r4, r5, r6, lr} + 800ee3c: 4d06 ldr r5, [pc, #24] ; (800ee58 <_sbrk_r+0x20>) + 800ee3e: 0004 movs r4, r0 + 800ee40: 0008 movs r0, r1 + 800ee42: 602b str r3, [r5, #0] + 800ee44: f7f6 fd36 bl 80058b4 <_sbrk> + 800ee48: 1c43 adds r3, r0, #1 + 800ee4a: d103 bne.n 800ee54 <_sbrk_r+0x1c> + 800ee4c: 682b ldr r3, [r5, #0] + 800ee4e: 2b00 cmp r3, #0 + 800ee50: d000 beq.n 800ee54 <_sbrk_r+0x1c> + 800ee52: 6023 str r3, [r4, #0] + 800ee54: bd70 pop {r4, r5, r6, pc} + 800ee56: 46c0 nop ; (mov r8, r8) + 800ee58: 20002a3c .word 0x20002a3c -0800e21c : - 800e21c: b40c push {r2, r3} - 800e21e: b530 push {r4, r5, lr} - 800e220: 4b17 ldr r3, [pc, #92] ; (800e280 ) - 800e222: 000c movs r4, r1 - 800e224: 681d ldr r5, [r3, #0] - 800e226: b09d sub sp, #116 ; 0x74 - 800e228: 2900 cmp r1, #0 - 800e22a: da08 bge.n 800e23e - 800e22c: 238b movs r3, #139 ; 0x8b - 800e22e: 2001 movs r0, #1 - 800e230: 602b str r3, [r5, #0] - 800e232: 4240 negs r0, r0 - 800e234: b01d add sp, #116 ; 0x74 - 800e236: bc30 pop {r4, r5} - 800e238: bc08 pop {r3} - 800e23a: b002 add sp, #8 - 800e23c: 4718 bx r3 - 800e23e: 2382 movs r3, #130 ; 0x82 - 800e240: 466a mov r2, sp - 800e242: 009b lsls r3, r3, #2 - 800e244: 8293 strh r3, [r2, #20] - 800e246: 2300 movs r3, #0 - 800e248: 9002 str r0, [sp, #8] - 800e24a: 9006 str r0, [sp, #24] - 800e24c: 4299 cmp r1, r3 - 800e24e: d000 beq.n 800e252 - 800e250: 1e4b subs r3, r1, #1 - 800e252: 9304 str r3, [sp, #16] - 800e254: 9307 str r3, [sp, #28] - 800e256: 2301 movs r3, #1 - 800e258: 466a mov r2, sp - 800e25a: 425b negs r3, r3 - 800e25c: 82d3 strh r3, [r2, #22] - 800e25e: 0028 movs r0, r5 - 800e260: ab21 add r3, sp, #132 ; 0x84 - 800e262: 9a20 ldr r2, [sp, #128] ; 0x80 - 800e264: a902 add r1, sp, #8 - 800e266: 9301 str r3, [sp, #4] - 800e268: f000 f8c8 bl 800e3fc <_svfiprintf_r> - 800e26c: 1c43 adds r3, r0, #1 - 800e26e: da01 bge.n 800e274 - 800e270: 238b movs r3, #139 ; 0x8b - 800e272: 602b str r3, [r5, #0] - 800e274: 2c00 cmp r4, #0 - 800e276: d0dd beq.n 800e234 - 800e278: 2300 movs r3, #0 - 800e27a: 9a02 ldr r2, [sp, #8] - 800e27c: 7013 strb r3, [r2, #0] - 800e27e: e7d9 b.n 800e234 - 800e280: 20000050 .word 0x20000050 +0800ee5c : + 800ee5c: b40c push {r2, r3} + 800ee5e: b530 push {r4, r5, lr} + 800ee60: 4b17 ldr r3, [pc, #92] ; (800eec0 ) + 800ee62: 000c movs r4, r1 + 800ee64: 681d ldr r5, [r3, #0] + 800ee66: b09d sub sp, #116 ; 0x74 + 800ee68: 2900 cmp r1, #0 + 800ee6a: da08 bge.n 800ee7e + 800ee6c: 238b movs r3, #139 ; 0x8b + 800ee6e: 2001 movs r0, #1 + 800ee70: 602b str r3, [r5, #0] + 800ee72: 4240 negs r0, r0 + 800ee74: b01d add sp, #116 ; 0x74 + 800ee76: bc30 pop {r4, r5} + 800ee78: bc08 pop {r3} + 800ee7a: b002 add sp, #8 + 800ee7c: 4718 bx r3 + 800ee7e: 2382 movs r3, #130 ; 0x82 + 800ee80: 466a mov r2, sp + 800ee82: 009b lsls r3, r3, #2 + 800ee84: 8293 strh r3, [r2, #20] + 800ee86: 2300 movs r3, #0 + 800ee88: 9002 str r0, [sp, #8] + 800ee8a: 9006 str r0, [sp, #24] + 800ee8c: 4299 cmp r1, r3 + 800ee8e: d000 beq.n 800ee92 + 800ee90: 1e4b subs r3, r1, #1 + 800ee92: 9304 str r3, [sp, #16] + 800ee94: 9307 str r3, [sp, #28] + 800ee96: 2301 movs r3, #1 + 800ee98: 466a mov r2, sp + 800ee9a: 425b negs r3, r3 + 800ee9c: 82d3 strh r3, [r2, #22] + 800ee9e: 0028 movs r0, r5 + 800eea0: ab21 add r3, sp, #132 ; 0x84 + 800eea2: 9a20 ldr r2, [sp, #128] ; 0x80 + 800eea4: a902 add r1, sp, #8 + 800eea6: 9301 str r3, [sp, #4] + 800eea8: f000 f8c8 bl 800f03c <_svfiprintf_r> + 800eeac: 1c43 adds r3, r0, #1 + 800eeae: da01 bge.n 800eeb4 + 800eeb0: 238b movs r3, #139 ; 0x8b + 800eeb2: 602b str r3, [r5, #0] + 800eeb4: 2c00 cmp r4, #0 + 800eeb6: d0dd beq.n 800ee74 + 800eeb8: 2300 movs r3, #0 + 800eeba: 9a02 ldr r2, [sp, #8] + 800eebc: 7013 strb r3, [r2, #0] + 800eebe: e7d9 b.n 800ee74 + 800eec0: 20000050 .word 0x20000050 -0800e284 <__malloc_lock>: - 800e284: b510 push {r4, lr} - 800e286: 4802 ldr r0, [pc, #8] ; (800e290 <__malloc_lock+0xc>) - 800e288: f7ff fe96 bl 800dfb8 <__retarget_lock_acquire_recursive> - 800e28c: bd10 pop {r4, pc} - 800e28e: 46c0 nop ; (mov r8, r8) - 800e290: 20002950 .word 0x20002950 +0800eec4 <__malloc_lock>: + 800eec4: b510 push {r4, lr} + 800eec6: 4802 ldr r0, [pc, #8] ; (800eed0 <__malloc_lock+0xc>) + 800eec8: f7ff fe96 bl 800ebf8 <__retarget_lock_acquire_recursive> + 800eecc: bd10 pop {r4, pc} + 800eece: 46c0 nop ; (mov r8, r8) + 800eed0: 20002a30 .word 0x20002a30 -0800e294 <__malloc_unlock>: - 800e294: b510 push {r4, lr} - 800e296: 4802 ldr r0, [pc, #8] ; (800e2a0 <__malloc_unlock+0xc>) - 800e298: f7ff fe8f bl 800dfba <__retarget_lock_release_recursive> - 800e29c: bd10 pop {r4, pc} - 800e29e: 46c0 nop ; (mov r8, r8) - 800e2a0: 20002950 .word 0x20002950 +0800eed4 <__malloc_unlock>: + 800eed4: b510 push {r4, lr} + 800eed6: 4802 ldr r0, [pc, #8] ; (800eee0 <__malloc_unlock+0xc>) + 800eed8: f7ff fe8f bl 800ebfa <__retarget_lock_release_recursive> + 800eedc: bd10 pop {r4, pc} + 800eede: 46c0 nop ; (mov r8, r8) + 800eee0: 20002a30 .word 0x20002a30 -0800e2a4 <_free_r>: - 800e2a4: b570 push {r4, r5, r6, lr} - 800e2a6: 0005 movs r5, r0 - 800e2a8: 2900 cmp r1, #0 - 800e2aa: d010 beq.n 800e2ce <_free_r+0x2a> - 800e2ac: 1f0c subs r4, r1, #4 - 800e2ae: 6823 ldr r3, [r4, #0] - 800e2b0: 2b00 cmp r3, #0 - 800e2b2: da00 bge.n 800e2b6 <_free_r+0x12> - 800e2b4: 18e4 adds r4, r4, r3 - 800e2b6: 0028 movs r0, r5 - 800e2b8: f7ff ffe4 bl 800e284 <__malloc_lock> - 800e2bc: 4a1d ldr r2, [pc, #116] ; (800e334 <_free_r+0x90>) - 800e2be: 6813 ldr r3, [r2, #0] - 800e2c0: 2b00 cmp r3, #0 - 800e2c2: d105 bne.n 800e2d0 <_free_r+0x2c> - 800e2c4: 6063 str r3, [r4, #4] - 800e2c6: 6014 str r4, [r2, #0] - 800e2c8: 0028 movs r0, r5 - 800e2ca: f7ff ffe3 bl 800e294 <__malloc_unlock> - 800e2ce: bd70 pop {r4, r5, r6, pc} - 800e2d0: 42a3 cmp r3, r4 - 800e2d2: d908 bls.n 800e2e6 <_free_r+0x42> - 800e2d4: 6821 ldr r1, [r4, #0] - 800e2d6: 1860 adds r0, r4, r1 - 800e2d8: 4283 cmp r3, r0 - 800e2da: d1f3 bne.n 800e2c4 <_free_r+0x20> - 800e2dc: 6818 ldr r0, [r3, #0] - 800e2de: 685b ldr r3, [r3, #4] - 800e2e0: 1841 adds r1, r0, r1 - 800e2e2: 6021 str r1, [r4, #0] - 800e2e4: e7ee b.n 800e2c4 <_free_r+0x20> - 800e2e6: 001a movs r2, r3 - 800e2e8: 685b ldr r3, [r3, #4] - 800e2ea: 2b00 cmp r3, #0 - 800e2ec: d001 beq.n 800e2f2 <_free_r+0x4e> - 800e2ee: 42a3 cmp r3, r4 - 800e2f0: d9f9 bls.n 800e2e6 <_free_r+0x42> - 800e2f2: 6811 ldr r1, [r2, #0] - 800e2f4: 1850 adds r0, r2, r1 - 800e2f6: 42a0 cmp r0, r4 - 800e2f8: d10b bne.n 800e312 <_free_r+0x6e> - 800e2fa: 6820 ldr r0, [r4, #0] - 800e2fc: 1809 adds r1, r1, r0 - 800e2fe: 1850 adds r0, r2, r1 - 800e300: 6011 str r1, [r2, #0] - 800e302: 4283 cmp r3, r0 - 800e304: d1e0 bne.n 800e2c8 <_free_r+0x24> - 800e306: 6818 ldr r0, [r3, #0] - 800e308: 685b ldr r3, [r3, #4] - 800e30a: 1841 adds r1, r0, r1 - 800e30c: 6011 str r1, [r2, #0] - 800e30e: 6053 str r3, [r2, #4] - 800e310: e7da b.n 800e2c8 <_free_r+0x24> - 800e312: 42a0 cmp r0, r4 - 800e314: d902 bls.n 800e31c <_free_r+0x78> - 800e316: 230c movs r3, #12 - 800e318: 602b str r3, [r5, #0] - 800e31a: e7d5 b.n 800e2c8 <_free_r+0x24> - 800e31c: 6821 ldr r1, [r4, #0] - 800e31e: 1860 adds r0, r4, r1 - 800e320: 4283 cmp r3, r0 - 800e322: d103 bne.n 800e32c <_free_r+0x88> - 800e324: 6818 ldr r0, [r3, #0] - 800e326: 685b ldr r3, [r3, #4] - 800e328: 1841 adds r1, r0, r1 - 800e32a: 6021 str r1, [r4, #0] - 800e32c: 6063 str r3, [r4, #4] - 800e32e: 6054 str r4, [r2, #4] - 800e330: e7ca b.n 800e2c8 <_free_r+0x24> - 800e332: 46c0 nop ; (mov r8, r8) - 800e334: 20002954 .word 0x20002954 +0800eee4 <_free_r>: + 800eee4: b570 push {r4, r5, r6, lr} + 800eee6: 0005 movs r5, r0 + 800eee8: 2900 cmp r1, #0 + 800eeea: d010 beq.n 800ef0e <_free_r+0x2a> + 800eeec: 1f0c subs r4, r1, #4 + 800eeee: 6823 ldr r3, [r4, #0] + 800eef0: 2b00 cmp r3, #0 + 800eef2: da00 bge.n 800eef6 <_free_r+0x12> + 800eef4: 18e4 adds r4, r4, r3 + 800eef6: 0028 movs r0, r5 + 800eef8: f7ff ffe4 bl 800eec4 <__malloc_lock> + 800eefc: 4a1d ldr r2, [pc, #116] ; (800ef74 <_free_r+0x90>) + 800eefe: 6813 ldr r3, [r2, #0] + 800ef00: 2b00 cmp r3, #0 + 800ef02: d105 bne.n 800ef10 <_free_r+0x2c> + 800ef04: 6063 str r3, [r4, #4] + 800ef06: 6014 str r4, [r2, #0] + 800ef08: 0028 movs r0, r5 + 800ef0a: f7ff ffe3 bl 800eed4 <__malloc_unlock> + 800ef0e: bd70 pop {r4, r5, r6, pc} + 800ef10: 42a3 cmp r3, r4 + 800ef12: d908 bls.n 800ef26 <_free_r+0x42> + 800ef14: 6821 ldr r1, [r4, #0] + 800ef16: 1860 adds r0, r4, r1 + 800ef18: 4283 cmp r3, r0 + 800ef1a: d1f3 bne.n 800ef04 <_free_r+0x20> + 800ef1c: 6818 ldr r0, [r3, #0] + 800ef1e: 685b ldr r3, [r3, #4] + 800ef20: 1841 adds r1, r0, r1 + 800ef22: 6021 str r1, [r4, #0] + 800ef24: e7ee b.n 800ef04 <_free_r+0x20> + 800ef26: 001a movs r2, r3 + 800ef28: 685b ldr r3, [r3, #4] + 800ef2a: 2b00 cmp r3, #0 + 800ef2c: d001 beq.n 800ef32 <_free_r+0x4e> + 800ef2e: 42a3 cmp r3, r4 + 800ef30: d9f9 bls.n 800ef26 <_free_r+0x42> + 800ef32: 6811 ldr r1, [r2, #0] + 800ef34: 1850 adds r0, r2, r1 + 800ef36: 42a0 cmp r0, r4 + 800ef38: d10b bne.n 800ef52 <_free_r+0x6e> + 800ef3a: 6820 ldr r0, [r4, #0] + 800ef3c: 1809 adds r1, r1, r0 + 800ef3e: 1850 adds r0, r2, r1 + 800ef40: 6011 str r1, [r2, #0] + 800ef42: 4283 cmp r3, r0 + 800ef44: d1e0 bne.n 800ef08 <_free_r+0x24> + 800ef46: 6818 ldr r0, [r3, #0] + 800ef48: 685b ldr r3, [r3, #4] + 800ef4a: 1841 adds r1, r0, r1 + 800ef4c: 6011 str r1, [r2, #0] + 800ef4e: 6053 str r3, [r2, #4] + 800ef50: e7da b.n 800ef08 <_free_r+0x24> + 800ef52: 42a0 cmp r0, r4 + 800ef54: d902 bls.n 800ef5c <_free_r+0x78> + 800ef56: 230c movs r3, #12 + 800ef58: 602b str r3, [r5, #0] + 800ef5a: e7d5 b.n 800ef08 <_free_r+0x24> + 800ef5c: 6821 ldr r1, [r4, #0] + 800ef5e: 1860 adds r0, r4, r1 + 800ef60: 4283 cmp r3, r0 + 800ef62: d103 bne.n 800ef6c <_free_r+0x88> + 800ef64: 6818 ldr r0, [r3, #0] + 800ef66: 685b ldr r3, [r3, #4] + 800ef68: 1841 adds r1, r0, r1 + 800ef6a: 6021 str r1, [r4, #0] + 800ef6c: 6063 str r3, [r4, #4] + 800ef6e: 6054 str r4, [r2, #4] + 800ef70: e7ca b.n 800ef08 <_free_r+0x24> + 800ef72: 46c0 nop ; (mov r8, r8) + 800ef74: 20002a34 .word 0x20002a34 -0800e338 <__ssputs_r>: - 800e338: b5f0 push {r4, r5, r6, r7, lr} - 800e33a: 688e ldr r6, [r1, #8] - 800e33c: b085 sub sp, #20 - 800e33e: 0007 movs r7, r0 - 800e340: 000c movs r4, r1 - 800e342: 9203 str r2, [sp, #12] - 800e344: 9301 str r3, [sp, #4] - 800e346: 429e cmp r6, r3 - 800e348: d83c bhi.n 800e3c4 <__ssputs_r+0x8c> - 800e34a: 2390 movs r3, #144 ; 0x90 - 800e34c: 898a ldrh r2, [r1, #12] - 800e34e: 00db lsls r3, r3, #3 - 800e350: 421a tst r2, r3 - 800e352: d034 beq.n 800e3be <__ssputs_r+0x86> - 800e354: 6909 ldr r1, [r1, #16] - 800e356: 6823 ldr r3, [r4, #0] - 800e358: 6960 ldr r0, [r4, #20] - 800e35a: 1a5b subs r3, r3, r1 - 800e35c: 9302 str r3, [sp, #8] - 800e35e: 2303 movs r3, #3 - 800e360: 4343 muls r3, r0 - 800e362: 0fdd lsrs r5, r3, #31 - 800e364: 18ed adds r5, r5, r3 - 800e366: 9b01 ldr r3, [sp, #4] - 800e368: 9802 ldr r0, [sp, #8] - 800e36a: 3301 adds r3, #1 - 800e36c: 181b adds r3, r3, r0 - 800e36e: 106d asrs r5, r5, #1 - 800e370: 42ab cmp r3, r5 - 800e372: d900 bls.n 800e376 <__ssputs_r+0x3e> - 800e374: 001d movs r5, r3 - 800e376: 0553 lsls r3, r2, #21 - 800e378: d532 bpl.n 800e3e0 <__ssputs_r+0xa8> - 800e37a: 0029 movs r1, r5 - 800e37c: 0038 movs r0, r7 - 800e37e: f7ff fe51 bl 800e024 <_malloc_r> - 800e382: 1e06 subs r6, r0, #0 - 800e384: d109 bne.n 800e39a <__ssputs_r+0x62> - 800e386: 230c movs r3, #12 - 800e388: 603b str r3, [r7, #0] - 800e38a: 2340 movs r3, #64 ; 0x40 - 800e38c: 2001 movs r0, #1 - 800e38e: 89a2 ldrh r2, [r4, #12] - 800e390: 4240 negs r0, r0 - 800e392: 4313 orrs r3, r2 - 800e394: 81a3 strh r3, [r4, #12] - 800e396: b005 add sp, #20 - 800e398: bdf0 pop {r4, r5, r6, r7, pc} - 800e39a: 9a02 ldr r2, [sp, #8] - 800e39c: 6921 ldr r1, [r4, #16] - 800e39e: f7ff fe0d bl 800dfbc - 800e3a2: 89a3 ldrh r3, [r4, #12] - 800e3a4: 4a14 ldr r2, [pc, #80] ; (800e3f8 <__ssputs_r+0xc0>) - 800e3a6: 401a ands r2, r3 - 800e3a8: 2380 movs r3, #128 ; 0x80 - 800e3aa: 4313 orrs r3, r2 - 800e3ac: 81a3 strh r3, [r4, #12] - 800e3ae: 9b02 ldr r3, [sp, #8] - 800e3b0: 6126 str r6, [r4, #16] - 800e3b2: 18f6 adds r6, r6, r3 - 800e3b4: 6026 str r6, [r4, #0] - 800e3b6: 6165 str r5, [r4, #20] - 800e3b8: 9e01 ldr r6, [sp, #4] - 800e3ba: 1aed subs r5, r5, r3 - 800e3bc: 60a5 str r5, [r4, #8] - 800e3be: 9b01 ldr r3, [sp, #4] - 800e3c0: 429e cmp r6, r3 - 800e3c2: d900 bls.n 800e3c6 <__ssputs_r+0x8e> - 800e3c4: 9e01 ldr r6, [sp, #4] - 800e3c6: 0032 movs r2, r6 - 800e3c8: 9903 ldr r1, [sp, #12] - 800e3ca: 6820 ldr r0, [r4, #0] - 800e3cc: f000 faa3 bl 800e916 - 800e3d0: 68a3 ldr r3, [r4, #8] - 800e3d2: 2000 movs r0, #0 - 800e3d4: 1b9b subs r3, r3, r6 - 800e3d6: 60a3 str r3, [r4, #8] - 800e3d8: 6823 ldr r3, [r4, #0] - 800e3da: 199e adds r6, r3, r6 - 800e3dc: 6026 str r6, [r4, #0] - 800e3de: e7da b.n 800e396 <__ssputs_r+0x5e> - 800e3e0: 002a movs r2, r5 - 800e3e2: 0038 movs r0, r7 - 800e3e4: f000 faaa bl 800e93c <_realloc_r> - 800e3e8: 1e06 subs r6, r0, #0 - 800e3ea: d1e0 bne.n 800e3ae <__ssputs_r+0x76> - 800e3ec: 0038 movs r0, r7 - 800e3ee: 6921 ldr r1, [r4, #16] - 800e3f0: f7ff ff58 bl 800e2a4 <_free_r> - 800e3f4: e7c7 b.n 800e386 <__ssputs_r+0x4e> - 800e3f6: 46c0 nop ; (mov r8, r8) - 800e3f8: fffffb7f .word 0xfffffb7f +0800ef78 <__ssputs_r>: + 800ef78: b5f0 push {r4, r5, r6, r7, lr} + 800ef7a: 688e ldr r6, [r1, #8] + 800ef7c: b085 sub sp, #20 + 800ef7e: 0007 movs r7, r0 + 800ef80: 000c movs r4, r1 + 800ef82: 9203 str r2, [sp, #12] + 800ef84: 9301 str r3, [sp, #4] + 800ef86: 429e cmp r6, r3 + 800ef88: d83c bhi.n 800f004 <__ssputs_r+0x8c> + 800ef8a: 2390 movs r3, #144 ; 0x90 + 800ef8c: 898a ldrh r2, [r1, #12] + 800ef8e: 00db lsls r3, r3, #3 + 800ef90: 421a tst r2, r3 + 800ef92: d034 beq.n 800effe <__ssputs_r+0x86> + 800ef94: 6909 ldr r1, [r1, #16] + 800ef96: 6823 ldr r3, [r4, #0] + 800ef98: 6960 ldr r0, [r4, #20] + 800ef9a: 1a5b subs r3, r3, r1 + 800ef9c: 9302 str r3, [sp, #8] + 800ef9e: 2303 movs r3, #3 + 800efa0: 4343 muls r3, r0 + 800efa2: 0fdd lsrs r5, r3, #31 + 800efa4: 18ed adds r5, r5, r3 + 800efa6: 9b01 ldr r3, [sp, #4] + 800efa8: 9802 ldr r0, [sp, #8] + 800efaa: 3301 adds r3, #1 + 800efac: 181b adds r3, r3, r0 + 800efae: 106d asrs r5, r5, #1 + 800efb0: 42ab cmp r3, r5 + 800efb2: d900 bls.n 800efb6 <__ssputs_r+0x3e> + 800efb4: 001d movs r5, r3 + 800efb6: 0553 lsls r3, r2, #21 + 800efb8: d532 bpl.n 800f020 <__ssputs_r+0xa8> + 800efba: 0029 movs r1, r5 + 800efbc: 0038 movs r0, r7 + 800efbe: f7ff fe51 bl 800ec64 <_malloc_r> + 800efc2: 1e06 subs r6, r0, #0 + 800efc4: d109 bne.n 800efda <__ssputs_r+0x62> + 800efc6: 230c movs r3, #12 + 800efc8: 603b str r3, [r7, #0] + 800efca: 2340 movs r3, #64 ; 0x40 + 800efcc: 2001 movs r0, #1 + 800efce: 89a2 ldrh r2, [r4, #12] + 800efd0: 4240 negs r0, r0 + 800efd2: 4313 orrs r3, r2 + 800efd4: 81a3 strh r3, [r4, #12] + 800efd6: b005 add sp, #20 + 800efd8: bdf0 pop {r4, r5, r6, r7, pc} + 800efda: 9a02 ldr r2, [sp, #8] + 800efdc: 6921 ldr r1, [r4, #16] + 800efde: f7ff fe0d bl 800ebfc + 800efe2: 89a3 ldrh r3, [r4, #12] + 800efe4: 4a14 ldr r2, [pc, #80] ; (800f038 <__ssputs_r+0xc0>) + 800efe6: 401a ands r2, r3 + 800efe8: 2380 movs r3, #128 ; 0x80 + 800efea: 4313 orrs r3, r2 + 800efec: 81a3 strh r3, [r4, #12] + 800efee: 9b02 ldr r3, [sp, #8] + 800eff0: 6126 str r6, [r4, #16] + 800eff2: 18f6 adds r6, r6, r3 + 800eff4: 6026 str r6, [r4, #0] + 800eff6: 6165 str r5, [r4, #20] + 800eff8: 9e01 ldr r6, [sp, #4] + 800effa: 1aed subs r5, r5, r3 + 800effc: 60a5 str r5, [r4, #8] + 800effe: 9b01 ldr r3, [sp, #4] + 800f000: 429e cmp r6, r3 + 800f002: d900 bls.n 800f006 <__ssputs_r+0x8e> + 800f004: 9e01 ldr r6, [sp, #4] + 800f006: 0032 movs r2, r6 + 800f008: 9903 ldr r1, [sp, #12] + 800f00a: 6820 ldr r0, [r4, #0] + 800f00c: f000 faa3 bl 800f556 + 800f010: 68a3 ldr r3, [r4, #8] + 800f012: 2000 movs r0, #0 + 800f014: 1b9b subs r3, r3, r6 + 800f016: 60a3 str r3, [r4, #8] + 800f018: 6823 ldr r3, [r4, #0] + 800f01a: 199e adds r6, r3, r6 + 800f01c: 6026 str r6, [r4, #0] + 800f01e: e7da b.n 800efd6 <__ssputs_r+0x5e> + 800f020: 002a movs r2, r5 + 800f022: 0038 movs r0, r7 + 800f024: f000 faaa bl 800f57c <_realloc_r> + 800f028: 1e06 subs r6, r0, #0 + 800f02a: d1e0 bne.n 800efee <__ssputs_r+0x76> + 800f02c: 0038 movs r0, r7 + 800f02e: 6921 ldr r1, [r4, #16] + 800f030: f7ff ff58 bl 800eee4 <_free_r> + 800f034: e7c7 b.n 800efc6 <__ssputs_r+0x4e> + 800f036: 46c0 nop ; (mov r8, r8) + 800f038: fffffb7f .word 0xfffffb7f -0800e3fc <_svfiprintf_r>: - 800e3fc: b5f0 push {r4, r5, r6, r7, lr} - 800e3fe: b0a1 sub sp, #132 ; 0x84 - 800e400: 9003 str r0, [sp, #12] - 800e402: 001d movs r5, r3 - 800e404: 898b ldrh r3, [r1, #12] - 800e406: 000f movs r7, r1 - 800e408: 0016 movs r6, r2 - 800e40a: 061b lsls r3, r3, #24 - 800e40c: d511 bpl.n 800e432 <_svfiprintf_r+0x36> - 800e40e: 690b ldr r3, [r1, #16] - 800e410: 2b00 cmp r3, #0 - 800e412: d10e bne.n 800e432 <_svfiprintf_r+0x36> - 800e414: 2140 movs r1, #64 ; 0x40 - 800e416: f7ff fe05 bl 800e024 <_malloc_r> - 800e41a: 6038 str r0, [r7, #0] - 800e41c: 6138 str r0, [r7, #16] - 800e41e: 2800 cmp r0, #0 - 800e420: d105 bne.n 800e42e <_svfiprintf_r+0x32> - 800e422: 230c movs r3, #12 - 800e424: 9a03 ldr r2, [sp, #12] - 800e426: 3801 subs r0, #1 - 800e428: 6013 str r3, [r2, #0] - 800e42a: b021 add sp, #132 ; 0x84 - 800e42c: bdf0 pop {r4, r5, r6, r7, pc} - 800e42e: 2340 movs r3, #64 ; 0x40 - 800e430: 617b str r3, [r7, #20] - 800e432: 2300 movs r3, #0 - 800e434: ac08 add r4, sp, #32 - 800e436: 6163 str r3, [r4, #20] - 800e438: 3320 adds r3, #32 - 800e43a: 7663 strb r3, [r4, #25] - 800e43c: 3310 adds r3, #16 - 800e43e: 76a3 strb r3, [r4, #26] - 800e440: 9507 str r5, [sp, #28] - 800e442: 0035 movs r5, r6 - 800e444: 782b ldrb r3, [r5, #0] - 800e446: 2b00 cmp r3, #0 - 800e448: d001 beq.n 800e44e <_svfiprintf_r+0x52> - 800e44a: 2b25 cmp r3, #37 ; 0x25 - 800e44c: d147 bne.n 800e4de <_svfiprintf_r+0xe2> - 800e44e: 1bab subs r3, r5, r6 - 800e450: 9305 str r3, [sp, #20] - 800e452: 42b5 cmp r5, r6 - 800e454: d00c beq.n 800e470 <_svfiprintf_r+0x74> - 800e456: 0032 movs r2, r6 - 800e458: 0039 movs r1, r7 - 800e45a: 9803 ldr r0, [sp, #12] - 800e45c: f7ff ff6c bl 800e338 <__ssputs_r> - 800e460: 1c43 adds r3, r0, #1 - 800e462: d100 bne.n 800e466 <_svfiprintf_r+0x6a> - 800e464: e0ae b.n 800e5c4 <_svfiprintf_r+0x1c8> - 800e466: 6962 ldr r2, [r4, #20] - 800e468: 9b05 ldr r3, [sp, #20] - 800e46a: 4694 mov ip, r2 - 800e46c: 4463 add r3, ip - 800e46e: 6163 str r3, [r4, #20] - 800e470: 782b ldrb r3, [r5, #0] - 800e472: 2b00 cmp r3, #0 - 800e474: d100 bne.n 800e478 <_svfiprintf_r+0x7c> - 800e476: e0a5 b.n 800e5c4 <_svfiprintf_r+0x1c8> - 800e478: 2201 movs r2, #1 - 800e47a: 2300 movs r3, #0 - 800e47c: 4252 negs r2, r2 - 800e47e: 6062 str r2, [r4, #4] - 800e480: a904 add r1, sp, #16 - 800e482: 3254 adds r2, #84 ; 0x54 - 800e484: 1852 adds r2, r2, r1 - 800e486: 1c6e adds r6, r5, #1 - 800e488: 6023 str r3, [r4, #0] - 800e48a: 60e3 str r3, [r4, #12] - 800e48c: 60a3 str r3, [r4, #8] - 800e48e: 7013 strb r3, [r2, #0] - 800e490: 65a3 str r3, [r4, #88] ; 0x58 - 800e492: 2205 movs r2, #5 - 800e494: 7831 ldrb r1, [r6, #0] - 800e496: 4854 ldr r0, [pc, #336] ; (800e5e8 <_svfiprintf_r+0x1ec>) - 800e498: f000 fa32 bl 800e900 - 800e49c: 1c75 adds r5, r6, #1 - 800e49e: 2800 cmp r0, #0 - 800e4a0: d11f bne.n 800e4e2 <_svfiprintf_r+0xe6> - 800e4a2: 6822 ldr r2, [r4, #0] - 800e4a4: 06d3 lsls r3, r2, #27 - 800e4a6: d504 bpl.n 800e4b2 <_svfiprintf_r+0xb6> - 800e4a8: 2353 movs r3, #83 ; 0x53 - 800e4aa: a904 add r1, sp, #16 - 800e4ac: 185b adds r3, r3, r1 - 800e4ae: 2120 movs r1, #32 - 800e4b0: 7019 strb r1, [r3, #0] - 800e4b2: 0713 lsls r3, r2, #28 - 800e4b4: d504 bpl.n 800e4c0 <_svfiprintf_r+0xc4> - 800e4b6: 2353 movs r3, #83 ; 0x53 - 800e4b8: a904 add r1, sp, #16 - 800e4ba: 185b adds r3, r3, r1 - 800e4bc: 212b movs r1, #43 ; 0x2b - 800e4be: 7019 strb r1, [r3, #0] - 800e4c0: 7833 ldrb r3, [r6, #0] - 800e4c2: 2b2a cmp r3, #42 ; 0x2a - 800e4c4: d016 beq.n 800e4f4 <_svfiprintf_r+0xf8> - 800e4c6: 0035 movs r5, r6 - 800e4c8: 2100 movs r1, #0 - 800e4ca: 200a movs r0, #10 - 800e4cc: 68e3 ldr r3, [r4, #12] - 800e4ce: 782a ldrb r2, [r5, #0] - 800e4d0: 1c6e adds r6, r5, #1 - 800e4d2: 3a30 subs r2, #48 ; 0x30 - 800e4d4: 2a09 cmp r2, #9 - 800e4d6: d94e bls.n 800e576 <_svfiprintf_r+0x17a> - 800e4d8: 2900 cmp r1, #0 - 800e4da: d111 bne.n 800e500 <_svfiprintf_r+0x104> - 800e4dc: e017 b.n 800e50e <_svfiprintf_r+0x112> - 800e4de: 3501 adds r5, #1 - 800e4e0: e7b0 b.n 800e444 <_svfiprintf_r+0x48> - 800e4e2: 4b41 ldr r3, [pc, #260] ; (800e5e8 <_svfiprintf_r+0x1ec>) - 800e4e4: 6822 ldr r2, [r4, #0] - 800e4e6: 1ac0 subs r0, r0, r3 - 800e4e8: 2301 movs r3, #1 - 800e4ea: 4083 lsls r3, r0 - 800e4ec: 4313 orrs r3, r2 - 800e4ee: 002e movs r6, r5 - 800e4f0: 6023 str r3, [r4, #0] - 800e4f2: e7ce b.n 800e492 <_svfiprintf_r+0x96> - 800e4f4: 9b07 ldr r3, [sp, #28] - 800e4f6: 1d19 adds r1, r3, #4 - 800e4f8: 681b ldr r3, [r3, #0] - 800e4fa: 9107 str r1, [sp, #28] - 800e4fc: 2b00 cmp r3, #0 - 800e4fe: db01 blt.n 800e504 <_svfiprintf_r+0x108> - 800e500: 930b str r3, [sp, #44] ; 0x2c - 800e502: e004 b.n 800e50e <_svfiprintf_r+0x112> - 800e504: 425b negs r3, r3 - 800e506: 60e3 str r3, [r4, #12] - 800e508: 2302 movs r3, #2 - 800e50a: 4313 orrs r3, r2 - 800e50c: 6023 str r3, [r4, #0] - 800e50e: 782b ldrb r3, [r5, #0] - 800e510: 2b2e cmp r3, #46 ; 0x2e - 800e512: d10a bne.n 800e52a <_svfiprintf_r+0x12e> - 800e514: 786b ldrb r3, [r5, #1] - 800e516: 2b2a cmp r3, #42 ; 0x2a - 800e518: d135 bne.n 800e586 <_svfiprintf_r+0x18a> - 800e51a: 9b07 ldr r3, [sp, #28] - 800e51c: 3502 adds r5, #2 - 800e51e: 1d1a adds r2, r3, #4 - 800e520: 681b ldr r3, [r3, #0] - 800e522: 9207 str r2, [sp, #28] - 800e524: 2b00 cmp r3, #0 - 800e526: db2b blt.n 800e580 <_svfiprintf_r+0x184> - 800e528: 9309 str r3, [sp, #36] ; 0x24 - 800e52a: 4e30 ldr r6, [pc, #192] ; (800e5ec <_svfiprintf_r+0x1f0>) - 800e52c: 2203 movs r2, #3 - 800e52e: 0030 movs r0, r6 - 800e530: 7829 ldrb r1, [r5, #0] - 800e532: f000 f9e5 bl 800e900 - 800e536: 2800 cmp r0, #0 - 800e538: d006 beq.n 800e548 <_svfiprintf_r+0x14c> - 800e53a: 2340 movs r3, #64 ; 0x40 - 800e53c: 1b80 subs r0, r0, r6 - 800e53e: 4083 lsls r3, r0 - 800e540: 6822 ldr r2, [r4, #0] - 800e542: 3501 adds r5, #1 - 800e544: 4313 orrs r3, r2 - 800e546: 6023 str r3, [r4, #0] - 800e548: 7829 ldrb r1, [r5, #0] - 800e54a: 2206 movs r2, #6 - 800e54c: 4828 ldr r0, [pc, #160] ; (800e5f0 <_svfiprintf_r+0x1f4>) - 800e54e: 1c6e adds r6, r5, #1 - 800e550: 7621 strb r1, [r4, #24] - 800e552: f000 f9d5 bl 800e900 - 800e556: 2800 cmp r0, #0 - 800e558: d03c beq.n 800e5d4 <_svfiprintf_r+0x1d8> - 800e55a: 4b26 ldr r3, [pc, #152] ; (800e5f4 <_svfiprintf_r+0x1f8>) - 800e55c: 2b00 cmp r3, #0 - 800e55e: d125 bne.n 800e5ac <_svfiprintf_r+0x1b0> - 800e560: 2207 movs r2, #7 - 800e562: 9b07 ldr r3, [sp, #28] - 800e564: 3307 adds r3, #7 - 800e566: 4393 bics r3, r2 - 800e568: 3308 adds r3, #8 - 800e56a: 9307 str r3, [sp, #28] - 800e56c: 6963 ldr r3, [r4, #20] - 800e56e: 9a04 ldr r2, [sp, #16] - 800e570: 189b adds r3, r3, r2 - 800e572: 6163 str r3, [r4, #20] - 800e574: e765 b.n 800e442 <_svfiprintf_r+0x46> - 800e576: 4343 muls r3, r0 - 800e578: 0035 movs r5, r6 - 800e57a: 2101 movs r1, #1 - 800e57c: 189b adds r3, r3, r2 - 800e57e: e7a6 b.n 800e4ce <_svfiprintf_r+0xd2> - 800e580: 2301 movs r3, #1 - 800e582: 425b negs r3, r3 - 800e584: e7d0 b.n 800e528 <_svfiprintf_r+0x12c> - 800e586: 2300 movs r3, #0 - 800e588: 200a movs r0, #10 - 800e58a: 001a movs r2, r3 - 800e58c: 3501 adds r5, #1 - 800e58e: 6063 str r3, [r4, #4] - 800e590: 7829 ldrb r1, [r5, #0] - 800e592: 1c6e adds r6, r5, #1 - 800e594: 3930 subs r1, #48 ; 0x30 - 800e596: 2909 cmp r1, #9 - 800e598: d903 bls.n 800e5a2 <_svfiprintf_r+0x1a6> - 800e59a: 2b00 cmp r3, #0 - 800e59c: d0c5 beq.n 800e52a <_svfiprintf_r+0x12e> - 800e59e: 9209 str r2, [sp, #36] ; 0x24 - 800e5a0: e7c3 b.n 800e52a <_svfiprintf_r+0x12e> - 800e5a2: 4342 muls r2, r0 - 800e5a4: 0035 movs r5, r6 - 800e5a6: 2301 movs r3, #1 - 800e5a8: 1852 adds r2, r2, r1 - 800e5aa: e7f1 b.n 800e590 <_svfiprintf_r+0x194> - 800e5ac: ab07 add r3, sp, #28 - 800e5ae: 9300 str r3, [sp, #0] - 800e5b0: 003a movs r2, r7 - 800e5b2: 0021 movs r1, r4 - 800e5b4: 4b10 ldr r3, [pc, #64] ; (800e5f8 <_svfiprintf_r+0x1fc>) - 800e5b6: 9803 ldr r0, [sp, #12] - 800e5b8: e000 b.n 800e5bc <_svfiprintf_r+0x1c0> - 800e5ba: bf00 nop - 800e5bc: 9004 str r0, [sp, #16] - 800e5be: 9b04 ldr r3, [sp, #16] - 800e5c0: 3301 adds r3, #1 - 800e5c2: d1d3 bne.n 800e56c <_svfiprintf_r+0x170> - 800e5c4: 89bb ldrh r3, [r7, #12] - 800e5c6: 980d ldr r0, [sp, #52] ; 0x34 - 800e5c8: 065b lsls r3, r3, #25 - 800e5ca: d400 bmi.n 800e5ce <_svfiprintf_r+0x1d2> - 800e5cc: e72d b.n 800e42a <_svfiprintf_r+0x2e> - 800e5ce: 2001 movs r0, #1 - 800e5d0: 4240 negs r0, r0 - 800e5d2: e72a b.n 800e42a <_svfiprintf_r+0x2e> - 800e5d4: ab07 add r3, sp, #28 - 800e5d6: 9300 str r3, [sp, #0] - 800e5d8: 003a movs r2, r7 - 800e5da: 0021 movs r1, r4 - 800e5dc: 4b06 ldr r3, [pc, #24] ; (800e5f8 <_svfiprintf_r+0x1fc>) - 800e5de: 9803 ldr r0, [sp, #12] - 800e5e0: f000 f87c bl 800e6dc <_printf_i> - 800e5e4: e7ea b.n 800e5bc <_svfiprintf_r+0x1c0> - 800e5e6: 46c0 nop ; (mov r8, r8) - 800e5e8: 0801037c .word 0x0801037c - 800e5ec: 08010382 .word 0x08010382 - 800e5f0: 08010386 .word 0x08010386 - 800e5f4: 00000000 .word 0x00000000 - 800e5f8: 0800e339 .word 0x0800e339 +0800f03c <_svfiprintf_r>: + 800f03c: b5f0 push {r4, r5, r6, r7, lr} + 800f03e: b0a1 sub sp, #132 ; 0x84 + 800f040: 9003 str r0, [sp, #12] + 800f042: 001d movs r5, r3 + 800f044: 898b ldrh r3, [r1, #12] + 800f046: 000f movs r7, r1 + 800f048: 0016 movs r6, r2 + 800f04a: 061b lsls r3, r3, #24 + 800f04c: d511 bpl.n 800f072 <_svfiprintf_r+0x36> + 800f04e: 690b ldr r3, [r1, #16] + 800f050: 2b00 cmp r3, #0 + 800f052: d10e bne.n 800f072 <_svfiprintf_r+0x36> + 800f054: 2140 movs r1, #64 ; 0x40 + 800f056: f7ff fe05 bl 800ec64 <_malloc_r> + 800f05a: 6038 str r0, [r7, #0] + 800f05c: 6138 str r0, [r7, #16] + 800f05e: 2800 cmp r0, #0 + 800f060: d105 bne.n 800f06e <_svfiprintf_r+0x32> + 800f062: 230c movs r3, #12 + 800f064: 9a03 ldr r2, [sp, #12] + 800f066: 3801 subs r0, #1 + 800f068: 6013 str r3, [r2, #0] + 800f06a: b021 add sp, #132 ; 0x84 + 800f06c: bdf0 pop {r4, r5, r6, r7, pc} + 800f06e: 2340 movs r3, #64 ; 0x40 + 800f070: 617b str r3, [r7, #20] + 800f072: 2300 movs r3, #0 + 800f074: ac08 add r4, sp, #32 + 800f076: 6163 str r3, [r4, #20] + 800f078: 3320 adds r3, #32 + 800f07a: 7663 strb r3, [r4, #25] + 800f07c: 3310 adds r3, #16 + 800f07e: 76a3 strb r3, [r4, #26] + 800f080: 9507 str r5, [sp, #28] + 800f082: 0035 movs r5, r6 + 800f084: 782b ldrb r3, [r5, #0] + 800f086: 2b00 cmp r3, #0 + 800f088: d001 beq.n 800f08e <_svfiprintf_r+0x52> + 800f08a: 2b25 cmp r3, #37 ; 0x25 + 800f08c: d147 bne.n 800f11e <_svfiprintf_r+0xe2> + 800f08e: 1bab subs r3, r5, r6 + 800f090: 9305 str r3, [sp, #20] + 800f092: 42b5 cmp r5, r6 + 800f094: d00c beq.n 800f0b0 <_svfiprintf_r+0x74> + 800f096: 0032 movs r2, r6 + 800f098: 0039 movs r1, r7 + 800f09a: 9803 ldr r0, [sp, #12] + 800f09c: f7ff ff6c bl 800ef78 <__ssputs_r> + 800f0a0: 1c43 adds r3, r0, #1 + 800f0a2: d100 bne.n 800f0a6 <_svfiprintf_r+0x6a> + 800f0a4: e0ae b.n 800f204 <_svfiprintf_r+0x1c8> + 800f0a6: 6962 ldr r2, [r4, #20] + 800f0a8: 9b05 ldr r3, [sp, #20] + 800f0aa: 4694 mov ip, r2 + 800f0ac: 4463 add r3, ip + 800f0ae: 6163 str r3, [r4, #20] + 800f0b0: 782b ldrb r3, [r5, #0] + 800f0b2: 2b00 cmp r3, #0 + 800f0b4: d100 bne.n 800f0b8 <_svfiprintf_r+0x7c> + 800f0b6: e0a5 b.n 800f204 <_svfiprintf_r+0x1c8> + 800f0b8: 2201 movs r2, #1 + 800f0ba: 2300 movs r3, #0 + 800f0bc: 4252 negs r2, r2 + 800f0be: 6062 str r2, [r4, #4] + 800f0c0: a904 add r1, sp, #16 + 800f0c2: 3254 adds r2, #84 ; 0x54 + 800f0c4: 1852 adds r2, r2, r1 + 800f0c6: 1c6e adds r6, r5, #1 + 800f0c8: 6023 str r3, [r4, #0] + 800f0ca: 60e3 str r3, [r4, #12] + 800f0cc: 60a3 str r3, [r4, #8] + 800f0ce: 7013 strb r3, [r2, #0] + 800f0d0: 65a3 str r3, [r4, #88] ; 0x58 + 800f0d2: 2205 movs r2, #5 + 800f0d4: 7831 ldrb r1, [r6, #0] + 800f0d6: 4854 ldr r0, [pc, #336] ; (800f228 <_svfiprintf_r+0x1ec>) + 800f0d8: f000 fa32 bl 800f540 + 800f0dc: 1c75 adds r5, r6, #1 + 800f0de: 2800 cmp r0, #0 + 800f0e0: d11f bne.n 800f122 <_svfiprintf_r+0xe6> + 800f0e2: 6822 ldr r2, [r4, #0] + 800f0e4: 06d3 lsls r3, r2, #27 + 800f0e6: d504 bpl.n 800f0f2 <_svfiprintf_r+0xb6> + 800f0e8: 2353 movs r3, #83 ; 0x53 + 800f0ea: a904 add r1, sp, #16 + 800f0ec: 185b adds r3, r3, r1 + 800f0ee: 2120 movs r1, #32 + 800f0f0: 7019 strb r1, [r3, #0] + 800f0f2: 0713 lsls r3, r2, #28 + 800f0f4: d504 bpl.n 800f100 <_svfiprintf_r+0xc4> + 800f0f6: 2353 movs r3, #83 ; 0x53 + 800f0f8: a904 add r1, sp, #16 + 800f0fa: 185b adds r3, r3, r1 + 800f0fc: 212b movs r1, #43 ; 0x2b + 800f0fe: 7019 strb r1, [r3, #0] + 800f100: 7833 ldrb r3, [r6, #0] + 800f102: 2b2a cmp r3, #42 ; 0x2a + 800f104: d016 beq.n 800f134 <_svfiprintf_r+0xf8> + 800f106: 0035 movs r5, r6 + 800f108: 2100 movs r1, #0 + 800f10a: 200a movs r0, #10 + 800f10c: 68e3 ldr r3, [r4, #12] + 800f10e: 782a ldrb r2, [r5, #0] + 800f110: 1c6e adds r6, r5, #1 + 800f112: 3a30 subs r2, #48 ; 0x30 + 800f114: 2a09 cmp r2, #9 + 800f116: d94e bls.n 800f1b6 <_svfiprintf_r+0x17a> + 800f118: 2900 cmp r1, #0 + 800f11a: d111 bne.n 800f140 <_svfiprintf_r+0x104> + 800f11c: e017 b.n 800f14e <_svfiprintf_r+0x112> + 800f11e: 3501 adds r5, #1 + 800f120: e7b0 b.n 800f084 <_svfiprintf_r+0x48> + 800f122: 4b41 ldr r3, [pc, #260] ; (800f228 <_svfiprintf_r+0x1ec>) + 800f124: 6822 ldr r2, [r4, #0] + 800f126: 1ac0 subs r0, r0, r3 + 800f128: 2301 movs r3, #1 + 800f12a: 4083 lsls r3, r0 + 800f12c: 4313 orrs r3, r2 + 800f12e: 002e movs r6, r5 + 800f130: 6023 str r3, [r4, #0] + 800f132: e7ce b.n 800f0d2 <_svfiprintf_r+0x96> + 800f134: 9b07 ldr r3, [sp, #28] + 800f136: 1d19 adds r1, r3, #4 + 800f138: 681b ldr r3, [r3, #0] + 800f13a: 9107 str r1, [sp, #28] + 800f13c: 2b00 cmp r3, #0 + 800f13e: db01 blt.n 800f144 <_svfiprintf_r+0x108> + 800f140: 930b str r3, [sp, #44] ; 0x2c + 800f142: e004 b.n 800f14e <_svfiprintf_r+0x112> + 800f144: 425b negs r3, r3 + 800f146: 60e3 str r3, [r4, #12] + 800f148: 2302 movs r3, #2 + 800f14a: 4313 orrs r3, r2 + 800f14c: 6023 str r3, [r4, #0] + 800f14e: 782b ldrb r3, [r5, #0] + 800f150: 2b2e cmp r3, #46 ; 0x2e + 800f152: d10a bne.n 800f16a <_svfiprintf_r+0x12e> + 800f154: 786b ldrb r3, [r5, #1] + 800f156: 2b2a cmp r3, #42 ; 0x2a + 800f158: d135 bne.n 800f1c6 <_svfiprintf_r+0x18a> + 800f15a: 9b07 ldr r3, [sp, #28] + 800f15c: 3502 adds r5, #2 + 800f15e: 1d1a adds r2, r3, #4 + 800f160: 681b ldr r3, [r3, #0] + 800f162: 9207 str r2, [sp, #28] + 800f164: 2b00 cmp r3, #0 + 800f166: db2b blt.n 800f1c0 <_svfiprintf_r+0x184> + 800f168: 9309 str r3, [sp, #36] ; 0x24 + 800f16a: 4e30 ldr r6, [pc, #192] ; (800f22c <_svfiprintf_r+0x1f0>) + 800f16c: 2203 movs r2, #3 + 800f16e: 0030 movs r0, r6 + 800f170: 7829 ldrb r1, [r5, #0] + 800f172: f000 f9e5 bl 800f540 + 800f176: 2800 cmp r0, #0 + 800f178: d006 beq.n 800f188 <_svfiprintf_r+0x14c> + 800f17a: 2340 movs r3, #64 ; 0x40 + 800f17c: 1b80 subs r0, r0, r6 + 800f17e: 4083 lsls r3, r0 + 800f180: 6822 ldr r2, [r4, #0] + 800f182: 3501 adds r5, #1 + 800f184: 4313 orrs r3, r2 + 800f186: 6023 str r3, [r4, #0] + 800f188: 7829 ldrb r1, [r5, #0] + 800f18a: 2206 movs r2, #6 + 800f18c: 4828 ldr r0, [pc, #160] ; (800f230 <_svfiprintf_r+0x1f4>) + 800f18e: 1c6e adds r6, r5, #1 + 800f190: 7621 strb r1, [r4, #24] + 800f192: f000 f9d5 bl 800f540 + 800f196: 2800 cmp r0, #0 + 800f198: d03c beq.n 800f214 <_svfiprintf_r+0x1d8> + 800f19a: 4b26 ldr r3, [pc, #152] ; (800f234 <_svfiprintf_r+0x1f8>) + 800f19c: 2b00 cmp r3, #0 + 800f19e: d125 bne.n 800f1ec <_svfiprintf_r+0x1b0> + 800f1a0: 2207 movs r2, #7 + 800f1a2: 9b07 ldr r3, [sp, #28] + 800f1a4: 3307 adds r3, #7 + 800f1a6: 4393 bics r3, r2 + 800f1a8: 3308 adds r3, #8 + 800f1aa: 9307 str r3, [sp, #28] + 800f1ac: 6963 ldr r3, [r4, #20] + 800f1ae: 9a04 ldr r2, [sp, #16] + 800f1b0: 189b adds r3, r3, r2 + 800f1b2: 6163 str r3, [r4, #20] + 800f1b4: e765 b.n 800f082 <_svfiprintf_r+0x46> + 800f1b6: 4343 muls r3, r0 + 800f1b8: 0035 movs r5, r6 + 800f1ba: 2101 movs r1, #1 + 800f1bc: 189b adds r3, r3, r2 + 800f1be: e7a6 b.n 800f10e <_svfiprintf_r+0xd2> + 800f1c0: 2301 movs r3, #1 + 800f1c2: 425b negs r3, r3 + 800f1c4: e7d0 b.n 800f168 <_svfiprintf_r+0x12c> + 800f1c6: 2300 movs r3, #0 + 800f1c8: 200a movs r0, #10 + 800f1ca: 001a movs r2, r3 + 800f1cc: 3501 adds r5, #1 + 800f1ce: 6063 str r3, [r4, #4] + 800f1d0: 7829 ldrb r1, [r5, #0] + 800f1d2: 1c6e adds r6, r5, #1 + 800f1d4: 3930 subs r1, #48 ; 0x30 + 800f1d6: 2909 cmp r1, #9 + 800f1d8: d903 bls.n 800f1e2 <_svfiprintf_r+0x1a6> + 800f1da: 2b00 cmp r3, #0 + 800f1dc: d0c5 beq.n 800f16a <_svfiprintf_r+0x12e> + 800f1de: 9209 str r2, [sp, #36] ; 0x24 + 800f1e0: e7c3 b.n 800f16a <_svfiprintf_r+0x12e> + 800f1e2: 4342 muls r2, r0 + 800f1e4: 0035 movs r5, r6 + 800f1e6: 2301 movs r3, #1 + 800f1e8: 1852 adds r2, r2, r1 + 800f1ea: e7f1 b.n 800f1d0 <_svfiprintf_r+0x194> + 800f1ec: ab07 add r3, sp, #28 + 800f1ee: 9300 str r3, [sp, #0] + 800f1f0: 003a movs r2, r7 + 800f1f2: 0021 movs r1, r4 + 800f1f4: 4b10 ldr r3, [pc, #64] ; (800f238 <_svfiprintf_r+0x1fc>) + 800f1f6: 9803 ldr r0, [sp, #12] + 800f1f8: e000 b.n 800f1fc <_svfiprintf_r+0x1c0> + 800f1fa: bf00 nop + 800f1fc: 9004 str r0, [sp, #16] + 800f1fe: 9b04 ldr r3, [sp, #16] + 800f200: 3301 adds r3, #1 + 800f202: d1d3 bne.n 800f1ac <_svfiprintf_r+0x170> + 800f204: 89bb ldrh r3, [r7, #12] + 800f206: 980d ldr r0, [sp, #52] ; 0x34 + 800f208: 065b lsls r3, r3, #25 + 800f20a: d400 bmi.n 800f20e <_svfiprintf_r+0x1d2> + 800f20c: e72d b.n 800f06a <_svfiprintf_r+0x2e> + 800f20e: 2001 movs r0, #1 + 800f210: 4240 negs r0, r0 + 800f212: e72a b.n 800f06a <_svfiprintf_r+0x2e> + 800f214: ab07 add r3, sp, #28 + 800f216: 9300 str r3, [sp, #0] + 800f218: 003a movs r2, r7 + 800f21a: 0021 movs r1, r4 + 800f21c: 4b06 ldr r3, [pc, #24] ; (800f238 <_svfiprintf_r+0x1fc>) + 800f21e: 9803 ldr r0, [sp, #12] + 800f220: f000 f87c bl 800f31c <_printf_i> + 800f224: e7ea b.n 800f1fc <_svfiprintf_r+0x1c0> + 800f226: 46c0 nop ; (mov r8, r8) + 800f228: 08010fe4 .word 0x08010fe4 + 800f22c: 08010fea .word 0x08010fea + 800f230: 08010fee .word 0x08010fee + 800f234: 00000000 .word 0x00000000 + 800f238: 0800ef79 .word 0x0800ef79 -0800e5fc <_printf_common>: - 800e5fc: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 800e5fe: 0015 movs r5, r2 - 800e600: 9301 str r3, [sp, #4] - 800e602: 688a ldr r2, [r1, #8] - 800e604: 690b ldr r3, [r1, #16] - 800e606: 000c movs r4, r1 - 800e608: 9000 str r0, [sp, #0] - 800e60a: 4293 cmp r3, r2 - 800e60c: da00 bge.n 800e610 <_printf_common+0x14> - 800e60e: 0013 movs r3, r2 - 800e610: 0022 movs r2, r4 - 800e612: 602b str r3, [r5, #0] - 800e614: 3243 adds r2, #67 ; 0x43 - 800e616: 7812 ldrb r2, [r2, #0] - 800e618: 2a00 cmp r2, #0 - 800e61a: d001 beq.n 800e620 <_printf_common+0x24> - 800e61c: 3301 adds r3, #1 - 800e61e: 602b str r3, [r5, #0] - 800e620: 6823 ldr r3, [r4, #0] - 800e622: 069b lsls r3, r3, #26 - 800e624: d502 bpl.n 800e62c <_printf_common+0x30> - 800e626: 682b ldr r3, [r5, #0] - 800e628: 3302 adds r3, #2 - 800e62a: 602b str r3, [r5, #0] - 800e62c: 6822 ldr r2, [r4, #0] - 800e62e: 2306 movs r3, #6 - 800e630: 0017 movs r7, r2 - 800e632: 401f ands r7, r3 - 800e634: 421a tst r2, r3 - 800e636: d027 beq.n 800e688 <_printf_common+0x8c> - 800e638: 0023 movs r3, r4 - 800e63a: 3343 adds r3, #67 ; 0x43 - 800e63c: 781b ldrb r3, [r3, #0] - 800e63e: 1e5a subs r2, r3, #1 - 800e640: 4193 sbcs r3, r2 - 800e642: 6822 ldr r2, [r4, #0] - 800e644: 0692 lsls r2, r2, #26 - 800e646: d430 bmi.n 800e6aa <_printf_common+0xae> - 800e648: 0022 movs r2, r4 - 800e64a: 9901 ldr r1, [sp, #4] - 800e64c: 9800 ldr r0, [sp, #0] - 800e64e: 9e08 ldr r6, [sp, #32] - 800e650: 3243 adds r2, #67 ; 0x43 - 800e652: 47b0 blx r6 - 800e654: 1c43 adds r3, r0, #1 - 800e656: d025 beq.n 800e6a4 <_printf_common+0xa8> - 800e658: 2306 movs r3, #6 - 800e65a: 6820 ldr r0, [r4, #0] - 800e65c: 682a ldr r2, [r5, #0] - 800e65e: 68e1 ldr r1, [r4, #12] - 800e660: 2500 movs r5, #0 - 800e662: 4003 ands r3, r0 - 800e664: 2b04 cmp r3, #4 - 800e666: d103 bne.n 800e670 <_printf_common+0x74> - 800e668: 1a8d subs r5, r1, r2 - 800e66a: 43eb mvns r3, r5 - 800e66c: 17db asrs r3, r3, #31 - 800e66e: 401d ands r5, r3 - 800e670: 68a3 ldr r3, [r4, #8] - 800e672: 6922 ldr r2, [r4, #16] - 800e674: 4293 cmp r3, r2 - 800e676: dd01 ble.n 800e67c <_printf_common+0x80> - 800e678: 1a9b subs r3, r3, r2 - 800e67a: 18ed adds r5, r5, r3 - 800e67c: 2700 movs r7, #0 - 800e67e: 42bd cmp r5, r7 - 800e680: d120 bne.n 800e6c4 <_printf_common+0xc8> - 800e682: 2000 movs r0, #0 - 800e684: e010 b.n 800e6a8 <_printf_common+0xac> - 800e686: 3701 adds r7, #1 - 800e688: 68e3 ldr r3, [r4, #12] - 800e68a: 682a ldr r2, [r5, #0] - 800e68c: 1a9b subs r3, r3, r2 - 800e68e: 42bb cmp r3, r7 - 800e690: ddd2 ble.n 800e638 <_printf_common+0x3c> - 800e692: 0022 movs r2, r4 - 800e694: 2301 movs r3, #1 - 800e696: 9901 ldr r1, [sp, #4] - 800e698: 9800 ldr r0, [sp, #0] - 800e69a: 9e08 ldr r6, [sp, #32] - 800e69c: 3219 adds r2, #25 - 800e69e: 47b0 blx r6 - 800e6a0: 1c43 adds r3, r0, #1 - 800e6a2: d1f0 bne.n 800e686 <_printf_common+0x8a> - 800e6a4: 2001 movs r0, #1 - 800e6a6: 4240 negs r0, r0 - 800e6a8: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} - 800e6aa: 2030 movs r0, #48 ; 0x30 - 800e6ac: 18e1 adds r1, r4, r3 - 800e6ae: 3143 adds r1, #67 ; 0x43 - 800e6b0: 7008 strb r0, [r1, #0] - 800e6b2: 0021 movs r1, r4 - 800e6b4: 1c5a adds r2, r3, #1 - 800e6b6: 3145 adds r1, #69 ; 0x45 - 800e6b8: 7809 ldrb r1, [r1, #0] - 800e6ba: 18a2 adds r2, r4, r2 - 800e6bc: 3243 adds r2, #67 ; 0x43 - 800e6be: 3302 adds r3, #2 - 800e6c0: 7011 strb r1, [r2, #0] - 800e6c2: e7c1 b.n 800e648 <_printf_common+0x4c> - 800e6c4: 0022 movs r2, r4 - 800e6c6: 2301 movs r3, #1 - 800e6c8: 9901 ldr r1, [sp, #4] - 800e6ca: 9800 ldr r0, [sp, #0] - 800e6cc: 9e08 ldr r6, [sp, #32] - 800e6ce: 321a adds r2, #26 - 800e6d0: 47b0 blx r6 - 800e6d2: 1c43 adds r3, r0, #1 - 800e6d4: d0e6 beq.n 800e6a4 <_printf_common+0xa8> - 800e6d6: 3701 adds r7, #1 - 800e6d8: e7d1 b.n 800e67e <_printf_common+0x82> +0800f23c <_printf_common>: + 800f23c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 800f23e: 0015 movs r5, r2 + 800f240: 9301 str r3, [sp, #4] + 800f242: 688a ldr r2, [r1, #8] + 800f244: 690b ldr r3, [r1, #16] + 800f246: 000c movs r4, r1 + 800f248: 9000 str r0, [sp, #0] + 800f24a: 4293 cmp r3, r2 + 800f24c: da00 bge.n 800f250 <_printf_common+0x14> + 800f24e: 0013 movs r3, r2 + 800f250: 0022 movs r2, r4 + 800f252: 602b str r3, [r5, #0] + 800f254: 3243 adds r2, #67 ; 0x43 + 800f256: 7812 ldrb r2, [r2, #0] + 800f258: 2a00 cmp r2, #0 + 800f25a: d001 beq.n 800f260 <_printf_common+0x24> + 800f25c: 3301 adds r3, #1 + 800f25e: 602b str r3, [r5, #0] + 800f260: 6823 ldr r3, [r4, #0] + 800f262: 069b lsls r3, r3, #26 + 800f264: d502 bpl.n 800f26c <_printf_common+0x30> + 800f266: 682b ldr r3, [r5, #0] + 800f268: 3302 adds r3, #2 + 800f26a: 602b str r3, [r5, #0] + 800f26c: 6822 ldr r2, [r4, #0] + 800f26e: 2306 movs r3, #6 + 800f270: 0017 movs r7, r2 + 800f272: 401f ands r7, r3 + 800f274: 421a tst r2, r3 + 800f276: d027 beq.n 800f2c8 <_printf_common+0x8c> + 800f278: 0023 movs r3, r4 + 800f27a: 3343 adds r3, #67 ; 0x43 + 800f27c: 781b ldrb r3, [r3, #0] + 800f27e: 1e5a subs r2, r3, #1 + 800f280: 4193 sbcs r3, r2 + 800f282: 6822 ldr r2, [r4, #0] + 800f284: 0692 lsls r2, r2, #26 + 800f286: d430 bmi.n 800f2ea <_printf_common+0xae> + 800f288: 0022 movs r2, r4 + 800f28a: 9901 ldr r1, [sp, #4] + 800f28c: 9800 ldr r0, [sp, #0] + 800f28e: 9e08 ldr r6, [sp, #32] + 800f290: 3243 adds r2, #67 ; 0x43 + 800f292: 47b0 blx r6 + 800f294: 1c43 adds r3, r0, #1 + 800f296: d025 beq.n 800f2e4 <_printf_common+0xa8> + 800f298: 2306 movs r3, #6 + 800f29a: 6820 ldr r0, [r4, #0] + 800f29c: 682a ldr r2, [r5, #0] + 800f29e: 68e1 ldr r1, [r4, #12] + 800f2a0: 2500 movs r5, #0 + 800f2a2: 4003 ands r3, r0 + 800f2a4: 2b04 cmp r3, #4 + 800f2a6: d103 bne.n 800f2b0 <_printf_common+0x74> + 800f2a8: 1a8d subs r5, r1, r2 + 800f2aa: 43eb mvns r3, r5 + 800f2ac: 17db asrs r3, r3, #31 + 800f2ae: 401d ands r5, r3 + 800f2b0: 68a3 ldr r3, [r4, #8] + 800f2b2: 6922 ldr r2, [r4, #16] + 800f2b4: 4293 cmp r3, r2 + 800f2b6: dd01 ble.n 800f2bc <_printf_common+0x80> + 800f2b8: 1a9b subs r3, r3, r2 + 800f2ba: 18ed adds r5, r5, r3 + 800f2bc: 2700 movs r7, #0 + 800f2be: 42bd cmp r5, r7 + 800f2c0: d120 bne.n 800f304 <_printf_common+0xc8> + 800f2c2: 2000 movs r0, #0 + 800f2c4: e010 b.n 800f2e8 <_printf_common+0xac> + 800f2c6: 3701 adds r7, #1 + 800f2c8: 68e3 ldr r3, [r4, #12] + 800f2ca: 682a ldr r2, [r5, #0] + 800f2cc: 1a9b subs r3, r3, r2 + 800f2ce: 42bb cmp r3, r7 + 800f2d0: ddd2 ble.n 800f278 <_printf_common+0x3c> + 800f2d2: 0022 movs r2, r4 + 800f2d4: 2301 movs r3, #1 + 800f2d6: 9901 ldr r1, [sp, #4] + 800f2d8: 9800 ldr r0, [sp, #0] + 800f2da: 9e08 ldr r6, [sp, #32] + 800f2dc: 3219 adds r2, #25 + 800f2de: 47b0 blx r6 + 800f2e0: 1c43 adds r3, r0, #1 + 800f2e2: d1f0 bne.n 800f2c6 <_printf_common+0x8a> + 800f2e4: 2001 movs r0, #1 + 800f2e6: 4240 negs r0, r0 + 800f2e8: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 800f2ea: 2030 movs r0, #48 ; 0x30 + 800f2ec: 18e1 adds r1, r4, r3 + 800f2ee: 3143 adds r1, #67 ; 0x43 + 800f2f0: 7008 strb r0, [r1, #0] + 800f2f2: 0021 movs r1, r4 + 800f2f4: 1c5a adds r2, r3, #1 + 800f2f6: 3145 adds r1, #69 ; 0x45 + 800f2f8: 7809 ldrb r1, [r1, #0] + 800f2fa: 18a2 adds r2, r4, r2 + 800f2fc: 3243 adds r2, #67 ; 0x43 + 800f2fe: 3302 adds r3, #2 + 800f300: 7011 strb r1, [r2, #0] + 800f302: e7c1 b.n 800f288 <_printf_common+0x4c> + 800f304: 0022 movs r2, r4 + 800f306: 2301 movs r3, #1 + 800f308: 9901 ldr r1, [sp, #4] + 800f30a: 9800 ldr r0, [sp, #0] + 800f30c: 9e08 ldr r6, [sp, #32] + 800f30e: 321a adds r2, #26 + 800f310: 47b0 blx r6 + 800f312: 1c43 adds r3, r0, #1 + 800f314: d0e6 beq.n 800f2e4 <_printf_common+0xa8> + 800f316: 3701 adds r7, #1 + 800f318: e7d1 b.n 800f2be <_printf_common+0x82> ... -0800e6dc <_printf_i>: - 800e6dc: b5f0 push {r4, r5, r6, r7, lr} - 800e6de: b08b sub sp, #44 ; 0x2c - 800e6e0: 9206 str r2, [sp, #24] - 800e6e2: 000a movs r2, r1 - 800e6e4: 3243 adds r2, #67 ; 0x43 - 800e6e6: 9307 str r3, [sp, #28] - 800e6e8: 9005 str r0, [sp, #20] - 800e6ea: 9204 str r2, [sp, #16] - 800e6ec: 7e0a ldrb r2, [r1, #24] - 800e6ee: 000c movs r4, r1 - 800e6f0: 9b10 ldr r3, [sp, #64] ; 0x40 - 800e6f2: 2a78 cmp r2, #120 ; 0x78 - 800e6f4: d807 bhi.n 800e706 <_printf_i+0x2a> - 800e6f6: 2a62 cmp r2, #98 ; 0x62 - 800e6f8: d809 bhi.n 800e70e <_printf_i+0x32> - 800e6fa: 2a00 cmp r2, #0 - 800e6fc: d100 bne.n 800e700 <_printf_i+0x24> - 800e6fe: e0c1 b.n 800e884 <_printf_i+0x1a8> - 800e700: 2a58 cmp r2, #88 ; 0x58 - 800e702: d100 bne.n 800e706 <_printf_i+0x2a> - 800e704: e08c b.n 800e820 <_printf_i+0x144> - 800e706: 0026 movs r6, r4 - 800e708: 3642 adds r6, #66 ; 0x42 - 800e70a: 7032 strb r2, [r6, #0] - 800e70c: e022 b.n 800e754 <_printf_i+0x78> - 800e70e: 0010 movs r0, r2 - 800e710: 3863 subs r0, #99 ; 0x63 - 800e712: 2815 cmp r0, #21 - 800e714: d8f7 bhi.n 800e706 <_printf_i+0x2a> - 800e716: f7f1 fcff bl 8000118 <__gnu_thumb1_case_shi> - 800e71a: 0016 .short 0x0016 - 800e71c: fff6001f .word 0xfff6001f - 800e720: fff6fff6 .word 0xfff6fff6 - 800e724: 001ffff6 .word 0x001ffff6 - 800e728: fff6fff6 .word 0xfff6fff6 - 800e72c: fff6fff6 .word 0xfff6fff6 - 800e730: 003600a8 .word 0x003600a8 - 800e734: fff6009a .word 0xfff6009a - 800e738: 00b9fff6 .word 0x00b9fff6 - 800e73c: 0036fff6 .word 0x0036fff6 - 800e740: fff6fff6 .word 0xfff6fff6 - 800e744: 009e .short 0x009e - 800e746: 0026 movs r6, r4 - 800e748: 681a ldr r2, [r3, #0] - 800e74a: 3642 adds r6, #66 ; 0x42 - 800e74c: 1d11 adds r1, r2, #4 - 800e74e: 6019 str r1, [r3, #0] - 800e750: 6813 ldr r3, [r2, #0] - 800e752: 7033 strb r3, [r6, #0] - 800e754: 2301 movs r3, #1 - 800e756: e0a7 b.n 800e8a8 <_printf_i+0x1cc> - 800e758: 6808 ldr r0, [r1, #0] - 800e75a: 6819 ldr r1, [r3, #0] - 800e75c: 1d0a adds r2, r1, #4 - 800e75e: 0605 lsls r5, r0, #24 - 800e760: d50b bpl.n 800e77a <_printf_i+0x9e> - 800e762: 680d ldr r5, [r1, #0] - 800e764: 601a str r2, [r3, #0] - 800e766: 2d00 cmp r5, #0 - 800e768: da03 bge.n 800e772 <_printf_i+0x96> - 800e76a: 232d movs r3, #45 ; 0x2d - 800e76c: 9a04 ldr r2, [sp, #16] - 800e76e: 426d negs r5, r5 - 800e770: 7013 strb r3, [r2, #0] - 800e772: 4b61 ldr r3, [pc, #388] ; (800e8f8 <_printf_i+0x21c>) - 800e774: 270a movs r7, #10 - 800e776: 9303 str r3, [sp, #12] - 800e778: e01b b.n 800e7b2 <_printf_i+0xd6> - 800e77a: 680d ldr r5, [r1, #0] - 800e77c: 601a str r2, [r3, #0] - 800e77e: 0641 lsls r1, r0, #25 - 800e780: d5f1 bpl.n 800e766 <_printf_i+0x8a> - 800e782: b22d sxth r5, r5 - 800e784: e7ef b.n 800e766 <_printf_i+0x8a> - 800e786: 680d ldr r5, [r1, #0] - 800e788: 6819 ldr r1, [r3, #0] - 800e78a: 1d08 adds r0, r1, #4 - 800e78c: 6018 str r0, [r3, #0] - 800e78e: 062e lsls r6, r5, #24 - 800e790: d501 bpl.n 800e796 <_printf_i+0xba> - 800e792: 680d ldr r5, [r1, #0] - 800e794: e003 b.n 800e79e <_printf_i+0xc2> - 800e796: 066d lsls r5, r5, #25 - 800e798: d5fb bpl.n 800e792 <_printf_i+0xb6> - 800e79a: 680d ldr r5, [r1, #0] - 800e79c: b2ad uxth r5, r5 - 800e79e: 4b56 ldr r3, [pc, #344] ; (800e8f8 <_printf_i+0x21c>) - 800e7a0: 2708 movs r7, #8 - 800e7a2: 9303 str r3, [sp, #12] - 800e7a4: 2a6f cmp r2, #111 ; 0x6f - 800e7a6: d000 beq.n 800e7aa <_printf_i+0xce> - 800e7a8: 3702 adds r7, #2 - 800e7aa: 0023 movs r3, r4 - 800e7ac: 2200 movs r2, #0 - 800e7ae: 3343 adds r3, #67 ; 0x43 - 800e7b0: 701a strb r2, [r3, #0] - 800e7b2: 6863 ldr r3, [r4, #4] - 800e7b4: 60a3 str r3, [r4, #8] - 800e7b6: 2b00 cmp r3, #0 - 800e7b8: db03 blt.n 800e7c2 <_printf_i+0xe6> - 800e7ba: 2204 movs r2, #4 - 800e7bc: 6821 ldr r1, [r4, #0] - 800e7be: 4391 bics r1, r2 - 800e7c0: 6021 str r1, [r4, #0] - 800e7c2: 2d00 cmp r5, #0 - 800e7c4: d102 bne.n 800e7cc <_printf_i+0xf0> - 800e7c6: 9e04 ldr r6, [sp, #16] - 800e7c8: 2b00 cmp r3, #0 - 800e7ca: d00c beq.n 800e7e6 <_printf_i+0x10a> - 800e7cc: 9e04 ldr r6, [sp, #16] - 800e7ce: 0028 movs r0, r5 - 800e7d0: 0039 movs r1, r7 - 800e7d2: f7f1 fd31 bl 8000238 <__aeabi_uidivmod> - 800e7d6: 9b03 ldr r3, [sp, #12] - 800e7d8: 3e01 subs r6, #1 - 800e7da: 5c5b ldrb r3, [r3, r1] - 800e7dc: 7033 strb r3, [r6, #0] - 800e7de: 002b movs r3, r5 - 800e7e0: 0005 movs r5, r0 - 800e7e2: 429f cmp r7, r3 - 800e7e4: d9f3 bls.n 800e7ce <_printf_i+0xf2> - 800e7e6: 2f08 cmp r7, #8 - 800e7e8: d109 bne.n 800e7fe <_printf_i+0x122> - 800e7ea: 6823 ldr r3, [r4, #0] - 800e7ec: 07db lsls r3, r3, #31 - 800e7ee: d506 bpl.n 800e7fe <_printf_i+0x122> - 800e7f0: 6863 ldr r3, [r4, #4] - 800e7f2: 6922 ldr r2, [r4, #16] - 800e7f4: 4293 cmp r3, r2 - 800e7f6: dc02 bgt.n 800e7fe <_printf_i+0x122> - 800e7f8: 2330 movs r3, #48 ; 0x30 - 800e7fa: 3e01 subs r6, #1 - 800e7fc: 7033 strb r3, [r6, #0] - 800e7fe: 9b04 ldr r3, [sp, #16] - 800e800: 1b9b subs r3, r3, r6 - 800e802: 6123 str r3, [r4, #16] - 800e804: 9b07 ldr r3, [sp, #28] - 800e806: 0021 movs r1, r4 - 800e808: 9300 str r3, [sp, #0] - 800e80a: 9805 ldr r0, [sp, #20] - 800e80c: 9b06 ldr r3, [sp, #24] - 800e80e: aa09 add r2, sp, #36 ; 0x24 - 800e810: f7ff fef4 bl 800e5fc <_printf_common> - 800e814: 1c43 adds r3, r0, #1 - 800e816: d14c bne.n 800e8b2 <_printf_i+0x1d6> - 800e818: 2001 movs r0, #1 - 800e81a: 4240 negs r0, r0 - 800e81c: b00b add sp, #44 ; 0x2c - 800e81e: bdf0 pop {r4, r5, r6, r7, pc} - 800e820: 3145 adds r1, #69 ; 0x45 - 800e822: 700a strb r2, [r1, #0] - 800e824: 4a34 ldr r2, [pc, #208] ; (800e8f8 <_printf_i+0x21c>) - 800e826: 9203 str r2, [sp, #12] - 800e828: 681a ldr r2, [r3, #0] - 800e82a: 6821 ldr r1, [r4, #0] - 800e82c: ca20 ldmia r2!, {r5} - 800e82e: 601a str r2, [r3, #0] - 800e830: 0608 lsls r0, r1, #24 - 800e832: d516 bpl.n 800e862 <_printf_i+0x186> - 800e834: 07cb lsls r3, r1, #31 - 800e836: d502 bpl.n 800e83e <_printf_i+0x162> - 800e838: 2320 movs r3, #32 - 800e83a: 4319 orrs r1, r3 - 800e83c: 6021 str r1, [r4, #0] - 800e83e: 2710 movs r7, #16 - 800e840: 2d00 cmp r5, #0 - 800e842: d1b2 bne.n 800e7aa <_printf_i+0xce> - 800e844: 2320 movs r3, #32 - 800e846: 6822 ldr r2, [r4, #0] - 800e848: 439a bics r2, r3 - 800e84a: 6022 str r2, [r4, #0] - 800e84c: e7ad b.n 800e7aa <_printf_i+0xce> - 800e84e: 2220 movs r2, #32 - 800e850: 6809 ldr r1, [r1, #0] - 800e852: 430a orrs r2, r1 - 800e854: 6022 str r2, [r4, #0] - 800e856: 0022 movs r2, r4 - 800e858: 2178 movs r1, #120 ; 0x78 - 800e85a: 3245 adds r2, #69 ; 0x45 - 800e85c: 7011 strb r1, [r2, #0] - 800e85e: 4a27 ldr r2, [pc, #156] ; (800e8fc <_printf_i+0x220>) - 800e860: e7e1 b.n 800e826 <_printf_i+0x14a> - 800e862: 0648 lsls r0, r1, #25 - 800e864: d5e6 bpl.n 800e834 <_printf_i+0x158> - 800e866: b2ad uxth r5, r5 - 800e868: e7e4 b.n 800e834 <_printf_i+0x158> - 800e86a: 681a ldr r2, [r3, #0] - 800e86c: 680d ldr r5, [r1, #0] - 800e86e: 1d10 adds r0, r2, #4 - 800e870: 6949 ldr r1, [r1, #20] - 800e872: 6018 str r0, [r3, #0] - 800e874: 6813 ldr r3, [r2, #0] - 800e876: 062e lsls r6, r5, #24 - 800e878: d501 bpl.n 800e87e <_printf_i+0x1a2> - 800e87a: 6019 str r1, [r3, #0] - 800e87c: e002 b.n 800e884 <_printf_i+0x1a8> - 800e87e: 066d lsls r5, r5, #25 - 800e880: d5fb bpl.n 800e87a <_printf_i+0x19e> - 800e882: 8019 strh r1, [r3, #0] - 800e884: 2300 movs r3, #0 - 800e886: 9e04 ldr r6, [sp, #16] - 800e888: 6123 str r3, [r4, #16] - 800e88a: e7bb b.n 800e804 <_printf_i+0x128> - 800e88c: 681a ldr r2, [r3, #0] - 800e88e: 1d11 adds r1, r2, #4 - 800e890: 6019 str r1, [r3, #0] - 800e892: 6816 ldr r6, [r2, #0] - 800e894: 2100 movs r1, #0 - 800e896: 0030 movs r0, r6 - 800e898: 6862 ldr r2, [r4, #4] - 800e89a: f000 f831 bl 800e900 - 800e89e: 2800 cmp r0, #0 - 800e8a0: d001 beq.n 800e8a6 <_printf_i+0x1ca> - 800e8a2: 1b80 subs r0, r0, r6 - 800e8a4: 6060 str r0, [r4, #4] - 800e8a6: 6863 ldr r3, [r4, #4] - 800e8a8: 6123 str r3, [r4, #16] - 800e8aa: 2300 movs r3, #0 - 800e8ac: 9a04 ldr r2, [sp, #16] - 800e8ae: 7013 strb r3, [r2, #0] - 800e8b0: e7a8 b.n 800e804 <_printf_i+0x128> - 800e8b2: 6923 ldr r3, [r4, #16] - 800e8b4: 0032 movs r2, r6 - 800e8b6: 9906 ldr r1, [sp, #24] - 800e8b8: 9805 ldr r0, [sp, #20] - 800e8ba: 9d07 ldr r5, [sp, #28] - 800e8bc: 47a8 blx r5 - 800e8be: 1c43 adds r3, r0, #1 - 800e8c0: d0aa beq.n 800e818 <_printf_i+0x13c> - 800e8c2: 6823 ldr r3, [r4, #0] - 800e8c4: 079b lsls r3, r3, #30 - 800e8c6: d415 bmi.n 800e8f4 <_printf_i+0x218> - 800e8c8: 9b09 ldr r3, [sp, #36] ; 0x24 - 800e8ca: 68e0 ldr r0, [r4, #12] - 800e8cc: 4298 cmp r0, r3 - 800e8ce: daa5 bge.n 800e81c <_printf_i+0x140> - 800e8d0: 0018 movs r0, r3 - 800e8d2: e7a3 b.n 800e81c <_printf_i+0x140> - 800e8d4: 0022 movs r2, r4 - 800e8d6: 2301 movs r3, #1 - 800e8d8: 9906 ldr r1, [sp, #24] - 800e8da: 9805 ldr r0, [sp, #20] - 800e8dc: 9e07 ldr r6, [sp, #28] - 800e8de: 3219 adds r2, #25 - 800e8e0: 47b0 blx r6 - 800e8e2: 1c43 adds r3, r0, #1 - 800e8e4: d098 beq.n 800e818 <_printf_i+0x13c> - 800e8e6: 3501 adds r5, #1 - 800e8e8: 68e3 ldr r3, [r4, #12] - 800e8ea: 9a09 ldr r2, [sp, #36] ; 0x24 - 800e8ec: 1a9b subs r3, r3, r2 - 800e8ee: 42ab cmp r3, r5 - 800e8f0: dcf0 bgt.n 800e8d4 <_printf_i+0x1f8> - 800e8f2: e7e9 b.n 800e8c8 <_printf_i+0x1ec> - 800e8f4: 2500 movs r5, #0 - 800e8f6: e7f7 b.n 800e8e8 <_printf_i+0x20c> - 800e8f8: 0801038d .word 0x0801038d - 800e8fc: 0801039e .word 0x0801039e +0800f31c <_printf_i>: + 800f31c: b5f0 push {r4, r5, r6, r7, lr} + 800f31e: b08b sub sp, #44 ; 0x2c + 800f320: 9206 str r2, [sp, #24] + 800f322: 000a movs r2, r1 + 800f324: 3243 adds r2, #67 ; 0x43 + 800f326: 9307 str r3, [sp, #28] + 800f328: 9005 str r0, [sp, #20] + 800f32a: 9204 str r2, [sp, #16] + 800f32c: 7e0a ldrb r2, [r1, #24] + 800f32e: 000c movs r4, r1 + 800f330: 9b10 ldr r3, [sp, #64] ; 0x40 + 800f332: 2a78 cmp r2, #120 ; 0x78 + 800f334: d807 bhi.n 800f346 <_printf_i+0x2a> + 800f336: 2a62 cmp r2, #98 ; 0x62 + 800f338: d809 bhi.n 800f34e <_printf_i+0x32> + 800f33a: 2a00 cmp r2, #0 + 800f33c: d100 bne.n 800f340 <_printf_i+0x24> + 800f33e: e0c1 b.n 800f4c4 <_printf_i+0x1a8> + 800f340: 2a58 cmp r2, #88 ; 0x58 + 800f342: d100 bne.n 800f346 <_printf_i+0x2a> + 800f344: e08c b.n 800f460 <_printf_i+0x144> + 800f346: 0026 movs r6, r4 + 800f348: 3642 adds r6, #66 ; 0x42 + 800f34a: 7032 strb r2, [r6, #0] + 800f34c: e022 b.n 800f394 <_printf_i+0x78> + 800f34e: 0010 movs r0, r2 + 800f350: 3863 subs r0, #99 ; 0x63 + 800f352: 2815 cmp r0, #21 + 800f354: d8f7 bhi.n 800f346 <_printf_i+0x2a> + 800f356: f7f0 fedf bl 8000118 <__gnu_thumb1_case_shi> + 800f35a: 0016 .short 0x0016 + 800f35c: fff6001f .word 0xfff6001f + 800f360: fff6fff6 .word 0xfff6fff6 + 800f364: 001ffff6 .word 0x001ffff6 + 800f368: fff6fff6 .word 0xfff6fff6 + 800f36c: fff6fff6 .word 0xfff6fff6 + 800f370: 003600a8 .word 0x003600a8 + 800f374: fff6009a .word 0xfff6009a + 800f378: 00b9fff6 .word 0x00b9fff6 + 800f37c: 0036fff6 .word 0x0036fff6 + 800f380: fff6fff6 .word 0xfff6fff6 + 800f384: 009e .short 0x009e + 800f386: 0026 movs r6, r4 + 800f388: 681a ldr r2, [r3, #0] + 800f38a: 3642 adds r6, #66 ; 0x42 + 800f38c: 1d11 adds r1, r2, #4 + 800f38e: 6019 str r1, [r3, #0] + 800f390: 6813 ldr r3, [r2, #0] + 800f392: 7033 strb r3, [r6, #0] + 800f394: 2301 movs r3, #1 + 800f396: e0a7 b.n 800f4e8 <_printf_i+0x1cc> + 800f398: 6808 ldr r0, [r1, #0] + 800f39a: 6819 ldr r1, [r3, #0] + 800f39c: 1d0a adds r2, r1, #4 + 800f39e: 0605 lsls r5, r0, #24 + 800f3a0: d50b bpl.n 800f3ba <_printf_i+0x9e> + 800f3a2: 680d ldr r5, [r1, #0] + 800f3a4: 601a str r2, [r3, #0] + 800f3a6: 2d00 cmp r5, #0 + 800f3a8: da03 bge.n 800f3b2 <_printf_i+0x96> + 800f3aa: 232d movs r3, #45 ; 0x2d + 800f3ac: 9a04 ldr r2, [sp, #16] + 800f3ae: 426d negs r5, r5 + 800f3b0: 7013 strb r3, [r2, #0] + 800f3b2: 4b61 ldr r3, [pc, #388] ; (800f538 <_printf_i+0x21c>) + 800f3b4: 270a movs r7, #10 + 800f3b6: 9303 str r3, [sp, #12] + 800f3b8: e01b b.n 800f3f2 <_printf_i+0xd6> + 800f3ba: 680d ldr r5, [r1, #0] + 800f3bc: 601a str r2, [r3, #0] + 800f3be: 0641 lsls r1, r0, #25 + 800f3c0: d5f1 bpl.n 800f3a6 <_printf_i+0x8a> + 800f3c2: b22d sxth r5, r5 + 800f3c4: e7ef b.n 800f3a6 <_printf_i+0x8a> + 800f3c6: 680d ldr r5, [r1, #0] + 800f3c8: 6819 ldr r1, [r3, #0] + 800f3ca: 1d08 adds r0, r1, #4 + 800f3cc: 6018 str r0, [r3, #0] + 800f3ce: 062e lsls r6, r5, #24 + 800f3d0: d501 bpl.n 800f3d6 <_printf_i+0xba> + 800f3d2: 680d ldr r5, [r1, #0] + 800f3d4: e003 b.n 800f3de <_printf_i+0xc2> + 800f3d6: 066d lsls r5, r5, #25 + 800f3d8: d5fb bpl.n 800f3d2 <_printf_i+0xb6> + 800f3da: 680d ldr r5, [r1, #0] + 800f3dc: b2ad uxth r5, r5 + 800f3de: 4b56 ldr r3, [pc, #344] ; (800f538 <_printf_i+0x21c>) + 800f3e0: 2708 movs r7, #8 + 800f3e2: 9303 str r3, [sp, #12] + 800f3e4: 2a6f cmp r2, #111 ; 0x6f + 800f3e6: d000 beq.n 800f3ea <_printf_i+0xce> + 800f3e8: 3702 adds r7, #2 + 800f3ea: 0023 movs r3, r4 + 800f3ec: 2200 movs r2, #0 + 800f3ee: 3343 adds r3, #67 ; 0x43 + 800f3f0: 701a strb r2, [r3, #0] + 800f3f2: 6863 ldr r3, [r4, #4] + 800f3f4: 60a3 str r3, [r4, #8] + 800f3f6: 2b00 cmp r3, #0 + 800f3f8: db03 blt.n 800f402 <_printf_i+0xe6> + 800f3fa: 2204 movs r2, #4 + 800f3fc: 6821 ldr r1, [r4, #0] + 800f3fe: 4391 bics r1, r2 + 800f400: 6021 str r1, [r4, #0] + 800f402: 2d00 cmp r5, #0 + 800f404: d102 bne.n 800f40c <_printf_i+0xf0> + 800f406: 9e04 ldr r6, [sp, #16] + 800f408: 2b00 cmp r3, #0 + 800f40a: d00c beq.n 800f426 <_printf_i+0x10a> + 800f40c: 9e04 ldr r6, [sp, #16] + 800f40e: 0028 movs r0, r5 + 800f410: 0039 movs r1, r7 + 800f412: f7f0 ff11 bl 8000238 <__aeabi_uidivmod> + 800f416: 9b03 ldr r3, [sp, #12] + 800f418: 3e01 subs r6, #1 + 800f41a: 5c5b ldrb r3, [r3, r1] + 800f41c: 7033 strb r3, [r6, #0] + 800f41e: 002b movs r3, r5 + 800f420: 0005 movs r5, r0 + 800f422: 429f cmp r7, r3 + 800f424: d9f3 bls.n 800f40e <_printf_i+0xf2> + 800f426: 2f08 cmp r7, #8 + 800f428: d109 bne.n 800f43e <_printf_i+0x122> + 800f42a: 6823 ldr r3, [r4, #0] + 800f42c: 07db lsls r3, r3, #31 + 800f42e: d506 bpl.n 800f43e <_printf_i+0x122> + 800f430: 6863 ldr r3, [r4, #4] + 800f432: 6922 ldr r2, [r4, #16] + 800f434: 4293 cmp r3, r2 + 800f436: dc02 bgt.n 800f43e <_printf_i+0x122> + 800f438: 2330 movs r3, #48 ; 0x30 + 800f43a: 3e01 subs r6, #1 + 800f43c: 7033 strb r3, [r6, #0] + 800f43e: 9b04 ldr r3, [sp, #16] + 800f440: 1b9b subs r3, r3, r6 + 800f442: 6123 str r3, [r4, #16] + 800f444: 9b07 ldr r3, [sp, #28] + 800f446: 0021 movs r1, r4 + 800f448: 9300 str r3, [sp, #0] + 800f44a: 9805 ldr r0, [sp, #20] + 800f44c: 9b06 ldr r3, [sp, #24] + 800f44e: aa09 add r2, sp, #36 ; 0x24 + 800f450: f7ff fef4 bl 800f23c <_printf_common> + 800f454: 1c43 adds r3, r0, #1 + 800f456: d14c bne.n 800f4f2 <_printf_i+0x1d6> + 800f458: 2001 movs r0, #1 + 800f45a: 4240 negs r0, r0 + 800f45c: b00b add sp, #44 ; 0x2c + 800f45e: bdf0 pop {r4, r5, r6, r7, pc} + 800f460: 3145 adds r1, #69 ; 0x45 + 800f462: 700a strb r2, [r1, #0] + 800f464: 4a34 ldr r2, [pc, #208] ; (800f538 <_printf_i+0x21c>) + 800f466: 9203 str r2, [sp, #12] + 800f468: 681a ldr r2, [r3, #0] + 800f46a: 6821 ldr r1, [r4, #0] + 800f46c: ca20 ldmia r2!, {r5} + 800f46e: 601a str r2, [r3, #0] + 800f470: 0608 lsls r0, r1, #24 + 800f472: d516 bpl.n 800f4a2 <_printf_i+0x186> + 800f474: 07cb lsls r3, r1, #31 + 800f476: d502 bpl.n 800f47e <_printf_i+0x162> + 800f478: 2320 movs r3, #32 + 800f47a: 4319 orrs r1, r3 + 800f47c: 6021 str r1, [r4, #0] + 800f47e: 2710 movs r7, #16 + 800f480: 2d00 cmp r5, #0 + 800f482: d1b2 bne.n 800f3ea <_printf_i+0xce> + 800f484: 2320 movs r3, #32 + 800f486: 6822 ldr r2, [r4, #0] + 800f488: 439a bics r2, r3 + 800f48a: 6022 str r2, [r4, #0] + 800f48c: e7ad b.n 800f3ea <_printf_i+0xce> + 800f48e: 2220 movs r2, #32 + 800f490: 6809 ldr r1, [r1, #0] + 800f492: 430a orrs r2, r1 + 800f494: 6022 str r2, [r4, #0] + 800f496: 0022 movs r2, r4 + 800f498: 2178 movs r1, #120 ; 0x78 + 800f49a: 3245 adds r2, #69 ; 0x45 + 800f49c: 7011 strb r1, [r2, #0] + 800f49e: 4a27 ldr r2, [pc, #156] ; (800f53c <_printf_i+0x220>) + 800f4a0: e7e1 b.n 800f466 <_printf_i+0x14a> + 800f4a2: 0648 lsls r0, r1, #25 + 800f4a4: d5e6 bpl.n 800f474 <_printf_i+0x158> + 800f4a6: b2ad uxth r5, r5 + 800f4a8: e7e4 b.n 800f474 <_printf_i+0x158> + 800f4aa: 681a ldr r2, [r3, #0] + 800f4ac: 680d ldr r5, [r1, #0] + 800f4ae: 1d10 adds r0, r2, #4 + 800f4b0: 6949 ldr r1, [r1, #20] + 800f4b2: 6018 str r0, [r3, #0] + 800f4b4: 6813 ldr r3, [r2, #0] + 800f4b6: 062e lsls r6, r5, #24 + 800f4b8: d501 bpl.n 800f4be <_printf_i+0x1a2> + 800f4ba: 6019 str r1, [r3, #0] + 800f4bc: e002 b.n 800f4c4 <_printf_i+0x1a8> + 800f4be: 066d lsls r5, r5, #25 + 800f4c0: d5fb bpl.n 800f4ba <_printf_i+0x19e> + 800f4c2: 8019 strh r1, [r3, #0] + 800f4c4: 2300 movs r3, #0 + 800f4c6: 9e04 ldr r6, [sp, #16] + 800f4c8: 6123 str r3, [r4, #16] + 800f4ca: e7bb b.n 800f444 <_printf_i+0x128> + 800f4cc: 681a ldr r2, [r3, #0] + 800f4ce: 1d11 adds r1, r2, #4 + 800f4d0: 6019 str r1, [r3, #0] + 800f4d2: 6816 ldr r6, [r2, #0] + 800f4d4: 2100 movs r1, #0 + 800f4d6: 0030 movs r0, r6 + 800f4d8: 6862 ldr r2, [r4, #4] + 800f4da: f000 f831 bl 800f540 + 800f4de: 2800 cmp r0, #0 + 800f4e0: d001 beq.n 800f4e6 <_printf_i+0x1ca> + 800f4e2: 1b80 subs r0, r0, r6 + 800f4e4: 6060 str r0, [r4, #4] + 800f4e6: 6863 ldr r3, [r4, #4] + 800f4e8: 6123 str r3, [r4, #16] + 800f4ea: 2300 movs r3, #0 + 800f4ec: 9a04 ldr r2, [sp, #16] + 800f4ee: 7013 strb r3, [r2, #0] + 800f4f0: e7a8 b.n 800f444 <_printf_i+0x128> + 800f4f2: 6923 ldr r3, [r4, #16] + 800f4f4: 0032 movs r2, r6 + 800f4f6: 9906 ldr r1, [sp, #24] + 800f4f8: 9805 ldr r0, [sp, #20] + 800f4fa: 9d07 ldr r5, [sp, #28] + 800f4fc: 47a8 blx r5 + 800f4fe: 1c43 adds r3, r0, #1 + 800f500: d0aa beq.n 800f458 <_printf_i+0x13c> + 800f502: 6823 ldr r3, [r4, #0] + 800f504: 079b lsls r3, r3, #30 + 800f506: d415 bmi.n 800f534 <_printf_i+0x218> + 800f508: 9b09 ldr r3, [sp, #36] ; 0x24 + 800f50a: 68e0 ldr r0, [r4, #12] + 800f50c: 4298 cmp r0, r3 + 800f50e: daa5 bge.n 800f45c <_printf_i+0x140> + 800f510: 0018 movs r0, r3 + 800f512: e7a3 b.n 800f45c <_printf_i+0x140> + 800f514: 0022 movs r2, r4 + 800f516: 2301 movs r3, #1 + 800f518: 9906 ldr r1, [sp, #24] + 800f51a: 9805 ldr r0, [sp, #20] + 800f51c: 9e07 ldr r6, [sp, #28] + 800f51e: 3219 adds r2, #25 + 800f520: 47b0 blx r6 + 800f522: 1c43 adds r3, r0, #1 + 800f524: d098 beq.n 800f458 <_printf_i+0x13c> + 800f526: 3501 adds r5, #1 + 800f528: 68e3 ldr r3, [r4, #12] + 800f52a: 9a09 ldr r2, [sp, #36] ; 0x24 + 800f52c: 1a9b subs r3, r3, r2 + 800f52e: 42ab cmp r3, r5 + 800f530: dcf0 bgt.n 800f514 <_printf_i+0x1f8> + 800f532: e7e9 b.n 800f508 <_printf_i+0x1ec> + 800f534: 2500 movs r5, #0 + 800f536: e7f7 b.n 800f528 <_printf_i+0x20c> + 800f538: 08010ff5 .word 0x08010ff5 + 800f53c: 08011006 .word 0x08011006 -0800e900 : - 800e900: b2c9 uxtb r1, r1 - 800e902: 1882 adds r2, r0, r2 - 800e904: 4290 cmp r0, r2 - 800e906: d101 bne.n 800e90c - 800e908: 2000 movs r0, #0 - 800e90a: 4770 bx lr - 800e90c: 7803 ldrb r3, [r0, #0] - 800e90e: 428b cmp r3, r1 - 800e910: d0fb beq.n 800e90a - 800e912: 3001 adds r0, #1 - 800e914: e7f6 b.n 800e904 +0800f540 : + 800f540: b2c9 uxtb r1, r1 + 800f542: 1882 adds r2, r0, r2 + 800f544: 4290 cmp r0, r2 + 800f546: d101 bne.n 800f54c + 800f548: 2000 movs r0, #0 + 800f54a: 4770 bx lr + 800f54c: 7803 ldrb r3, [r0, #0] + 800f54e: 428b cmp r3, r1 + 800f550: d0fb beq.n 800f54a + 800f552: 3001 adds r0, #1 + 800f554: e7f6 b.n 800f544 -0800e916 : - 800e916: b510 push {r4, lr} - 800e918: 4288 cmp r0, r1 - 800e91a: d902 bls.n 800e922 - 800e91c: 188b adds r3, r1, r2 - 800e91e: 4298 cmp r0, r3 - 800e920: d303 bcc.n 800e92a - 800e922: 2300 movs r3, #0 - 800e924: e007 b.n 800e936 - 800e926: 5c8b ldrb r3, [r1, r2] - 800e928: 5483 strb r3, [r0, r2] - 800e92a: 3a01 subs r2, #1 - 800e92c: d2fb bcs.n 800e926 - 800e92e: bd10 pop {r4, pc} - 800e930: 5ccc ldrb r4, [r1, r3] - 800e932: 54c4 strb r4, [r0, r3] - 800e934: 3301 adds r3, #1 - 800e936: 429a cmp r2, r3 - 800e938: d1fa bne.n 800e930 - 800e93a: e7f8 b.n 800e92e +0800f556 : + 800f556: b510 push {r4, lr} + 800f558: 4288 cmp r0, r1 + 800f55a: d902 bls.n 800f562 + 800f55c: 188b adds r3, r1, r2 + 800f55e: 4298 cmp r0, r3 + 800f560: d303 bcc.n 800f56a + 800f562: 2300 movs r3, #0 + 800f564: e007 b.n 800f576 + 800f566: 5c8b ldrb r3, [r1, r2] + 800f568: 5483 strb r3, [r0, r2] + 800f56a: 3a01 subs r2, #1 + 800f56c: d2fb bcs.n 800f566 + 800f56e: bd10 pop {r4, pc} + 800f570: 5ccc ldrb r4, [r1, r3] + 800f572: 54c4 strb r4, [r0, r3] + 800f574: 3301 adds r3, #1 + 800f576: 429a cmp r2, r3 + 800f578: d1fa bne.n 800f570 + 800f57a: e7f8 b.n 800f56e -0800e93c <_realloc_r>: - 800e93c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} - 800e93e: 0007 movs r7, r0 - 800e940: 000e movs r6, r1 - 800e942: 0014 movs r4, r2 - 800e944: 2900 cmp r1, #0 - 800e946: d105 bne.n 800e954 <_realloc_r+0x18> - 800e948: 0011 movs r1, r2 - 800e94a: f7ff fb6b bl 800e024 <_malloc_r> - 800e94e: 0005 movs r5, r0 - 800e950: 0028 movs r0, r5 - 800e952: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} - 800e954: 2a00 cmp r2, #0 - 800e956: d103 bne.n 800e960 <_realloc_r+0x24> - 800e958: f7ff fca4 bl 800e2a4 <_free_r> - 800e95c: 0025 movs r5, r4 - 800e95e: e7f7 b.n 800e950 <_realloc_r+0x14> - 800e960: f000 f81b bl 800e99a <_malloc_usable_size_r> - 800e964: 9001 str r0, [sp, #4] - 800e966: 4284 cmp r4, r0 - 800e968: d803 bhi.n 800e972 <_realloc_r+0x36> - 800e96a: 0035 movs r5, r6 - 800e96c: 0843 lsrs r3, r0, #1 - 800e96e: 42a3 cmp r3, r4 - 800e970: d3ee bcc.n 800e950 <_realloc_r+0x14> - 800e972: 0021 movs r1, r4 - 800e974: 0038 movs r0, r7 - 800e976: f7ff fb55 bl 800e024 <_malloc_r> - 800e97a: 1e05 subs r5, r0, #0 - 800e97c: d0e8 beq.n 800e950 <_realloc_r+0x14> - 800e97e: 9b01 ldr r3, [sp, #4] - 800e980: 0022 movs r2, r4 - 800e982: 429c cmp r4, r3 - 800e984: d900 bls.n 800e988 <_realloc_r+0x4c> - 800e986: 001a movs r2, r3 - 800e988: 0031 movs r1, r6 - 800e98a: 0028 movs r0, r5 - 800e98c: f7ff fb16 bl 800dfbc - 800e990: 0031 movs r1, r6 - 800e992: 0038 movs r0, r7 - 800e994: f7ff fc86 bl 800e2a4 <_free_r> - 800e998: e7da b.n 800e950 <_realloc_r+0x14> +0800f57c <_realloc_r>: + 800f57c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 800f57e: 0007 movs r7, r0 + 800f580: 000e movs r6, r1 + 800f582: 0014 movs r4, r2 + 800f584: 2900 cmp r1, #0 + 800f586: d105 bne.n 800f594 <_realloc_r+0x18> + 800f588: 0011 movs r1, r2 + 800f58a: f7ff fb6b bl 800ec64 <_malloc_r> + 800f58e: 0005 movs r5, r0 + 800f590: 0028 movs r0, r5 + 800f592: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 800f594: 2a00 cmp r2, #0 + 800f596: d103 bne.n 800f5a0 <_realloc_r+0x24> + 800f598: f7ff fca4 bl 800eee4 <_free_r> + 800f59c: 0025 movs r5, r4 + 800f59e: e7f7 b.n 800f590 <_realloc_r+0x14> + 800f5a0: f000 f81b bl 800f5da <_malloc_usable_size_r> + 800f5a4: 9001 str r0, [sp, #4] + 800f5a6: 4284 cmp r4, r0 + 800f5a8: d803 bhi.n 800f5b2 <_realloc_r+0x36> + 800f5aa: 0035 movs r5, r6 + 800f5ac: 0843 lsrs r3, r0, #1 + 800f5ae: 42a3 cmp r3, r4 + 800f5b0: d3ee bcc.n 800f590 <_realloc_r+0x14> + 800f5b2: 0021 movs r1, r4 + 800f5b4: 0038 movs r0, r7 + 800f5b6: f7ff fb55 bl 800ec64 <_malloc_r> + 800f5ba: 1e05 subs r5, r0, #0 + 800f5bc: d0e8 beq.n 800f590 <_realloc_r+0x14> + 800f5be: 9b01 ldr r3, [sp, #4] + 800f5c0: 0022 movs r2, r4 + 800f5c2: 429c cmp r4, r3 + 800f5c4: d900 bls.n 800f5c8 <_realloc_r+0x4c> + 800f5c6: 001a movs r2, r3 + 800f5c8: 0031 movs r1, r6 + 800f5ca: 0028 movs r0, r5 + 800f5cc: f7ff fb16 bl 800ebfc + 800f5d0: 0031 movs r1, r6 + 800f5d2: 0038 movs r0, r7 + 800f5d4: f7ff fc86 bl 800eee4 <_free_r> + 800f5d8: e7da b.n 800f590 <_realloc_r+0x14> -0800e99a <_malloc_usable_size_r>: - 800e99a: 1f0b subs r3, r1, #4 - 800e99c: 681b ldr r3, [r3, #0] - 800e99e: 1f18 subs r0, r3, #4 - 800e9a0: 2b00 cmp r3, #0 - 800e9a2: da01 bge.n 800e9a8 <_malloc_usable_size_r+0xe> - 800e9a4: 580b ldr r3, [r1, r0] - 800e9a6: 18c0 adds r0, r0, r3 - 800e9a8: 4770 bx lr +0800f5da <_malloc_usable_size_r>: + 800f5da: 1f0b subs r3, r1, #4 + 800f5dc: 681b ldr r3, [r3, #0] + 800f5de: 1f18 subs r0, r3, #4 + 800f5e0: 2b00 cmp r3, #0 + 800f5e2: da01 bge.n 800f5e8 <_malloc_usable_size_r+0xe> + 800f5e4: 580b ldr r3, [r1, r0] + 800f5e6: 18c0 adds r0, r0, r3 + 800f5e8: 4770 bx lr ... -0800e9ac <_init>: - 800e9ac: b5f8 push {r3, r4, r5, r6, r7, lr} - 800e9ae: 46c0 nop ; (mov r8, r8) - 800e9b0: bcf8 pop {r3, r4, r5, r6, r7} - 800e9b2: bc08 pop {r3} - 800e9b4: 469e mov lr, r3 - 800e9b6: 4770 bx lr +0800f5ec <_init>: + 800f5ec: b5f8 push {r3, r4, r5, r6, r7, lr} + 800f5ee: 46c0 nop ; (mov r8, r8) + 800f5f0: bcf8 pop {r3, r4, r5, r6, r7} + 800f5f2: bc08 pop {r3} + 800f5f4: 469e mov lr, r3 + 800f5f6: 4770 bx lr -0800e9b8 <_fini>: - 800e9b8: b5f8 push {r3, r4, r5, r6, r7, lr} - 800e9ba: 46c0 nop ; (mov r8, r8) - 800e9bc: bcf8 pop {r3, r4, r5, r6, r7} - 800e9be: bc08 pop {r3} - 800e9c0: 469e mov lr, r3 - 800e9c2: 4770 bx lr +0800f5f8 <_fini>: + 800f5f8: b5f8 push {r3, r4, r5, r6, r7, lr} + 800f5fa: 46c0 nop ; (mov r8, r8) + 800f5fc: bcf8 pop {r3, r4, r5, r6, r7} + 800f5fe: bc08 pop {r3} + 800f600: 469e mov lr, r3 + 800f602: 4770 bx lr diff --git a/firmware/PCB-Heater/Debug/objects.list b/firmware/PCB-Heater/Debug/objects.list index 5ed5693..ba4119f 100644 --- a/firmware/PCB-Heater/Debug/objects.list +++ b/firmware/PCB-Heater/Debug/objects.list @@ -13,6 +13,7 @@ "./Core/Src/sysmem.o" "./Core/Src/system_stm32g0xx.o" "./Core/Src/tim.o" +"./Core/Src/usart.o" "./Core/Startup/startup_stm32g070rbtx.o" "./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.o" "./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_adc.o" @@ -32,6 +33,8 @@ "./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.o" "./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.o" "./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.o" +"./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.o" +"./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.o" "./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_adc.o" "./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.o" "./Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.o" diff --git a/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h new file mode 100644 index 0000000..e8f3c25 --- /dev/null +++ b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart.h @@ -0,0 +1,1745 @@ +/** + ****************************************************************************** + * @file stm32g0xx_hal_uart.h + * @author MCD Application Team + * @brief Header file of UART HAL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G0xx_HAL_UART_H +#define STM32G0xx_HAL_UART_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g0xx_hal_def.h" + +/** @addtogroup STM32G0xx_HAL_Driver + * @{ + */ + +/** @addtogroup UART + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup UART_Exported_Types UART Exported Types + * @{ + */ + +/** + * @brief UART Init Structure definition + */ +typedef struct +{ + uint32_t BaudRate; /*!< This member configures the UART communication baud rate. + The baud rate register is computed using the following formula: + LPUART: + ======= + Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) + where lpuart_ker_ck_pres is the UART input clock divided by a prescaler + UART: + ===== + - If oversampling is 16 or in LIN mode, + Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) + - If oversampling is 8, + Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / + ((huart->Init.BaudRate)))[15:4] + Baud Rate Register[3] = 0 + Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / + ((huart->Init.BaudRate)))[3:0]) >> 1 + where uart_ker_ck_pres is the UART input clock divided by a prescaler */ + + uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref UARTEx_Word_Length. */ + + uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref UART_Stop_Bits. */ + + uint32_t Parity; /*!< Specifies the parity mode. + This parameter can be a value of @ref UART_Parity + @note When parity is enabled, the computed parity is inserted + at the MSB position of the transmitted data (9th bit when + the word length is set to 9 data bits; 8th bit when the + word length is set to 8 data bits). */ + + uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. + This parameter can be a value of @ref UART_Mode. */ + + uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled + or disabled. + This parameter can be a value of @ref UART_Hardware_Flow_Control. */ + + uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, + to achieve higher speed (up to f_PCLK/8). + This parameter can be a value of @ref UART_Over_Sampling. */ + + uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. + Selecting the single sample method increases the receiver tolerance to clock + deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ + + uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. + This parameter can be a value of @ref UART_ClockPrescaler. */ + +} UART_InitTypeDef; + +/** + * @brief UART Advanced Features initialization structure definition + */ +typedef struct +{ + uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several + Advanced Features may be initialized at the same time . + This parameter can be a value of + @ref UART_Advanced_Features_Initialization_Type. */ + + uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. + This parameter can be a value of @ref UART_Tx_Inv. */ + + uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. + This parameter can be a value of @ref UART_Rx_Inv. */ + + uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic + vs negative/inverted logic). + This parameter can be a value of @ref UART_Data_Inv. */ + + uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. + This parameter can be a value of @ref UART_Rx_Tx_Swap. */ + + uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. + This parameter can be a value of @ref UART_Overrun_Disable. */ + + uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. + This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ + + uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. + This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ + + uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate + detection is carried out. + This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ + + uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. + This parameter can be a value of @ref UART_MSB_First. */ +} UART_AdvFeatureInitTypeDef; + +/** + * @brief HAL UART State definition + * @note HAL UART State value is a combination of 2 different substates: + * gState and RxState (see @ref UART_State_Definition). + * - gState contains UART state information related to global Handle management + * and also information related to Tx operations. + * gState value coding follow below described bitmap : + * b7-b6 Error information + * 00 : No Error + * 01 : (Not Used) + * 10 : Timeout + * 11 : Error + * b5 Peripheral initialization status + * 0 : Reset (Peripheral not initialized) + * 1 : Init done (Peripheral initialized. HAL UART Init function already called) + * b4-b3 (not used) + * xx : Should be set to 00 + * b2 Intrinsic process state + * 0 : Ready + * 1 : Busy (Peripheral busy with some configuration or internal operations) + * b1 (not used) + * x : Should be set to 0 + * b0 Tx state + * 0 : Ready (no Tx operation ongoing) + * 1 : Busy (Tx operation ongoing) + * - RxState contains information related to Rx operations. + * RxState value coding follow below described bitmap : + * b7-b6 (not used) + * xx : Should be set to 00 + * b5 Peripheral initialization status + * 0 : Reset (Peripheral not initialized) + * 1 : Init done (Peripheral initialized) + * b4-b2 (not used) + * xxx : Should be set to 000 + * b1 Rx state + * 0 : Ready (no Rx operation ongoing) + * 1 : Busy (Rx operation ongoing) + * b0 (not used) + * x : Should be set to 0. + */ +typedef uint32_t HAL_UART_StateTypeDef; + +/** + * @brief UART clock sources definition + */ +typedef enum +{ + UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ + UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ + UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ + UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ + UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ +} UART_ClockSourceTypeDef; + +/** + * @brief HAL UART Reception type definition + * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. + * This parameter can be a value of @ref UART_Reception_Type_Values : + * HAL_UART_RECEPTION_STANDARD = 0x00U, + * HAL_UART_RECEPTION_TOIDLE = 0x01U, + * HAL_UART_RECEPTION_TORTO = 0x02U, + * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, + */ +typedef uint32_t HAL_UART_RxTypeTypeDef; + +/** + * @brief HAL UART Rx Event type definition + * @note HAL UART Rx Event type value aims to identify which type of Event has occurred + * leading to call of the RxEvent callback. + * This parameter can be a value of @ref UART_RxEvent_Type_Values : + * HAL_UART_RXEVENT_TC = 0x00U, + * HAL_UART_RXEVENT_HT = 0x01U, + * HAL_UART_RXEVENT_IDLE = 0x02U, + */ +typedef uint32_t HAL_UART_RxEventTypeTypeDef; + +/** + * @brief UART handle Structure definition + */ +typedef struct __UART_HandleTypeDef +{ + USART_TypeDef *Instance; /*!< UART registers base address */ + + UART_InitTypeDef Init; /*!< UART communication parameters */ + + UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ + + const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ + + uint16_t TxXferSize; /*!< UART Tx Transfer size */ + + __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ + + uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ + + uint16_t RxXferSize; /*!< UART Rx Transfer size */ + + __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ + + uint16_t Mask; /*!< UART Rx RDR register mask */ + + uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. + This parameter can be a value of @ref UARTEx_FIFO_mode. */ + + uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ + + uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ + + __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ + + __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ + + void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ + + void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ + + DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ + + DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ + + HAL_LockTypeDef Lock; /*!< Locking object */ + + __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management + and also related to Tx operations. This parameter + can be a value of @ref HAL_UART_StateTypeDef */ + + __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This + parameter can be a value of @ref HAL_UART_StateTypeDef */ + + __IO uint32_t ErrorCode; /*!< UART Error code */ + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ + void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ + void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ + void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ + void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ + void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ + void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ + void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ + void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ + void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ + void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ + void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ + + void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ + void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + +} UART_HandleTypeDef; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +/** + * @brief HAL UART Callback ID enumeration definition + */ +typedef enum +{ + HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ + HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ + HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ + HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ + HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ + HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ + HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ + HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ + HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ + HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ + HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ + + HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ + HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ + +} HAL_UART_CallbackIDTypeDef; + +/** + * @brief HAL UART Callback pointer definition + */ +typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ +typedef void (*pUART_RxEventCallbackTypeDef) +(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ + +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup UART_Exported_Constants UART Exported Constants + * @{ + */ + +/** @defgroup UART_State_Definition UART State Code Definition + * @{ + */ +#define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized + Value is allowed for gState and RxState */ +#define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use + Value is allowed for gState and RxState */ +#define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing + Value is allowed for gState only */ +#define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing + Value is allowed for gState only */ +#define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing + Value is allowed for RxState only */ +#define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing + Not to be used for neither gState nor RxState.Value is result + of combination (Or) between gState and RxState values */ +#define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state + Value is allowed for gState only */ +#define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error + Value is allowed for gState only */ +/** + * @} + */ + +/** @defgroup UART_Error_Definition UART Error Definition + * @{ + */ +#define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ +#define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ +#define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ +#define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ +#define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ +#define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ +#define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +#define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +/** + * @} + */ + +/** @defgroup UART_Stop_Bits UART Number of Stop Bits + * @{ + */ +#define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ +#define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ +#define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ +#define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ +/** + * @} + */ + +/** @defgroup UART_Parity UART Parity + * @{ + */ +#define UART_PARITY_NONE 0x00000000U /*!< No parity */ +#define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ +#define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ +/** + * @} + */ + +/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control + * @{ + */ +#define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ +#define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ +#define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ +#define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ +/** + * @} + */ + +/** @defgroup UART_Mode UART Transfer Mode + * @{ + */ +#define UART_MODE_RX USART_CR1_RE /*!< RX mode */ +#define UART_MODE_TX USART_CR1_TE /*!< TX mode */ +#define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ +/** + * @} + */ + +/** @defgroup UART_State UART State + * @{ + */ +#define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ +#define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ +/** + * @} + */ + +/** @defgroup UART_Over_Sampling UART Over Sampling + * @{ + */ +#define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ +#define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ +/** + * @} + */ + +/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method + * @{ + */ +#define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ +#define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ +/** + * @} + */ + +/** @defgroup UART_ClockPrescaler UART Clock Prescaler + * @{ + */ +#define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ +#define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ +#define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ +#define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ +#define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ +#define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ +#define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ +#define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ +#define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ +#define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ +#define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ +#define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ +/** + * @} + */ + +/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode + * @{ + */ +#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection + on start bit */ +#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection + on falling edge */ +#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection + on 0x7F frame detection */ +#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection + on 0x55 frame detection */ +/** + * @} + */ + +/** @defgroup UART_Receiver_Timeout UART Receiver Timeout + * @{ + */ +#define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ +#define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ +/** + * @} + */ + +/** @defgroup UART_LIN UART Local Interconnection Network mode + * @{ + */ +#define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ +#define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ +/** + * @} + */ + +/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection + * @{ + */ +#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ +#define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ +/** + * @} + */ + +/** @defgroup UART_DMA_Tx UART DMA Tx + * @{ + */ +#define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ +#define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ +/** + * @} + */ + +/** @defgroup UART_DMA_Rx UART DMA Rx + * @{ + */ +#define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ +#define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ +/** + * @} + */ + +/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection + * @{ + */ +#define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ +#define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ +/** + * @} + */ + +/** @defgroup UART_WakeUp_Methods UART WakeUp Methods + * @{ + */ +#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ +#define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ +/** + * @} + */ + +/** @defgroup UART_Request_Parameters UART Request Parameters + * @{ + */ +#define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ +#define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ +#define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ +#define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ +#define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ +/** + * @} + */ + +/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type + * @{ + */ +#define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ +#define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ +#define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ +#define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ +#define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ +#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ +#define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ +#define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ +#define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ +/** + * @} + */ + +/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion + * @{ + */ +#define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ +#define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ +/** + * @} + */ + +/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion + * @{ + */ +#define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ +#define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ +/** + * @} + */ + +/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion + * @{ + */ +#define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ +#define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ +/** + * @} + */ + +/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap + * @{ + */ +#define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ +#define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ +/** + * @} + */ + +/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable + * @{ + */ +#define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ +#define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ +/** + * @} + */ + +/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable + * @{ + */ +#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ +#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ +/** + * @} + */ + +/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error + * @{ + */ +#define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ +#define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ +/** + * @} + */ + +/** @defgroup UART_MSB_First UART Advanced Feature MSB First + * @{ + */ +#define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received + first disable */ +#define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received + first enable */ +/** + * @} + */ + +/** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable + * @{ + */ +#define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ +#define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ +/** + * @} + */ + +/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable + * @{ + */ +#define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ +#define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ +/** + * @} + */ + +/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register + * @{ + */ +#define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ +/** + * @} + */ + +/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection + * @{ + */ +#define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ +#define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ +#define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register + not empty or RXFIFO is not empty */ +/** + * @} + */ + +/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity + * @{ + */ +#define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ +#define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ +/** + * @} + */ + +/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register + * @{ + */ +#define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB + position in CR1 register */ +/** + * @} + */ + +/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register + * @{ + */ +#define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB + position in CR1 register */ +/** + * @} + */ + +/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask + * @{ + */ +#define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ +/** + * @} + */ + +/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value + * @{ + */ +#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ +/** + * @} + */ + +/** @defgroup UART_Flags UART Status Flags + * Elements values convention: 0xXXXX + * - 0xXXXX : Flag mask in the ISR register + * @{ + */ +#define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ +#define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ +#define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ +#define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ +#define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ +#define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ +#define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ +#define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ +#define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ +#define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ +#define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ +#define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ +#define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ +#define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ +#define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ +#define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ +#define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ +#define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ +#define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ +#define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ +#define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ +#define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ +#define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ +#define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ +#define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ +#define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ +#define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ +/** + * @} + */ + +/** @defgroup UART_Interrupt_definition UART Interrupts Definition + * Elements values convention: 000ZZZZZ0XXYYYYYb + * - YYYYY : Interrupt source position in the XX register (5bits) + * - XX : Interrupt source register (2bits) + * - 01: CR1 register + * - 10: CR2 register + * - 11: CR3 register + * - ZZZZZ : Flag position in the ISR register(5bits) + * Elements values convention: 000000000XXYYYYYb + * - YYYYY : Interrupt source position in the XX register (5bits) + * - XX : Interrupt source register (2bits) + * - 01: CR1 register + * - 10: CR2 register + * - 11: CR3 register + * Elements values convention: 0000ZZZZ00000000b + * - ZZZZ : Flag position in the ISR register(4bits) + * @{ + */ +#define UART_IT_PE 0x0028U /*!< UART parity error interruption */ +#define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ +#define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ +#define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ +#define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ +#define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ +#define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ +#define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ +#define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ +#define UART_IT_CM 0x112EU /*!< UART character match interruption */ +#define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ +#define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ +#define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ +#define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ +#define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ +#define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ + +#define UART_IT_ERR 0x0060U /*!< UART error interruption */ + +#define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ +#define UART_IT_NE 0x0200U /*!< UART noise error interruption */ +#define UART_IT_FE 0x0100U /*!< UART frame error interruption */ +/** + * @} + */ + +/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags + * @{ + */ +#define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ +#define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ +#define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ +#define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ +#define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ +#define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ +#define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ +#define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ +#define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ +#define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ +#define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ +#define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ +/** + * @} + */ + +/** @defgroup UART_Reception_Type_Values UART Reception type values + * @{ + */ +#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ +#define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ +#define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ +#define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ +/** + * @} + */ + +/** @defgroup UART_RxEvent_Type_Values UART RxEvent type values + * @{ + */ +#define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ +#define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ +#define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macros -----------------------------------------------------------*/ +/** @defgroup UART_Exported_Macros UART Exported Macros + * @{ + */ + +/** @brief Reset UART handle states. + * @param __HANDLE__ UART handle. + * @retval None + */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ + (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ + (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ + (__HANDLE__)->MspInitCallback = NULL; \ + (__HANDLE__)->MspDeInitCallback = NULL; \ + } while(0U) +#else +#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ + (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ + (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ + } while(0U) +#endif /*USE_HAL_UART_REGISTER_CALLBACKS */ + +/** @brief Flush the UART Data registers. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ + do{ \ + SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ + SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ + } while(0U) + +/** @brief Clear the specified UART pending flag. + * @param __HANDLE__ specifies the UART Handle. + * @param __FLAG__ specifies the flag to check. + * This parameter can be any combination of the following values: + * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag + * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag + * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag + * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag + * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag + * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag + * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag + * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag + * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag + * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag + * @arg @ref UART_CLEAR_CMF Character Match Clear Flag + * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag + * @retval None + */ +#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) + +/** @brief Clear the UART PE pending flag. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) + +/** @brief Clear the UART FE pending flag. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) + +/** @brief Clear the UART NE pending flag. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) + +/** @brief Clear the UART ORE pending flag. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) + +/** @brief Clear the UART IDLE pending flag. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) + +/** @brief Clear the UART TX FIFO empty clear flag. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) + +/** @brief Check whether the specified UART flag is set or not. + * @param __HANDLE__ specifies the UART Handle. + * @param __FLAG__ specifies the flag to check. + * This parameter can be one of the following values: + * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag + * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag + * @arg @ref UART_FLAG_RXFF RXFIFO Full flag + * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag + * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag + * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag + * @arg @ref UART_FLAG_WUF Wake up from stop mode flag + * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) + * @arg @ref UART_FLAG_SBKF Send Break flag + * @arg @ref UART_FLAG_CMF Character match flag + * @arg @ref UART_FLAG_BUSY Busy flag + * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag + * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag + * @arg @ref UART_FLAG_CTS CTS Change flag + * @arg @ref UART_FLAG_LBDF LIN Break detection flag + * @arg @ref UART_FLAG_TXE Transmit data register empty flag + * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag + * @arg @ref UART_FLAG_TC Transmission Complete flag + * @arg @ref UART_FLAG_RXNE Receive data register not empty flag + * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag + * @arg @ref UART_FLAG_RTOF Receiver Timeout flag + * @arg @ref UART_FLAG_IDLE Idle Line detection flag + * @arg @ref UART_FLAG_ORE Overrun Error flag + * @arg @ref UART_FLAG_NE Noise Error flag + * @arg @ref UART_FLAG_FE Framing Error flag + * @arg @ref UART_FLAG_PE Parity Error flag + * @retval The new state of __FLAG__ (TRUE or FALSE). + */ +#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) + +/** @brief Enable the specified UART interrupt. + * @param __HANDLE__ specifies the UART Handle. + * @param __INTERRUPT__ specifies the UART interrupt source to enable. + * This parameter can be one of the following values: + * @arg @ref UART_IT_RXFF RXFIFO Full interrupt + * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt + * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt + * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt + * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt + * @arg @ref UART_IT_CM Character match interrupt + * @arg @ref UART_IT_CTS CTS change interrupt + * @arg @ref UART_IT_LBD LIN Break detection interrupt + * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt + * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt + * @arg @ref UART_IT_TC Transmission complete interrupt + * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt + * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt + * @arg @ref UART_IT_RTO Receive Timeout interrupt + * @arg @ref UART_IT_IDLE Idle line detection interrupt + * @arg @ref UART_IT_PE Parity Error interrupt + * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) + * @retval None + */ +#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ + ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ + ((__HANDLE__)->Instance->CR1 |= (1U <<\ + ((__INTERRUPT__) & UART_IT_MASK))): \ + ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ + ((__HANDLE__)->Instance->CR2 |= (1U <<\ + ((__INTERRUPT__) & UART_IT_MASK))): \ + ((__HANDLE__)->Instance->CR3 |= (1U <<\ + ((__INTERRUPT__) & UART_IT_MASK)))) + +/** @brief Disable the specified UART interrupt. + * @param __HANDLE__ specifies the UART Handle. + * @param __INTERRUPT__ specifies the UART interrupt source to disable. + * This parameter can be one of the following values: + * @arg @ref UART_IT_RXFF RXFIFO Full interrupt + * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt + * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt + * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt + * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt + * @arg @ref UART_IT_CM Character match interrupt + * @arg @ref UART_IT_CTS CTS change interrupt + * @arg @ref UART_IT_LBD LIN Break detection interrupt + * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt + * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt + * @arg @ref UART_IT_TC Transmission complete interrupt + * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt + * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt + * @arg @ref UART_IT_RTO Receive Timeout interrupt + * @arg @ref UART_IT_IDLE Idle line detection interrupt + * @arg @ref UART_IT_PE Parity Error interrupt + * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) + * @retval None + */ +#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ + ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ + ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ + ((__INTERRUPT__) & UART_IT_MASK))): \ + ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ + ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ + ((__INTERRUPT__) & UART_IT_MASK))): \ + ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ + ((__INTERRUPT__) & UART_IT_MASK)))) + +/** @brief Check whether the specified UART interrupt has occurred or not. + * @param __HANDLE__ specifies the UART Handle. + * @param __INTERRUPT__ specifies the UART interrupt to check. + * This parameter can be one of the following values: + * @arg @ref UART_IT_RXFF RXFIFO Full interrupt + * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt + * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt + * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt + * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt + * @arg @ref UART_IT_CM Character match interrupt + * @arg @ref UART_IT_CTS CTS change interrupt + * @arg @ref UART_IT_LBD LIN Break detection interrupt + * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt + * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt + * @arg @ref UART_IT_TC Transmission complete interrupt + * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt + * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt + * @arg @ref UART_IT_RTO Receive Timeout interrupt + * @arg @ref UART_IT_IDLE Idle line detection interrupt + * @arg @ref UART_IT_PE Parity Error interrupt + * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) + * @retval The new state of __INTERRUPT__ (SET or RESET). + */ +#define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ + & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) + +/** @brief Check whether the specified UART interrupt source is enabled or not. + * @param __HANDLE__ specifies the UART Handle. + * @param __INTERRUPT__ specifies the UART interrupt source to check. + * This parameter can be one of the following values: + * @arg @ref UART_IT_RXFF RXFIFO Full interrupt + * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt + * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt + * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt + * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt + * @arg @ref UART_IT_CM Character match interrupt + * @arg @ref UART_IT_CTS CTS change interrupt + * @arg @ref UART_IT_LBD LIN Break detection interrupt + * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt + * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt + * @arg @ref UART_IT_TC Transmission complete interrupt + * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt + * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt + * @arg @ref UART_IT_RTO Receive Timeout interrupt + * @arg @ref UART_IT_IDLE Idle line detection interrupt + * @arg @ref UART_IT_PE Parity Error interrupt + * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) + * @retval The new state of __INTERRUPT__ (SET or RESET). + */ +#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ + (__HANDLE__)->Instance->CR1 : \ + (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ + (__HANDLE__)->Instance->CR2 : \ + (__HANDLE__)->Instance->CR3)) & (1U <<\ + (((uint16_t)(__INTERRUPT__)) &\ + UART_IT_MASK))) != RESET) ? SET : RESET) + +/** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. + * @param __HANDLE__ specifies the UART Handle. + * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set + * to clear the corresponding interrupt + * This parameter can be one of the following values: + * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag + * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag + * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag + * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag + * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag + * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag + * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag + * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag + * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag + * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag + * @arg @ref UART_CLEAR_CMF Character Match Clear Flag + * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag + * @retval None + */ +#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) + +/** @brief Set a specific UART request flag. + * @param __HANDLE__ specifies the UART Handle. + * @param __REQ__ specifies the request flag to set + * This parameter can be one of the following values: + * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request + * @arg @ref UART_SENDBREAK_REQUEST Send Break Request + * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request + * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request + * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request + * @retval None + */ +#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) + +/** @brief Enable the UART one bit sample method. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) + +/** @brief Disable the UART one bit sample method. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) + +/** @brief Enable UART. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) + +/** @brief Disable UART. + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) + +/** @brief Enable CTS flow control. + * @note This macro allows to enable CTS hardware flow control for a given UART instance, + * without need to call HAL_UART_Init() function. + * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. + * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need + * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : + * - UART instance should have already been initialised (through call of HAL_UART_Init() ) + * - macro could only be called when corresponding UART instance is disabled + * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable + * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ + do{ \ + ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ + (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ + } while(0U) + +/** @brief Disable CTS flow control. + * @note This macro allows to disable CTS hardware flow control for a given UART instance, + * without need to call HAL_UART_Init() function. + * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. + * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need + * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : + * - UART instance should have already been initialised (through call of HAL_UART_Init() ) + * - macro could only be called when corresponding UART instance is disabled + * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable + * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ + do{ \ + ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ + (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ + } while(0U) + +/** @brief Enable RTS flow control. + * @note This macro allows to enable RTS hardware flow control for a given UART instance, + * without need to call HAL_UART_Init() function. + * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. + * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need + * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : + * - UART instance should have already been initialised (through call of HAL_UART_Init() ) + * - macro could only be called when corresponding UART instance is disabled + * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable + * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ + do{ \ + ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ + (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ + } while(0U) + +/** @brief Disable RTS flow control. + * @note This macro allows to disable RTS hardware flow control for a given UART instance, + * without need to call HAL_UART_Init() function. + * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. + * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need + * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : + * - UART instance should have already been initialised (through call of HAL_UART_Init() ) + * - macro could only be called when corresponding UART instance is disabled + * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable + * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). + * @param __HANDLE__ specifies the UART Handle. + * @retval None + */ +#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ + do{ \ + ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ + (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ + } while(0U) +/** + * @} + */ + +/* Private macros --------------------------------------------------------*/ +/** @defgroup UART_Private_Macros UART Private Macros + * @{ + */ +/** @brief Get UART clok division factor from clock prescaler value. + * @param __CLOCKPRESCALER__ UART prescaler value. + * @retval UART clock division factor + */ +#define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ + (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) + +/** @brief BRR division operation to set BRR register with LPUART. + * @param __PCLK__ LPUART clock. + * @param __BAUD__ Baud rate set by the user. + * @param __CLOCKPRESCALER__ UART prescaler value. + * @retval Division result + */ +#define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ + ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ + (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ + ) + +/** @brief BRR division operation to set BRR register in 8-bit oversampling mode. + * @param __PCLK__ UART clock. + * @param __BAUD__ Baud rate set by the user. + * @param __CLOCKPRESCALER__ UART prescaler value. + * @retval Division result + */ +#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ + (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) + +/** @brief BRR division operation to set BRR register in 16-bit oversampling mode. + * @param __PCLK__ UART clock. + * @param __BAUD__ Baud rate set by the user. + * @param __CLOCKPRESCALER__ UART prescaler value. + * @retval Division result + */ +#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ + ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) + +/** @brief Check whether or not UART instance is Low Power UART. + * @param __HANDLE__ specifies the UART Handle. + * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) + */ +#define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) + +/** @brief Check UART Baud rate. + * @param __BAUDRATE__ Baudrate specified by the user. + * The maximum Baud Rate is derived from the maximum clock on G0 (i.e. 64 MHz) + * divided by the smallest oversampling used on the USART (i.e. 8) + * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) + */ +#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 8000001U) + +/** @brief Check UART assertion time. + * @param __TIME__ 5-bit value assertion time. + * @retval Test result (TRUE or FALSE). + */ +#define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) + +/** @brief Check UART deassertion time. + * @param __TIME__ 5-bit value deassertion time. + * @retval Test result (TRUE or FALSE). + */ +#define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) + +/** + * @brief Ensure that UART frame number of stop bits is valid. + * @param __STOPBITS__ UART frame number of stop bits. + * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) + */ +#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ + ((__STOPBITS__) == UART_STOPBITS_1) || \ + ((__STOPBITS__) == UART_STOPBITS_1_5) || \ + ((__STOPBITS__) == UART_STOPBITS_2)) + +/** + * @brief Ensure that LPUART frame number of stop bits is valid. + * @param __STOPBITS__ LPUART frame number of stop bits. + * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) + */ +#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ + ((__STOPBITS__) == UART_STOPBITS_2)) + +/** + * @brief Ensure that UART frame parity is valid. + * @param __PARITY__ UART frame parity. + * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) + */ +#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ + ((__PARITY__) == UART_PARITY_EVEN) || \ + ((__PARITY__) == UART_PARITY_ODD)) + +/** + * @brief Ensure that UART hardware flow control is valid. + * @param __CONTROL__ UART hardware flow control. + * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) + */ +#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ + (((__CONTROL__) == UART_HWCONTROL_NONE) || \ + ((__CONTROL__) == UART_HWCONTROL_RTS) || \ + ((__CONTROL__) == UART_HWCONTROL_CTS) || \ + ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) + +/** + * @brief Ensure that UART communication mode is valid. + * @param __MODE__ UART communication mode. + * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) + */ +#define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) + +/** + * @brief Ensure that UART state is valid. + * @param __STATE__ UART state. + * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) + */ +#define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ + ((__STATE__) == UART_STATE_ENABLE)) + +/** + * @brief Ensure that UART oversampling is valid. + * @param __SAMPLING__ UART oversampling. + * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) + */ +#define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ + ((__SAMPLING__) == UART_OVERSAMPLING_8)) + +/** + * @brief Ensure that UART frame sampling is valid. + * @param __ONEBIT__ UART frame sampling. + * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) + */ +#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ + ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) + +/** + * @brief Ensure that UART auto Baud rate detection mode is valid. + * @param __MODE__ UART auto Baud rate detection mode. + * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) + */ +#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ + ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ + ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ + ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) + +/** + * @brief Ensure that UART receiver timeout setting is valid. + * @param __TIMEOUT__ UART receiver timeout setting. + * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) + */ +#define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ + ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) + +/** @brief Check the receiver timeout value. + * @note The maximum UART receiver timeout value is 0xFFFFFF. + * @param __TIMEOUTVALUE__ receiver timeout value. + * @retval Test result (TRUE or FALSE) + */ +#define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) + +/** + * @brief Ensure that UART LIN state is valid. + * @param __LIN__ UART LIN state. + * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) + */ +#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ + ((__LIN__) == UART_LIN_ENABLE)) + +/** + * @brief Ensure that UART LIN break detection length is valid. + * @param __LENGTH__ UART LIN break detection length. + * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) + */ +#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ + ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) + +/** + * @brief Ensure that UART DMA TX state is valid. + * @param __DMATX__ UART DMA TX state. + * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) + */ +#define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ + ((__DMATX__) == UART_DMA_TX_ENABLE)) + +/** + * @brief Ensure that UART DMA RX state is valid. + * @param __DMARX__ UART DMA RX state. + * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) + */ +#define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ + ((__DMARX__) == UART_DMA_RX_ENABLE)) + +/** + * @brief Ensure that UART half-duplex state is valid. + * @param __HDSEL__ UART half-duplex state. + * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) + */ +#define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ + ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) + +/** + * @brief Ensure that UART wake-up method is valid. + * @param __WAKEUP__ UART wake-up method . + * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) + */ +#define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ + ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) + +/** + * @brief Ensure that UART request parameter is valid. + * @param __PARAM__ UART request parameter. + * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) + */ +#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ + ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ + ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ + ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ + ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) + +/** + * @brief Ensure that UART advanced features initialization is valid. + * @param __INIT__ UART advanced features initialization. + * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) + */ +#define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ + UART_ADVFEATURE_TXINVERT_INIT | \ + UART_ADVFEATURE_RXINVERT_INIT | \ + UART_ADVFEATURE_DATAINVERT_INIT | \ + UART_ADVFEATURE_SWAP_INIT | \ + UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ + UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ + UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ + UART_ADVFEATURE_MSBFIRST_INIT)) + +/** + * @brief Ensure that UART frame TX inversion setting is valid. + * @param __TXINV__ UART frame TX inversion setting. + * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) + */ +#define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ + ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) + +/** + * @brief Ensure that UART frame RX inversion setting is valid. + * @param __RXINV__ UART frame RX inversion setting. + * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) + */ +#define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ + ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) + +/** + * @brief Ensure that UART frame data inversion setting is valid. + * @param __DATAINV__ UART frame data inversion setting. + * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) + */ +#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ + ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) + +/** + * @brief Ensure that UART frame RX/TX pins swap setting is valid. + * @param __SWAP__ UART frame RX/TX pins swap setting. + * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) + */ +#define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ + ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) + +/** + * @brief Ensure that UART frame overrun setting is valid. + * @param __OVERRUN__ UART frame overrun setting. + * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) + */ +#define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ + ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) + +/** + * @brief Ensure that UART auto Baud rate state is valid. + * @param __AUTOBAUDRATE__ UART auto Baud rate state. + * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) + */ +#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ + UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ + ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) + +/** + * @brief Ensure that UART DMA enabling or disabling on error setting is valid. + * @param __DMA__ UART DMA enabling or disabling on error setting. + * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) + */ +#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ + ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) + +/** + * @brief Ensure that UART frame MSB first setting is valid. + * @param __MSBFIRST__ UART frame MSB first setting. + * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) + */ +#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ + ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) + +/** + * @brief Ensure that UART stop mode state is valid. + * @param __STOPMODE__ UART stop mode state. + * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) + */ +#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ + ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) + +/** + * @brief Ensure that UART mute mode state is valid. + * @param __MUTE__ UART mute mode state. + * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) + */ +#define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ + ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) + +/** + * @brief Ensure that UART wake-up selection is valid. + * @param __WAKE__ UART wake-up selection. + * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) + */ +#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ + ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ + ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) + +/** + * @brief Ensure that UART driver enable polarity is valid. + * @param __POLARITY__ UART driver enable polarity. + * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) + */ +#define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ + ((__POLARITY__) == UART_DE_POLARITY_LOW)) + +/** + * @brief Ensure that UART Prescaler is valid. + * @param __CLOCKPRESCALER__ UART Prescaler value. + * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) + */ +#define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ + ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) + +/** + * @} + */ + +/* Include UART HAL Extended module */ +#include "stm32g0xx_hal_uart_ex.h" + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup UART_Exported_Functions UART Exported Functions + * @{ + */ + +/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions + * @{ + */ + +/* Initialization and de-initialization functions ****************************/ +HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); +HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); +HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); +void HAL_UART_MspInit(UART_HandleTypeDef *huart); +void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); + +/* Callbacks Register/UnRegister functions ***********************************/ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, + pUART_CallbackTypeDef pCallback); +HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); + +HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); +HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + +/** + * @} + */ + +/** @addtogroup UART_Exported_Functions_Group2 IO operation functions + * @{ + */ + +/* IO operation functions *****************************************************/ +HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); +/* Transfer Abort functions */ +HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); + +void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); +void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); +void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); +void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); +void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); +void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); +void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); +void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); + +void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); + +/** + * @} + */ + +/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions + * @{ + */ + +/* Peripheral Control functions ************************************************/ +void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); +HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); + +HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); +void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); + +/** + * @} + */ + +/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions + * @{ + */ + +/* Peripheral State and Errors functions **************************************************/ +HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); +uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); + +/** + * @} + */ + +/** + * @} + */ + +/* Private functions -----------------------------------------------------------*/ +/** @addtogroup UART_Private_Functions UART Private Functions + * @{ + */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); +HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); +HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, + uint32_t Tickstart, uint32_t Timeout); +void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); +HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); + +/** + * @} + */ + +/* Private variables -----------------------------------------------------------*/ +/** @defgroup UART_Private_variables UART Private variables + * @{ + */ +/* Prescaler Table used in BRR computation macros. + Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ +extern const uint16_t UARTPrescTable[12]; +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G0xx_HAL_UART_H */ + diff --git a/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h new file mode 100644 index 0000000..89e63a3 --- /dev/null +++ b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_uart_ex.h @@ -0,0 +1,771 @@ +/** + ****************************************************************************** + * @file stm32g0xx_hal_uart_ex.h + * @author MCD Application Team + * @brief Header file of UART HAL Extended module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G0xx_HAL_UART_EX_H +#define STM32G0xx_HAL_UART_EX_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g0xx_hal_def.h" + +/** @addtogroup STM32G0xx_HAL_Driver + * @{ + */ + +/** @addtogroup UARTEx + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup UARTEx_Exported_Types UARTEx Exported Types + * @{ + */ + +/** + * @brief UART wake up from stop mode parameters + */ +typedef struct +{ + uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). + This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. + If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must + be filled up. */ + + uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. + This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ + + uint8_t Address; /*!< UART/USART node address (7-bit long max). */ +} UART_WakeUpTypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants + * @{ + */ + +/** @defgroup UARTEx_Word_Length UARTEx Word Length + * @{ + */ +#define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ +#define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ +#define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ +/** + * @} + */ + +/** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length + * @{ + */ +#define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ +#define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ +/** + * @} + */ + +/** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode + * @brief UART FIFO mode + * @{ + */ +#define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ +#define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ +/** + * @} + */ + +/** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level + * @brief UART TXFIFO threshold level + * @{ + */ +#define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ +#define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ +#define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ +#define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ +#define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ +#define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ +/** + * @} + */ + +/** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level + * @brief UART RXFIFO threshold level + * @{ + */ +#define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ +#define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ +#define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ +#define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ +#define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ +#define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macros -----------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup UARTEx_Exported_Functions + * @{ + */ + +/** @addtogroup UARTEx_Exported_Functions_Group1 + * @{ + */ + +/* Initialization and de-initialization functions ****************************/ +HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, + uint32_t DeassertionTime); + +/** + * @} + */ + +/** @addtogroup UARTEx_Exported_Functions_Group2 + * @{ + */ + +void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); + +void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); +void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); + +/** + * @} + */ + +/** @addtogroup UARTEx_Exported_Functions_Group3 + * @{ + */ + +/* Peripheral Control functions **********************************************/ +HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); +HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); + +HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); + +HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); +HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); +HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); + +HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, + uint32_t Timeout); +HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); + +HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart); + + +/** + * @} + */ + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup UARTEx_Private_Macros UARTEx Private Macros + * @{ + */ + +#if defined(STM32G0C1xx) || defined(STM32G0B1xx) +/** @brief Report the UART clock source. + * @param __HANDLE__ specifies the UART Handle. + * @param __CLOCKSOURCE__ output variable. + * @retval UART clocking source, written in __CLOCKSOURCE__. + */ +#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ + do { \ + if((__HANDLE__)->Instance == USART1) \ + { \ + switch(__HAL_RCC_GET_USART1_SOURCE()) \ + { \ + case RCC_USART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART2) \ + { \ + switch(__HAL_RCC_GET_USART2_SOURCE()) \ + { \ + case RCC_USART2CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART2CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART2CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART2CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART3) \ + { \ + switch(__HAL_RCC_GET_USART3_SOURCE()) \ + { \ + case RCC_USART3CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART3CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART3CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART3CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART4) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == USART5) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == USART6) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == LPUART1) \ + { \ + switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ + { \ + case RCC_LPUART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_LPUART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_LPUART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_LPUART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == LPUART2) \ + { \ + switch(__HAL_RCC_GET_LPUART2_SOURCE()) \ + { \ + case RCC_LPUART2CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_LPUART2CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_LPUART2CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_LPUART2CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + } \ + } while(0U) +#elif defined(STM32G0B0xx) +/** @brief Report the UART clock source. + * @param __HANDLE__ specifies the UART Handle. + * @param __CLOCKSOURCE__ output variable. + * @retval UART clocking source, written in __CLOCKSOURCE__. + */ +#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ + do { \ + if((__HANDLE__)->Instance == USART1) \ + { \ + switch(__HAL_RCC_GET_USART1_SOURCE()) \ + { \ + case RCC_USART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART2) \ + { \ + switch(__HAL_RCC_GET_USART2_SOURCE()) \ + { \ + case RCC_USART2CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART2CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART2CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART2CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART3) \ + { \ + switch(__HAL_RCC_GET_USART3_SOURCE()) \ + { \ + case RCC_USART3CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART3CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART3CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART3CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART4) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == USART5) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == USART6) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + } \ + } while(0U) +#elif defined(STM32G081xx) || defined(STM32G071xx) +/** @brief Report the UART clock source. + * @param __HANDLE__ specifies the UART Handle. + * @param __CLOCKSOURCE__ output variable. + * @retval UART clocking source, written in __CLOCKSOURCE__. + */ +#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ + do { \ + if((__HANDLE__)->Instance == USART1) \ + { \ + switch(__HAL_RCC_GET_USART1_SOURCE()) \ + { \ + case RCC_USART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART2) \ + { \ + switch(__HAL_RCC_GET_USART2_SOURCE()) \ + { \ + case RCC_USART2CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART2CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART2CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART2CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART3) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == USART4) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == LPUART1) \ + { \ + switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ + { \ + case RCC_LPUART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_LPUART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_LPUART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_LPUART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + } \ + } while(0U) +#elif defined(STM32G070xx) +/** @brief Report the UART clock source. + * @param __HANDLE__ specifies the UART Handle. + * @param __CLOCKSOURCE__ output variable. + * @retval UART clocking source, written in __CLOCKSOURCE__. + */ +#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ + do { \ + if((__HANDLE__)->Instance == USART1) \ + { \ + switch(__HAL_RCC_GET_USART1_SOURCE()) \ + { \ + case RCC_USART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART2) \ + { \ + switch(__HAL_RCC_GET_USART2_SOURCE()) \ + { \ + case RCC_USART2CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART2CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART2CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART2CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART3) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == USART4) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + } \ + } while(0U) +#elif defined(STM32G041xx) || defined(STM32G031xx) || defined(STM32G051xx) || defined(STM32G061xx) +/** @brief Report the UART clock source. + * @param __HANDLE__ specifies the UART Handle. + * @param __CLOCKSOURCE__ output variable. + * @retval UART clocking source, written in __CLOCKSOURCE__. + */ +#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ + do { \ + if((__HANDLE__)->Instance == USART1) \ + { \ + switch(__HAL_RCC_GET_USART1_SOURCE()) \ + { \ + case RCC_USART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART2) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else if((__HANDLE__)->Instance == LPUART1) \ + { \ + switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ + { \ + case RCC_LPUART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_LPUART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_LPUART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_LPUART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + } \ + } while(0U) +#elif defined(STM32G030xx) || defined(STM32G050xx) +/** @brief Report the UART clock source. + * @param __HANDLE__ specifies the UART Handle. + * @param __CLOCKSOURCE__ output variable. + * @retval UART clocking source, written in __CLOCKSOURCE__. + */ +#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ + do { \ + if((__HANDLE__)->Instance == USART1) \ + { \ + switch(__HAL_RCC_GET_USART1_SOURCE()) \ + { \ + case RCC_USART1CLKSOURCE_PCLK1: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + break; \ + case RCC_USART1CLKSOURCE_HSI: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ + break; \ + case RCC_USART1CLKSOURCE_SYSCLK: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ + break; \ + case RCC_USART1CLKSOURCE_LSE: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ + break; \ + default: \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + break; \ + } \ + } \ + else if((__HANDLE__)->Instance == USART2) \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ + } \ + else \ + { \ + (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ + } \ + } while(0U) +#endif /* STM32G0C1xx || STM32G0B1xx */ + +/** @brief Report the UART mask to apply to retrieve the received data + * according to the word length and to the parity bits activation. + * @note If PCE = 1, the parity bit is not included in the data extracted + * by the reception API(). + * This masking operation is not carried out in the case of + * DMA transfers. + * @param __HANDLE__ specifies the UART Handle. + * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. + */ +#define UART_MASK_COMPUTATION(__HANDLE__) \ + do { \ + if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ + { \ + if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ + { \ + (__HANDLE__)->Mask = 0x01FFU ; \ + } \ + else \ + { \ + (__HANDLE__)->Mask = 0x00FFU ; \ + } \ + } \ + else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ + { \ + if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ + { \ + (__HANDLE__)->Mask = 0x00FFU ; \ + } \ + else \ + { \ + (__HANDLE__)->Mask = 0x007FU ; \ + } \ + } \ + else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ + { \ + if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ + { \ + (__HANDLE__)->Mask = 0x007FU ; \ + } \ + else \ + { \ + (__HANDLE__)->Mask = 0x003FU ; \ + } \ + } \ + else \ + { \ + (__HANDLE__)->Mask = 0x0000U; \ + } \ + } while(0U) + +/** + * @brief Ensure that UART frame length is valid. + * @param __LENGTH__ UART frame length. + * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) + */ +#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ + ((__LENGTH__) == UART_WORDLENGTH_8B) || \ + ((__LENGTH__) == UART_WORDLENGTH_9B)) + +/** + * @brief Ensure that UART wake-up address length is valid. + * @param __ADDRESS__ UART wake-up address length. + * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) + */ +#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ + ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) + +/** + * @brief Ensure that UART TXFIFO threshold level is valid. + * @param __THRESHOLD__ UART TXFIFO threshold level. + * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) + */ +#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ + ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ + ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ + ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ + ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ + ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) + +/** + * @brief Ensure that UART RXFIFO threshold level is valid. + * @param __THRESHOLD__ UART RXFIFO threshold level. + * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) + */ +#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ + ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ + ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ + ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ + ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ + ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) + +/** + * @} + */ + +/* Private functions ---------------------------------------------------------*/ + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G0xx_HAL_UART_EX_H */ + diff --git a/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_lpuart.h b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_lpuart.h new file mode 100644 index 0000000..23f723a --- /dev/null +++ b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_lpuart.h @@ -0,0 +1,2651 @@ +/** + ****************************************************************************** + * @file stm32g0xx_ll_lpuart.h + * @author MCD Application Team + * @brief Header file of LPUART LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G0xx_LL_LPUART_H +#define STM32G0xx_LL_LPUART_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g0xx.h" + +/** @addtogroup STM32G0xx_LL_Driver + * @{ + */ + +#if defined (LPUART1) || defined (LPUART2) + +/** @defgroup LPUART_LL LPUART + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** @defgroup LPUART_LL_Private_Variables LPUART Private Variables + * @{ + */ +/* Array used to get the LPUART prescaler division decimal values versus @ref LPUART_LL_EC_PRESCALER values */ +static const uint16_t LPUART_PRESCALER_TAB[] = +{ + (uint16_t)1, + (uint16_t)2, + (uint16_t)4, + (uint16_t)6, + (uint16_t)8, + (uint16_t)10, + (uint16_t)12, + (uint16_t)16, + (uint16_t)32, + (uint16_t)64, + (uint16_t)128, + (uint16_t)256 +}; +/** + * @} + */ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup LPUART_LL_Private_Constants LPUART Private Constants + * @{ + */ +/* Defines used in Baud Rate related macros and corresponding register setting computation */ +#define LPUART_LPUARTDIV_FREQ_MUL 256U +#define LPUART_BRR_MASK 0x000FFFFFU +#define LPUART_BRR_MIN_VALUE 0x00000300U +/** + * @} + */ + + +/* Private macros ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup LPUART_LL_Private_Macros LPUART Private Macros + * @{ + */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures + * @{ + */ + +/** + * @brief LL LPUART Init Structure definition + */ +typedef struct +{ + uint32_t PrescalerValue; /*!< Specifies the Prescaler to compute the communication baud rate. + This parameter can be a value of @ref LPUART_LL_EC_PRESCALER. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetPrescaler().*/ + + uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetBaudRate().*/ + + uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetDataWidth().*/ + + uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref LPUART_LL_EC_STOPBITS. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetStopBitsLength().*/ + + uint32_t Parity; /*!< Specifies the parity mode. + This parameter can be a value of @ref LPUART_LL_EC_PARITY. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetParity().*/ + + uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled. + This parameter can be a value of @ref LPUART_LL_EC_DIRECTION. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetTransferDirection().*/ + + uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. + This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL. + + This feature can be modified afterwards using unitary + function @ref LL_LPUART_SetHWFlowCtrl().*/ + +} LL_LPUART_InitTypeDef; + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants + * @{ + */ + +/** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines + * @brief Flags defines which can be used with LL_LPUART_WriteReg function + * @{ + */ +#define LL_LPUART_ICR_PECF USART_ICR_PECF /*!< Parity error clear flag */ +#define LL_LPUART_ICR_FECF USART_ICR_FECF /*!< Framing error clear flag */ +#define LL_LPUART_ICR_NCF USART_ICR_NECF /*!< Noise error detected clear flag */ +#define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error clear flag */ +#define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected clear flag */ +#define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete clear flag */ +#define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag */ +#define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match clear flag */ +#define LL_LPUART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode clear flag */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_LPUART_ReadReg function + * @{ + */ +#define LL_LPUART_ISR_PE USART_ISR_PE /*!< Parity error flag */ +#define LL_LPUART_ISR_FE USART_ISR_FE /*!< Framing error flag */ +#define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag */ +#define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */ +#define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */ +#define LL_LPUART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE /*!< Read data register or RX FIFO not empty flag */ +#define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */ +#define LL_LPUART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF /*!< Transmit data register empty or TX FIFO Not Full flag*/ +#define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */ +#define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */ +#define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */ +#define LL_LPUART_ISR_CMF USART_ISR_CMF /*!< Character match flag */ +#define LL_LPUART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */ +#define LL_LPUART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */ +#define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */ +#define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */ +#define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */ +#define LL_LPUART_ISR_TXFE USART_ISR_TXFE /*!< TX FIFO empty flag */ +#define LL_LPUART_ISR_RXFF USART_ISR_RXFF /*!< RX FIFO full flag */ +#define LL_LPUART_ISR_RXFT USART_ISR_RXFT /*!< RX FIFO threshold flag */ +#define LL_LPUART_ISR_TXFT USART_ISR_TXFT /*!< TX FIFO threshold flag */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions + * @{ + */ +#define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */ +#define LL_LPUART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE /*!< Read data register and RXFIFO not empty + interrupt enable */ +#define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */ +#define LL_LPUART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE /*!< Transmit data register empty and TX FIFO + not full interrupt enable */ +#define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */ +#define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */ +#define LL_LPUART_CR1_TXFEIE USART_CR1_TXFEIE /*!< TX FIFO empty interrupt enable */ +#define LL_LPUART_CR1_RXFFIE USART_CR1_RXFFIE /*!< RX FIFO full interrupt enable */ +#define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */ +#define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */ +#define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */ +#define LL_LPUART_CR3_TXFTIE USART_CR3_TXFTIE /*!< TX FIFO threshold interrupt enable */ +#define LL_LPUART_CR3_RXFTIE USART_CR3_RXFTIE /*!< RX FIFO threshold interrupt enable */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_FIFOTHRESHOLD FIFO Threshold + * @{ + */ +#define LL_LPUART_FIFOTHRESHOLD_1_8 0x00000000U /*!< FIFO reaches 1/8 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_1_4 0x00000001U /*!< FIFO reaches 1/4 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_1_2 0x00000002U /*!< FIFO reaches 1/2 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_3_4 0x00000003U /*!< FIFO reaches 3/4 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_7_8 0x00000004U /*!< FIFO reaches 7/8 of its depth */ +#define LL_LPUART_FIFOTHRESHOLD_8_8 0x00000005U /*!< FIFO becomes empty for TX and full for RX */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_DIRECTION Direction + * @{ + */ +#define LL_LPUART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */ +#define LL_LPUART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */ +#define LL_LPUART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */ +#define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_PARITY Parity Control + * @{ + */ +#define LL_LPUART_PARITY_NONE 0x00000000U /*!< Parity control disabled */ +#define LL_LPUART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */ +#define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_WAKEUP Wakeup + * @{ + */ +#define LL_LPUART_WAKEUP_IDLELINE 0x00000000U /*!< LPUART wake up from Mute mode on Idle Line */ +#define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< LPUART wake up from Mute mode on Address Mark */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth + * @{ + */ +#define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */ +#define LL_LPUART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */ +#define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_PRESCALER Clock Source Prescaler + * @{ + */ +#define LL_LPUART_PRESCALER_DIV1 0x00000000U /*!< Input clock not divided */ +#define LL_LPUART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0) /*!< Input clock divided by 2 */ +#define LL_LPUART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1) /*!< Input clock divided by 4 */ +#define LL_LPUART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 6 */ +#define LL_LPUART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2) /*!< Input clock divided by 8 */ +#define LL_LPUART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 10 */ +#define LL_LPUART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 |\ + USART_PRESC_PRESCALER_1) /*!< Input clock divided by 12 */ +#define LL_LPUART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 |\ + USART_PRESC_PRESCALER_1 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 16 */ +#define LL_LPUART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3) /*!< Input clock divided by 32 */ +#define LL_LPUART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 64 */ +#define LL_LPUART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 |\ + USART_PRESC_PRESCALER_1) /*!< Input clock divided by 128 */ +#define LL_LPUART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 |\ + USART_PRESC_PRESCALER_1 |\ + USART_PRESC_PRESCALER_0) /*!< Input clock divided by 256 */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_STOPBITS Stop Bits + * @{ + */ +#define LL_LPUART_STOPBITS_1 0x00000000U /*!< 1 stop bit */ +#define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap + * @{ + */ +#define LL_LPUART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */ +#define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion + * @{ + */ +#define LL_LPUART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */ +#define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion + * @{ + */ +#define LL_LPUART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */ +#define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion + * @{ + */ +#define LL_LPUART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received + in positive/direct logic. (1=H, 0=L) */ +#define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received + in negative/inverse logic. (1=L, 0=H). + The parity bit is also inverted. */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_BITORDER Bit Order + * @{ + */ +#define LL_LPUART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first, + following the start bit */ +#define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, + following the start bit */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection + * @{ + */ +#define LL_LPUART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */ +#define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control + * @{ + */ +#define LL_LPUART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */ +#define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested + when there is space in the receive buffer */ +#define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted + when the nCTS input is asserted (tied to 0)*/ +#define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation + * @{ + */ +#define LL_LPUART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake up active on address match */ +#define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */ +#define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity + * @{ + */ +#define LL_LPUART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */ +#define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */ +/** + * @} + */ + +/** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data + * @{ + */ +#define LL_LPUART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */ +#define LL_LPUART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros + * @{ + */ + +/** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in LPUART register + * @param __INSTANCE__ LPUART Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in LPUART register + * @param __INSTANCE__ LPUART Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros + * @{ + */ + +/** + * @brief Compute LPUARTDIV value according to Peripheral Clock and + * expected Baud Rate (20-bit value of LPUARTDIV is returned) + * @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance + * @param __PRESCALER__ This parameter can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + * @param __BAUDRATE__ Baud Rate value to achieve + * @retval LPUARTDIV value to be used for BRR register filling + */ +#define __LL_LPUART_DIV(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) (uint32_t)\ + ((((((uint64_t)(__PERIPHCLK__)/(uint64_t)(LPUART_PRESCALER_TAB[(uint16_t)(__PRESCALER__)]))\ + * LPUART_LPUARTDIV_FREQ_MUL) + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__)) & LPUART_BRR_MASK) + +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions + * @{ + */ + +/** @defgroup LPUART_LL_EF_Configuration Configuration functions + * @{ + */ + +/** + * @brief LPUART Enable + * @rmtoll CR1 UE LL_LPUART_Enable + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR1, USART_CR1_UE); +} + +/** + * @brief LPUART Disable + * @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately, + * and current operations are discarded. The configuration of the LPUART is kept, but all the status + * flags, in the LPUARTx_ISR are set to their default values. + * @note In order to go into low-power mode without generating errors on the line, + * the TE bit must be reset before and the software must wait + * for the TC bit in the LPUART_ISR to be set before resetting the UE bit. + * The DMA requests are also reset when UE = 0 so the DMA channel must + * be disabled before resetting the UE bit. + * @rmtoll CR1 UE LL_LPUART_Disable + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE); +} + +/** + * @brief Indicate if LPUART is enabled + * @rmtoll CR1 UE LL_LPUART_IsEnabled + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabled(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL); +} + +/** + * @brief FIFO Mode Enable + * @rmtoll CR1 FIFOEN LL_LPUART_EnableFIFO + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR1, USART_CR1_FIFOEN); +} + +/** + * @brief FIFO Mode Disable + * @rmtoll CR1 FIFOEN LL_LPUART_DisableFIFO + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR1, USART_CR1_FIFOEN); +} + +/** + * @brief Indicate if FIFO Mode is enabled + * @rmtoll CR1 FIFOEN LL_LPUART_IsEnabledFIFO + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL); +} + +/** + * @brief Configure TX FIFO Threshold + * @rmtoll CR3 TXFTCFG LL_LPUART_SetTXFIFOThreshold + * @param LPUARTx LPUART Instance + * @param Threshold This parameter can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold) +{ + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); +} + +/** + * @brief Return TX FIFO Threshold Configuration + * @rmtoll CR3 TXFTCFG LL_LPUART_GetTXFIFOThreshold + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); +} + +/** + * @brief Configure RX FIFO Threshold + * @rmtoll CR3 RXFTCFG LL_LPUART_SetRXFIFOThreshold + * @param LPUARTx LPUART Instance + * @param Threshold This parameter can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold) +{ + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); +} + +/** + * @brief Return RX FIFO Threshold Configuration + * @rmtoll CR3 RXFTCFG LL_LPUART_GetRXFIFOThreshold + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); +} + +/** + * @brief Configure TX and RX FIFOs Threshold + * @rmtoll CR3 TXFTCFG LL_LPUART_ConfigFIFOsThreshold\n + * CR3 RXFTCFG LL_LPUART_ConfigFIFOsThreshold + * @param LPUARTx LPUART Instance + * @param TXThreshold This parameter can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + * @param RXThreshold This parameter can be one of the following values: + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold) +{ + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | \ + (RXThreshold << USART_CR3_RXFTCFG_Pos)); +} + +/** + * @brief LPUART enabled in STOP Mode + * @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that + * LPUART clock selection is HSI or LSE in RCC. + * @rmtoll CR1 UESM LL_LPUART_EnableInStopMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_UESM); +} + +/** + * @brief LPUART disabled in STOP Mode + * @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode + * @rmtoll CR1 UESM LL_LPUART_DisableInStopMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM); +} + +/** + * @brief Indicate if LPUART is enabled in STOP Mode + * (able to wake up MCU from Stop mode or not) + * @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL); +} + +/** + * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit) + * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RE); +} + +/** + * @brief Receiver Disable + * @rmtoll CR1 RE LL_LPUART_DisableDirectionRx + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE); +} + +/** + * @brief Transmitter Enable + * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TE); +} + +/** + * @brief Transmitter Disable + * @rmtoll CR1 TE LL_LPUART_DisableDirectionTx + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE); +} + +/** + * @brief Configure simultaneously enabled/disabled states + * of Transmitter and Receiver + * @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n + * CR1 TE LL_LPUART_SetTransferDirection + * @param LPUARTx LPUART Instance + * @param TransferDirection This parameter can be one of the following values: + * @arg @ref LL_LPUART_DIRECTION_NONE + * @arg @ref LL_LPUART_DIRECTION_RX + * @arg @ref LL_LPUART_DIRECTION_TX + * @arg @ref LL_LPUART_DIRECTION_TX_RX + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection) +{ + ATOMIC_MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); +} + +/** + * @brief Return enabled/disabled states of Transmitter and Receiver + * @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n + * CR1 TE LL_LPUART_GetTransferDirection + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_DIRECTION_NONE + * @arg @ref LL_LPUART_DIRECTION_RX + * @arg @ref LL_LPUART_DIRECTION_TX + * @arg @ref LL_LPUART_DIRECTION_TX_RX + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE)); +} + +/** + * @brief Configure Parity (enabled/disabled and parity mode if enabled) + * @note This function selects if hardware parity control (generation and detection) is enabled or disabled. + * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position + * (depending on data width) and parity is checked on the received data. + * @rmtoll CR1 PS LL_LPUART_SetParity\n + * CR1 PCE LL_LPUART_SetParity + * @param LPUARTx LPUART Instance + * @param Parity This parameter can be one of the following values: + * @arg @ref LL_LPUART_PARITY_NONE + * @arg @ref LL_LPUART_PARITY_EVEN + * @arg @ref LL_LPUART_PARITY_ODD + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity); +} + +/** + * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) + * @rmtoll CR1 PS LL_LPUART_GetParity\n + * CR1 PCE LL_LPUART_GetParity + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_PARITY_NONE + * @arg @ref LL_LPUART_PARITY_EVEN + * @arg @ref LL_LPUART_PARITY_ODD + */ +__STATIC_INLINE uint32_t LL_LPUART_GetParity(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE)); +} + +/** + * @brief Set Receiver Wake Up method from Mute mode. + * @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod + * @param LPUARTx LPUART Instance + * @param Method This parameter can be one of the following values: + * @arg @ref LL_LPUART_WAKEUP_IDLELINE + * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method); +} + +/** + * @brief Return Receiver Wake Up method from Mute mode + * @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_WAKEUP_IDLELINE + * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK + */ +__STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE)); +} + +/** + * @brief Set Word length (nb of data bits, excluding start and stop bits) + * @rmtoll CR1 M LL_LPUART_SetDataWidth + * @param LPUARTx LPUART Instance + * @param DataWidth This parameter can be one of the following values: + * @arg @ref LL_LPUART_DATAWIDTH_7B + * @arg @ref LL_LPUART_DATAWIDTH_8B + * @arg @ref LL_LPUART_DATAWIDTH_9B + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth); +} + +/** + * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) + * @rmtoll CR1 M LL_LPUART_GetDataWidth + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_DATAWIDTH_7B + * @arg @ref LL_LPUART_DATAWIDTH_8B + * @arg @ref LL_LPUART_DATAWIDTH_9B + */ +__STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M)); +} + +/** + * @brief Allow switch between Mute Mode and Active mode + * @rmtoll CR1 MME LL_LPUART_EnableMuteMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_MME); +} + +/** + * @brief Prevent Mute Mode use. Set Receiver in active mode permanently. + * @rmtoll CR1 MME LL_LPUART_DisableMuteMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME); +} + +/** + * @brief Indicate if switch between Mute Mode and Active mode is allowed + * @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL); +} + +/** + * @brief Configure Clock source prescaler for baudrate generator and oversampling + * @rmtoll PRESC PRESCALER LL_LPUART_SetPrescaler + * @param LPUARTx LPUART Instance + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue) +{ + MODIFY_REG(LPUARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue); +} + +/** + * @brief Retrieve the Clock source prescaler for baudrate generator and oversampling + * @rmtoll PRESC PRESCALER LL_LPUART_GetPrescaler + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->PRESC, USART_PRESC_PRESCALER)); +} + +/** + * @brief Set the length of the stop bits + * @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength + * @param LPUARTx LPUART Instance + * @param StopBits This parameter can be one of the following values: + * @arg @ref LL_LPUART_STOPBITS_1 + * @arg @ref LL_LPUART_STOPBITS_2 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); +} + +/** + * @brief Retrieve the length of the stop bits + * @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_STOPBITS_1 + * @arg @ref LL_LPUART_STOPBITS_2 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP)); +} + +/** + * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits) + * @note Call of this function is equivalent to following function call sequence : + * - Data Width configuration using @ref LL_LPUART_SetDataWidth() function + * - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function + * - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function + * @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n + * CR1 PCE LL_LPUART_ConfigCharacter\n + * CR1 M LL_LPUART_ConfigCharacter\n + * CR2 STOP LL_LPUART_ConfigCharacter + * @param LPUARTx LPUART Instance + * @param DataWidth This parameter can be one of the following values: + * @arg @ref LL_LPUART_DATAWIDTH_7B + * @arg @ref LL_LPUART_DATAWIDTH_8B + * @arg @ref LL_LPUART_DATAWIDTH_9B + * @param Parity This parameter can be one of the following values: + * @arg @ref LL_LPUART_PARITY_NONE + * @arg @ref LL_LPUART_PARITY_EVEN + * @arg @ref LL_LPUART_PARITY_ODD + * @param StopBits This parameter can be one of the following values: + * @arg @ref LL_LPUART_STOPBITS_1 + * @arg @ref LL_LPUART_STOPBITS_2 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity, + uint32_t StopBits) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth); + MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); +} + +/** + * @brief Configure TX/RX pins swapping setting. + * @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap + * @param LPUARTx LPUART Instance + * @param SwapConfig This parameter can be one of the following values: + * @arg @ref LL_LPUART_TXRX_STANDARD + * @arg @ref LL_LPUART_TXRX_SWAPPED + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig); +} + +/** + * @brief Retrieve TX/RX pins swapping configuration. + * @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_TXRX_STANDARD + * @arg @ref LL_LPUART_TXRX_SWAPPED + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP)); +} + +/** + * @brief Configure RX pin active level logic + * @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel + * @param LPUARTx LPUART Instance + * @param PinInvMethod This parameter can be one of the following values: + * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD + * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod); +} + +/** + * @brief Retrieve RX pin active level logic configuration + * @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD + * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED + */ +__STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV)); +} + +/** + * @brief Configure TX pin active level logic + * @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel + * @param LPUARTx LPUART Instance + * @param PinInvMethod This parameter can be one of the following values: + * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD + * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod); +} + +/** + * @brief Retrieve TX pin active level logic configuration + * @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD + * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV)); +} + +/** + * @brief Configure Binary data logic. + * + * @note Allow to define how Logical data from the data register are send/received : + * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H) + * @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic + * @param LPUARTx LPUART Instance + * @param DataLogic This parameter can be one of the following values: + * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE + * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic); +} + +/** + * @brief Retrieve Binary data configuration + * @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE + * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE + */ +__STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV)); +} + +/** + * @brief Configure transfer bit order (either Less or Most Significant Bit First) + * @note MSB First means data is transmitted/received with the MSB first, following the start bit. + * LSB First means data is transmitted/received with data bit 0 first, following the start bit. + * @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder + * @param LPUARTx LPUART Instance + * @param BitOrder This parameter can be one of the following values: + * @arg @ref LL_LPUART_BITORDER_LSBFIRST + * @arg @ref LL_LPUART_BITORDER_MSBFIRST + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder); +} + +/** + * @brief Return transfer bit order (either Less or Most Significant Bit First) + * @note MSB First means data is transmitted/received with the MSB first, following the start bit. + * LSB First means data is transmitted/received with data bit 0 first, following the start bit. + * @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_BITORDER_LSBFIRST + * @arg @ref LL_LPUART_BITORDER_MSBFIRST + */ +__STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST)); +} + +/** + * @brief Set Address of the LPUART node. + * @note This is used in multiprocessor communication during Mute mode or Stop mode, + * for wake up with address mark detection. + * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7. + * (b7-b4 should be set to 0) + * 8bits address node is used when 7-bit Address Detection is selected in ADDM7. + * (This is used in multiprocessor communication during Mute mode or Stop mode, + * for wake up with 7-bit address mark detection. + * The MSB of the character sent by the transmitter should be equal to 1. + * It may also be used for character detection during normal reception, + * Mute mode inactive (for example, end of block detection in ModBus protocol). + * In this case, the whole received character (8-bit) is compared to the ADD[7:0] + * value and CMF flag is set on match) + * @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n + * CR2 ADDM7 LL_LPUART_ConfigNodeAddress + * @param LPUARTx LPUART Instance + * @param AddressLen This parameter can be one of the following values: + * @arg @ref LL_LPUART_ADDRESS_DETECT_4B + * @arg @ref LL_LPUART_ADDRESS_DETECT_7B + * @param NodeAddress 4 or 7 bit Address of the LPUART node. + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress) +{ + MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7, + (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos))); +} + +/** + * @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2. + * @note If 4-bit Address Detection is selected in ADDM7, + * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant) + * If 7-bit Address Detection is selected in ADDM7, + * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant) + * @rmtoll CR2 ADD LL_LPUART_GetNodeAddress + * @param LPUARTx LPUART Instance + * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255) + */ +__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos); +} + +/** + * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) + * @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_ADDRESS_DETECT_4B + * @arg @ref LL_LPUART_ADDRESS_DETECT_7B + */ +__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7)); +} + +/** + * @brief Enable RTS HW Flow Control + * @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_RTSE); +} + +/** + * @brief Disable RTS HW Flow Control + * @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE); +} + +/** + * @brief Enable CTS HW Flow Control + * @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_CTSE); +} + +/** + * @brief Disable CTS HW Flow Control + * @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE); +} + +/** + * @brief Configure HW Flow Control mode (both CTS and RTS) + * @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n + * CR3 CTSE LL_LPUART_SetHWFlowCtrl + * @param LPUARTx LPUART Instance + * @param HardwareFlowControl This parameter can be one of the following values: + * @arg @ref LL_LPUART_HWCONTROL_NONE + * @arg @ref LL_LPUART_HWCONTROL_RTS + * @arg @ref LL_LPUART_HWCONTROL_CTS + * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl) +{ + MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); +} + +/** + * @brief Return HW Flow Control configuration (both CTS and RTS) + * @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n + * CR3 CTSE LL_LPUART_GetHWFlowCtrl + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_HWCONTROL_NONE + * @arg @ref LL_LPUART_HWCONTROL_RTS + * @arg @ref LL_LPUART_HWCONTROL_CTS + * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS + */ +__STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); +} + +/** + * @brief Enable Overrun detection + * @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS); +} + +/** + * @brief Disable Overrun detection + * @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS); +} + +/** + * @brief Indicate if Overrun detection is enabled + * @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL); +} + +/** + * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) + * @rmtoll CR3 WUS LL_LPUART_SetWKUPType + * @param LPUARTx LPUART Instance + * @param Type This parameter can be one of the following values: + * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS + * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT + * @arg @ref LL_LPUART_WAKEUP_ON_RXNE + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type) +{ + MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type); +} + +/** + * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits) + * @rmtoll CR3 WUS LL_LPUART_GetWKUPType + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS + * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT + * @arg @ref LL_LPUART_WAKEUP_ON_RXNE + */ +__STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS)); +} + +/** + * @brief Configure LPUART BRR register for achieving expected Baud Rate value. + * + * @note Compute and set LPUARTDIV value in BRR Register (full BRR content) + * according to used Peripheral Clock and expected Baud Rate values + * @note Peripheral clock and Baud Rate values provided as function parameters should be valid + * (Baud rate value != 0). + * @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit, + * a care should be taken when generating high baud rates using high PeriphClk + * values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate]. + * @rmtoll BRR BRR LL_LPUART_SetBaudRate + * @param LPUARTx LPUART Instance + * @param PeriphClk Peripheral Clock + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + * @param BaudRate Baud Rate + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue, + uint32_t BaudRate) +{ + if (BaudRate != 0U) + { + LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, PrescalerValue, BaudRate); + } +} + +/** + * @brief Return current Baud Rate value, according to LPUARTDIV present in BRR register + * (full BRR content), and to used Peripheral Clock values + * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned. + * @rmtoll BRR BRR LL_LPUART_GetBaudRate + * @param LPUARTx LPUART Instance + * @param PeriphClk Peripheral Clock + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_LPUART_PRESCALER_DIV1 + * @arg @ref LL_LPUART_PRESCALER_DIV2 + * @arg @ref LL_LPUART_PRESCALER_DIV4 + * @arg @ref LL_LPUART_PRESCALER_DIV6 + * @arg @ref LL_LPUART_PRESCALER_DIV8 + * @arg @ref LL_LPUART_PRESCALER_DIV10 + * @arg @ref LL_LPUART_PRESCALER_DIV12 + * @arg @ref LL_LPUART_PRESCALER_DIV16 + * @arg @ref LL_LPUART_PRESCALER_DIV32 + * @arg @ref LL_LPUART_PRESCALER_DIV64 + * @arg @ref LL_LPUART_PRESCALER_DIV128 + * @arg @ref LL_LPUART_PRESCALER_DIV256 + * @retval Baud Rate + */ +__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(const USART_TypeDef *LPUARTx, uint32_t PeriphClk, + uint32_t PrescalerValue) +{ + uint32_t lpuartdiv; + uint32_t brrresult; + uint32_t periphclkpresc = (uint32_t)(PeriphClk / (LPUART_PRESCALER_TAB[(uint16_t)PrescalerValue])); + + lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK; + + if (lpuartdiv >= LPUART_BRR_MIN_VALUE) + { + brrresult = (uint32_t)(((uint64_t)(periphclkpresc) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv); + } + else + { + brrresult = 0x0UL; + } + + return (brrresult); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature + * @{ + */ + +/** + * @brief Enable Single Wire Half-Duplex mode + * @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Disable Single Wire Half-Duplex mode + * @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Indicate if Single Wire Half-Duplex mode is enabled + * @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature + * @{ + */ + +/** + * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits). + * @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime + * @param LPUARTx LPUART Instance + * @param Time Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos); +} + +/** + * @brief Return DEDT (Driver Enable De-Assertion Time) + * @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime + * @param LPUARTx LPUART Instance + * @retval Time value expressed on 5 bits ([4:0] bits) : c + */ +__STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos); +} + +/** + * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits). + * @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime + * @param LPUARTx LPUART Instance + * @param Time Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time) +{ + MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos); +} + +/** + * @brief Return DEAT (Driver Enable Assertion Time) + * @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime + * @param LPUARTx LPUART Instance + * @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31 + */ +__STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos); +} + +/** + * @brief Enable Driver Enable (DE) Mode + * @rmtoll CR3 DEM LL_LPUART_EnableDEMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_DEM); +} + +/** + * @brief Disable Driver Enable (DE) Mode + * @rmtoll CR3 DEM LL_LPUART_DisableDEMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM); +} + +/** + * @brief Indicate if Driver Enable (DE) Mode is enabled + * @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); +} + +/** + * @brief Select Driver Enable Polarity + * @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity + * @param LPUARTx LPUART Instance + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_LPUART_DE_POLARITY_HIGH + * @arg @ref LL_LPUART_DE_POLARITY_LOW + * @retval None + */ +__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity) +{ + MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity); +} + +/** + * @brief Return Driver Enable Polarity + * @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity + * @param LPUARTx LPUART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_LPUART_DE_POLARITY_HIGH + * @arg @ref LL_LPUART_DE_POLARITY_LOW + */ +__STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(const USART_TypeDef *LPUARTx) +{ + return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP)); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Check if the LPUART Parity Error Flag is set or not + * @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Framing Error Flag is set or not + * @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Noise error detected Flag is set or not + * @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART OverRun Error Flag is set or not + * @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART IDLE line detected Flag is set or not + * @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL); +} + +/* Legacy define */ +#define LL_LPUART_IsActiveFlag_RXNE LL_LPUART_IsActiveFlag_RXNE_RXFNE + +/** + * @brief Check if the LPUART Read Data Register or LPUART RX FIFO Not Empty Flag is set or not + * @rmtoll ISR RXNE_RXFNE LL_LPUART_IsActiveFlag_RXNE_RXFNE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Transmission Complete Flag is set or not + * @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL); +} + +/* Legacy define */ +#define LL_LPUART_IsActiveFlag_TXE LL_LPUART_IsActiveFlag_TXE_TXFNF + +/** + * @brief Check if the LPUART Transmit Data Register Empty or LPUART TX FIFO Not Full Flag is set or not + * @rmtoll ISR TXE_TXFNF LL_LPUART_IsActiveFlag_TXE_TXFNF + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART CTS interrupt Flag is set or not + * @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART CTS Flag is set or not + * @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Busy Flag is set or not + * @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Character Match Flag is set or not + * @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Send Break Flag is set or not + * @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not + * @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Wake Up from stop mode Flag is set or not + * @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not + * @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not + * @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART TX FIFO Empty Flag is set or not + * @rmtoll ISR TXFE LL_LPUART_IsActiveFlag_TXFE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART RX FIFO Full Flag is set or not + * @rmtoll ISR RXFF LL_LPUART_IsActiveFlag_RXFF + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART TX FIFO Threshold Flag is set or not + * @rmtoll ISR TXFT LL_LPUART_IsActiveFlag_TXFT + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART RX FIFO Threshold Flag is set or not + * @rmtoll ISR RXFT LL_LPUART_IsActiveFlag_RXFT + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL); +} + +/** + * @brief Clear Parity Error Flag + * @rmtoll ICR PECF LL_LPUART_ClearFlag_PE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_PECF); +} + +/** + * @brief Clear Framing Error Flag + * @rmtoll ICR FECF LL_LPUART_ClearFlag_FE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_FECF); +} + +/** + * @brief Clear Noise detected Flag + * @rmtoll ICR NECF LL_LPUART_ClearFlag_NE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_NECF); +} + +/** + * @brief Clear OverRun Error Flag + * @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF); +} + +/** + * @brief Clear IDLE line detected Flag + * @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF); +} + +/** + * @brief Clear Transmission Complete Flag + * @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF); +} + +/** + * @brief Clear CTS Interrupt Flag + * @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF); +} + +/** + * @brief Clear Character Match Flag + * @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF); +} + +/** + * @brief Clear Wake Up from stop mode Flag + * @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx) +{ + WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_IT_Management IT_Management + * @{ + */ + +/** + * @brief Enable IDLE Interrupt + * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); +} + +/* Legacy define */ +#define LL_LPUART_EnableIT_RXNE LL_LPUART_EnableIT_RXNE_RXFNE + +/** + * @brief Enable RX Not Empty and RX FIFO Not Empty Interrupt + * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_EnableIT_RXNE_RXFNE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); +} + +/** + * @brief Enable Transmission Complete Interrupt + * @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TCIE); +} + +/* Legacy define */ +#define LL_LPUART_EnableIT_TXE LL_LPUART_EnableIT_TXE_TXFNF + +/** + * @brief Enable TX Empty and TX FIFO Not Full Interrupt + * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_EnableIT_TXE_TXFNF + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); +} + +/** + * @brief Enable Parity Error Interrupt + * @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_PEIE); +} + +/** + * @brief Enable Character Match Interrupt + * @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_CMIE); +} + +/** + * @brief Enable TX FIFO Empty Interrupt + * @rmtoll CR1 TXFEIE LL_LPUART_EnableIT_TXFE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); +} + +/** + * @brief Enable RX FIFO Full Interrupt + * @rmtoll CR1 RXFFIE LL_LPUART_EnableIT_RXFF + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); +} + +/** + * @brief Enable Error Interrupt + * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing + * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register). + * - 0: Interrupt is inhibited + * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register. + * @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_EIE); +} + +/** + * @brief Enable CTS Interrupt + * @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE); +} + +/** + * @brief Enable Wake Up from Stop Mode Interrupt + * @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE); +} + +/** + * @brief Enable TX FIFO Threshold Interrupt + * @rmtoll CR3 TXFTIE LL_LPUART_EnableIT_TXFT + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); +} + +/** + * @brief Enable RX FIFO Threshold Interrupt + * @rmtoll CR3 RXFTIE LL_LPUART_EnableIT_RXFT + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); +} + +/** + * @brief Disable IDLE Interrupt + * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); +} + +/* Legacy define */ +#define LL_LPUART_DisableIT_RXNE LL_LPUART_DisableIT_RXNE_RXFNE + +/** + * @brief Disable RX Not Empty and RX FIFO Not Empty Interrupt + * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_DisableIT_RXNE_RXFNE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); +} + +/** + * @brief Disable Transmission Complete Interrupt + * @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE); +} + +/* Legacy define */ +#define LL_LPUART_DisableIT_TXE LL_LPUART_DisableIT_TXE_TXFNF + +/** + * @brief Disable TX Empty and TX FIFO Not Full Interrupt + * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_DisableIT_TXE_TXFNF + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); +} + +/** + * @brief Disable Parity Error Interrupt + * @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE); +} + +/** + * @brief Disable Character Match Interrupt + * @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE); +} + +/** + * @brief Disable TX FIFO Empty Interrupt + * @rmtoll CR1 TXFEIE LL_LPUART_DisableIT_TXFE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); +} + +/** + * @brief Disable RX FIFO Full Interrupt + * @rmtoll CR1 RXFFIE LL_LPUART_DisableIT_RXFF + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); +} + +/** + * @brief Disable Error Interrupt + * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing + * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register). + * - 0: Interrupt is inhibited + * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register. + * @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE); +} + +/** + * @brief Disable CTS Interrupt + * @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE); +} + +/** + * @brief Disable Wake Up from Stop Mode Interrupt + * @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE); +} + +/** + * @brief Disable TX FIFO Threshold Interrupt + * @rmtoll CR3 TXFTIE LL_LPUART_DisableIT_TXFT + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); +} + +/** + * @brief Disable RX FIFO Threshold Interrupt + * @rmtoll CR3 RXFTIE LL_LPUART_DisableIT_RXFT + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); +} + +/** + * @brief Check if the LPUART IDLE Interrupt source is enabled or disabled. + * @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL); +} + +/* Legacy define */ +#define LL_LPUART_IsEnabledIT_RXNE LL_LPUART_IsEnabledIT_RXNE_RXFNE + +/** + * @brief Check if the LPUART RX Not Empty and LPUART RX FIFO Not Empty Interrupt is enabled or disabled. + * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_IsEnabledIT_RXNE_RXFNE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled. + * @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL); +} + +/* Legacy define */ +#define LL_LPUART_IsEnabledIT_TXE LL_LPUART_IsEnabledIT_TXE_TXFNF + +/** + * @brief Check if the LPUART TX Empty and LPUART TX FIFO Not Full Interrupt is enabled or disabled + * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_IsEnabledIT_TXE_TXFNF + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Parity Error Interrupt is enabled or disabled. + * @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Character Match Interrupt is enabled or disabled. + * @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART TX FIFO Empty Interrupt is enabled or disabled + * @rmtoll CR1 TXFEIE LL_LPUART_IsEnabledIT_TXFE + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART RX FIFO Full Interrupt is enabled or disabled + * @rmtoll CR1 RXFFIE LL_LPUART_IsEnabledIT_RXFF + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Error Interrupt is enabled or disabled. + * @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART CTS Interrupt is enabled or disabled. + * @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled. + * @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if LPUART TX FIFO Threshold Interrupt is enabled or disabled + * @rmtoll CR3 TXFTIE LL_LPUART_IsEnabledIT_TXFT + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if LPUART RX FIFO Threshold Interrupt is enabled or disabled + * @rmtoll CR3 RXFTIE LL_LPUART_IsEnabledIT_RXFT + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_DMA_Management DMA_Management + * @{ + */ + +/** + * @brief Enable DMA Mode for reception + * @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAR); +} + +/** + * @brief Disable DMA Mode for reception + * @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR); +} + +/** + * @brief Check if DMA Mode is enabled for reception + * @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL); +} + +/** + * @brief Enable DMA Mode for transmission + * @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx) +{ + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAT); +} + +/** + * @brief Disable DMA Mode for transmission + * @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx) +{ + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT); +} + +/** + * @brief Check if DMA Mode is enabled for transmission + * @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL); +} + +/** + * @brief Enable DMA Disabling on Reception Error + * @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->CR3, USART_CR3_DDRE); +} + +/** + * @brief Disable DMA Disabling on Reception Error + * @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx) +{ + CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE); +} + +/** + * @brief Indicate if DMA Disabling on Reception Error is disabled + * @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr + * @param LPUARTx LPUART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(const USART_TypeDef *LPUARTx) +{ + return ((READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL); +} + +/** + * @brief Get the LPUART data register address used for DMA transfer + * @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n + * @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr + * @param LPUARTx LPUART Instance + * @param Direction This parameter can be one of the following values: + * @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT + * @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE + * @retval Address of data register + */ +__STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(const USART_TypeDef *LPUARTx, uint32_t Direction) +{ + uint32_t data_reg_addr; + + if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT) + { + /* return address of TDR register */ + data_reg_addr = (uint32_t) &(LPUARTx->TDR); + } + else + { + /* return address of RDR register */ + data_reg_addr = (uint32_t) &(LPUARTx->RDR); + } + + return data_reg_addr; +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_Data_Management Data_Management + * @{ + */ + +/** + * @brief Read Receiver Data register (Receive Data value, 8 bits) + * @rmtoll RDR RDR LL_LPUART_ReceiveData8 + * @param LPUARTx LPUART Instance + * @retval Time Value between Min_Data=0x00 and Max_Data=0xFF + */ +__STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(const USART_TypeDef *LPUARTx) +{ + return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR) & 0xFFU); +} + +/** + * @brief Read Receiver Data register (Receive Data value, 9 bits) + * @rmtoll RDR RDR LL_LPUART_ReceiveData9 + * @param LPUARTx LPUART Instance + * @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF + */ +__STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(const USART_TypeDef *LPUARTx) +{ + return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR)); +} + +/** + * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) + * @rmtoll TDR TDR LL_LPUART_TransmitData8 + * @param LPUARTx LPUART Instance + * @param Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value) +{ + LPUARTx->TDR = Value; +} + +/** + * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits) + * @rmtoll TDR TDR LL_LPUART_TransmitData9 + * @param LPUARTx LPUART Instance + * @param Value between Min_Data=0x00 and Max_Data=0x1FF + * @retval None + */ +__STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value) +{ + LPUARTx->TDR = Value & 0x1FFUL; +} + +/** + * @} + */ + +/** @defgroup LPUART_LL_EF_Execution Execution + * @{ + */ + +/** + * @brief Request Break sending + * @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_SBKRQ); +} + +/** + * @brief Put LPUART in mute mode and set the RWU flag + * @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_MMRQ); +} + +/** + * @brief Request a Receive Data and FIFO flush + * @note Allows to discard the received data without reading them, and avoid an overrun + * condition. + * @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx) +{ + SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_RXFRQ); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions + * @{ + */ +ErrorStatus LL_LPUART_DeInit(const USART_TypeDef *LPUARTx); +ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, const LL_LPUART_InitTypeDef *LPUART_InitStruct); +void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct); +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* LPUART1 || LPUART2 */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G0xx_LL_LPUART_H */ + diff --git a/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_usart.h b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_usart.h new file mode 100644 index 0000000..69405e8 --- /dev/null +++ b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_usart.h @@ -0,0 +1,4401 @@ +/** + ****************************************************************************** + * @file stm32g0xx_ll_usart.h + * @author MCD Application Team + * @brief Header file of USART LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G0xx_LL_USART_H +#define STM32G0xx_LL_USART_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g0xx.h" + +/** @addtogroup STM32G0xx_LL_Driver + * @{ + */ + +#if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART4) || defined (USART5) || defined (USART6) + +/** @defgroup USART_LL USART + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** @defgroup USART_LL_Private_Variables USART Private Variables + * @{ + */ +/* Array used to get the USART prescaler division decimal values versus @ref USART_LL_EC_PRESCALER values */ +static const uint32_t USART_PRESCALER_TAB[] = +{ + 1UL, + 2UL, + 4UL, + 6UL, + 8UL, + 10UL, + 12UL, + 16UL, + 32UL, + 64UL, + 128UL, + 256UL +}; +/** + * @} + */ + +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup USART_LL_Private_Macros USART Private Macros + * @{ + */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup USART_LL_ES_INIT USART Exported Init structures + * @{ + */ + +/** + * @brief LL USART Init Structure definition + */ +typedef struct +{ + uint32_t PrescalerValue; /*!< Specifies the Prescaler to compute the communication baud rate. + This parameter can be a value of @ref USART_LL_EC_PRESCALER. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetPrescaler().*/ + + uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetBaudRate().*/ + + uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref USART_LL_EC_DATAWIDTH. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetDataWidth().*/ + + uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref USART_LL_EC_STOPBITS. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetStopBitsLength().*/ + + uint32_t Parity; /*!< Specifies the parity mode. + This parameter can be a value of @ref USART_LL_EC_PARITY. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetParity().*/ + + uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled. + This parameter can be a value of @ref USART_LL_EC_DIRECTION. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetTransferDirection().*/ + + uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. + This parameter can be a value of @ref USART_LL_EC_HWCONTROL. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetHWFlowCtrl().*/ + + uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8. + This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetOverSampling().*/ + +} LL_USART_InitTypeDef; + +/** + * @brief LL USART Clock Init Structure definition + */ +typedef struct +{ + uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled. + This parameter can be a value of @ref USART_LL_EC_CLOCK. + + USART HW configuration can be modified afterwards using unitary functions + @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput(). + For more details, refer to description of this function. */ + + uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. + This parameter can be a value of @ref USART_LL_EC_POLARITY. + + USART HW configuration can be modified afterwards using unitary + functions @ref LL_USART_SetClockPolarity(). + For more details, refer to description of this function. */ + + uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made. + This parameter can be a value of @ref USART_LL_EC_PHASE. + + USART HW configuration can be modified afterwards using unitary + functions @ref LL_USART_SetClockPhase(). + For more details, refer to description of this function. */ + + uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted + data bit (MSB) has to be output on the SCLK pin in synchronous mode. + This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE. + + USART HW configuration can be modified afterwards using unitary + functions @ref LL_USART_SetLastClkPulseOutput(). + For more details, refer to description of this function. */ + +} LL_USART_ClockInitTypeDef; + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup USART_LL_Exported_Constants USART Exported Constants + * @{ + */ + +/** @defgroup USART_LL_EC_CLEAR_FLAG Clear Flags Defines + * @brief Flags defines which can be used with LL_USART_WriteReg function + * @{ + */ +#define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error clear flag */ +#define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error clear flag */ +#define LL_USART_ICR_NECF USART_ICR_NECF /*!< Noise error detected clear flag */ +#define LL_USART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error clear flag */ +#define LL_USART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected clear flag */ +#define LL_USART_ICR_TXFECF USART_ICR_TXFECF /*!< TX FIFO Empty clear flag */ +#define LL_USART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete clear flag */ +#define LL_USART_ICR_TCBGTCF USART_ICR_TCBGTCF /*!< Transmission completed before guard time clear flag */ +#define LL_USART_ICR_LBDCF USART_ICR_LBDCF /*!< LIN break detection clear flag */ +#define LL_USART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag */ +#define LL_USART_ICR_RTOCF USART_ICR_RTOCF /*!< Receiver timeout clear flag */ +#define LL_USART_ICR_EOBCF USART_ICR_EOBCF /*!< End of block clear flag */ +#define LL_USART_ICR_UDRCF USART_ICR_UDRCF /*!< SPI Slave Underrun clear flag */ +#define LL_USART_ICR_CMCF USART_ICR_CMCF /*!< Character match clear flag */ +#define LL_USART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode clear flag */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_USART_ReadReg function + * @{ + */ +#define LL_USART_ISR_PE USART_ISR_PE /*!< Parity error flag */ +#define LL_USART_ISR_FE USART_ISR_FE /*!< Framing error flag */ +#define LL_USART_ISR_NE USART_ISR_NE /*!< Noise detected flag */ +#define LL_USART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */ +#define LL_USART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */ +#define LL_USART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE /*!< Read data register or RX FIFO not empty flag */ +#define LL_USART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */ +#define LL_USART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF /*!< Transmit data register empty or TX FIFO Not Full flag*/ +#define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detection flag */ +#define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */ +#define LL_USART_ISR_CTS USART_ISR_CTS /*!< CTS flag */ +#define LL_USART_ISR_RTOF USART_ISR_RTOF /*!< Receiver timeout flag */ +#define LL_USART_ISR_EOBF USART_ISR_EOBF /*!< End of block flag */ +#define LL_USART_ISR_UDR USART_ISR_UDR /*!< SPI Slave underrun error flag */ +#define LL_USART_ISR_ABRE USART_ISR_ABRE /*!< Auto baud rate error flag */ +#define LL_USART_ISR_ABRF USART_ISR_ABRF /*!< Auto baud rate flag */ +#define LL_USART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */ +#define LL_USART_ISR_CMF USART_ISR_CMF /*!< Character match flag */ +#define LL_USART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */ +#define LL_USART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */ +#define LL_USART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */ +#define LL_USART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */ +#define LL_USART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */ +#define LL_USART_ISR_TXFE USART_ISR_TXFE /*!< TX FIFO empty flag */ +#define LL_USART_ISR_RXFF USART_ISR_RXFF /*!< RX FIFO full flag */ +#define LL_USART_ISR_TCBGT USART_ISR_TCBGT /*!< Transmission complete before guard time completion flag */ +#define LL_USART_ISR_RXFT USART_ISR_RXFT /*!< RX FIFO threshold flag */ +#define LL_USART_ISR_TXFT USART_ISR_TXFT /*!< TX FIFO threshold flag */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions + * @{ + */ +#define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */ +#define LL_USART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE /*!< Read data register and RXFIFO not empty interrupt enable */ +#define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */ +#define LL_USART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE /*!< Transmit data register empty and TX FIFO not full interrupt enable */ +#define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */ +#define LL_USART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */ +#define LL_USART_CR1_RTOIE USART_CR1_RTOIE /*!< Receiver timeout interrupt enable */ +#define LL_USART_CR1_EOBIE USART_CR1_EOBIE /*!< End of Block interrupt enable */ +#define LL_USART_CR1_TXFEIE USART_CR1_TXFEIE /*!< TX FIFO empty interrupt enable */ +#define LL_USART_CR1_RXFFIE USART_CR1_RXFFIE /*!< RX FIFO full interrupt enable */ +#define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */ +#define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */ +#define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */ +#define LL_USART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */ +#define LL_USART_CR3_TXFTIE USART_CR3_TXFTIE /*!< TX FIFO threshold interrupt enable */ +#define LL_USART_CR3_TCBGTIE USART_CR3_TCBGTIE /*!< Transmission complete before guard time interrupt enable */ +#define LL_USART_CR3_RXFTIE USART_CR3_RXFTIE /*!< RX FIFO threshold interrupt enable */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_FIFOTHRESHOLD FIFO Threshold + * @{ + */ +#define LL_USART_FIFOTHRESHOLD_1_8 0x00000000U /*!< FIFO reaches 1/8 of its depth */ +#define LL_USART_FIFOTHRESHOLD_1_4 0x00000001U /*!< FIFO reaches 1/4 of its depth */ +#define LL_USART_FIFOTHRESHOLD_1_2 0x00000002U /*!< FIFO reaches 1/2 of its depth */ +#define LL_USART_FIFOTHRESHOLD_3_4 0x00000003U /*!< FIFO reaches 3/4 of its depth */ +#define LL_USART_FIFOTHRESHOLD_7_8 0x00000004U /*!< FIFO reaches 7/8 of its depth */ +#define LL_USART_FIFOTHRESHOLD_8_8 0x00000005U /*!< FIFO becomes empty for TX and full for RX */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_DIRECTION Communication Direction + * @{ + */ +#define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */ +#define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */ +#define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */ +#define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_PARITY Parity Control + * @{ + */ +#define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */ +#define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */ +#define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_WAKEUP Wakeup + * @{ + */ +#define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */ +#define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_DATAWIDTH Datawidth + * @{ + */ +#define LL_USART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */ +#define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */ +#define LL_USART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling + * @{ + */ +#define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ +#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup USART_LL_EC_CLOCK Clock Signal + * @{ + */ + +#define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */ +#define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse + * @{ + */ +#define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */ +#define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_PHASE Clock Phase + * @{ + */ +#define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */ +#define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_POLARITY Clock Polarity + * @{ + */ +#define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/ +#define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_PRESCALER Clock Source Prescaler + * @{ + */ +#define LL_USART_PRESCALER_DIV1 0x00000000U /*!< Input clock not divided */ +#define LL_USART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0) /*!< Input clock divided by 2 */ +#define LL_USART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1) /*!< Input clock divided by 4 */ +#define LL_USART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock divided by 6 */ +#define LL_USART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2) /*!< Input clock divided by 8 */ +#define LL_USART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_0) /*!< Input clock divided by 10 */ +#define LL_USART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1) /*!< Input clock divided by 12 */ +#define LL_USART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock divided by 16 */ +#define LL_USART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3) /*!< Input clock divided by 32 */ +#define LL_USART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_0) /*!< Input clock divided by 64 */ +#define LL_USART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1) /*!< Input clock divided by 128 */ +#define LL_USART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock divided by 256 */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_STOPBITS Stop Bits + * @{ + */ +#define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */ +#define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */ +#define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */ +#define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_TXRX TX RX Pins Swap + * @{ + */ +#define LL_USART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */ +#define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion + * @{ + */ +#define LL_USART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */ +#define LL_USART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion + * @{ + */ +#define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */ +#define LL_USART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion + * @{ + */ +#define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */ +#define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_BITORDER Bit Order + * @{ + */ +#define LL_USART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */ +#define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, following the start bit */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_AUTOBAUD_DETECT_ON Autobaud Detection + * @{ + */ +#define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT 0x00000000U /*!< Measurement of the start bit is used to detect the baud rate */ +#define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0 /*!< Falling edge to falling edge measurement. Received frame must start with a single bit = 1 -> Frame = Start10xxxxxx */ +#define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1 /*!< 0x7F frame detection */ +#define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0) /*!< 0x55 frame detection */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_ADDRESS_DETECT Address Length Detection + * @{ + */ +#define LL_USART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */ +#define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_HWCONTROL Hardware Control + * @{ + */ +#define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */ +#define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */ +#define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */ +#define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_WAKEUP_ON Wakeup Activation + * @{ + */ +#define LL_USART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake up active on address match */ +#define LL_USART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */ +#define LL_USART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_IRDA_POWER IrDA Power + * @{ + */ +#define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */ +#define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length + * @{ + */ +#define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */ +#define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_DE_POLARITY Driver Enable Polarity + * @{ + */ +#define LL_USART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */ +#define LL_USART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_DMA_REG_DATA DMA Register Data + * @{ + */ +#define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */ +#define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup USART_LL_Exported_Macros USART Exported Macros + * @{ + */ + +/** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in USART register + * @param __INSTANCE__ USART Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in USART register + * @param __INSTANCE__ USART Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper + * @{ + */ + +/** + * @brief Compute USARTDIV value according to Peripheral Clock and + * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned) + * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance + * @param __PRESCALER__ This parameter can be one of the following values: + * @arg @ref LL_USART_PRESCALER_DIV1 + * @arg @ref LL_USART_PRESCALER_DIV2 + * @arg @ref LL_USART_PRESCALER_DIV4 + * @arg @ref LL_USART_PRESCALER_DIV6 + * @arg @ref LL_USART_PRESCALER_DIV8 + * @arg @ref LL_USART_PRESCALER_DIV10 + * @arg @ref LL_USART_PRESCALER_DIV12 + * @arg @ref LL_USART_PRESCALER_DIV16 + * @arg @ref LL_USART_PRESCALER_DIV32 + * @arg @ref LL_USART_PRESCALER_DIV64 + * @arg @ref LL_USART_PRESCALER_DIV128 + * @arg @ref LL_USART_PRESCALER_DIV256 + * @param __BAUDRATE__ Baud rate value to achieve + * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case + */ +#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) \ + (((((__PERIPHCLK__)/(USART_PRESCALER_TAB[(__PRESCALER__)]))*2U)\ + + ((__BAUDRATE__)/2U))/(__BAUDRATE__)) + +/** + * @brief Compute USARTDIV value according to Peripheral Clock and + * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned) + * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance + * @param __PRESCALER__ This parameter can be one of the following values: + * @arg @ref LL_USART_PRESCALER_DIV1 + * @arg @ref LL_USART_PRESCALER_DIV2 + * @arg @ref LL_USART_PRESCALER_DIV4 + * @arg @ref LL_USART_PRESCALER_DIV6 + * @arg @ref LL_USART_PRESCALER_DIV8 + * @arg @ref LL_USART_PRESCALER_DIV10 + * @arg @ref LL_USART_PRESCALER_DIV12 + * @arg @ref LL_USART_PRESCALER_DIV16 + * @arg @ref LL_USART_PRESCALER_DIV32 + * @arg @ref LL_USART_PRESCALER_DIV64 + * @arg @ref LL_USART_PRESCALER_DIV128 + * @arg @ref LL_USART_PRESCALER_DIV256 + * @param __BAUDRATE__ Baud rate value to achieve + * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case + */ +#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) \ + ((((__PERIPHCLK__)/(USART_PRESCALER_TAB[(__PRESCALER__)]))\ + + ((__BAUDRATE__)/2U))/(__BAUDRATE__)) + +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup USART_LL_Exported_Functions USART Exported Functions + * @{ + */ + +/** @defgroup USART_LL_EF_Configuration Configuration functions + * @{ + */ + +/** + * @brief USART Enable + * @rmtoll CR1 UE LL_USART_Enable + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR1, USART_CR1_UE); +} + +/** + * @brief USART Disable (all USART prescalers and outputs are disabled) + * @note When USART is disabled, USART prescalers and outputs are stopped immediately, + * and current operations are discarded. The configuration of the USART is kept, but all the status + * flags, in the USARTx_ISR are set to their default values. + * @rmtoll CR1 UE LL_USART_Disable + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR1, USART_CR1_UE); +} + +/** + * @brief Indicate if USART is enabled + * @rmtoll CR1 UE LL_USART_IsEnabled + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabled(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL); +} + +/** + * @brief FIFO Mode Enable + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 FIFOEN LL_USART_EnableFIFO + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableFIFO(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR1, USART_CR1_FIFOEN); +} + +/** + * @brief FIFO Mode Disable + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 FIFOEN LL_USART_DisableFIFO + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableFIFO(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR1, USART_CR1_FIFOEN); +} + +/** + * @brief Indicate if FIFO Mode is enabled + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 FIFOEN LL_USART_IsEnabledFIFO + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledFIFO(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL); +} + +/** + * @brief Configure TX FIFO Threshold + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 TXFTCFG LL_USART_SetTXFIFOThreshold + * @param USARTx USART Instance + * @param Threshold This parameter can be one of the following values: + * @arg @ref LL_USART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_USART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold) +{ + ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); +} + +/** + * @brief Return TX FIFO Threshold Configuration + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 TXFTCFG LL_USART_GetTXFIFOThreshold + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_USART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_8_8 + */ +__STATIC_INLINE uint32_t LL_USART_GetTXFIFOThreshold(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); +} + +/** + * @brief Configure RX FIFO Threshold + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 RXFTCFG LL_USART_SetRXFIFOThreshold + * @param USARTx USART Instance + * @param Threshold This parameter can be one of the following values: + * @arg @ref LL_USART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_USART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetRXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold) +{ + ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); +} + +/** + * @brief Return RX FIFO Threshold Configuration + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 RXFTCFG LL_USART_GetRXFIFOThreshold + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_USART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_8_8 + */ +__STATIC_INLINE uint32_t LL_USART_GetRXFIFOThreshold(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); +} + +/** + * @brief Configure TX and RX FIFOs Threshold + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 TXFTCFG LL_USART_ConfigFIFOsThreshold\n + * CR3 RXFTCFG LL_USART_ConfigFIFOsThreshold + * @param USARTx USART Instance + * @param TXThreshold This parameter can be one of the following values: + * @arg @ref LL_USART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_USART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_8_8 + * @param RXThreshold This parameter can be one of the following values: + * @arg @ref LL_USART_FIFOTHRESHOLD_1_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_1_2 + * @arg @ref LL_USART_FIFOTHRESHOLD_3_4 + * @arg @ref LL_USART_FIFOTHRESHOLD_7_8 + * @arg @ref LL_USART_FIFOTHRESHOLD_8_8 + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigFIFOsThreshold(USART_TypeDef *USARTx, uint32_t TXThreshold, uint32_t RXThreshold) +{ + ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | + (RXThreshold << USART_CR3_RXFTCFG_Pos)); +} + +/** + * @brief USART enabled in STOP Mode. + * @note When this function is enabled, USART is able to wake up the MCU from Stop mode, provided that + * USART clock selection is HSI or LSE in RCC. + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR1 UESM LL_USART_EnableInStopMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_UESM); +} + +/** + * @brief USART disabled in STOP Mode. + * @note When this function is disabled, USART is not able to wake up the MCU from Stop mode + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR1 UESM LL_USART_DisableInStopMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_UESM); +} + +/** + * @brief Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not) + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR1 UESM LL_USART_IsEnabledInStopMode + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL); +} + +/** + * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit) + * @rmtoll CR1 RE LL_USART_EnableDirectionRx + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE); +} + +/** + * @brief Receiver Disable + * @rmtoll CR1 RE LL_USART_DisableDirectionRx + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE); +} + +/** + * @brief Transmitter Enable + * @rmtoll CR1 TE LL_USART_EnableDirectionTx + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE); +} + +/** + * @brief Transmitter Disable + * @rmtoll CR1 TE LL_USART_DisableDirectionTx + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE); +} + +/** + * @brief Configure simultaneously enabled/disabled states + * of Transmitter and Receiver + * @rmtoll CR1 RE LL_USART_SetTransferDirection\n + * CR1 TE LL_USART_SetTransferDirection + * @param USARTx USART Instance + * @param TransferDirection This parameter can be one of the following values: + * @arg @ref LL_USART_DIRECTION_NONE + * @arg @ref LL_USART_DIRECTION_RX + * @arg @ref LL_USART_DIRECTION_TX + * @arg @ref LL_USART_DIRECTION_TX_RX + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection) +{ + ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); +} + +/** + * @brief Return enabled/disabled states of Transmitter and Receiver + * @rmtoll CR1 RE LL_USART_GetTransferDirection\n + * CR1 TE LL_USART_GetTransferDirection + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_DIRECTION_NONE + * @arg @ref LL_USART_DIRECTION_RX + * @arg @ref LL_USART_DIRECTION_TX + * @arg @ref LL_USART_DIRECTION_TX_RX + */ +__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE)); +} + +/** + * @brief Configure Parity (enabled/disabled and parity mode if enabled). + * @note This function selects if hardware parity control (generation and detection) is enabled or disabled. + * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position + * (9th or 8th bit depending on data width) and parity is checked on the received data. + * @rmtoll CR1 PS LL_USART_SetParity\n + * CR1 PCE LL_USART_SetParity + * @param USARTx USART Instance + * @param Parity This parameter can be one of the following values: + * @arg @ref LL_USART_PARITY_NONE + * @arg @ref LL_USART_PARITY_EVEN + * @arg @ref LL_USART_PARITY_ODD + * @retval None + */ +__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity); +} + +/** + * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) + * @rmtoll CR1 PS LL_USART_GetParity\n + * CR1 PCE LL_USART_GetParity + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_PARITY_NONE + * @arg @ref LL_USART_PARITY_EVEN + * @arg @ref LL_USART_PARITY_ODD + */ +__STATIC_INLINE uint32_t LL_USART_GetParity(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE)); +} + +/** + * @brief Set Receiver Wake Up method from Mute mode. + * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod + * @param USARTx USART Instance + * @param Method This parameter can be one of the following values: + * @arg @ref LL_USART_WAKEUP_IDLELINE + * @arg @ref LL_USART_WAKEUP_ADDRESSMARK + * @retval None + */ +__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method); +} + +/** + * @brief Return Receiver Wake Up method from Mute mode + * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_WAKEUP_IDLELINE + * @arg @ref LL_USART_WAKEUP_ADDRESSMARK + */ +__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE)); +} + +/** + * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits) + * @rmtoll CR1 M0 LL_USART_SetDataWidth\n + * CR1 M1 LL_USART_SetDataWidth + * @param USARTx USART Instance + * @param DataWidth This parameter can be one of the following values: + * @arg @ref LL_USART_DATAWIDTH_7B + * @arg @ref LL_USART_DATAWIDTH_8B + * @arg @ref LL_USART_DATAWIDTH_9B + * @retval None + */ +__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth); +} + +/** + * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) + * @rmtoll CR1 M0 LL_USART_GetDataWidth\n + * CR1 M1 LL_USART_GetDataWidth + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_DATAWIDTH_7B + * @arg @ref LL_USART_DATAWIDTH_8B + * @arg @ref LL_USART_DATAWIDTH_9B + */ +__STATIC_INLINE uint32_t LL_USART_GetDataWidth(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M)); +} + +/** + * @brief Allow switch between Mute Mode and Active mode + * @rmtoll CR1 MME LL_USART_EnableMuteMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME); +} + +/** + * @brief Prevent Mute Mode use. Set Receiver in active mode permanently. + * @rmtoll CR1 MME LL_USART_DisableMuteMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_MME); +} + +/** + * @brief Indicate if switch between Mute Mode and Active mode is allowed + * @rmtoll CR1 MME LL_USART_IsEnabledMuteMode + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL); +} + +/** + * @brief Set Oversampling to 8-bit or 16-bit mode + * @rmtoll CR1 OVER8 LL_USART_SetOverSampling + * @param USARTx USART Instance + * @param OverSampling This parameter can be one of the following values: + * @arg @ref LL_USART_OVERSAMPLING_16 + * @arg @ref LL_USART_OVERSAMPLING_8 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling); +} + +/** + * @brief Return Oversampling mode + * @rmtoll CR1 OVER8 LL_USART_GetOverSampling + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_OVERSAMPLING_16 + * @arg @ref LL_USART_OVERSAMPLING_8 + */ +__STATIC_INLINE uint32_t LL_USART_GetOverSampling(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8)); +} + +/** + * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput + * @param USARTx USART Instance + * @param LastBitClockPulse This parameter can be one of the following values: + * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT + * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT + * @retval None + */ +__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse); +} + +/** + * @brief Retrieve Clock pulse of the last data bit output configuration + * (Last bit Clock pulse output to the SCLK pin or not) + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT + * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT + */ +__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); +} + +/** + * @brief Select the phase of the clock output on the SCLK pin in synchronous mode + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CPHA LL_USART_SetClockPhase + * @param USARTx USART Instance + * @param ClockPhase This parameter can be one of the following values: + * @arg @ref LL_USART_PHASE_1EDGE + * @arg @ref LL_USART_PHASE_2EDGE + * @retval None + */ +__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase); +} + +/** + * @brief Return phase of the clock output on the SCLK pin in synchronous mode + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CPHA LL_USART_GetClockPhase + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_PHASE_1EDGE + * @arg @ref LL_USART_PHASE_2EDGE + */ +__STATIC_INLINE uint32_t LL_USART_GetClockPhase(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA)); +} + +/** + * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CPOL LL_USART_SetClockPolarity + * @param USARTx USART Instance + * @param ClockPolarity This parameter can be one of the following values: + * @arg @ref LL_USART_POLARITY_LOW + * @arg @ref LL_USART_POLARITY_HIGH + * @retval None + */ +__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); +} + +/** + * @brief Return polarity of the clock output on the SCLK pin in synchronous mode + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CPOL LL_USART_GetClockPolarity + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_POLARITY_LOW + * @arg @ref LL_USART_POLARITY_HIGH + */ +__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL)); +} + +/** + * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse) + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function + * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function + * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function + * @rmtoll CR2 CPHA LL_USART_ConfigClock\n + * CR2 CPOL LL_USART_ConfigClock\n + * CR2 LBCL LL_USART_ConfigClock + * @param USARTx USART Instance + * @param Phase This parameter can be one of the following values: + * @arg @ref LL_USART_PHASE_1EDGE + * @arg @ref LL_USART_PHASE_2EDGE + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_USART_POLARITY_LOW + * @arg @ref LL_USART_POLARITY_HIGH + * @param LBCPOutput This parameter can be one of the following values: + * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT + * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput); +} + +/** + * @brief Configure Clock source prescaler for baudrate generator and oversampling + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll PRESC PRESCALER LL_USART_SetPrescaler + * @param USARTx USART Instance + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_USART_PRESCALER_DIV1 + * @arg @ref LL_USART_PRESCALER_DIV2 + * @arg @ref LL_USART_PRESCALER_DIV4 + * @arg @ref LL_USART_PRESCALER_DIV6 + * @arg @ref LL_USART_PRESCALER_DIV8 + * @arg @ref LL_USART_PRESCALER_DIV10 + * @arg @ref LL_USART_PRESCALER_DIV12 + * @arg @ref LL_USART_PRESCALER_DIV16 + * @arg @ref LL_USART_PRESCALER_DIV32 + * @arg @ref LL_USART_PRESCALER_DIV64 + * @arg @ref LL_USART_PRESCALER_DIV128 + * @arg @ref LL_USART_PRESCALER_DIV256 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) +{ + MODIFY_REG(USARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue); +} + +/** + * @brief Retrieve the Clock source prescaler for baudrate generator and oversampling + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll PRESC PRESCALER LL_USART_GetPrescaler + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_PRESCALER_DIV1 + * @arg @ref LL_USART_PRESCALER_DIV2 + * @arg @ref LL_USART_PRESCALER_DIV4 + * @arg @ref LL_USART_PRESCALER_DIV6 + * @arg @ref LL_USART_PRESCALER_DIV8 + * @arg @ref LL_USART_PRESCALER_DIV10 + * @arg @ref LL_USART_PRESCALER_DIV12 + * @arg @ref LL_USART_PRESCALER_DIV16 + * @arg @ref LL_USART_PRESCALER_DIV32 + * @arg @ref LL_USART_PRESCALER_DIV64 + * @arg @ref LL_USART_PRESCALER_DIV128 + * @arg @ref LL_USART_PRESCALER_DIV256 + */ +__STATIC_INLINE uint32_t LL_USART_GetPrescaler(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->PRESC, USART_PRESC_PRESCALER)); +} + +/** + * @brief Enable Clock output on SCLK pin + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_CLKEN); +} + +/** + * @brief Disable Clock output on SCLK pin + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN); +} + +/** + * @brief Indicate if Clock output on SCLK pin is enabled + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL); +} + +/** + * @brief Set the length of the stop bits + * @rmtoll CR2 STOP LL_USART_SetStopBitsLength + * @param USARTx USART Instance + * @param StopBits This parameter can be one of the following values: + * @arg @ref LL_USART_STOPBITS_0_5 + * @arg @ref LL_USART_STOPBITS_1 + * @arg @ref LL_USART_STOPBITS_1_5 + * @arg @ref LL_USART_STOPBITS_2 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); +} + +/** + * @brief Retrieve the length of the stop bits + * @rmtoll CR2 STOP LL_USART_GetStopBitsLength + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_STOPBITS_0_5 + * @arg @ref LL_USART_STOPBITS_1 + * @arg @ref LL_USART_STOPBITS_1_5 + * @arg @ref LL_USART_STOPBITS_2 + */ +__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP)); +} + +/** + * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits) + * @note Call of this function is equivalent to following function call sequence : + * - Data Width configuration using @ref LL_USART_SetDataWidth() function + * - Parity Control and mode configuration using @ref LL_USART_SetParity() function + * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function + * @rmtoll CR1 PS LL_USART_ConfigCharacter\n + * CR1 PCE LL_USART_ConfigCharacter\n + * CR1 M0 LL_USART_ConfigCharacter\n + * CR1 M1 LL_USART_ConfigCharacter\n + * CR2 STOP LL_USART_ConfigCharacter + * @param USARTx USART Instance + * @param DataWidth This parameter can be one of the following values: + * @arg @ref LL_USART_DATAWIDTH_7B + * @arg @ref LL_USART_DATAWIDTH_8B + * @arg @ref LL_USART_DATAWIDTH_9B + * @param Parity This parameter can be one of the following values: + * @arg @ref LL_USART_PARITY_NONE + * @arg @ref LL_USART_PARITY_EVEN + * @arg @ref LL_USART_PARITY_ODD + * @param StopBits This parameter can be one of the following values: + * @arg @ref LL_USART_STOPBITS_0_5 + * @arg @ref LL_USART_STOPBITS_1 + * @arg @ref LL_USART_STOPBITS_1_5 + * @arg @ref LL_USART_STOPBITS_2 + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity, + uint32_t StopBits) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth); + MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); +} + +/** + * @brief Configure TX/RX pins swapping setting. + * @rmtoll CR2 SWAP LL_USART_SetTXRXSwap + * @param USARTx USART Instance + * @param SwapConfig This parameter can be one of the following values: + * @arg @ref LL_USART_TXRX_STANDARD + * @arg @ref LL_USART_TXRX_SWAPPED + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig); +} + +/** + * @brief Retrieve TX/RX pins swapping configuration. + * @rmtoll CR2 SWAP LL_USART_GetTXRXSwap + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_TXRX_STANDARD + * @arg @ref LL_USART_TXRX_SWAPPED + */ +__STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP)); +} + +/** + * @brief Configure RX pin active level logic + * @rmtoll CR2 RXINV LL_USART_SetRXPinLevel + * @param USARTx USART Instance + * @param PinInvMethod This parameter can be one of the following values: + * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD + * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED + * @retval None + */ +__STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod); +} + +/** + * @brief Retrieve RX pin active level logic configuration + * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD + * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED + */ +__STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV)); +} + +/** + * @brief Configure TX pin active level logic + * @rmtoll CR2 TXINV LL_USART_SetTXPinLevel + * @param USARTx USART Instance + * @param PinInvMethod This parameter can be one of the following values: + * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD + * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod); +} + +/** + * @brief Retrieve TX pin active level logic configuration + * @rmtoll CR2 TXINV LL_USART_GetTXPinLevel + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD + * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED + */ +__STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV)); +} + +/** + * @brief Configure Binary data logic. + * @note Allow to define how Logical data from the data register are send/received : + * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H) + * @rmtoll CR2 DATAINV LL_USART_SetBinaryDataLogic + * @param USARTx USART Instance + * @param DataLogic This parameter can be one of the following values: + * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE + * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE + * @retval None + */ +__STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic); +} + +/** + * @brief Retrieve Binary data configuration + * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE + * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE + */ +__STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV)); +} + +/** + * @brief Configure transfer bit order (either Less or Most Significant Bit First) + * @note MSB First means data is transmitted/received with the MSB first, following the start bit. + * LSB First means data is transmitted/received with data bit 0 first, following the start bit. + * @rmtoll CR2 MSBFIRST LL_USART_SetTransferBitOrder + * @param USARTx USART Instance + * @param BitOrder This parameter can be one of the following values: + * @arg @ref LL_USART_BITORDER_LSBFIRST + * @arg @ref LL_USART_BITORDER_MSBFIRST + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder); +} + +/** + * @brief Return transfer bit order (either Less or Most Significant Bit First) + * @note MSB First means data is transmitted/received with the MSB first, following the start bit. + * LSB First means data is transmitted/received with data bit 0 first, following the start bit. + * @rmtoll CR2 MSBFIRST LL_USART_GetTransferBitOrder + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_BITORDER_LSBFIRST + * @arg @ref LL_USART_BITORDER_MSBFIRST + */ +__STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST)); +} + +/** + * @brief Enable Auto Baud-Rate Detection + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABREN LL_USART_EnableAutoBaudRate + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_ABREN); +} + +/** + * @brief Disable Auto Baud-Rate Detection + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN); +} + +/** + * @brief Indicate if Auto Baud-Rate Detection mechanism is enabled + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABREN LL_USART_IsEnabledAutoBaud + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL); +} + +/** + * @brief Set Auto Baud-Rate mode bits + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABRMODE LL_USART_SetAutoBaudRateMode + * @param USARTx USART Instance + * @param AutoBaudRateMode This parameter can be one of the following values: + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME + * @retval None + */ +__STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode); +} + +/** + * @brief Return Auto Baud-Rate mode + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABRMODE LL_USART_GetAutoBaudRateMode + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME + */ +__STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE)); +} + +/** + * @brief Enable Receiver Timeout + * @rmtoll CR2 RTOEN LL_USART_EnableRxTimeout + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_RTOEN); +} + +/** + * @brief Disable Receiver Timeout + * @rmtoll CR2 RTOEN LL_USART_DisableRxTimeout + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN); +} + +/** + * @brief Indicate if Receiver Timeout feature is enabled + * @rmtoll CR2 RTOEN LL_USART_IsEnabledRxTimeout + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN)) ? 1UL : 0UL); +} + +/** + * @brief Set Address of the USART node. + * @note This is used in multiprocessor communication during Mute mode or Stop mode, + * for wake up with address mark detection. + * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7. + * (b7-b4 should be set to 0) + * 8bits address node is used when 7-bit Address Detection is selected in ADDM7. + * (This is used in multiprocessor communication during Mute mode or Stop mode, + * for wake up with 7-bit address mark detection. + * The MSB of the character sent by the transmitter should be equal to 1. + * It may also be used for character detection during normal reception, + * Mute mode inactive (for example, end of block detection in ModBus protocol). + * In this case, the whole received character (8-bit) is compared to the ADD[7:0] + * value and CMF flag is set on match) + * @rmtoll CR2 ADD LL_USART_ConfigNodeAddress\n + * CR2 ADDM7 LL_USART_ConfigNodeAddress + * @param USARTx USART Instance + * @param AddressLen This parameter can be one of the following values: + * @arg @ref LL_USART_ADDRESS_DETECT_4B + * @arg @ref LL_USART_ADDRESS_DETECT_7B + * @param NodeAddress 4 or 7 bit Address of the USART node. + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7, + (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos))); +} + +/** + * @brief Return 8 bit Address of the USART node as set in ADD field of CR2. + * @note If 4-bit Address Detection is selected in ADDM7, + * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant) + * If 7-bit Address Detection is selected in ADDM7, + * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant) + * @rmtoll CR2 ADD LL_USART_GetNodeAddress + * @param USARTx USART Instance + * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255) + */ +__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos); +} + +/** + * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) + * @rmtoll CR2 ADDM7 LL_USART_GetNodeAddressLen + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_ADDRESS_DETECT_4B + * @arg @ref LL_USART_ADDRESS_DETECT_7B + */ +__STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7)); +} + +/** + * @brief Enable RTS HW Flow Control + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_RTSE); +} + +/** + * @brief Disable RTS HW Flow Control + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); +} + +/** + * @brief Enable CTS HW Flow Control + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_CTSE); +} + +/** + * @brief Disable CTS HW Flow Control + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); +} + +/** + * @brief Configure HW Flow Control mode (both CTS and RTS) + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n + * CR3 CTSE LL_USART_SetHWFlowCtrl + * @param USARTx USART Instance + * @param HardwareFlowControl This parameter can be one of the following values: + * @arg @ref LL_USART_HWCONTROL_NONE + * @arg @ref LL_USART_HWCONTROL_RTS + * @arg @ref LL_USART_HWCONTROL_CTS + * @arg @ref LL_USART_HWCONTROL_RTS_CTS + * @retval None + */ +__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); +} + +/** + * @brief Return HW Flow Control configuration (both CTS and RTS) + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n + * CR3 CTSE LL_USART_GetHWFlowCtrl + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_HWCONTROL_NONE + * @arg @ref LL_USART_HWCONTROL_RTS + * @arg @ref LL_USART_HWCONTROL_CTS + * @arg @ref LL_USART_HWCONTROL_RTS_CTS + */ +__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); +} + +/** + * @brief Enable One bit sampling method + * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); +} + +/** + * @brief Disable One bit sampling method + * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); +} + +/** + * @brief Indicate if One bit sampling method is enabled + * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL); +} + +/** + * @brief Enable Overrun detection + * @rmtoll CR3 OVRDIS LL_USART_EnableOverrunDetect + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS); +} + +/** + * @brief Disable Overrun detection + * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_OVRDIS); +} + +/** + * @brief Indicate if Overrun detection is enabled + * @rmtoll CR3 OVRDIS LL_USART_IsEnabledOverrunDetect + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL); +} + +/** + * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUS LL_USART_SetWKUPType + * @param USARTx USART Instance + * @param Type This parameter can be one of the following values: + * @arg @ref LL_USART_WAKEUP_ON_ADDRESS + * @arg @ref LL_USART_WAKEUP_ON_STARTBIT + * @arg @ref LL_USART_WAKEUP_ON_RXNE + * @retval None + */ +__STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type); +} + +/** + * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits) + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUS LL_USART_GetWKUPType + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_WAKEUP_ON_ADDRESS + * @arg @ref LL_USART_WAKEUP_ON_STARTBIT + * @arg @ref LL_USART_WAKEUP_ON_RXNE + */ +__STATIC_INLINE uint32_t LL_USART_GetWKUPType(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS)); +} + +/** + * @brief Configure USART BRR register for achieving expected Baud Rate value. + * @note Compute and set USARTDIV value in BRR Register (full BRR content) + * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values + * @note Peripheral clock and Baud rate values provided as function parameters should be valid + * (Baud rate value != 0) + * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. + * @rmtoll BRR BRR LL_USART_SetBaudRate + * @param USARTx USART Instance + * @param PeriphClk Peripheral Clock + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_USART_PRESCALER_DIV1 + * @arg @ref LL_USART_PRESCALER_DIV2 + * @arg @ref LL_USART_PRESCALER_DIV4 + * @arg @ref LL_USART_PRESCALER_DIV6 + * @arg @ref LL_USART_PRESCALER_DIV8 + * @arg @ref LL_USART_PRESCALER_DIV10 + * @arg @ref LL_USART_PRESCALER_DIV12 + * @arg @ref LL_USART_PRESCALER_DIV16 + * @arg @ref LL_USART_PRESCALER_DIV32 + * @arg @ref LL_USART_PRESCALER_DIV64 + * @arg @ref LL_USART_PRESCALER_DIV128 + * @arg @ref LL_USART_PRESCALER_DIV256 + * @param OverSampling This parameter can be one of the following values: + * @arg @ref LL_USART_OVERSAMPLING_16 + * @arg @ref LL_USART_OVERSAMPLING_8 + * @param BaudRate Baud Rate + * @retval None + */ +__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t PrescalerValue, + uint32_t OverSampling, + uint32_t BaudRate) +{ + uint32_t usartdiv; + uint32_t brrtemp; + + if (PrescalerValue > LL_USART_PRESCALER_DIV256) + { + /* Do not overstep the size of USART_PRESCALER_TAB */ + } + else if (BaudRate == 0U) + { + /* Can Not divide per 0 */ + } + else if (OverSampling == LL_USART_OVERSAMPLING_8) + { + usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, (uint8_t)PrescalerValue, BaudRate)); + brrtemp = usartdiv & 0xFFF0U; + brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); + USARTx->BRR = brrtemp; + } + else + { + USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, (uint8_t)PrescalerValue, BaudRate)); + } +} + +/** + * @brief Return current Baud Rate value, according to USARTDIV present in BRR register + * (full BRR content), and to used Peripheral Clock and Oversampling mode values + * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned. + * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. + * @rmtoll BRR BRR LL_USART_GetBaudRate + * @param USARTx USART Instance + * @param PeriphClk Peripheral Clock + * @param PrescalerValue This parameter can be one of the following values: + * @arg @ref LL_USART_PRESCALER_DIV1 + * @arg @ref LL_USART_PRESCALER_DIV2 + * @arg @ref LL_USART_PRESCALER_DIV4 + * @arg @ref LL_USART_PRESCALER_DIV6 + * @arg @ref LL_USART_PRESCALER_DIV8 + * @arg @ref LL_USART_PRESCALER_DIV10 + * @arg @ref LL_USART_PRESCALER_DIV12 + * @arg @ref LL_USART_PRESCALER_DIV16 + * @arg @ref LL_USART_PRESCALER_DIV32 + * @arg @ref LL_USART_PRESCALER_DIV64 + * @arg @ref LL_USART_PRESCALER_DIV128 + * @arg @ref LL_USART_PRESCALER_DIV256 + * @param OverSampling This parameter can be one of the following values: + * @arg @ref LL_USART_OVERSAMPLING_16 + * @arg @ref LL_USART_OVERSAMPLING_8 + * @retval Baud Rate + */ +__STATIC_INLINE uint32_t LL_USART_GetBaudRate(const USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t PrescalerValue, + uint32_t OverSampling) +{ + uint32_t usartdiv; + uint32_t brrresult = 0x0U; + uint32_t periphclkpresc = (uint32_t)(PeriphClk / (USART_PRESCALER_TAB[(uint8_t)PrescalerValue])); + + usartdiv = USARTx->BRR; + + if (usartdiv == 0U) + { + /* Do not perform a division by 0 */ + } + else if (OverSampling == LL_USART_OVERSAMPLING_8) + { + usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ; + if (usartdiv != 0U) + { + brrresult = (periphclkpresc * 2U) / usartdiv; + } + } + else + { + if ((usartdiv & 0xFFFFU) != 0U) + { + brrresult = periphclkpresc / usartdiv; + } + } + return (brrresult); +} + +/** + * @brief Set Receiver Time Out Value (expressed in nb of bits duration) + * @rmtoll RTOR RTO LL_USART_SetRxTimeout + * @param USARTx USART Instance + * @param Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF + * @retval None + */ +__STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout) +{ + MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout); +} + +/** + * @brief Get Receiver Time Out Value (expressed in nb of bits duration) + * @rmtoll RTOR RTO LL_USART_GetRxTimeout + * @param USARTx USART Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x00FFFFFF + */ +__STATIC_INLINE uint32_t LL_USART_GetRxTimeout(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_RTO)); +} + +/** + * @brief Set Block Length value in reception + * @rmtoll RTOR BLEN LL_USART_SetBlockLength + * @param USARTx USART Instance + * @param BlockLength Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_USART_SetBlockLength(USART_TypeDef *USARTx, uint32_t BlockLength) +{ + MODIFY_REG(USARTx->RTOR, USART_RTOR_BLEN, BlockLength << USART_RTOR_BLEN_Pos); +} + +/** + * @brief Get Block Length value in reception + * @rmtoll RTOR BLEN LL_USART_GetBlockLength + * @param USARTx USART Instance + * @retval Value between Min_Data=0x00 and Max_Data=0xFF + */ +__STATIC_INLINE uint32_t LL_USART_GetBlockLength(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_RTOR_BLEN_Pos); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature + * @{ + */ + +/** + * @brief Enable IrDA mode + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IREN LL_USART_EnableIrda + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_IREN); +} + +/** + * @brief Disable IrDA mode + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IREN LL_USART_DisableIrda + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); +} + +/** + * @brief Indicate if IrDA mode is enabled + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IREN LL_USART_IsEnabledIrda + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); +} + +/** + * @brief Configure IrDA Power Mode (Normal or Low Power) + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode + * @param USARTx USART Instance + * @param PowerMode This parameter can be one of the following values: + * @arg @ref LL_USART_IRDA_POWER_NORMAL + * @arg @ref LL_USART_IRDA_POWER_LOW + * @retval None + */ +__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); +} + +/** + * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power) + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_IRDA_POWER_NORMAL + * @arg @ref LL_USART_PHASE_2EDGE + */ +__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP)); +} + +/** + * @brief Set Irda prescaler value, used for dividing the USART clock source + * to achieve the Irda Low Power frequency (8 bits value) + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler + * @param USARTx USART Instance + * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) +{ + MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue); +} + +/** + * @brief Return Irda prescaler value, used for dividing the USART clock source + * to achieve the Irda Low Power frequency (8 bits value) + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler + * @param USARTx USART Instance + * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF) + */ +__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC)); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature + * @{ + */ + +/** + * @brief Enable Smartcard NACK transmission + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_NACK); +} + +/** + * @brief Disable Smartcard NACK transmission + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_NACK); +} + +/** + * @brief Indicate if Smartcard NACK transmission is enabled + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL); +} + +/** + * @brief Enable Smartcard mode + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 SCEN LL_USART_EnableSmartcard + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_SCEN); +} + +/** + * @brief Disable Smartcard mode + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 SCEN LL_USART_DisableSmartcard + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN); +} + +/** + * @brief Indicate if Smartcard mode is enabled + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL); +} + +/** + * @brief Set Smartcard Auto-Retry Count value (SCARCNT[2:0] bits) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @note This bit-field specifies the number of retries in transmit and receive, in Smartcard mode. + * In transmission mode, it specifies the number of automatic retransmission retries, before + * generating a transmission error (FE bit set). + * In reception mode, it specifies the number or erroneous reception trials, before generating a + * reception error (RXNE and PE bits set) + * @rmtoll CR3 SCARCNT LL_USART_SetSmartcardAutoRetryCount + * @param USARTx USART Instance + * @param AutoRetryCount Value between Min_Data=0 and Max_Data=7 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryCount) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos); +} + +/** + * @brief Return Smartcard Auto-Retry Count value (SCARCNT[2:0] bits) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 SCARCNT LL_USART_GetSmartcardAutoRetryCount + * @param USARTx USART Instance + * @retval Smartcard Auto-Retry Count value (Value between Min_Data=0 and Max_Data=7) + */ +__STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos); +} + +/** + * @brief Set Smartcard prescaler value, used for dividing the USART clock + * source to provide the SMARTCARD Clock (5 bits value) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler + * @param USARTx USART Instance + * @param PrescalerValue Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) +{ + MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue); +} + +/** + * @brief Return Smartcard prescaler value, used for dividing the USART clock + * source to provide the SMARTCARD Clock (5 bits value) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler + * @param USARTx USART Instance + * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31) + */ +__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC)); +} + +/** + * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods + * (GT[7:0] bits : Guard time value) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime + * @param USARTx USART Instance + * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime) +{ + MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos)); +} + +/** + * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods + * (GT[7:0] bits : Guard time value) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime + * @param USARTx USART Instance + * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF) + */ +__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature + * @{ + */ + +/** + * @brief Enable Single Wire Half-Duplex mode + * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not + * Half-Duplex mode is supported by the USARTx instance. + * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Disable Single Wire Half-Duplex mode + * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not + * Half-Duplex mode is supported by the USARTx instance. + * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Indicate if Single Wire Half-Duplex mode is enabled + * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not + * Half-Duplex mode is supported by the USARTx instance. + * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_SPI_SLAVE Configuration functions related to SPI Slave feature + * @{ + */ +/** + * @brief Enable SPI Synchronous Slave mode + * @note Macro IS_UART_SPI_SLAVE_INSTANCE(USARTx) can be used to check whether or not + * SPI Slave mode feature is supported by the USARTx instance. + * @rmtoll CR2 SLVEN LL_USART_EnableSPISlave + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableSPISlave(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_SLVEN); +} + +/** + * @brief Disable SPI Synchronous Slave mode + * @note Macro IS_UART_SPI_SLAVE_INSTANCE(USARTx) can be used to check whether or not + * SPI Slave mode feature is supported by the USARTx instance. + * @rmtoll CR2 SLVEN LL_USART_DisableSPISlave + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableSPISlave(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_SLVEN); +} + +/** + * @brief Indicate if SPI Synchronous Slave mode is enabled + * @note Macro IS_UART_SPI_SLAVE_INSTANCE(USARTx) can be used to check whether or not + * SPI Slave mode feature is supported by the USARTx instance. + * @rmtoll CR2 SLVEN LL_USART_IsEnabledSPISlave + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledSPISlave(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_SLVEN) == (USART_CR2_SLVEN)) ? 1UL : 0UL); +} + +/** + * @brief Enable SPI Slave Selection using NSS input pin + * @note Macro IS_UART_SPI_SLAVE_INSTANCE(USARTx) can be used to check whether or not + * SPI Slave mode feature is supported by the USARTx instance. + * @note SPI Slave Selection depends on NSS input pin + * (The slave is selected when NSS is low and deselected when NSS is high). + * @rmtoll CR2 DIS_NSS LL_USART_EnableSPISlaveSelect + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableSPISlaveSelect(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_DIS_NSS); +} + +/** + * @brief Disable SPI Slave Selection using NSS input pin + * @note Macro IS_UART_SPI_SLAVE_INSTANCE(USARTx) can be used to check whether or not + * SPI Slave mode feature is supported by the USARTx instance. + * @note SPI Slave will be always selected and NSS input pin will be ignored. + * @rmtoll CR2 DIS_NSS LL_USART_DisableSPISlaveSelect + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableSPISlaveSelect(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_DIS_NSS); +} + +/** + * @brief Indicate if SPI Slave Selection depends on NSS input pin + * @note Macro IS_UART_SPI_SLAVE_INSTANCE(USARTx) can be used to check whether or not + * SPI Slave mode feature is supported by the USARTx instance. + * @rmtoll CR2 DIS_NSS LL_USART_IsEnabledSPISlaveSelect + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledSPISlaveSelect(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_DIS_NSS) != (USART_CR2_DIS_NSS)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature + * @{ + */ + +/** + * @brief Set LIN Break Detection Length + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen + * @param USARTx USART Instance + * @param LINBDLength This parameter can be one of the following values: + * @arg @ref LL_USART_LINBREAK_DETECT_10B + * @arg @ref LL_USART_LINBREAK_DETECT_11B + * @retval None + */ +__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength); +} + +/** + * @brief Return LIN Break Detection Length + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_LINBREAK_DETECT_10B + * @arg @ref LL_USART_LINBREAK_DETECT_11B + */ +__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL)); +} + +/** + * @brief Enable LIN mode + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LINEN LL_USART_EnableLIN + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_LINEN); +} + +/** + * @brief Disable LIN mode + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LINEN LL_USART_DisableLIN + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN); +} + +/** + * @brief Indicate if LIN mode is enabled + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature + * @{ + */ + +/** + * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits). + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR1 DEDT LL_USART_SetDEDeassertionTime + * @param USARTx USART Instance + * @param Time Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos); +} + +/** + * @brief Return DEDT (Driver Enable De-Assertion Time) + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR1 DEDT LL_USART_GetDEDeassertionTime + * @param USARTx USART Instance + * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31 + */ +__STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos); +} + +/** + * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits). + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR1 DEAT LL_USART_SetDEAssertionTime + * @param USARTx USART Instance + * @param Time Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos); +} + +/** + * @brief Return DEAT (Driver Enable Assertion Time) + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR1 DEAT LL_USART_GetDEAssertionTime + * @param USARTx USART Instance + * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31 + */ +__STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos); +} + +/** + * @brief Enable Driver Enable (DE) Mode + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEM LL_USART_EnableDEMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_DEM); +} + +/** + * @brief Disable Driver Enable (DE) Mode + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEM LL_USART_DisableDEMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_DEM); +} + +/** + * @brief Indicate if Driver Enable (DE) Mode is enabled + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEM LL_USART_IsEnabledDEMode + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); +} + +/** + * @brief Select Driver Enable Polarity + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEP LL_USART_SetDESignalPolarity + * @param USARTx USART Instance + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_USART_DE_POLARITY_HIGH + * @arg @ref LL_USART_DE_POLARITY_LOW + * @retval None + */ +__STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity); +} + +/** + * @brief Return Driver Enable Polarity + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEP LL_USART_GetDESignalPolarity + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_DE_POLARITY_HIGH + * @arg @ref LL_USART_DE_POLARITY_LOW + */ +__STATIC_INLINE uint32_t LL_USART_GetDESignalPolarity(const USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP)); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services + * @{ + */ + +/** + * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART) + * @note In UART mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - CLKEN bit in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * @note Other remaining configurations items related to Asynchronous Mode + * (as Baud Rate, Word length, Parity, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n + * CR2 CLKEN LL_USART_ConfigAsyncMode\n + * CR3 SCEN LL_USART_ConfigAsyncMode\n + * CR3 IREN LL_USART_ConfigAsyncMode\n + * CR3 HDSEL LL_USART_ConfigAsyncMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx) +{ + /* In Asynchronous mode, the following bits must be kept cleared: + - LINEN, CLKEN bits in the USART_CR2 register, + - SCEN, IREN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Synchronous Mode + * @note In Synchronous mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * This function also sets the USART in Synchronous mode. + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function + * @note Other remaining configurations items related to Synchronous Mode + * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n + * CR2 CLKEN LL_USART_ConfigSyncMode\n + * CR3 SCEN LL_USART_ConfigSyncMode\n + * CR3 IREN LL_USART_ConfigSyncMode\n + * CR3 HDSEL LL_USART_ConfigSyncMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx) +{ + /* In Synchronous mode, the following bits must be kept cleared: + - LINEN bit in the USART_CR2 register, + - SCEN, IREN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); + /* set the UART/USART in Synchronous mode */ + SET_BIT(USARTx->CR2, USART_CR2_CLKEN); +} + +/** + * @brief Perform basic configuration of USART for enabling use in LIN Mode + * @note In LIN mode, the following bits must be kept cleared: + * - STOP and CLKEN bits in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * This function also set the UART/USART in LIN mode. + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function + * @note Other remaining configurations items related to LIN Mode + * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using + * dedicated functions + * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n + * CR2 STOP LL_USART_ConfigLINMode\n + * CR2 LINEN LL_USART_ConfigLINMode\n + * CR3 IREN LL_USART_ConfigLINMode\n + * CR3 SCEN LL_USART_ConfigLINMode\n + * CR3 HDSEL LL_USART_ConfigLINMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx) +{ + /* In LIN mode, the following bits must be kept cleared: + - STOP and CLKEN bits in the USART_CR2 register, + - IREN, SCEN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); + /* Set the UART/USART in LIN mode */ + SET_BIT(USARTx->CR2, USART_CR2_LINEN); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode + * @note In Half Duplex mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - CLKEN bit in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * This function also sets the UART/USART in Half Duplex mode. + * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not + * Half-Duplex mode is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function + * @note Other remaining configurations items related to Half Duplex Mode + * (as Baud Rate, Word length, Parity, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n + * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n + * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n + * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n + * CR3 IREN LL_USART_ConfigHalfDuplexMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx) +{ + /* In Half Duplex mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - SCEN and IREN bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); + /* set the UART/USART in Half Duplex mode */ + SET_BIT(USARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Smartcard Mode + * @note In Smartcard mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * This function also configures Stop bits to 1.5 bits and + * sets the USART in Smartcard mode (SCEN bit). + * Clock Output is also enabled (CLKEN). + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function + * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function + * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function + * @note Other remaining configurations items related to Smartcard Mode + * (as Baud Rate, Word length, Parity, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n + * CR2 STOP LL_USART_ConfigSmartcardMode\n + * CR2 CLKEN LL_USART_ConfigSmartcardMode\n + * CR3 HDSEL LL_USART_ConfigSmartcardMode\n + * CR3 SCEN LL_USART_ConfigSmartcardMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx) +{ + /* In Smartcard mode, the following bits must be kept cleared: + - LINEN bit in the USART_CR2 register, + - IREN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); + /* Configure Stop bits to 1.5 bits */ + /* Synchronous mode is activated by default */ + SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN)); + /* set the UART/USART in Smartcard mode */ + SET_BIT(USARTx->CR3, USART_CR3_SCEN); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Irda Mode + * @note In IRDA mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - STOP and CLKEN bits in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * This function also sets the UART/USART in IRDA mode (IREN bit). + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function + * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function + * @note Other remaining configurations items related to Irda Mode + * (as Baud Rate, Word length, Power mode, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n + * CR2 CLKEN LL_USART_ConfigIrdaMode\n + * CR2 STOP LL_USART_ConfigIrdaMode\n + * CR3 SCEN LL_USART_ConfigIrdaMode\n + * CR3 HDSEL LL_USART_ConfigIrdaMode\n + * CR3 IREN LL_USART_ConfigIrdaMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx) +{ + /* In IRDA mode, the following bits must be kept cleared: + - LINEN, STOP and CLKEN bits in the USART_CR2 register, + - SCEN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); + /* set the UART/USART in IRDA mode */ + SET_BIT(USARTx->CR3, USART_CR3_IREN); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Multi processor Mode + * (several USARTs connected in a network, one of the USARTs can be the master, + * its TX output connected to the RX inputs of the other slaves USARTs). + * @note In MultiProcessor mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - CLKEN bit in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * @note Other remaining configurations items related to Multi processor Mode + * (as Baud Rate, Wake Up Method, Node address, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n + * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n + * CR3 SCEN LL_USART_ConfigMultiProcessMode\n + * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n + * CR3 IREN LL_USART_ConfigMultiProcessMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx) +{ + /* In Multi Processor mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - IREN, SCEN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Check if the USART Parity Error Flag is set or not + * @rmtoll ISR PE LL_USART_IsActiveFlag_PE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Framing Error Flag is set or not + * @rmtoll ISR FE LL_USART_IsActiveFlag_FE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Noise error detected Flag is set or not + * @rmtoll ISR NE LL_USART_IsActiveFlag_NE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART OverRun Error Flag is set or not + * @rmtoll ISR ORE LL_USART_IsActiveFlag_ORE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART IDLE line detected Flag is set or not + * @rmtoll ISR IDLE LL_USART_IsActiveFlag_IDLE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL); +} + +/* Legacy define */ +#define LL_USART_IsActiveFlag_RXNE LL_USART_IsActiveFlag_RXNE_RXFNE + +/** + * @brief Check if the USART Read Data Register or USART RX FIFO Not Empty Flag is set or not + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll ISR RXNE_RXFNE LL_USART_IsActiveFlag_RXNE_RXFNE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE_RXFNE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Transmission Complete Flag is set or not + * @rmtoll ISR TC LL_USART_IsActiveFlag_TC + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL); +} + +/* Legacy define */ +#define LL_USART_IsActiveFlag_TXE LL_USART_IsActiveFlag_TXE_TXFNF + +/** + * @brief Check if the USART Transmit Data Register Empty or USART TX FIFO Not Full Flag is set or not + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll ISR TXE_TXFNF LL_USART_IsActiveFlag_TXE_TXFNF + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE_TXFNF(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART LIN Break Detection Flag is set or not + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll ISR LBDF LL_USART_IsActiveFlag_LBD + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART CTS interrupt Flag is set or not + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll ISR CTSIF LL_USART_IsActiveFlag_nCTS + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART CTS Flag is set or not + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll ISR CTS LL_USART_IsActiveFlag_CTS + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Receiver Time Out Flag is set or not + * @rmtoll ISR RTOF LL_USART_IsActiveFlag_RTO + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART End Of Block Flag is set or not + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll ISR EOBF LL_USART_IsActiveFlag_EOB + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the SPI Slave Underrun error flag is set or not + * @note Macro IS_UART_SPI_SLAVE_INSTANCE(USARTx) can be used to check whether or not + * SPI Slave mode feature is supported by the USARTx instance. + * @rmtoll ISR UDR LL_USART_IsActiveFlag_UDR + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_UDR(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_UDR) == (USART_ISR_UDR)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Auto-Baud Rate Error Flag is set or not + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll ISR ABRE LL_USART_IsActiveFlag_ABRE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Auto-Baud Rate Flag is set or not + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll ISR ABRF LL_USART_IsActiveFlag_ABR + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Busy Flag is set or not + * @rmtoll ISR BUSY LL_USART_IsActiveFlag_BUSY + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Character Match Flag is set or not + * @rmtoll ISR CMF LL_USART_IsActiveFlag_CM + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Send Break Flag is set or not + * @rmtoll ISR SBKF LL_USART_IsActiveFlag_SBK + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not + * @rmtoll ISR RWU LL_USART_IsActiveFlag_RWU + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Wake Up from stop mode Flag is set or not + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll ISR WUF LL_USART_IsActiveFlag_WKUP + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Transmit Enable Acknowledge Flag is set or not + * @rmtoll ISR TEACK LL_USART_IsActiveFlag_TEACK + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Receive Enable Acknowledge Flag is set or not + * @rmtoll ISR REACK LL_USART_IsActiveFlag_REACK + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART TX FIFO Empty Flag is set or not + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll ISR TXFE LL_USART_IsActiveFlag_TXFE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXFE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART RX FIFO Full Flag is set or not + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll ISR RXFF LL_USART_IsActiveFlag_RXFF + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXFF(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not + * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TCBGT(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TCBGT) == (USART_ISR_TCBGT)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART TX FIFO Threshold Flag is set or not + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll ISR TXFT LL_USART_IsActiveFlag_TXFT + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXFT(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART RX FIFO Threshold Flag is set or not + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll ISR RXFT LL_USART_IsActiveFlag_RXFT + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXFT(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL); +} + +/** + * @brief Clear Parity Error Flag + * @rmtoll ICR PECF LL_USART_ClearFlag_PE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_PECF); +} + +/** + * @brief Clear Framing Error Flag + * @rmtoll ICR FECF LL_USART_ClearFlag_FE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_FECF); +} + +/** + * @brief Clear Noise Error detected Flag + * @rmtoll ICR NECF LL_USART_ClearFlag_NE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_NECF); +} + +/** + * @brief Clear OverRun Error Flag + * @rmtoll ICR ORECF LL_USART_ClearFlag_ORE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_ORECF); +} + +/** + * @brief Clear IDLE line detected Flag + * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_IDLECF); +} + +/** + * @brief Clear TX FIFO Empty Flag + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll ICR TXFECF LL_USART_ClearFlag_TXFE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_TXFE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_TXFECF); +} + +/** + * @brief Clear Transmission Complete Flag + * @rmtoll ICR TCCF LL_USART_ClearFlag_TC + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_TCCF); +} + +/** + * @brief Clear Smartcard Transmission Complete Before Guard Time Flag + * @rmtoll ICR TCBGTCF LL_USART_ClearFlag_TCBGT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_TCBGT(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_TCBGTCF); +} + +/** + * @brief Clear LIN Break Detection Flag + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_LBDCF); +} + +/** + * @brief Clear CTS Interrupt Flag + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll ICR CTSCF LL_USART_ClearFlag_nCTS + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_CTSCF); +} + +/** + * @brief Clear Receiver Time Out Flag + * @rmtoll ICR RTOCF LL_USART_ClearFlag_RTO + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_RTOCF); +} + +/** + * @brief Clear End Of Block Flag + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll ICR EOBCF LL_USART_ClearFlag_EOB + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_EOBCF); +} + +/** + * @brief Clear SPI Slave Underrun Flag + * @note Macro IS_UART_SPI_SLAVE_INSTANCE(USARTx) can be used to check whether or not + * SPI Slave mode feature is supported by the USARTx instance. + * @rmtoll ICR UDRCF LL_USART_ClearFlag_UDR + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_UDR(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_UDRCF); +} + +/** + * @brief Clear Character Match Flag + * @rmtoll ICR CMCF LL_USART_ClearFlag_CM + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_CMCF); +} + +/** + * @brief Clear Wake Up from stop mode Flag + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll ICR WUCF LL_USART_ClearFlag_WKUP + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_WUCF); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_IT_Management IT_Management + * @{ + */ + +/** + * @brief Enable IDLE Interrupt + * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE); +} + +/* Legacy define */ +#define LL_USART_EnableIT_RXNE LL_USART_EnableIT_RXNE_RXFNE + +/** + * @brief Enable RX Not Empty and RX FIFO Not Empty Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 RXNEIE_RXFNEIE LL_USART_EnableIT_RXNE_RXFNE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_RXNE_RXFNE(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); +} + +/** + * @brief Enable Transmission Complete Interrupt + * @rmtoll CR1 TCIE LL_USART_EnableIT_TC + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE); +} + +/* Legacy define */ +#define LL_USART_EnableIT_TXE LL_USART_EnableIT_TXE_TXFNF + +/** + * @brief Enable TX Empty and TX FIFO Not Full Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 TXEIE_TXFNFIE LL_USART_EnableIT_TXE_TXFNF + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_TXE_TXFNF(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE); +} + +/** + * @brief Enable Parity Error Interrupt + * @rmtoll CR1 PEIE LL_USART_EnableIT_PE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE); +} + +/** + * @brief Enable Character Match Interrupt + * @rmtoll CR1 CMIE LL_USART_EnableIT_CM + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_CMIE); +} + +/** + * @brief Enable Receiver Timeout Interrupt + * @rmtoll CR1 RTOIE LL_USART_EnableIT_RTO + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RTOIE); +} + +/** + * @brief Enable End Of Block Interrupt + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR1 EOBIE LL_USART_EnableIT_EOB + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE); +} + +/** + * @brief Enable TX FIFO Empty Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 TXFEIE LL_USART_EnableIT_TXFE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_TXFE(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXFEIE); +} + +/** + * @brief Enable RX FIFO Full Interrupt + * @rmtoll CR1 RXFFIE LL_USART_EnableIT_RXFF + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_RXFF(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXFFIE); +} + +/** + * @brief Enable LIN Break Detection Interrupt + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_LBDIE); +} + +/** + * @brief Enable Error Interrupt + * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing + * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register). + * 0: Interrupt is inhibited + * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register. + * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE); +} + +/** + * @brief Enable CTS Interrupt + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); +} + +/** + * @brief Enable Wake Up from Stop Mode Interrupt + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUFIE LL_USART_EnableIT_WKUP + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE); +} + +/** + * @brief Enable TX FIFO Threshold Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 TXFTIE LL_USART_EnableIT_TXFT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_TXFT(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE); +} + +/** + * @brief Enable Smartcard Transmission Complete Before Guard Time Interrupt + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 TCBGTIE LL_USART_EnableIT_TCBGT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE); +} + +/** + * @brief Enable RX FIFO Threshold Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 RXFTIE LL_USART_EnableIT_RXFT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_RXFT(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE); +} + +/** + * @brief Disable IDLE Interrupt + * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE); +} + +/* Legacy define */ +#define LL_USART_DisableIT_RXNE LL_USART_DisableIT_RXNE_RXFNE + +/** + * @brief Disable RX Not Empty and RX FIFO Not Empty Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 RXNEIE_RXFNEIE LL_USART_DisableIT_RXNE_RXFNE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_RXNE_RXFNE(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); +} + +/** + * @brief Disable Transmission Complete Interrupt + * @rmtoll CR1 TCIE LL_USART_DisableIT_TC + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE); +} + +/* Legacy define */ +#define LL_USART_DisableIT_TXE LL_USART_DisableIT_TXE_TXFNF + +/** + * @brief Disable TX Empty and TX FIFO Not Full Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 TXEIE_TXFNFIE LL_USART_DisableIT_TXE_TXFNF + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_TXE_TXFNF(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE); +} + +/** + * @brief Disable Parity Error Interrupt + * @rmtoll CR1 PEIE LL_USART_DisableIT_PE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE); +} + +/** + * @brief Disable Character Match Interrupt + * @rmtoll CR1 CMIE LL_USART_DisableIT_CM + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE); +} + +/** + * @brief Disable Receiver Timeout Interrupt + * @rmtoll CR1 RTOIE LL_USART_DisableIT_RTO + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE); +} + +/** + * @brief Disable End Of Block Interrupt + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR1 EOBIE LL_USART_DisableIT_EOB + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE); +} + +/** + * @brief Disable TX FIFO Empty Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 TXFEIE LL_USART_DisableIT_TXFE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_TXFE(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXFEIE); +} + +/** + * @brief Disable RX FIFO Full Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 RXFFIE LL_USART_DisableIT_RXFF + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_RXFF(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXFFIE); +} + +/** + * @brief Disable LIN Break Detection Interrupt + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE); +} + +/** + * @brief Disable Error Interrupt + * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing + * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register). + * 0: Interrupt is inhibited + * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register. + * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); +} + +/** + * @brief Disable CTS Interrupt + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); +} + +/** + * @brief Disable Wake Up from Stop Mode Interrupt + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUFIE LL_USART_DisableIT_WKUP + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE); +} + +/** + * @brief Disable TX FIFO Threshold Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 TXFTIE LL_USART_DisableIT_TXFT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_TXFT(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE); +} + +/** + * @brief Disable Smartcard Transmission Complete Before Guard Time Interrupt + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 TCBGTIE LL_USART_DisableIT_TCBGT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE); +} + +/** + * @brief Disable RX FIFO Threshold Interrupt + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 RXFTIE LL_USART_DisableIT_RXFT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_RXFT(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE); +} + +/** + * @brief Check if the USART IDLE Interrupt source is enabled or disabled. + * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL); +} + +/* Legacy define */ +#define LL_USART_IsEnabledIT_RXNE LL_USART_IsEnabledIT_RXNE_RXFNE + +/** + * @brief Check if the USART RX Not Empty and USART RX FIFO Not Empty Interrupt is enabled or disabled. + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 RXNEIE_RXFNEIE LL_USART_IsEnabledIT_RXNE_RXFNE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE_RXFNE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled. + * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL); +} + +/* Legacy define */ +#define LL_USART_IsEnabledIT_TXE LL_USART_IsEnabledIT_TXE_TXFNF + +/** + * @brief Check if the USART TX Empty and USART TX FIFO Not Full Interrupt is enabled or disabled + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 TXEIE_TXFNFIE LL_USART_IsEnabledIT_TXE_TXFNF + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE_TXFNF(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Parity Error Interrupt is enabled or disabled. + * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Character Match Interrupt is enabled or disabled. + * @rmtoll CR1 CMIE LL_USART_IsEnabledIT_CM + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled. + * @rmtoll CR1 RTOIE LL_USART_IsEnabledIT_RTO + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART End Of Block Interrupt is enabled or disabled. + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR1 EOBIE LL_USART_IsEnabledIT_EOB + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART TX FIFO Empty Interrupt is enabled or disabled + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 TXFEIE LL_USART_IsEnabledIT_TXFE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXFE(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART RX FIFO Full Interrupt is enabled or disabled + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR1 RXFFIE LL_USART_IsEnabledIT_RXFF + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXFF(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled. + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Error Interrupt is enabled or disabled. + * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART CTS Interrupt is enabled or disabled. + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Wake Up from Stop Mode Interrupt is enabled or disabled. + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUFIE LL_USART_IsEnabledIT_WKUP + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if USART TX FIFO Threshold Interrupt is enabled or disabled + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 TXFTIE LL_USART_IsEnabledIT_TXFT + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXFT(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the Smartcard Transmission Complete Before Guard Time Interrupt is enabled or disabled. + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 TCBGTIE LL_USART_IsEnabledIT_TCBGT + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TCBGT(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if USART RX FIFO Threshold Interrupt is enabled or disabled + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll CR3 RXFTIE LL_USART_IsEnabledIT_RXFT + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXFT(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_DMA_Management DMA_Management + * @{ + */ + +/** + * @brief Enable DMA Mode for reception + * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR); +} + +/** + * @brief Disable DMA Mode for reception + * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR); +} + +/** + * @brief Check if DMA Mode is enabled for reception + * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL); +} + +/** + * @brief Enable DMA Mode for transmission + * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); +} + +/** + * @brief Disable DMA Mode for transmission + * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT); +} + +/** + * @brief Check if DMA Mode is enabled for transmission + * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL); +} + +/** + * @brief Enable DMA Disabling on Reception Error + * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_DDRE); +} + +/** + * @brief Disable DMA Disabling on Reception Error + * @rmtoll CR3 DDRE LL_USART_DisableDMADeactOnRxErr + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE); +} + +/** + * @brief Indicate if DMA Disabling on Reception Error is disabled + * @rmtoll CR3 DDRE LL_USART_IsEnabledDMADeactOnRxErr + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(const USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL); +} + +/** + * @brief Get the data register address used for DMA transfer + * @rmtoll RDR RDR LL_USART_DMA_GetRegAddr\n + * @rmtoll TDR TDR LL_USART_DMA_GetRegAddr + * @param USARTx USART Instance + * @param Direction This parameter can be one of the following values: + * @arg @ref LL_USART_DMA_REG_DATA_TRANSMIT + * @arg @ref LL_USART_DMA_REG_DATA_RECEIVE + * @retval Address of data register + */ +__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(const USART_TypeDef *USARTx, uint32_t Direction) +{ + uint32_t data_reg_addr; + + if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT) + { + /* return address of TDR register */ + data_reg_addr = (uint32_t) &(USARTx->TDR); + } + else + { + /* return address of RDR register */ + data_reg_addr = (uint32_t) &(USARTx->RDR); + } + + return data_reg_addr; +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Data_Management Data_Management + * @{ + */ + +/** + * @brief Read Receiver Data register (Receive Data value, 8 bits) + * @rmtoll RDR RDR LL_USART_ReceiveData8 + * @param USARTx USART Instance + * @retval Value between Min_Data=0x00 and Max_Data=0xFF + */ +__STATIC_INLINE uint8_t LL_USART_ReceiveData8(const USART_TypeDef *USARTx) +{ + return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU); +} + +/** + * @brief Read Receiver Data register (Receive Data value, 9 bits) + * @rmtoll RDR RDR LL_USART_ReceiveData9 + * @param USARTx USART Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x1FF + */ +__STATIC_INLINE uint16_t LL_USART_ReceiveData9(const USART_TypeDef *USARTx) +{ + return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR)); +} + +/** + * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) + * @rmtoll TDR TDR LL_USART_TransmitData8 + * @param USARTx USART Instance + * @param Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value) +{ + USARTx->TDR = Value; +} + +/** + * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits) + * @rmtoll TDR TDR LL_USART_TransmitData9 + * @param USARTx USART Instance + * @param Value between Min_Data=0x00 and Max_Data=0x1FF + * @retval None + */ +__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value) +{ + USARTx->TDR = (uint16_t)(Value & 0x1FFUL); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Execution Execution + * @{ + */ + +/** + * @brief Request an Automatic Baud Rate measurement on next received data frame + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll RQR ABRRQ LL_USART_RequestAutoBaudRate + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_ABRRQ); +} + +/** + * @brief Request Break sending + * @rmtoll RQR SBKRQ LL_USART_RequestBreakSending + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_SBKRQ); +} + +/** + * @brief Put USART in mute mode and set the RWU flag + * @rmtoll RQR MMRQ LL_USART_RequestEnterMuteMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_MMRQ); +} + +/** + * @brief Request a Receive Data and FIFO flush + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @note Allows to discard the received data without reading them, and avoid an overrun + * condition. + * @rmtoll RQR RXFRQ LL_USART_RequestRxDataFlush + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_RXFRQ); +} + +/** + * @brief Request a Transmit data and FIFO flush + * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not + * FIFO mode feature is supported by the USARTx instance. + * @rmtoll RQR TXFRQ LL_USART_RequestTxDataFlush + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_TXFRQ); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup USART_LL_EF_Init Initialization and de-initialization functions + * @{ + */ +ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx); +ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct); +void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct); +ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct); +void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct); +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* USART1 || USART2 || USART3 || USART4 || USART5 || USART6 */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G0xx_LL_USART_H */ + diff --git a/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c new file mode 100644 index 0000000..a7703e7 --- /dev/null +++ b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c @@ -0,0 +1,4700 @@ +/** + ****************************************************************************** + * @file stm32g0xx_hal_uart.c + * @author MCD Application Team + * @brief UART HAL module driver. + * This file provides firmware functions to manage the following + * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). + * + Initialization and de-initialization functions + * + IO operation functions + * + Peripheral Control functions + * + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim + =============================================================================== + ##### How to use this driver ##### + =============================================================================== + [..] + The UART HAL driver can be used as follows: + + (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart). + (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API: + (++) Enable the USARTx interface clock. + (++) UART pins configuration: + (+++) Enable the clock for the UART GPIOs. + (+++) Configure these UART pins as alternate function pull-up. + (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT() + and HAL_UART_Receive_IT() APIs): + (+++) Configure the USARTx interrupt priority. + (+++) Enable the NVIC USART IRQ handle. + (++) UART interrupts handling: + -@@- The specific UART interrupts (Transmission complete interrupt, + RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts) + are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() + inside the transmit and receive processes. + (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA() + and HAL_UART_Receive_DMA() APIs): + (+++) Declare a DMA handle structure for the Tx/Rx channel. + (+++) Enable the DMAx interface clock. + (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. + (+++) Configure the DMA Tx/Rx channel. + (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle. + (+++) Configure the priority and enable the NVIC for the transfer complete + interrupt on the DMA Tx/Rx channel. + + (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Prescaler value , Hardware + flow control and Mode (Receiver/Transmitter) in the huart handle Init structure. + + (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...) + in the huart handle AdvancedInit structure. + + (#) For the UART asynchronous mode, initialize the UART registers by calling + the HAL_UART_Init() API. + + (#) For the UART Half duplex mode, initialize the UART registers by calling + the HAL_HalfDuplex_Init() API. + + (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers + by calling the HAL_LIN_Init() API. + + (#) For the UART Multiprocessor mode, initialize the UART registers + by calling the HAL_MultiProcessor_Init() API. + + (#) For the UART RS485 Driver Enabled mode, initialize the UART registers + by calling the HAL_RS485Ex_Init() API. + + [..] + (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(), + also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by + calling the customized HAL_UART_MspInit() API. + + ##### Callback registration ##### + ================================== + + [..] + The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1 + allows the user to configure dynamically the driver callbacks. + + [..] + Use Function HAL_UART_RegisterCallback() to register a user callback. + Function HAL_UART_RegisterCallback() allows to register following callbacks: + (+) TxHalfCpltCallback : Tx Half Complete Callback. + (+) TxCpltCallback : Tx Complete Callback. + (+) RxHalfCpltCallback : Rx Half Complete Callback. + (+) RxCpltCallback : Rx Complete Callback. + (+) ErrorCallback : Error Callback. + (+) AbortCpltCallback : Abort Complete Callback. + (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. + (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. + (+) WakeupCallback : Wakeup Callback. + (+) RxFifoFullCallback : Rx Fifo Full Callback. + (+) TxFifoEmptyCallback : Tx Fifo Empty Callback. + (+) MspInitCallback : UART MspInit. + (+) MspDeInitCallback : UART MspDeInit. + This function takes as parameters the HAL peripheral handle, the Callback ID + and a pointer to the user callback function. + + [..] + Use function HAL_UART_UnRegisterCallback() to reset a callback to the default + weak (surcharged) function. + HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, + and the Callback ID. + This function allows to reset following callbacks: + (+) TxHalfCpltCallback : Tx Half Complete Callback. + (+) TxCpltCallback : Tx Complete Callback. + (+) RxHalfCpltCallback : Rx Half Complete Callback. + (+) RxCpltCallback : Rx Complete Callback. + (+) ErrorCallback : Error Callback. + (+) AbortCpltCallback : Abort Complete Callback. + (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. + (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. + (+) WakeupCallback : Wakeup Callback. + (+) RxFifoFullCallback : Rx Fifo Full Callback. + (+) TxFifoEmptyCallback : Tx Fifo Empty Callback. + (+) MspInitCallback : UART MspInit. + (+) MspDeInitCallback : UART MspDeInit. + + [..] + For specific callback RxEventCallback, use dedicated registration/reset functions: + respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback(). + + [..] + By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET + all callbacks are set to the corresponding weak (surcharged) functions: + examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback(). + Exception done for MspInit and MspDeInit functions that are respectively + reset to the legacy weak (surcharged) functions in the HAL_UART_Init() + and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit() + keep and use the user MspInit/MspDeInit callbacks (registered beforehand). + + [..] + Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only. + Exception done MspInit/MspDeInit that can be registered/unregistered + in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user) + MspInit/DeInit callbacks can be used during the Init/DeInit. + In that case first register the MspInit/MspDeInit user callbacks + using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit() + or HAL_UART_Init() function. + + [..] + When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or + not defined, the callback registration feature is not available + and weak (surcharged) callbacks are used. + + + @endverbatim + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g0xx_hal.h" + +/** @addtogroup STM32G0xx_HAL_Driver + * @{ + */ + +/** @defgroup UART UART + * @brief HAL UART module driver + * @{ + */ + +#ifdef HAL_UART_MODULE_ENABLED + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/** @defgroup UART_Private_Constants UART Private Constants + * @{ + */ +#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | \ + USART_CR1_OVER8 | USART_CR1_FIFOEN)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ + +#define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT | USART_CR3_TXFTCFG | \ + USART_CR3_RXFTCFG)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ + +#define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */ +#define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */ + +#define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */ +#define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */ +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/** @addtogroup UART_Private_Functions + * @{ + */ +static void UART_EndTxTransfer(UART_HandleTypeDef *huart); +static void UART_EndRxTransfer(UART_HandleTypeDef *huart); +static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); +static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); +static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); +static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); +static void UART_DMAError(DMA_HandleTypeDef *hdma); +static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma); +static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma); +static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma); +static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma); +static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma); +static void UART_TxISR_8BIT(UART_HandleTypeDef *huart); +static void UART_TxISR_16BIT(UART_HandleTypeDef *huart); +static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart); +static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); +static void UART_EndTransmit_IT(UART_HandleTypeDef *huart); +static void UART_RxISR_8BIT(UART_HandleTypeDef *huart); +static void UART_RxISR_16BIT(UART_HandleTypeDef *huart); +static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart); +static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); +/** + * @} + */ + +/* Private variables ---------------------------------------------------------*/ +/** @addtogroup UART_Private_variables + * @{ + */ +const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U}; +/** + * @} + */ + +/* Exported Constants --------------------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup UART_Exported_Functions UART Exported Functions + * @{ + */ + +/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions + * @brief Initialization and Configuration functions + * +@verbatim +=============================================================================== + ##### Initialization and Configuration functions ##### + =============================================================================== + [..] + This subsection provides a set of functions allowing to initialize the USARTx or the UARTy + in asynchronous mode. + (+) For the asynchronous mode the parameters below can be configured: + (++) Baud Rate + (++) Word Length + (++) Stop Bit + (++) Parity: If the parity is enabled, then the MSB bit of the data written + in the data register is transmitted but is changed by the parity bit. + (++) Hardware flow control + (++) Receiver/transmitter modes + (++) Over Sampling Method + (++) One-Bit Sampling Method + (+) For the asynchronous mode, the following advanced features can be configured as well: + (++) TX and/or RX pin level inversion + (++) data logical level inversion + (++) RX and TX pins swap + (++) RX overrun detection disabling + (++) DMA disabling on RX error + (++) MSB first on communication line + (++) auto Baud rate detection + [..] + The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API + follow respectively the UART asynchronous, UART Half duplex, UART LIN mode + and UART multiprocessor mode configuration procedures (details for the procedures + are available in reference manual). + +@endverbatim + + Depending on the frame length defined by the M1 and M0 bits (7-bit, + 8-bit or 9-bit), the possible UART formats are listed in the + following table. + + Table 1. UART frame format. + +-----------------------------------------------------------------------+ + | M1 bit | M0 bit | PCE bit | UART frame | + |---------|---------|-----------|---------------------------------------| + | 0 | 0 | 0 | | SB | 8 bit data | STB | | + |---------|---------|-----------|---------------------------------------| + | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | + |---------|---------|-----------|---------------------------------------| + | 0 | 1 | 0 | | SB | 9 bit data | STB | | + |---------|---------|-----------|---------------------------------------| + | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | + |---------|---------|-----------|---------------------------------------| + | 1 | 0 | 0 | | SB | 7 bit data | STB | | + |---------|---------|-----------|---------------------------------------| + | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | + +-----------------------------------------------------------------------+ + + * @{ + */ + +/** + * @brief Initialize the UART mode according to the specified + * parameters in the UART_InitTypeDef and initialize the associated handle. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) +{ + /* Check the UART handle allocation */ + if (huart == NULL) + { + return HAL_ERROR; + } + + if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE) + { + /* Check the parameters */ + assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance)); + } + else + { + /* Check the parameters */ + assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); + } + + if (huart->gState == HAL_UART_STATE_RESET) + { + /* Allocate lock resource and initialize it */ + huart->Lock = HAL_UNLOCKED; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + UART_InitCallbacksToDefault(huart); + + if (huart->MspInitCallback == NULL) + { + huart->MspInitCallback = HAL_UART_MspInit; + } + + /* Init the low level hardware */ + huart->MspInitCallback(huart); +#else + /* Init the low level hardware : GPIO, CLOCK */ + HAL_UART_MspInit(huart); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + + huart->gState = HAL_UART_STATE_BUSY; + + __HAL_UART_DISABLE(huart); + + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) + { + return HAL_ERROR; + } + + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + + /* In asynchronous mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ + CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); + + __HAL_UART_ENABLE(huart); + + /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + return (UART_CheckIdleState(huart)); +} + +/** + * @brief Initialize the half-duplex mode according to the specified + * parameters in the UART_InitTypeDef and creates the associated handle. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) +{ + /* Check the UART handle allocation */ + if (huart == NULL) + { + return HAL_ERROR; + } + + /* Check UART instance */ + assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance)); + + if (huart->gState == HAL_UART_STATE_RESET) + { + /* Allocate lock resource and initialize it */ + huart->Lock = HAL_UNLOCKED; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + UART_InitCallbacksToDefault(huart); + + if (huart->MspInitCallback == NULL) + { + huart->MspInitCallback = HAL_UART_MspInit; + } + + /* Init the low level hardware */ + huart->MspInitCallback(huart); +#else + /* Init the low level hardware : GPIO, CLOCK */ + HAL_UART_MspInit(huart); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + + huart->gState = HAL_UART_STATE_BUSY; + + __HAL_UART_DISABLE(huart); + + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) + { + return HAL_ERROR; + } + + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + + /* In half-duplex mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - SCEN and IREN bits in the USART_CR3 register.*/ + CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); + + /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ + SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); + + __HAL_UART_ENABLE(huart); + + /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + return (UART_CheckIdleState(huart)); +} + + +/** + * @brief Initialize the LIN mode according to the specified + * parameters in the UART_InitTypeDef and creates the associated handle. + * @param huart UART handle. + * @param BreakDetectLength Specifies the LIN break detection length. + * This parameter can be one of the following values: + * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection + * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) +{ + /* Check the UART handle allocation */ + if (huart == NULL) + { + return HAL_ERROR; + } + + /* Check the LIN UART instance */ + assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); + /* Check the Break detection length parameter */ + assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength)); + + /* LIN mode limited to 16-bit oversampling only */ + if (huart->Init.OverSampling == UART_OVERSAMPLING_8) + { + return HAL_ERROR; + } + /* LIN mode limited to 8-bit data length */ + if (huart->Init.WordLength != UART_WORDLENGTH_8B) + { + return HAL_ERROR; + } + + if (huart->gState == HAL_UART_STATE_RESET) + { + /* Allocate lock resource and initialize it */ + huart->Lock = HAL_UNLOCKED; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + UART_InitCallbacksToDefault(huart); + + if (huart->MspInitCallback == NULL) + { + huart->MspInitCallback = HAL_UART_MspInit; + } + + /* Init the low level hardware */ + huart->MspInitCallback(huart); +#else + /* Init the low level hardware : GPIO, CLOCK */ + HAL_UART_MspInit(huart); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + + huart->gState = HAL_UART_STATE_BUSY; + + __HAL_UART_DISABLE(huart); + + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) + { + return HAL_ERROR; + } + + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + + /* In LIN mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - SCEN and IREN bits in the USART_CR3 register.*/ + CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN); + CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); + + /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ + SET_BIT(huart->Instance->CR2, USART_CR2_LINEN); + + /* Set the USART LIN Break detection length. */ + MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength); + + __HAL_UART_ENABLE(huart); + + /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + return (UART_CheckIdleState(huart)); +} + + +/** + * @brief Initialize the multiprocessor mode according to the specified + * parameters in the UART_InitTypeDef and initialize the associated handle. + * @param huart UART handle. + * @param Address UART node address (4-, 6-, 7- or 8-bit long). + * @param WakeUpMethod Specifies the UART wakeup method. + * This parameter can be one of the following values: + * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection + * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark + * @note If the user resorts to idle line detection wake up, the Address parameter + * is useless and ignored by the initialization function. + * @note If the user resorts to address mark wake up, the address length detection + * is configured by default to 4 bits only. For the UART to be able to + * manage 6-, 7- or 8-bit long addresses detection, the API + * HAL_MultiProcessorEx_AddressLength_Set() must be called after + * HAL_MultiProcessor_Init(). + * @retval HAL status + */ +HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod) +{ + /* Check the UART handle allocation */ + if (huart == NULL) + { + return HAL_ERROR; + } + + /* Check the wake up method parameter */ + assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod)); + + if (huart->gState == HAL_UART_STATE_RESET) + { + /* Allocate lock resource and initialize it */ + huart->Lock = HAL_UNLOCKED; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + UART_InitCallbacksToDefault(huart); + + if (huart->MspInitCallback == NULL) + { + huart->MspInitCallback = HAL_UART_MspInit; + } + + /* Init the low level hardware */ + huart->MspInitCallback(huart); +#else + /* Init the low level hardware : GPIO, CLOCK */ + HAL_UART_MspInit(huart); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + + huart->gState = HAL_UART_STATE_BUSY; + + __HAL_UART_DISABLE(huart); + + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) + { + return HAL_ERROR; + } + + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + + /* In multiprocessor mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - SCEN, HDSEL and IREN bits in the USART_CR3 register. */ + CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); + + if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK) + { + /* If address mark wake up method is chosen, set the USART address node */ + MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS)); + } + + /* Set the wake up method by setting the WAKE bit in the CR1 register */ + MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod); + + __HAL_UART_ENABLE(huart); + + /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + return (UART_CheckIdleState(huart)); +} + + +/** + * @brief DeInitialize the UART peripheral. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) +{ + /* Check the UART handle allocation */ + if (huart == NULL) + { + return HAL_ERROR; + } + + /* Check the parameters */ + assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); + + huart->gState = HAL_UART_STATE_BUSY; + + __HAL_UART_DISABLE(huart); + + huart->Instance->CR1 = 0x0U; + huart->Instance->CR2 = 0x0U; + huart->Instance->CR3 = 0x0U; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + if (huart->MspDeInitCallback == NULL) + { + huart->MspDeInitCallback = HAL_UART_MspDeInit; + } + /* DeInit the low level hardware */ + huart->MspDeInitCallback(huart); +#else + /* DeInit the low level hardware */ + HAL_UART_MspDeInit(huart); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + + huart->ErrorCode = HAL_UART_ERROR_NONE; + huart->gState = HAL_UART_STATE_RESET; + huart->RxState = HAL_UART_STATE_RESET; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + huart->RxEventType = HAL_UART_RXEVENT_TC; + + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief Initialize the UART MSP. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_MspInit can be implemented in the user file + */ +} + +/** + * @brief DeInitialize the UART MSP. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_MspDeInit can be implemented in the user file + */ +} + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +/** + * @brief Register a User UART Callback + * To be used instead of the weak predefined callback + * @param huart uart handle + * @param CallbackID ID of the callback to be registered + * This parameter can be one of the following values: + * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID + * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID + * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID + * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID + * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID + * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID + * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID + * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID + * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID + * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID + * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID + * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID + * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID + * @param pCallback pointer to the Callback function + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, + pUART_CallbackTypeDef pCallback) +{ + HAL_StatusTypeDef status = HAL_OK; + + if (pCallback == NULL) + { + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + return HAL_ERROR; + } + + __HAL_LOCK(huart); + + if (huart->gState == HAL_UART_STATE_READY) + { + switch (CallbackID) + { + case HAL_UART_TX_HALFCOMPLETE_CB_ID : + huart->TxHalfCpltCallback = pCallback; + break; + + case HAL_UART_TX_COMPLETE_CB_ID : + huart->TxCpltCallback = pCallback; + break; + + case HAL_UART_RX_HALFCOMPLETE_CB_ID : + huart->RxHalfCpltCallback = pCallback; + break; + + case HAL_UART_RX_COMPLETE_CB_ID : + huart->RxCpltCallback = pCallback; + break; + + case HAL_UART_ERROR_CB_ID : + huart->ErrorCallback = pCallback; + break; + + case HAL_UART_ABORT_COMPLETE_CB_ID : + huart->AbortCpltCallback = pCallback; + break; + + case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : + huart->AbortTransmitCpltCallback = pCallback; + break; + + case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : + huart->AbortReceiveCpltCallback = pCallback; + break; + + case HAL_UART_WAKEUP_CB_ID : + huart->WakeupCallback = pCallback; + break; + + case HAL_UART_RX_FIFO_FULL_CB_ID : + huart->RxFifoFullCallback = pCallback; + break; + + case HAL_UART_TX_FIFO_EMPTY_CB_ID : + huart->TxFifoEmptyCallback = pCallback; + break; + + case HAL_UART_MSPINIT_CB_ID : + huart->MspInitCallback = pCallback; + break; + + case HAL_UART_MSPDEINIT_CB_ID : + huart->MspDeInitCallback = pCallback; + break; + + default : + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + status = HAL_ERROR; + break; + } + } + else if (huart->gState == HAL_UART_STATE_RESET) + { + switch (CallbackID) + { + case HAL_UART_MSPINIT_CB_ID : + huart->MspInitCallback = pCallback; + break; + + case HAL_UART_MSPDEINIT_CB_ID : + huart->MspDeInitCallback = pCallback; + break; + + default : + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + status = HAL_ERROR; + break; + } + } + else + { + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + status = HAL_ERROR; + } + + __HAL_UNLOCK(huart); + + return status; +} + +/** + * @brief Unregister an UART Callback + * UART callaback is redirected to the weak predefined callback + * @param huart uart handle + * @param CallbackID ID of the callback to be unregistered + * This parameter can be one of the following values: + * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID + * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID + * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID + * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID + * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID + * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID + * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID + * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID + * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID + * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID + * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID + * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID + * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID) +{ + HAL_StatusTypeDef status = HAL_OK; + + __HAL_LOCK(huart); + + if (HAL_UART_STATE_READY == huart->gState) + { + switch (CallbackID) + { + case HAL_UART_TX_HALFCOMPLETE_CB_ID : + huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ + break; + + case HAL_UART_TX_COMPLETE_CB_ID : + huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */ + break; + + case HAL_UART_RX_HALFCOMPLETE_CB_ID : + huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ + break; + + case HAL_UART_RX_COMPLETE_CB_ID : + huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */ + break; + + case HAL_UART_ERROR_CB_ID : + huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ + break; + + case HAL_UART_ABORT_COMPLETE_CB_ID : + huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ + break; + + case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : + huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak + AbortTransmitCpltCallback */ + break; + + case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : + huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak + AbortReceiveCpltCallback */ + break; + + case HAL_UART_WAKEUP_CB_ID : + huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */ + break; + + case HAL_UART_RX_FIFO_FULL_CB_ID : + huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */ + break; + + case HAL_UART_TX_FIFO_EMPTY_CB_ID : + huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */ + break; + + case HAL_UART_MSPINIT_CB_ID : + huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */ + break; + + case HAL_UART_MSPDEINIT_CB_ID : + huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */ + break; + + default : + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + status = HAL_ERROR; + break; + } + } + else if (HAL_UART_STATE_RESET == huart->gState) + { + switch (CallbackID) + { + case HAL_UART_MSPINIT_CB_ID : + huart->MspInitCallback = HAL_UART_MspInit; + break; + + case HAL_UART_MSPDEINIT_CB_ID : + huart->MspDeInitCallback = HAL_UART_MspDeInit; + break; + + default : + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + status = HAL_ERROR; + break; + } + } + else + { + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + status = HAL_ERROR; + } + + __HAL_UNLOCK(huart); + + return status; +} + +/** + * @brief Register a User UART Rx Event Callback + * To be used instead of the weak predefined callback + * @param huart Uart handle + * @param pCallback Pointer to the Rx Event Callback function + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback) +{ + HAL_StatusTypeDef status = HAL_OK; + + if (pCallback == NULL) + { + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + return HAL_ERROR; + } + + /* Process locked */ + __HAL_LOCK(huart); + + if (huart->gState == HAL_UART_STATE_READY) + { + huart->RxEventCallback = pCallback; + } + else + { + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + status = HAL_ERROR; + } + + /* Release Lock */ + __HAL_UNLOCK(huart); + + return status; +} + +/** + * @brief UnRegister the UART Rx Event Callback + * UART Rx Event Callback is redirected to the weak HAL_UARTEx_RxEventCallback() predefined callback + * @param huart Uart handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) +{ + HAL_StatusTypeDef status = HAL_OK; + + /* Process locked */ + __HAL_LOCK(huart); + + if (huart->gState == HAL_UART_STATE_READY) + { + huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */ + } + else + { + huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + + status = HAL_ERROR; + } + + /* Release Lock */ + __HAL_UNLOCK(huart); + return status; +} + +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + +/** + * @} + */ + +/** @defgroup UART_Exported_Functions_Group2 IO operation functions + * @brief UART Transmit/Receive functions + * +@verbatim + =============================================================================== + ##### IO operation functions ##### + =============================================================================== + This subsection provides a set of functions allowing to manage the UART asynchronous + and Half duplex data transfers. + + (#) There are two mode of transfer: + (+) Blocking mode: The communication is performed in polling mode. + The HAL status of all data processing is returned by the same function + after finishing transfer. + (+) Non-Blocking mode: The communication is performed using Interrupts + or DMA, These API's return the HAL status. + The end of the data processing will be indicated through the + dedicated UART IRQ when using Interrupt mode or the DMA IRQ when + using DMA mode. + The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks + will be executed respectively at the end of the transmit or Receive process + The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected + + (#) Blocking mode API's are : + (+) HAL_UART_Transmit() + (+) HAL_UART_Receive() + + (#) Non-Blocking mode API's with Interrupt are : + (+) HAL_UART_Transmit_IT() + (+) HAL_UART_Receive_IT() + (+) HAL_UART_IRQHandler() + + (#) Non-Blocking mode API's with DMA are : + (+) HAL_UART_Transmit_DMA() + (+) HAL_UART_Receive_DMA() + (+) HAL_UART_DMAPause() + (+) HAL_UART_DMAResume() + (+) HAL_UART_DMAStop() + + (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode: + (+) HAL_UART_TxHalfCpltCallback() + (+) HAL_UART_TxCpltCallback() + (+) HAL_UART_RxHalfCpltCallback() + (+) HAL_UART_RxCpltCallback() + (+) HAL_UART_ErrorCallback() + + (#) Non-Blocking mode transfers could be aborted using Abort API's : + (+) HAL_UART_Abort() + (+) HAL_UART_AbortTransmit() + (+) HAL_UART_AbortReceive() + (+) HAL_UART_Abort_IT() + (+) HAL_UART_AbortTransmit_IT() + (+) HAL_UART_AbortReceive_IT() + + (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: + (+) HAL_UART_AbortCpltCallback() + (+) HAL_UART_AbortTransmitCpltCallback() + (+) HAL_UART_AbortReceiveCpltCallback() + + (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced + reception services: + (+) HAL_UARTEx_RxEventCallback() + + (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. + Errors are handled as follows : + (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is + to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error + in Interrupt mode reception . + Received character is then retrieved and stored in Rx buffer, Error code is set to allow user + to identify error type, and HAL_UART_ErrorCallback() user callback is executed. + Transfer is kept ongoing on UART side. + If user wants to abort it, Abort services should be called by user. + (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. + This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. + Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() + user callback is executed. + + -@- In the Half duplex communication, it is forbidden to run the transmit + and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. + +@endverbatim + * @{ + */ + +/** + * @brief Send an amount of data in blocking mode. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the sent data is handled as a set of u16. In this case, Size must indicate the number + * of u16 provided through pData. + * @note When FIFO mode is enabled, writing a data in the TDR register adds one + * data to the TXFIFO. Write operations to the TDR register are performed + * when TXFNF flag is set. From hardware perspective, TXFNF flag and + * TXE are mapped on the same bit-field. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) + * (as sent data will be handled using u16 pointer cast). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required + * to ensure proper alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (u8 or u16 data elements). + * @param Size Amount of data elements (u8 or u16) to be sent. + * @param Timeout Timeout duration. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) +{ + const uint8_t *pdata8bits; + const uint16_t *pdata16bits; + uint32_t tickstart; + + /* Check that a Tx process is not already ongoing */ + if (huart->gState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a u16 frontier, as data to be filled into TDR will be + handled through a u16 cast. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + huart->ErrorCode = HAL_UART_ERROR_NONE; + huart->gState = HAL_UART_STATE_BUSY_TX; + + /* Init tickstart for timeout management */ + tickstart = HAL_GetTick(); + + huart->TxXferSize = Size; + huart->TxXferCount = Size; + + /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + pdata8bits = NULL; + pdata16bits = (const uint16_t *) pData; + } + else + { + pdata8bits = pData; + pdata16bits = NULL; + } + + while (huart->TxXferCount > 0U) + { + if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) + { + return HAL_TIMEOUT; + } + if (pdata8bits == NULL) + { + huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); + pdata16bits++; + } + else + { + huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); + pdata8bits++; + } + huart->TxXferCount--; + } + + if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) + { + return HAL_TIMEOUT; + } + + /* At end of Tx process, restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; + + return HAL_OK; + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Receive an amount of data in blocking mode. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the received data is handled as a set of u16. In this case, Size must indicate the number + * of u16 available through pData. + * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO + * is not empty. Read operations from the RDR register are performed when + * RXFNE flag is set. From hardware perspective, RXFNE flag and + * RXNE are mapped on the same bit-field. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer for storing data to be received, should be aligned on a half word frontier + * (16 bits) (as received data will be handled using u16 pointer cast). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required + * to ensure proper alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (u8 or u16 data elements). + * @param Size Amount of data elements (u8 or u16) to be received. + * @param Timeout Timeout duration. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) +{ + uint8_t *pdata8bits; + uint16_t *pdata16bits; + uint16_t uhMask; + uint32_t tickstart; + + /* Check that a Rx process is not already ongoing */ + if (huart->RxState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a u16 frontier, as data to be received from RDR will be + handled through a u16 cast. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + huart->ErrorCode = HAL_UART_ERROR_NONE; + huart->RxState = HAL_UART_STATE_BUSY_RX; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Init tickstart for timeout management */ + tickstart = HAL_GetTick(); + + huart->RxXferSize = Size; + huart->RxXferCount = Size; + + /* Computation of UART mask to apply to RDR register */ + UART_MASK_COMPUTATION(huart); + uhMask = huart->Mask; + + /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + pdata8bits = NULL; + pdata16bits = (uint16_t *) pData; + } + else + { + pdata8bits = pData; + pdata16bits = NULL; + } + + /* as long as data have to be received */ + while (huart->RxXferCount > 0U) + { + if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) + { + return HAL_TIMEOUT; + } + if (pdata8bits == NULL) + { + *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask); + pdata16bits++; + } + else + { + *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); + pdata8bits++; + } + huart->RxXferCount--; + } + + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + + return HAL_OK; + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Send an amount of data in interrupt mode. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the sent data is handled as a set of u16. In this case, Size must indicate the number + * of u16 provided through pData. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) + * (as sent data will be handled using u16 pointer cast). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required + * to ensure proper alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (u8 or u16 data elements). + * @param Size Amount of data elements (u8 or u16) to be sent. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) +{ + /* Check that a Tx process is not already ongoing */ + if (huart->gState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a u16 frontier, as data to be filled into TDR will be + handled through a u16 cast. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + huart->pTxBuffPtr = pData; + huart->TxXferSize = Size; + huart->TxXferCount = Size; + huart->TxISR = NULL; + + huart->ErrorCode = HAL_UART_ERROR_NONE; + huart->gState = HAL_UART_STATE_BUSY_TX; + + /* Configure Tx interrupt processing */ + if (huart->FifoMode == UART_FIFOMODE_ENABLE) + { + /* Set the Tx ISR function pointer according to the data word length */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + huart->TxISR = UART_TxISR_16BIT_FIFOEN; + } + else + { + huart->TxISR = UART_TxISR_8BIT_FIFOEN; + } + + /* Enable the TX FIFO threshold interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + } + else + { + /* Set the Tx ISR function pointer according to the data word length */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + huart->TxISR = UART_TxISR_16BIT; + } + else + { + huart->TxISR = UART_TxISR_8BIT; + } + + /* Enable the Transmit Data Register Empty interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); + } + + return HAL_OK; + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Receive an amount of data in interrupt mode. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the received data is handled as a set of u16. In this case, Size must indicate the number + * of u16 available through pData. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer for storing data to be received, should be aligned on a half word frontier + * (16 bits) (as received data will be handled using u16 pointer cast). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required + * to ensure proper alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (u8 or u16 data elements). + * @param Size Amount of data elements (u8 or u16) to be received. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +{ + /* Check that a Rx process is not already ongoing */ + if (huart->RxState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a u16 frontier, as data to be received from RDR will be + handled through a u16 cast. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + /* Set Reception type to Standard reception */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + if (!(IS_LPUART_INSTANCE(huart->Instance))) + { + /* Check that USART RTOEN bit is set */ + if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) + { + /* Enable the UART Receiver Timeout Interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); + } + } + + return (UART_Start_Receive_IT(huart, pData, Size)); + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Send an amount of data in DMA mode. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the sent data is handled as a set of u16. In this case, Size must indicate the number + * of u16 provided through pData. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) + * (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required + * to ensure proper alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (u8 or u16 data elements). + * @param Size Amount of data elements (u8 or u16) to be sent. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) +{ + /* Check that a Tx process is not already ongoing */ + if (huart->gState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a u16 frontier, as data copy into TDR will be + handled by DMA from a u16 frontier. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + huart->pTxBuffPtr = pData; + huart->TxXferSize = Size; + huart->TxXferCount = Size; + + huart->ErrorCode = HAL_UART_ERROR_NONE; + huart->gState = HAL_UART_STATE_BUSY_TX; + + if (huart->hdmatx != NULL) + { + /* Set the UART DMA transfer complete callback */ + huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; + + /* Set the UART DMA Half transfer complete callback */ + huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; + + /* Set the DMA error callback */ + huart->hdmatx->XferErrorCallback = UART_DMAError; + + /* Set the DMA abort callback */ + huart->hdmatx->XferAbortCallback = NULL; + + /* Enable the UART transmit DMA channel */ + if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + /* Restore huart->gState to ready */ + huart->gState = HAL_UART_STATE_READY; + + return HAL_ERROR; + } + } + /* Clear the TC flag in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); + + /* Enable the DMA transfer for transmit request by setting the DMAT bit + in the UART CR3 register */ + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); + + return HAL_OK; + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Receive an amount of data in DMA mode. + * @note When the UART parity is enabled (PCE = 1), the received data contain + * the parity bit (MSB position). + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the received data is handled as a set of u16. In this case, Size must indicate the number + * of u16 available through pData. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer for storing data to be received, should be aligned on a half word frontier + * (16 bits) (as received data will be handled by DMA from halfword frontier). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required + * to ensure proper alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (u8 or u16 data elements). + * @param Size Amount of data elements (u8 or u16) to be received. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +{ + /* Check that a Rx process is not already ongoing */ + if (huart->RxState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a u16 frontier, as data copy from RDR will be + handled by DMA from a u16 frontier. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + /* Set Reception type to Standard reception */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + if (!(IS_LPUART_INSTANCE(huart->Instance))) + { + /* Check that USART RTOEN bit is set */ + if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) + { + /* Enable the UART Receiver Timeout Interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); + } + } + + return (UART_Start_Receive_DMA(huart, pData, Size)); + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Pause the DMA Transfer. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart) +{ + const HAL_UART_StateTypeDef gstate = huart->gState; + const HAL_UART_StateTypeDef rxstate = huart->RxState; + + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && + (gstate == HAL_UART_STATE_BUSY_TX)) + { + /* Disable the UART DMA Tx request */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + } + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && + (rxstate == HAL_UART_STATE_BUSY_RX)) + { + /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + + /* Disable the UART DMA Rx request */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + } + + return HAL_OK; +} + +/** + * @brief Resume the DMA Transfer. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart) +{ + if (huart->gState == HAL_UART_STATE_BUSY_TX) + { + /* Enable the UART DMA Tx request */ + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); + } + if (huart->RxState == HAL_UART_STATE_BUSY_RX) + { + /* Clear the Overrun flag before resuming the Rx transfer */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); + + /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */ + if (huart->Init.Parity != UART_PARITY_NONE) + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); + } + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); + + /* Enable the UART DMA Rx request */ + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); + } + + return HAL_OK; +} + +/** + * @brief Stop the DMA Transfer. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) +{ + /* The Lock is not implemented on this API to allow the user application + to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() / + HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback: + indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete + interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of + the stream and the corresponding call back is executed. */ + + const HAL_UART_StateTypeDef gstate = huart->gState; + const HAL_UART_StateTypeDef rxstate = huart->RxState; + + /* Stop UART DMA Tx request if ongoing */ + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && + (gstate == HAL_UART_STATE_BUSY_TX)) + { + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + + /* Abort the UART DMA Tx channel */ + if (huart->hdmatx != NULL) + { + if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) + { + if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + return HAL_TIMEOUT; + } + } + } + + UART_EndTxTransfer(huart); + } + + /* Stop UART DMA Rx request if ongoing */ + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && + (rxstate == HAL_UART_STATE_BUSY_RX)) + { + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + /* Abort the UART DMA Rx channel */ + if (huart->hdmarx != NULL) + { + if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) + { + if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + return HAL_TIMEOUT; + } + } + } + + UART_EndRxTransfer(huart); + } + + return HAL_OK; +} + +/** + * @brief Abort ongoing transfers (blocking mode). + * @param huart UART handle. + * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. + * This procedure performs following operations : + * - Disable UART Interrupts (Tx and Rx) + * - Disable the DMA transfer in the peripheral register (if enabled) + * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) + * - Set handle State to READY + * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) +{ + /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | + USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE); + + /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + } + + /* Abort the UART DMA Tx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) + { + /* Disable the UART DMA Tx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + + /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ + if (huart->hdmatx != NULL) + { + /* Set the UART DMA Abort callback to Null. + No call back execution at end of DMA abort procedure */ + huart->hdmatx->XferAbortCallback = NULL; + + if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) + { + if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + return HAL_TIMEOUT; + } + } + } + } + + /* Abort the UART DMA Rx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + { + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ + if (huart->hdmarx != NULL) + { + /* Set the UART DMA Abort callback to Null. + No call back execution at end of DMA abort procedure */ + huart->hdmarx->XferAbortCallback = NULL; + + if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) + { + if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + return HAL_TIMEOUT; + } + } + } + } + + /* Reset Tx and Rx transfer counters */ + huart->TxXferCount = 0U; + huart->RxXferCount = 0U; + + /* Clear the Error flags in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + + /* Flush the whole TX FIFO (if needed) */ + if (huart->FifoMode == UART_FIFOMODE_ENABLE) + { + __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); + } + + /* Discard the received data */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + + /* Restore huart->gState and huart->RxState to Ready */ + huart->gState = HAL_UART_STATE_READY; + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + huart->ErrorCode = HAL_UART_ERROR_NONE; + + return HAL_OK; +} + +/** + * @brief Abort ongoing Transmit transfer (blocking mode). + * @param huart UART handle. + * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. + * This procedure performs following operations : + * - Disable UART Interrupts (Tx) + * - Disable the DMA transfer in the peripheral register (if enabled) + * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) + * - Set handle State to READY + * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) +{ + /* Disable TCIE, TXEIE and TXFTIE interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + + /* Abort the UART DMA Tx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) + { + /* Disable the UART DMA Tx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + + /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ + if (huart->hdmatx != NULL) + { + /* Set the UART DMA Abort callback to Null. + No call back execution at end of DMA abort procedure */ + huart->hdmatx->XferAbortCallback = NULL; + + if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) + { + if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + return HAL_TIMEOUT; + } + } + } + } + + /* Reset Tx transfer counter */ + huart->TxXferCount = 0U; + + /* Flush the whole TX FIFO (if needed) */ + if (huart->FifoMode == UART_FIFOMODE_ENABLE) + { + __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); + } + + /* Restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; + + return HAL_OK; +} + +/** + * @brief Abort ongoing Receive transfer (blocking mode). + * @param huart UART handle. + * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. + * This procedure performs following operations : + * - Disable UART Interrupts (Rx) + * - Disable the DMA transfer in the peripheral register (if enabled) + * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) + * - Set handle State to READY + * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) +{ + /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE); + + /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + } + + /* Abort the UART DMA Rx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + { + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ + if (huart->hdmarx != NULL) + { + /* Set the UART DMA Abort callback to Null. + No call back execution at end of DMA abort procedure */ + huart->hdmarx->XferAbortCallback = NULL; + + if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) + { + if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + return HAL_TIMEOUT; + } + } + } + } + + /* Reset Rx transfer counter */ + huart->RxXferCount = 0U; + + /* Clear the Error flags in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + + /* Discard the received data */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + + /* Restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + return HAL_OK; +} + +/** + * @brief Abort ongoing transfers (Interrupt mode). + * @param huart UART handle. + * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. + * This procedure performs following operations : + * - Disable UART Interrupts (Tx and Rx) + * - Disable the DMA transfer in the peripheral register (if enabled) + * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) + * - Set handle State to READY + * - At abort completion, call user abort complete callback + * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be + * considered as completed only when user abort complete callback is executed (not when exiting function). + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) +{ + uint32_t abortcplt = 1U; + + /* Disable interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE | + USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE)); + + /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + } + + /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised + before any call to DMA Abort functions */ + /* DMA Tx Handle is valid */ + if (huart->hdmatx != NULL) + { + /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. + Otherwise, set it to NULL */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) + { + huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; + } + else + { + huart->hdmatx->XferAbortCallback = NULL; + } + } + /* DMA Rx Handle is valid */ + if (huart->hdmarx != NULL) + { + /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. + Otherwise, set it to NULL */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + { + huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; + } + else + { + huart->hdmarx->XferAbortCallback = NULL; + } + } + + /* Abort the UART DMA Tx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) + { + /* Disable DMA Tx at UART level */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + + /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ + if (huart->hdmatx != NULL) + { + /* UART Tx DMA Abort callback has already been initialised : + will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ + + /* Abort DMA TX */ + if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) + { + huart->hdmatx->XferAbortCallback = NULL; + } + else + { + abortcplt = 0U; + } + } + } + + /* Abort the UART DMA Rx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + { + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ + if (huart->hdmarx != NULL) + { + /* UART Rx DMA Abort callback has already been initialised : + will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ + + /* Abort DMA RX */ + if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) + { + huart->hdmarx->XferAbortCallback = NULL; + abortcplt = 1U; + } + else + { + abortcplt = 0U; + } + } + } + + /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ + if (abortcplt == 1U) + { + /* Reset Tx and Rx transfer counters */ + huart->TxXferCount = 0U; + huart->RxXferCount = 0U; + + /* Clear ISR function pointers */ + huart->RxISR = NULL; + huart->TxISR = NULL; + + /* Reset errorCode */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + + /* Clear the Error flags in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + + /* Flush the whole TX FIFO (if needed) */ + if (huart->FifoMode == UART_FIFOMODE_ENABLE) + { + __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); + } + + /* Discard the received data */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + + /* Restore huart->gState and huart->RxState to Ready */ + huart->gState = HAL_UART_STATE_READY; + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* As no DMA to be aborted, call directly user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort complete callback */ + huart->AbortCpltCallback(huart); +#else + /* Call legacy weak Abort complete callback */ + HAL_UART_AbortCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + + return HAL_OK; +} + +/** + * @brief Abort ongoing Transmit transfer (Interrupt mode). + * @param huart UART handle. + * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. + * This procedure performs following operations : + * - Disable UART Interrupts (Tx) + * - Disable the DMA transfer in the peripheral register (if enabled) + * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) + * - Set handle State to READY + * - At abort completion, call user abort complete callback + * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be + * considered as completed only when user abort complete callback is executed (not when exiting function). + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) +{ + /* Disable interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + + /* Abort the UART DMA Tx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) + { + /* Disable the UART DMA Tx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + + /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ + if (huart->hdmatx != NULL) + { + /* Set the UART DMA Abort callback : + will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ + huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback; + + /* Abort DMA TX */ + if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) + { + /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */ + huart->hdmatx->XferAbortCallback(huart->hdmatx); + } + } + else + { + /* Reset Tx transfer counter */ + huart->TxXferCount = 0U; + + /* Clear TxISR function pointers */ + huart->TxISR = NULL; + + /* Restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; + + /* As no DMA to be aborted, call directly user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort Transmit Complete Callback */ + huart->AbortTransmitCpltCallback(huart); +#else + /* Call legacy weak Abort Transmit Complete Callback */ + HAL_UART_AbortTransmitCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + } + else + { + /* Reset Tx transfer counter */ + huart->TxXferCount = 0U; + + /* Clear TxISR function pointers */ + huart->TxISR = NULL; + + /* Flush the whole TX FIFO (if needed) */ + if (huart->FifoMode == UART_FIFOMODE_ENABLE) + { + __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); + } + + /* Restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; + + /* As no DMA to be aborted, call directly user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort Transmit Complete Callback */ + huart->AbortTransmitCpltCallback(huart); +#else + /* Call legacy weak Abort Transmit Complete Callback */ + HAL_UART_AbortTransmitCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + + return HAL_OK; +} + +/** + * @brief Abort ongoing Receive transfer (Interrupt mode). + * @param huart UART handle. + * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. + * This procedure performs following operations : + * - Disable UART Interrupts (Rx) + * - Disable the DMA transfer in the peripheral register (if enabled) + * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) + * - Set handle State to READY + * - At abort completion, call user abort complete callback + * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be + * considered as completed only when user abort complete callback is executed (not when exiting function). + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) +{ + /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + + /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + } + + /* Abort the UART DMA Rx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + { + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ + if (huart->hdmarx != NULL) + { + /* Set the UART DMA Abort callback : + will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ + huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback; + + /* Abort DMA RX */ + if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) + { + /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ + huart->hdmarx->XferAbortCallback(huart->hdmarx); + } + } + else + { + /* Reset Rx transfer counter */ + huart->RxXferCount = 0U; + + /* Clear RxISR function pointer */ + huart->pRxBuffPtr = NULL; + + /* Clear the Error flags in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + + /* Discard the received data */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + + /* Restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* As no DMA to be aborted, call directly user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort Receive Complete Callback */ + huart->AbortReceiveCpltCallback(huart); +#else + /* Call legacy weak Abort Receive Complete Callback */ + HAL_UART_AbortReceiveCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + } + else + { + /* Reset Rx transfer counter */ + huart->RxXferCount = 0U; + + /* Clear RxISR function pointer */ + huart->pRxBuffPtr = NULL; + + /* Clear the Error flags in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + + /* Restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* As no DMA to be aborted, call directly user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort Receive Complete Callback */ + huart->AbortReceiveCpltCallback(huart); +#else + /* Call legacy weak Abort Receive Complete Callback */ + HAL_UART_AbortReceiveCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + + return HAL_OK; +} + +/** + * @brief Handle UART interrupt request. + * @param huart UART handle. + * @retval None + */ +void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) +{ + uint32_t isrflags = READ_REG(huart->Instance->ISR); + uint32_t cr1its = READ_REG(huart->Instance->CR1); + uint32_t cr3its = READ_REG(huart->Instance->CR3); + + uint32_t errorflags; + uint32_t errorcode; + + /* If no error occurs */ + errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF)); + if (errorflags == 0U) + { + /* UART in mode Receiver ---------------------------------------------------*/ + if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) + && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) + || ((cr3its & USART_CR3_RXFTIE) != 0U))) + { + if (huart->RxISR != NULL) + { + huart->RxISR(huart); + } + return; + } + } + + /* If some errors occur */ + if ((errorflags != 0U) + && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U) + || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))) + { + /* UART parity error interrupt occurred -------------------------------------*/ + if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); + + huart->ErrorCode |= HAL_UART_ERROR_PE; + } + + /* UART frame error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); + + huart->ErrorCode |= HAL_UART_ERROR_FE; + } + + /* UART noise error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + + huart->ErrorCode |= HAL_UART_ERROR_NE; + } + + /* UART Over-Run interrupt occurred -----------------------------------------*/ + if (((isrflags & USART_ISR_ORE) != 0U) + && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || + ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U))) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); + + huart->ErrorCode |= HAL_UART_ERROR_ORE; + } + + /* UART Receiver Timeout interrupt occurred ---------------------------------*/ + if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); + + huart->ErrorCode |= HAL_UART_ERROR_RTO; + } + + /* Call UART Error Call back function if need be ----------------------------*/ + if (huart->ErrorCode != HAL_UART_ERROR_NONE) + { + /* UART in mode Receiver --------------------------------------------------*/ + if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) + && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) + || ((cr3its & USART_CR3_RXFTIE) != 0U))) + { + if (huart->RxISR != NULL) + { + huart->RxISR(huart); + } + } + + /* If Error is to be considered as blocking : + - Receiver Timeout error in Reception + - Overrun error in Reception + - any error occurs in DMA mode reception + */ + errorcode = huart->ErrorCode; + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) + { + /* Blocking error : transfer is aborted + Set the UART state ready to be able to start again the process, + Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ + UART_EndRxTransfer(huart); + + /* Abort the UART DMA Rx channel if enabled */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + { + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + /* Abort the UART DMA Rx channel */ + if (huart->hdmarx != NULL) + { + /* Set the UART DMA Abort callback : + will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ + huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; + + /* Abort DMA RX */ + if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) + { + /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ + huart->hdmarx->XferAbortCallback(huart->hdmarx); + } + } + else + { + /* Call user error callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + + } + } + else + { + /* Call user error callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + } + else + { + /* Non Blocking error : transfer could go on. + Error is notified to user through user error callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + } + } + return; + + } /* End if some error occurs */ + + /* Check current reception Mode : + If Reception till IDLE event has been selected : */ + if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + && ((isrflags & USART_ISR_IDLE) != 0U) + && ((cr1its & USART_ISR_IDLE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + + /* Check if DMA mode is enabled in UART */ + if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) + { + /* DMA mode enabled */ + /* Check received length : If all expected data are received, do nothing, + (DMA cplt callback will be called). + Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ + uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); + if ((nb_remaining_rx_data > 0U) + && (nb_remaining_rx_data < huart->RxXferSize)) + { + /* Reception is not complete */ + huart->RxXferCount = nb_remaining_rx_data; + + /* In Normal mode, end DMA xfer and HAL UART Rx process*/ + if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) + { + /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + + /* Disable the DMA transfer for the receiver request by resetting the DMAR bit + in the UART CR3 register */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + /* Last bytes received, so no need as the abort is immediate */ + (void)HAL_DMA_Abort(huart->hdmarx); + } + + /* Initialize type of RxEvent that correspond to RxEvent callback execution; + In this case, Rx Event type is Idle Event */ + huart->RxEventType = HAL_UART_RXEVENT_IDLE; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + return; + } + else + { + /* DMA mode not enabled */ + /* Check received length : If all expected data are received, do nothing. + Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ + uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; + if ((huart->RxXferCount > 0U) + && (nb_rx_data > 0U)) + { + /* Disable the UART Parity Error Interrupt and RXNE interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); + + /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + + /* Rx process is completed, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Clear RxISR function pointer */ + huart->RxISR = NULL; + + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + /* Initialize type of RxEvent that correspond to RxEvent callback execution; + In this case, Rx Event type is Idle Event */ + huart->RxEventType = HAL_UART_RXEVENT_IDLE; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx complete callback*/ + huart->RxEventCallback(huart, nb_rx_data); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, nb_rx_data); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + return; + } + } + + /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ + if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); + + /* UART Rx state is not reset as a reception process might be ongoing. + If UART handle state fields need to be reset to READY, this could be done in Wakeup callback */ + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Wakeup Callback */ + huart->WakeupCallback(huart); +#else + /* Call legacy weak Wakeup Callback */ + HAL_UARTEx_WakeupCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + return; + } + + /* UART in mode Transmitter ------------------------------------------------*/ + if (((isrflags & USART_ISR_TXE_TXFNF) != 0U) + && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U) + || ((cr3its & USART_CR3_TXFTIE) != 0U))) + { + if (huart->TxISR != NULL) + { + huart->TxISR(huart); + } + return; + } + + /* UART in mode Transmitter (transmission end) -----------------------------*/ + if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) + { + UART_EndTransmit_IT(huart); + return; + } + + /* UART TX Fifo Empty occurred ----------------------------------------------*/ + if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U)) + { +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Tx Fifo Empty Callback */ + huart->TxFifoEmptyCallback(huart); +#else + /* Call legacy weak Tx Fifo Empty Callback */ + HAL_UARTEx_TxFifoEmptyCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + return; + } + + /* UART RX Fifo Full occurred ----------------------------------------------*/ + if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U)) + { +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Rx Fifo Full Callback */ + huart->RxFifoFullCallback(huart); +#else + /* Call legacy weak Rx Fifo Full Callback */ + HAL_UARTEx_RxFifoFullCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + return; + } +} + +/** + * @brief Tx Transfer completed callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_TxCpltCallback can be implemented in the user file. + */ +} + +/** + * @brief Tx Half Transfer completed callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE: This function should not be modified, when the callback is needed, + the HAL_UART_TxHalfCpltCallback can be implemented in the user file. + */ +} + +/** + * @brief Rx Transfer completed callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_RxCpltCallback can be implemented in the user file. + */ +} + +/** + * @brief Rx Half Transfer completed callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE: This function should not be modified, when the callback is needed, + the HAL_UART_RxHalfCpltCallback can be implemented in the user file. + */ +} + +/** + * @brief UART error callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_ErrorCallback can be implemented in the user file. + */ +} + +/** + * @brief UART Abort Complete callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_AbortCpltCallback can be implemented in the user file. + */ +} + +/** + * @brief UART Abort Complete callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file. + */ +} + +/** + * @brief UART Abort Receive Complete callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file. + */ +} + +/** + * @brief Reception Event Callback (Rx event notification called after use of advanced reception service). + * @param huart UART handle + * @param Size Number of data available in application reception buffer (indicates a position in + * reception buffer until which, data are available) + * @retval None + */ +__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + UNUSED(Size); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UARTEx_RxEventCallback can be implemented in the user file. + */ +} + +/** + * @} + */ + +/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions + * @brief UART control functions + * +@verbatim + =============================================================================== + ##### Peripheral Control functions ##### + =============================================================================== + [..] + This subsection provides a set of functions allowing to control the UART. + (+) HAL_UART_ReceiverTimeout_Config() API allows to configure the receiver timeout value on the fly + (+) HAL_UART_EnableReceiverTimeout() API enables the receiver timeout feature + (+) HAL_UART_DisableReceiverTimeout() API disables the receiver timeout feature + (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode + (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode + (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode + (+) UART_SetConfig() API configures the UART peripheral + (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features + (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization + (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter + (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver + (+) HAL_LIN_SendBreak() API transmits the break characters +@endverbatim + * @{ + */ + +/** + * @brief Update on the fly the receiver timeout value in RTOR register. + * @param huart Pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART module. + * @param TimeoutValue receiver timeout value in number of baud blocks. The timeout + * value must be less or equal to 0x0FFFFFFFF. + * @retval None + */ +void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue) +{ + if (!(IS_LPUART_INSTANCE(huart->Instance))) + { + assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue)); + MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue); + } +} + +/** + * @brief Enable the UART receiver timeout feature. + * @param huart Pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART module. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart) +{ + if (!(IS_LPUART_INSTANCE(huart->Instance))) + { + if (huart->gState == HAL_UART_STATE_READY) + { + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Set the USART RTOEN bit */ + SET_BIT(huart->Instance->CR2, USART_CR2_RTOEN); + + huart->gState = HAL_UART_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; + } + else + { + return HAL_BUSY; + } + } + else + { + return HAL_ERROR; + } +} + +/** + * @brief Disable the UART receiver timeout feature. + * @param huart Pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART module. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart) +{ + if (!(IS_LPUART_INSTANCE(huart->Instance))) + { + if (huart->gState == HAL_UART_STATE_READY) + { + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Clear the USART RTOEN bit */ + CLEAR_BIT(huart->Instance->CR2, USART_CR2_RTOEN); + + huart->gState = HAL_UART_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; + } + else + { + return HAL_BUSY; + } + } + else + { + return HAL_ERROR; + } +} + +/** + * @brief Enable UART in mute mode (does not mean UART enters mute mode; + * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called). + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart) +{ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Enable USART mute mode by setting the MME bit in the CR1 register */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_MME); + + huart->gState = HAL_UART_STATE_READY; + + return (UART_CheckIdleState(huart)); +} + +/** + * @brief Disable UART mute mode (does not mean the UART actually exits mute mode + * as it may not have been in mute mode at this very moment). + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart) +{ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Disable USART mute mode by clearing the MME bit in the CR1 register */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); + + huart->gState = HAL_UART_STATE_READY; + + return (UART_CheckIdleState(huart)); +} + +/** + * @brief Enter UART mute mode (means UART actually enters mute mode). + * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called. + * @param huart UART handle. + * @retval None + */ +void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart) +{ + __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST); +} + +/** + * @brief Enable the UART transmitter and disable the UART receiver. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart) +{ + __HAL_LOCK(huart); + huart->gState = HAL_UART_STATE_BUSY; + + /* Clear TE and RE bits */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); + + /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TE); + + huart->gState = HAL_UART_STATE_READY; + + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief Enable the UART receiver and disable the UART transmitter. + * @param huart UART handle. + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart) +{ + __HAL_LOCK(huart); + huart->gState = HAL_UART_STATE_BUSY; + + /* Clear TE and RE bits */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); + + /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RE); + + huart->gState = HAL_UART_STATE_READY; + + __HAL_UNLOCK(huart); + + return HAL_OK; +} + + +/** + * @brief Transmit break characters. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart) +{ + /* Check the parameters */ + assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); + + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Send break characters */ + __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST); + + huart->gState = HAL_UART_STATE_READY; + + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @} + */ + +/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions + * @brief UART Peripheral State functions + * +@verbatim + ============================================================================== + ##### Peripheral State and Error functions ##### + ============================================================================== + [..] + This subsection provides functions allowing to : + (+) Return the UART handle state. + (+) Return the UART handle error code + +@endverbatim + * @{ + */ + +/** + * @brief Return the UART handle state. + * @param huart Pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART. + * @retval HAL state + */ +HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart) +{ + uint32_t temp1; + uint32_t temp2; + temp1 = huart->gState; + temp2 = huart->RxState; + + return (HAL_UART_StateTypeDef)(temp1 | temp2); +} + +/** + * @brief Return the UART handle error code. + * @param huart Pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART. + * @retval UART Error Code + */ +uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart) +{ + return huart->ErrorCode; +} +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup UART_Private_Functions UART Private Functions + * @{ + */ + +/** + * @brief Initialize the callbacks to their default values. + * @param huart UART handle. + * @retval none + */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart) +{ + /* Init the UART Callback settings */ + huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ + huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */ + huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ + huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */ + huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ + huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ + huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */ + huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */ + huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */ + huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */ + huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */ + huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */ + +} +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + +/** + * @brief Configure the UART peripheral. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) +{ + uint32_t tmpreg; + uint16_t brrtemp; + UART_ClockSourceTypeDef clocksource; + uint32_t usartdiv; + HAL_StatusTypeDef ret = HAL_OK; + uint32_t lpuart_ker_ck_pres; + uint32_t pclk; + + /* Check the parameters */ + assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate)); + assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); + if (UART_INSTANCE_LOWPOWER(huart)) + { + assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits)); + } + else + { + assert_param(IS_UART_STOPBITS(huart->Init.StopBits)); + assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling)); + } + + assert_param(IS_UART_PARITY(huart->Init.Parity)); + assert_param(IS_UART_MODE(huart->Init.Mode)); + assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl)); + assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); + assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler)); + + /*-------------------------- USART CR1 Configuration -----------------------*/ + /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure + * the UART Word Length, Parity, Mode and oversampling: + * set the M bits according to huart->Init.WordLength value + * set PCE and PS bits according to huart->Init.Parity value + * set TE and RE bits according to huart->Init.Mode value + * set OVER8 bit according to huart->Init.OverSampling value */ + tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; + MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + + /*-------------------------- USART CR2 Configuration -----------------------*/ + /* Configure the UART Stop Bits: Set STOP[13:12] bits according + * to huart->Init.StopBits value */ + MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); + + /*-------------------------- USART CR3 Configuration -----------------------*/ + /* Configure + * - UART HardWare Flow Control: set CTSE and RTSE bits according + * to huart->Init.HwFlowCtl value + * - one-bit sampling method versus three samples' majority rule according + * to huart->Init.OneBitSampling (not applicable to LPUART) */ + tmpreg = (uint32_t)huart->Init.HwFlowCtl; + + if (!(UART_INSTANCE_LOWPOWER(huart))) + { + tmpreg |= huart->Init.OneBitSampling; + } + MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); + + /*-------------------------- USART PRESC Configuration -----------------------*/ + /* Configure + * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ + MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); + + /*-------------------------- USART BRR Configuration -----------------------*/ + UART_GETCLOCKSOURCE(huart, clocksource); + + /* Check LPUART instance */ + if (UART_INSTANCE_LOWPOWER(huart)) + { + /* Retrieve frequency clock */ + switch (clocksource) + { + case UART_CLOCKSOURCE_PCLK1: + pclk = HAL_RCC_GetPCLK1Freq(); + break; + case UART_CLOCKSOURCE_HSI: + pclk = (uint32_t) HSI_VALUE; + break; + case UART_CLOCKSOURCE_SYSCLK: + pclk = HAL_RCC_GetSysClockFreq(); + break; + case UART_CLOCKSOURCE_LSE: + pclk = (uint32_t) LSE_VALUE; + break; + default: + pclk = 0U; + ret = HAL_ERROR; + break; + } + + /* If proper clock source reported */ + if (pclk != 0U) + { + /* Compute clock after Prescaler */ + lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]); + + /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ + if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) || + (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate))) + { + ret = HAL_ERROR; + } + else + { + /* Check computed UsartDiv value is in allocated range + (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */ + usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); + if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) + { + huart->Instance->BRR = usartdiv; + } + else + { + ret = HAL_ERROR; + } + } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || + (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */ + } /* if (pclk != 0) */ + } + /* Check UART Over Sampling to set Baud Rate Register */ + else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) + { + switch (clocksource) + { + case UART_CLOCKSOURCE_PCLK1: + pclk = HAL_RCC_GetPCLK1Freq(); + break; + case UART_CLOCKSOURCE_HSI: + pclk = (uint32_t) HSI_VALUE; + break; + case UART_CLOCKSOURCE_SYSCLK: + pclk = HAL_RCC_GetSysClockFreq(); + break; + case UART_CLOCKSOURCE_LSE: + pclk = (uint32_t) LSE_VALUE; + break; + default: + pclk = 0U; + ret = HAL_ERROR; + break; + } + + /* USARTDIV must be greater than or equal to 0d16 */ + if (pclk != 0U) + { + usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); + if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + { + brrtemp = (uint16_t)(usartdiv & 0xFFF0U); + brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); + huart->Instance->BRR = brrtemp; + } + else + { + ret = HAL_ERROR; + } + } + } + else + { + switch (clocksource) + { + case UART_CLOCKSOURCE_PCLK1: + pclk = HAL_RCC_GetPCLK1Freq(); + break; + case UART_CLOCKSOURCE_HSI: + pclk = (uint32_t) HSI_VALUE; + break; + case UART_CLOCKSOURCE_SYSCLK: + pclk = HAL_RCC_GetSysClockFreq(); + break; + case UART_CLOCKSOURCE_LSE: + pclk = (uint32_t) LSE_VALUE; + break; + default: + pclk = 0U; + ret = HAL_ERROR; + break; + } + + if (pclk != 0U) + { + /* USARTDIV must be greater than or equal to 0d16 */ + usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); + if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + { + huart->Instance->BRR = (uint16_t)usartdiv; + } + else + { + ret = HAL_ERROR; + } + } + } + + /* Initialize the number of data to process during RX/TX ISR execution */ + huart->NbTxDataToProcess = 1; + huart->NbRxDataToProcess = 1; + + /* Clear ISR function pointers */ + huart->RxISR = NULL; + huart->TxISR = NULL; + + return ret; +} + +/** + * @brief Configure the UART peripheral advanced features. + * @param huart UART handle. + * @retval None + */ +void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) +{ + /* Check whether the set of advanced features to configure is properly set */ + assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); + + /* if required, configure TX pin active level inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) + { + assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); + } + + /* if required, configure RX pin active level inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) + { + assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); + } + + /* if required, configure data inversion */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) + { + assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); + } + + /* if required, configure RX/TX pins swap */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) + { + assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); + } + + /* if required, configure RX overrun detection disabling */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) + { + assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); + MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); + } + + /* if required, configure DMA disabling on reception error */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) + { + assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); + MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); + } + + /* if required, configure auto Baud rate detection scheme */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) + { + assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); + assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); + /* set auto Baudrate detection parameters if detection is enabled */ + if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) + { + assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); + } + } + + /* if required, configure MSB first on communication line */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) + { + assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); + } +} + +/** + * @brief Check the UART Idle State. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) +{ + uint32_t tickstart; + + /* Initialize the UART ErrorCode */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + + /* Init tickstart for timeout management */ + tickstart = HAL_GetTick(); + + /* Check if the Transmitter is enabled */ + if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) + { + /* Wait until TEACK flag is set */ + if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) + { + /* Timeout occurred */ + return HAL_TIMEOUT; + } + } + + /* Check if the Receiver is enabled */ + if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) + { + /* Wait until REACK flag is set */ + if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) + { + /* Timeout occurred */ + return HAL_TIMEOUT; + } + } + + /* Initialize the UART State */ + huart->gState = HAL_UART_STATE_READY; + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + huart->RxEventType = HAL_UART_RXEVENT_TC; + + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief This function handles UART Communication Timeout. It waits + * until a flag is no longer in the specified status. + * @param huart UART handle. + * @param Flag Specifies the UART flag to check + * @param Status The actual Flag status (SET or RESET) + * @param Tickstart Tick start value + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, + uint32_t Tickstart, uint32_t Timeout) +{ + /* Wait until flag is set */ + while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) + { + /* Check for the Timeout */ + if (Timeout != HAL_MAX_DELAY) + { + if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + { + /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) + interrupts for the interrupt process */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | + USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + + huart->gState = HAL_UART_STATE_READY; + huart->RxState = HAL_UART_STATE_READY; + + __HAL_UNLOCK(huart); + + return HAL_TIMEOUT; + } + + if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) + { + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) + { + /* Clear Receiver Timeout flag*/ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); + + /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) + interrupts for the interrupt process */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | + USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + + huart->gState = HAL_UART_STATE_READY; + huart->RxState = HAL_UART_STATE_READY; + huart->ErrorCode = HAL_UART_ERROR_RTO; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_TIMEOUT; + } + } + } + } + return HAL_OK; +} + +/** + * @brief Start Receive operation in interrupt mode. + * @note This function could be called by all HAL UART API providing reception in Interrupt mode. + * @note When calling this function, parameters validity is considered as already checked, + * i.e. Rx State, buffer address, ... + * UART Handle is assumed as Locked. + * @param huart UART handle. + * @param pData Pointer to data buffer (u8 or u16 data elements). + * @param Size Amount of data elements (u8 or u16) to be received. + * @retval HAL status + */ +HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +{ + huart->pRxBuffPtr = pData; + huart->RxXferSize = Size; + huart->RxXferCount = Size; + huart->RxISR = NULL; + + /* Computation of UART mask to apply to RDR register */ + UART_MASK_COMPUTATION(huart); + + huart->ErrorCode = HAL_UART_ERROR_NONE; + huart->RxState = HAL_UART_STATE_BUSY_RX; + + /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); + + /* Configure Rx interrupt processing */ + if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess)) + { + /* Set the Rx ISR function pointer according to the data word length */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + huart->RxISR = UART_RxISR_16BIT_FIFOEN; + } + else + { + huart->RxISR = UART_RxISR_8BIT_FIFOEN; + } + + /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */ + if (huart->Init.Parity != UART_PARITY_NONE) + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); + } + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); + } + else + { + /* Set the Rx ISR function pointer according to the data word length */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + huart->RxISR = UART_RxISR_16BIT; + } + else + { + huart->RxISR = UART_RxISR_8BIT; + } + + /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ + if (huart->Init.Parity != UART_PARITY_NONE) + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + } + else + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + } + } + return HAL_OK; +} + +/** + * @brief Start Receive operation in DMA mode. + * @note This function could be called by all HAL UART API providing reception in DMA mode. + * @note When calling this function, parameters validity is considered as already checked, + * i.e. Rx State, buffer address, ... + * UART Handle is assumed as Locked. + * @param huart UART handle. + * @param pData Pointer to data buffer (u8 or u16 data elements). + * @param Size Amount of data elements (u8 or u16) to be received. + * @retval HAL status + */ +HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +{ + huart->pRxBuffPtr = pData; + huart->RxXferSize = Size; + + huart->ErrorCode = HAL_UART_ERROR_NONE; + huart->RxState = HAL_UART_STATE_BUSY_RX; + + if (huart->hdmarx != NULL) + { + /* Set the UART DMA transfer complete callback */ + huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; + + /* Set the UART DMA Half transfer complete callback */ + huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; + + /* Set the DMA error callback */ + huart->hdmarx->XferErrorCallback = UART_DMAError; + + /* Set the DMA abort callback */ + huart->hdmarx->XferAbortCallback = NULL; + + /* Enable the DMA channel */ + if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK) + { + /* Set error code to DMA */ + huart->ErrorCode = HAL_UART_ERROR_DMA; + + /* Restore huart->RxState to ready */ + huart->RxState = HAL_UART_STATE_READY; + + return HAL_ERROR; + } + } + + /* Enable the UART Parity Error Interrupt */ + if (huart->Init.Parity != UART_PARITY_NONE) + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); + } + + /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); + + /* Enable the DMA transfer for the receiver request by setting the DMAR bit + in the UART CR3 register */ + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + return HAL_OK; +} + + +/** + * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). + * @param huart UART handle. + * @retval None + */ +static void UART_EndTxTransfer(UART_HandleTypeDef *huart) +{ + /* Disable TXEIE, TCIE, TXFT interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE)); + + /* At end of Tx process, restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; +} + + +/** + * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). + * @param huart UART handle. + * @retval None + */ +static void UART_EndRxTransfer(UART_HandleTypeDef *huart) +{ + /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + + /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + } + + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Reset RxIsr function pointer */ + huart->RxISR = NULL; +} + + +/** + * @brief DMA UART transmit process complete callback. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + + /* DMA Normal mode */ + if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) + { + huart->TxXferCount = 0U; + + /* Disable the DMA transfer for transmit request by resetting the DMAT bit + in the UART CR3 register */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + + /* Enable the UART Transmit Complete Interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + } + /* DMA Circular mode */ + else + { +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Tx complete callback*/ + huart->TxCpltCallback(huart); +#else + /*Call legacy weak Tx complete callback*/ + HAL_UART_TxCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } +} + +/** + * @brief DMA UART transmit process half complete callback. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Tx Half complete callback*/ + huart->TxHalfCpltCallback(huart); +#else + /*Call legacy weak Tx Half complete callback*/ + HAL_UART_TxHalfCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + +/** + * @brief DMA UART receive process complete callback. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + + /* DMA Normal mode */ + if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) + { + huart->RxXferCount = 0U; + + /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + + /* Disable the DMA transfer for the receiver request by resetting the DMAR bit + in the UART CR3 register */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + + /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + } + } + + /* Initialize type of RxEvent that correspond to RxEvent callback execution; + In this case, Rx Event type is Transfer Complete */ + huart->RxEventType = HAL_UART_RXEVENT_TC; + + /* Check current reception Mode : + If Reception till IDLE event has been selected : use Rx Event callback */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + else + { + /* In other cases : use Rx Complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx complete callback*/ + huart->RxCpltCallback(huart); +#else + /*Call legacy weak Rx complete callback*/ + HAL_UART_RxCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } +} + +/** + * @brief DMA UART receive process half complete callback. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + + /* Initialize type of RxEvent that correspond to RxEvent callback execution; + In this case, Rx Event type is Half Transfer */ + huart->RxEventType = HAL_UART_RXEVENT_HT; + + /* Check current reception Mode : + If Reception till IDLE event has been selected : use Rx Event callback */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize / 2U); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + else + { + /* In other cases : use Rx Half Complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Half complete callback*/ + huart->RxHalfCpltCallback(huart); +#else + /*Call legacy weak Rx Half complete callback*/ + HAL_UART_RxHalfCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } +} + +/** + * @brief DMA UART communication error callback. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMAError(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + + const HAL_UART_StateTypeDef gstate = huart->gState; + const HAL_UART_StateTypeDef rxstate = huart->RxState; + + /* Stop UART DMA Tx request if ongoing */ + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && + (gstate == HAL_UART_STATE_BUSY_TX)) + { + huart->TxXferCount = 0U; + UART_EndTxTransfer(huart); + } + + /* Stop UART DMA Rx request if ongoing */ + if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && + (rxstate == HAL_UART_STATE_BUSY_RX)) + { + huart->RxXferCount = 0U; + UART_EndRxTransfer(huart); + } + + huart->ErrorCode |= HAL_UART_ERROR_DMA; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + +/** + * @brief DMA UART communication abort callback, when initiated by HAL services on Error + * (To be called at end of DMA Abort procedure following error occurrence). + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + huart->RxXferCount = 0U; + huart->TxXferCount = 0U; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + +/** + * @brief DMA UART Tx communication abort callback, when initiated by user + * (To be called at end of DMA Tx Abort procedure following user abort request). + * @note When this callback is executed, User Abort complete call back is called only if no + * Abort still ongoing for Rx DMA Handle. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + + huart->hdmatx->XferAbortCallback = NULL; + + /* Check if an Abort process is still ongoing */ + if (huart->hdmarx != NULL) + { + if (huart->hdmarx->XferAbortCallback != NULL) + { + return; + } + } + + /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ + huart->TxXferCount = 0U; + huart->RxXferCount = 0U; + + /* Reset errorCode */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + + /* Clear the Error flags in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + + /* Flush the whole TX FIFO (if needed) */ + if (huart->FifoMode == UART_FIFOMODE_ENABLE) + { + __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); + } + + /* Restore huart->gState and huart->RxState to Ready */ + huart->gState = HAL_UART_STATE_READY; + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Call user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort complete callback */ + huart->AbortCpltCallback(huart); +#else + /* Call legacy weak Abort complete callback */ + HAL_UART_AbortCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + + +/** + * @brief DMA UART Rx communication abort callback, when initiated by user + * (To be called at end of DMA Rx Abort procedure following user abort request). + * @note When this callback is executed, User Abort complete call back is called only if no + * Abort still ongoing for Tx DMA Handle. + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + + huart->hdmarx->XferAbortCallback = NULL; + + /* Check if an Abort process is still ongoing */ + if (huart->hdmatx != NULL) + { + if (huart->hdmatx->XferAbortCallback != NULL) + { + return; + } + } + + /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ + huart->TxXferCount = 0U; + huart->RxXferCount = 0U; + + /* Reset errorCode */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + + /* Clear the Error flags in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + + /* Discard the received data */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + + /* Restore huart->gState and huart->RxState to Ready */ + huart->gState = HAL_UART_STATE_READY; + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Call user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort complete callback */ + huart->AbortCpltCallback(huart); +#else + /* Call legacy weak Abort complete callback */ + HAL_UART_AbortCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + + +/** + * @brief DMA UART Tx communication abort callback, when initiated by user by a call to + * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer) + * (This callback is executed at end of DMA Tx Abort procedure following user abort request, + * and leads to user Tx Abort Complete callback execution). + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + + huart->TxXferCount = 0U; + + /* Flush the whole TX FIFO (if needed) */ + if (huart->FifoMode == UART_FIFOMODE_ENABLE) + { + __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); + } + + /* Restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; + + /* Call user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort Transmit Complete Callback */ + huart->AbortTransmitCpltCallback(huart); +#else + /* Call legacy weak Abort Transmit Complete Callback */ + HAL_UART_AbortTransmitCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + +/** + * @brief DMA UART Rx communication abort callback, when initiated by user by a call to + * HAL_UART_AbortReceive_IT API (Abort only Rx transfer) + * (This callback is executed at end of DMA Rx Abort procedure following user abort request, + * and leads to user Rx Abort Complete callback execution). + * @param hdma DMA handle. + * @retval None + */ +static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma) +{ + UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + + huart->RxXferCount = 0U; + + /* Clear the Error flags in the ICR register */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); + + /* Discard the received data */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + + /* Restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Call user Abort complete callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /* Call registered Abort Receive Complete Callback */ + huart->AbortReceiveCpltCallback(huart); +#else + /* Call legacy weak Abort Receive Complete Callback */ + HAL_UART_AbortReceiveCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + +/** + * @brief TX interrupt handler for 7 or 8 bits data word length . + * @note Function is called under interruption only, once + * interruptions have been enabled by HAL_UART_Transmit_IT(). + * @param huart UART handle. + * @retval None + */ +static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) +{ + /* Check that a Tx process is ongoing */ + if (huart->gState == HAL_UART_STATE_BUSY_TX) + { + if (huart->TxXferCount == 0U) + { + /* Disable the UART Transmit Data Register Empty Interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); + + /* Enable the UART Transmit Complete Interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + } + else + { + huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); + huart->pTxBuffPtr++; + huart->TxXferCount--; + } + } +} + +/** + * @brief TX interrupt handler for 9 bits data word length. + * @note Function is called under interruption only, once + * interruptions have been enabled by HAL_UART_Transmit_IT(). + * @param huart UART handle. + * @retval None + */ +static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) +{ + const uint16_t *tmp; + + /* Check that a Tx process is ongoing */ + if (huart->gState == HAL_UART_STATE_BUSY_TX) + { + if (huart->TxXferCount == 0U) + { + /* Disable the UART Transmit Data Register Empty Interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); + + /* Enable the UART Transmit Complete Interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + } + else + { + tmp = (const uint16_t *) huart->pTxBuffPtr; + huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); + huart->pTxBuffPtr += 2U; + huart->TxXferCount--; + } + } +} + +/** + * @brief TX interrupt handler for 7 or 8 bits data word length and FIFO mode is enabled. + * @note Function is called under interruption only, once + * interruptions have been enabled by HAL_UART_Transmit_IT(). + * @param huart UART handle. + * @retval None + */ +static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) +{ + uint16_t nb_tx_data; + + /* Check that a Tx process is ongoing */ + if (huart->gState == HAL_UART_STATE_BUSY_TX) + { + for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--) + { + if (huart->TxXferCount == 0U) + { + /* Disable the TX FIFO threshold interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + + /* Enable the UART Transmit Complete Interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + + break; /* force exit loop */ + } + else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U) + { + huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); + huart->pTxBuffPtr++; + huart->TxXferCount--; + } + else + { + /* Nothing to do */ + } + } + } +} + +/** + * @brief TX interrupt handler for 9 bits data word length and FIFO mode is enabled. + * @note Function is called under interruption only, once + * interruptions have been enabled by HAL_UART_Transmit_IT(). + * @param huart UART handle. + * @retval None + */ +static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) +{ + const uint16_t *tmp; + uint16_t nb_tx_data; + + /* Check that a Tx process is ongoing */ + if (huart->gState == HAL_UART_STATE_BUSY_TX) + { + for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--) + { + if (huart->TxXferCount == 0U) + { + /* Disable the TX FIFO threshold interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + + /* Enable the UART Transmit Complete Interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + + break; /* force exit loop */ + } + else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U) + { + tmp = (const uint16_t *) huart->pTxBuffPtr; + huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); + huart->pTxBuffPtr += 2U; + huart->TxXferCount--; + } + else + { + /* Nothing to do */ + } + } + } +} + +/** + * @brief Wrap up transmission in non-blocking mode. + * @param huart pointer to a UART_HandleTypeDef structure that contains + * the configuration information for the specified UART module. + * @retval None + */ +static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) +{ + /* Disable the UART Transmit Complete Interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); + + /* Tx process is ended, restore huart->gState to Ready */ + huart->gState = HAL_UART_STATE_READY; + + /* Cleat TxISR function pointer */ + huart->TxISR = NULL; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Tx complete callback*/ + huart->TxCpltCallback(huart); +#else + /*Call legacy weak Tx complete callback*/ + HAL_UART_TxCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +} + +/** + * @brief RX interrupt handler for 7 or 8 bits data word length . + * @param huart UART handle. + * @retval None + */ +static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) +{ + uint16_t uhMask = huart->Mask; + uint16_t uhdata; + + /* Check that a Rx process is ongoing */ + if (huart->RxState == HAL_UART_STATE_BUSY_RX) + { + uhdata = (uint16_t) READ_REG(huart->Instance->RDR); + *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); + huart->pRxBuffPtr++; + huart->RxXferCount--; + + if (huart->RxXferCount == 0U) + { + /* Disable the UART Parity Error Interrupt and RXNE interrupts */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); + + /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + + /* Rx process is completed, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + + /* Clear RxISR function pointer */ + huart->RxISR = NULL; + + /* Initialize type of RxEvent to Transfer Complete */ + huart->RxEventType = HAL_UART_RXEVENT_TC; + + /* Check current reception Mode : + If Reception till IDLE event has been selected : */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + /* Set reception type to Standard */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Disable IDLE interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) + { + /* Clear IDLE Flag */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + } + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + else + { + /* Standard reception API called */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx complete callback*/ + huart->RxCpltCallback(huart); +#else + /*Call legacy weak Rx complete callback*/ + HAL_UART_RxCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + } + } + else + { + /* Clear RXNE interrupt flag */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + } +} + +/** + * @brief RX interrupt handler for 9 bits data word length . + * @note Function is called under interruption only, once + * interruptions have been enabled by HAL_UART_Receive_IT() + * @param huart UART handle. + * @retval None + */ +static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) +{ + uint16_t *tmp; + uint16_t uhMask = huart->Mask; + uint16_t uhdata; + + /* Check that a Rx process is ongoing */ + if (huart->RxState == HAL_UART_STATE_BUSY_RX) + { + uhdata = (uint16_t) READ_REG(huart->Instance->RDR); + tmp = (uint16_t *) huart->pRxBuffPtr ; + *tmp = (uint16_t)(uhdata & uhMask); + huart->pRxBuffPtr += 2U; + huart->RxXferCount--; + + if (huart->RxXferCount == 0U) + { + /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); + + /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + + /* Rx process is completed, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + + /* Clear RxISR function pointer */ + huart->RxISR = NULL; + + /* Initialize type of RxEvent to Transfer Complete */ + huart->RxEventType = HAL_UART_RXEVENT_TC; + + /* Check current reception Mode : + If Reception till IDLE event has been selected : */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + /* Set reception type to Standard */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Disable IDLE interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) + { + /* Clear IDLE Flag */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + } + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + else + { + /* Standard reception API called */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx complete callback*/ + huart->RxCpltCallback(huart); +#else + /*Call legacy weak Rx complete callback*/ + HAL_UART_RxCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + } + } + else + { + /* Clear RXNE interrupt flag */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + } +} + +/** + * @brief RX interrupt handler for 7 or 8 bits data word length and FIFO mode is enabled. + * @note Function is called under interruption only, once + * interruptions have been enabled by HAL_UART_Receive_IT() + * @param huart UART handle. + * @retval None + */ +static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) +{ + uint16_t uhMask = huart->Mask; + uint16_t uhdata; + uint16_t nb_rx_data; + uint16_t rxdatacount; + uint32_t isrflags = READ_REG(huart->Instance->ISR); + uint32_t cr1its = READ_REG(huart->Instance->CR1); + uint32_t cr3its = READ_REG(huart->Instance->CR3); + + /* Check that a Rx process is ongoing */ + if (huart->RxState == HAL_UART_STATE_BUSY_RX) + { + nb_rx_data = huart->NbRxDataToProcess; + while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) + { + uhdata = (uint16_t) READ_REG(huart->Instance->RDR); + *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); + huart->pRxBuffPtr++; + huart->RxXferCount--; + isrflags = READ_REG(huart->Instance->ISR); + + /* If some non blocking errors occurred */ + if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U) + { + /* UART parity error interrupt occurred -------------------------------------*/ + if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); + + huart->ErrorCode |= HAL_UART_ERROR_PE; + } + + /* UART frame error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); + + huart->ErrorCode |= HAL_UART_ERROR_FE; + } + + /* UART noise error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + + huart->ErrorCode |= HAL_UART_ERROR_NE; + } + + /* Call UART Error Call back function if need be ----------------------------*/ + if (huart->ErrorCode != HAL_UART_ERROR_NONE) + { + /* Non Blocking error : transfer could go on. + Error is notified to user through user error callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + } + } + + if (huart->RxXferCount == 0U) + { + /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + + /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) + and RX FIFO Threshold interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + + /* Rx process is completed, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + + /* Clear RxISR function pointer */ + huart->RxISR = NULL; + + /* Initialize type of RxEvent to Transfer Complete */ + huart->RxEventType = HAL_UART_RXEVENT_TC; + + /* Check current reception Mode : + If Reception till IDLE event has been selected : */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + /* Set reception type to Standard */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Disable IDLE interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) + { + /* Clear IDLE Flag */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + } + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + else + { + /* Standard reception API called */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx complete callback*/ + huart->RxCpltCallback(huart); +#else + /*Call legacy weak Rx complete callback*/ + HAL_UART_RxCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + } + } + + /* When remaining number of bytes to receive is less than the RX FIFO + threshold, next incoming frames are processed as if FIFO mode was + disabled (i.e. one interrupt per received frame). + */ + rxdatacount = huart->RxXferCount; + if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess)) + { + /* Disable the UART RXFT interrupt*/ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); + + /* Update the RxISR function pointer */ + huart->RxISR = UART_RxISR_8BIT; + + /* Enable the UART Data Register Not Empty interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + } + } + else + { + /* Clear RXNE interrupt flag */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + } +} + +/** + * @brief RX interrupt handler for 9 bits data word length and FIFO mode is enabled. + * @note Function is called under interruption only, once + * interruptions have been enabled by HAL_UART_Receive_IT() + * @param huart UART handle. + * @retval None + */ +static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) +{ + uint16_t *tmp; + uint16_t uhMask = huart->Mask; + uint16_t uhdata; + uint16_t nb_rx_data; + uint16_t rxdatacount; + uint32_t isrflags = READ_REG(huart->Instance->ISR); + uint32_t cr1its = READ_REG(huart->Instance->CR1); + uint32_t cr3its = READ_REG(huart->Instance->CR3); + + /* Check that a Rx process is ongoing */ + if (huart->RxState == HAL_UART_STATE_BUSY_RX) + { + nb_rx_data = huart->NbRxDataToProcess; + while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) + { + uhdata = (uint16_t) READ_REG(huart->Instance->RDR); + tmp = (uint16_t *) huart->pRxBuffPtr ; + *tmp = (uint16_t)(uhdata & uhMask); + huart->pRxBuffPtr += 2U; + huart->RxXferCount--; + isrflags = READ_REG(huart->Instance->ISR); + + /* If some non blocking errors occurred */ + if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U) + { + /* UART parity error interrupt occurred -------------------------------------*/ + if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); + + huart->ErrorCode |= HAL_UART_ERROR_PE; + } + + /* UART frame error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); + + huart->ErrorCode |= HAL_UART_ERROR_FE; + } + + /* UART noise error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + + huart->ErrorCode |= HAL_UART_ERROR_NE; + } + + /* Call UART Error Call back function if need be ----------------------------*/ + if (huart->ErrorCode != HAL_UART_ERROR_NONE) + { + /* Non Blocking error : transfer could go on. + Error is notified to user through user error callback */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered error callback*/ + huart->ErrorCallback(huart); +#else + /*Call legacy weak error callback*/ + HAL_UART_ErrorCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + huart->ErrorCode = HAL_UART_ERROR_NONE; + } + } + + if (huart->RxXferCount == 0U) + { + /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + + /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) + and RX FIFO Threshold interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + + /* Rx process is completed, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + + /* Clear RxISR function pointer */ + huart->RxISR = NULL; + + /* Initialize type of RxEvent to Transfer Complete */ + huart->RxEventType = HAL_UART_RXEVENT_TC; + + /* Check current reception Mode : + If Reception till IDLE event has been selected : */ + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + /* Set reception type to Standard */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + + /* Disable IDLE interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) + { + /* Clear IDLE Flag */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + } + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx Event callback*/ + huart->RxEventCallback(huart, huart->RxXferSize); +#else + /*Call legacy weak Rx Event callback*/ + HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + else + { + /* Standard reception API called */ +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + /*Call registered Rx complete callback*/ + huart->RxCpltCallback(huart); +#else + /*Call legacy weak Rx complete callback*/ + HAL_UART_RxCpltCallback(huart); +#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + } + } + } + + /* When remaining number of bytes to receive is less than the RX FIFO + threshold, next incoming frames are processed as if FIFO mode was + disabled (i.e. one interrupt per received frame). + */ + rxdatacount = huart->RxXferCount; + if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess)) + { + /* Disable the UART RXFT interrupt*/ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); + + /* Update the RxISR function pointer */ + huart->RxISR = UART_RxISR_16BIT; + + /* Enable the UART Data Register Not Empty interrupt */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + } + } + else + { + /* Clear RXNE interrupt flag */ + __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + } +} + +/** + * @} + */ + +#endif /* HAL_UART_MODULE_ENABLED */ +/** + * @} + */ + +/** + * @} + */ + diff --git a/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c new file mode 100644 index 0000000..e40c2e6 --- /dev/null +++ b/firmware/PCB-Heater/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c @@ -0,0 +1,1092 @@ +/** + ****************************************************************************** + * @file stm32g0xx_hal_uart_ex.c + * @author MCD Application Team + * @brief Extended UART HAL module driver. + * This file provides firmware functions to manage the following extended + * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). + * + Initialization and de-initialization functions + * + Peripheral Control functions + * + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim + ============================================================================== + ##### UART peripheral extended features ##### + ============================================================================== + + (#) Declare a UART_HandleTypeDef handle structure. + + (#) For the UART RS485 Driver Enable mode, initialize the UART registers + by calling the HAL_RS485Ex_Init() API. + + (#) FIFO mode enabling/disabling and RX/TX FIFO threshold programming. + + -@- When UART operates in FIFO mode, FIFO mode must be enabled prior + starting RX/TX transfers. Also RX/TX FIFO thresholds must be + configured prior starting RX/TX transfers. + + @endverbatim + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g0xx_hal.h" + +/** @addtogroup STM32G0xx_HAL_Driver + * @{ + */ + +/** @defgroup UARTEx UARTEx + * @brief UART Extended HAL module driver + * @{ + */ + +#ifdef HAL_UART_MODULE_ENABLED + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/** @defgroup UARTEX_Private_Constants UARTEx Private Constants + * @{ + */ +/* UART RX FIFO depth */ +#define RX_FIFO_DEPTH 8U + +/* UART TX FIFO depth */ +#define TX_FIFO_DEPTH 8U +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup UARTEx_Private_Functions UARTEx Private Functions + * @{ + */ +static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); +static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart); +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions + * @{ + */ + +/** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions + * @brief Extended Initialization and Configuration Functions + * +@verbatim +=============================================================================== + ##### Initialization and Configuration functions ##### + =============================================================================== + [..] + This subsection provides a set of functions allowing to initialize the USARTx or the UARTy + in asynchronous mode. + (+) For the asynchronous mode the parameters below can be configured: + (++) Baud Rate + (++) Word Length + (++) Stop Bit + (++) Parity: If the parity is enabled, then the MSB bit of the data written + in the data register is transmitted but is changed by the parity bit. + (++) Hardware flow control + (++) Receiver/transmitter modes + (++) Over Sampling Method + (++) One-Bit Sampling Method + (+) For the asynchronous mode, the following advanced features can be configured as well: + (++) TX and/or RX pin level inversion + (++) data logical level inversion + (++) RX and TX pins swap + (++) RX overrun detection disabling + (++) DMA disabling on RX error + (++) MSB first on communication line + (++) auto Baud rate detection + [..] + The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration + procedures (details for the procedures are available in reference manual). + +@endverbatim + + Depending on the frame length defined by the M1 and M0 bits (7-bit, + 8-bit or 9-bit), the possible UART formats are listed in the + following table. + + Table 1. UART frame format. + +-----------------------------------------------------------------------+ + | M1 bit | M0 bit | PCE bit | UART frame | + |---------|---------|-----------|---------------------------------------| + | 0 | 0 | 0 | | SB | 8 bit data | STB | | + |---------|---------|-----------|---------------------------------------| + | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | + |---------|---------|-----------|---------------------------------------| + | 0 | 1 | 0 | | SB | 9 bit data | STB | | + |---------|---------|-----------|---------------------------------------| + | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | + |---------|---------|-----------|---------------------------------------| + | 1 | 0 | 0 | | SB | 7 bit data | STB | | + |---------|---------|-----------|---------------------------------------| + | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | + +-----------------------------------------------------------------------+ + + * @{ + */ + +/** + * @brief Initialize the RS485 Driver enable feature according to the specified + * parameters in the UART_InitTypeDef and creates the associated handle. + * @param huart UART handle. + * @param Polarity Select the driver enable polarity. + * This parameter can be one of the following values: + * @arg @ref UART_DE_POLARITY_HIGH DE signal is active high + * @arg @ref UART_DE_POLARITY_LOW DE signal is active low + * @param AssertionTime Driver Enable assertion time: + * 5-bit value defining the time between the activation of the DE (Driver Enable) + * signal and the beginning of the start bit. It is expressed in sample time + * units (1/8 or 1/16 bit time, depending on the oversampling rate) + * @param DeassertionTime Driver Enable deassertion time: + * 5-bit value defining the time between the end of the last stop bit, in a + * transmitted message, and the de-activation of the DE (Driver Enable) signal. + * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the + * oversampling rate). + * @retval HAL status + */ +HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, + uint32_t DeassertionTime) +{ + uint32_t temp; + + /* Check the UART handle allocation */ + if (huart == NULL) + { + return HAL_ERROR; + } + /* Check the Driver Enable UART instance */ + assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance)); + + /* Check the Driver Enable polarity */ + assert_param(IS_UART_DE_POLARITY(Polarity)); + + /* Check the Driver Enable assertion time */ + assert_param(IS_UART_ASSERTIONTIME(AssertionTime)); + + /* Check the Driver Enable deassertion time */ + assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime)); + + if (huart->gState == HAL_UART_STATE_RESET) + { + /* Allocate lock resource and initialize it */ + huart->Lock = HAL_UNLOCKED; + +#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + UART_InitCallbacksToDefault(huart); + + if (huart->MspInitCallback == NULL) + { + huart->MspInitCallback = HAL_UART_MspInit; + } + + /* Init the low level hardware */ + huart->MspInitCallback(huart); +#else + /* Init the low level hardware : GPIO, CLOCK, CORTEX */ + HAL_UART_MspInit(huart); +#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + } + + huart->gState = HAL_UART_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_UART_DISABLE(huart); + + /* Set the UART Communication parameters */ + if (UART_SetConfig(huart) == HAL_ERROR) + { + return HAL_ERROR; + } + + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + + /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ + SET_BIT(huart->Instance->CR3, USART_CR3_DEM); + + /* Set the Driver Enable polarity */ + MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); + + /* Set the Driver Enable assertion and deassertion times */ + temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS); + temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); + MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); + + /* Enable the Peripheral */ + __HAL_UART_ENABLE(huart); + + /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + return (UART_CheckIdleState(huart)); +} + +/** + * @} + */ + +/** @defgroup UARTEx_Exported_Functions_Group2 IO operation functions + * @brief Extended functions + * +@verbatim + =============================================================================== + ##### IO operation functions ##### + =============================================================================== + This subsection provides a set of Wakeup and FIFO mode related callback functions. + + (#) Wakeup from Stop mode Callback: + (+) HAL_UARTEx_WakeupCallback() + + (#) TX/RX Fifos Callbacks: + (+) HAL_UARTEx_RxFifoFullCallback() + (+) HAL_UARTEx_TxFifoEmptyCallback() + +@endverbatim + * @{ + */ + +/** + * @brief UART wakeup from Stop mode callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UARTEx_WakeupCallback can be implemented in the user file. + */ +} + +/** + * @brief UART RX Fifo full callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file. + */ +} + +/** + * @brief UART TX Fifo empty callback. + * @param huart UART handle. + * @retval None + */ +__weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(huart); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file. + */ +} + +/** + * @} + */ + +/** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions + * @brief Extended Peripheral Control functions + * +@verbatim + =============================================================================== + ##### Peripheral Control functions ##### + =============================================================================== + [..] This section provides the following functions: + (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address + detection length to more than 4 bits for multiprocessor address mark wake up. + (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode + trigger: address match, Start Bit detection or RXNE bit status. + (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode + (+) HAL_UARTEx_DisableStopMode() API disables the above functionality + (+) HAL_UARTEx_EnableFifoMode() API enables the FIFO mode + (+) HAL_UARTEx_DisableFifoMode() API disables the FIFO mode + (+) HAL_UARTEx_SetTxFifoThreshold() API sets the TX FIFO threshold + (+) HAL_UARTEx_SetRxFifoThreshold() API sets the RX FIFO threshold + + [..] This subsection also provides a set of additional functions providing enhanced reception + services to user. (For example, these functions allow application to handle use cases + where number of data to be received is unknown). + + (#) Compared to standard reception services which only consider number of received + data elements as reception completion criteria, these functions also consider additional events + as triggers for updating reception status to caller : + (+) Detection of inactivity period (RX line has not been active for a given period). + (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state) + for 1 frame time, after last received byte. + (++) RX inactivity detected by RTO, i.e. line has been in idle state + for a programmable time, after last received byte. + (+) Detection that a specific character has been received. + + (#) There are two mode of transfer: + (+) Blocking mode: The reception is performed in polling mode, until either expected number of data is received, + or till IDLE event occurs. Reception is handled only during function execution. + When function exits, no data reception could occur. HAL status and number of actually received data elements, + are returned by function after finishing transfer. + (+) Non-Blocking mode: The reception is performed using Interrupts or DMA. + These API's return the HAL status. + The end of the data processing will be indicated through the + dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode. + The HAL_UARTEx_RxEventCallback() user callback will be executed during Receive process + The HAL_UART_ErrorCallback()user callback will be executed when a reception error is detected. + + (#) Blocking mode API: + (+) HAL_UARTEx_ReceiveToIdle() + + (#) Non-Blocking mode API with Interrupt: + (+) HAL_UARTEx_ReceiveToIdle_IT() + + (#) Non-Blocking mode API with DMA: + (+) HAL_UARTEx_ReceiveToIdle_DMA() + +@endverbatim + * @{ + */ + +/** + * @brief By default in multiprocessor mode, when the wake up method is set + * to address mark, the UART handles only 4-bit long addresses detection; + * this API allows to enable longer addresses detection (6-, 7- or 8-bit + * long). + * @note Addresses detection lengths are: 6-bit address detection in 7-bit data mode, + * 7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode. + * @param huart UART handle. + * @param AddressLength This parameter can be one of the following values: + * @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address + * @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address + * @retval HAL status + */ +HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength) +{ + /* Check the UART handle allocation */ + if (huart == NULL) + { + return HAL_ERROR; + } + + /* Check the address length parameter */ + assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength)); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_UART_DISABLE(huart); + + /* Set the address length */ + MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength); + + /* Enable the Peripheral */ + __HAL_UART_ENABLE(huart); + + /* TEACK and/or REACK to check before moving huart->gState to Ready */ + return (UART_CheckIdleState(huart)); +} + +/** + * @brief Set Wakeup from Stop mode interrupt flag selection. + * @note It is the application responsibility to enable the interrupt used as + * usart_wkup interrupt source before entering low-power mode. + * @param huart UART handle. + * @param WakeUpSelection Address match, Start Bit detection or RXNE/RXFNE bit status. + * This parameter can be one of the following values: + * @arg @ref UART_WAKEUP_ON_ADDRESS + * @arg @ref UART_WAKEUP_ON_STARTBIT + * @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection) +{ + HAL_StatusTypeDef status = HAL_OK; + uint32_t tickstart; + + /* check the wake-up from stop mode UART instance */ + assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance)); + /* check the wake-up selection parameter */ + assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent)); + + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_UART_DISABLE(huart); + + /* Set the wake-up selection scheme */ + MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); + + if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS) + { + UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection); + } + + /* Enable the Peripheral */ + __HAL_UART_ENABLE(huart); + + /* Init tickstart for timeout management */ + tickstart = HAL_GetTick(); + + /* Wait until REACK flag is set */ + if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) + { + status = HAL_TIMEOUT; + } + else + { + /* Initialize the UART State */ + huart->gState = HAL_UART_STATE_READY; + } + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return status; +} + +/** + * @brief Enable UART Stop Mode. + * @note The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart) +{ + /* Process Locked */ + __HAL_LOCK(huart); + + /* Set UESM bit */ + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_UESM); + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief Disable UART Stop Mode. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart) +{ + /* Process Locked */ + __HAL_LOCK(huart); + + /* Clear UESM bit */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM); + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief Enable the FIFO mode. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart) +{ + uint32_t tmpcr1; + + /* Check parameters */ + assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); + + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Save actual UART configuration */ + tmpcr1 = READ_REG(huart->Instance->CR1); + + /* Disable UART */ + __HAL_UART_DISABLE(huart); + + /* Enable FIFO mode */ + SET_BIT(tmpcr1, USART_CR1_FIFOEN); + huart->FifoMode = UART_FIFOMODE_ENABLE; + + /* Restore UART configuration */ + WRITE_REG(huart->Instance->CR1, tmpcr1); + + /* Determine the number of data to process during RX/TX ISR execution */ + UARTEx_SetNbDataToProcess(huart); + + huart->gState = HAL_UART_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief Disable the FIFO mode. + * @param huart UART handle. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart) +{ + uint32_t tmpcr1; + + /* Check parameters */ + assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); + + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Save actual UART configuration */ + tmpcr1 = READ_REG(huart->Instance->CR1); + + /* Disable UART */ + __HAL_UART_DISABLE(huart); + + /* Enable FIFO mode */ + CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); + huart->FifoMode = UART_FIFOMODE_DISABLE; + + /* Restore UART configuration */ + WRITE_REG(huart->Instance->CR1, tmpcr1); + + huart->gState = HAL_UART_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief Set the TXFIFO threshold. + * @param huart UART handle. + * @param Threshold TX FIFO threshold value + * This parameter can be one of the following values: + * @arg @ref UART_TXFIFO_THRESHOLD_1_8 + * @arg @ref UART_TXFIFO_THRESHOLD_1_4 + * @arg @ref UART_TXFIFO_THRESHOLD_1_2 + * @arg @ref UART_TXFIFO_THRESHOLD_3_4 + * @arg @ref UART_TXFIFO_THRESHOLD_7_8 + * @arg @ref UART_TXFIFO_THRESHOLD_8_8 + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) +{ + uint32_t tmpcr1; + + /* Check parameters */ + assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); + assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold)); + + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Save actual UART configuration */ + tmpcr1 = READ_REG(huart->Instance->CR1); + + /* Disable UART */ + __HAL_UART_DISABLE(huart); + + /* Update TX threshold configuration */ + MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); + + /* Determine the number of data to process during RX/TX ISR execution */ + UARTEx_SetNbDataToProcess(huart); + + /* Restore UART configuration */ + WRITE_REG(huart->Instance->CR1, tmpcr1); + + huart->gState = HAL_UART_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief Set the RXFIFO threshold. + * @param huart UART handle. + * @param Threshold RX FIFO threshold value + * This parameter can be one of the following values: + * @arg @ref UART_RXFIFO_THRESHOLD_1_8 + * @arg @ref UART_RXFIFO_THRESHOLD_1_4 + * @arg @ref UART_RXFIFO_THRESHOLD_1_2 + * @arg @ref UART_RXFIFO_THRESHOLD_3_4 + * @arg @ref UART_RXFIFO_THRESHOLD_7_8 + * @arg @ref UART_RXFIFO_THRESHOLD_8_8 + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) +{ + uint32_t tmpcr1; + + /* Check the parameters */ + assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); + assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold)); + + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Save actual UART configuration */ + tmpcr1 = READ_REG(huart->Instance->CR1); + + /* Disable UART */ + __HAL_UART_DISABLE(huart); + + /* Update RX threshold configuration */ + MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); + + /* Determine the number of data to process during RX/TX ISR execution */ + UARTEx_SetNbDataToProcess(huart); + + /* Restore UART configuration */ + WRITE_REG(huart->Instance->CR1, tmpcr1); + + huart->gState = HAL_UART_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; +} + +/** + * @brief Receive an amount of data in blocking mode till either the expected number of data + * is received or an IDLE event occurs. + * @note HAL_OK is returned if reception is completed (expected number of data has been received) + * or if reception is stopped after IDLE event (less than the expected number of data has been received) + * In this case, RxLen output parameter indicates number of data available in reception buffer. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the received data is handled as a set of uint16_t. In this case, Size must indicate the number + * of uint16_t available through pData. + * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO + * is not empty. Read operations from the RDR register are performed when + * RXFNE flag is set. From hardware perspective, RXFNE flag and + * RXNE are mapped on the same bit-field. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer for storing data to be received, should be aligned on a half word frontier + * (16 bits) (as received data will be handled using uint16_t pointer cast). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required to ensure proper + * alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). + * @param Size Amount of data elements (uint8_t or uint16_t) to be received. + * @param RxLen Number of data elements finally received + * (could be lower than Size, in case reception ends on IDLE event) + * @param Timeout Timeout duration expressed in ms (covers the whole reception sequence). + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, + uint32_t Timeout) +{ + uint8_t *pdata8bits; + uint16_t *pdata16bits; + uint16_t uhMask; + uint32_t tickstart; + + /* Check that a Rx process is not already ongoing */ + if (huart->RxState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a uint16_t frontier, as data to be received from RDR will be + handled through a uint16_t cast. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + huart->ErrorCode = HAL_UART_ERROR_NONE; + huart->RxState = HAL_UART_STATE_BUSY_RX; + huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + huart->RxEventType = HAL_UART_RXEVENT_TC; + + /* Init tickstart for timeout management */ + tickstart = HAL_GetTick(); + + huart->RxXferSize = Size; + huart->RxXferCount = Size; + + /* Computation of UART mask to apply to RDR register */ + UART_MASK_COMPUTATION(huart); + uhMask = huart->Mask; + + /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + pdata8bits = NULL; + pdata16bits = (uint16_t *) pData; + } + else + { + pdata8bits = pData; + pdata16bits = NULL; + } + + /* Initialize output number of received elements */ + *RxLen = 0U; + + /* as long as data have to be received */ + while (huart->RxXferCount > 0U) + { + /* Check if IDLE flag is set */ + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) + { + /* Clear IDLE flag in ISR */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + + /* If Set, but no data ever received, clear flag without exiting loop */ + /* If Set, and data has already been received, this means Idle Event is valid : End reception */ + if (*RxLen > 0U) + { + huart->RxEventType = HAL_UART_RXEVENT_IDLE; + huart->RxState = HAL_UART_STATE_READY; + + return HAL_OK; + } + } + + /* Check if RXNE flag is set */ + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE)) + { + if (pdata8bits == NULL) + { + *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask); + pdata16bits++; + } + else + { + *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); + pdata8bits++; + } + /* Increment number of received elements */ + *RxLen += 1U; + huart->RxXferCount--; + } + + /* Check for the Timeout */ + if (Timeout != HAL_MAX_DELAY) + { + if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) + { + huart->RxState = HAL_UART_STATE_READY; + + return HAL_TIMEOUT; + } + } + } + + /* Set number of received elements in output parameter : RxLen */ + *RxLen = huart->RxXferSize - huart->RxXferCount; + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + + return HAL_OK; + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Receive an amount of data in interrupt mode till either the expected number of data + * is received or an IDLE event occurs. + * @note Reception is initiated by this function call. Further progress of reception is achieved thanks + * to UART interrupts raised by RXNE and IDLE events. Callback is called at end of reception indicating + * number of received data elements. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the received data is handled as a set of uint16_t. In this case, Size must indicate the number + * of uint16_t available through pData. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer for storing data to be received, should be aligned on a half word frontier + * (16 bits) (as received data will be handled using uint16_t pointer cast). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required + * to ensure proper alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). + * @param Size Amount of data elements (uint8_t or uint16_t) to be received. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +{ + HAL_StatusTypeDef status; + + /* Check that a Rx process is not already ongoing */ + if (huart->RxState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a uint16_t frontier, as data to be received from RDR will be + handled through a uint16_t cast. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + /* Set Reception type to reception till IDLE Event*/ + huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + huart->RxEventType = HAL_UART_RXEVENT_TC; + + status = UART_Start_Receive_IT(huart, pData, Size); + + /* Check Rx process has been successfully started */ + if (status == HAL_OK) + { + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + } + else + { + /* In case of errors already pending when reception is started, + Interrupts may have already been raised and lead to reception abortion. + (Overrun error for instance). + In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ + status = HAL_ERROR; + } + } + + return status; + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Receive an amount of data in DMA mode till either the expected number + * of data is received or an IDLE event occurs. + * @note Reception is initiated by this function call. Further progress of reception is achieved thanks + * to DMA services, transferring automatically received data elements in user reception buffer and + * calling registered callbacks at half/end of reception. UART IDLE events are also used to consider + * reception phase as ended. In all cases, callback execution will indicate number of received data elements. + * @note When the UART parity is enabled (PCE = 1), the received data contain + * the parity bit (MSB position). + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * the received data is handled as a set of uint16_t. In this case, Size must indicate the number + * of uint16_t available through pData. + * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), + * address of user data buffer for storing data to be received, should be aligned on a half word frontier + * (16 bits) (as received data will be handled by DMA from halfword frontier). Depending on compilation chain, + * use of specific alignment compilation directives or pragmas might be required + * to ensure proper alignment for pData. + * @param huart UART handle. + * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). + * @param Size Amount of data elements (uint8_t or uint16_t) to be received. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +{ + HAL_StatusTypeDef status; + + /* Check that a Rx process is not already ongoing */ + if (huart->RxState == HAL_UART_STATE_READY) + { + if ((pData == NULL) || (Size == 0U)) + { + return HAL_ERROR; + } + + /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter + should be aligned on a uint16_t frontier, as data copy from RDR will be + handled by DMA from a uint16_t frontier. */ + if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + { + if ((((uint32_t)pData) & 1U) != 0U) + { + return HAL_ERROR; + } + } + + /* Set Reception type to reception till IDLE Event*/ + huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + huart->RxEventType = HAL_UART_RXEVENT_TC; + + status = UART_Start_Receive_DMA(huart, pData, Size); + + /* Check Rx process has been successfully started */ + if (status == HAL_OK) + { + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + } + else + { + /* In case of errors already pending when reception is started, + Interrupts may have already been raised and lead to reception abortion. + (Overrun error for instance). + In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ + status = HAL_ERROR; + } + } + + return status; + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Provide Rx Event type that has lead to RxEvent callback execution. + * @note When HAL_UARTEx_ReceiveToIdle_IT() or HAL_UARTEx_ReceiveToIdle_DMA() API are called, progress + * of reception process is provided to application through calls of Rx Event callback (either default one + * HAL_UARTEx_RxEventCallback() or user registered one). As several types of events could occur (IDLE event, + * Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type that has lead + * to Rx Event callback execution. + * @note This function is expected to be called within the user implementation of Rx Event Callback, + * in order to provide the accurate value : + * In Interrupt Mode : + * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received) + * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of + * received data is lower than expected one) + * In DMA Mode : + * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received) + * - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received + * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of + * received data is lower than expected one). + * In DMA mode, RxEvent callback could be called several times; + * When DMA is configured in Normal Mode, HT event does not stop Reception process; + * When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception process; + * @param huart UART handle. + * @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values) + */ +HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart) +{ + /* Return Rx Event type value, as stored in UART handle */ + return(huart->RxEventType); +} + +/** + * @} + */ + +/** + * @} + */ + +/** @addtogroup UARTEx_Private_Functions + * @{ + */ + +/** + * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detection. + * @param huart UART handle. + * @param WakeUpSelection UART wake up from stop mode parameters. + * @retval None + */ +static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection) +{ + assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength)); + + /* Set the USART address length */ + MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength); + + /* Set the USART address node */ + MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS)); +} + +/** + * @brief Calculate the number of data to process in RX/TX ISR. + * @note The RX FIFO depth and the TX FIFO depth is extracted from + * the UART configuration registers. + * @param huart UART handle. + * @retval None + */ +static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) +{ + uint8_t rx_fifo_depth; + uint8_t tx_fifo_depth; + uint8_t rx_fifo_threshold; + uint8_t tx_fifo_threshold; + static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U}; + static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U}; + + if (huart->FifoMode == UART_FIFOMODE_DISABLE) + { + huart->NbTxDataToProcess = 1U; + huart->NbRxDataToProcess = 1U; + } + else + { + rx_fifo_depth = RX_FIFO_DEPTH; + tx_fifo_depth = TX_FIFO_DEPTH; + rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); + tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); + huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / + (uint16_t)denominator[tx_fifo_threshold]; + huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / + (uint16_t)denominator[rx_fifo_threshold]; + } +} +/** + * @} + */ + +#endif /* HAL_UART_MODULE_ENABLED */ + +/** + * @} + */ + +/** + * @} + */ + diff --git a/firmware/PCB-Heater/PCB-Heater.ioc b/firmware/PCB-Heater/PCB-Heater.ioc index 5de1b42..89bcd02 100644 --- a/firmware/PCB-Heater/PCB-Heater.ioc +++ b/firmware/PCB-Heater/PCB-Heater.ioc @@ -1,15 +1,18 @@ #MicroXplorer Configuration settings - do not modify ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_10 ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV6 -ADC1.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,NbrOfConversionFlag,Resolution,ClockPrescaler,master,SelectedChannel,SamplingTimeCommon1,SamplingTimeCommon2 +ADC1.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,NbrOfConversionFlag,Resolution,ClockPrescaler,SamplingTimeCommon1,SamplingTimeCommon2,master,SelectedChannel ADC1.NbrOfConversionFlag=1 ADC1.Rank-1\#ChannelRegularConversion=1 ADC1.Resolution=ADC_RESOLUTION_10B ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLINGTIME_COMMON_1 ADC1.SamplingTimeCommon1=ADC_SAMPLETIME_3CYCLES_5 ADC1.SamplingTimeCommon2=ADC_SAMPLETIME_3CYCLES_5 -ADC1.SelectedChannel=ADC_CHANNEL_10 +ADC1.SelectedChannel=ADC_CHANNEL_10|ADC_CHANNEL_11 ADC1.master=1 +CAD.formats= +CAD.pinconfig= +CAD.provider= FREERTOS.FootprintOK=true FREERTOS.IPParameters=Tasks01,FootprintOK,configTOTAL_HEAP_SIZE,Queues01,Mutexes01,configUSE_NEWLIB_REENTRANT,Timers01 FREERTOS.Mutexes01=mutScreen,Dynamic,NULL @@ -25,53 +28,60 @@ Mcu.CPN=STM32G070RBT6 Mcu.Family=STM32G0 Mcu.IP0=ADC1 Mcu.IP1=FREERTOS +Mcu.IP10=USART1 Mcu.IP2=NVIC Mcu.IP3=RCC Mcu.IP4=SPI2 Mcu.IP5=SYS Mcu.IP6=TIM1 -Mcu.IP7=TIM15 -Mcu.IP8=TIM17 -Mcu.IPNb=9 +Mcu.IP7=TIM14 +Mcu.IP8=TIM15 +Mcu.IP9=TIM17 +Mcu.IPNb=11 Mcu.Name=STM32G070RBTx Mcu.Package=LQFP64 -Mcu.Pin0=PF0-OSC_IN (PF0) -Mcu.Pin1=PF1-OSC_OUT (PF1) -Mcu.Pin10=PA5 -Mcu.Pin11=PA6 -Mcu.Pin12=PA7 -Mcu.Pin13=PC4 -Mcu.Pin14=PC5 -Mcu.Pin15=PB0 -Mcu.Pin16=PB1 -Mcu.Pin17=PB2 -Mcu.Pin18=PB13 -Mcu.Pin19=PB14 -Mcu.Pin2=PC1 -Mcu.Pin20=PB15 -Mcu.Pin21=PA8 -Mcu.Pin22=PA9 -Mcu.Pin23=PA13 -Mcu.Pin24=PA14-BOOT0 -Mcu.Pin25=PD4 -Mcu.Pin26=PB9 -Mcu.Pin27=VP_FREERTOS_VS_CMSIS_V2 -Mcu.Pin28=VP_SYS_VS_tim6 -Mcu.Pin29=VP_SYS_VS_DBSignals -Mcu.Pin3=PC2 -Mcu.Pin30=VP_TIM1_VS_ControllerModeCombinedResetTrigger -Mcu.Pin31=VP_TIM1_VS_ClockSourceINT -Mcu.Pin32=VP_TIM1_VS_OPM -Mcu.Pin33=VP_TIM15_VS_ClockSourceINT -Mcu.Pin34=VP_TIM17_VS_ClockSourceINT -Mcu.Pin35=VP_TIM17_VS_OPM -Mcu.Pin4=PC3 -Mcu.Pin5=PA0 -Mcu.Pin6=PA1 -Mcu.Pin7=PA2 -Mcu.Pin8=PA3 -Mcu.Pin9=PA4 -Mcu.PinsNb=36 +Mcu.Pin0=PC12 +Mcu.Pin1=PF0-OSC_IN (PF0) +Mcu.Pin10=PA4 +Mcu.Pin11=PA5 +Mcu.Pin12=PA6 +Mcu.Pin13=PA7 +Mcu.Pin14=PC4 +Mcu.Pin15=PC5 +Mcu.Pin16=PB0 +Mcu.Pin17=PB1 +Mcu.Pin18=PB2 +Mcu.Pin19=PB10 +Mcu.Pin2=PF1-OSC_OUT (PF1) +Mcu.Pin20=PB13 +Mcu.Pin21=PB14 +Mcu.Pin22=PB15 +Mcu.Pin23=PA8 +Mcu.Pin24=PA9 +Mcu.Pin25=PA13 +Mcu.Pin26=PA14-BOOT0 +Mcu.Pin27=PD4 +Mcu.Pin28=PB6 +Mcu.Pin29=PB7 +Mcu.Pin3=PC1 +Mcu.Pin30=PB9 +Mcu.Pin31=VP_FREERTOS_VS_CMSIS_V2 +Mcu.Pin32=VP_SYS_VS_tim6 +Mcu.Pin33=VP_SYS_VS_DBSignals +Mcu.Pin34=VP_TIM1_VS_ControllerModeCombinedResetTrigger +Mcu.Pin35=VP_TIM1_VS_ClockSourceINT +Mcu.Pin36=VP_TIM1_VS_OPM +Mcu.Pin37=VP_TIM14_VS_ClockSourceINT +Mcu.Pin38=VP_TIM15_VS_ClockSourceINT +Mcu.Pin39=VP_TIM17_VS_ClockSourceINT +Mcu.Pin4=PC2 +Mcu.Pin40=VP_TIM17_VS_OPM +Mcu.Pin5=PC3 +Mcu.Pin6=PA0 +Mcu.Pin7=PA1 +Mcu.Pin8=PA2 +Mcu.Pin9=PA3 +Mcu.PinsNb=41 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32G070RBTx @@ -150,6 +160,10 @@ PB1.GPIO_Label=LCD_WR PB1.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH PB1.Locked=true PB1.Signal=GPIO_Output +PB10.GPIOParameters=GPIO_Label +PB10.GPIO_Label=THERMISTOR +PB10.Mode=IN11 +PB10.Signal=ADC1_IN11 PB13.GPIOParameters=GPIO_Label PB13.GPIO_Label=MAX_SCK PB13.Locked=true @@ -169,6 +183,12 @@ PB15.Signal=GPIO_Output PB2.Locked=true PB2.Mode=IN10 PB2.Signal=ADC1_IN10 +PB6.Locked=true +PB6.Mode=Asynchronous +PB6.Signal=USART1_TX +PB7.Locked=true +PB7.Mode=Asynchronous +PB7.Signal=USART1_RX PB9.GPIOParameters=GPIO_Speed,GPIO_Label PB9.GPIO_Label=BUZZER PB9.GPIO_Speed=GPIO_SPEED_FREQ_HIGH @@ -177,6 +197,9 @@ PB9.Signal=GPIO_Output PC1.GPIOParameters=GPIO_Label PC1.GPIO_Label=LCD_LED PC1.Signal=S_TIM15_CH1 +PC12.GPIOParameters=GPIO_Label +PC12.GPIO_Label=FAN_PWM +PC12.Signal=S_TIM14_CH1 PC2.GPIOParameters=GPIO_Speed,GPIO_Label PC2.GPIO_Label=LED_Status PC2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH @@ -234,7 +257,7 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_TIM1_Init-TIM1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_SPI2_Init-SPI2-false-HAL-true,6-MX_TIM17_Init-TIM17-false-HAL-true,7-MX_TIM15_Init-TIM15-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_TIM1_Init-TIM1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_SPI2_Init-SPI2-false-HAL-true,6-MX_TIM17_Init-TIM17-false-HAL-true,7-MX_TIM15_Init-TIM15-false-HAL-true,8-MX_TIM14_Init-TIM14-false-HAL-true,9-MX_USART1_UART_Init-USART1-false-HAL-true RCC.ADCFreq_Value=64000000 RCC.AHBFreq_Value=64000000 RCC.APBFreq_Value=64000000 @@ -262,6 +285,8 @@ RCC.USART1Freq_Value=64000000 RCC.USART2Freq_Value=64000000 RCC.VCOInputFreq_Value=16000000 RCC.VCOOutputFreq_Value=128000000 +SH.S_TIM14_CH1.0=TIM14_CH1,PWM Generation1 CH1 +SH.S_TIM14_CH1.ConfNb=1 SH.S_TIM15_CH1.0=TIM15_CH1,PWM Generation1 CH1 SH.S_TIM15_CH1.ConfNb=1 SH.S_TIM1_CH1.0=TIM1_CH1,Input_Capture1_from_TI1 @@ -289,6 +314,8 @@ TIM1.OCPolarity_2=TIM_OCPOLARITY_HIGH TIM1.Period=999 TIM1.Prescaler=640-1 TIM1.Pulse-PWM\ Generation2\ CH2=1020 +TIM14.Channel=TIM_CHANNEL_1 +TIM14.IPParameters=Channel TIM15.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 TIM15.IPParameters=Channel-PWM Generation1 CH1,Prescaler,Period TIM15.Period=100-1 @@ -297,12 +324,16 @@ TIM17.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE TIM17.IPParameters=Prescaler,Period,AutoReloadPreload TIM17.Period=999 TIM17.Prescaler=64000-1 +USART1.IPParameters=VirtualMode-Asynchronous +USART1.VirtualMode-Asynchronous=VM_ASYNC VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals VP_SYS_VS_tim6.Mode=TIM6 VP_SYS_VS_tim6.Signal=SYS_VS_tim6 +VP_TIM14_VS_ClockSourceINT.Mode=Enable_Timer +VP_TIM14_VS_ClockSourceINT.Signal=TIM14_VS_ClockSourceINT VP_TIM15_VS_ClockSourceINT.Mode=Internal VP_TIM15_VS_ClockSourceINT.Signal=TIM15_VS_ClockSourceINT VP_TIM17_VS_ClockSourceINT.Mode=Enable_Timer diff --git a/firmware/PCB-Heater/STM32G070RBTX_FLASH.ld b/firmware/PCB-Heater/STM32G070RBTX_FLASH.ld index 0ea9ffa..b171b3f 100644 --- a/firmware/PCB-Heater/STM32G070RBTX_FLASH.ld +++ b/firmware/PCB-Heater/STM32G070RBTX_FLASH.ld @@ -38,8 +38,8 @@ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ -_Min_Heap_Size = 0x200 ; /* required amount of heap */ -_Min_Stack_Size = 0x400 ; /* required amount of stack */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ /* Memories definition */ MEMORY