From 9021c7e52ded7d57e9231f2e8aff7b82192ff634 Mon Sep 17 00:00:00 2001
From: Anton Mukhin <mcfly@mcflyer.ru>
Date: Sun, 29 Jan 2023 07:29:31 +0300
Subject: [PATCH] Amend board settings

---
 kicad/pcb-heater/pcb-heater.kicad_pcb | 20 +++++++++++++-------
 kicad/pcb-heater/pcb-heater.kicad_pro | 26 ++++++++++++++++----------
 2 files changed, 29 insertions(+), 17 deletions(-)

diff --git a/kicad/pcb-heater/pcb-heater.kicad_pcb b/kicad/pcb-heater/pcb-heater.kicad_pcb
index e784039..feb2ca5 100644
--- a/kicad/pcb-heater/pcb-heater.kicad_pcb
+++ b/kicad/pcb-heater/pcb-heater.kicad_pcb
@@ -28,16 +28,22 @@
     (49 "F.Fab" user)
     (50 "User.1" user)
     (51 "User.2" user)
-    (52 "User.3" user)
-    (53 "User.4" user)
-    (54 "User.5" user)
-    (55 "User.6" user)
-    (56 "User.7" user)
-    (57 "User.8" user)
-    (58 "User.9" user)
   )
 
   (setup
+    (stackup
+      (layer "F.SilkS" (type "Top Silk Screen") (color "White"))
+      (layer "F.Paste" (type "Top Solder Paste"))
+      (layer "F.Mask" (type "Top Solder Mask") (color "Black") (thickness 0.01))
+      (layer "F.Cu" (type "copper") (thickness 0.035))
+      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
+      (layer "B.Cu" (type "copper") (thickness 0.035))
+      (layer "B.Mask" (type "Bottom Solder Mask") (color "Black") (thickness 0.01))
+      (layer "B.Paste" (type "Bottom Solder Paste"))
+      (layer "B.SilkS" (type "Bottom Silk Screen") (color "White"))
+      (copper_finish "None")
+      (dielectric_constraints no)
+    )
     (pad_to_mask_clearance 0)
     (pcbplotparams
       (layerselection 0x00010fc_ffffffff)
diff --git a/kicad/pcb-heater/pcb-heater.kicad_pro b/kicad/pcb-heater/pcb-heater.kicad_pro
index df82d3a..df3f8af 100644
--- a/kicad/pcb-heater/pcb-heater.kicad_pro
+++ b/kicad/pcb-heater/pcb-heater.kicad_pro
@@ -48,7 +48,13 @@
           "min_clearance": 0.3
         }
       },
-      "diff_pair_dimensions": [],
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        }
+      ],
       "drc_exclusions": [],
       "meta": {
         "filename": "board_design_settings.json",
@@ -100,17 +106,17 @@
         "allow_blind_buried_vias": false,
         "allow_microvias": false,
         "max_error": 0.005,
-        "min_clearance": 0.0,
-        "min_copper_edge_clearance": 0.024999999999999998,
-        "min_hole_clearance": 0.25,
-        "min_hole_to_hole": 0.25,
+        "min_clearance": 0.19999999999999998,
+        "min_copper_edge_clearance": 0.19999999999999998,
+        "min_hole_clearance": 0.254,
+        "min_hole_to_hole": 0.5,
         "min_microvia_diameter": 0.19999999999999998,
         "min_microvia_drill": 0.09999999999999999,
         "min_silk_clearance": 0.0,
-        "min_through_hole_diameter": 0.3,
+        "min_through_hole_diameter": 0.19999999999999998,
         "min_track_width": 0.19999999999999998,
-        "min_via_annular_width": 0.049999999999999996,
-        "min_via_diameter": 0.39999999999999997,
+        "min_via_annular_width": 0.13,
+        "min_via_diameter": 0.45999999999999996,
         "use_height_for_length_calcs": true
       },
       "track_widths": [
@@ -378,8 +384,8 @@
         "pcb_color": "rgba(0, 0, 0, 0.000)",
         "schematic_color": "rgba(0, 0, 0, 0.000)",
         "track_width": 0.25,
-        "via_diameter": 0.8,
-        "via_drill": 0.4,
+        "via_diameter": 0.6,
+        "via_drill": 0.3,
         "wire_width": 6.0
       }
     ],