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This commit is contained in:
Dmitry Panin
2024-02-05 22:11:34 +03:00
commit dd54efd2d9
595 changed files with 650873 additions and 0 deletions
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416
Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/TX_LPF_MSP430G2553.map Normal file
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******************************************************************************
MSP430 Linker PC v18.1.5
******************************************************************************
>> Linked Wed Jan 6 22:25:55 2021
OUTPUT FILE NAME: <TX_LPF_MSP430G2553.out>
ENTRY POINT SYMBOL: "_c_int00_noinit_noargs" address: 0000c146
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
SFR 00000000 00000010 00000000 00000010 RWIX
PERIPHERALS_8BIT 00000010 000000f0 00000000 000000f0 RWIX
PERIPHERALS_16BIT 00000100 00000100 00000000 00000100 RWIX
RAM 00000200 00000200 00000050 000001b0 RWIX
INFOD 00001000 00000040 00000000 00000040 RWIX
INFOC 00001040 00000040 00000000 00000040 RWIX
INFOB 00001080 00000040 00000000 00000040 RWIX
INFOA 000010c0 00000040 00000000 00000040 RWIX
FLASH 0000c000 00003fde 0000016c 00003e72 RWIX
BSLSIGNATURE 0000ffde 00000002 00000002 00000000 RWIX ffff
INT00 0000ffe0 00000002 00000002 00000000 RWIX
INT01 0000ffe2 00000002 00000000 00000002 RWIX
INT02 0000ffe4 00000002 00000002 00000000 RWIX
INT03 0000ffe6 00000002 00000002 00000000 RWIX
INT04 0000ffe8 00000002 00000000 00000002 RWIX
INT05 0000ffea 00000002 00000002 00000000 RWIX
INT06 0000ffec 00000002 00000002 00000000 RWIX
INT07 0000ffee 00000002 00000002 00000000 RWIX
INT08 0000fff0 00000002 00000002 00000000 RWIX
INT09 0000fff2 00000002 00000002 00000000 RWIX
INT10 0000fff4 00000002 00000002 00000000 RWIX
INT11 0000fff6 00000002 00000002 00000000 RWIX
INT12 0000fff8 00000002 00000002 00000000 RWIX
INT13 0000fffa 00000002 00000002 00000000 RWIX
INT14 0000fffc 00000002 00000002 00000000 RWIX
RESET 0000fffe 00000002 00000002 00000000 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.stack 0 000003b0 00000050 UNINITIALIZED
000003b0 00000002 rts430_eabi.lib : boot.c.obj (.stack)
000003b2 0000004e --HOLE--
.text 0 0000c000 0000016c
0000c000 000000ec main.obj (.text:main)
0000c0ec 0000005a main.obj (.text:Init_Pins)
0000c146 00000014 rts430_eabi.lib : boot.c.obj (.text:_c_int00_noinit_noargs)
0000c15a 00000008 : isr_trap.asm.obj (.text:_isr:__TI_ISR_TRAP)
0000c162 00000006 : exit.c.obj (.text:abort)
0000c168 00000004 : pre_init.c.obj (.text:_system_pre_init)
.cinit 0 0000c000 00000000 UNINITIALIZED
.binit 0 0000c000 00000000
.init_array
* 0 0000c000 00000000 UNINITIALIZED
TRAPINT 0 0000ffe0 00000002
0000ffe0 00000002 rts430_eabi.lib : int00.asm.obj (.int00)
PORT1 0 0000ffe4 00000002
0000ffe4 00000002 rts430_eabi.lib : int02.asm.obj (.int02)
PORT2 0 0000ffe6 00000002
0000ffe6 00000002 rts430_eabi.lib : int03.asm.obj (.int03)
ADC10 0 0000ffea 00000002
0000ffea 00000002 rts430_eabi.lib : int05.asm.obj (.int05)
USCIAB0TX
* 0 0000ffec 00000002
0000ffec 00000002 rts430_eabi.lib : int06.asm.obj (.int06)
USCIAB0RX
* 0 0000ffee 00000002
0000ffee 00000002 rts430_eabi.lib : int07.asm.obj (.int07)
TIMER0_A1
* 0 0000fff0 00000002
0000fff0 00000002 rts430_eabi.lib : int08.asm.obj (.int08)
TIMER0_A0
* 0 0000fff2 00000002
0000fff2 00000002 rts430_eabi.lib : int09.asm.obj (.int09)
WDT 0 0000fff4 00000002
0000fff4 00000002 rts430_eabi.lib : int10.asm.obj (.int10)
COMPARATORA
* 0 0000fff6 00000002
0000fff6 00000002 rts430_eabi.lib : int11.asm.obj (.int11)
TIMER1_A1
* 0 0000fff8 00000002
0000fff8 00000002 rts430_eabi.lib : int12.asm.obj (.int12)
TIMER1_A0
* 0 0000fffa 00000002
0000fffa 00000002 rts430_eabi.lib : int13.asm.obj (.int13)
NMI 0 0000fffc 00000002
0000fffc 00000002 rts430_eabi.lib : int14.asm.obj (.int14)
.reset 0 0000fffe 00000002
0000fffe 00000002 rts430_eabi.lib : boot.c.obj (.reset)
$fill000 0 0000ffde 00000002
0000ffde 00000002 --HOLE-- [fill = ffff]
MODULE SUMMARY
Module code ro data rw data
------ ---- ------- -------
.\
main.obj 326 0 0
+--+------------------+------+---------+---------+
Total: 326 0 0
C:\ti\ccsv8\tools\compiler\ti-cgt-msp430_18.1.5.LTS\lib\rts430_eabi.lib
boot.c.obj 20 2 0
isr_trap.asm.obj 8 0 0
exit.c.obj 6 0 0
pre_init.c.obj 4 0 0
int00.asm.obj 0 2 0
int02.asm.obj 0 2 0
int03.asm.obj 0 2 0
int05.asm.obj 0 2 0
int06.asm.obj 0 2 0
int07.asm.obj 0 2 0
int08.asm.obj 0 2 0
int09.asm.obj 0 2 0
int10.asm.obj 0 2 0
int11.asm.obj 0 2 0
int12.asm.obj 0 2 0
int13.asm.obj 0 2 0
int14.asm.obj 0 2 0
+--+------------------+------+---------+---------+
Total: 38 28 0
Stack: 0 0 80
+--+------------------+------+---------+---------+
Grand Total: 364 28 80
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
address name
------- ----
0000004a ADC10AE0
000001b0 ADC10CTL0
000001b2 ADC10CTL1
00000048 ADC10DTC0
00000049 ADC10DTC1
000001b4 ADC10MEM
000001bc ADC10SA
00000057 BCSCTL1
00000058 BCSCTL2
00000053 BCSCTL3
0000c162 C$$EXIT
00000059 CACTL1
0000005a CACTL2
000010fb CALBC1_12MHZ
000010f9 CALBC1_16MHZ
000010ff CALBC1_1MHZ
000010fd CALBC1_8MHZ
000010fa CALDCO_12MHZ
000010f8 CALDCO_16MHZ
000010fe CALDCO_1MHZ
000010fc CALDCO_8MHZ
0000005b CAPD
00000056 DCOCTL
00000128 FCTL1
0000012a FCTL2
0000012c FCTL3
00000000 IE1
00000001 IE2
00000002 IFG1
00000003 IFG2
0000c0ec Init_Pins
00000022 P1DIR
00000025 P1IE
00000024 P1IES
00000023 P1IFG
00000020 P1IN
00000021 P1OUT
00000027 P1REN
00000026 P1SEL
00000041 P1SEL2
0000002a P2DIR
0000002d P2IE
0000002c P2IES
0000002b P2IFG
00000028 P2IN
00000029 P2OUT
0000002f P2REN
0000002e P2SEL
00000042 P2SEL2
0000001a P3DIR
00000018 P3IN
00000019 P3OUT
00000010 P3REN
0000001b P3SEL
00000043 P3SEL2
00000172 TA0CCR0
00000174 TA0CCR1
00000176 TA0CCR2
00000162 TA0CCTL0
00000164 TA0CCTL1
00000166 TA0CCTL2
00000160 TA0CTL
0000012e TA0IV
00000170 TA0R
00000192 TA1CCR0
00000194 TA1CCR1
00000196 TA1CCR2
00000182 TA1CCTL0
00000184 TA1CCTL1
00000186 TA1CCTL2
00000180 TA1CTL
0000011e TA1IV
00000190 TA1R
000010db TLV_ADC10_1_LEN
000010da TLV_ADC10_1_TAG
000010c0 TLV_CHECKSUM
000010f7 TLV_DCO_30_LEN
000010f6 TLV_DCO_30_TAG
0000005d UCA0ABCTL
00000062 UCA0BR0
00000063 UCA0BR1
00000060 UCA0CTL0
00000061 UCA0CTL1
0000005f UCA0IRRCTL
0000005e UCA0IRTCTL
00000064 UCA0MCTL
00000066 UCA0RXBUF
00000065 UCA0STAT
00000067 UCA0TXBUF
0000006a UCB0BR0
0000006b UCB0BR1
00000068 UCB0CTL0
00000069 UCB0CTL1
0000006c UCB0I2CIE
00000118 UCB0I2COA
0000011a UCB0I2CSA
0000006e UCB0RXBUF
0000006d UCB0STAT
0000006f UCB0TXBUF
00000120 WDTCTL
00000400 __STACK_END
00000050 __STACK_SIZE
0000c15a __TI_ISR_TRAP
0000ffe0 __TI_int00
0000ffe4 __TI_int02
0000ffe6 __TI_int03
0000ffea __TI_int05
0000ffec __TI_int06
0000ffee __TI_int07
0000fff0 __TI_int08
0000fff2 __TI_int09
0000fff4 __TI_int10
0000fff6 __TI_int11
0000fff8 __TI_int12
0000fffa __TI_int13
0000fffc __TI_int14
ffffffff __TI_pprof_out_hndl
ffffffff __TI_prof_data_size
ffffffff __TI_prof_data_start
ffffffff __c_args__
0000c146 _c_int00_noinit_noargs
0000fffe _reset_vector
000003b0 _stack
0000c168 _system_pre_init
0000c162 abort
0000c000 main
GLOBAL SYMBOLS: SORTED BY Symbol Address
address name
------- ----
00000000 IE1
00000001 IE2
00000002 IFG1
00000003 IFG2
00000010 P3REN
00000018 P3IN
00000019 P3OUT
0000001a P3DIR
0000001b P3SEL
00000020 P1IN
00000021 P1OUT
00000022 P1DIR
00000023 P1IFG
00000024 P1IES
00000025 P1IE
00000026 P1SEL
00000027 P1REN
00000028 P2IN
00000029 P2OUT
0000002a P2DIR
0000002b P2IFG
0000002c P2IES
0000002d P2IE
0000002e P2SEL
0000002f P2REN
00000041 P1SEL2
00000042 P2SEL2
00000043 P3SEL2
00000048 ADC10DTC0
00000049 ADC10DTC1
0000004a ADC10AE0
00000050 __STACK_SIZE
00000053 BCSCTL3
00000056 DCOCTL
00000057 BCSCTL1
00000058 BCSCTL2
00000059 CACTL1
0000005a CACTL2
0000005b CAPD
0000005d UCA0ABCTL
0000005e UCA0IRTCTL
0000005f UCA0IRRCTL
00000060 UCA0CTL0
00000061 UCA0CTL1
00000062 UCA0BR0
00000063 UCA0BR1
00000064 UCA0MCTL
00000065 UCA0STAT
00000066 UCA0RXBUF
00000067 UCA0TXBUF
00000068 UCB0CTL0
00000069 UCB0CTL1
0000006a UCB0BR0
0000006b UCB0BR1
0000006c UCB0I2CIE
0000006d UCB0STAT
0000006e UCB0RXBUF
0000006f UCB0TXBUF
00000118 UCB0I2COA
0000011a UCB0I2CSA
0000011e TA1IV
00000120 WDTCTL
00000128 FCTL1
0000012a FCTL2
0000012c FCTL3
0000012e TA0IV
00000160 TA0CTL
00000162 TA0CCTL0
00000164 TA0CCTL1
00000166 TA0CCTL2
00000170 TA0R
00000172 TA0CCR0
00000174 TA0CCR1
00000176 TA0CCR2
00000180 TA1CTL
00000182 TA1CCTL0
00000184 TA1CCTL1
00000186 TA1CCTL2
00000190 TA1R
00000192 TA1CCR0
00000194 TA1CCR1
00000196 TA1CCR2
000001b0 ADC10CTL0
000001b2 ADC10CTL1
000001b4 ADC10MEM
000001bc ADC10SA
000003b0 _stack
00000400 __STACK_END
000010c0 TLV_CHECKSUM
000010da TLV_ADC10_1_TAG
000010db TLV_ADC10_1_LEN
000010f6 TLV_DCO_30_TAG
000010f7 TLV_DCO_30_LEN
000010f8 CALDCO_16MHZ
000010f9 CALBC1_16MHZ
000010fa CALDCO_12MHZ
000010fb CALBC1_12MHZ
000010fc CALDCO_8MHZ
000010fd CALBC1_8MHZ
000010fe CALDCO_1MHZ
000010ff CALBC1_1MHZ
0000c000 main
0000c0ec Init_Pins
0000c146 _c_int00_noinit_noargs
0000c15a __TI_ISR_TRAP
0000c162 C$$EXIT
0000c162 abort
0000c168 _system_pre_init
0000ffe0 __TI_int00
0000ffe4 __TI_int02
0000ffe6 __TI_int03
0000ffea __TI_int05
0000ffec __TI_int06
0000ffee __TI_int07
0000fff0 __TI_int08
0000fff2 __TI_int09
0000fff4 __TI_int10
0000fff6 __TI_int11
0000fff8 __TI_int12
0000fffa __TI_int13
0000fffc __TI_int14
0000fffe _reset_vector
ffffffff __TI_pprof_out_hndl
ffffffff __TI_prof_data_size
ffffffff __TI_prof_data_start
ffffffff __c_args__
[126 symbols]

BIN
Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/TX_LPF_MSP430G2553.out Normal file
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Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/TX_LPF_MSP430G2553_linkInfo.xml Normal file
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1
Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/ccsObjs.opt Normal file
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"./main.obj" "../lnk_msp430g2553.cmd" -llibc.a

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Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/main.d Normal file
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# FIXED
main.obj: ../main.c
main.obj: C:/ti/ccsv8/ccs_base/msp430/include/msp430.h
main.obj: C:/ti/ccsv8/ccs_base/msp430/include/msp430g2553.h
main.obj: C:/ti/ccsv8/ccs_base/msp430/include/in430.h
main.obj: C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/include/intrinsics.h
main.obj: C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/include/intrinsics_legacy_undefs.h
../main.c:
C:/ti/ccsv8/ccs_base/msp430/include/msp430.h:
C:/ti/ccsv8/ccs_base/msp430/include/msp430g2553.h:
C:/ti/ccsv8/ccs_base/msp430/include/in430.h:
C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/include/intrinsics.h:
C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/include/intrinsics_legacy_undefs.h:

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166
Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/makefile Normal file
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
SHELL = cmd.exe
CG_TOOL_ROOT := C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS
GEN_OPTS__FLAG :=
GEN_CMDS__FLAG :=
ORDERED_OBJS += \
"./main.obj" \
"../lnk_msp430g2553.cmd" \
$(GEN_CMDS__FLAG) \
-llibc.a \
-include ../makefile.init
RM := DEL /F
RMDIR := RMDIR /S/Q
# All of the sources participating in the build are defined here
-include sources.mk
-include subdir_vars.mk
-include subdir_rules.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C55_DEPS)),)
-include $(C55_DEPS)
endif
ifneq ($(strip $(C_UPPER_DEPS)),)
-include $(C_UPPER_DEPS)
endif
ifneq ($(strip $(S67_DEPS)),)
-include $(S67_DEPS)
endif
ifneq ($(strip $(S62_DEPS)),)
-include $(S62_DEPS)
endif
ifneq ($(strip $(S_DEPS)),)
-include $(S_DEPS)
endif
ifneq ($(strip $(OPT_DEPS)),)
-include $(OPT_DEPS)
endif
ifneq ($(strip $(C??_DEPS)),)
-include $(C??_DEPS)
endif
ifneq ($(strip $(ASM_UPPER_DEPS)),)
-include $(ASM_UPPER_DEPS)
endif
ifneq ($(strip $(S??_DEPS)),)
-include $(S??_DEPS)
endif
ifneq ($(strip $(C64_DEPS)),)
-include $(C64_DEPS)
endif
ifneq ($(strip $(CXX_DEPS)),)
-include $(CXX_DEPS)
endif
ifneq ($(strip $(S64_DEPS)),)
-include $(S64_DEPS)
endif
ifneq ($(strip $(INO_DEPS)),)
-include $(INO_DEPS)
endif
ifneq ($(strip $(CLA_DEPS)),)
-include $(CLA_DEPS)
endif
ifneq ($(strip $(S55_DEPS)),)
-include $(S55_DEPS)
endif
ifneq ($(strip $(SV7A_DEPS)),)
-include $(SV7A_DEPS)
endif
ifneq ($(strip $(C62_DEPS)),)
-include $(C62_DEPS)
endif
ifneq ($(strip $(C67_DEPS)),)
-include $(C67_DEPS)
endif
ifneq ($(strip $(PDE_DEPS)),)
-include $(PDE_DEPS)
endif
ifneq ($(strip $(K_DEPS)),)
-include $(K_DEPS)
endif
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
ifneq ($(strip $(CC_DEPS)),)
-include $(CC_DEPS)
endif
ifneq ($(strip $(C++_DEPS)),)
-include $(C++_DEPS)
endif
ifneq ($(strip $(C43_DEPS)),)
-include $(C43_DEPS)
endif
ifneq ($(strip $(S43_DEPS)),)
-include $(S43_DEPS)
endif
ifneq ($(strip $(ASM_DEPS)),)
-include $(ASM_DEPS)
endif
ifneq ($(strip $(S_UPPER_DEPS)),)
-include $(S_UPPER_DEPS)
endif
ifneq ($(strip $(CPP_DEPS)),)
-include $(CPP_DEPS)
endif
ifneq ($(strip $(SA_DEPS)),)
-include $(SA_DEPS)
endif
endif
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
EXE_OUTPUTS += \
TX_LPF_MSP430G2553.out \
EXE_OUTPUTS__QUOTED += \
"TX_LPF_MSP430G2553.out" \
BIN_OUTPUTS += \
TX_LPF_MSP430G2553.hex \
BIN_OUTPUTS__QUOTED += \
"TX_LPF_MSP430G2553.hex" \
# All Target
all: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@$(MAKE) --no-print-directory -Onone "TX_LPF_MSP430G2553.out"
# Tool invocations
TX_LPF_MSP430G2553.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@echo 'Building target: "$@"'
@echo 'Invoking: MSP430 Linker'
"C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/bin/cl430" -vmsp --use_hw_mpy=none --advice:power=all --define=__MSP430G2553__ -g --printf_support=minimal --diag_warning=225 --diag_wrap=off --display_error_number -z -m"TX_LPF_MSP430G2553.map" --heap_size=80 --stack_size=80 -i"C:/ti/ccsv8/ccs_base/msp430/include" -i"C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/lib" -i"C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/include" --reread_libs --diag_wrap=off --display_error_number --warn_sections --xml_link_info="TX_LPF_MSP430G2553_linkInfo.xml" --use_hw_mpy=none --rom_model -o "TX_LPF_MSP430G2553.out" $(ORDERED_OBJS)
@echo 'Finished building target: "$@"'
@echo ' '
TX_LPF_MSP430G2553.hex: $(EXE_OUTPUTS)
@echo 'Building files: $(strip $(EXE_OUTPUTS__QUOTED))'
@echo 'Invoking: MSP430 Hex Utility'
"C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/bin/hex430" --memwidth=8 --romwidth=8 -o "TX_LPF_MSP430G2553.hex" $(EXE_OUTPUTS__QUOTED)
@echo 'Finished building: $(strip $(EXE_OUTPUTS__QUOTED))'
@echo ' '
# Other Targets
clean:
-$(RM) $(BIN_OUTPUTS__QUOTED)$(EXE_OUTPUTS__QUOTED)
-$(RM) "main.obj"
-$(RM) "main.d"
-@echo 'Finished clean'
-@echo ' '
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets

8
Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/objects.mk Normal file
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
USER_OBJS :=
LIBS := -llibc.a

115
Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/sources.mk Normal file
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@@ -0,0 +1,115 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
C55_SRCS :=
A_SRCS :=
ASM_UPPER_SRCS :=
EXE_SRCS :=
LDS_UPPER_SRCS :=
CPP_SRCS :=
CMD_SRCS :=
O_SRCS :=
ELF_SRCS :=
C??_SRCS :=
C64_SRCS :=
C67_SRCS :=
SA_SRCS :=
S64_SRCS :=
OPT_SRCS :=
CXX_SRCS :=
S67_SRCS :=
S??_SRCS :=
PDE_SRCS :=
SV7A_SRCS :=
K_SRCS :=
CLA_SRCS :=
S55_SRCS :=
LD_UPPER_SRCS :=
OUT_SRCS :=
INO_SRCS :=
LIB_SRCS :=
ASM_SRCS :=
S_UPPER_SRCS :=
S43_SRCS :=
LD_SRCS :=
CMD_UPPER_SRCS :=
C_UPPER_SRCS :=
C++_SRCS :=
C43_SRCS :=
OBJ_SRCS :=
LDS_SRCS :=
S_SRCS :=
CC_SRCS :=
S62_SRCS :=
C62_SRCS :=
C_SRCS :=
C55_DEPS :=
C_UPPER_DEPS :=
S67_DEPS :=
S62_DEPS :=
S_DEPS :=
OPT_DEPS :=
C??_DEPS :=
ASM_UPPER_DEPS :=
S??_DEPS :=
C64_DEPS :=
CXX_DEPS :=
S64_DEPS :=
INO_DEPS :=
CLA_DEPS :=
S55_DEPS :=
SV7A_DEPS :=
EXE_OUTPUTS :=
C62_DEPS :=
C67_DEPS :=
PDE_DEPS :=
K_DEPS :=
C_DEPS :=
CC_DEPS :=
BIN_OUTPUTS :=
C++_DEPS :=
C43_DEPS :=
S43_DEPS :=
OBJS :=
ASM_DEPS :=
S_UPPER_DEPS :=
CPP_DEPS :=
SA_DEPS :=
C++_DEPS__QUOTED :=
OPT_DEPS__QUOTED :=
S_UPPER_DEPS__QUOTED :=
SA_DEPS__QUOTED :=
C??_DEPS__QUOTED :=
S67_DEPS__QUOTED :=
C55_DEPS__QUOTED :=
CC_DEPS__QUOTED :=
ASM_UPPER_DEPS__QUOTED :=
SV7A_DEPS__QUOTED :=
S??_DEPS__QUOTED :=
OBJS__QUOTED :=
C67_DEPS__QUOTED :=
K_DEPS__QUOTED :=
S55_DEPS__QUOTED :=
INO_DEPS__QUOTED :=
C62_DEPS__QUOTED :=
C_DEPS__QUOTED :=
C_UPPER_DEPS__QUOTED :=
C43_DEPS__QUOTED :=
CPP_DEPS__QUOTED :=
BIN_OUTPUTS__QUOTED :=
C64_DEPS__QUOTED :=
CXX_DEPS__QUOTED :=
CLA_DEPS__QUOTED :=
S_DEPS__QUOTED :=
ASM_DEPS__QUOTED :=
S43_DEPS__QUOTED :=
EXE_OUTPUTS__QUOTED :=
S64_DEPS__QUOTED :=
S62_DEPS__QUOTED :=
PDE_DEPS__QUOTED :=
# Every subdirectory with source files must be described here
SUBDIRS := \
. \

15
Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/subdir_rules.mk Normal file
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@@ -0,0 +1,15 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
SHELL = cmd.exe
# Each subdirectory must supply rules for building sources it contributes
%.obj: ../%.c $(GEN_OPTS) | $(GEN_FILES)
@echo 'Building file: "$<"'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/bin/cl430" -vmsp --use_hw_mpy=none --include_path="C:/ti/ccsv8/ccs_base/msp430/include" --include_path="C:/Users/Tisho/workspace_v8/TX_LPF_MSP430G2553" --include_path="C:/ti/ccsv8/tools/compiler/ti-cgt-msp430_18.1.5.LTS/include" --advice:power=all --define=__MSP430G2553__ -g --printf_support=minimal --diag_warning=225 --diag_wrap=off --display_error_number --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: "$<"'
@echo ' '

29
Schematic/Wolf/Addons/TX_LPF_MSP430G2553/Debug/subdir_vars.mk Normal file
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@@ -0,0 +1,29 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
SHELL = cmd.exe
# Add inputs and outputs from these tool invocations to the build variables
CMD_SRCS += \
../lnk_msp430g2553.cmd
C_SRCS += \
../main.c
C_DEPS += \
./main.d
OBJS += \
./main.obj
OBJS__QUOTED += \
"main.obj"
C_DEPS__QUOTED += \
"main.d"
C_SRCS__QUOTED += \
"../main.c"