mirror of
https://gitea.ecohim.ru:3000/RS485_Relay/RS485_Relay2_fw.git
synced 2025-08-07 16:20:30 +03:00
Update HAL version, board description, version number to 10.0
This commit is contained in:
@@ -5,6 +5,17 @@
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* @brief HAL module driver.
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* This is the common part of the HAL initialization
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### How to use this driver #####
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@@ -19,17 +30,6 @@
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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@@ -52,11 +52,11 @@
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* @{
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*/
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/**
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* @brief STM32F0xx HAL Driver version number V1.7.6
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* @brief STM32F0xx HAL Driver version number
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*/
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#define __STM32F0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
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#define __STM32F0xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */
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#define __STM32F0xx_HAL_VERSION_SUB2 (0x06U) /*!< [15:8] sub2 version */
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#define __STM32F0xx_HAL_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */
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#define __STM32F0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
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#define __STM32F0xx_HAL_VERSION ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\
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|(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\
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@@ -337,7 +337,8 @@ HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
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/**
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* @brief return tick frequency.
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* @retval tick period in Hz
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* @retval Tick frequency.
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* Value of @ref HAL_TickFreqTypeDef.
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*/
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HAL_TickFreqTypeDef HAL_GetTickFreq(void)
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{
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@@ -345,7 +346,7 @@ HAL_TickFreqTypeDef HAL_GetTickFreq(void)
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}
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/**
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* @brief This function provides accurate delay (in milliseconds) based
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* @brief This function provides accurate delay (in milliseconds) based
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* on variable incremented.
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* @note In the default implementation , SysTick timer is the source of time base.
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* It is used to generate interrupts at regular time intervals where uwTick
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@@ -511,4 +512,4 @@ void HAL_DBGMCU_DisableDBGStandbyMode(void)
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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|
@@ -68,13 +68,12 @@
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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* This software is licensed under terms that can be found in the LICENSE file in
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* the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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@@ -338,4 +337,3 @@ __weak void HAL_SYSTICK_Callback(void)
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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|
File diff suppressed because it is too large
Load Diff
@@ -8,6 +8,17 @@
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* + Initialization and de-initialization functions
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* + IO operation functions
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### EXTI Peripheral features #####
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@@ -69,18 +80,6 @@
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(#) Generate software interrupt using HAL_EXTI_GenerateSWI().
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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@@ -302,7 +301,7 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT
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assert_param(IS_EXTI_GPIO_PIN(linepos));
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regval = SYSCFG->EXTICR[linepos >> 2u];
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pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> 24);
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pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EXTICR1_EXTI0;
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}
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}
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@@ -546,4 +545,3 @@ void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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|
@@ -69,14 +69,12 @@
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
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* Copyright (c) 2016 STMicroelectronics.
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||||
* All rights reserved.
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||||
*
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||||
* This software is licensed under terms that can be found in the LICENSE file in
|
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* the root directory of this software component.
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||||
* If no LICENSE file comes with this software, it is provided AS-IS.
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******************************************************************************
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*/
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@@ -691,4 +689,3 @@ static void FLASH_SetErrorCode(void)
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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|
@@ -28,14 +28,12 @@
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
* Copyright (c) 2016 STMicroelectronics.
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||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file in
|
||||
* the root directory of this software component.
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||||
* If no LICENSE file comes with this software, it is provided AS-IS.
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******************************************************************************
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*/
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@@ -981,4 +979,3 @@ void FLASH_PageErase(uint32_t PageAddress)
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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|
@@ -7,7 +7,18 @@
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* functionalities of the General Purpose Input/Output (GPIO) peripheral:
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* + Initialization and de-initialization functions
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* + IO operation functions
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*
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*
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******************************************************************************
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* @attention
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*
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||||
* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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||||
*
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||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### GPIO Peripheral features #####
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@@ -94,17 +105,6 @@
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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@@ -249,23 +249,6 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
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temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
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SYSCFG->EXTICR[position >> 2u] = temp;
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/* Clear EXTI line configuration */
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temp = EXTI->IMR;
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temp &= ~(iocurrent);
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if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
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{
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temp |= iocurrent;
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}
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EXTI->IMR = temp;
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temp = EXTI->EMR;
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temp &= ~(iocurrent);
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if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
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{
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temp |= iocurrent;
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}
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EXTI->EMR = temp;
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/* Clear Rising Falling edge configuration */
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temp = EXTI->RTSR;
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temp &= ~(iocurrent);
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@@ -282,6 +265,23 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
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temp |= iocurrent;
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}
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EXTI->FTSR = temp;
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/* Clear EXTI line configuration */
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temp = EXTI->EMR;
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temp &= ~(iocurrent);
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if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
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{
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temp |= iocurrent;
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}
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EXTI->EMR = temp;
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temp = EXTI->IMR;
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temp &= ~(iocurrent);
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if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
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{
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temp |= iocurrent;
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}
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EXTI->IMR = temp;
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}
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}
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@@ -326,8 +326,8 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
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EXTI->EMR &= ~((uint32_t)iocurrent);
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/* Clear Rising Falling edge configuration */
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EXTI->RTSR &= ~((uint32_t)iocurrent);
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EXTI->FTSR &= ~((uint32_t)iocurrent);
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EXTI->RTSR &= ~((uint32_t)iocurrent);
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/* Configure the External Interrupt or event for the current IO */
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tmp = 0x0FuL << (4u * (position & 0x03u));
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@@ -441,7 +441,7 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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/* Check the parameters */
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assert_param(IS_GPIO_PIN(GPIO_Pin));
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/* get current Ouput Data Register value */
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/* get current Output Data Register value */
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odr = GPIOx->ODR;
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/* Set selected pins that were at low level, and reset ones that were high */
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@@ -537,4 +537,3 @@ __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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|
File diff suppressed because it is too large
Load Diff
@@ -9,6 +9,17 @@
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* + WakeUp Mode Functions
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* + FastModePlus Functions
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*
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******************************************************************************
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* @attention
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*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
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******************************************************************************
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@verbatim
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==============================================================================
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##### I2C peripheral Extended features #####
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@@ -34,18 +45,6 @@
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(++) HAL_I2CEx_EnableFastModePlus()
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(++) HAL_I2CEx_DisableFastModePlus()
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@endverbatim
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******************************************************************************
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* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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@@ -361,5 +360,3 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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|
@@ -8,17 +8,15 @@
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* + Initialization/de-initialization function
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* + Peripheral Control function
|
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*
|
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@verbatim
|
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******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
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@@ -450,5 +448,3 @@ void HAL_PWR_DisableSEVOnPend(void)
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/**
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* @}
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*/
|
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|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
@@ -11,13 +11,12 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
@@ -270,5 +269,3 @@ __weak void HAL_PWREx_Vddio2MonitorCallback(void)
|
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/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
@@ -48,14 +48,12 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file in
|
||||
* the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@@ -1096,10 +1094,10 @@ void HAL_RCC_DisableCSS(void)
|
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*/
|
||||
uint32_t HAL_RCC_GetSysClockFreq(void)
|
||||
{
|
||||
const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U,
|
||||
10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
|
||||
const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
|
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9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
|
||||
static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U,
|
||||
10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
|
||||
static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
|
||||
9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
|
||||
|
||||
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
||||
uint32_t sysclockfreq = 0U;
|
||||
@@ -1362,4 +1360,3 @@ __weak void HAL_RCC_CSSCallback(void)
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
@@ -11,14 +11,12 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file in
|
||||
* the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@@ -961,4 +959,3 @@ __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error)
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
@@ -29,6 +29,17 @@
|
||||
* + Commutation Event configuration with Interruption and DMA
|
||||
* + TIM OCRef clear configuration
|
||||
* + TIM External Clock configuration
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### TIMER Generic features #####
|
||||
@@ -169,17 +180,6 @@ all interrupt callbacks are set to the corresponding weak functions:
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
@@ -204,9 +204,9 @@ all interrupt callbacks are set to the corresponding weak functions:
|
||||
/** @addtogroup TIM_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
|
||||
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
|
||||
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
|
||||
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
|
||||
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
|
||||
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
|
||||
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
|
||||
static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
|
||||
uint32_t TIM_ICFilter);
|
||||
@@ -222,7 +222,7 @@ static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
|
||||
static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
|
||||
static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma);
|
||||
static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
|
||||
TIM_SlaveConfigTypeDef *sSlaveConfig);
|
||||
const TIM_SlaveConfigTypeDef *sSlaveConfig);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -275,6 +275,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
|
||||
assert_param(IS_TIM_INSTANCE(htim->Instance));
|
||||
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
|
||||
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
|
||||
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
|
||||
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
|
||||
|
||||
if (htim->State == HAL_TIM_STATE_RESET)
|
||||
@@ -522,7 +523,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
|
||||
* @param Length The length of data to be transferred from memory to peripheral.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
|
||||
HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, const uint32_t *pData, uint16_t Length)
|
||||
{
|
||||
uint32_t tmpsmcr;
|
||||
|
||||
@@ -536,7 +537,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
|
||||
}
|
||||
else if (htim->State == HAL_TIM_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) && (Length > 0U))
|
||||
if ((pData == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -658,6 +659,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim)
|
||||
assert_param(IS_TIM_INSTANCE(htim->Instance));
|
||||
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
|
||||
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
|
||||
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
|
||||
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
|
||||
|
||||
if (htim->State == HAL_TIM_STATE_RESET)
|
||||
@@ -1043,7 +1045,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
|
||||
* @param Length The length of data to be transferred from memory to TIM peripheral
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
|
||||
HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
|
||||
uint16_t Length)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t tmpsmcr;
|
||||
@@ -1058,7 +1061,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
|
||||
}
|
||||
else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) && (Length > 0U))
|
||||
if ((pData == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -1321,6 +1324,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
|
||||
assert_param(IS_TIM_INSTANCE(htim->Instance));
|
||||
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
|
||||
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
|
||||
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
|
||||
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
|
||||
|
||||
if (htim->State == HAL_TIM_STATE_RESET)
|
||||
@@ -1706,7 +1710,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
|
||||
* @param Length The length of data to be transferred from memory to TIM peripheral
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
|
||||
HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
|
||||
uint16_t Length)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t tmpsmcr;
|
||||
@@ -1721,7 +1726,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
|
||||
}
|
||||
else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) && (Length > 0U))
|
||||
if ((pData == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -1983,6 +1988,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
|
||||
assert_param(IS_TIM_INSTANCE(htim->Instance));
|
||||
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
|
||||
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
|
||||
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
|
||||
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
|
||||
|
||||
if (htim->State == HAL_TIM_STATE_RESET)
|
||||
@@ -2376,7 +2382,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
|
||||
else if ((channel_state == HAL_TIM_CHANNEL_STATE_READY)
|
||||
&& (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY))
|
||||
{
|
||||
if ((pData == NULL) && (Length > 0U))
|
||||
if ((pData == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -2632,6 +2638,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePul
|
||||
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
|
||||
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
|
||||
assert_param(IS_TIM_OPM_MODE(OnePulseMode));
|
||||
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
|
||||
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
|
||||
|
||||
if (htim->State == HAL_TIM_STATE_RESET)
|
||||
@@ -3009,7 +3016,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Out
|
||||
* @param sConfig TIM Encoder Interface configuration structure
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig)
|
||||
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig)
|
||||
{
|
||||
uint32_t tmpsmcr;
|
||||
uint32_t tmpccmr1;
|
||||
@@ -3035,6 +3042,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_Ini
|
||||
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
|
||||
assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
|
||||
assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
|
||||
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
|
||||
|
||||
if (htim->State == HAL_TIM_STATE_RESET)
|
||||
{
|
||||
@@ -3544,7 +3552,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
|
||||
else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
|
||||
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
|
||||
{
|
||||
if ((pData1 == NULL) && (Length > 0U))
|
||||
if ((pData1 == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -3569,7 +3577,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
|
||||
else if ((channel_2_state == HAL_TIM_CHANNEL_STATE_READY)
|
||||
&& (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY))
|
||||
{
|
||||
if ((pData2 == NULL) && (Length > 0U))
|
||||
if ((pData2 == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -3598,7 +3606,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
|
||||
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
|
||||
&& (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY))
|
||||
{
|
||||
if ((((pData1 == NULL) || (pData2 == NULL))) && (Length > 0U))
|
||||
if ((((pData1 == NULL) || (pData2 == NULL))) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -4028,7 +4036,7 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim,
|
||||
TIM_OC_InitTypeDef *sConfig,
|
||||
const TIM_OC_InitTypeDef *sConfig,
|
||||
uint32_t Channel)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
@@ -4106,7 +4114,7 @@ HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim,
|
||||
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel)
|
||||
HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConfig, uint32_t Channel)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
@@ -4206,7 +4214,7 @@ HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitT
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
|
||||
TIM_OC_InitTypeDef *sConfig,
|
||||
const TIM_OC_InitTypeDef *sConfig,
|
||||
uint32_t Channel)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
@@ -4468,15 +4476,13 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
|
||||
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)
|
||||
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
HAL_StatusTypeDef status;
|
||||
|
||||
status = HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
|
||||
((BurstLength) >> 8U) + 1U);
|
||||
|
||||
if (status == HAL_OK)
|
||||
{
|
||||
status = HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
|
||||
((BurstLength) >> 8U) + 1U);
|
||||
}
|
||||
|
||||
|
||||
return status;
|
||||
@@ -4522,7 +4528,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
|
||||
uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
|
||||
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
|
||||
uint32_t BurstLength, uint32_t DataLength)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
@@ -4809,13 +4815,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t B
|
||||
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
|
||||
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
HAL_StatusTypeDef status;
|
||||
|
||||
status = HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
|
||||
((BurstLength) >> 8U) + 1U);
|
||||
|
||||
if (status == HAL_OK)
|
||||
{
|
||||
status = HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
|
||||
((BurstLength) >> 8U) + 1U);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
@@ -5164,7 +5168,7 @@ HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventS
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
|
||||
TIM_ClearInputConfigTypeDef *sClearInputConfig,
|
||||
const TIM_ClearInputConfigTypeDef *sClearInputConfig,
|
||||
uint32_t Channel)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
@@ -5190,8 +5194,8 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
|
||||
{
|
||||
/* Clear the OCREF clear selection bit */
|
||||
CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case TIM_CLEARINPUTSOURCE_ETR:
|
||||
{
|
||||
@@ -5302,7 +5306,7 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
|
||||
* contains the clock source information for the TIM peripheral.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
|
||||
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t tmpsmcr;
|
||||
@@ -5488,7 +5492,7 @@ HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_S
|
||||
* (Disable, Reset, Gated, Trigger, External clock mode 1).
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig)
|
||||
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
|
||||
@@ -5529,7 +5533,7 @@ HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveC
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim,
|
||||
TIM_SlaveConfigTypeDef *sSlaveConfig)
|
||||
const TIM_SlaveConfigTypeDef *sSlaveConfig)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
|
||||
@@ -5571,7 +5575,7 @@ HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim,
|
||||
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
|
||||
* @retval Captured value
|
||||
*/
|
||||
uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
|
||||
uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel)
|
||||
{
|
||||
uint32_t tmpreg = 0U;
|
||||
|
||||
@@ -5845,8 +5849,6 @@ HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Call
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
/* Process locked */
|
||||
__HAL_LOCK(htim);
|
||||
|
||||
if (htim->State == HAL_TIM_STATE_READY)
|
||||
{
|
||||
@@ -6038,9 +6040,6 @@ HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Call
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(htim);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -6083,9 +6082,6 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(htim);
|
||||
|
||||
if (htim->State == HAL_TIM_STATE_READY)
|
||||
{
|
||||
switch (CallbackID)
|
||||
@@ -6317,9 +6313,6 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(htim);
|
||||
|
||||
return status;
|
||||
}
|
||||
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
|
||||
@@ -6348,7 +6341,7 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
|
||||
* @param htim TIM Base handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
return htim->State;
|
||||
}
|
||||
@@ -6358,7 +6351,7 @@ HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
|
||||
* @param htim TIM Output Compare handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
return htim->State;
|
||||
}
|
||||
@@ -6368,7 +6361,7 @@ HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
|
||||
* @param htim TIM handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
return htim->State;
|
||||
}
|
||||
@@ -6378,7 +6371,7 @@ HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
|
||||
* @param htim TIM IC handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
return htim->State;
|
||||
}
|
||||
@@ -6388,7 +6381,7 @@ HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
|
||||
* @param htim TIM OPM handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
return htim->State;
|
||||
}
|
||||
@@ -6398,7 +6391,7 @@ HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
|
||||
* @param htim TIM Encoder Interface handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
return htim->State;
|
||||
}
|
||||
@@ -6408,7 +6401,7 @@ HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
|
||||
* @param htim TIM handle
|
||||
* @retval Active channel
|
||||
*/
|
||||
HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
return htim->Channel;
|
||||
}
|
||||
@@ -6426,7 +6419,7 @@ HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(TIM_HandleTypeDef *htim)
|
||||
* @arg TIM_CHANNEL_6: TIM Channel 6
|
||||
* @retval TIM Channel state
|
||||
*/
|
||||
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(TIM_HandleTypeDef *htim, uint32_t Channel)
|
||||
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
|
||||
{
|
||||
HAL_TIM_ChannelStateTypeDef channel_state;
|
||||
|
||||
@@ -6443,7 +6436,7 @@ HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(TIM_HandleTypeDef *htim, ui
|
||||
* @param htim TIM handle
|
||||
* @retval DMA burst state
|
||||
*/
|
||||
HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
|
||||
@@ -6786,7 +6779,7 @@ static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma)
|
||||
* @param Structure TIM Base configuration structure
|
||||
* @retval None
|
||||
*/
|
||||
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
|
||||
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
|
||||
{
|
||||
uint32_t tmpcr1;
|
||||
tmpcr1 = TIMx->CR1;
|
||||
@@ -6834,7 +6827,7 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
|
||||
* @param OC_Config The output configuration structure
|
||||
* @retval None
|
||||
*/
|
||||
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
|
||||
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
|
||||
{
|
||||
uint32_t tmpccmrx;
|
||||
uint32_t tmpccer;
|
||||
@@ -6909,7 +6902,7 @@ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
|
||||
* @param OC_Config The output configuration structure
|
||||
* @retval None
|
||||
*/
|
||||
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
|
||||
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
|
||||
{
|
||||
uint32_t tmpccmrx;
|
||||
uint32_t tmpccer;
|
||||
@@ -6985,7 +6978,7 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
|
||||
* @param OC_Config The output configuration structure
|
||||
* @retval None
|
||||
*/
|
||||
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
|
||||
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
|
||||
{
|
||||
uint32_t tmpccmrx;
|
||||
uint32_t tmpccer;
|
||||
@@ -7059,7 +7052,7 @@ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
|
||||
* @param OC_Config The output configuration structure
|
||||
* @retval None
|
||||
*/
|
||||
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
|
||||
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
|
||||
{
|
||||
uint32_t tmpccmrx;
|
||||
uint32_t tmpccer;
|
||||
@@ -7120,7 +7113,7 @@ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
|
||||
* @retval None
|
||||
*/
|
||||
static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
|
||||
TIM_SlaveConfigTypeDef *sSlaveConfig)
|
||||
const TIM_SlaveConfigTypeDef *sSlaveConfig)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t tmpsmcr;
|
||||
@@ -7632,4 +7625,3 @@ void TIM_ResetCallback(TIM_HandleTypeDef *htim)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
@@ -11,6 +11,17 @@
|
||||
* + Time Master and Slave synchronization configuration
|
||||
* + Time OCRef clear configuration
|
||||
* + Timer remapping capabilities configuration
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### TIMER Extended features #####
|
||||
@@ -65,17 +76,6 @@
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
@@ -136,7 +136,7 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha
|
||||
* @param sConfig TIM Hall Sensor configuration structure
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
|
||||
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
|
||||
{
|
||||
TIM_OC_InitTypeDef OC_Config;
|
||||
|
||||
@@ -152,6 +152,7 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSen
|
||||
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
|
||||
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
|
||||
assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
|
||||
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
|
||||
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
|
||||
assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
|
||||
|
||||
@@ -502,7 +503,7 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
|
||||
else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
|
||||
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
|
||||
{
|
||||
if ((pData == NULL) && (Length > 0U))
|
||||
if ((pData == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -867,7 +868,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe
|
||||
* @param Length The length of data to be transferred from memory to TIM peripheral
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
|
||||
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
|
||||
uint16_t Length)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t tmpsmcr;
|
||||
@@ -882,7 +884,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
|
||||
}
|
||||
else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) && (Length > 0U))
|
||||
if ((pData == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -1348,7 +1350,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann
|
||||
* @param Length The length of data to be transferred from memory to TIM peripheral
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
|
||||
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
|
||||
uint16_t Length)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t tmpsmcr;
|
||||
@@ -1363,7 +1366,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
|
||||
}
|
||||
else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
|
||||
{
|
||||
if ((pData == NULL) && (Length > 0U))
|
||||
if ((pData == NULL) || (Length == 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
@@ -1961,7 +1964,7 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint3
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
|
||||
TIM_MasterConfigTypeDef *sMasterConfig)
|
||||
const TIM_MasterConfigTypeDef *sMasterConfig)
|
||||
{
|
||||
uint32_t tmpcr2;
|
||||
uint32_t tmpsmcr;
|
||||
@@ -2022,7 +2025,7 @@ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
|
||||
TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
|
||||
const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
|
||||
{
|
||||
/* Keep this variable initialized to 0 as it is used to configure BDTR register */
|
||||
uint32_t tmpbdtr = 0U;
|
||||
@@ -2075,11 +2078,12 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
|
||||
{
|
||||
__HAL_LOCK(htim);
|
||||
|
||||
/* Check parameters */
|
||||
assert_param(IS_TIM_REMAP(htim->Instance, Remap));
|
||||
|
||||
__HAL_LOCK(htim);
|
||||
|
||||
/* Set the Timer remapping configuration */
|
||||
WRITE_REG(htim->Instance->OR, Remap);
|
||||
|
||||
@@ -2175,7 +2179,7 @@ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
|
||||
* @param htim TIM Hall Sensor handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
|
||||
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
|
||||
{
|
||||
return htim->State;
|
||||
}
|
||||
@@ -2190,7 +2194,7 @@ HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
|
||||
* @arg TIM_CHANNEL_3: TIM Channel 3
|
||||
* @retval TIM Complementary channel state
|
||||
*/
|
||||
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN)
|
||||
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
|
||||
{
|
||||
HAL_TIM_ChannelStateTypeDef channel_state;
|
||||
|
||||
@@ -2210,7 +2214,7 @@ HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim,
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup TIMEx_Private_Functions TIMEx Private Functions
|
||||
/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
@@ -2386,5 +2390,3 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
@@ -10,6 +10,17 @@
|
||||
* + Peripheral Control functions
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### How to use this driver #####
|
||||
@@ -141,17 +152,6 @@
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
@@ -177,7 +177,7 @@
|
||||
USART_CR1_OVER8)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
|
||||
|
||||
#define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE |\
|
||||
USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
|
||||
USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
|
||||
|
||||
|
||||
#define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */
|
||||
@@ -698,6 +698,7 @@ HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
|
||||
huart->gState = HAL_UART_STATE_RESET;
|
||||
huart->RxState = HAL_UART_STATE_RESET;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
@@ -738,6 +739,9 @@ __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
||||
/**
|
||||
* @brief Register a User UART Callback
|
||||
* To be used instead of the weak predefined callback
|
||||
* @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(),
|
||||
* HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to register
|
||||
* callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID
|
||||
* @param huart uart handle
|
||||
* @param CallbackID ID of the callback to be registered
|
||||
* This parameter can be one of the following values:
|
||||
@@ -767,8 +771,6 @@ HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
{
|
||||
switch (CallbackID)
|
||||
@@ -855,14 +857,15 @@ HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unregister an UART Callback
|
||||
* UART callaback is redirected to the weak predefined callback
|
||||
* @note The HAL_UART_UnRegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(),
|
||||
* HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to un-register
|
||||
* callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID
|
||||
* @param huart uart handle
|
||||
* @param CallbackID ID of the callback to be unregistered
|
||||
* This parameter can be one of the following values:
|
||||
@@ -883,8 +886,6 @@ HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UAR
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
if (HAL_UART_STATE_READY == huart->gState)
|
||||
{
|
||||
switch (CallbackID)
|
||||
@@ -972,8 +973,6 @@ HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UAR
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -1150,10 +1149,10 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
|
||||
* @param Timeout Timeout duration.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||||
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||||
{
|
||||
uint8_t *pdata8bits;
|
||||
uint16_t *pdata16bits;
|
||||
const uint8_t *pdata8bits;
|
||||
const uint16_t *pdata16bits;
|
||||
uint32_t tickstart;
|
||||
|
||||
/* Check that a Tx process is not already ongoing */
|
||||
@@ -1175,8 +1174,6 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->gState = HAL_UART_STATE_BUSY_TX;
|
||||
|
||||
@@ -1190,7 +1187,7 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u
|
||||
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
||||
{
|
||||
pdata8bits = NULL;
|
||||
pdata16bits = (uint16_t *) pData;
|
||||
pdata16bits = (const uint16_t *) pData;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -1198,12 +1195,13 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u
|
||||
pdata16bits = NULL;
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
while (huart->TxXferCount > 0U)
|
||||
{
|
||||
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
|
||||
{
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
if (pdata8bits == NULL)
|
||||
@@ -1221,6 +1219,8 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u
|
||||
|
||||
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
|
||||
{
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
|
||||
@@ -1277,8 +1277,6 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
@@ -1305,13 +1303,13 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
|
||||
pdata16bits = NULL;
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* as long as data have to be received */
|
||||
while (huart->RxXferCount > 0U)
|
||||
{
|
||||
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
|
||||
{
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
if (pdata8bits == NULL)
|
||||
@@ -1353,7 +1351,7 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
|
||||
* @param Size Amount of data elements (u8 or u16) to be sent.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
/* Check that a Tx process is not already ongoing */
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
@@ -1374,8 +1372,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->pTxBuffPtr = pData;
|
||||
huart->TxXferSize = Size;
|
||||
huart->TxXferCount = Size;
|
||||
@@ -1394,8 +1390,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData
|
||||
huart->TxISR = UART_TxISR_8BIT;
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Enable the Transmit Data Register Empty interrupt */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
|
||||
|
||||
@@ -1443,8 +1437,6 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData,
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
/* Set Reception type to Standard reception */
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
@@ -1478,7 +1470,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData,
|
||||
* @param Size Amount of data elements (u8 or u16) to be sent.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
|
||||
{
|
||||
/* Check that a Tx process is not already ongoing */
|
||||
if (huart->gState == HAL_UART_STATE_READY)
|
||||
@@ -1499,8 +1491,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->pTxBuffPtr = pData;
|
||||
huart->TxXferSize = Size;
|
||||
huart->TxXferCount = Size;
|
||||
@@ -1528,8 +1518,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat
|
||||
/* Set error code to DMA */
|
||||
huart->ErrorCode = HAL_UART_ERROR_DMA;
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Restore huart->gState to ready */
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
@@ -1539,8 +1527,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat
|
||||
/* Clear the TC flag in the ICR register */
|
||||
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Enable the DMA transfer for transmit request by setting the DMAT bit
|
||||
in the UART CR3 register */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
@@ -1591,8 +1577,6 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
/* Set Reception type to Standard reception */
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
|
||||
@@ -1621,8 +1605,6 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
|
||||
const HAL_UART_StateTypeDef gstate = huart->gState;
|
||||
const HAL_UART_StateTypeDef rxstate = huart->RxState;
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
|
||||
(gstate == HAL_UART_STATE_BUSY_TX))
|
||||
{
|
||||
@@ -1640,8 +1622,6 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
@@ -1652,8 +1632,6 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
|
||||
{
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
if (huart->gState == HAL_UART_STATE_BUSY_TX)
|
||||
{
|
||||
/* Enable the UART DMA Tx request */
|
||||
@@ -1665,15 +1643,16 @@ HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
|
||||
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
|
||||
|
||||
/* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
if (huart->Init.Parity != UART_PARITY_NONE)
|
||||
{
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
}
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
/* Enable the UART DMA Rx request */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
@@ -1769,9 +1748,10 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
/* Abort the UART DMA Tx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
|
||||
@@ -1794,9 +1774,10 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
/* Abort the UART DMA Rx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
|
||||
@@ -1857,9 +1838,10 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
|
||||
/* Disable TXEIE and TCIE interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
|
||||
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
/* Abort the UART DMA Tx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
|
||||
@@ -1916,9 +1898,10 @@ HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
/* Abort the UART DMA Rx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
|
||||
@@ -2016,7 +1999,7 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
/* Abort the UART DMA Tx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
/* Disable DMA Tx at UART level */
|
||||
@@ -2040,9 +2023,10 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
/* Abort the UART DMA Rx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
|
||||
@@ -2122,9 +2106,10 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
|
||||
/* Disable interrupts */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
|
||||
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
/* Abort the UART DMA Tx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
|
||||
{
|
||||
/* Disable the UART DMA Tx request if enabled */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
|
||||
|
||||
/* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
|
||||
@@ -2213,9 +2198,10 @@ HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
|
||||
}
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
/* Abort the UART DMA Rx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
|
||||
@@ -2392,9 +2378,10 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
|
||||
Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
|
||||
UART_EndRxTransfer(huart);
|
||||
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
/* Abort the UART DMA Rx channel if enabled */
|
||||
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
|
||||
{
|
||||
/* Disable the UART DMA Rx request if enabled */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
|
||||
|
||||
/* Abort the UART DMA Rx channel */
|
||||
@@ -2496,6 +2483,11 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
|
||||
/* Last bytes received, so no need as the abort is immediate */
|
||||
(void)HAL_DMA_Abort(huart->hdmarx);
|
||||
}
|
||||
|
||||
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
|
||||
In this case, Rx Event type is Idle Event */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx Event callback*/
|
||||
huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
|
||||
@@ -2529,6 +2521,11 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
|
||||
huart->RxISR = NULL;
|
||||
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
||||
|
||||
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
|
||||
In this case, Rx Event type is Idle Event */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx complete callback*/
|
||||
huart->RxEventCallback(huart, nb_rx_data);
|
||||
@@ -2976,7 +2973,7 @@ HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
|
||||
* the configuration information for the specified UART.
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
|
||||
HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint32_t temp1;
|
||||
uint32_t temp2;
|
||||
@@ -2992,7 +2989,7 @@ HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
|
||||
* the configuration information for the specified UART.
|
||||
* @retval UART Error Code
|
||||
*/
|
||||
uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
|
||||
uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart)
|
||||
{
|
||||
return huart->ErrorCode;
|
||||
}
|
||||
@@ -3115,7 +3112,7 @@ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
|
||||
/* USARTDIV must be greater than or equal to 0d16 */
|
||||
if (pclk != 0U)
|
||||
{
|
||||
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
|
||||
usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
|
||||
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
|
||||
{
|
||||
brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
|
||||
@@ -3153,10 +3150,10 @@ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
|
||||
if (pclk != 0U)
|
||||
{
|
||||
/* USARTDIV must be greater than or equal to 0d16 */
|
||||
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
|
||||
usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
|
||||
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
|
||||
{
|
||||
huart->Instance->BRR = usartdiv;
|
||||
huart->Instance->BRR = (uint16_t)usartdiv;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -3268,6 +3265,13 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
|
||||
/* Wait until TEACK flag is set */
|
||||
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
|
||||
{
|
||||
/* Disable TXE interrupt for the interrupt process */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE));
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Timeout occurred */
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
@@ -3279,6 +3283,15 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
|
||||
/* Wait until REACK flag is set */
|
||||
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
|
||||
{
|
||||
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
|
||||
interrupts for the interrupt process */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Timeout occurred */
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
@@ -3288,6 +3301,7 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
@@ -3295,10 +3309,11 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Handle UART Communication Timeout.
|
||||
* @brief This function handles UART Communication Timeout. It waits
|
||||
* until a flag is no longer in the specified status.
|
||||
* @param huart UART handle.
|
||||
* @param Flag Specifies the UART flag to check
|
||||
* @param Status Flag status (SET or RESET)
|
||||
* @param Status The actual Flag status (SET or RESET)
|
||||
* @param Tickstart Tick start value
|
||||
* @param Timeout Timeout duration
|
||||
* @retval HAL status
|
||||
@@ -3314,33 +3329,39 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_
|
||||
{
|
||||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||||
{
|
||||
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
|
||||
interrupts for the interrupt process */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
|
||||
if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
|
||||
{
|
||||
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
|
||||
{
|
||||
/* Clear Overrun Error flag*/
|
||||
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
|
||||
|
||||
/* Blocking error : transfer is aborted
|
||||
Set the UART state ready to be able to start again the process,
|
||||
Disable Rx Interrupts if ongoing */
|
||||
UART_EndRxTransfer(huart);
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_ORE;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
|
||||
{
|
||||
/* Clear Receiver Timeout flag*/
|
||||
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
|
||||
|
||||
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
|
||||
interrupts for the interrupt process */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
/* Blocking error : transfer is aborted
|
||||
Set the UART state ready to be able to start again the process,
|
||||
Disable Rx Interrupts if ongoing */
|
||||
UART_EndRxTransfer(huart);
|
||||
|
||||
huart->gState = HAL_UART_STATE_READY;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
huart->ErrorCode = HAL_UART_ERROR_RTO;
|
||||
|
||||
/* Process Unlocked */
|
||||
@@ -3391,10 +3412,15 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat
|
||||
huart->RxISR = UART_RxISR_8BIT;
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
|
||||
if (huart->Init.Parity != UART_PARITY_NONE)
|
||||
{
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
|
||||
}
|
||||
else
|
||||
{
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE);
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
@@ -3437,18 +3463,18 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa
|
||||
/* Set error code to DMA */
|
||||
huart->ErrorCode = HAL_UART_ERROR_DMA;
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Restore huart->RxState to ready */
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
}
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Enable the UART Parity Error Interrupt */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
if (huart->Init.Parity != UART_PARITY_NONE)
|
||||
{
|
||||
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
|
||||
}
|
||||
|
||||
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
|
||||
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
||||
@@ -3586,6 +3612,10 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
|
||||
}
|
||||
}
|
||||
|
||||
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
|
||||
In this case, Rx Event type is Transfer Complete */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Check current reception Mode :
|
||||
If Reception till IDLE event has been selected : use Rx Event callback */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
@@ -3620,6 +3650,10 @@ static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
|
||||
|
||||
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
|
||||
In this case, Rx Event type is Half Transfer */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_HT;
|
||||
|
||||
/* Check current reception Mode :
|
||||
If Reception till IDLE event has been selected : use Rx Event callback */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
@@ -3907,7 +3941,7 @@ static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
|
||||
*/
|
||||
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
|
||||
{
|
||||
uint16_t *tmp;
|
||||
const uint16_t *tmp;
|
||||
|
||||
/* Check that a Tx process is ongoing */
|
||||
if (huart->gState == HAL_UART_STATE_BUSY_TX)
|
||||
@@ -3922,7 +3956,7 @@ static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
|
||||
}
|
||||
else
|
||||
{
|
||||
tmp = (uint16_t *) huart->pTxBuffPtr;
|
||||
tmp = (const uint16_t *) huart->pTxBuffPtr;
|
||||
huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
|
||||
huart->pTxBuffPtr += 2U;
|
||||
huart->TxXferCount--;
|
||||
@@ -3989,6 +4023,16 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
|
||||
/* Clear RxISR function pointer */
|
||||
huart->RxISR = NULL;
|
||||
|
||||
/* Initialize type of RxEvent to Transfer Complete */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Check that USART RTOEN bit is set */
|
||||
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
|
||||
{
|
||||
/* Enable the UART Receiver Timeout Interrupt */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
|
||||
}
|
||||
|
||||
/* Check current reception Mode :
|
||||
If Reception till IDLE event has been selected : */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
@@ -4004,6 +4048,7 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
|
||||
/* Clear IDLE Flag */
|
||||
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
|
||||
}
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx Event callback*/
|
||||
huart->RxEventCallback(huart, huart->RxXferSize);
|
||||
@@ -4068,6 +4113,16 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
|
||||
/* Clear RxISR function pointer */
|
||||
huart->RxISR = NULL;
|
||||
|
||||
/* Initialize type of RxEvent to Transfer Complete */
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Check that USART RTOEN bit is set */
|
||||
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
|
||||
{
|
||||
/* Enable the UART Receiver Timeout Interrupt */
|
||||
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
|
||||
}
|
||||
|
||||
/* Check current reception Mode :
|
||||
If Reception till IDLE event has been selected : */
|
||||
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
||||
@@ -4083,6 +4138,7 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
|
||||
/* Clear IDLE Flag */
|
||||
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
|
||||
}
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/*Call registered Rx Event callback*/
|
||||
huart->RxEventCallback(huart, huart->RxXferSize);
|
||||
@@ -4125,4 +4181,3 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
@@ -9,6 +9,17 @@
|
||||
* + Peripheral Control functions
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### UART peripheral extended features #####
|
||||
@@ -21,17 +32,6 @@
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
@@ -520,11 +520,10 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->RxState = HAL_UART_STATE_BUSY_RX;
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
/* Init tickstart for timeout management */
|
||||
tickstart = HAL_GetTick();
|
||||
@@ -548,8 +547,6 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
|
||||
pdata16bits = NULL;
|
||||
}
|
||||
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Initialize output number of received elements */
|
||||
*RxLen = 0U;
|
||||
|
||||
@@ -566,6 +563,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
|
||||
/* If Set, and data has already been received, this means Idle Event is valid : End reception */
|
||||
if (*RxLen > 0U)
|
||||
{
|
||||
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
|
||||
huart->RxState = HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
@@ -657,10 +655,9 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
/* Set Reception type to reception till IDLE Event*/
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
status = UART_Start_Receive_IT(huart, pData, Size);
|
||||
|
||||
@@ -735,10 +732,9 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_
|
||||
}
|
||||
}
|
||||
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
/* Set Reception type to reception till IDLE Event*/
|
||||
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
|
||||
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
||||
|
||||
status = UART_Start_Receive_DMA(huart, pData, Size);
|
||||
|
||||
@@ -768,6 +764,36 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Provide Rx Event type that has lead to RxEvent callback execution.
|
||||
* @note When HAL_UARTEx_ReceiveToIdle_IT() or HAL_UARTEx_ReceiveToIdle_DMA() API are called, progress
|
||||
* of reception process is provided to application through calls of Rx Event callback (either default one
|
||||
* HAL_UARTEx_RxEventCallback() or user registered one). As several types of events could occur (IDLE event,
|
||||
* Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type that has lead
|
||||
* to Rx Event callback execution.
|
||||
* @note This function is expected to be called within the user implementation of Rx Event Callback,
|
||||
* in order to provide the accurate value :
|
||||
* In Interrupt Mode :
|
||||
* - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received)
|
||||
* - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of
|
||||
* received data is lower than expected one)
|
||||
* In DMA Mode :
|
||||
* - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received)
|
||||
* - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received
|
||||
* - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of
|
||||
* received data is lower than expected one).
|
||||
* In DMA mode, RxEvent callback could be called several times;
|
||||
* When DMA is configured in Normal Mode, HT event does not stop Reception process;
|
||||
* When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception process;
|
||||
* @param huart UART handle.
|
||||
* @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values)
|
||||
*/
|
||||
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Return Rx Event type value, as stored in UART handle */
|
||||
return (huart->RxEventType);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -813,4 +839,3 @@ static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTy
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
Reference in New Issue
Block a user